* Removed AVX512_ER, AVX512_PF, AVX512_4FMAPS, and AVX512_4VNNIW
extensions and corresponding instructions (these were never
advertised by any x86 CPU and were only used by Xeon Phi acc.,
which AsmJit never supported)
* Removed CPU extensions HLE, MPX, and TSX
* Kept extension RTM, which is only for backward compatibility to
recognize instructions, but it's no longer checked by CpuInfo as
it's been deprecated together with HLE and MPX
* The xtest instruction now reports it requires RTM
* Reorganized x86 extensions a bit - they are now reordered to group
them by category, preparing for the future where extension IDs will
be always added after existing records for ABI compatibility
* Instruction vcvtneps2bf16 no longer accepts form without an explicit
memory operand size
* Removed aliased instructions in CMOVcc, Jcc, And SETcc categories,
now there is only a single instruction id for all aliased instructions.
* Added a new feature to always show instruction aliases in Logger, which
includes formatting instructio nodes (Builder, Compiler)
Instruction DB-only updates (not applied to C++ yet):
* AsmJit DB from now uses the same license as AsmJit (Zlib) and
no longer applies dual licensing (Zlib and Public Domain)
* Added support for aggregated instruction definitions in
x86 instruction database, which should simplify the maintenance
and reduce bugs (also the syntax is comparable to descriptions
used by Intel APX instruction manuals)
* Added support for APX instructions and new features
* Added support for AVX10.1 and AVX10.2 instructions (both new
instructions and new encodings of existing instructions)
* Added support for MOVRS instructions
* Added support for KL instructions (loadiwkey)
* Added support for AESKLE instructions
* Added support for AESKLEWIDE_KL instructions
* Added support for AMX_[AVX512|MOVRS|FP8|TF32|TRANSPOSE]
* NOTE: None of the instruction additions is currently used by
Asmjit, it's a pure database update that needs more work to
make all the instructions available in future AsmJit
This changeset contains an updated instruction database that brings
ARM32 instructions for the first time. It also updates instruction
database tooling especially for ARM64, which will also be used by
ARM32 generator.
Additionally, new operan has been added, which represents a register
list as used by ARM32 instruction set.
Other minor changes are related to ARM - some stuff had to be moved
to a64 namespace from arm namespace as it's incompatible between
32-bit and 64-bit ISA.
* Added more clang compilers on CI (CI)
* Added memory sanitizer to build matrix (CI)
* Use problem matcher in all builds (CI)
* Fixed the use of some constructs in tests
* Fixed warnings about unused functions in tests
* Fixed warnings about unused variables caused by some build options
* Fixed tests to be clean with MSAN (zeroing memory filled by JIT code)
* Removed -Wclass-memaccess (gcc) from ignored warnings
* Removed -Wconstant-logical-operand (clang) from ignored warnings
* Removed -Wunnamed-type-template-args (clang) from ignored warnings
* Reworked InstData and InstExData to not cause UB (ABI break)
Unfortunately the existing InstData and InstExData was not good for static
analysis and in general compilers emitted warnings regarding accessing
InstNode::_opArray. The reason was that InstExNode added one or two
more operands which extended InstData::_opArray, but there was no way to
tell the C++ compiler about this layout.
It has been changed to InstNode having no operands and InstNodeWithOperands
being templatized for the right number of operands. Nodes that need to
inherit InstNode would just inherit InstNodeWithOperands<N>. It works the
same way as before, just the class hierarchy changed a little.
* Instruction database is now part of asmjit to keep it in sync
* X86/X64 ISA data has been reworked, now in a proper JSON format
* ARM32 ISA data has been added (currently only DB, support later)
* ARM64 ISA data has been added
* ARM features detection has been updated
[ABI] Added ABI version as an inline namespace, which forms asmjit::_abi_MAJOR_MINOR
[ABI] Added support for AVX512_FP16, 16-bit broadcast, and AVX512_FP16 tests
[ABI] Added initial support for consecutive registers into instruction database and register allocator
[ABI] Added a possibility to use temporary memory in CodeHolder's zone
[ABI] Compiler::setArg() is now deprecated, use FuncNode::setArg()
[Bug] Fixed correct RW information of instructions that only support implicit zeroing with {k}
[Bug] Fixed broadcast to be able to broadcast bcst16 operands
Fixed POP Sreg instruction, which was incorrectly implemented to emit nothing
Fixed CVTSD2SI, CVTSS2SI, CVTTSD2SI, and CVTTSS2SI instructions to not consider the size of the memory operand when calculagint REX.W prefix
Fixed VCMPPD, VCMPPS, VCMPSD, VCMPSS, VPCMPEQ*, VPCMPGT* instructions to always force EVEX prefix when the first operand is K register
Fixed ENDBR32 and ENDBR64 instructions (wrong opcode)
Fixed CLRSSBSY and RSTORSSP instructions (wrong logic in Assembler)
Fixed SLDT, SMSW, and STR instructions to not consider memory size when determining prefixes
Fixed UD0 and UD1 instructions to consider both operands
Fixed VCVTNE2PS2BF16, VCVTNEPS2BF16, and VDPBF16PS instructions (incorrect calculation of LL field) (AVX512)
Fixed VCVTPD2DQ, VCVTPD2PS, VCVTPD2UDQ, VCVTQQ2PS, VCVTTOD2DQ, VCVTTPD2UDQ, VCVTUQQ2PS in AVX512 case (incorrect calculation of LL field)
Fixed VGATHERPF* and VSCATTERPF* instructions (some instructions were encoded incorrectly by not considering the memory index register type in LL field)
Fixed VPBLENDVB (incorrect calculation of LL field)
Fixed VPEXTRW to use use a shorter encoding when possible (vpextrw r32, xmm, imm)
Fixed VPSLLD, VPSLLQ, VPSLLW, VPSRAD, VPSRAQ, VPSRAW, VPSRLD, VPSRLQ, VPSRLW instructions to always force EVEX prefix when the instruction is RMI (AVX512)
Fixed the accepted memory operand size of MMX PUNPCKL??? instructions from m64 to m32 (only affects validation)
Added explicit forms to XSAVE* and XRSTOR* instructions
Added HRESET and UINTR instructions
Changed MOV and all ARITH instructions to output the same binary as LLVM in 'reg, reg' case (it used an alternative encoding initially)
Renamed LRET to RETF
Renamed VBLENDM* instructions to VPBLENDM* (the name was incorrect)
Renamed VPBROADCASTMB2D to VPBROADCASTMW2D (the name was incorrect)
Renamed SYSEXIT64 to SYSEXITQ and SYSRET64 to SYSRETQ
Removed non-standard IRETW (use IRET, IRETD, or IRETQ to select the form)
Refactored build system macros (ASMJIT_BUILD_STATIC -> ASMJIT_STATIC)
Refactored AVX512 broadcast {1toN} - moved to operand from instruction.
Refactored naming - renamed getters to not use get prefix.
Refactored code structure - move arch-specific stuff into x86 namespace.
Refactored some compiler/arch-specific macros, respect rel/abs option in mov REG, [ADDR].
Refactored StringBuilder (Renamed to String, added small string optimization).
Refactored LabelId<->LabelEntry mapping, force label offset to 64-bits on all archs.
Renamed Runtime to Target (JitRuntime kept for now).
Renamed VirtMemManager to JitAllocator.
Renamed VirtMem to JitUtils.
Renamed FuncSignatureX to FuncSignatureBuilder.
Fixed xchg [mem], rex-lo, refactored RelocEntry.
Fixed Logger to always show abs|rel when formatting a memory operand
Fixed Logger to prefix HEX numbers with 0x prefix
Fixed Support::ctzGeneric to always return uint32_t, T doesn't matter.
Fixed LightCall to not save MMX and K registers
Fixed CpuInfo constructor to propagate NoInit (#243)
Added VAES, AVX512_VBMI2, AVX512_VNNI, and AVX512_BITALG cpu-features and instructions.
Added emscripten support (asmjit can be now compiled by emscripten).
Added asmjit.natvis for better MSVC experience
Added x86::ptr_abs|ptr_rel
Added support for multibyte nop r/m (#135)
Added support for 32-bit to 64-bit zero-extended addresses, improved validation of memory addresses, and removed wrt address type as this will be reworked
Added support for multiple sections, reworked address table support (previously known as trampolines)
Added the following x86 modifiers to the x86::Emitter - xacquire(), xrelease(), and k(kreg)
Added a possibility to use REP prefix with RET instruction
Added a possibility to relocate [rel addr] during relocate()
Added a variadic function-call support (Compiler), argument duplication (Compiler), better /dev/shm vs /tmp shared memory handling (VirtMem).
Removed imm_u imm_ptr helpers, imm() can now accept any integer and pointer.
Changed the default behavior of optimizing instructions to disabled with a possibility to enable that feature through kOptionOptimizedForSize
Use default copy construction / assignment to prevent new kind of warnings introduced by GCC 9
Fixed encoding of 'POPCNT|TZCNT|LZCNT r16, r16/m16' instruction
Fixed encoding of EVEX instructions that don't provide VEX prefix equivalent
Added 'LOCK MOV CR8' extension used by AMD processors in 32-bit mode and 'ALTMOVCR8' CPU feature
Renamed some CPU features to respect their names used in X86/X64 architecture manuals
Added validation of immediate operands (correct size, correct sign/zero extension)
Added validation of explicit/implicit size of memory operands
Added validation of LOCK/REP/REPNZ prefixes to x86 validator
Reorganized some X86 instruction tables, removed family specific tables, introduced OperationData
Improved instruction tables generator to automatically generate instruction flags
Regenerated all instruction tables to respect the current state of 'asmdb.x86data'
Renamed CodeGen to ExternalTool.
Moved logger constants from asmjit namespace to asmjit::Logger.
Moved AssemblerFeature constants from asmjit namespace to asmjit::Assembler.
Added noexcept to most APIs that are not intended to throw.
Added memory utilities that can read/write to unaligned memory location (ongoing ARM support).
Removed unimplemented instruction scheduler, will be added back when it's working.
Added Visual Studio 2015 scripts and fixed asmjit_test_x86 which now compiles under VS2015
Added StringLogger::getLength()
Added methods to X86Compiler to create a variable operand by its ID
- Compiler no longer works on its own, it requires Assembler.
- Labels created by Assembler and Compiler now share their IDs, so they can be used nearly interchangeably without weird side-effects and hacks.
- Renamed getError() and setError() to getLastError() and setLastError().
- Renamed compiler nodes to "HL" nodes (preparation for HLStream).
- Renamed FuncConv to CallConv.
- Function calling convention is now part of FuncPrototype.
- Added a possibility to align by inserting zeros (kAlignZero)
- Fixed assertion in X86Compiler that didn't like unhandled function argument(s).
- Added Compiler::embedConstPool() helper, which can be handy if you use your own ConstPool.
- Code refactorization and other minor changes.
- CpuTicks::now() renamed to Utils::getTickCount().
- error.h merged with globals.h
- Documentation updates related to recent API changes.
Refactored asmjit::x86 register definitions (now exported as a single symbol).
Refactored bit utilities, now using proper naming like `or_`, `and_`, `andNot`.
Refactored X86RegCount and X86RegMask to support K instead of Fp register.
Refactored X86 instruction table (won't stay for long, new tool to export it is in development).
Renamed instruction group to instruction encoding.
Added XSAVE/OSXSAVE and other CPU features to X86CpuInfo.
Added proper AVX and AVX-512 detection to X86CpuInfo.
Added support to get content of XCR0 in X86CpuInfo (callXGetBV).
Added XSAVE instruction set support (Assembler/Compiler).
Added SSE4a instruction set support (Assembler/Compiler).
Added X86KReg and X86KVar register/variable support (AVX-512).
Added X86ZmmReg and X86ZmmVar register/variable support (AVX-512).
