Minor changes + fixed x86::Mem constructors to always be explicit

README.md

@@ -1784,21 +1784,22 @@ a.add(x86::ebx, x86::eax); // Emits in .text section.
 a.lea(x86::rsi, x86::ptr(L_Data));
 ```
 
-The last line in the example above shows that a LabelLink would be created even for bound labels that cross sections. In this case a referenced label was bound in another section, which means that the link couldn't be resolved at that moment. If your code uses sections, but you wish AsmJit to flatten these sections (you don't plan to flatten then manually) then there is an API for that.
+The last line in the example above shows that a LabelLink would be created even for bound labels that cross sections. In this case a referenced label was bound in another section, which means that the link couldn't be resolved at that moment. If your code uses sections, but you wish AsmJit to flatten these sections (you don't plan to flatten them manually) then there is an API for that.
 
 ```c++
 // ... (continuing the previous example) ...
 CodeHolder code = ...;
 
 // Suppose we have some code that contains multiple sections and
-// we would like to flatten it by using AsmJit's built-in API:
+// we would like to flatten them by using AsmJit's built-in API:
 Error err = code.flatten();
 if (err) { /* Error handling is necessary. */ }
 
 // After flattening all sections would contain assigned offsets
 // relative to base. Offsets are 64-bit unsigned integers so we
-// cast it to `unsigned int` for simplicity here...
-printf("Data section offset %u", unsigned(data->offset()));
+// cast them to `size_t` for simplicity. On 32-bit targets it's
+// guaranteed that the offset cannot be greater than `2^32 - 1`.
+printf("Data section offset %zu", size_t(data->offset()));
 
 // The flattening doesn't resolve unresolved label links, this
 // has to be done manually as flattening can be done separately.

src/asmjit/core/assembler.cpp

@@ -244,6 +244,12 @@ Error BaseAssembler::_emitFailed(
   }
 
   Logging::formatInstruction(sb, 0, this, archId(), BaseInst(instId, options, _extraReg), operands, Globals::kMaxOpCount);
+
+  if (inlineComment()) {
+    sb.appendString(" ; ");
+    sb.appendString(inlineComment());
+  }
+
   resetInstOptions();
   resetExtraReg();
   resetInlineComment();

src/asmjit/core/compiler.cpp

@@ -472,7 +472,7 @@ Error BaseCompiler::_newConst(BaseMem& out, uint32_t scope, const void* data, si
   return kErrorOk;
 }
 
-void BaseCompiler::rename(BaseReg& reg, const char* fmt, ...) {
+void BaseCompiler::rename(const BaseReg& reg, const char* fmt, ...) {
   if (!reg.isVirtReg()) return;
 
   VirtReg* vReg = virtRegById(reg.id());

src/asmjit/core/compiler.h

@@ -297,7 +297,7 @@ public:
   //! Rename the given virtual register `reg` to a formatted string `fmt`.
   //!
   //! \note Only new name will appear in the logger.
-  ASMJIT_API void rename(BaseReg& reg, const char* fmt, ...);
+  ASMJIT_API void rename(const BaseReg& reg, const char* fmt, ...);
 
   //! \}
 

src/asmjit/x86/x86internal.cpp

@@ -742,7 +742,7 @@ ASMJIT_FAVOR_SIZE Error X86Internal::finalizeFuncFrame(FuncFrame& frame) noexcep
 
   // If the function's stack must be aligned, calculate the alignment necessary
   // to store vector registers, and set `FuncFrame::kAttrAlignedVecSR` to inform
-  // PEI that it can use instructions to perform aligned stores/loads.
+  // PEI that it can use instructions that perform aligned stores/loads.
   if (stackAlignment >= vecSize && frame._nonGpSaveSize) {
     frame.addAttributes(FuncFrame::kAttrAlignedVecSR);
     v = Support::alignUp(v, vecSize);         // Align '_nonGpSaveOffset'.

src/asmjit/x86/x86logging.cpp

@@ -115,7 +115,7 @@ static const RegFormatInfo x86RegFormatInfo = {
   { ASMJIT_LOOKUP_TABLE_32(ASMJIT_REG_TYPE_ENTRY, 0) },
 
   "\0"             // #0
-  "gpb.lo\0"       // #1
+  "gpb\0\0\0\0"    // #1
   "gpb.hi\0"       // #8
   "gpw\0"          // #15
   "gpd\0"          // #19

src/asmjit/x86/x86operand.h

@@ -445,7 +445,7 @@ public:
   constexpr Mem(const BaseReg& base, const BaseReg& index, uint32_t shift, int32_t off, uint32_t size = 0, uint32_t flags = 0) noexcept
     : BaseMem(Decomposed { base.type(), base.id(), index.type(), index.id(), off, size, flags | (shift << kSignatureMemShiftShift) }) {}
 
-  constexpr Mem(uint64_t base, uint32_t size = 0, uint32_t flags = 0) noexcept
+  constexpr explicit Mem(uint64_t base, uint32_t size = 0, uint32_t flags = 0) noexcept
     : BaseMem(Decomposed { 0, uint32_t(base >> 32), 0, 0, int32_t(uint32_t(base & 0xFFFFFFFFu)), size, flags }) {}
 
   constexpr Mem(uint64_t base, const BaseReg& index, uint32_t shift = 0, uint32_t size = 0, uint32_t flags = 0) noexcept