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Fixed some warnings and initialization in constructors

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This doesn't fix any bugs, it's just improving the code a bit.
This commit is contained in:
kobalicek
2023-12-12 10:18:33 +01:00
parent 1a81158e8b
commit 416f735696
9 changed files with 62 additions and 67 deletions
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2
src/asmjit/core/codeholder.cpp
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@@ -908,7 +908,7 @@ size_t CodeHolder::codeSize() const noexcept {
}
}
if ((sizeof(uint64_t) > sizeof(size_t) && offset > SIZE_MAX) || of)
if ((sizeof(uint64_t) > sizeof(size_t) && offset > uint64_t(SIZE_MAX)) || of)
return SIZE_MAX;
return size_t(offset);

19
src/asmjit/core/func.h
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@@ -1332,13 +1332,13 @@ public:
//! \{
//! Function detail.
const FuncDetail* _funcDetail;
const FuncDetail* _funcDetail {};
//! Register that can be used to access arguments passed by stack.
uint8_t _saRegId;
uint8_t _saRegId = uint8_t(BaseReg::kIdBad);
//! Reserved for future use.
uint8_t _reserved[3];
uint8_t _reserved[3] {};
//! Mapping of each function argument.
FuncValuePack _argPacks[Globals::kMaxFuncArgs];
FuncValuePack _argPacks[Globals::kMaxFuncArgs] {};
//! \}
@@ -1347,9 +1347,7 @@ public:
ASMJIT_INLINE_NODEBUG explicit FuncArgsAssignment(const FuncDetail* fd = nullptr) noexcept { reset(fd); }
ASMJIT_INLINE_NODEBUG FuncArgsAssignment(const FuncArgsAssignment& other) noexcept {
memcpy(this, &other, sizeof(*this));
}
ASMJIT_INLINE_NODEBUG FuncArgsAssignment(const FuncArgsAssignment& other) noexcept = default;
inline void reset(const FuncDetail* fd = nullptr) noexcept {
_funcDetail = fd;
@@ -1360,6 +1358,13 @@ public:
//! \}
//! \name Overloaded Operators
//! \{
ASMJIT_INLINE_NODEBUG FuncArgsAssignment& operator=(const FuncArgsAssignment& other) noexcept = default;
//! \}
//! \name Accessors
//! \{

37
src/asmjit/core/ralocal_p.h
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@@ -29,52 +29,45 @@ public:
typedef RAAssignment::WorkToPhysMap WorkToPhysMap;
//! Link to `BaseRAPass`.
BaseRAPass* _pass;
BaseRAPass* _pass {};
//! Link to `BaseCompiler`.
BaseCompiler* _cc;
BaseCompiler* _cc {};
//! Architecture traits.
const ArchTraits* _archTraits;
const ArchTraits* _archTraits {};
//! Registers available to the allocator.
RARegMask _availableRegs;
RARegMask _availableRegs {};
//! Registers clobbered by the allocator.
RARegMask _clobberedRegs;
RARegMask _clobberedRegs {};
//! Register assignment (current).
RAAssignment _curAssignment;
RAAssignment _curAssignment {};
//! Register assignment used temporarily during assignment switches.
RAAssignment _tmpAssignment;
RAAssignment _tmpAssignment {};
//! Link to the current `RABlock`.
RABlock* _block;
RABlock* _block {};
//! InstNode.
InstNode* _node;
InstNode* _node {};
//! RA instruction.
RAInst* _raInst;
RAInst* _raInst {};
//! Count of all TiedReg's.
uint32_t _tiedTotal;
uint32_t _tiedTotal {};
//! TiedReg's total counter.
RARegCount _tiedCount;
RARegCount _tiedCount {};
//! Temporary workToPhysMap that can be used freely by the allocator.
WorkToPhysMap* _tmpWorkToPhysMap;
WorkToPhysMap* _tmpWorkToPhysMap {};
//! \name Construction & Destruction
//! \{
inline RALocalAllocator(BaseRAPass* pass) noexcept
inline explicit RALocalAllocator(BaseRAPass* pass) noexcept
: _pass(pass),
_cc(pass->cc()),
_archTraits(pass->_archTraits),
_availableRegs(pass->_availableRegs),
_clobberedRegs(),
_curAssignment(),
_block(nullptr),
_node(nullptr),
_raInst(nullptr),
_tiedTotal(),
_tiedCount() {}
_availableRegs(pass->_availableRegs) {}
Error init() noexcept;

11
src/asmjit/core/rapass.cpp
View File

@@ -366,21 +366,18 @@ Error BaseRAPass::initSharedAssignments(const ZoneVector<uint32_t>& sharedAssign
class RABlockVisitItem {
public:
RABlock* _block {};
uint32_t _index {};
inline RABlockVisitItem(RABlock* block, uint32_t index) noexcept
: _block(block),
_index(index) {}
inline RABlockVisitItem(const RABlockVisitItem& other) noexcept
: _block(other._block),
_index(other._index) {}
inline RABlockVisitItem(const RABlockVisitItem& other) noexcept = default;
inline RABlockVisitItem& operator=(const RABlockVisitItem& other) noexcept = default;
inline RABlock* block() const noexcept { return _block; }
inline uint32_t index() const noexcept { return _index; }
RABlock* _block;
uint32_t _index;
};
Error BaseRAPass::buildCFGViews() noexcept {

8
src/asmjit/core/support.h
View File

@@ -997,9 +997,9 @@ static ASMJIT_INLINE_NODEBUG int16_t readI16aBE(const void* p) noexcept { return
template<ByteOrder BO = ByteOrder::kNative>
static inline uint32_t readU24u(const void* p) noexcept {
uint32_t b0 = readU8(static_cast<const uint8_t*>(p) + (BO == ByteOrder::kLE ? 2 : 0));
uint32_t b1 = readU8(static_cast<const uint8_t*>(p) + (BO == ByteOrder::kLE ? 1 : 1));
uint32_t b2 = readU8(static_cast<const uint8_t*>(p) + (BO == ByteOrder::kLE ? 0 : 2));
uint32_t b0 = readU8(static_cast<const uint8_t*>(p) + (BO == ByteOrder::kLE ? 2u : 0u));
uint32_t b1 = readU8(static_cast<const uint8_t*>(p) + 1u);
uint32_t b2 = readU8(static_cast<const uint8_t*>(p) + (BO == ByteOrder::kLE ? 0u : 2u));
return (b0 << 16) | (b1 << 8) | b2;
}
@@ -1119,7 +1119,7 @@ static ASMJIT_INLINE_NODEBUG void writeI16aBE(void* p, int16_t x) noexcept { wri
template<ByteOrder BO = ByteOrder::kNative>
static inline void writeU24u(void* p, uint32_t v) noexcept {
static_cast<uint8_t*>(p)[0] = uint8_t((v >> (BO == ByteOrder::kLE ? 0 : 16)) & 0xFFu);
static_cast<uint8_t*>(p)[1] = uint8_t((v >> (BO == ByteOrder::kLE ? 8 : 8)) & 0xFFu);
static_cast<uint8_t*>(p)[1] = uint8_t((v >> 8) & 0xFFu);
static_cast<uint8_t*>(p)[2] = uint8_t((v >> (BO == ByteOrder::kLE ? 16 : 0)) & 0xFFu);
}

8
src/asmjit/core/zonevector.cpp
View File

@@ -52,7 +52,8 @@ Error ZoneVectorBase::_grow(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t
Error ZoneVectorBase::_reserve(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t n) noexcept {
uint32_t oldCapacity = _capacity;
if (oldCapacity >= n) return kErrorOk;
if (oldCapacity >= n)
return kErrorOk;
uint32_t nBytes = n * sizeOfT;
if (ASMJIT_UNLIKELY(nBytes < n))
@@ -65,11 +66,10 @@ Error ZoneVectorBase::_reserve(ZoneAllocator* allocator, uint32_t sizeOfT, uint3
return DebugUtils::errored(kErrorOutOfMemory);
void* oldData = _data;
if (_size)
if (oldData && _size) {
memcpy(newData, oldData, size_t(_size) * sizeOfT);
if (oldData)
allocator->release(oldData, size_t(oldCapacity) * sizeOfT);
}
_capacity = uint32_t(allocatedBytes / sizeOfT);
ASMJIT_ASSERT(_capacity >= n);

38
src/asmjit/x86/x86assembler.cpp
View File

@@ -991,13 +991,13 @@ CaseX86M_GPB_MulDiv:
goto EmitX86R;
// MOD/RM: Alternative encoding selected via instruction options.
opcode += 2;
opcode += 2u;
std::swap(opReg, rbReg);
goto EmitX86R;
}
if (isign3 == ENC_OPS2(Reg, Mem)) {
opcode += 2;
opcode += 2u;
opcode.addArithBySize(o0.x86RmSize());
opReg = o0.id();
@@ -1075,7 +1075,7 @@ CaseX86M_GPB_MulDiv:
goto EmitX86Op;
}
opcode += size != 1 ? (immSize != 1 ? 1 : 3) : 0;
opcode += size != 1 ? (immSize != 1 ? 1u : 3u) : 0u;
goto EmitX86R;
}
@@ -1095,7 +1095,7 @@ CaseX86M_GPB_MulDiv:
if (Support::isInt8(immValue) && !Support::test(options, InstOptions::kLongForm))
immSize = 1;
opcode += memSize != 1 ? (immSize != 1 ? 1 : 3) : 0;
opcode += memSize != 1 ? (immSize != 1 ? 1u : 3u) : 0u;
opcode.addPrefixBySize(memSize);
rmRel = &o0;
@@ -1251,7 +1251,7 @@ CaseX86M_GPB_MulDiv:
// This seems to be the only exception of encoding '66F2' prefix.
if (o1.x86RmSize() == 2) writer.emit8(0x66);
opcode += o1.x86RmSize() != 1;
opcode += uint32_t(o1.x86RmSize() != 1u);
goto EmitX86M;
}
break;
@@ -1379,7 +1379,7 @@ CaseX86M_GPB_MulDiv:
if (ASMJIT_UNLIKELY(o0.id() != Gp::kIdAx || o1.id() != Gp::kIdDx))
goto InvalidInstruction;
opcode += o0.x86RmSize() != 1;
opcode += uint32_t(o0.x86RmSize() != 1u);
opcode.add66hBySize(o0.x86RmSize());
goto EmitX86Op;
}
@@ -1395,7 +1395,7 @@ CaseX86M_GPB_MulDiv:
goto AmbiguousOperandSize;
rmRel = &o0;
opcode += (size != 1);
opcode += uint32_t(size != 1u);
opcode.add66hBySize(size);
goto EmitX86OpImplicitMem;
@@ -1552,7 +1552,7 @@ CaseX86M_GPB_MulDiv:
if (!Support::test(options, InstOptions::kX86_ModRM))
goto EmitX86R;
opcode += 2;
opcode += 2u;
std::swap(opReg, rbReg);
goto EmitX86R;
}
@@ -1563,7 +1563,7 @@ CaseX86M_GPB_MulDiv:
if (!Support::test(options, InstOptions::kX86_ModRM))
goto EmitX86R;
opcode += 2;
opcode += 2u;
std::swap(opReg, rbReg);
goto EmitX86R;
}
@@ -1652,7 +1652,7 @@ CaseX86M_GPB_MulDiv:
// Handle a special form of `mov al|ax|eax|rax, [ptr64]` that doesn't use MOD.
if (opReg == Gp::kIdAx && !rmRel->as<Mem>().hasBaseOrIndex()) {
if (x86ShouldUseMovabs(this, writer, o0.x86RmSize(), options, rmRel->as<Mem>())) {
opcode += 0xA0;
opcode += 0xA0u;
immValue = rmRel->as<Mem>().offset();
goto EmitX86OpMovAbs;
}
@@ -1661,7 +1661,7 @@ CaseX86M_GPB_MulDiv:
if (o0.x86RmSize() == 1)
FIXUP_GPB(o0, opReg);
opcode += 0x8A;
opcode += 0x8Au;
goto EmitX86M;
}
}
@@ -1685,7 +1685,7 @@ CaseX86M_GPB_MulDiv:
// Handle a special form of `mov [ptr64], al|ax|eax|rax` that doesn't use MOD.
if (opReg == Gp::kIdAx && !rmRel->as<Mem>().hasBaseOrIndex()) {
if (x86ShouldUseMovabs(this, writer, o1.x86RmSize(), options, rmRel->as<Mem>())) {
opcode += 0xA2;
opcode += 0xA2u;
immValue = rmRel->as<Mem>().offset();
goto EmitX86OpMovAbs;
}
@@ -1694,7 +1694,7 @@ CaseX86M_GPB_MulDiv:
if (o1.x86RmSize() == 1)
FIXUP_GPB(o1, opReg);
opcode += 0x88;
opcode += 0x88u;
goto EmitX86M;
}
}
@@ -1995,7 +1995,7 @@ CaseX86PushPop_Gp:
if (ASMJIT_UNLIKELY(o1.id() != Gp::kIdCx))
goto InvalidInstruction;
opcode += 2;
opcode += 2u;
goto EmitX86R;
}
@@ -2020,7 +2020,7 @@ CaseX86PushPop_Gp:
if (ASMJIT_UNLIKELY(o1.id() != Gp::kIdCx))
goto InvalidInstruction;
opcode += 2;
opcode += 2u;
rmRel = &o0;
goto EmitX86M;
}
@@ -2390,7 +2390,7 @@ CaseFpuArith_Mem:
}
if (o0.x86RmSize() == 8 && commonInfo->hasFlag(InstDB::InstFlags::kFpuM64)) {
opcode += 4;
opcode += 4u;
goto EmitX86M;
}
@@ -2415,7 +2415,7 @@ CaseFpuArith_Mem:
rmRel = &o0;
if (o0.x86RmSize() == 2 && commonInfo->hasFlag(InstDB::InstFlags::kFpuM16)) {
opcode += 4;
opcode += 4u;
goto EmitX86M;
}
@@ -2433,7 +2433,7 @@ CaseFpuArith_Mem:
case InstDB::kEncodingFpuRDef:
if (isign3 == 0) {
opcode += 1;
opcode += 1u;
goto EmitFpuOp;
}
ASMJIT_FALLTHROUGH;
@@ -2621,7 +2621,7 @@ CaseExtMovd:
if (!Support::test(options, InstOptions::kX86_ModMR))
goto EmitX86R;
opcode += 0x10;
opcode += 0x10u;
std::swap(opReg, rbReg);
goto EmitX86R;
}

4
src/asmjit/x86/x86formatter.cpp
View File

@@ -617,8 +617,8 @@ ASMJIT_FAVOR_SIZE static Error FormatterInternal_explainConst(
static const char vpcmpx[] = "EQ\0" "LT\0" "LE\0" "FALSE\0" "NEQ\0" "GE\0" "GT\0" "TRUE\0";
static const char vpcomx[] = "LT\0" "LE\0" "GT\0" "GE\0" "EQ\0" "NEQ\0" "FALSE\0" "TRUE\0";
static const char vshufpd[] = "A0\0A1\0B0\0B1\0A2\0A3\0B2\0B3\0A4\0A5\0B4\0B5\0A6\0A7\0B6\0B7\0";
static const char vshufps[] = "A0\0A1\0A2\0A3\0A0\0A1\0A2\0A3\0B0\0B1\0B2\0B3\0B0\0B1\0B2\0B3\0";
static const char vshufpd[] = "A0\0" "A1\0" "B0\0" "B1\0" "A2\0" "A3\0" "B2\0" "B3\0" "A4\0" "A5\0" "B4\0" "B5\0" "A6\0" "A7\0" "B6\0" "B7\0";
static const char vshufps[] = "A0\0" "A1\0" "A2\0" "A3\0" "A0\0" "A1\0" "A2\0" "A3\0" "B0\0" "B1\0" "B2\0" "B3\0" "B0\0" "B1\0" "B2\0" "B3\0";
static const ImmBits vfpclassxx[] = {
{ 0x07u, 0, ImmBits::kModeLookup, "QNAN\0" "+0\0" "-0\0" "+INF\0" "-INF\0" "DENORMAL\0" "-FINITE\0" "SNAN\0" }

2
src/asmjit/x86/x86instapi.cpp
View File

@@ -919,7 +919,7 @@ Error InstInternal::queryRWInfo(Arch arch, const BaseInst& inst, const Operand_*
}
}
rmOpsMask &= instRmInfo.rmOpsMask;
rmOpsMask &= uint32_t(instRmInfo.rmOpsMask);
if (rmOpsMask && !inst.hasOption(InstOptions::kX86_ER)) {
Support::BitWordIterator<uint32_t> it(rmOpsMask);
do {