mirror of
https://github.com/asmjit/asmjit.git
synced 2025-12-17 20:44:37 +03:00
Fixed pextrw SSE instruction, added a possibility to Compiler to handle non-initialized variables in alloc(), spill(), ...
This commit is contained in:
@@ -717,9 +717,9 @@ static void opcode(asmjit::X86Assembler& a) {
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a.andnps(xmm0, ptr_gp0);
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a.andps(xmm0, xmm7);
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a.andps(xmm0, ptr_gp0);
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a.cmpps(xmm0, xmm0, 0);
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a.cmpps(xmm0, xmm7, 0);
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a.cmpps(xmm0, ptr_gp0, 0);
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a.cmpss(xmm0, xmm0, 0);
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a.cmpss(xmm0, xmm7, 0);
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a.cmpss(xmm0, ptr_gp0, 0);
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a.comiss(xmm0, xmm7);
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a.comiss(xmm0, ptr_gp0);
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@@ -813,7 +813,7 @@ static void opcode(asmjit::X86Assembler& a) {
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a.rsqrtss(xmm0, xmm7);
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a.rsqrtss(xmm0, ptr_gp0);
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a.sfence();
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a.shufps(xmm0, xmm0, 0);
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a.shufps(xmm0, xmm7, 0);
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a.shufps(xmm0, ptr_gp0, 0);
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a.sqrtps(xmm0, xmm7);
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a.sqrtps(xmm0, ptr_gp0);
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@@ -845,9 +845,9 @@ static void opcode(asmjit::X86Assembler& a) {
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a.andpd(xmm0, xmm7);
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a.andpd(xmm0, ptr_gp0);
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a.clflush(ptr_gp0);
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a.cmppd(xmm0, xmm0, 0);
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a.cmppd(xmm0, xmm7, 0);
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a.cmppd(xmm0, ptr_gp0, 0);
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a.cmpsd(xmm0, xmm0, 0);
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a.cmpsd(xmm0, xmm7, 0);
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a.cmpsd(xmm0, ptr_gp0, 0);
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a.comisd(xmm0, xmm7);
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a.comisd(xmm0, ptr_gp0);
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@@ -1024,11 +1024,11 @@ static void opcode(asmjit::X86Assembler& a) {
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a.psubq(xmm0, ptr_gp0);
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a.pmaddwd(xmm0, xmm7);
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a.pmaddwd(xmm0, ptr_gp0);
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a.pshufd(xmm0, xmm0, 0);
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a.pshufd(xmm0, xmm7, 0);
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a.pshufd(xmm0, ptr_gp0, 0);
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a.pshufhw(xmm0, xmm0, 0);
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a.pshufhw(xmm0, xmm7, 0);
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a.pshufhw(xmm0, ptr_gp0, 0);
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a.pshuflw(xmm0, xmm0, 0);
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a.pshuflw(xmm0, xmm7, 0);
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a.pshuflw(xmm0, ptr_gp0, 0);
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a.psrld(xmm0, xmm7);
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a.psrld(xmm0, ptr_gp0);
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@@ -1174,47 +1174,47 @@ static void opcode(asmjit::X86Assembler& a) {
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a.pshufb(xmm0, ptr_gp0);
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a.palignr(mm0, mm7, 0);
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a.palignr(mm0, ptr_gp0, 0);
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a.palignr(xmm0, xmm0, 0);
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a.palignr(xmm0, xmm7, 0);
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a.palignr(xmm0, ptr_gp0, 0);
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// SSE4.1.
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a.nop();
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a.blendpd(xmm0, xmm0, 0);
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a.blendpd(xmm0, xmm7, 0);
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a.blendpd(xmm0, ptr_gp0, 0);
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a.blendps(xmm0, xmm0, 0);
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a.blendps(xmm0, xmm7, 0);
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a.blendps(xmm0, ptr_gp0, 0);
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a.blendvpd(xmm0, xmm7);
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a.blendvpd(xmm0, ptr_gp0);
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a.blendvps(xmm0, xmm7);
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a.blendvps(xmm0, ptr_gp0);
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a.dppd(xmm0, xmm0, 0);
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a.dppd(xmm0, xmm7, 0);
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a.dppd(xmm0, ptr_gp0, 0);
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a.dpps(xmm0, xmm0, 0);
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a.dpps(xmm0, xmm7, 0);
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a.dpps(xmm0, ptr_gp0, 0);
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a.extractps(gp0, xmm0, 0);
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a.extractps(ptr_gp0, xmm0, 0);
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a.extractps(gp0, xmm7, 0);
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a.extractps(ptr_gp0, xmm7, 0);
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a.insertps(xmm0, xmm1, 0);
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a.insertps(xmm0, ptr_gp0, 0);
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a.movntdqa(xmm0, ptr_gp0);
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a.mpsadbw(xmm0, xmm0, 0);
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a.mpsadbw(xmm0, xmm7, 0);
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a.mpsadbw(xmm0, ptr_gp0, 0);
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a.packusdw(xmm0, xmm7);
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a.packusdw(xmm0, ptr_gp0);
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a.pblendvb(xmm0, xmm7);
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a.pblendvb(xmm0, ptr_gp0);
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a.pblendw(xmm0, xmm0, 0);
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a.pblendw(xmm0, xmm7, 0);
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a.pblendw(xmm0, ptr_gp0, 0);
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a.pcmpeqq(xmm0, xmm7);
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a.pcmpeqq(xmm0, ptr_gp0);
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a.pextrb(gp0, xmm0, 0);
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a.pextrb(ptr_gp0, xmm0, 0);
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a.pextrb(ptr_gp0, xmm7, 0);
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a.pextrd(gp0, xmm0, 0);
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a.pextrd(ptr_gp0, xmm0, 0);
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a.pextrd(ptr_gp0, xmm7, 0);
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a.pextrq(gp0, xmm0, 0);
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a.pextrq(ptr_gp0, xmm0, 0);
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a.pextrq(ptr_gp0, xmm7, 0);
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a.pextrw(gp0, xmm0, 0);
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a.pextrw(ptr_gp0, xmm0, 0);
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a.pextrw(ptr_gp0, xmm7, 0);
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a.phminposuw(xmm0, xmm7);
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a.phminposuw(xmm0, ptr_gp0);
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a.pinsrb(xmm0, eax, 0);
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@@ -1269,25 +1269,25 @@ static void opcode(asmjit::X86Assembler& a) {
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a.pmulld(xmm0, ptr_gp0);
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a.ptest(xmm0, xmm7);
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a.ptest(xmm0, ptr_gp0);
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a.roundps(xmm0, xmm0, 0);
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a.roundps(xmm0, xmm7, 0);
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a.roundps(xmm0, ptr_gp0, 0);
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a.roundss(xmm0, xmm0, 0);
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a.roundss(xmm0, xmm7, 0);
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a.roundss(xmm0, ptr_gp0, 0);
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a.roundpd(xmm0, xmm0, 0);
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a.roundpd(xmm0, xmm7, 0);
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a.roundpd(xmm0, ptr_gp0, 0);
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a.roundsd(xmm0, xmm0, 0);
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a.roundsd(xmm0, xmm7, 0);
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a.roundsd(xmm0, ptr_gp0, 0);
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// SSE4.2.
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a.nop();
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a.pcmpestri(xmm0, xmm0, 0);
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a.pcmpestri(xmm0, xmm7, 0);
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a.pcmpestri(xmm0, ptr_gp0, 0);
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a.pcmpestrm(xmm0, xmm0, 0);
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a.pcmpestrm(xmm0, xmm7, 0);
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a.pcmpestrm(xmm0, ptr_gp0, 0);
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a.pcmpistri(xmm0, xmm0, 0);
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a.pcmpistri(xmm0, xmm7, 0);
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a.pcmpistri(xmm0, ptr_gp0, 0);
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a.pcmpistrm(xmm0, xmm0, 0);
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a.pcmpistrm(xmm0, xmm7, 0);
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a.pcmpistrm(xmm0, ptr_gp0, 0);
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a.pcmpgtq(xmm0, xmm7);
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a.pcmpgtq(xmm0, ptr_gp0);
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@@ -1299,8 +1299,8 @@ static void opcode(asmjit::X86Assembler& a) {
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a.extrq(xmm0, 0x1, 0x2);
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a.insertq(xmm0, xmm1);
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a.insertq(xmm0, xmm1, 0x1, 0x2);
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a.movntsd(ptr_gp0, xmm0);
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a.movntss(ptr_gp0, xmm0);
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a.movntsd(ptr_gp0, xmm7);
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a.movntss(ptr_gp0, xmm7);
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// POPCNT.
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a.nop();
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@@ -1473,7 +1473,7 @@ static void opcode(asmjit::X86Assembler& a) {
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a.vdpps(xmm0, xmm1, ptr_gp0, 0);
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a.vdpps(ymm0, ymm1, ymm2, 0);
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a.vdpps(ymm0, ymm1, ptr_gp0, 0);
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a.vextractf128(xmm0, ymm0, 0);
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a.vextractf128(xmm0, ymm1, 0);
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a.vextractf128(ptr_gp0, ymm1, 0);
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a.vextractps(gp0, xmm1, 0);
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a.vextractps(ptr_gp0, xmm1, 0);
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@@ -6,7 +6,7 @@
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// [Dependencies - AsmJit]
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#if !defined(_ASMJIT_BUILD_H)
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#include "build.h"
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#include "./build.h"
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#endif // !_ASMJIT_BUILD_H
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// [Guard]
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@@ -39,7 +39,7 @@
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// ============================================================================
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#if defined(_MSC_VER)
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// Disable some warnings we know about
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# pragma warning(push)
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# pragma warning(disable: 4127) // conditional expression is constant
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# pragma warning(disable: 4201) // nameless struct/union
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@@ -53,7 +53,8 @@
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# pragma warning(disable: 4480) // specifying underlying type for enum
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# pragma warning(disable: 4800) // forcing value to bool 'true' or 'false'
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// Rename symbols.
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// TODO: Check if these defins are needed and for which version of MSC. There are
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// news about these as they are part of C99.
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# if !defined(vsnprintf)
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# define ASMJIT_UNDEF_VSNPRINTF
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# define vsnprintf _vsnprintf
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@@ -62,6 +63,7 @@
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# define ASMJIT_UNDEF_SNPRINTF
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# define snprintf _snprintf
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# endif // !snprintf
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#endif // _MSC_VER
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// ============================================================================
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@@ -82,7 +82,7 @@ ASMJIT_ENUM(InstOptions) {
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//! \internal
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//!
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//! Data structure used to link linked-labels.
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//! Data structure used to link labels.
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struct LabelLink {
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//! Previous link.
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LabelLink* prev;
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@@ -129,11 +129,9 @@ struct RelocData {
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//! Size of relocation (4 or 8 bytes).
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uint32_t size;
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//! Offset from code begin address.
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//! Offset from the initial code address.
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Ptr from;
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//! Relative displacement from code begin address (not to `offset`) or
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//! absolute address.
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//! Relative displacement from the initial code address or from the absolute address.
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Ptr data;
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};
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@@ -337,7 +335,6 @@ struct ASMJIT_VCLASS Assembler : public CodeGen {
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ASMJIT_INLINE bool isLabelValid(const Label& label) const {
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return isLabelValid(label.getId());
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}
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//! \overload
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ASMJIT_INLINE bool isLabelValid(uint32_t id) const {
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return static_cast<size_t>(id) < _labelList.getLength();
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@@ -352,7 +349,6 @@ struct ASMJIT_VCLASS Assembler : public CodeGen {
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ASMJIT_INLINE bool isLabelBound(const Label& label) const {
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return isLabelBound(label.getId());
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}
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//! \overload
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ASMJIT_INLINE bool isLabelBound(uint32_t id) const {
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ASMJIT_ASSERT(isLabelValid(id));
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@@ -364,7 +360,6 @@ struct ASMJIT_VCLASS Assembler : public CodeGen {
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ASMJIT_INLINE intptr_t getLabelOffset(const Label& label) const {
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return getLabelOffset(label.getId());
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}
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//! \overload
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ASMJIT_INLINE intptr_t getLabelOffset(uint32_t id) const {
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ASMJIT_ASSERT(isLabelValid(id));
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@@ -375,7 +370,6 @@ struct ASMJIT_VCLASS Assembler : public CodeGen {
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ASMJIT_INLINE LabelData* getLabelData(const Label& label) const {
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return getLabelData(label.getId());
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}
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//! \overload
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ASMJIT_INLINE LabelData* getLabelData(uint32_t id) const {
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ASMJIT_ASSERT(isLabelValid(id));
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@@ -535,9 +529,8 @@ struct ASMJIT_VCLASS Assembler : public CodeGen {
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// [Defined-Later]
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// ============================================================================
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ASMJIT_INLINE Label::Label(Assembler& a) : Operand(NoInit) {
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a._newLabel(this);
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}
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ASMJIT_INLINE Label::Label(Assembler& a)
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: Operand(NoInit) { a._newLabel(this); }
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} // asmjit namespace
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@@ -512,26 +512,38 @@ _NoMemory:
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}
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void Compiler::alloc(Var& var) {
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if (var.getId() == kInvalidValue)
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return;
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addHint(var, kVarHintAlloc, kInvalidValue);
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}
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void Compiler::alloc(Var& var, uint32_t regIndex) {
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if (var.getId() == kInvalidValue)
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return;
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addHint(var, kVarHintAlloc, regIndex);
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}
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void Compiler::alloc(Var& var, const Reg& reg) {
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if (var.getId() == kInvalidValue)
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return;
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addHint(var, kVarHintAlloc, reg.getRegIndex());
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}
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void Compiler::save(Var& var) {
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if (var.getId() == kInvalidValue)
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return;
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addHint(var, kVarHintSave, kInvalidValue);
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}
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void Compiler::spill(Var& var) {
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if (var.getId() == kInvalidValue)
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return;
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addHint(var, kVarHintSpill, kInvalidValue);
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}
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void Compiler::unuse(Var& var) {
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if (var.getId() == kInvalidValue)
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return;
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addHint(var, kVarHintUnuse, kInvalidValue);
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}
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@@ -235,9 +235,11 @@ ASMJIT_ENUM(kVarState) {
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//! - `X86FuncConv` - X86/X64 calling conventions.
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ASMJIT_ENUM(FuncConv) {
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//! Calling convention is invalid (can't be used).
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kFuncConvNone = 0,
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kFuncConvNone = 0
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#if defined(ASMJIT_DOCGEN)
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,
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//! Default calling convention for current platform / operating system.
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kFuncConvHost = DependsOnHost,
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@@ -276,7 +278,7 @@ ASMJIT_ENUM(FuncHint) {
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//! X86/X64 Specific
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//! ----------------
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//!
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//! Standard prolog sequence is:
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//! Common prolog sequence is:
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//!
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//! ~~~
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//! push zbp
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@@ -290,7 +292,7 @@ ASMJIT_ENUM(FuncHint) {
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//! enter StackAdjustment, 0
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//! ~~~
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//!
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//! Standard epilog sequence is:
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//! Common epilog sequence is:
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//!
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//! ~~~
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//! mov zsp, zbp
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@@ -2968,42 +2970,6 @@ struct ASMJIT_VCLASS Compiler : public CodeGen {
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//! Unuse variable `var`.
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ASMJIT_API void unuse(Var& var);
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//! Alloc variable `var` (if initialized), but only if it's initialized.
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ASMJIT_INLINE void allocUnsafe(Var& var) {
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if (var.isInitialized())
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alloc(var);
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}
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//! Alloc variable `var` (if initialized) using `regIndex` as a register index
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ASMJIT_INLINE void allocUnsafe(Var& var, uint32_t regIndex) {
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if (var.isInitialized())
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alloc(var, regIndex);
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}
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//! Alloc variable `var` (if initialized) using `reg` as a register operand.
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ASMJIT_INLINE void allocUnsafe(Var& var, const Reg& reg) {
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if (var.isInitialized())
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alloc(var, reg);
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}
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//! Spill variable `var` (if initialized).
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ASMJIT_INLINE void spillUnsafe(Var& var) {
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if (var.isInitialized())
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spill(var);
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}
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//! Save variable `var` (if initialized) if the status is `modified` at this point.
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ASMJIT_INLINE void saveUnsafe(Var& var) {
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if (var.isInitialized())
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save(var);
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}
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//! Unuse variable `var` (if initialized).
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ASMJIT_INLINE void unuseUnsafe(Var& var) {
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if (var.isInitialized())
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unuse(var);
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}
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//! Get priority of variable `var`.
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ASMJIT_API uint32_t getPriority(Var& var) const;
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//! Set priority of variable `var` to `priority`.
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@@ -1078,8 +1078,9 @@ static ASMJIT_INLINE Imm imm_u(uint64_t val) {
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return Imm(static_cast<int64_t>(val));
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}
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//! Create void* pointer immediate value operand.
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static ASMJIT_INLINE Imm imm_ptr(void* p) {
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//! Create a `void*` immediate value operand.
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template<typename T>
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static ASMJIT_INLINE Imm imm_ptr(T p) {
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return Imm(static_cast<int64_t>((intptr_t)p));
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}
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||||
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@@ -1176,12 +1176,12 @@ static void VMemTest_stats(VMemMgr& memmgr) {
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INFO("Allocated: %u", static_cast<unsigned int>(memmgr.getAllocatedBytes()));
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}
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||||
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||||
static void VMemTest_shuffle(void **a, void **b, size_t count) {
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||||
static void VMemTest_shuffle(void** a, void** b, size_t count) {
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for (size_t i = 0; i < count; ++i) {
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size_t si = (size_t)rand() % count;
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||||
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||||
void *ta = a[i];
|
||||
void *tb = b[i];
|
||||
void* ta = a[i];
|
||||
void* tb = b[i];
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a[i] = a[si];
|
||||
b[i] = b[si];
|
||||
|
||||
@@ -244,7 +244,7 @@
|
||||
#endif
|
||||
|
||||
// ============================================================================
|
||||
// [asmjit::Build - BLEND_OFFSET_OF]
|
||||
// [asmjit::Build - ASMJIT_OFFSET_OF]
|
||||
// ============================================================================
|
||||
|
||||
//! Cross-platform solution to get offset of `_Field_` in `_Struct_`.
|
||||
|
||||
@@ -2289,6 +2289,32 @@ _EmitFpArith_Mem:
|
||||
}
|
||||
break;
|
||||
|
||||
case kX86InstEncodingIdExtExtrW:
|
||||
if (encoded == ENC_OPS(Reg, Reg, Imm)) {
|
||||
ADD_66H_P(static_cast<const X86Reg*>(o1)->isXmm());
|
||||
|
||||
imVal = static_cast<const Imm*>(o2)->getInt64();
|
||||
imLen = 1;
|
||||
|
||||
opReg = x86OpReg(o0);
|
||||
rmReg = x86OpReg(o1);
|
||||
goto _EmitX86R;
|
||||
}
|
||||
|
||||
if (encoded == ENC_OPS(Mem, Reg, Imm)) {
|
||||
// Secondary opcode of 'pextrw' instruction (SSE4.1).
|
||||
opCode = extendedInfo.getSecondaryOpCode();
|
||||
ADD_66H_P(static_cast<const X86Reg*>(o1)->isXmm());
|
||||
|
||||
imVal = static_cast<const Imm*>(o2)->getInt64();
|
||||
imLen = 1;
|
||||
|
||||
opReg = x86OpReg(o1);
|
||||
rmMem = x86OpMem(o0);
|
||||
goto _EmitX86M;
|
||||
}
|
||||
break;
|
||||
|
||||
case kX86InstEncodingIdExtExtract:
|
||||
if (encoded == ENC_OPS(Reg, Reg, Imm)) {
|
||||
ADD_66H_P(static_cast<const X86Reg*>(o1)->isXmm());
|
||||
@@ -2302,8 +2328,6 @@ _EmitFpArith_Mem:
|
||||
}
|
||||
|
||||
if (encoded == ENC_OPS(Mem, Reg, Imm)) {
|
||||
// Secondary opcode for 'pextrw' instruction (SSE2).
|
||||
opCode = extendedInfo.getSecondaryOpCode();
|
||||
ADD_66H_P(static_cast<const X86Reg*>(o1)->isXmm());
|
||||
|
||||
imVal = static_cast<const Imm*>(o2)->getInt64();
|
||||
|
||||
@@ -2369,12 +2369,12 @@ struct ASMJIT_VCLASS X86Assembler : public Assembler {
|
||||
//! \overload
|
||||
INST_2x(comisd, kX86InstIdComisd, X86XmmReg, X86Mem)
|
||||
|
||||
//! Convert packed QWORDs to packed DP-FP (SSE2).
|
||||
//! Convert packed DWORDs to packed DP-FP (SSE2).
|
||||
INST_2x(cvtdq2pd, kX86InstIdCvtdq2pd, X86XmmReg, X86XmmReg)
|
||||
//! \overload
|
||||
INST_2x(cvtdq2pd, kX86InstIdCvtdq2pd, X86XmmReg, X86Mem)
|
||||
|
||||
//! Convert packed QWORDs to packed SP-FP (SSE2).
|
||||
//! Convert packed DWORDs to packed SP-FP (SSE2).
|
||||
INST_2x(cvtdq2ps, kX86InstIdCvtdq2ps, X86XmmReg, X86XmmReg)
|
||||
//! \overload
|
||||
INST_2x(cvtdq2ps, kX86InstIdCvtdq2ps, X86XmmReg, X86Mem)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1318,7 +1318,9 @@ ASMJIT_ENUM(X86InstEncodingId) {
|
||||
kX86InstEncodingIdExtRmi_P,
|
||||
//! Crc32.
|
||||
kX86InstEncodingIdExtCrc,
|
||||
//! Pextrb/Pextrw/Pextrd/Pextrq/Extractps.
|
||||
//! Pextrw.
|
||||
kX86InstEncodingIdExtExtrW,
|
||||
//! Pextrb/Pextrd/Pextrq/Extractps.
|
||||
kX86InstEncodingIdExtExtract,
|
||||
//! Lfence/Mfence/Sfence.
|
||||
kX86InstEncodingIdExtFence,
|
||||
|
||||
Reference in New Issue
Block a user