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lesson 19, IRQs
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19-interrupts-irqs/README.md
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19-interrupts-irqs/README.md
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*Concepts you may want to Google beforehand: IRQs, PIC, polling*
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**Goal: Finish the interrupts implementation and CPU timer**
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Remap the PIC
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-------------
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When the CPU boots, the PIC maps IRQs 0-7 to INT 0x8-0xF
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and IRQs 8-15 to INT 0x70-0x77. This conflicts with the ISRs
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we programmed last lesson. Since we programmed ISRs 0-31,
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it is standard to remap the IRQs to ISRs 32-47.
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The PICs are communicated with via I/O ports (see lesson 15).
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The Master PIC has command 0x20 and data 0x21, while the slave has
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command 0xA0 and data 0xA1.
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The code for remapping the PICs is obfuscated, so check
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[this article](http://www.osdev.org/wiki/PIC) if you're curious.
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Otherwise, just look at `cpu/isr.c`, new code after we set the IDT
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gates for the ISRs. After that, we add the IDT gates for IRQs.
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Now we jump to assembler, at `interrupt.asm`. The first task is to
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add global definitions for the IRQ symbols we just used in the C code.
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Look at the end of the `global` statements.
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Then, add the IRQ handlers. Same `interrupt.asm`, at the bottom. Notice
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how they jump to a new common stub: `irq_common_stub` (next step)
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We then create this `irq_common_stub` which is very similar to the ISR one.
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It is located at the top of `interrupt.asm`, and it also defines
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a new `[extern irq_handler]`
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Now back to C code.
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- Write the `irq_handler` in C:
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