mirror of
https://github.com/asmjit/asmjit.git
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cdc4eacbb1
* Renamed round to round_even
* Added round_half_up intrinsic
* Added floating-point mod
* Added a scalar version of floating-point abs and neg
* Added a behavior enum to specify how float to int conversion
handles out-of-range and NaN cases
* Updated some APX stuff in instruction database
73 lines
2.1 KiB
C++
73 lines
2.1 KiB
C++
// This file is part of AsmJit project <https://asmjit.com>
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//
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// See <asmjit/core.h> or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#include <asmjit/ujit.h>
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#if defined(ASMJIT_UJIT_X86)
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#if defined(_MSC_VER)
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#include <intrin.h>
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#else
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#include <emmintrin.h>
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#endif
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namespace UniCompilerTests {
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// A reference implementation of MUL+ADD without the use of FMA. This has to be provided otherwise the
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// compiler may use FPU registers in 32-bit x86 case, which would make the result different than when
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// compiled by JIT compiler that would use XMM registers (32/64-bit SSE/AVX operations).
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float fadd(float a, float b) noexcept {
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return _mm_cvtss_f32(_mm_add_ss(_mm_set1_ps(a), _mm_set1_ps(b)));
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}
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float fsub(float a, float b) noexcept {
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return _mm_cvtss_f32(_mm_sub_ss(_mm_set1_ps(a), _mm_set1_ps(b)));
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}
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float fmul(float a, float b) noexcept {
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return _mm_cvtss_f32(_mm_mul_ss(_mm_set1_ps(a), _mm_set1_ps(b)));
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}
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float fdiv(float a, float b) noexcept {
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return _mm_cvtss_f32(_mm_div_ss(_mm_set1_ps(a), _mm_set1_ps(b)));
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}
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float fsqrt(float a) noexcept {
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return _mm_cvtss_f32(_mm_sqrt_ss(_mm_set1_ps(a)));
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}
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float fmadd_nofma_ref(float a, float b, float c) noexcept {
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return _mm_cvtss_f32(_mm_add_ss(_mm_mul_ss(_mm_set1_ps(a), _mm_set1_ps(b)), _mm_set1_ps(c)));
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}
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double fadd(double a, double b) noexcept {
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return _mm_cvtsd_f64(_mm_add_sd(_mm_set1_pd(a), _mm_set1_pd(b)));
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}
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double fsub(double a, double b) noexcept {
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return _mm_cvtsd_f64(_mm_sub_sd(_mm_set1_pd(a), _mm_set1_pd(b)));
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}
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double fmul(double a, double b) noexcept {
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return _mm_cvtsd_f64(_mm_mul_sd(_mm_set1_pd(a), _mm_set1_pd(b)));
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}
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double fdiv(double a, double b) noexcept {
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return _mm_cvtsd_f64(_mm_div_sd(_mm_set1_pd(a), _mm_set1_pd(b)));
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}
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double fsqrt(double a) noexcept {
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return _mm_cvtsd_f64(_mm_sqrt_sd(_mm_setzero_pd(), _mm_set1_pd(a)));
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}
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double fmadd_nofma_ref(double a, double b, double c) noexcept {
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return _mm_cvtsd_f64(_mm_add_sd(_mm_mul_sd(_mm_set1_pd(a), _mm_set1_pd(b)), _mm_set1_pd(c)));
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}
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} // {UniCompilerTests}
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#endif // ASMJIT_UJIT_X86
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