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* Denested src folder to root, renamed testing to asmjit-testing
* Refactored how headers are included into <asmjit/...> form. This
is necessary as compilers would never simplify a path once a ..
appears in include directory - then paths such as ../core/../core
appeared in asserts, which was ugly
* Moved support utilities into asmjit/support/... (still included
by asmjit/core.h for convenience and compatibility)
* Added CMakePresets.json for making it easy to develop AsmJit
* Reworked CMakeLists to be shorter and use CMake option(),
etc... This simplifies it and makes it using more standard
features
* ASMJIT_EMBED now creates asmjit_embed INTERFACE library,
which is accessible via asmjit::asmjit target - this simplifies
embedding and makes it the same as library targets from a CMake
perspective
* Removed ASMJIT_DEPS - this is now provided by cmake target
aliases - 'asmjit::asmjit' so users should not need this variable
* Changed meaning of ASMJIT_LIBS - this now contains only AsmJit
dependencies without asmjit::asmjit target alias. Don't rely on
ASMJIT_LIBS anymore as it's only used internally
* Removed ASMJIT_NO_DEPRECATED option - AsmJit is not going
to provide controllable deprecations in the future
* Removed ASMJIT_NO_VALIDATION in favor of ASMJIT_NO_INTROSPECTION,
which now controls query, features, and validation API presence
* Removed ASMJIT_DIR option - it was never really needed
* Removed AMX_TRANSPOSE feature from instruction database (X86).
Intel has removed it as well, so it's a feature that won't
be siliconized
207 lines
6.6 KiB
C++
207 lines
6.6 KiB
C++
// This file is part of AsmJit project <https://asmjit.com>
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//
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// See <asmjit/core.h> or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#include <asmjit/core.h>
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#if !defined(ASMJIT_NO_X86)
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#include <asmjit/x86.h>
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#endif
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#include <stdio.h>
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#include <asmjit-testing/commons/asmjitutils.h>
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using namespace asmjit;
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static void print_app_info() noexcept {
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printf("AsmJit Instruction Info Test Suite v%u.%u.%u [Arch=%s] [Mode=%s]\n\n",
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unsigned((ASMJIT_LIBRARY_VERSION >> 16) ),
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unsigned((ASMJIT_LIBRARY_VERSION >> 8) & 0xFF),
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unsigned((ASMJIT_LIBRARY_VERSION ) & 0xFF),
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asmjit_arch_as_string(Arch::kHost),
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asmjit_build_type()
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);
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}
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namespace {
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#if !defined(ASMJIT_NO_X86)
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static char access_letter(bool r, bool w) noexcept {
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return r && w ? 'X' : r ? 'R' : w ? 'W' : '_';
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}
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static void print_info(Arch arch, const BaseInst& inst, const Operand_* operands, size_t op_count) {
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StringTmp<512> sb;
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// Read & Write Information
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// ------------------------
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InstRWInfo rw;
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InstAPI::query_rw_info(arch, inst, operands, op_count, &rw);
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#ifndef ASMJIT_NO_LOGGING
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Formatter::format_instruction(sb, FormatFlags::kNone, nullptr, arch, inst, Span(operands, op_count));
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#else
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sb.append("<Logging-Not-Available>");
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#endif
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sb.append("\n");
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sb.append(" Operands:\n");
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for (uint32_t i = 0; i < rw.op_count(); i++) {
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const OpRWInfo& op = rw.operand(i);
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sb.append_format(" [%u] Op=%c Read=%016llX Write=%016llX Extend=%016llX",
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i,
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access_letter(op.is_read(), op.is_write()),
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op.read_byte_mask(),
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op.write_byte_mask(),
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op.extend_byte_mask());
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if (op.is_mem_base_used()) {
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sb.append_format(" Base=%c", access_letter(op.is_mem_base_read(), op.is_mem_base_write()));
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if (op.is_mem_base_pre_modify())
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sb.append_format(" <PRE>");
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if (op.is_mem_base_post_modify())
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sb.append_format(" <POST>");
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}
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if (op.is_mem_index_used()) {
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sb.append_format(" Index=%c", access_letter(op.is_mem_index_read(), op.is_mem_index_write()));
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}
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sb.append("\n");
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}
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// CPU Flags (Read/Write)
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// ----------------------
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if ((rw.read_flags() | rw.write_flags()) != CpuRWFlags::kNone) {
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sb.append(" Flags: \n");
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struct FlagMap {
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CpuRWFlags flag;
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char name[4];
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};
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static const FlagMap flag_map_table[] = {
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{ CpuRWFlags::kX86_CF, "CF" },
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{ CpuRWFlags::kX86_OF, "OF" },
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{ CpuRWFlags::kX86_SF, "SF" },
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{ CpuRWFlags::kX86_ZF, "ZF" },
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{ CpuRWFlags::kX86_AF, "AF" },
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{ CpuRWFlags::kX86_PF, "PF" },
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{ CpuRWFlags::kX86_DF, "DF" },
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{ CpuRWFlags::kX86_IF, "IF" },
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{ CpuRWFlags::kX86_AC, "AC" },
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{ CpuRWFlags::kX86_C0, "C0" },
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{ CpuRWFlags::kX86_C1, "C1" },
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{ CpuRWFlags::kX86_C2, "C2" },
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{ CpuRWFlags::kX86_C3, "C3" }
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};
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sb.append(" ");
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for (uint32_t f = 0; f < 13; f++) {
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char c = access_letter((rw.read_flags() & flag_map_table[f].flag) != CpuRWFlags::kNone,
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(rw.write_flags() & flag_map_table[f].flag) != CpuRWFlags::kNone);
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if (c != '_')
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sb.append_format("%s=%c ", flag_map_table[f].name, c);
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}
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sb.append("\n");
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}
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// CPU Features
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// ------------
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CpuFeatures features;
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InstAPI::query_features(arch, inst, operands, op_count, &features);
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#ifndef ASMJIT_NO_LOGGING
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if (!features.is_empty()) {
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sb.append(" Features:\n");
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sb.append(" ");
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bool first = true;
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CpuFeatures::Iterator it(features.iterator());
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while (it.has_next()) {
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uint32_t feature_id = uint32_t(it.next());
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if (!first)
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sb.append(" & ");
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Formatter::format_feature(sb, arch, feature_id);
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first = false;
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}
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sb.append("\n");
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}
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#endif
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printf("%s\n", sb.data());
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}
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template<typename... Args>
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static void print_info_simple(Arch arch,InstId inst_id, InstOptions options, Args&&... args) {
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BaseInst inst(inst_id);
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inst.add_options(options);
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Operand_ op_array[] = { std::forward<Args>(args)... };
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print_info(arch, inst, op_array, sizeof...(args));
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}
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template<typename... Args>
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static void print_info_extra(Arch arch, InstId inst_id, InstOptions options, const Reg& extra_reg, Args&&... args) {
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BaseInst inst(inst_id);
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inst.add_options(options);
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inst.set_extra_reg(extra_reg);
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Operand_ op_array[] = { std::forward<Args>(args)... };
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print_info(arch, inst, op_array, sizeof...(args));
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}
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#endif // !ASMJIT_NO_X86
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static void test_x86_arch() {
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#if !defined(ASMJIT_NO_X86)
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using namespace x86;
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Arch arch = Arch::kX64;
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print_info_simple(arch, Inst::kIdAdd, InstOptions::kNone, eax, ebx);
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print_info_simple(arch, Inst::kIdXor, InstOptions::kNone, eax, eax);
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print_info_simple(arch, Inst::kIdLods, InstOptions::kNone, eax, dword_ptr(rsi));
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print_info_simple(arch, Inst::kIdPshufd, InstOptions::kNone, xmm0, xmm1, imm(0));
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print_info_simple(arch, Inst::kIdPabsb, InstOptions::kNone, mm1, mm2);
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print_info_simple(arch, Inst::kIdPabsb, InstOptions::kNone, xmm1, xmm2);
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print_info_simple(arch, Inst::kIdPextrw, InstOptions::kNone, eax, mm1, imm(0));
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print_info_simple(arch, Inst::kIdPextrw, InstOptions::kNone, eax, xmm1, imm(0));
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print_info_simple(arch, Inst::kIdPextrw, InstOptions::kNone, ptr(rax), xmm1, imm(0));
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print_info_simple(arch, Inst::kIdVpdpbusd, InstOptions::kNone, xmm0, xmm1, xmm2);
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print_info_simple(arch, Inst::kIdVpdpbusd, InstOptions::kX86_Vex, xmm0, xmm1, xmm2);
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print_info_simple(arch, Inst::kIdVaddpd, InstOptions::kNone, ymm0, ymm1, ymm2);
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print_info_simple(arch, Inst::kIdVaddpd, InstOptions::kNone, ymm0, ymm30, ymm31);
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print_info_simple(arch, Inst::kIdVaddpd, InstOptions::kNone, zmm0, zmm1, zmm2);
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print_info_simple(arch, Inst::kIdVpternlogd, InstOptions::kNone, zmm0, zmm0, zmm0, imm(0xFF));
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print_info_simple(arch, Inst::kIdVpternlogq, InstOptions::kNone, zmm0, zmm1, zmm2, imm(0x33));
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print_info_extra(arch, Inst::kIdVaddpd, InstOptions::kNone, k1, zmm0, zmm1, zmm2);
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print_info_extra(arch, Inst::kIdVaddpd, InstOptions::kX86_ZMask, k1, zmm0, zmm1, zmm2);
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print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, xmm0, xmm1);
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print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, ymm0, xmm1);
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print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, zmm0, ymm1);
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print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, xmm0, ptr(rsi));
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print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, ymm0, ptr(rsi));
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print_info_simple(arch, Inst::kIdVcvtdq2pd, InstOptions::kNone, zmm0, ptr(rsi));
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#endif // !ASMJIT_NO_X86
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}
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} // {anonymous}
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int main() {
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print_app_info();
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test_x86_arch();
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return 0;
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}
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