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b56f4176cb
* Denested src folder to root, renamed testing to asmjit-testing
* Refactored how headers are included into <asmjit/...> form. This
is necessary as compilers would never simplify a path once a ..
appears in include directory - then paths such as ../core/../core
appeared in asserts, which was ugly
* Moved support utilities into asmjit/support/... (still included
by asmjit/core.h for convenience and compatibility)
* Added CMakePresets.json for making it easy to develop AsmJit
* Reworked CMakeLists to be shorter and use CMake option(),
etc... This simplifies it and makes it using more standard
features
* ASMJIT_EMBED now creates asmjit_embed INTERFACE library,
which is accessible via asmjit::asmjit target - this simplifies
embedding and makes it the same as library targets from a CMake
perspective
* Removed ASMJIT_DEPS - this is now provided by cmake target
aliases - 'asmjit::asmjit' so users should not need this variable
* Changed meaning of ASMJIT_LIBS - this now contains only AsmJit
dependencies without asmjit::asmjit target alias. Don't rely on
ASMJIT_LIBS anymore as it's only used internally
* Removed ASMJIT_NO_DEPRECATED option - AsmJit is not going
to provide controllable deprecations in the future
* Removed ASMJIT_NO_VALIDATION in favor of ASMJIT_NO_INTROSPECTION,
which now controls query, features, and validation API presence
* Removed ASMJIT_DIR option - it was never really needed
* Removed AMX_TRANSPOSE feature from instruction database (X86).
Intel has removed it as well, so it's a feature that won't
be siliconized
83 lines
3.0 KiB
C
83 lines
3.0 KiB
C
// This file is part of AsmJit project <https://asmjit.com>
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//
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// See <asmjit/core.h> or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#ifndef ASMJIT_ARM_A64ARCHTRAITS_P_H_INCLUDED
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#define ASMJIT_ARM_A64ARCHTRAITS_P_H_INCLUDED
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#include <asmjit/core/archtraits.h>
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#include <asmjit/core/misc_p.h>
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#include <asmjit/core/type.h>
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#include <asmjit/arm/a64globals.h>
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#include <asmjit/arm/a64operand.h>
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ASMJIT_BEGIN_SUB_NAMESPACE(a64)
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//! \cond INTERNAL
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//! \addtogroup asmjit_a64
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//! \{
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static const constexpr ArchTraits a64_arch_traits = {
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// SP/FP/LR/PC.
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Gp::kIdSp, Gp::kIdFp, Gp::kIdLr, 0xFFu,
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// Reserved.
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{ 0u, 0u, 0u },
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// HW stack alignment (AArch64 requires stack aligned to 16 bytes at HW level).
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16u,
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// Min/max stack offset - byte addressing is the worst, vec.q addressing the best.
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4095, 65520,
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// Supported register types.
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0u | (1u << uint32_t(RegType::kGp32 ))
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| (1u << uint32_t(RegType::kGp64 ))
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| (1u << uint32_t(RegType::kVec8 ))
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| (1u << uint32_t(RegType::kVec16 ))
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| (1u << uint32_t(RegType::kVec32 ))
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| (1u << uint32_t(RegType::kVec64 ))
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| (1u << uint32_t(RegType::kVec128))
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| (1u << uint32_t(RegType::kMask )),
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// Instruction hints [Gp, Vec, Mask, Extra].
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{{
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InstHints::kPushPop,
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InstHints::kPushPop,
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InstHints::kNoHints,
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InstHints::kNoHints
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}},
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// TypeIdToRegType.
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#define V(index) (index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kInt8) ? RegType::kGp32 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kUInt8) ? RegType::kGp32 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kInt16) ? RegType::kGp32 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kUInt16) ? RegType::kGp32 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kInt32) ? RegType::kGp32 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kUInt32) ? RegType::kGp32 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kInt64) ? RegType::kGp64 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kUInt64) ? RegType::kGp64 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kIntPtr) ? RegType::kGp64 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kUIntPtr) ? RegType::kGp64 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kFloat32) ? RegType::kVec32 : \
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index + uint32_t(TypeId::_kBaseStart) == uint32_t(TypeId::kFloat64) ? RegType::kVec64 : RegType::kNone)
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{{ ASMJIT_LOOKUP_TABLE_32(V, 0) }},
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#undef V
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// Word names of 8-bit, 16-bit, 32-bit, and 64-bit quantities.
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{
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ArchTypeNameId::kByte,
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ArchTypeNameId::kHWord,
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ArchTypeNameId::kWord,
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ArchTypeNameId::kXWord
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}
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};
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//! \}
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//! \endcond
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ASMJIT_END_SUB_NAMESPACE
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#endif // ASMJIT_ARM_A64ARCHTRAITS_P_H_INCLUDED
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