mirror of
https://github.com/asmjit/asmjit.git
synced 2025-12-16 20:17:05 +03:00
b56f4176cb
* Denested src folder to root, renamed testing to asmjit-testing
* Refactored how headers are included into <asmjit/...> form. This
is necessary as compilers would never simplify a path once a ..
appears in include directory - then paths such as ../core/../core
appeared in asserts, which was ugly
* Moved support utilities into asmjit/support/... (still included
by asmjit/core.h for convenience and compatibility)
* Added CMakePresets.json for making it easy to develop AsmJit
* Reworked CMakeLists to be shorter and use CMake option(),
etc... This simplifies it and makes it using more standard
features
* ASMJIT_EMBED now creates asmjit_embed INTERFACE library,
which is accessible via asmjit::asmjit target - this simplifies
embedding and makes it the same as library targets from a CMake
perspective
* Removed ASMJIT_DEPS - this is now provided by cmake target
aliases - 'asmjit::asmjit' so users should not need this variable
* Changed meaning of ASMJIT_LIBS - this now contains only AsmJit
dependencies without asmjit::asmjit target alias. Don't rely on
ASMJIT_LIBS anymore as it's only used internally
* Removed ASMJIT_NO_DEPRECATED option - AsmJit is not going
to provide controllable deprecations in the future
* Removed ASMJIT_NO_VALIDATION in favor of ASMJIT_NO_INTROSPECTION,
which now controls query, features, and validation API presence
* Removed ASMJIT_DIR option - it was never really needed
* Removed AMX_TRANSPOSE feature from instruction database (X86).
Intel has removed it as well, so it's a feature that won't
be siliconized
4245 lines
503 KiB
JSON
4245 lines
503 KiB
JSON
{
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"instructions": [
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{"category": "GP", "instructions": [
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{"any": "adc x:al, imm8" , "alt": true, "op": "[OP] 14 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
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{"any": "adc x:axv, immv" , "alt": true, "op": "[OP] 15 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
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{"any": "[lock|xacqrel] adc x:~r8/m8, ~r8" , "op": "[MR] 10 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
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{"any": "[lock|xacqrel] adc x:~rv/mv, ~rv" , "op": "[MR] 11 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
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{"any": "[lock|xacqrel] adc x:r8/m8, imm8" , "op": "[M ] 80 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
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{"any": "[lock|xacqrel] adc x:rv/mv, imms8" , "op": "[M ] 83 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
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{"any": "[lock|xacqrel] adc x:rv/mv, immv" , "op": "[M ] 81 /2 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
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{"any": "adc x:~r8, ~r8/m8" , "op": "[RM] 12 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
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{"any": "adc x:~rv, ~rv/mv" , "op": "[RM] 13 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
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{"any": "add x:al, imm8" , "alt": true, "op": "[OP] 04 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "add x:axv, immv" , "alt": true, "op": "[OP] 05 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "[lock|xacqrel] add x:~r8/m8, ~r8" , "op": "[MR] 00 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "[lock|xacqrel] add x:~rv/mv, ~rv" , "op": "[MR] 01 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "[lock|xacqrel] add x:r8/m8, imm8" , "op": "[M ] 80 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "[lock|xacqrel] add x:rv/mv, imms8" , "op": "[M ] 83 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "[lock|xacqrel] add x:rv/mv, immv" , "op": "[M ] 81 /0 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "add x:~r8, ~r8/m8" , "op": "[RM] 02 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "add x:~rv, ~rv/mv" , "op": "[RM] 03 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "and x:al, imm8" , "alt": true, "op": "[OP] 24 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "and x:ax, imm16" , "alt": true, "op": "[OP] 66 25 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "and X:eax, imm32" , "alt": true, "op": "[OP] 25 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "and X:rax, immu32" , "alt": true, "op": "[OP] 25 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "and X:rax, imms32" , "alt": true, "op": "[OP] REX.W 25 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "[lock|xacqrel] and x:r8/m8, imm8" , "op": "[M ] 80 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "[lock|xacqrel] and x:r16/m16, imm16" , "op": "[M ] 66 81 /4 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "[lock|xacqrel] and X:r32/m32, imm32" , "op": "[M ] 81 /4 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "[lock|xacqrel] and X:r64, immu32" , "op": "[M ] 81 /4 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "[lock|xacqrel] and X:r64/m64, imms32" , "op": "[M ] REX.W 81 /4 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "[lock|xacqrel] and x:rv/mv, imms8" , "op": "[M ] 83 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "[lock|xacqrel] and x:~r8/m8, ~r8" , "op": "[MR] 20 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "[lock|xacqrel] and x:~rv/mv, ~rv" , "op": "[MR] 21 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "and x:~r8, ~r8/m8" , "op": "[RM] 22 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "and x:~rv, ~rv/mv" , "op": "[RM] 23 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
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{"any": "bsf w:rv, rv/mv" , "op": "[RM] 0F BC /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=U"},
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{"any": "bsr w:rv, rv/mv" , "op": "[RM] 0F BD /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=U"},
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{"any": "bswap X:rv" , "op": "[OP] 0F C8+r"},
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{"any": "bt R:rv/mv, rv" , "op": "[MR] 0F A3 /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
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{"any": "bt R:rv/mv, imm8" , "op": "[M ] 0F BA /4 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
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{"any": "[lock|xacqrel] btc x:rv/mv, rv" , "op": "[MR] 0F BB /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
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{"any": "[lock|xacqrel] btc x:rv/mv, imm8" , "op": "[M ] 0F BA /7 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
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{"any": "[lock|xacqrel] btr x:rv/mv, rv" , "op": "[MR] 0F B3 /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
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{"any": "[lock|xacqrel] btr x:rv/mv, imm8" , "op": "[M ] 0F BA /6 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
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{"any": "[lock|xacqrel] bts x:rv/mv, rv" , "op": "[MR] 0F AB /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
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{"any": "[lock|xacqrel] bts x:rv/mv, imm8" , "op": "[M ] 0F BA /5 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
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{"x86": "[bnd|repIgnore] call rel16" , "op": "[OP] 66 E8 cw" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"any": "[bnd|repIgnore] call rel32" , "op": "[OP] E8 cd" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"x86": "[bnd|repIgnore] call R:r16/m16" , "op": "[OP] 66 FF /2" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"x86": "[bnd|repIgnore] call R:r32/m32" , "op": "[OP] FF /2" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"x64": "[bnd|repIgnore] call R:r64/m64" , "op": "[OP] FF /2" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"any": "cbw x:<ax>" , "op": "[OP] 66 98"},
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{"any": "cdq W:<edx>, <eax>" , "op": "[OP] 99"},
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{"any": "cdqe X:<rax>" , "op": "[OP] REX.W 98"},
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{"any": "clc" , "op": "[OP] F8" , "io": "CF=0"},
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{"any": "cld" , "op": "[OP] FC" , "io": "DF=0"},
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{"any": "cmc" , "op": "[OP] F5" , "io": "CF=X"},
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{"any": "cmp R:r8/m8, r8" , "op": "[MR] 38 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "cmp R:rv/mv, rv" , "op": "[MR] 39 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "cmp R:r8, r8/m8" , "op": "[RM] 3A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "cmp R:rv, rv/mv" , "op": "[RM] 3B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "cmp R:al, imm8" , "alt": true, "op": "[OP] 3C ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "cmp R:axv, immv" , "alt": true, "op": "[OP] 3D iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "cmp R:r8/m8, imm8" , "op": "[M ] 80 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "cmp R:rv/mv, imms8" , "op": "[M ] 83 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "cmp R:rv/mv, immv" , "op": "[M ] 81 /7 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
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{"any": "[rep|repne] cmps R:m8(ds:zsi), R:m8(es:zdi)" , "op": "[OP] A6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
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{"any": "[rep|repne] cmps R:m16(ds:zsi), R:m16(es:zdi)" , "op": "[OP] 66 A7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
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{"any": "[rep|repne] cmps R:m32(ds:zsi), R:m32(es:zdi)" , "op": "[OP] A7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
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{"any": "[rep|repne] cmps R:m64(ds:zsi), R:m64(es:zdi)" , "op": "[OP] REX.W A7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
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{"any": "cwde X:<eax>" , "op": "[OP] 98"},
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{"any": "cqo W:<rdx>, <rax>" , "op": "[OP] REX.W 99"},
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{"any": "cwd w:<dx>, <ax>" , "op": "[OP] 66 99"},
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{"x86": "dec x:r16" , "op": "[OP] 66 48+r" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
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{"x86": "dec X:r32" , "op": "[OP] 48+r" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
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{"any": "[lock|xacqrel] dec x:r8/m8" , "op": "[OP] FE /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
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{"any": "[lock|xacqrel] dec x:rv/mv" , "op": "[OP] FF /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
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{"any": "div x:<ax>, R:r8/m8" , "op": "[M ] F6 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"any": "div x:<dxv>, x:<axv>, rv/mv" , "op": "[M ] F7 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"any": "enter imm16, imm8" , "op": "[OP] C8 iw ib" , "volatile": true},
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{"any": "idiv x:<ax>, R:r8/m8" , "op": "[M ] F6 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"any": "idiv x:<dxv>, x:<axv>, rv/mv" , "op": "[M ] F7 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"any": "imul x:<ax>, R:r8/m8" , "op": "[M ] F6 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
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{"any": "imul w:<dxv>, x:<axv>, rv/mv" , "op": "[M ] F7 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
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{"any": "imul x:~rv, ~rv/mv" , "op": "[RM] 0F AF /r" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
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{"any": "imul w:rv, R:rv/mv, imms8" , "op": "[RM] 6B /r ib" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
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{"any": "imul w:rv, R:rv/mv, immv" , "op": "[RM] 69 /r iv" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
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{"x86": "inc x:r16" , "op": "[OP] 66 40+r" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
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{"x86": "inc X:r32" , "op": "[OP] 40+r" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
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{"any": "[lock] inc x:r8/m8" , "op": "[M ] FE /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
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{"any": "[lock] inc x:rv/mv" , "op": "[M ] FF /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
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{"any": "iret" , "op": "[OP] 66 CF" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"any": "iretd" , "op": "[OP] CF" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"any": "iretq" , "op": "[OP] REX.W CF" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
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{"any": "[bnd] jb rel8" , "op": "[OP] 72 cb" , "io": "CF=R"},
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{"x86": "[bnd] jb rel16" , "op": "[OP] 66 0F 82 cw" , "io": "CF=R"},
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{"any": "[bnd] jb rel32" , "op": "[OP] 0F 82 cd" , "io": "CF=R"},
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{"any": "[bnd] jbe rel8" , "op": "[OP] 76 cb" , "io": "CF=R ZF=R"},
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{"x86": "[bnd] jbe rel16" , "op": "[OP] 66 0F 86 cw" , "io": "CF=R ZF=R"},
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{"any": "[bnd] jbe rel32" , "op": "[OP] 0F 86 cd" , "io": "CF=R ZF=R"},
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{"any": "[bnd] jl rel8" , "op": "[OP] 7C cb" , "io": "SF=R OF=R"},
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{"x86": "[bnd] jl rel16" , "op": "[OP] 66 0F 8C cw" , "io": "SF=R OF=R"},
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{"any": "[bnd] jl rel32" , "op": "[OP] 0F 8C cd" , "io": "SF=R OF=R"},
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{"any": "[bnd] jle rel8" , "op": "[OP] 7E cb" , "io": "ZF=R SF=R OF=R"},
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{"x86": "[bnd] jle rel16" , "op": "[OP] 66 0F 8E cw" , "io": "ZF=R SF=R OF=R"},
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{"any": "[bnd] jle rel32" , "op": "[OP] 0F 8E cd" , "io": "ZF=R SF=R OF=R"},
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{"any": "[bnd] jnb rel8" , "op": "[OP] 73 cb" , "io": "CF=R"},
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{"x86": "[bnd] jnb rel16" , "op": "[OP] 66 0F 83 cw" , "io": "CF=R"},
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{"any": "[bnd] jnb rel32" , "op": "[OP] 0F 83 cd" , "io": "CF=R"},
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{"any": "[bnd] jnbe rel8" , "op": "[OP] 77 cb" , "io": "CF=R ZF=R"},
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{"x86": "[bnd] jnbe rel16" , "op": "[OP] 66 0F 87 cw" , "io": "CF=R ZF=R"},
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{"any": "[bnd] jnbe rel32" , "op": "[OP] 0F 87 cd" , "io": "CF=R ZF=R"},
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{"any": "[bnd] jnl rel8" , "op": "[OP] 7D cb" , "io": "SF=R OF=R"},
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{"x86": "[bnd] jnl rel16" , "op": "[OP] 66 0F 8D cw" , "io": "SF=R OF=R"},
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{"any": "[bnd] jnl rel32" , "op": "[OP] 0F 8D cd" , "io": "SF=R OF=R"},
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{"any": "[bnd] jnle rel8" , "op": "[OP] 7F cb" , "io": "ZF=R SF=R OF=R"},
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{"x86": "[bnd] jnle rel16" , "op": "[OP] 66 0F 8F cw" , "io": "ZF=R SF=R OF=R"},
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{"any": "[bnd] jnle rel32" , "op": "[OP] 0F 8F cd" , "io": "ZF=R SF=R OF=R"},
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{"any": "[bnd] jno rel8" , "op": "[OP] 71 cb" , "io": "OF=R"},
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{"x86": "[bnd] jno rel16" , "op": "[OP] 66 0F 81 cw" , "io": "OF=R"},
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{"any": "[bnd] jno rel32" , "op": "[OP] 0F 81 cd" , "io": "OF=R"},
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{"any": "[bnd] jnp rel8" , "op": "[OP] 7B cb" , "io": "PF=R"},
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{"x86": "[bnd] jnp rel16" , "op": "[OP] 66 0F 8B cw" , "io": "PF=R"},
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{"any": "[bnd] jnp rel32" , "op": "[OP] 0F 8B cd" , "io": "PF=R"},
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{"any": "[bnd] jns rel8" , "op": "[OP] 79 cb" , "io": "SF=R"},
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{"x86": "[bnd] jns rel16" , "op": "[OP] 66 0F 89 cw" , "io": "SF=R"},
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{"any": "[bnd] jns rel32" , "op": "[OP] 0F 89 cd" , "io": "SF=R"},
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{"any": "[bnd] jnz rel8" , "op": "[OP] 75 cb" , "io": "ZF=R"},
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{"x86": "[bnd] jnz rel16" , "op": "[OP] 66 0F 85 cw" , "io": "ZF=R"},
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{"any": "[bnd] jnz rel32" , "op": "[OP] 0F 85 cd" , "io": "ZF=R"},
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{"any": "[bnd] jo rel8" , "op": "[OP] 70 cb" , "io": "OF=R"},
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{"x86": "[bnd] jo rel16" , "op": "[OP] 66 0F 80 cw" , "io": "OF=R"},
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{"any": "[bnd] jo rel32" , "op": "[OP] 0F 80 cd" , "io": "OF=R"},
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{"any": "[bnd] jp rel8" , "op": "[OP] 7A cb" , "io": "PF=R"},
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{"x86": "[bnd] jp rel16" , "op": "[OP] 66 0F 8A cw" , "io": "PF=R"},
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{"any": "[bnd] jp rel32" , "op": "[OP] 0F 8A cd" , "io": "PF=R"},
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{"any": "[bnd] js rel8" , "op": "[OP] 78 cb" , "io": "SF=R"},
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{"x86": "[bnd] js rel16" , "op": "[OP] 66 0F 88 cw" , "io": "SF=R"},
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{"any": "[bnd] js rel32" , "op": "[OP] 0F 88 cd" , "io": "SF=R"},
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{"any": "[bnd] jz rel8" , "op": "[OP] 74 cb" , "io": "ZF=R"},
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{"x86": "[bnd] jz rel16" , "op": "[OP] 66 0F 84 cw" , "io": "ZF=R"},
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{"any": "[bnd] jz rel32" , "op": "[OP] 0F 84 cd" , "io": "ZF=R"},
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{"x86": "[bnd] jecxz R:<cx>, rel8" , "op": "[OP] 67 E3 cb"},
|
|
{"x86": "[bnd] jecxz R:<ecx>, rel8" , "op": "[OP] E3 cb"},
|
|
{"x64": "[bnd] jecxz R:<ecx>, rel8" , "op": "[OP] 67 E3 cb"},
|
|
{"x64": "[bnd] jecxz R:<rcx>, rel8" , "op": "[OP] E3 cb"},
|
|
{"any": "[bnd] jmp rel8" , "op": "[OP] EB cb"},
|
|
{"x86": "[bnd] jmp rel16" , "op": "[OP] 66 E9 cw"},
|
|
{"any": "[bnd] jmp rel32" , "op": "[OP] E9 cd"},
|
|
{"x86": "[bnd] jmp R:r32/m32" , "op": "[M ] FF /4"},
|
|
{"x64": "[bnd] jmp R:r64/m64" , "op": "[M ] FF /4"},
|
|
{"x86": "lcall imm16, imm16" , "op": "[OP] 66 9A iw iw" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"x86": "lcall imm16, imm32" , "op": "[OP] 9A id iw" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"any": "lcall R:m16_16" , "op": "[M ] 66 FF /3" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"any": "lcall R:m16_32" , "op": "[M ] FF /3" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"x64": "lcall R:m16_64" , "op": "[M ] REX.W FF /3" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"any": "lea w:r16, mem" , "op": "[RM] 67 8D /r"},
|
|
{"any": "lea W:r32, mem" , "op": "[RM] 8D /r"},
|
|
{"any": "lea W:r64, mem" , "op": "[RM] REX.W 8D /r"},
|
|
{"any": "leave" , "op": "[OP]C9" , "volatile": true},
|
|
{"x86": "ljmp imm16, imm16" , "op": "[OP] 66 EA iw iw"},
|
|
{"x86": "ljmp imm16, imm32" , "op": "[OP] EA id iw"},
|
|
{"any": "ljmp R:m16_16" , "op": "[M ] 66 FF /5"},
|
|
{"any": "ljmp R:m16_32" , "op": "[M ] FF /5"},
|
|
{"any": "ljmp R:m16_64" , "op": "[M ] REX.W FF /5"},
|
|
{"any": "[rep] lods w:al, R:m8(ds:zsi)" , "op": "[OP] AC" , "io": "DF=R"},
|
|
{"any": "[rep] lods w:ax, R:m16(ds:zsi)" , "op": "[OP] 66 AD" , "io": "DF=R"},
|
|
{"any": "[rep] lods W:eax, R:m32(ds:zsi)" , "op": "[OP] AD" , "io": "DF=R"},
|
|
{"any": "[rep] lods W:rax, R:m64(ds:zsi)" , "op": "[OP] REX.W AD" , "io": "DF=R"},
|
|
{"x86": "loop x:<cx>, rel8" , "op": "[OP] 67 E2 cb"},
|
|
{"x86": "loop X:<ecx>, rel8" , "op": "[OP] E2 cb"},
|
|
{"x64": "loop X:<ecx>, rel8" , "op": "[OP] 67 E2 cb"},
|
|
{"x64": "loop X:<rcx>, rel8" , "op": "[OP] E2 cb"},
|
|
{"x86": "loope x:<cx>, rel8" , "op": "[OP] 67 E1 cb" , "io": "ZF=R"},
|
|
{"x86": "loope X:<ecx>, rel8" , "op": "[OP] E1 cb" , "io": "ZF=R"},
|
|
{"x64": "loope X:<ecx>, rel8" , "op": "[OP] 67 E1 cb" , "io": "ZF=R"},
|
|
{"x64": "loope X:<rcx>, rel8" , "op": "[OP] E1 cb" , "io": "ZF=R"},
|
|
{"x86": "loopne x:<cx>, rel8" , "op": "[OP] 67 E0 cb" , "io": "ZF=R"},
|
|
{"x86": "loopne X:<ecx>, rel8" , "op": "[OP] E0 cb" , "io": "ZF=R"},
|
|
{"x64": "loopne X:<ecx>, rel8" , "op": "[OP] 67 E0 cb" , "io": "ZF=R"},
|
|
{"x64": "loopne X:<rcx>, rel8" , "op": "[OP] E0 cb" , "io": "ZF=R"},
|
|
{"any": "[xrelease] mov w:r8/m8, r8" , "op": "[MR] 88 /r"},
|
|
{"any": "[xrelease] mov w:rv/mv, rv" , "op": "[MR] 89 /r"},
|
|
{"any": "[xrelease] mov w:r8/m8, imm8" , "op": "[M ] C6 /0 ib"},
|
|
{"any": "[xrelease] mov w:rv/mv, immv" , "op": "[M ] C7 /0 iv"},
|
|
{"any": "mov w:r8, r8/m8" , "op": "[RM] 8A /r"},
|
|
{"any": "mov w:rv, rv/mv" , "op": "[RM] 8B /r"},
|
|
{"any": "mov w:r8, imm8" , "op": "[OP] B0+r ib"},
|
|
{"any": "mov w:r16, imm16" , "op": "[OP] 66 B8+r iw"},
|
|
{"any": "mov W:r32, imm32" , "op": "[OP] B8+r id"},
|
|
{"any": "mov W:r64, imm64" , "op": "[OP] REX.W B8+r iq"},
|
|
{"any": "mov w:r16/m16, sreg" , "op": "[MR] 66 8C /r"},
|
|
{"any": "mov W:r32/m16, sreg" , "op": "[MR] 8C /r"},
|
|
{"any": "mov W:r64/m16, sreg" , "op": "[MR] REX.W 8C /r"},
|
|
{"any": "mov W:sreg, r16/m16" , "op": "[RM] 66 8E /r"},
|
|
{"any": "mov W:sreg, r32/m16" , "op": "[RM] 8E /r"},
|
|
{"any": "mov W:sreg, r64/m16" , "op": "[RM] REX.W 8E /r"},
|
|
{"any": "mov w:al, moff8" , "op": "[OP] A0 moff"},
|
|
{"any": "mov w:ax, moff16" , "op": "[OP] 66 A1 moff"},
|
|
{"any": "mov W:eax, moff32" , "op": "[OP] A1 moff"},
|
|
{"any": "mov W:rax, moff64" , "op": "[OP] REX.W A1 moff"},
|
|
{"any": "mov W:moff8, al" , "op": "[OP] A2 moff"},
|
|
{"any": "mov W:moff16, ax" , "op": "[OP] 66 A3 moff"},
|
|
{"any": "mov W:moff32, eax" , "op": "[OP] A3 moff"},
|
|
{"any": "mov W:moff64, rax" , "op": "[OP] REX.W A3 moff"},
|
|
{"x86": "mov W:r32, creg" , "op": "[MR] 0F 20 /r" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
|
|
{"x64": "mov W:r64, creg" , "op": "[MR] 0F 20 /r" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
|
|
{"x86": "mov W:creg, r32" , "op": "[RM] 0F 22 /r" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
|
|
{"x64": "mov W:creg, r64" , "op": "[RM] 0F 22 /r" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
|
|
{"x86": "mov W:r32, dreg" , "op": "[MR] 0F 21 /r" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
|
|
{"x64": "mov W:r64, dreg" , "op": "[MR] 0F 21 /r" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
|
|
{"x86": "mov W:dreg, r32" , "op": "[RM] 0F 23 /r" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
|
|
{"x64": "mov W:dreg, r64" , "op": "[RM] 0F 23 /r" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
|
|
{"any": "movabs W:r64, imm64" , "op": "[OP] REX.W B8+r iq"},
|
|
{"any": "movabs w:al, moff8" , "op": "[OP] A0 moff"},
|
|
{"any": "movabs w:ax, moff16" , "op": "[OP] 66 A1 moff"},
|
|
{"any": "movabs W:eax, moff32" , "op": "[OP] A1 moff"},
|
|
{"any": "movabs W:rax, moff64" , "op": "[OP] REX.W A1 moff"},
|
|
{"any": "movabs W:moff8, al" , "op": "[OP] A2 moff"},
|
|
{"any": "movabs W:moff16, ax" , "op": "[OP] 66 A3 moff"},
|
|
{"any": "movabs W:moff32, eax" , "op": "[OP] A3 moff"},
|
|
{"any": "movabs W:moff64, rax" , "op": "[OP] REX.W A3 moff"},
|
|
{"any": "[rep] movs W:m8(es:zdi), R:m8(ds:zsi)" , "op": "[OP] A4" , "io": "DF=R"},
|
|
{"any": "[rep] movs W:m16(es:zdi), R:m16(ds:zsi)" , "op": "[OP] 66 A5" , "io": "DF=R"},
|
|
{"any": "[rep] movs W:m32(es:zdi), R:m32(ds:zsi)" , "op": "[OP] A5" , "io": "DF=R"},
|
|
{"any": "[rep] movs W:m64(es:zdi), R:m64(ds:zsi)" , "op": "[OP] REX.W A5" , "io": "DF=R"},
|
|
{"any": "movsx w:rv, r8/m8" , "op": "[RM] 0F BE /r"},
|
|
{"any": "movsx W:ry, r16/m16" , "op": "[RM] 0F BF /r"},
|
|
{"x64": "movsxd W:r16, r16/m16" , "op": "[RM] 66 63 /r"},
|
|
{"x64": "movsxd W:r32, r32/m32" , "op": "[RM] 63 /r"},
|
|
{"x64": "movsxd W:r64, r32/m32" , "op": "[RM] REX.W 63 /r"},
|
|
{"any": "movzx w:rv, r8/m8" , "op": "[RM] 0F B6 /r"},
|
|
{"any": "movzx W:r32, r16/m16" , "op": "[RM] 0F B7 /r"},
|
|
{"any": "movzx W:r64, r16/m16" , "op": "[RM] REX.W 0F B7 /r"},
|
|
{"any": "mul x:<ax>, r8/m8" , "op": "[M ] F6 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"},
|
|
{"any": "mul w:<dxv>, x:<axv>, rv/mv" , "op": "[M ] F7 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"},
|
|
{"any": "[lock|xacqrel] neg x:r8/m8" , "op": "[M ] F6 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "[lock|xacqrel] neg x:rv/mv" , "op": "[M ] F7 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "nop" , "op": "[OP] 90"},
|
|
{"any": "nop R:rv/mv" , "op": "[M ] 0F 1F /0"},
|
|
{"any": "nop R:rv/mv, rv" , "op": "[MR] 0F 1F /r"},
|
|
{"any": "[lock|xacqrel] not x:r8/m8" , "op": "[M ] F6 /2"},
|
|
{"any": "[lock|xacqrel] not x:rv/mv" , "op": "[M ] F7 /2"},
|
|
{"any": "or x:al, imm8" , "alt": true, "op": "[OP] 0C ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "or x:axv, immv" , "alt": true, "op": "[OP] 0D iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] or x:~r8/m8, ~r8" , "op": "[MR] 08 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] or x:~rv/mv, ~rv" , "op": "[MR] 09 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] or x:r8/m8, imm8" , "op": "[M ] 80 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] or x:rv/mv, immv" , "op": "[M ] 81 /1 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] or x:rv/mv, imms8" , "op": "[M ] 83 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "or x:~r8, ~r8/m8" , "op": "[RM] 0A /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "or x:~rv, ~rv/mv" , "op": "[RM] 0B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "pop w:r16/m16" , "op": "[M ] 66 8F /0"},
|
|
{"x86": "pop W:r32/m32" , "op": "[M ] 8F /0"},
|
|
{"x64": "pop W:r64/m64" , "op": "[M ] 8F /0"},
|
|
{"any": "pop w:r16" , "op": "[OP] 66 58+r"},
|
|
{"x86": "pop W:r32" , "op": "[OP] 58+r"},
|
|
{"x64": "pop W:r64" , "op": "[OP] 58+r"},
|
|
{"x86": "pop W:ds" , "op": "[OP] 1F"},
|
|
{"x86": "pop W:es" , "op": "[OP] 07"},
|
|
{"x86": "pop W:ss" , "op": "[OP] 17"},
|
|
{"any": "pop W:fs" , "op": "[OP] 0F A1"},
|
|
{"any": "pop W:gs" , "op": "[OP] 0F A9"},
|
|
{"any": "popf" , "op": "[OP] 66 9D" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=W IF=W TF=W"},
|
|
{"x86": "popfd" , "op": "[OP] 9D" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=W IF=W TF=W"},
|
|
{"x64": "popfq" , "op": "[OP] 9D" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=W IF=W TF=W"},
|
|
{"any": "push R:r16/m16" , "op": "[M ] 66 FF /6"},
|
|
{"x86": "push R:r32/m32" , "op": "[M ] FF /6"},
|
|
{"x64": "push R:r64/m64" , "op": "[M ] FF /6"},
|
|
{"any": "push R:r16" , "op": "[OP] 66 50+r"},
|
|
{"x86": "push R:r32" , "op": "[OP] 50+r"},
|
|
{"x64": "push R:r64" , "op": "[OP] 50+r"},
|
|
{"x86": "push R:cs" , "op": "[OP] 0E"},
|
|
{"x86": "push R:ss" , "op": "[OP] 16"},
|
|
{"x86": "push R:ds" , "op": "[OP] 1E"},
|
|
{"x86": "push R:es" , "op": "[OP] 06"},
|
|
{"any": "push R:fs" , "op": "[OP] 0F A0"},
|
|
{"any": "push R:gs" , "op": "[OP] 0F A8"},
|
|
{"any": "push imm8" , "op": "[OP] 6A ib"},
|
|
{"any": "push imm16" , "op": "[OP] 66 68 iw"},
|
|
{"x86": "push imm32" , "op": "[OP] 68 id"},
|
|
{"x64": "push imms32" , "op": "[OP] 68 id"},
|
|
{"any": "pushf" , "op": "[OP] 66 9C" , "io": "OF=R SF=R ZF=R AF=R PF=R CF=R DF=R IF=R TF=R"},
|
|
{"x86": "pushfd" , "op": "[OP] 9C" , "io": "OF=R SF=R ZF=R AF=R PF=R CF=R DF=R IF=R TF=R"},
|
|
{"x64": "pushfq" , "op": "[OP] 9C" , "io": "OF=R SF=R ZF=R AF=R PF=R CF=R DF=R IF=R TF=R"},
|
|
{"any": "pushw imm16" , "op": "[OP] 66 68 iw"},
|
|
{"any": "rcl x:r8/m8, cl" , "op": "[M ] D2 /2" , "io": "CF=X OF=X"},
|
|
{"any": "rcl x:rv/mv, cl" , "op": "[M ] D3 /2" , "io": "CF=X OF=X"},
|
|
{"any": "rcl x:r8/m8, 1" , "alt": true, "op": "[M ] D0 /2" , "io": "CF=X OF=X"},
|
|
{"any": "rcl x:rv/mv, 1" , "alt": true, "op": "[M ] D1 /2" , "io": "CF=X OF=X"},
|
|
{"any": "rcl x:r8/m8, imm8" , "op": "[M ] C0 /2 ib" , "io": "CF=X OF=X"},
|
|
{"any": "rcl x:rv/mv, imm8" , "op": "[M ] C1 /2 ib" , "io": "CF=X OF=X"},
|
|
{"any": "rcr x:r8/m8, cl" , "op": "[M ] D2 /3" , "io": "CF=X OF=X"},
|
|
{"any": "rcr x:rv/mv, cl" , "op": "[M ] D3 /3" , "io": "CF=X OF=X"},
|
|
{"any": "rcr x:r8/m8, 1" , "alt": true, "op": "[M ] D0 /3" , "io": "CF=X OF=X"},
|
|
{"any": "rcr x:rv/mv, 1" , "alt": true, "op": "[M ] D1 /3" , "io": "CF=X OF=X"},
|
|
{"any": "rcr x:r8/m8, imm8" , "op": "[M ] C0 /3 ib" , "io": "CF=X OF=X"},
|
|
{"any": "rcr x:rv/mv, imm8" , "op": "[M ] C1 /3 ib" , "io": "CF=X OF=X"},
|
|
{"any": "[bnd|repIgnore] ret" , "op": "[OP] C3"},
|
|
{"any": "[bnd|repIgnore] ret immu16" , "op": "[OP] C2 iw"},
|
|
{"any": "retf" , "op": "[OP] CB"},
|
|
{"any": "retf immu16" , "op": "[OP] CA iw"},
|
|
{"any": "rol x:r8/m8, cl" , "op": "[M ] D2 /0" , "io": "CF=W OF=W"},
|
|
{"any": "rol x:rv/mv, cl" , "op": "[M ] D3 /0" , "io": "CF=W OF=W"},
|
|
{"any": "rol x:r8/m8, 1" , "alt": true, "op": "[M ] D0 /0" , "io": "CF=W OF=W"},
|
|
{"any": "rol x:rv/mv, 1" , "alt": true, "op": "[M ] D1 /0" , "io": "CF=W OF=W"},
|
|
{"any": "rol x:r8/m8, imm8" , "op": "[M ] C0 /0 ib" , "io": "CF=W OF=W"},
|
|
{"any": "rol x:rv/mv, imm8" , "op": "[M ] C1 /0 ib" , "io": "CF=W OF=W"},
|
|
{"any": "ror x:r8/m8, cl" , "op": "[M ] D2 /1" , "io": "CF=W OF=W"},
|
|
{"any": "ror x:rv/mv, cl" , "op": "[M ] D3 /1" , "io": "CF=W OF=W"},
|
|
{"any": "ror x:r8/m8, 1" , "alt": true, "op": "[M ] D0 /1" , "io": "CF=W OF=W"},
|
|
{"any": "ror x:rv/mv, 1" , "alt": true, "op": "[M ] D1 /1" , "io": "CF=W OF=W"},
|
|
{"any": "ror x:r8/m8, imm8" , "op": "[M ] C0 /1 ib" , "io": "CF=W OF=W"},
|
|
{"any": "ror x:rv/mv, imm8" , "op": "[M ] C1 /1 ib" , "io": "CF=W OF=W"},
|
|
{"any": "sar x:r8/m8, cl" , "op": "[M ] D2 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "sar x:rv/mv, cl" , "op": "[M ] D3 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "sar x:r8/m8, 1" , "alt": true, "op": "[M ] D0 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "sar x:rv/mv, 1" , "alt": true, "op": "[M ] D1 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "sar x:r8/m8, imm8" , "op": "[M ] C0 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "sar x:rv/mv, imm8" , "op": "[M ] C1 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "sbb x:al, imm8" , "alt": true, "op": "[OP] 1C ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"any": "sbb x:axv, immv" , "alt": true, "op": "[OP] 1D iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"any": "[lock|xacqrel] sbb x:r8/m8, r8" , "op": "[MR] 18 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"any": "[lock|xacqrel] sbb x:rv/mv, rv" , "op": "[MR] 19 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"any": "[lock|xacqrel] sbb x:r8/m8, imm8" , "op": "[M ] 80 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"any": "[lock|xacqrel] sbb x:rv/mv, imms8" , "op": "[M ] 83 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"any": "[lock|xacqrel] sbb x:rv/mv, immv" , "op": "[M ] 81 /3 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"any": "sbb x:r8, r8/m8" , "op": "[RM] 1A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"any": "sbb x:rv, rv/mv" , "op": "[RM] 1B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"any": "[rep|repne] scas R:al, R:m8(es:zdi)" , "op": "[OP] AE" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
|
|
{"any": "[rep|repne] scas R:ax, R:m16(es:zdi)" , "op": "[OP] 66 AF" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
|
|
{"any": "[rep|repne] scas R:eax, R:m32(es:zdi)" , "op": "[OP] AF" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
|
|
{"any": "[rep|repne] scas R:rax, R:m64(es:zdi)" , "op": "[OP] REX.W AF" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
|
|
{"any": "setb w:r8/m8" , "op": "[M ] 0F 92 /r" , "io": "CF=R"},
|
|
{"any": "setbe w:r8/m8" , "op": "[M ] 0F 96 /r" , "io": "CF=R ZF=R"},
|
|
{"any": "setl w:r8/m8" , "op": "[M ] 0F 9C /r" , "io": "SF=R OF=R"},
|
|
{"any": "setle w:r8/m8" , "op": "[M ] 0F 9E /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"any": "setnb w:r8/m8" , "op": "[M ] 0F 93 /r" , "io": "CF=R"},
|
|
{"any": "setnbe w:r8/m8" , "op": "[M ] 0F 97 /r" , "io": "CF=R ZF=R"},
|
|
{"any": "setnl w:r8/m8" , "op": "[M ] 0F 9D /r" , "io": "SF=R OF=R"},
|
|
{"any": "setnle w:r8/m8" , "op": "[M ] 0F 9F /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"any": "setno w:r8/m8" , "op": "[M ] 0F 91 /r" , "io": "OF=R"},
|
|
{"any": "setnp w:r8/m8" , "op": "[M ] 0F 9B /r" , "io": "PF=R"},
|
|
{"any": "setns w:r8/m8" , "op": "[M ] 0F 99 /r" , "io": "SF=R"},
|
|
{"any": "setnz w:r8/m8" , "op": "[M ] 0F 95 /r" , "io": "ZF=R"},
|
|
{"any": "seto w:r8/m8" , "op": "[M ] 0F 90 /r" , "io": "OF=R"},
|
|
{"any": "setp w:r8/m8" , "op": "[M ] 0F 9A /r" , "io": "PF=R"},
|
|
{"any": "sets w:r8/m8" , "op": "[M ] 0F 98 /r" , "io": "SF=R"},
|
|
{"any": "setz w:r8/m8" , "op": "[M ] 0F 94 /r" , "io": "ZF=R"},
|
|
{"any": "shl x:r8/m8, cl" , "op": "[M ] D2 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shl x:rv/mv, cl" , "op": "[M ] D3 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shl x:r8/m8, 1" , "alt": true, "op": "[M ] D0 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shl x:rv/mv, 1" , "alt": true, "op": "[M ] D1 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shl x:r8/m8, imm8" , "op": "[M ] C0 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shl x:rv/mv, imm8" , "op": "[M ] C1 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shld x:rv/mv, rv, cl" , "op": "[MR] 0F A5 /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"any": "shld x:rv/mv, rv, imm8" , "op": "[MR] 0F A4 /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"any": "shr x:r8/m8, cl" , "op": "[M ] D2 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shr x:rv/mv, cl" , "op": "[M ] D3 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shr x:r8/m8, 1" , "alt": true, "op": "[M ] D0 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shr x:rv/mv, 1" , "alt": true, "op": "[M ] D1 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shr x:r8/m8, imm8" , "op": "[M ] C0 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shr x:rv/mv, imm8" , "op": "[M ] C1 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "shrd x:rv/mv, rv, cl" , "op": "[MR] 0F AD /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"any": "shrd x:rv/mv, rv, imm8" , "op": "[MR] 66 0F AC /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"any": "stc" , "op": "[OP] F9" , "io": "CF=1"},
|
|
{"any": "std" , "op": "[OP] FD" , "io": "DF=1"},
|
|
{"any": "[rep] stos W:m8(es:zdi), R:al" , "op": "[OP] AA" , "io": "DF=R"},
|
|
{"any": "[rep] stos W:m16(es:zdi), R:ax" , "op": "[OP] 66 AB" , "io": "DF=R"},
|
|
{"any": "[rep] stos W:m32(es:zdi), R:eax" , "op": "[OP] AB" , "io": "DF=R"},
|
|
{"any": "[rep] stos W:m64(es:zdi), R:rax" , "op": "[OP] REX.W AB" , "io": "DF=R"},
|
|
{"any": "sub x:al, imm8" , "alt": true, "op": "[OP] 2C ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "sub x:axv, immv" , "alt": true, "op": "[OP] 2D iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "[lock|xacqrel] sub x:r8/m8, r8" , "op": "[MR] 28 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "[lock|xacqrel] sub x:rv/mv, rv" , "op": "[MR] 29 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "[lock|xacqrel] sub x:r8/m8, imm8" , "op": "[M ] 80 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "[lock|xacqrel] sub x:rv/mv, imms8" , "op": "[M ] 83 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "[lock|xacqrel] sub x:rv/mv, immv" , "op": "[M ] 81 /5 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "sub x:r8, r8/m8" , "op": "[RM] 2A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "sub x:rv, rv/mv" , "op": "[RM] 2B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "test R:~r8/m8, ~r8" , "op": "[MR] 84 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "test R:~rv/mv, ~rv" , "op": "[MR] 85 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "test R:al, imm8" , "alt": true, "op": "[OP] A8 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "test R:axv, immv" , "alt": true, "op": "[OP] A9 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "test R:r8/m8, imm8" , "op": "[M ] F6 /0 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "test R:rv/mv, immv" , "op": "[M ] F7 /0 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "ud0 r32, r32/m32" , "op": "[RM] 0F FF /r"},
|
|
{"any": "ud1 r32, r32/m32" , "op": "[RM] 0F B9 /r"},
|
|
{"any": "ud2" , "op": "[OP] 0F 0B"},
|
|
{"any": "xchg x:~ax, x:~r16" , "alt": true, "op": "[OP] 66 90+r"},
|
|
{"any": "xchg X:~eax, X:~r32" , "alt": true, "op": "[OP] 90+r"},
|
|
{"any": "xchg X:~rax, X:~r64" , "alt": true, "op": "[OP] REX.W 90+r"},
|
|
{"any": "xchg x:~r16, x:~ax" , "alt": true, "op": "[OP] 66 90+r"},
|
|
{"any": "xchg X:~r32, X:~eax" , "alt": true, "op": "[OP] 90+r"},
|
|
{"any": "xchg X:~r64, X:~rax" , "alt": true, "op": "[OP] REX.W 90+r"},
|
|
{"any": "[ilock|xacquire] xchg x:~r8/m8, x:~r8" , "op": "[MR] 86 /r"},
|
|
{"any": "[ilock|xacquire] xchg x:~rv/mv, x:~rv" , "op": "[MR] 87 /r"},
|
|
{"any": "[ilock|xacquire] xchg x:~r8, x:~r8/m8" , "op": "[RM] 86 /r"},
|
|
{"any": "[ilock|xacquire] xchg x:~rv, x:~rv/mv" , "op": "[RM] 87 /r"},
|
|
{"any": "xor x:al, imm8" , "alt": true, "op": "[OP] 34 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "xor x:axv, immv" , "alt": true, "op": "[OP] 35 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] xor x:~r8/m8, ~r8" , "op": "[MR] 30 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] xor x:~rv/mv, ~rv" , "op": "[MR] 31 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] xor x:r8/m8, imm8" , "op": "[M ] 80 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] xor x:rv/mv, imms8" , "op": "[M ] 83 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "[lock|xacqrel] xor x:rv/mv, immv" , "op": "[M ] 81 /6 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "xor x:~r8, ~r8/m8" , "op": "[RM] 32 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"any": "xor x:~rv, ~rv/mv" , "op": "[RM] 33 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}
|
|
]},
|
|
|
|
{"category": "GP GP_IN_OUT", "volatile": true, "instructions": [
|
|
{"any": "in w:al, imm8" , "op": "E4 ib"},
|
|
{"any": "in w:ax, imm8" , "op": "66 E5 ib"},
|
|
{"any": "in W:eax, imm8" , "op": "E5 ib"},
|
|
{"any": "in w:al, dx" , "op": "EC"},
|
|
{"any": "in w:ax, dx" , "op": "66 ED"},
|
|
{"any": "in W:eax, dx" , "op": "ED"},
|
|
{"any": "[rep] ins W:m8(es:zdi), dx" , "op": "6C"},
|
|
{"any": "[rep] ins W:m16(es:zdi), dx" , "op": "66 6D"},
|
|
{"any": "[rep] ins W:m32(es:zdi), dx" , "op": "6D"},
|
|
{"any": "out imm8, al" , "op": "E6 ib"},
|
|
{"any": "out imm8, ax" , "op": "66 E7 ib"},
|
|
{"any": "out imm8, eax" , "op": "E7 ib"},
|
|
{"any": "out R:dx, R:al" , "op": "EE"},
|
|
{"any": "out R:dx, R:ax" , "op": "66 EF"},
|
|
{"any": "out R:dx, R:eax" , "op": "EF"},
|
|
{"any": "[rep] outs R:dx, R:m8(ds:zsi)" , "op": "6E"},
|
|
{"any": "[rep] outs R:dx, R:m16(ds:zsi)" , "op": "66 6F"},
|
|
{"any": "[rep] outs R:dx, R:m32(ds:zsi)" , "op": "6F"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "I486", "instructions": [
|
|
{"any": "[lock|xacqrel] cmpxchg x:r8/m8, r8, <al>" , "op": "[MR] 0F B0 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "[lock|xacqrel] cmpxchg x:rv/mv, rv, <axv>" , "op": "[MR] 0F B1 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cpuid X:<eax>, W:<ebx>, X:<ecx>, W:<edx>" , "op": "[OP] 0F A2" , "volatile": true},
|
|
{"any": "[lock|xacqrel] xadd x:r8/m8, x:r8" , "op": "[MR] 0F C0 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "[lock|xacqrel] xadd x:rv/mv, x:rv" , "op": "[MR] 0F C1 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "3DNOW", "volatile": true, "instructions": [
|
|
{"any": "prefetch R:mem" , "op": "0F 0D /0"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "ADX", "instructions": [
|
|
{"any": "adcx X:~ry, R:~ry/my" , "op": "[RM ] 66 0F 38 F6 /r" , "io": "CF=X"},
|
|
{"any": "adox X:~ry, R:~ry/my" , "op": "[RM ] F3 0F 38 F6 /r" , "io": "OF=X"},
|
|
{"apx": "adcx X:~ry, R:~ry/my" , "op": "[RM ] EVEX.ND=0.LLZ.66.MAP4.Wy 66 /r" , "io": "CF=X"},
|
|
{"apx": "adcx W:ry, R:~ry, R:~ry/my" , "op": "[VRM] EVEX.ND=1.LLZ.66.MAP4.Wy 66 /r" , "io": "CF=X"},
|
|
{"apx": "adox X:~ry, R:~ry/my" , "op": "[RM ] EVEX.ND=0.LLZ.F3.MAP4.Wy 66 /r" , "io": "OF=X"},
|
|
{"apx": "adox W:ry, R:~ry, R:~ry/my" , "op": "[VRM] EVEX.ND=1.LLZ.F3.MAP4.Wy 66 /r" , "io": "OF=X"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "BMI", "instructions": [
|
|
{"any": "andn W:ry, R:ry, R:ry/my" , "op": "[RVM] VEX.LZ.0F38.Wy F2 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=0"},
|
|
{"apx": "andn{nf} W:ry, R:ry, R:my/ry" , "op": "[RVM] EVEX.128.NP.0F38.Wy F2 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=0"},
|
|
{"any": "bextr W:ry, R:ry/my, R:ry" , "op": "[RMV] VEX.LZ.0F38.Wy F7 /r" , "io": "OF=0 SF=U ZF=W AF=U PF=U CF=0"},
|
|
{"apx": "bextr{nf} W:ry, R:my/ry, ry" , "op": "[RMV] EVEX.128.NP.0F38.Wy F7 /r" , "io": "OF=0 SF=U ZF=W AF=U PF=U CF=0"},
|
|
{"any": "blsi W:ry, R:ry/my" , "op": "[VM ] VEX.LZ.0F38.Wy F3 /3" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
|
|
{"apx": "blsi{nf} W:ry, R:my/ry" , "op": "[VM ] EVEX.128.NP.0F38.Wy F3 /3" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
|
|
{"any": "blsmsk W:ry, R:ry/my" , "op": "[VM ] VEX.LZ.0F38.Wy F3 /2" , "io": "OF=0 SF=W ZF=0 AF=U PF=U CF=W"},
|
|
{"apx": "blsmsk{nf} W:ry, R:my/ry" , "op": "[VM ] EVEX.128.NP.0F38.Wy F3 /2" , "io": "OF=0 SF=W ZF=0 AF=U PF=U CF=W"},
|
|
{"any": "blsr W:ry, R:ry/my" , "op": "[VM ] VEX.LZ.0F38.Wy F3 /1" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
|
|
{"apx": "blsr{nf} W:ry, R:my/ry" , "op": "[VM ] EVEX.128.NP.0F38.Wy F3 /1" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
|
|
{"any": "tzcnt w:rv, rv/mv" , "op": "[RM ] F3 0F BC /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"},
|
|
{"apx": "tzcnt{nf} w:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv F4 /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "BMI2", "instructions": [
|
|
{"any": "bzhi W:ry, R:ry/my, R:ry" , "op": "[RMV] VEX.LZ.0F38.Wy F5 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
|
|
{"apx": "bzhi{nf} W:ry, R:my/ry, R:ry" , "op": "[RMV] EVEX.128.NP.0F38.Wy F5 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
|
|
{"any": "mulx W:ry, W:ry, ~ry/my, ~<dxy>" , "op": "[RVM] VEX.LZ.F2.0F38.Wy F6 /r"},
|
|
{"apx": "mulx W:ry, W:ry, R:~my/ry, R:~<dxy>" , "op": "[RVM] EVEX.128.F2.0F38.Wy F6 /r"},
|
|
{"any": "pdep W:ry, ry, ry/my" , "op": "[RVM] VEX.LZ.F2.0F38.Wy F5 /r"},
|
|
{"apx": "pdep W:ry, R:ry, R:my/ry" , "op": "[RVM] EVEX.128.F2.0F38.Wy F5 /r"},
|
|
{"any": "pext W:ry, ry, ry/my" , "op": "[RVM] VEX.LZ.F3.0F38.Wy F5 /r"},
|
|
{"apx": "pext W:ry, R:ry, R:my/ry" , "op": "[RVM] EVEX.128.F3.0F38.Wy F5 /r"},
|
|
{"any": "rorx W:ry, ry/my, imm8" , "op": "[RM ] VEX.LZ.F2.0F3A.Wy F0 /r ib"},
|
|
{"apx": "rorx W:ry, R:my/ry, imm8" , "op": "[RM ] EVEX.128.F2.0F3A.Wy F0 /r ib"},
|
|
{"any": "sarx W:ry, ry/my, ry" , "op": "[RMV] VEX.LZ.F3.0F38.Wy F7 /r"},
|
|
{"apx": "sarx W:ry, R:my/ry, R:ry" , "op": "[RMV] EVEX.128.F3.0F38.Wy F7 /r"},
|
|
{"any": "shlx W:ry, ry/my, ry" , "op": "[RMV] VEX.LZ.66.0F38.Wy F7 /r"},
|
|
{"apx": "shlx W:ry, R:my/ry, R:ry" , "op": "[RMV] EVEX.128.66.0F38.Wy F7 /r"},
|
|
{"any": "shrx W:ry, ry/my, ry" , "op": "[RMV] VEX.LZ.F2.0F38.Wy F7 /r"},
|
|
{"apx": "shrx W:ry, R:my/ry, R:ry" , "op": "[RMV] EVEX.128.F2.0F38.Wy F7 /r"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CET_SS", "volatile": true, "instructions": [
|
|
{"any": "incsspd R:r32[7:0]" , "op": "F3 0F AE /5"},
|
|
{"x64": "incsspq R:r64[7:0]" , "op": "F3 REX.W 0F AE /5"},
|
|
{"any": "rdsspd W:r32" , "op": "F3 0F 1E /1"},
|
|
{"any": "rdsspq W:r64" , "op": "F3 REX.W 0F 1E /1"},
|
|
{"any": "rstorssp R:m64" , "op": "F3 0F 01 /5" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
|
|
{"any": "saveprevssp" , "op": "F3 0F 01 EA" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CLDEMOTE", "instructions": [
|
|
{"any": "cldemote R:mem" , "op": "[M ] NP 0F 1C /0"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CLFLUSH", "instructions": [
|
|
{"any": "clflush R:mem" , "op": "[M ] NP 0F AE /7"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CLFLUSHOPT", "instructions": [
|
|
{"any": "clflushopt R:mem" , "op": "[M ] NFx 66 0F AE /7"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CLWB", "instructions": [
|
|
{"any": "clwb R:mem" , "op": "[M ] 66 0F AE /6"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CLZERO", "instructions": [
|
|
{"any": "clzero R:<m512(ds:zax)>" , "op": "[OP] NP 0F 01 FC"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CMOV", "instructions": [
|
|
{"any": "cmovb x:rv, rv/mv" , "op": "[RM] 0F 42 /r" , "io": "CF=R"},
|
|
{"any": "cmovbe x:rv, rv/mv" , "op": "[RM] 0F 46 /r" , "io": "CF=R ZF=R"},
|
|
{"any": "cmovl x:rv, rv/mv" , "op": "[RM] 0F 4C /r" , "io": "SF=R OF=R"},
|
|
{"any": "cmovle x:rv, rv/mv" , "op": "[RM] 0F 4E /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"any": "cmovnb x:rv, rv/mv" , "op": "[RM] 0F 43 /r" , "io": "CF=R"},
|
|
{"any": "cmovnbe x:rv, rv/mv" , "op": "[RM] 0F 47 /r" , "io": "CF=R ZF=R"},
|
|
{"any": "cmovnl x:rv, rv/mv" , "op": "[RM] 0F 4D /r" , "io": "SF=R OF=R"},
|
|
{"any": "cmovnle x:rv, rv/mv" , "op": "[RM] 0F 4F /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"any": "cmovno x:rv, rv/mv" , "op": "[RM] 0F 41 /r" , "io": "OF=R"},
|
|
{"any": "cmovnp x:rv, rv/mv" , "op": "[RM] 0F 4B /r" , "io": "PF=R"},
|
|
{"any": "cmovns x:rv, rv/mv" , "op": "[RM] 0F 49 /r" , "io": "SF=R"},
|
|
{"any": "cmovnz x:rv, rv/mv" , "op": "[RM] 0F 45 /r" , "io": "ZF=R"},
|
|
{"any": "cmovo x:rv, rv/mv" , "op": "[RM] 0F 40 /r" , "io": "OF=R"},
|
|
{"any": "cmovp x:rv, rv/mv" , "op": "[RM] 0F 4A /r" , "io": "PF=R"},
|
|
{"any": "cmovs x:rv, rv/mv" , "op": "[RM] 0F 48 /r" , "io": "SF=R"},
|
|
{"any": "cmovz x:rv, rv/mv" , "op": "[RM] 0F 44 /r" , "io": "ZF=R"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CMPCCXADD", "instructions": [
|
|
{"any": "cmpbxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E2 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpbxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E2 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpbexadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E6 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpbexadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E6 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmplxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy EC !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmplxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy EC !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmplexadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy EE !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmplexadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy EE !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpnbxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E3 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpnbxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E3 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpnbexadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E7 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpnbexadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E7 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpnlxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy ED !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpnlxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy ED !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpnlexadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy EF !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpnlexadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy EF !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpnoxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E1 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpnoxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E1 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpnpxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy EB !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpnpxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy EB !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpnsxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E9 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpnsxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E9 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpnzxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E5 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpnzxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E5 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpoxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E0 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpoxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E0 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmppxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy EA !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmppxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy EA !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpsxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E8 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpsxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E8 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"},
|
|
{"any": "cmpzxadd X:my, X:ry, R:ry" , "op": "[MRV] VEX.128.66.0F38.Wy E4 !(11):rrr:bbb" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "cmpzxadd X:my, X:ry, R:ry" , "op": "[MRV] EVEX.128.66.0F38.Wy E4 !(11):rrr:bbb", "io": "OF=W SD=W ZF=W AF=W PF=W CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CMPXCHG8B", "instructions": [
|
|
{"any": "[lock|xacqrel] cmpxchg8b X:m64,X:<edx>,X:<eax>,<ecx>,<ebx>" , "op": "[OP] 0F C7 /1" , "io": "ZF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CMPXCHG16B", "instructions": [
|
|
{"any": "[lock|xacqrel] cmpxchg16b X:m128,X:<rdx>,X:<rax>,<rcx>,<rbx>","op": "[OP] REX.W 0F C7 /1" , "io": "ZF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "FSGSBASE", "volatile": true, "instructions": [
|
|
{"x64": "rdfsbase W:ry" , "op": "[M ] F3 0F AE /0"},
|
|
{"x64": "rdgsbase W:ry" , "op": "[M ] F3 0F AE /1"},
|
|
{"x64": "wrfsbase R:ry" , "op": "[M ] F3 0F AE /2"},
|
|
{"x64": "wrgsbase R:ry" , "op": "[M ] F3 0F AE /3"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "FXSR", "volatile": true, "instructions": [
|
|
{"any": "fxrstor R:mem" , "op": "[M ] 0F AE /1" , "io": "C0=W C1=W C2=W C3=W"},
|
|
{"any": "fxrstor64 R:mem" , "op": "[M ] REX.W 0F AE /1" , "io": "C0=W C1=W C2=W C3=W"},
|
|
{"any": "fxsave W:mem" , "op": "[M ] 0F AE /0" , "io": "C0=R C1=R C2=R C3=R"},
|
|
{"any": "fxsave64 W:mem" , "op": "[M ] REX.W 0F AE /0" , "io": "C0=R C1=R C2=R C3=R"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "LAHFSAHF", "instructions": [
|
|
{"any": "lahf w:<ah>" , "op": "[OP] 9F" , "io": "SF=R ZF=R AF=R PF=R CF=R"},
|
|
{"any": "sahf R:<ah>" , "op": "[OP] 9E" , "io": "SF=W ZF=W AF=W PF=W CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "LWP", "volatile": true, "instructions": [
|
|
{"any": "llwpcb R:r32" , "op": "[M ] XOP.L0.P0.MAP9.W0 12 /0"},
|
|
{"any": "llwpcb R:r64" , "op": "[M ] XOP.L0.P0.MAP9.W1 12 /0"},
|
|
{"any": "lwpins R:r32, R:r32/m32, imm32" , "op": "[VM ] XOP.L0.P0.MAPA.W0 12 /0 id"},
|
|
{"any": "lwpins R:r64, R:r32/m32, imm32" , "op": "[VM ] XOP.L0.P0.MAPA.W1 12 /0 id"},
|
|
{"any": "lwpval R:r32, R:r32/m32, imm32" , "op": "[VM ] XOP.L0.P0.MAPA.W0 12 /1 id"},
|
|
{"any": "lwpval R:r64, R:r32/m32, imm32" , "op": "[VM ] XOP.L0.P0.MAPA.W1 12 /1 id"},
|
|
{"any": "slwpcb W:r32" , "op": "[M ] XOP.L0.P0.MAP9.W0 12 /1"},
|
|
{"any": "slwpcb W:r64" , "op": "[M ] XOP.L0.P0.MAP9.W1 12 /1"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "LZCNT", "instructions": [
|
|
{"any": "lzcnt w:rv, rv/mv" , "op": "[RM] F3 0F BD /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"},
|
|
{"apx": "lzcnt{nf} w:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv F5 /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MONITORX", "volatile": true, "instructions": [
|
|
{"any": "monitorx R:<mem(ds:zax)>, R:<ecx>, R:<edx>" , "op": "0F 01 FA"},
|
|
{"any": "mwaitx R:<eax>, R:<ecx>, R:<ebx>" , "op": "0F 01 FB"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MCOMMIT", "instructions": [
|
|
{"any": "mcommit" , "op": "F3 0F 01 FA" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MOVBE", "instructions": [
|
|
{"any": "movbe w:rv, R:mv" , "op": "[RM] 0F 38 F0 /r"},
|
|
{"any": "movbe W:mv, R:rv" , "op": "[MR] 0F 38 F1 /r"},
|
|
{"apx": "movbe w:rv, R:rv/mv" , "op": "[RM] EVEX.ND=0.LLZ.Pv.MAP4.Wv 60 /r"},
|
|
{"apx": "movbe w:rv/mv, R:rv" , "op": "[MR] EVEX.ND=0.LLZ.Pv.MAP4.Wv 61 /r"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MOVDIRI", "instructions": [
|
|
{"any": "movdiri W:my, R:ry" , "op": "[MR] 0F 38 F9 /r"},
|
|
{"apx": "movdiri W:my, R:ry" , "op": "[MR] EVEX.ND=0.LLZ.NP.MAP4.W0 F9 !(11):rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MOVDIR64B", "instructions": [
|
|
{"any": "movdir64b W:m512(es:r32), m512" , "op": "[RM] 66 0F 38 F8 /r"},
|
|
{"any": "movdir64b W:m512(es:r64), m512" , "op": "[RM] 66 0F 38 F8 /r"},
|
|
{"apx": "movdir64b W:m512(es:r64), R:m512" , "op": "[RM] EVEX.LLZ.66.MAP4.W0 F8 !(11):rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MOVRS", "instructions": [
|
|
{"x64": "movrs W:r8, R:m8" , "op": "[RM] NOREP 0F 38 8A !(11):rrr:bbb"},
|
|
{"x64": "movrs W:rv, R:mv" , "op": "[RM] NOREP 0F 38 8B !(11):rrr:bbb"},
|
|
{"any": "prefetchrst2 R:mem" , "op": "[M ] 0F 18 !(11):100:bbb"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "PCONFIG", "volatile": true, "instructions": [
|
|
{"any": "pconfig" , "op": "[OP] NP 0F 01 C5"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "POPCNT", "instructions": [
|
|
{"any": "popcnt w:rv, rv/mv" , "op": "[RM] F3 0F B8 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"apx": "popcnt{nf} w:rv, R:rv/mv" , "op": "[RM] EVEX.ND=0.LLZ.Pv.MAP4.Wv 88 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "OSPKE", "instructions": [
|
|
{"any": "rdpkru W:<edx>, W:<eax>, R:<ecx>" , "op": "[OP] 0F 01 EE"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "PREFETCHI", "volatile": true, "instructions": [
|
|
{"x64": "prefetchit0 R:mem" , "op": "[M ] 0F 18 /7"},
|
|
{"x64": "prefetchit1 R:mem" , "op": "[M ] 0F 18 /6"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "PREFETCHW", "volatile": true, "instructions": [
|
|
{"any": "prefetchw R:mem" , "op": "[M ] 0F 0D /1" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "PREFETCHWT1", "volatile": true, "instructions": [
|
|
{"any": "prefetchwt1 R:mem" , "op": "[M ] 0F 0D /2" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "PTWRITE", "volatile": true, "instructions": [
|
|
{"any": "ptwrite R:r32/m32" , "op": "[M ] F3 0F AE /4"},
|
|
{"any": "ptwrite R:r64/m64" , "op": "[M ] F3 REX.W 0F AE /4"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "RAO_INT", "volatile": true, "instructions": [
|
|
{"any": "aadd X:my, R:ry" , "op": "[MR] NP 0F 38 FC !(11):rrr:bbb"},
|
|
{"apx": "aadd X:my, R:ry" , "op": "[MR] EVEX.ND=0.LLZ.NP.MAP4.Wy FC !(11):rrr:bbb"},
|
|
{"any": "aand X:my, R:ry" , "op": "[MR] 66 0F 38 FC !(11):rrr:bbb"},
|
|
{"apx": "aand X:my, R:ry" , "op": "[MR] EVEX.ND=0.LLZ.66.MAP4.Wy FC !(11):rrr:bbb"},
|
|
{"any": "aor X:my, R:ry" , "op": "[MR] F2 0F 38 FC !(11):rrr:bbb"},
|
|
{"apx": "aor X:my, R:ry" , "op": "[MR] EVEX.ND=0.LLZ.F2.MAP4.Wy FC !(11):rrr:bbb"},
|
|
{"any": "axor X:my, R:ry" , "op": "[MR] F3 0F 38 FC !(11):rrr:bbb"},
|
|
{"apx": "axor X:my, R:ry" , "op": "[MR] EVEX.ND=0.LLZ.F3.MAP4.Wy FC !(11):rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "RDPID", "instructions": [
|
|
{"x86": "rdpid W:r32" , "op": "[R ] F3 0F C7 /7"},
|
|
{"x64": "rdpid W:r64" , "op": "[R ] F3 0F C7 /7"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "RDPRU", "instructions": [
|
|
{"any": "rdpru W:<edx>, W:<eax>, R:<ecx>" , "op": "0F 01 FD"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "RDRAND", "instructions": [
|
|
{"any": "rdrand w:rv" , "op": "NFx 0F C7 /6" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "RDSEED", "instructions": [
|
|
{"any": "rdseed w:rv" , "op": "NFx 0F C7 /7" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "RDTSC", "instructions": [
|
|
{"any": "rdtsc W:<edx>, W:<eax>" , "op": "0F 31"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "RDTSCP", "instructions": [
|
|
{"any": "rdtscp W:<edx>, W:<eax>, W:<ecx>" , "op": "0F 01 F9"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "RTM", "deprecated": true, "volatile": true, "instructions": [
|
|
{"any": "xabort imm8" , "op": "C6 /7 ib"},
|
|
{"any": "xbegin rel16" , "op": "66 C7 /7 cw"},
|
|
{"any": "xbegin rel32" , "op": "C7 /7 cd"},
|
|
{"any": "xend" , "op": "0F 01 D5"},
|
|
{"any": "xtest" , "op": "0F 01 D6" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "SERIALIZE", "volatile": true, "instructions": [
|
|
{"any": "serialize" , "op": "0F 01 E8"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "SSE", "volatile": true, "instructions": [
|
|
{"any": "prefetchnta R:mem" , "op": "[M ] 0F 18 /0"},
|
|
{"any": "prefetcht0 R:mem" , "op": "[M ] 0F 18 /1"},
|
|
{"any": "prefetcht1 R:mem" , "op": "[M ] 0F 18 /2"},
|
|
{"any": "prefetcht2 R:mem" , "op": "[M ] 0F 18 /3"},
|
|
{"any": "sfence" , "op": "[OP] NP 0F AE F8"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "SSE2", "volatile": true, "instructions": [
|
|
{"any": "lfence" , "op": "[OP] NP 0F AE E8"},
|
|
{"any": "mfence" , "op": "[OP] NP 0F AE F0"},
|
|
{"any": "movnti W:my, ry" , "op": "[MR] NP 0F C3 /r"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT CRYPTO_HASH", "ext": "SSE4_2", "instructions": [
|
|
{"any": "crc32 X:r32, R:r8/m8" , "op": "[RM] F2 0F 38 F0 /r"},
|
|
{"any": "crc32 X:r32, R:r16/m16" , "op": "[RM] 66 F2 0F 38 F1 /r"},
|
|
{"any": "crc32 X:r32, R:r32/m32" , "op": "[RM] F2 0F 38 F1 /r"},
|
|
{"any": "crc32 X:r64, R:r8/m8" , "op": "[RM] F2 REX.W 0F 38 F0 /r"},
|
|
{"any": "crc32 X:r64, R:r64/m64" , "op": "[RM] F2 REX.W 0F 38 F1 /r"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "TSE", "volatile": true, "instructions": [
|
|
{"x64": "pbndkb W:<rax>, R:<mem(ds:rbx)>, W:<mem(ds:rcx)>" , "op": "NP 0F 01 C7" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "TSXLDTRK", "volatile": true, "instructions": [
|
|
{"any": "xresldtrk" , "op": "F2 0F 01 E9"},
|
|
{"any": "xsusldtrk" , "op": "F2 0F 01 E8"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "UINTR", "volatile": true, "instructions": [
|
|
{"x64": "uiret" , "op": "F3 0F 01 EC"},
|
|
{"x64": "clui" , "op": "F3 0F 01 EE"},
|
|
{"x64": "stui" , "op": "F3 0F 01 EF"},
|
|
{"x64": "testui" , "op": "F3 0F 01 ED" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
|
|
{"x64": "senduipi R:r64" , "op": "[R ] F3 0F C7 /6"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "WAITPKG", "volatile": true, "instructions": [
|
|
{"any": "tpause R:r32, <edx>, <eax>" , "op": "66 0F AE /6" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
|
|
{"x86": "umonitor R:mem(ds:r32)" , "op": "F3 0F AE /6"},
|
|
{"x64": "umonitor R:mem(ds:r64)" , "op": "F3 0F AE /6"},
|
|
{"any": "umwait R:r32, <edx>, <eax>" , "op": "F2 0F AE /6" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "XSAVE", "volatile": true, "instructions": [
|
|
{"any": "xgetbv W:<edx>, W:<eax>, R:<ecx>" , "op": "NP 0F 01 D0" , "io": "XCR=R"},
|
|
{"any": "xrstor R:mem, <edx>, <eax>" , "op": "NP 0F AE /5" , "io": "XCR=R"},
|
|
{"any": "xrstor64 R:mem, <edx>, <eax>" , "op": "NP REX.W 0F AE /5" , "io": "XCR=R"},
|
|
{"any": "xsave W:mem, <edx>, <eax>" , "op": "NP 0F AE /4" , "io": "XCR=R"},
|
|
{"any": "xsave64 W:mem, <edx>, <eax>" , "op": "NP REX.W 0F AE /4" , "io": "XCR=R"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "XSAVEC", "volatile": true, "instructions": [
|
|
{"any": "xsavec W:mem, <edx>, <eax>" , "op": "NP 0F C7 /4" , "io": "XCR=R"},
|
|
{"any": "xsavec64 W:mem, <edx>, <eax>" , "op": "NP REX.W 0F C7 /4" , "io": "XCR=R"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "XSAVEOPT", "volatile": true, "instructions": [
|
|
{"any": "xsaveopt W:mem, <edx>, <eax>" , "op": "NP 0F AE /6" , "io": "XCR=R"},
|
|
{"any": "xsaveopt64 W:mem, <edx>, <eax>" , "op": "NP REX.W 0F AE /6" , "io": "XCR=R"}
|
|
]},
|
|
|
|
{"category": "GP", "volatile": true, "instructions": [
|
|
{"any": "cli" , "op": "FA" , "io": "IF=W"},
|
|
{"any": "int imm8" , "op": "CD ib"},
|
|
{"any": "int3" , "op": "CC"},
|
|
{"any": "lar w:r16, R:r16/m16" , "op": "[RM] 66 0F 02 /r" , "io": "ZF=W"},
|
|
{"any": "lar W:r32, R:r32/m16" , "op": "[RM] 0F 02 /r" , "io": "ZF=W"},
|
|
{"x86": "lds x:r16, m16_16" , "op": "[RM] 66 C5 /r"},
|
|
{"x86": "lds X:r32, m16_32" , "op": "[RM] C5 /r"},
|
|
{"x86": "les x:r16, m16_16" , "op": "[RM] 66 C4 /r"},
|
|
{"x86": "les X:r32, m16_32" , "op": "[RM] C4 /r"},
|
|
{"any": "lfs x:r16, m16_16" , "op": "[RM] 66 0F B4 /r"},
|
|
{"any": "lfs X:r32, m16_32" , "op": "[RM] 0F B4 /r"},
|
|
{"x64": "lfs X:r64, m16_64" , "op": "[RM] REX.W 0F B4 /r"},
|
|
{"any": "lgs x:r16, m16_16" , "op": "[RM] 66 0F B5 /r"},
|
|
{"any": "lgs X:r32, m16_32" , "op": "[RM] 0F B5 /r"},
|
|
{"x64": "lgs X:r64, m16_64" , "op": "[RM] REX.W 0F B5 /r"},
|
|
{"any": "lsl w:r16, R:r16/m16" , "op": "[RM] 66 0F 03 /r" , "io": "ZF=W"},
|
|
{"any": "lsl W:r32, R:r32/m16" , "op": "[RM] 0F 03 /r" , "io": "ZF=W"},
|
|
{"x64": "lsl W:r64, R:r32/m16" , "op": "[RM] REX.W 0F 03 /r" , "io": "ZF=W"},
|
|
{"any": "lss x:r16, m16_16" , "op": "[RM] 66 0F B2 /r"},
|
|
{"any": "lss X:r32, m16_32" , "op": "[RM] 0F B2 /r"},
|
|
{"x64": "lss X:r64, m16_64" , "op": "[RM] REX.W 0F B2 /r"},
|
|
{"any": "pause" , "op": "F3 90"},
|
|
{"x86": "rsm" , "op": "0F AA" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"any": "sgdt W:mem" , "op": "0F 01 /0"},
|
|
{"any": "sidt W:mem" , "op": "0F 01 /1"},
|
|
{"any": "sldt w:r16/m16" , "op": "66 0F 00 /0"},
|
|
{"any": "sldt W:r32/m16" , "op": "0F 00 /0"},
|
|
{"x64": "sldt W:r64/m16" , "op": "REX.W 0F 00 /0"},
|
|
{"any": "smsw w:r16/m16" , "op": "66 0F 01 /4"},
|
|
{"any": "smsw W:r32/m16" , "op": "0F 01 /4"},
|
|
{"x64": "smsw W:r64/m16" , "op": "REX.W 0F 01 /4"},
|
|
{"any": "sti" , "op": "FB" , "io": "IF=1"},
|
|
{"any": "str w:r16/m16" , "op": "66 0F 00 /1"},
|
|
{"any": "str W:r32/m16" , "op": "0F 00 /1"},
|
|
{"any": "str W:r64/m16" , "op": "REX.W 0F 00 /1"},
|
|
{"x64": "syscall" , "op": "0F 05"},
|
|
{"any": "sysenter" , "op": "0F 34"},
|
|
{"any": "verr R:r16/m16" , "op": "0F 00 /4" , "io": "ZF=W"},
|
|
{"any": "verw R:r16/m16" , "op": "0F 00 /5" , "io": "ZF=W"},
|
|
{"any": "xlatb" , "op": "D7"}
|
|
]},
|
|
|
|
{"category": "GP", "deprecated": true, "instructions": [
|
|
{"x86": "aaa x:<ax>" , "op": "37" , "io": "OF=U SF=U ZF=U AF=W PF=U CF=W"},
|
|
{"x86": "aad x:<ax>, imm8" , "op": "D5 ib" , "io": "OF=U SF=W ZF=W AF=U PF=W CF=U"},
|
|
{"x86": "aam x:<ax>, imm8" , "op": "D4 ib" , "io": "OF=U SF=W ZF=W AF=U PF=W CF=U"},
|
|
{"x86": "aas x:<ax>" , "op": "3F" , "io": "OF=U SF=U ZF=U AF=W PF=U CF=W"},
|
|
{"x86": "arpl x:r16/m16, R:r16" , "op": "[MR] 63 /r" , "io": "ZF=W"},
|
|
{"x86": "bound R:r16, R:m32" , "op": "[RM] 66 62 /r"},
|
|
{"x86": "bound R:r32, R:m64" , "op": "[RM] 62 /r"},
|
|
{"x86": "daa x:<ax>" , "op": "27" , "io": "OF=U SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"x86": "das x:<ax>" , "op": "2F" , "io": "OF=U SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"x86": "into" , "op": "CE" , "io": "OF=R"},
|
|
{"x86": "popa" , "op": "66 61"},
|
|
{"x86": "popad" , "op": "61"},
|
|
{"x86": "pusha" , "op": "66 60"},
|
|
{"x86": "pushad" , "op": "60"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MPX", "deprecated": true, "instructions": [
|
|
{"x86": "bndcl R:bnd, r32/m32" , "op": "[RM] F3 0F 1A /r"},
|
|
{"x64": "bndcl R:bnd, r64/m64" , "op": "[RM] F3 0F 1A /r"},
|
|
{"x86": "bndcn R:bnd, r32/m32" , "op": "[RM] F2 0F 1B /r"},
|
|
{"x64": "bndcn R:bnd, r64/m64" , "op": "[RM] F2 0F 1B /r"},
|
|
{"x86": "bndcu R:bnd, r32/m32" , "op": "[RM] F2 0F 1A /r"},
|
|
{"x64": "bndcu R:bnd, r64/m64" , "op": "[RM] F2 0F 1A /r"},
|
|
{"any": "bndldx W:bnd, mib" , "op": "[RM] 0F 1A /r"},
|
|
{"any": "bndmk W:bnd, mem" , "op": "[RM] F3 0F 1B /r"},
|
|
{"any": "bndmov W:bnd, bnd/mem" , "op": "[RM] 66 0F 1A /r"},
|
|
{"any": "bndmov W:bnd/mem, bnd" , "op": "[MR] 66 0F 1B /r"},
|
|
{"any": "bndstx W:mib, bnd" , "op": "[MR] 0F 1B /r"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "TBM", "deprecated": true, "instructions": [
|
|
{"any": "blci W:ry, ry/my" , "op": "[VM ] XOP.LZ.MAP9.Wy 02 /6"},
|
|
{"any": "blcic W:ry, ry/my" , "op": "[VM ] XOP.LZ.MAP9.Wy 01 /5"},
|
|
{"any": "blsic W:ry, ry/my" , "op": "[VM ] XOP.LZ.MAP9.Wy 01 /6"},
|
|
{"any": "blcfill W:ry, ry/my" , "op": "[VM ] XOP.LZ.MAP9.Wy 01 /1"},
|
|
{"any": "blsfill W:ry, ry/my" , "op": "[VM ] XOP.LZ.MAP9.Wy 01 /2"},
|
|
{"any": "blcmsk W:ry, ry/my" , "op": "[VM ] XOP.LZ.MAP9.Wy 02 /1"},
|
|
{"any": "blcs W:ry, ry/my" , "op": "[VM ] XOP.LZ.MAP9.Wy 01 /3"},
|
|
{"any": "tzmsk W:ry, ry/my" , "op": "[VM ] XOP.LZ.MAP9.Wy 01 /4"},
|
|
{"any": "t1mskc W:ry, ry/my" , "op": "[VM ] XOP.LZ.MAP9.Wy 01 /7"}
|
|
]},
|
|
|
|
{"category": "GP", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "clts" , "op": "0F 06"},
|
|
{"any": "hlt" , "op": "F4"},
|
|
{"any": "lgdt R:mem" , "op": "0F 01 /2"},
|
|
{"any": "lidt R:mem" , "op": "0F 01 /3"},
|
|
{"any": "lldt R:r16/m16" , "op": "0F 00 /2"},
|
|
{"any": "lmsw R:r16/m16" , "op": "0F 01 /6"},
|
|
{"any": "ltr R:r16/m16" , "op": "0F 00 /3"},
|
|
{"any": "rdpmc W:<edx>, W:<eax>, R:<ecx>" , "op": "0F 33"},
|
|
{"x64": "swapgs" , "op": "0F 01 F8"},
|
|
{"any": "sysexit" , "op": "0F 35"},
|
|
{"any": "sysexitq" , "op": "REX.W 0F 35"},
|
|
{"x64": "sysret" , "op": "0F 07"},
|
|
{"x64": "sysretq" , "op": "REX.W 0F 07"}
|
|
]},
|
|
|
|
{"category": "GP", "ext": "I486", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "invd" , "op": "[OP] 0F 08"},
|
|
{"any": "invlpg R:mem" , "op": "[M ] 0F 01 /7"},
|
|
{"x86": "invpcid R:r32, R:m128" , "op": "[RM] 66 0F 38 82 /r"},
|
|
{"x64": "invpcid R:r64, R:m128" , "op": "[RM] 66 0F 38 82 /r"},
|
|
{"apx": "invpcid R:r64, R:m128" , "op": "[RM] EVEX.ND=0.LLZ.F3.MAP4.WIG F2 !(11):rrr:bbb"},
|
|
{"any": "wbinvd" , "op": "[OP] 0F 09"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CET_IBT", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "endbr32" , "op": "F3 0F 1E FB"},
|
|
{"any": "endbr64" , "op": "F3 0F 1E FA"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "CET_SS", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "clrssbsy R:m64" , "op": "F3 0F AE /6" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
|
|
{"any": "setssbsy" , "op": "F3 0F 01 E8"},
|
|
{"any": "wrssd W:m32, R:r32" , "op": "[MR] 0F 38 F6 !(11):rrr:bbb"},
|
|
{"apx": "wrssd W:m32, R:r32" , "op": "[MR] EVEX.ND=0.LLZ.NP.MAP4.W0 66 !(11):rrr:bbb"},
|
|
{"x64": "wrssq W:m64, R:r64" , "op": "[MR] REX.W 0F 38 F6 !(11):rrr:bbb"},
|
|
{"apx": "wrssq W:m64, R:r64" , "op": "[MR] EVEX.ND=0.LLZ.NP.MAP4.W1 66 !(11):rrr:bbb"},
|
|
{"any": "wrussd W:m32, R:r32" , "op": "[MR] 66 0F 38 F5 !(11):rrr:bbb"},
|
|
{"apx": "wrussd W:m32, R:r32" , "op": "[MR] EVEX.ND=0.LLZ.66.MAP4.W0 65 !(11):rrr:bbb"},
|
|
{"x64": "wrussq W:m64, R:r64" , "op": "[MR] REX.W 66 0F 38 F5 !(11):rrr:bbb"},
|
|
{"apx": "wrussq W:m64, R:r64" , "op": "[MR] EVEX.ND=0.LLZ.66.MAP4.W1 65 !(11):rrr:bbb"}
|
|
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "HRESET", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "hreset imm8, W:<eax>" , "op": "F3 0F 3A F0 /0 ib"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MONITOR", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "monitor R:<mem(ds:zax)>, R:<ecx>, R:<edx>" , "op": "0F 01 C8"},
|
|
{"any": "mwait R:<eax>, R:<ecx>" , "op": "0F 01 C9"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MSR", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "rdmsr W:<edx>, W:<eax>, R:<ecx>" , "op": "0F 32" , "io": "MSR=R"},
|
|
{"any": "wrmsr R:<edx>, R:<eax>, R:<ecx>" , "op": "0F 30" , "io": "MSR=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MSR_IMM", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"x64": "rdmsr W:r64, R:imm32" , "op": "[M ] VEX.128.F2.MAP7.W0 F6 11:000:bbb id" , "io": "MSR=R"},
|
|
{"apx": "rdmsr W:r64, R:imm32" , "op": "[M ] EVEX.128.F2.MAP7.W0 F6 11:000:bbb id", "io": "MSR=R"},
|
|
{"x64": "wrmsrns imm32, R:r64" , "op": "[M ] VEX.128.F3.MAP7.W0 F6 11:000:bbb id" , "io": "MSR=W"},
|
|
{"apx": "wrmsrns imm32, R:r64" , "op": "[M ] EVEX.128.F3.MAP7.W0 F6 11:000:bbb id", "io": "MSR=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "MSRLIST", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"x64": "rdmsrlist R:<mem(ds:rsi)>, W:<mem(ds:rdi)>, X:<rcx>" , "op": "[OP] F2 0F 01 C6" , "io": "MSR=R"},
|
|
{"x64": "wrmsrlist R:<mem(ds:rsi)>, R:<mem(ds:rdi)>, X:<rcx>" , "op": "[OP] F3 0F 01 C6" , "io": "MSR=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "SMX", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "getsec W:<eax>, R:<ebx>" , "op": "[OP] NP 0F 37"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "WBNOINVD", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "wbnoinvd" , "op": "[OP] F3 0F 09"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "WRMSRNS", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "wrmsrns R:<edx>, R:<eax>, R:<ecx>" , "op": "[OP] NP 0F 01 C6" , "io": "MSR=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "XSAVE", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "xsetbv R:<edx>, R:<eax>, R:<ecx>" , "op": "[OP] NP 0F 01 D1" , "io": "XCR=W"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "XSAVES", "volatile": true, "privilege": "L0", "instructions": [
|
|
{"any": "xrstors R:mem, <edx>, <eax>" , "op": "[M ] NP 0F C7 /3" , "io": "XCR=R"},
|
|
{"any": "xrstors64 R:mem, <edx>, <eax>" , "op": "[M ] NP REX.W 0F C7 /3" , "io": "XCR=R"},
|
|
{"any": "xsaves W:mem, <edx>, <eax>" , "op": "[M ] NP 0F C7 /5" , "io": "XCR=R"},
|
|
{"any": "xsaves64 W:mem, <edx>, <eax>" , "op": "[M ] NP REX.W 0F C7 /5" , "io": "XCR=R"}
|
|
]},
|
|
|
|
{"category": "VIRTUALIZATION", "ext": "SMAP", "volatile": true, "instructions": [
|
|
{"any": "clac" , "op": "[OP] NP 0F 01 CA" , "ext": "SMAP" , "privilege": "L0", "io": "AC=0"},
|
|
{"any": "stac" , "op": "[OP] NP 0F 01 CB" , "ext": "SMAP" , "privilege": "L0", "io": "AC=1"}
|
|
]},
|
|
|
|
{"category": "VIRTUALIZATION", "ext": "VMX", "volatile": true, "instructions": [
|
|
{"x86": "invept R:r32, R:m128" , "op": "[RM] 66 0F 38 80 /r" , "privilege": "L0"},
|
|
{"x64": "invept R:r64, R:m128" , "op": "[RM] 66 0F 38 80 /r" , "privilege": "L0"},
|
|
{"apx": "invept R:r64, R:m128" , "op": "[RM] EVEX.ND=0.LLZ.F3.MAP4.WIG F0 !(11):rrr:bbb" , "privilege": "L0"},
|
|
{"x86": "invvpid R:r32, R:m128" , "op": "[RM] 66 0F 38 81 /r" , "privilege": "L0"},
|
|
{"x64": "invvpid R:r64, R:m128" , "op": "[RM] 66 0F 38 81 /r" , "privilege": "L0"},
|
|
{"apx": "invvpid R:r64, R:m128" , "op": "[RM] EVEX.ND=0.LLZ.F3.MAP4.WIG F1 !(11):rrr:bbb" , "privilege": "L0"},
|
|
{"any": "vmcall" , "op": "[OP] 0F 01 C1" , "privilege": "L0"},
|
|
{"any": "vmclear R:m64" , "op": "[M ] 66 0F C7 /6" , "privilege": "L0"},
|
|
{"any": "vmfunc" , "op": "[OP] NP 0F 01 D4" , "privilege": "L0"},
|
|
{"any": "vmlaunch" , "op": "[OP] 0F 01 C2" , "privilege": "L0"},
|
|
{"any": "vmptrld R:m64" , "op": "[M ] NP 0F C7 /6" , "privilege": "L0"},
|
|
{"any": "vmptrst W:m64" , "op": "[M ] NP 0F C7 /7" , "privilege": "L0"},
|
|
{"x86": "vmread W:r32/m32, R:r32" , "op": "[MR] NP 0F 78 /r" , "privilege": "L0"},
|
|
{"x64": "vmread W:r64/m64, R:r64" , "op": "[MR] NP 0F 78 /r" , "privilege": "L0"},
|
|
{"any": "vmresume" , "op": "[OP] 0F 01 C3" , "privilege": "L0"},
|
|
{"x86": "vmwrite R:r32, R:r32/m32" , "op": "[RM] NP 0F 79 /r" , "privilege": "L0"},
|
|
{"x64": "vmwrite R:r64, R:r64/m64" , "op": "[RM] NP 0F 79 /r" , "privilege": "L0"},
|
|
{"any": "vmxoff" , "op": "[OP] 0F 01 C4" , "privilege": "L0"},
|
|
{"any": "vmxon R:m64" , "op": "[M ] F3 0F C7 /6" , "privilege": "L0"}
|
|
]},
|
|
|
|
{"category": "VIRTUALIZATION", "ext": "SEAM", "volatile": true, "instructions": [
|
|
{"any": "seamcall" , "op": "[OP] 66 0F 01 CF" , "ext": "SEAM"},
|
|
{"any": "seamops" , "op": "[OP] 66 0F 01 CE" , "ext": "SEAM"},
|
|
{"any": "seamret" , "op": "[OP] 66 0F 01 CD" , "ext": "SEAM"},
|
|
{"any": "tdcall" , "op": "[OP] 66 0F 01 CC" , "ext": "SEAM"}
|
|
]},
|
|
|
|
{"category": "VIRTUALIZATION", "ext": "ENQCMD", "volatile": true, "instructions": [
|
|
{"x86": "enqcmd W:m512(es:r32), m512" , "op": "[RM] F2 0F 38 F8 !(11):rrr:bbb" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"x64": "enqcmd W:m512(es:r64), m512" , "op": "[RM] F2 0F 38 F8 !(11):rrr:bbb" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"apx": "enqcmd W:m512(es:r64), R:m512" , "op": "[RM] EVEX.ND=0.LLZ.F2.MAP4.W? F8 !(11):rrr:bbb" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"x86": "enqcmds W:m512(es:r32), m512" , "op": "[RM] F3 0F 38 F8 !(11):rrr:bbb" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"x64": "enqcmds W:m512(es:r64), m512" , "op": "[RM] F3 0F 38 F8 !(11):rrr:bbb" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"apx": "enqcmds W:m512(es:r64), R:m512" , "op": "[RM] EVEX.ND=0.LLZ.F3.MAP4.W? F8 !(11):rrr:bbb" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}
|
|
]},
|
|
|
|
|
|
{"category": "VIRTUALIZATION", "volatile": true, "instructions": [
|
|
{"any": "clgi" , "op": "0F 01 DD" , "ext": "SVM" , "privilege": "L0"},
|
|
{"x86": "invlpga R:<eax>, R:<ecx>" , "op": "0F 01 DF" , "ext": "SVM" , "privilege": "L0"},
|
|
{"x64": "invlpga R:<eax>, R:<ecx>" , "op": "67 0F 01 DF" , "ext": "SVM" , "privilege": "L0"},
|
|
{"x64": "invlpga R:<rax>, R:<ecx>" , "op": "0F 01 DF" , "ext": "SVM" , "privilege": "L0"},
|
|
{"x86": "invlpgb R:<eax>, R:<edx>, R:<ecx>" , "op": "0F 01 FE" , "ext": "INVLPGB" , "privilege": "L0"},
|
|
{"x64": "invlpgb R:<eax>, R:<edx>, R:<ecx>" , "op": "67 0F 01 FE" , "ext": "INVLPGB" , "privilege": "L0"},
|
|
{"x64": "invlpgb R:<rax>, R:<edx>, R:<ecx>" , "op": "0F 01 FE" , "ext": "INVLPGB" , "privilege": "L0"},
|
|
{"x64": "psmash" , "op": "F3 0F 01 FF" , "ext": "SEV_SNP" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"any": "pvalidate" , "op": "F2 0F 01 FF" , "ext": "SEV_SNP" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"x64": "rmpadjust" , "op": "F3 0F 01 FE" , "ext": "SEV_SNP" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"x64": "rmpquery R:<rax>, W:<rcx>, W:<rdx>" , "op": "F3 0F 01 FD" , "ext": "RMPQUERY", "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"x64": "rmpupdate" , "op": "F2 0F 01 FE" , "ext": "SEV_SNP" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"any": "skinit X:<eax>" , "op": "0F 01 DE" , "ext": "SKINIT"},
|
|
{"any": "stgi" , "op": "0F 01 DC" , "ext": "SKINIT"},
|
|
{"any": "tlbsync" , "op": "0F 01 FF" , "ext": "INVLPGB" , "privilege": "L0"},
|
|
{"any": "vmgexit" , "op": "F2 0F 01 D9" , "ext": "SEV_ES"},
|
|
{"x86": "vmload R:<eax>" , "op": "0F 01 DA" , "ext": "SVM" , "privilege": "L0"},
|
|
{"x64": "vmload R:<rax>" , "op": "0F 01 DA" , "ext": "SVM" , "privilege": "L0"},
|
|
{"any": "vmmcall" , "op": "0F 01 D9" , "ext": "SVM"},
|
|
{"x86": "vmrun X:<eax>" , "op": "0F 01 D8" , "ext": "SVM" , "privilege": "L0"},
|
|
{"x64": "vmrun X:<rax>" , "op": "0F 01 D8" , "ext": "SVM" , "privilege": "L0"},
|
|
{"x86": "vmsave R:<eax>" , "op": "0F 01 DB" , "ext": "SVM" , "privilege": "L0"},
|
|
{"x64": "vmsave R:<rax>" , "op": "0F 01 DB" , "ext": "SVM" , "privilege": "L0"}
|
|
]},
|
|
|
|
{"category": "FPU", "ext": "FPU", "instructions": [
|
|
{"any": "f2xm1" , "op": "D9 F0" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fabs" , "op": "D9 E1" , "io": "C0=U C1=0 C2=U C3=U"},
|
|
{"any": "fadd R:m32fp" , "op": "D8 /0" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fadd R:m64fp" , "op": "DC /0" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fadd st(0), st(i)" , "op": "D8 C0+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fadd st(i), st(0)" , "op": "DC C0+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "faddp" , "op": "DE C1" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "faddp st(i)" , "op": "DE C0+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fbld R:m80dec" , "op": "DF /4" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fbstp W:m80bcd" , "op": "DF /6" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fchs" , "op": "D9 E0" , "io": "C0=U C1=0 C2=U C3=U"},
|
|
{"any": "fclex" , "op": "9B DB E2" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fcom" , "op": "D8 D1" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "fcom R:m32fp" , "op": "D8 /2" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "fcom R:m64fp" , "op": "DC /2" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "fcom R:st(i)" , "op": "D8 D0+i" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "fcomi R:st(i)" , "op": "DB F0+i" , "io": "C1=0 ZF=W PF=W CF=W"},
|
|
{"any": "fcomip R:st(i)" , "op": "DF F0+i" , "io": "C1=0 ZF=W PF=W CF=W", "fpuStack": "pop"},
|
|
{"any": "fcomp" , "op": "D8 D9" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
|
|
{"any": "fcomp R:m32fp" , "op": "D8 /3" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
|
|
{"any": "fcomp R:m64fp" , "op": "DC /3" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
|
|
{"any": "fcomp R:st(i)" , "op": "D8 D8+i" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
|
|
{"any": "fcompp" , "op": "DE D9" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop2x"},
|
|
{"any": "fcos" , "op": "D9 FF" , "io": "C0=U C1=W C2=W C3=U"},
|
|
{"any": "fdecstp" , "op": "D9 F6" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "dec"},
|
|
{"any": "fdiv R:m32fp" , "op": "D8 /6" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fdiv R:m64fp" , "op": "DC /6" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fdiv st(0), st(i)" , "op": "D8 F0+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fdiv st(i), st(0)" , "op": "DC F8+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fdivp" , "op": "DE F9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fdivp st(i)" , "op": "DE F8+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fdivr R:m32fp" , "op": "D8 /7" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fdivr R:m64fp" , "op": "DC /7" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fdivr st(0), st(i)" , "op": "D8 F8+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fdivr st(i), st(0)" , "op": "DC F0+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fdivrp" , "op": "DE F1" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fdivrp st(i)" , "op": "DE F0+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "ffree st(i)" , "op": "DD C0+i" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fiadd R:m16int" , "op": "DE /0" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fiadd R:m32int" , "op": "DA /0" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "ficom R:m16int" , "op": "DE /2" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "ficom R:m32int" , "op": "DA /2" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "ficomp R:m16int" , "op": "DE /3" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "ficomp R:m32int" , "op": "DA /3" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "fidiv R:m16int" , "op": "DE /6" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fidiv R:m32int" , "op": "DA /6" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fidivr R:m16int" , "op": "DE /7" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fidivr R:m32int" , "op": "DA /7" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fild R:m16int" , "op": "DF /0" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fild R:m32int" , "op": "DB /0" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fild R:m64int" , "op": "DF /5" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fimul R:m16int" , "op": "DE /1" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fimul R:m32int" , "op": "DA /1" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fincstp" , "op": "D9 F7" , "io": "C0=U C1=0 C2=U C3=U", "fpuStack": "inc"},
|
|
{"any": "finit" , "op": "9B DB E3" , "io": "C0=0 C1=0 C2=0 C3=0"},
|
|
{"any": "fist W:m16int" , "op": "DF /2" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fist W:m32int" , "op": "DB /2" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fistp W:m16int" , "op": "DF /3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fistp W:m32int" , "op": "DB /3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fistp W:m64int" , "op": "DF /7" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fisub R:m16int" , "op": "DE /4" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fisub R:m32int" , "op": "DA /4" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fisubr R:m16int" , "op": "DE /5" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fisubr R:m32int" , "op": "DA /5" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fld R:m32fp" , "op": "D9 /0" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fld R:m64fp" , "op": "DD /0" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fld R:m80fp" , "op": "DB /5" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fld R:st(i)" , "op": "D9 C0+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fld1" , "op": "D9 E8" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fldcw R:m16" , "op": "D9 /5" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fldenv R:mem" , "op": "D9 /4" , "io": "C0=W C1=W C2=W C3=W"},
|
|
{"any": "fldl2e" , "op": "D9 EA" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fldl2t" , "op": "D9 E9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fldlg2" , "op": "D9 EC" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fldln2" , "op": "D9 ED" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fldpi" , "op": "D9 EB" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fldz" , "op": "D9 EE" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fmul R:m32fp" , "op": "D8 /1" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fmul R:m64fp" , "op": "DC /1" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fmul st(0), st(i)" , "op": "D8 C8+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fmul st(i), st(0)" , "op": "DC C8+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fmulp" , "op": "DE C9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fmulp st(i)" , "op": "DE C8+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fnclex" , "op": "DB E2" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fninit" , "op": "DB E3" , "io": "C0=0 C1=0 C2=0 C3=0"},
|
|
{"any": "fnop" , "op": "D9 D0" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fnsave W:mem" , "op": "DD /6" , "io": "C0=W C1=W C2=W C3=W"},
|
|
{"any": "fnstcw W:m16" , "op": "D9 /7" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fnstenv W:mem" , "op": "D9 /6" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fnstsw w:ax" , "op": "DF E0" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fnstsw W:m16" , "op": "DD /7" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fpatan" , "op": "D9 F3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fprem" , "op": "D9 F8" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fprem1" , "op": "D9 F5" , "io": "C0=W C1=W C2=W C3=W"},
|
|
{"any": "fptan" , "op": "D9 F2" , "io": "C0=U C1=W C2=W C3=U", "fpuStack": "pop"},
|
|
{"any": "frndint" , "op": "D9 FC" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "frstor R:mem" , "op": "DD /4" , "io": "C0=W C1=W C2=W C3=W"},
|
|
{"any": "fsave W:mem" , "op": "9B DD /6" , "io": "C0=W C1=W C2=W C3=W"},
|
|
{"any": "fscale" , "op": "D9 FD" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fsin" , "op": "D9 FE" , "io": "C0=U C1=W C2=W C3=U"},
|
|
{"any": "fsincos" , "op": "D9 FB" , "io": "C0=U C1=W C2=W C3=U", "fpuStack": "push"},
|
|
{"any": "fsqrt" , "op": "D9 FE" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fst W:m32fp" , "op": "D9 /2" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fst W:m64fp" , "op": "DD /2" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fst W:st(i)" , "op": "DD D0+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fstcw W:m16" , "op": "9B D9 /7" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fstenv W:mem" , "op": "9B D9 /6" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fstp W:m32fp" , "op": "D9 /3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fstp W:m64fp" , "op": "DD /3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fstp W:m80fp" , "op": "DB /7" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fstp W:st(i)" , "op": "DD D8+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fstsw w:ax" , "op": "9B DF E0" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fstsw W:m16" , "op": "9B DD /7" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fsub R:m32fp" , "op": "D8 /4" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fsub R:m64fp" , "op": "DC /4" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fsub st(0), st(i)" , "op": "D8 E0+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fsub st(i), st(0)" , "op": "DC E8+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fsubp" , "op": "DE E9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fsubp st(i)" , "op": "DE E8+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fsubr R:m32fp" , "op": "D8 /5" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fsubr R:m64fp" , "op": "DC /5" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fsubr st(0), st(i)" , "op": "D8 E8+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fsubr st(i), st(0)" , "op": "DC E0+i" , "io": "C0=U C1=W C2=U C3=U"},
|
|
{"any": "fsubrp" , "op": "DE E1" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fsubrp st(i)" , "op": "DE E0+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "ftst" , "op": "D9 E4" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "fucom" , "op": "DD E1" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "fucom R:st(i)" , "op": "DD E0+i" , "io": "C0=W C1=0 C2=W C3=W"},
|
|
{"any": "fucomi R:st(i)" , "op": "DB E8+i" , "io": "C1=0 ZF=W PF=W CF=W"},
|
|
{"any": "fucomip R:st(i)" , "op": "DF E8+i" , "io": "C1=0 ZF=W PF=W CF=W", "fpuStack": "pop"},
|
|
{"any": "fucomp" , "op": "DD E9" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
|
|
{"any": "fucomp R:st(i)" , "op": "DD E8+i" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
|
|
{"any": "fucompp" , "op": "DA E9" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop2x"},
|
|
{"any": "fwait" , "op": "9B" , "io": "C0=U C1=U C2=U C3=U"},
|
|
{"any": "fxam" , "op": "D9 E5" , "io": "C0=W C1=W C2=W C3=W"},
|
|
{"any": "fxch" , "op": "D9 C9" , "io": "C0=U C1=0 C2=U C3=U"},
|
|
{"any": "fxch st(i)" , "op": "D9 C8+i" , "io": "C0=U C1=0 C2=U C3=U"},
|
|
{"any": "fxtract" , "op": "D9 F4" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
|
|
{"any": "fyl2x" , "op": "D9 F1" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fyl2xp1" , "op": "D9 F9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"}
|
|
]},
|
|
|
|
{"category": "FPU", "ext": "FPU CMOV", "instructions": [
|
|
{"any": "fcmovb st(i)" , "op": "DA C0+i" , "io": "C0=U C1=W C2=U C3=U CF=R" },
|
|
{"any": "fcmovbe st(i)" , "op": "DA D0+i" , "io": "C0=U C1=W C2=U C3=U CF=R ZF=R"},
|
|
{"any": "fcmove st(i)" , "op": "DA C8+i" , "io": "C0=U C1=W C2=U C3=U ZF=R" },
|
|
{"any": "fcmovnb st(i)" , "op": "DB C0+i" , "io": "C0=U C1=W C2=U C3=U CF=R" },
|
|
{"any": "fcmovnbe st(i)" , "op": "DB D0+i" , "io": "C0=U C1=W C2=U C3=U CF=R ZF=R"},
|
|
{"any": "fcmovne st(i)" , "op": "DB C8+i" , "io": "C0=U C1=W C2=U C3=U ZF=R" },
|
|
{"any": "fcmovnu st(i)" , "op": "DB D8+i" , "io": "C0=U C1=W C2=U C3=U PF=R" },
|
|
{"any": "fcmovu st(i)" , "op": "DA D8+i" , "io": "C0=U C1=W C2=U C3=U PF=R" }
|
|
]},
|
|
|
|
{"category": "FPU", "ext": "FPU SSE3", "instructions": [
|
|
{"any": "fisttp W:m16int" , "op": "DF /1" , "io": "C0=U C1=0 C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fisttp W:m32int" , "op": "DB /1" , "io": "C0=U C1=0 C2=U C3=U", "fpuStack": "pop"},
|
|
{"any": "fisttp W:m64int" , "op": "DD /1" , "io": "C0=U C1=0 C2=U C3=U", "fpuStack": "pop"}
|
|
]},
|
|
|
|
{"category": "MMX STATE", "deprecated": true, "volatile": true, "instructions": [
|
|
{"any": "emms" , "op": "[OP] 0F 77" , "ext": "MMX"},
|
|
{"any": "femms" , "op": "[OP] 0F 0E" , "ext": "3DNOW"}
|
|
]},
|
|
|
|
{"category": "MMX SIMD", "ext": "MMX", "deprecated": true, "instructions": [
|
|
{"any": "movd W:mm[31:0], R:r32[31:0]/m32" , "op": "[RM] NP 0F 6E /r"},
|
|
{"any": "movd W:r32[31:0]/m32, R:mm[31:0]" , "op": "[MR] NP 0F 7E /r"},
|
|
{"any": "movq W:mm, mm/m64" , "op": "[RM] NP 0F 6F /r"},
|
|
{"x64": "movq W:mm, r64/m64" , "op": "[RM] NP REX.W 0F 6E /r"},
|
|
{"any": "movq W:mm/m64, mm" , "op": "[MR] NP 0F 7F /r"},
|
|
{"x64": "movq W:r64/m64, mm" , "op": "[MR] NP REX.W 0F 7E /r"},
|
|
{"any": "packssdw X:mm, mm/m64" , "op": "[RM] NP 0F 6B /r"},
|
|
{"any": "packsswb X:mm, mm/m64" , "op": "[RM] NP 0F 63 /r"},
|
|
{"any": "packuswb X:mm, mm/m64" , "op": "[RM] NP 0F 67 /r"},
|
|
{"any": "paddb X:~mm, ~mm/m64" , "op": "[RM] NP 0F FC /r"},
|
|
{"any": "paddd X:~mm, ~mm/m64" , "op": "[RM] NP 0F FE /r"},
|
|
{"any": "paddsb X:~mm, ~mm/m64" , "op": "[RM] NP 0F EC /r"},
|
|
{"any": "paddsw X:~mm, ~mm/m64" , "op": "[RM] NP 0F ED /r"},
|
|
{"any": "paddusb X:~mm, ~mm/m64" , "op": "[RM] NP 0F DC /r"},
|
|
{"any": "paddusw X:~mm, ~mm/m64" , "op": "[RM] NP 0F DD /r"},
|
|
{"any": "paddw X:~mm, ~mm/m64" , "op": "[RM] NP 0F FD /r"},
|
|
{"any": "pand X:~mm, ~mm/m64" , "op": "[RM] NP 0F DB /r"},
|
|
{"any": "pandn X:mm, mm/m64" , "op": "[RM] NP 0F DF /r"},
|
|
{"any": "pcmpeqb X:~mm, ~mm/m64" , "op": "[RM] NP 0F 74 /r"},
|
|
{"any": "pcmpeqd X:~mm, ~mm/m64" , "op": "[RM] NP 0F 76 /r"},
|
|
{"any": "pcmpeqw X:~mm, ~mm/m64" , "op": "[RM] NP 0F 75 /r"},
|
|
{"any": "pcmpgtb X:mm, mm/m64" , "op": "[RM] NP 0F 64 /r"},
|
|
{"any": "pcmpgtd X:mm, mm/m64" , "op": "[RM] NP 0F 66 /r"},
|
|
{"any": "pcmpgtw X:mm, mm/m64" , "op": "[RM] NP 0F 65 /r"},
|
|
{"any": "pmaddwd X:~mm, ~mm/m64" , "op": "[RM] NP 0F F5 /r"},
|
|
{"any": "pmulhw X:~mm, ~mm/m64" , "op": "[RM] NP 0F E5 /r"},
|
|
{"any": "pmullw X:~mm, ~mm/m64" , "op": "[RM] NP 0F D5 /r"},
|
|
{"any": "por X:~mm, ~mm/m64" , "op": "[RM] NP 0F EB /r"},
|
|
{"any": "pslld X:mm, mm/m64" , "op": "[RM] NP 0F F2 /r"},
|
|
{"any": "pslld X:mm, imm8" , "op": "[M ] NP 0F 72 /6 ib"},
|
|
{"any": "psllq X:mm, mm/m64" , "op": "[RM] NP 0F F3 /r"},
|
|
{"any": "psllq X:mm, imm8" , "op": "[M ] NP 0F 73 /6 ib"},
|
|
{"any": "psllw X:mm, mm/m64" , "op": "[RM] NP 0F F1 /r"},
|
|
{"any": "psllw X:mm, imm8" , "op": "[M ] NP 0F 71 /6 ib"},
|
|
{"any": "psrad X:mm, mm/m64" , "op": "[RM] NP 0F E2 /r"},
|
|
{"any": "psrad X:mm, imm8" , "op": "[M ] NP 0F 72 /4 ib"},
|
|
{"any": "psraw X:mm, mm/m64" , "op": "[RM] NP 0F E1 /r"},
|
|
{"any": "psraw X:mm, imm8" , "op": "[M ] NP 0F 71 /4 ib"},
|
|
{"any": "psrld X:mm, mm/m64" , "op": "[RM] NP 0F D2 /r"},
|
|
{"any": "psrld X:mm, imm8" , "op": "[M ] NP 0F 72 /2 ib"},
|
|
{"any": "psrlq X:mm, mm/m64" , "op": "[RM] NP 0F D3 /r"},
|
|
{"any": "psrlq X:mm, imm8" , "op": "[M ] NP 0F 73 /2 ib"},
|
|
{"any": "psrlw X:mm, mm/m64" , "op": "[RM] NP 0F D1 /r"},
|
|
{"any": "psrlw X:mm, imm8" , "op": "[M ] NP 0F 71 /2 ib"},
|
|
{"any": "psubb X:mm, mm/m64" , "op": "[RM] NP 0F F8 /r"},
|
|
{"any": "psubd X:mm, mm/m64" , "op": "[RM] NP 0F FA /r"},
|
|
{"any": "psubsb X:mm, mm/m64" , "op": "[RM] NP 0F E8 /r"},
|
|
{"any": "psubsw X:mm, mm/m64" , "op": "[RM] NP 0F E9 /r"},
|
|
{"any": "psubusb X:mm, mm/m64" , "op": "[RM] NP 0F D8 /r"},
|
|
{"any": "psubusw X:mm, mm/m64" , "op": "[RM] NP 0F D9 /r"},
|
|
{"any": "psubw X:mm, mm/m64" , "op": "[RM] NP 0F F9 /r"},
|
|
{"any": "punpckhbw X:mm, mm/m64" , "op": "[RM] NP 0F 68 /r"},
|
|
{"any": "punpckhdq X:mm, mm/m64" , "op": "[RM] NP 0F 6A /r"},
|
|
{"any": "punpckhwd X:mm, mm/m64" , "op": "[RM] NP 0F 69 /r"},
|
|
{"any": "punpcklbw X:mm, mm/m32" , "op": "[RM] NP 0F 60 /r"},
|
|
{"any": "punpckldq X:mm, mm/m32" , "op": "[RM] NP 0F 62 /r"},
|
|
{"any": "punpcklwd X:mm, mm/m32" , "op": "[RM] NP 0F 61 /r"},
|
|
{"any": "pxor X:~mm, ~mm/m64" , "op": "[RM] NP 0F EF /r"}
|
|
]},
|
|
|
|
{"category": "MMX SIMD", "ext": "MMX2", "deprecated": true, "instructions": [
|
|
{"any": "maskmovq R:mm, mm, X:<m64(ds:zdi)>" , "op": "[RM] NP 0F F7 /r"},
|
|
{"any": "movntq W:m64, mm" , "op": "[MR] NP 0F E7 /r"},
|
|
{"any": "pavgb X:~mm, ~mm/m64" , "op": "[RM] NP 0F E0 /r"},
|
|
{"any": "pavgw X:~mm, ~mm/m64" , "op": "[RM] NP 0F E3 /r"},
|
|
{"any": "pextrw W:r32[15:0], mm, imm8" , "op": "[RM] NP 0F C5 /r ib"},
|
|
{"any": "pinsrw X:mm, r32[15:0]/m16, imm8" , "op": "[RM] NP 0F C4 /r ib"},
|
|
{"any": "pmaxsw X:~mm, ~mm/m64" , "op": "[RM] NP 0F EE /r"},
|
|
{"any": "pmaxub X:~mm, ~mm/m64" , "op": "[RM] NP 0F DE /r"},
|
|
{"any": "pminsw X:~mm, ~mm/m64" , "op": "[RM] NP 0F EA /r"},
|
|
{"any": "pminub X:~mm, ~mm/m64" , "op": "[RM] NP 0F DA /r"},
|
|
{"any": "pmovmskb W:r32[7:0], mm" , "op": "[RM] NP 0F D7 /r"},
|
|
{"any": "pmulhuw X:~mm, ~mm/m64" , "op": "[RM] NP 0F E4 /r"},
|
|
{"any": "psadbw X:~mm, ~mm/m64" , "op": "[RM] NP 0F F6 /r"},
|
|
{"any": "pshufw W:mm, mm/m64, imm8" , "op": "[RM] NP 0F 70 /r ib"}
|
|
]},
|
|
|
|
{"category": "MMX SIMD", "ext": "3DNOW", "deprecated": true, "instructions": [
|
|
{"any": "pavgusb X:mm, mm/m64" , "op": "[RM] 0F 0F /r BF"},
|
|
{"any": "pf2id W:mm, mm/m64" , "op": "[RM] 0F 0F /r 1D"},
|
|
{"any": "pfacc X:mm, mm/m64" , "op": "[RM] 0F 0F /r AE"},
|
|
{"any": "pfadd X:mm, mm/m64" , "op": "[RM] 0F 0F /r 9E"},
|
|
{"any": "pfcmpeq X:mm, mm/m64" , "op": "[RM] 0F 0F /r B0"},
|
|
{"any": "pfcmpge X:mm, mm/m64" , "op": "[RM] 0F 0F /r 90"},
|
|
{"any": "pfcmpgt X:mm, mm/m64" , "op": "[RM] 0F 0F /r A0"},
|
|
{"any": "pfmax X:mm, mm/m64" , "op": "[RM] 0F 0F /r A4"},
|
|
{"any": "pfmin X:mm, mm/m64" , "op": "[RM] 0F 0F /r 94"},
|
|
{"any": "pfmul X:mm, mm/m64" , "op": "[RM] 0F 0F /r B4"},
|
|
{"any": "pfrcp W:mm, mm/m64" , "op": "[RM] 0F 0F /r 96"},
|
|
{"any": "pfrcpit1 X:mm, mm/m64" , "op": "[RM] 0F 0F /r A6"},
|
|
{"any": "pfrcpit2 X:mm, mm/m64" , "op": "[RM] 0F 0F /r B6"},
|
|
{"any": "pfrsqit1 W:mm, mm/m64" , "op": "[RM] 0F 0F /r A7"},
|
|
{"any": "pfrsqrt W:mm, mm/m64" , "op": "[RM] 0F 0F /r 97"},
|
|
{"any": "pfsub X:mm, mm/m64" , "op": "[RM] 0F 0F /r 9A"},
|
|
{"any": "pfsubr X:mm, mm/m64" , "op": "[RM] 0F 0F /r AA"},
|
|
{"any": "pi2fd W:mm, mm/m64" , "op": "[RM] 0F 0F /r 0D"},
|
|
{"any": "pmulhrw X:mm, mm/m64" , "op": "[RM] 0F 0F /r B7"}
|
|
]},
|
|
|
|
{"category": "MMX SIMD", "ext": "3DNOW2", "deprecated": true, "instructions": [
|
|
{"any": "pf2iw W:mm, mm/m64" , "op": "[RM] 0F 0F /r 1C"},
|
|
{"any": "pfnacc X:mm, mm/m64" , "op": "[RM] 0F 0F /r 8A"},
|
|
{"any": "pfpnacc X:mm, mm/m64" , "op": "[RM] 0F 0F /r 8E"},
|
|
{"any": "pi2fw W:mm, mm/m64" , "op": "[RM] 0F 0F /r 0C"},
|
|
{"any": "pswapd W:mm, mm/m64" , "op": "[RM] 0F 0F /r BB"}
|
|
]},
|
|
|
|
{"category": "MMX SIMD", "ext": "GEODE", "deprecated": true, "instructions": [
|
|
{"any": "pfrcpv X:mm, mm/m64" , "op": "[RM] 0F 0F /r 86"},
|
|
{"any": "pfrsqrtv X:mm, mm/m64" , "op": "[RM] 0F 0F /r 87"}
|
|
]},
|
|
|
|
{"category": "MMX SIMD", "ext": "SSE", "deprecated": true, "instructions": [
|
|
{"any": "cvtpi2ps w:xmm[63:0], mm/m64" , "op": "[RM] NP 0F 2A /r"},
|
|
{"any": "cvtps2pi W:mm, xmm[63:0]/m64" , "op": "[RM] NP 0F 2D /r"},
|
|
{"any": "cvttps2pi W:mm, xmm[63:0]/m64" , "op": "[RM] NP 0F 2C /r"}
|
|
]},
|
|
|
|
{"category": "MMX SIMD", "ext": "SSE2", "deprecated": true, "instructions": [
|
|
{"any": "cvtpd2pi W:mm, xmm/m128" , "op": "[RM] 66 0F 2D /r"},
|
|
{"any": "cvtpi2pd W:xmm, R:mm[63:0]/m64" , "op": "[RM] 66 0F 2A /r"},
|
|
{"any": "cvttpd2pi W:mm, xmm/m128" , "op": "[RM] 66 0F 2C /r"},
|
|
{"any": "movdq2q W:mm, xmm[63:0]" , "op": "[RM] F2 0F D6 /r"},
|
|
{"any": "movq2dq W:xmm[63:0], mm" , "op": "[RM] F3 0F D6 /r"},
|
|
{"any": "paddq X:~mm, ~mm/m64" , "op": "[RM] NP 0F D4 /r"},
|
|
{"any": "pmuludq X:~mm, ~mm/m64" , "op": "[RM] NP 0F F4 /r"},
|
|
{"any": "psubq X:mm, mm/m64" , "op": "[RM] NP 0F FB /r"}
|
|
]},
|
|
|
|
{"category": "MMX SIMD", "ext": "SSSE3", "deprecated": true, "instructions": [
|
|
{"any": "pabsb W:mm, mm/m64" , "op": "[RM] NP 0F 38 1C /r"},
|
|
{"any": "pabsd W:mm, mm/m64" , "op": "[RM] NP 0F 38 1E /r"},
|
|
{"any": "pabsw W:mm, mm/m64" , "op": "[RM] NP 0F 38 1D /r"},
|
|
{"any": "palignr X:mm, mm/m64, imm8" , "op": "[RM] NP 0F 3A 0F /r ib"},
|
|
{"any": "phaddd X:~mm, ~mm/m64" , "op": "[RM] NP 0F 38 02 /r"},
|
|
{"any": "phaddsw X:~mm, ~mm/m64" , "op": "[RM] NP 0F 38 03 /r"},
|
|
{"any": "phaddw X:~mm, ~mm/m64" , "op": "[RM] NP 0F 38 01 /r"},
|
|
{"any": "phsubd X:mm, mm/m64" , "op": "[RM] NP 0F 38 06 /r"},
|
|
{"any": "phsubsw X:mm, mm/m64" , "op": "[RM] NP 0F 38 07 /r"},
|
|
{"any": "phsubw X:mm, mm/m64" , "op": "[RM] NP 0F 38 05 /r"},
|
|
{"any": "pmaddubsw X:~mm, ~mm/m64" , "op": "[RM] NP 0F 38 04 /r"},
|
|
{"any": "pmulhrsw X:~mm, ~mm/m64" , "op": "[RM] NP 0F 38 0B /r"},
|
|
{"any": "pshufb X:mm, mm/m64" , "op": "[RM] NP 0F 38 00 /r"},
|
|
{"any": "psignb X:mm, mm/m64" , "op": "[RM] NP 0F 38 08 /r"},
|
|
{"any": "psignd X:mm, mm/m64" , "op": "[RM] NP 0F 38 0A /r"},
|
|
{"any": "psignw X:mm, mm/m64" , "op": "[RM] NP 0F 38 09 /r"}
|
|
]},
|
|
|
|
{"category": "SSE STATE", "ext": "SSE", "instructions": [
|
|
{"any": "ldmxcsr R:m32" , "op": "[M ] NP 0F AE /2", "io": "MXCSR=W"},
|
|
{"any": "stmxcsr W:m32" , "op": "[M ] NP 0F AE /3", "io": "MXCSR=R"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD", "ext": "SSE", "instructions": [
|
|
{"any": "addps X:~xmm, ~xmm/m128" , "op": "[RM] NP 0F 58 /r"},
|
|
{"any": "addss x:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 58 /r"},
|
|
{"any": "andnps X:xmm, xmm/m128" , "op": "[RM] NP 0F 55 /r"},
|
|
{"any": "andps X:~xmm, ~xmm/m128" , "op": "[RM] NP 0F 54 /r"},
|
|
{"any": "cmpps X:xmm, xmm/m128, imm8" , "op": "[RM] NP 0F C2 /r ib"},
|
|
{"any": "cmpss x:xmm[31:0], xmm[31:0]/m32, imm8" , "op": "[RM] F3 0F C2 /r ib"},
|
|
{"any": "comiss R:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] NP 0F 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "cvtsi2ss w:xmm[31:0], ry/my" , "op": "[RM] F3 0F 2A /r"},
|
|
{"any": "cvtss2si W:ry, xmm[31:0]/m32" , "op": "[RM] F3 0F 2D /r"},
|
|
{"any": "cvttss2si W:ry, xmm[31:0]/m32" , "op": "[RM] F3 0F 2C /r"},
|
|
{"any": "divps X:xmm, xmm/m128" , "op": "[RM] NP 0F 5E /r"},
|
|
{"any": "divss x:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 5E /r"},
|
|
{"any": "maxps X:xmm, xmm/m128" , "op": "[RM] NP 0F 5F /r"},
|
|
{"any": "maxss x:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 5F /r"},
|
|
{"any": "minps X:xmm, xmm/m128" , "op": "[RM] NP 0F 5D /r"},
|
|
{"any": "minss x:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 5D /r"},
|
|
{"any": "movaps W:xmm, xmm/m128" , "op": "[RM] NP 0F 28 /r"},
|
|
{"any": "movaps W:xmm/m128, xmm" , "op": "[MR] NP 0F 29 /r"},
|
|
{"any": "movhlps w:xmm[63:0], xmm[127:64]" , "op": "[RM] NP 0F 12 /r"},
|
|
{"any": "movhps W:m64, xmm[127:64]" , "op": "[MR] NP 0F 17 /r"},
|
|
{"any": "movhps w:xmm[127:64], m64" , "op": "[RM] NP 0F 16 /r"},
|
|
{"any": "movlhps w:xmm[127:64], xmm[63:0]" , "op": "[RM] NP 0F 16 /r"},
|
|
{"any": "movlps W:m64, xmm[63:0]" , "op": "[MR] NP 0F 13 /r"},
|
|
{"any": "movlps w:xmm[63:0], m64" , "op": "[RM] NP 0F 12 /r"},
|
|
{"any": "movmskps W:r32[3:0], xmm" , "op": "[RM] NP 0F 50 /r"},
|
|
{"any": "movntps W:m128, xmm" , "op": "[MR] NP 0F 2B /r"},
|
|
{"any": "movss w:xmm[31:0], xmm[31:0]" , "op": "[RM] F3 0F 10 /r"},
|
|
{"any": "movss W:xmm[31:0], m32" , "op": "[RM] F3 0F 10 /r"},
|
|
{"any": "movss W:m32, xmm[31:0]" , "op": "[MR] F3 0F 11 /r"},
|
|
{"any": "movups W:xmm, xmm/m128" , "op": "[RM] NP 0F 10 /r"},
|
|
{"any": "movups W:xmm/m128, xmm" , "op": "[MR] NP 0F 11 /r"},
|
|
{"any": "mulps X:~xmm, ~xmm/m128" , "op": "[RM] NP 0F 59 /r"},
|
|
{"any": "mulss x:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 59 /r"},
|
|
{"any": "orps X:~xmm, ~xmm/m128" , "op": "[RM] NP 0F 56 /r"},
|
|
{"any": "rcpps W:xmm, xmm/m128" , "op": "[RM] NP 0F 53 /r"},
|
|
{"any": "rcpss w:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 53 /r"},
|
|
{"any": "rsqrtps W:xmm, xmm/m128" , "op": "[RM] NP 0F 52 /r"},
|
|
{"any": "rsqrtss w:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 52 /r"},
|
|
{"any": "shufps X:xmm, xmm/m128, imm8" , "op": "[RM] NP 0F C6 /r ib"},
|
|
{"any": "sqrtps W:xmm, xmm/m128" , "op": "[RM] NP 0F 51 /r"},
|
|
{"any": "sqrtss w:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 51 /r"},
|
|
{"any": "subps X:xmm, xmm/m128" , "op": "[RM] NP 0F 5C /r"},
|
|
{"any": "subss x:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 5C /r"},
|
|
{"any": "ucomiss R:xmm[31:0], xmm[31:0]/m32" , "op": "[RM] NP 0F 2E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "unpckhps X:xmm, xmm/m128" , "op": "[RM] NP 0F 15 /r"},
|
|
{"any": "unpcklps X:xmm, xmm/m128" , "op": "[RM] NP 0F 14 /r"},
|
|
{"any": "xorps X:~xmm, ~xmm/m128" , "op": "[RM] NP 0F 57 /r"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD", "ext": "SSE2", "instructions": [
|
|
{"any": "addpd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 58 /r"},
|
|
{"any": "addsd x:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] F2 0F 58 /r"},
|
|
{"any": "andnpd X:xmm, xmm/m128" , "op": "[RM] 66 0F 55 /r"},
|
|
{"any": "andpd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 54 /r"},
|
|
{"any": "cmppd X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F C2 /r ib"},
|
|
{"any": "cmpsd x:xmm[63:0], xmm[63:0]/m64, imm8" , "op": "[RM] F2 0F C2 /r ib"},
|
|
{"any": "comisd R:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] 66 0F 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "cvtdq2pd W:xmm, xmm[63:0]/m64" , "op": "[RM] F3 0F E6 /r"},
|
|
{"any": "cvtdq2ps W:xmm, xmm/m128" , "op": "[RM] NP 0F 5B /r"},
|
|
{"any": "cvtpd2dq W:xmm[63:0], xmm/m128" , "op": "[RM] F2 0F E6 /r"},
|
|
{"any": "cvtpd2ps W:xmm[63:0], xmm/m128" , "op": "[RM] 66 0F 5A /r"},
|
|
{"any": "cvtps2dq W:xmm, xmm/m128" , "op": "[RM] 66 0F 5B /r"},
|
|
{"any": "cvtps2pd W:xmm, xmm[63:0]/m64" , "op": "[RM] NP 0F 5A /r"},
|
|
{"any": "cvtsd2si W:ry, xmm[63:0]/m64" , "op": "[RM] F2 0F 2D /r"},
|
|
{"any": "cvtsd2ss w:xmm[31:0], xmm[63:0]/m64" , "op": "[RM] F2 0F 5A /r"},
|
|
{"any": "cvtsi2sd w:xmm[63:0], ry/my" , "op": "[RM] F2 0F 2A /r"},
|
|
{"any": "cvtss2sd w:xmm[63:0], xmm[31:0]/m32" , "op": "[RM] F3 0F 5A /r"},
|
|
{"any": "cvttpd2dq W:xmm[63:0], xmm/m128" , "op": "[RM] 66 0F E6 /r"},
|
|
{"any": "cvttps2dq W:xmm, xmm/m128" , "op": "[RM] F3 0F 5B /r"},
|
|
{"any": "cvttsd2si W:ry, xmm[63:0]/m64" , "op": "[RM] F2 0F 2C /r"},
|
|
{"any": "divpd X:xmm, xmm/m128" , "op": "[RM] 66 0F 5E /r"},
|
|
{"any": "divsd x:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] F2 0F 5E /r"},
|
|
{"any": "maskmovdqu R:xmm, xmm, X:<m128(ds:zdi)>" , "op": "[RM] 66 0F F7 /r"},
|
|
{"any": "maxpd X:xmm, xmm/m128" , "op": "[RM] 66 0F 5F /r"},
|
|
{"any": "maxsd x:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] F2 0F 5F /r"},
|
|
{"any": "minpd X:xmm, xmm/m128" , "op": "[RM] 66 0F 5D /r"},
|
|
{"any": "minsd x:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] F2 0F 5D /r"},
|
|
{"any": "movapd W:xmm, xmm/m128" , "op": "[RM] 66 0F 28 /r"},
|
|
{"any": "movapd W:xmm/m128, xmm" , "op": "[MR] 66 0F 29 /r"},
|
|
{"any": "movd W:r32[31:0]/m32, xmm[31:0]" , "op": "[MR] 66 0F 7E /r"},
|
|
{"any": "movd W:xmm[31:0], R:r32[31:0]/m32" , "op": "[RM] 66 0F 6E /r"},
|
|
{"any": "movdqa W:xmm, xmm/m128" , "op": "[RM] 66 0F 6F /r"},
|
|
{"any": "movdqa W:xmm/m128, xmm" , "op": "[MR] 66 0F 7F /r"},
|
|
{"any": "movdqu W:xmm, xmm/m128" , "op": "[RM] F3 0F 6F /r"},
|
|
{"any": "movdqu W:xmm/m128, xmm" , "op": "[MR] F3 0F 7F /r"},
|
|
{"any": "movhpd W:m64, xmm[127:64]" , "op": "[MR] 66 0F 17 /r"},
|
|
{"any": "movhpd w:xmm[127:64], m64" , "op": "[RM] 66 0F 16 /r"},
|
|
{"any": "movlpd W:m64, xmm[63:0]" , "op": "[MR] 66 0F 13 /r"},
|
|
{"any": "movlpd w:xmm[63:0], m64" , "op": "[RM] 66 0F 12 /r"},
|
|
{"any": "movmskpd W:r32[1:0], xmm" , "op": "[RM] 66 0F 50 /r"},
|
|
{"any": "movntdq W:m128, xmm" , "op": "[MR] 66 0F E7 /r"},
|
|
{"any": "movntpd W:m128, xmm" , "op": "[MR] 66 0F 2B /r"},
|
|
{"x64": "movq W:r64/m64, xmm[63:0]" , "op": "[MR] REX.W 66 0F 7E /r"},
|
|
{"x64": "movq W:xmm[63:0], r64[63:0]/m64" , "op": "[RM] REX.W 66 0F 6E /r"},
|
|
{"any": "movq W:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] F3 0F 7E /r"},
|
|
{"any": "movq W:xmm[63:0]/m64, xmm[63:0]" , "op": "[MR] 66 0F D6 /r"},
|
|
{"any": "movsd w:xmm[63:0], xmm[63:0]" , "op": "[RM] F2 0F 10 /r"},
|
|
{"any": "movsd W:xmm[63:0], m64" , "op": "[RM] F2 0F 10 /r"},
|
|
{"any": "movsd W:m64, xmm[63:0]" , "op": "[MR] F2 0F 11 /r"},
|
|
{"any": "movupd W:xmm, xmm/m128" , "op": "[RM] 66 0F 10 /r"},
|
|
{"any": "movupd W:xmm/m128, xmm" , "op": "[MR] 66 0F 11 /r"},
|
|
{"any": "mulpd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 59 /r"},
|
|
{"any": "mulsd x:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] F2 0F 59 /r"},
|
|
{"any": "orpd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 56 /r"},
|
|
{"any": "packssdw X:xmm, xmm/m128" , "op": "[RM] 66 0F 6B /r"},
|
|
{"any": "packsswb X:xmm, xmm/m128" , "op": "[RM] 66 0F 63 /r"},
|
|
{"any": "packuswb X:xmm, xmm/m128" , "op": "[RM] 66 0F 67 /r"},
|
|
{"any": "paddb X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F FC /r"},
|
|
{"any": "paddd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F FE /r"},
|
|
{"any": "paddq X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F D4 /r"},
|
|
{"any": "paddsb X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F EC /r"},
|
|
{"any": "paddsw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F ED /r"},
|
|
{"any": "paddusb X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F DC /r"},
|
|
{"any": "paddusw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F DD /r"},
|
|
{"any": "paddw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F FD /r"},
|
|
{"any": "pand X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F DB /r"},
|
|
{"any": "pandn X:xmm, xmm/m128" , "op": "[RM] 66 0F DF /r"},
|
|
{"any": "pavgb X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F E0 /r"},
|
|
{"any": "pavgw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F E3 /r"},
|
|
{"any": "pcmpeqb X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 74 /r"},
|
|
{"any": "pcmpeqd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 76 /r"},
|
|
{"any": "pcmpeqw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 75 /r"},
|
|
{"any": "pcmpgtb X:xmm, xmm/m128" , "op": "[RM] 66 0F 64 /r"},
|
|
{"any": "pcmpgtd X:xmm, xmm/m128" , "op": "[RM] 66 0F 66 /r"},
|
|
{"any": "pcmpgtw X:xmm, xmm/m128" , "op": "[RM] 66 0F 65 /r"},
|
|
{"any": "pextrw W:r32[15:0], xmm, imm8" , "op": "[RM] 66 0F C5 /r ib"},
|
|
{"any": "pinsrw X:xmm, r32[15:0]/m16, imm8" , "op": "[RM] 66 0F C4 /r ib"},
|
|
{"any": "pmaddwd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F F5 /r"},
|
|
{"any": "pmaxsw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F EE /r"},
|
|
{"any": "pmaxub X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F DE /r"},
|
|
{"any": "pminsw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F EA /r"},
|
|
{"any": "pminub X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F DA /r"},
|
|
{"any": "pmovmskb W:r32[15:0], xmm" , "op": "[RM] 66 0F D7 /r"},
|
|
{"any": "pmulhuw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F E4 /r"},
|
|
{"any": "pmulhw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F E5 /r"},
|
|
{"any": "pmullw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F D5 /r"},
|
|
{"any": "pmuludq X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F F4 /r"},
|
|
{"any": "por X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F EB /r"},
|
|
{"any": "psadbw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F F6 /r"},
|
|
{"any": "pshufd W:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 70 /r ib"},
|
|
{"any": "pshufhw W:xmm, xmm/m128, imm8" , "op": "[RM] F3 0F 70 /r ib"},
|
|
{"any": "pshuflw W:xmm, xmm/m128, imm8" , "op": "[RM] F2 0F 70 /r ib"},
|
|
{"any": "pslld X:xmm, xmm/m128" , "op": "[RM] 66 0F F2 /r"},
|
|
{"any": "pslld X:xmm, imm8" , "op": "[M ] 66 0F 72 /6 ib"},
|
|
{"any": "pslldq X:xmm, imm8" , "op": "[M ] 66 0F 73 /7 ib"},
|
|
{"any": "psllq X:xmm, xmm/m128" , "op": "[RM] 66 0F F3 /r"},
|
|
{"any": "psllq X:xmm, imm8" , "op": "[M ] 66 0F 73 /6 ib"},
|
|
{"any": "psllw X:xmm, xmm/m128" , "op": "[RM] 66 0F F1 /r"},
|
|
{"any": "psllw X:xmm, imm8" , "op": "[M ] 66 0F 71 /6 ib"},
|
|
{"any": "psrad X:xmm, xmm/m128" , "op": "[RM] 66 0F E2 /r"},
|
|
{"any": "psrad X:xmm, imm8" , "op": "[M ] 66 0F 72 /4 ib"},
|
|
{"any": "psraw X:xmm, xmm/m128" , "op": "[RM] 66 0F E1 /r"},
|
|
{"any": "psraw X:xmm, imm8" , "op": "[M ] 66 0F 71 /4 ib"},
|
|
{"any": "psrld X:xmm, xmm/m128" , "op": "[RM] 66 0F D2 /r"},
|
|
{"any": "psrld X:xmm, imm8" , "op": "[M ] 66 0F 72 /2 ib"},
|
|
{"any": "psrldq X:xmm, imm8" , "op": "[M ] 66 0F 73 /3 ib"},
|
|
{"any": "psrlq X:xmm, xmm/m128" , "op": "[RM] 66 0F D3 /r"},
|
|
{"any": "psrlq X:xmm, imm8" , "op": "[M ] 66 0F 73 /2 ib"},
|
|
{"any": "psrlw X:xmm, imm8" , "op": "[M ] 66 0F 71 /2 ib"},
|
|
{"any": "psrlw X:xmm, xmm/m128" , "op": "[RM] 66 0F D1 /r"},
|
|
{"any": "psubb X:xmm, xmm/m128" , "op": "[RM] 66 0F F8 /r"},
|
|
{"any": "psubd X:xmm, xmm/m128" , "op": "[RM] 66 0F FA /r"},
|
|
{"any": "psubq X:xmm, xmm/m128" , "op": "[RM] 66 0F FB /r"},
|
|
{"any": "psubsb X:xmm, xmm/m128" , "op": "[RM] 66 0F E8 /r"},
|
|
{"any": "psubsw X:xmm, xmm/m128" , "op": "[RM] 66 0F E9 /r"},
|
|
{"any": "psubusb X:xmm, xmm/m128" , "op": "[RM] 66 0F D8 /r"},
|
|
{"any": "psubusw X:xmm, xmm/m128" , "op": "[RM] 66 0F D9 /r"},
|
|
{"any": "psubw X:xmm, xmm/m128" , "op": "[RM] 66 0F F9 /r"},
|
|
{"any": "punpckhbw X:xmm, xmm/m128" , "op": "[RM] 66 0F 68 /r"},
|
|
{"any": "punpckhdq X:xmm, xmm/m128" , "op": "[RM] 66 0F 6A /r"},
|
|
{"any": "punpckhqdq X:xmm, xmm/m128" , "op": "[RM] 66 0F 6D /r"},
|
|
{"any": "punpckhwd X:xmm, xmm/m128" , "op": "[RM] 66 0F 69 /r"},
|
|
{"any": "punpcklbw X:xmm, xmm/m128" , "op": "[RM] 66 0F 60 /r"},
|
|
{"any": "punpckldq X:xmm, xmm/m128" , "op": "[RM] 66 0F 62 /r"},
|
|
{"any": "punpcklqdq X:xmm, xmm/m128" , "op": "[RM] 66 0F 6C /r"},
|
|
{"any": "punpcklwd X:xmm, xmm/m128" , "op": "[RM] 66 0F 61 /r"},
|
|
{"any": "pxor X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F EF /r"},
|
|
{"any": "shufpd X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F C6 /r ib"},
|
|
{"any": "sqrtpd W:xmm, xmm/m128" , "op": "[RM] 66 0F 51 /r"},
|
|
{"any": "sqrtsd w:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] F2 0F 51 /r"},
|
|
{"any": "subpd X:xmm, xmm/m128" , "op": "[RM] 66 0F 5C /r"},
|
|
{"any": "subsd x:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] F2 0F 5C /r"},
|
|
{"any": "ucomisd R:xmm[63:0], xmm[63:0]/m64" , "op": "[RM] 66 0F 2E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "unpckhpd X:xmm, xmm/m128" , "op": "[RM] 66 0F 15 /r"},
|
|
{"any": "unpcklpd X:xmm, xmm/m128" , "op": "[RM] 66 0F 14 /r"},
|
|
{"any": "xorpd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 57 /r"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD", "ext": "SSE3", "instructions": [
|
|
{"any": "addsubpd X:xmm, xmm/m128" , "op": "[RM] 66 0F D0 /r"},
|
|
{"any": "addsubps X:xmm, xmm/m128" , "op": "[RM] F2 0F D0 /r"},
|
|
{"any": "haddpd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 7C /r"},
|
|
{"any": "haddps X:~xmm, ~xmm/m128" , "op": "[RM] F2 0F 7C /r"},
|
|
{"any": "hsubpd X:xmm, xmm/m128" , "op": "[RM] 66 0F 7D /r"},
|
|
{"any": "hsubps X:xmm, xmm/m128" , "op": "[RM] F2 0F 7D /r"},
|
|
{"any": "lddqu W:xmm, m128" , "op": "[RM] F2 0F F0 /r"},
|
|
{"any": "movddup W:xmm, xmm[63:0]/m64" , "op": "[RM] F2 0F 12 /r"},
|
|
{"any": "movshdup W:xmm, xmm/m128" , "op": "[RM] F3 0F 16 /r"},
|
|
{"any": "movsldup W:xmm, xmm/m128" , "op": "[RM] F3 0F 12 /r"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD", "ext": "SSSE3", "instructions": [
|
|
{"any": "pabsb W:xmm, xmm/m128" , "op": "[RM] 66 0F 38 1C /r"},
|
|
{"any": "pabsd W:xmm, xmm/m128" , "op": "[RM] 66 0F 38 1E /r"},
|
|
{"any": "pabsw W:xmm, xmm/m128" , "op": "[RM] 66 0F 38 1D /r"},
|
|
{"any": "palignr X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 0F /r ib"},
|
|
{"any": "phaddd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 02 /r"},
|
|
{"any": "phaddsw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 03 /r"},
|
|
{"any": "phaddw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 01 /r"},
|
|
{"any": "phsubd X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 06 /r"},
|
|
{"any": "phsubsw X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 07 /r"},
|
|
{"any": "phsubw X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 05 /r"},
|
|
{"any": "pmaddubsw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 04 /r"},
|
|
{"any": "pmulhrsw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 0B /r"},
|
|
{"any": "pshufb X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 00 /r"},
|
|
{"any": "psignb X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 08 /r"},
|
|
{"any": "psignd X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 0A /r"},
|
|
{"any": "psignw X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 09 /r"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD", "ext": "SSE4_1", "instructions": [
|
|
{"any": "blendpd X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 0D /r ib"},
|
|
{"any": "blendps X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 0C /r ib"},
|
|
{"any": "blendvpd X:xmm, xmm/m128, <xmm0>" , "op": "[RM] 66 0F 38 15 /r"},
|
|
{"any": "blendvps X:xmm, xmm/m128, <xmm0>" , "op": "[RM] 66 0F 38 14 /r"},
|
|
{"any": "dppd X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 41 /r ib"},
|
|
{"any": "dpps X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 40 /r ib"},
|
|
{"any": "extractps W:r32/m32, xmm, imm8" , "op": "[MR] 66 0F 3A 17 /r ib"},
|
|
{"any": "insertps X:xmm, xmm[31:0]/m32, imm8" , "op": "[RM] 66 0F 3A 21 /r ib"},
|
|
{"any": "movntdqa W:xmm, m128" , "op": "[RM] 66 0F 38 2A /r"},
|
|
{"any": "mpsadbw X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 42 /r ib"},
|
|
{"any": "packusdw X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 2B /r"},
|
|
{"any": "pblendvb X:xmm, xmm/m128, <xmm0>" , "op": "[RM] 66 0F 38 10 /r"},
|
|
{"any": "pblendw X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 0E /r ib"},
|
|
{"any": "pcmpeqq X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 29 /r"},
|
|
{"any": "pextrb W:r32[7:0]/m8, xmm, imm8" , "op": "[MR] 66 0F 3A 14 /r ib"},
|
|
{"any": "pextrd W:r32[31:0]/m32, xmm, imm8" , "op": "[MR] 66 0F 3A 16 /r ib"},
|
|
{"any": "pextrq W:r64/m64, xmm, imm8" , "op": "[MR] REX.W 66 0F 3A 16 /r ib"},
|
|
{"any": "pextrw W:r32[15:0]/m16, xmm, imm8" , "op": "[MR] 66 0F 3A 15 /r ib"},
|
|
{"any": "phminposuw W:xmm[18:0], xmm/m128" , "op": "[RM] 66 0F 38 41 /r"},
|
|
{"any": "pinsrb X:xmm, r32[7:0]/m8, imm8" , "op": "[RM] 66 0F 3A 20 /r ib"},
|
|
{"any": "pinsrd X:xmm, r32[31:0]/m32, imm8" , "op": "[RM] 66 0F 3A 22 /r ib"},
|
|
{"any": "pinsrq X:xmm, r64/m64, imm8" , "op": "[RM] REX.W 66 0F 3A 22 /r ib"},
|
|
{"any": "pmaxsb X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 3C /r"},
|
|
{"any": "pmaxsd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 3D /r"},
|
|
{"any": "pmaxud X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 3F /r"},
|
|
{"any": "pmaxuw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 3E /r"},
|
|
{"any": "pminsb X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 38 /r"},
|
|
{"any": "pminsd X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 39 /r"},
|
|
{"any": "pminud X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 3B /r"},
|
|
{"any": "pminuw X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 3A /r"},
|
|
{"any": "pmovsxbd W:xmm, xmm[31:0]/m32" , "op": "[RM] 66 0F 38 21 /r"},
|
|
{"any": "pmovsxbq W:xmm, xmm[15:0]/m16" , "op": "[RM] 66 0F 38 22 /r"},
|
|
{"any": "pmovsxbw W:xmm, xmm[63:0]/m64" , "op": "[RM] 66 0F 38 20 /r"},
|
|
{"any": "pmovsxdq W:xmm, xmm[63:0]/m64" , "op": "[RM] 66 0F 38 25 /r"},
|
|
{"any": "pmovsxwd W:xmm, xmm[63:0]/m64" , "op": "[RM] 66 0F 38 23 /r"},
|
|
{"any": "pmovsxwq W:xmm, xmm[31:0]/m32" , "op": "[RM] 66 0F 38 24 /r"},
|
|
{"any": "pmovzxbd W:xmm, xmm[31:0]/m32" , "op": "[RM] 66 0F 38 31 /r"},
|
|
{"any": "pmovzxbq W:xmm, xmm[15:0]/m16" , "op": "[RM] 66 0F 38 32 /r"},
|
|
{"any": "pmovzxbw W:xmm, xmm[63:0]/m64" , "op": "[RM] 66 0F 38 30 /r"},
|
|
{"any": "pmovzxdq W:xmm, xmm[63:0]/m64" , "op": "[RM] 66 0F 38 35 /r"},
|
|
{"any": "pmovzxwd W:xmm, xmm[63:0]/m64" , "op": "[RM] 66 0F 38 33 /r"},
|
|
{"any": "pmovzxwq W:xmm, xmm[31:0]/m32" , "op": "[RM] 66 0F 38 34 /r"},
|
|
{"any": "pmuldq X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 28 /r"},
|
|
{"any": "pmulld X:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 40 /r"},
|
|
{"any": "ptest R:~xmm, ~xmm/m128" , "op": "[RM] 66 0F 38 17 /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "roundpd W:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 09 /r ib"},
|
|
{"any": "roundps W:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 08 /r ib"},
|
|
{"any": "roundsd w:xmm[63:0], xmm[63:0]/m64, imm8" , "op": "[RM] 66 0F 3A 0B /r ib"},
|
|
{"any": "roundss w:xmm[31:0], xmm[31:0]/m32, imm8" , "op": "[RM] 66 0F 3A 0A /r ib"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD", "ext": "SSE4_2", "instructions": [
|
|
{"any": "pcmpestri R:xmm, xmm/m128, imm8, W:<ecx>, <eax>, <edx>" , "op": "[RM] 66 0F 3A 61 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "pcmpestrm R:xmm, xmm/m128, imm8, W:<xmm0>, <eax>, <edx>" , "op": "[RM] 66 0F 3A 60 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "pcmpgtq X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 37 /r"},
|
|
{"any": "pcmpistri R:xmm, xmm/m128, imm8, W:<ecx>" , "op": "[RM] 66 0F 3A 63 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "pcmpistrm R:xmm, xmm/m128, imm8, W:<xmm0>" , "op": "[RM] 66 0F 3A 62 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD", "ext": "SSE4A", "instructions": [
|
|
{"any": "extrq X:xmm, imm8, imm8" , "op": "[R ] 66 0F 78 /0 ib ib"},
|
|
{"any": "extrq X:xmm, xmm" , "op": "[RM] 66 0F 79 /r"},
|
|
{"any": "insertq X:xmm, xmm" , "op": "[RM] F2 0F 79 /r"},
|
|
{"any": "insertq X:xmm, xmm, imm8, imm8" , "op": "[RM] F2 0F 78 /r ib ib"},
|
|
{"any": "movntsd W:m64, xmm[63:0]" , "op": "[RM] F2 0F 2B /r"},
|
|
{"any": "movntss W:m32, xmm[31:0]" , "op": "[RM] F3 0F 2B /r"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD CRYPTO_HASH", "ext": "KL", "instructions": [
|
|
{"any": "loadiwkey R:xmm, R:xmm, R:<eax>, R:<xmm0>" , "op": "[RM] F3 0F 38 DC 11:rrr:bbb" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD CRYPTO_HASH", "ext": "AESKLE", "instructions": [
|
|
{"any": "aesdec128kl X:xmm, R:m384" , "op": "[RM] F3 0F 38 DD !(11):rrr:bbb", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"any": "aesdec256kl X:xmm, R:m512" , "op": "[RM] F3 0F 38 DF !(11):rrr:bbb", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"any": "aesenc128kl X:xmm, R:m384" , "op": "[RM] F3 0F 38 DC !(11):rrr:bbb", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"any": "aesenc256kl X:xmm, R:m512" , "op": "[RM] F3 0F 38 DE !(11):rrr:bbb", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"___": "encodekey128 W:r32, R:r32, X:<xmm0>, W:<xmm1-6>" , "op": "[RM] F3 0F 38 FA 11:rrr:bbb" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=0"},
|
|
{"___": "encodekey256 W:r32, R:r32, X:<xmm0-1>, W:<xmm2-6>" , "op": "[RM] F3 0F 38 FB 11:rrr:bbb" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=0"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD CRYPTO_HASH", "ext": "AESKLEWIDE_KL", "instructions": [
|
|
{"___": "aesdecwide128kl R:m384, X:<xmm0-7>" , "op": "[RM] F3 0F 38 D8 !(11):001:bbb", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"___": "aesdecwide256kl R:m512, X:<xmm0-7>" , "op": "[RM] F3 0F 38 D8 !(11):011:bbb", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"___": "aesencwide128kl R:m384, X:<xmm0-7>" , "op": "[RM] F3 0F 38 D8 !(11):000:bbb", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
|
|
{"___": "aesencwide256kl R:m512, X:<xmm0-7>" , "op": "[RM] F3 0F 38 D8 !(11):010:bbb", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD CRYPTO_HASH", "ext": "AESNI", "instructions": [
|
|
{"any": "aesdec X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 DE /r"},
|
|
{"any": "aesdeclast X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 DF /r"},
|
|
{"any": "aesenc X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 DC /r"},
|
|
{"any": "aesenclast X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 DD /r"},
|
|
{"any": "aesimc W:xmm, xmm/m128" , "op": "[RM] 66 0F 38 DB /r"},
|
|
{"any": "aeskeygenassist W:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A DF /r ib"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD", "ext": "GFNI", "instructions": [
|
|
{"any": "gf2p8affineinvqb X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A CF /r ib"},
|
|
{"any": "gf2p8affineqb X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A CE /r ib"},
|
|
{"any": "gf2p8mulb X:xmm, xmm/m128" , "op": "[RM] 66 0F 38 CF /r"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD", "ext": "PCLMULQDQ", "instructions": [
|
|
{"any": "pclmulqdq X:xmm, xmm/m128, imm8" , "op": "[RM] 66 0F 3A 44 /r ib"}
|
|
]},
|
|
|
|
{"category": "SSE SIMD CRYPTO_HASH", "ext": "SHA", "instructions": [
|
|
{"any": "sha1msg1 xmm, xmm/m128" , "op": "[RM] NP 0F 38 C9 /r"},
|
|
{"any": "sha1msg2 xmm, xmm/m128" , "op": "[RM] NP 0F 38 CA /r"},
|
|
{"any": "sha1nexte xmm, xmm/m128" , "op": "[RM] NP 0F 38 C8 /r"},
|
|
{"any": "sha1rnds4 xmm, xmm/m128, imm8" , "op": "[RM] NP 0F 3A CC /r ib"},
|
|
{"any": "sha256msg1 xmm, xmm/m128" , "op": "[RM] NP 0F 38 CC /r"},
|
|
{"any": "sha256msg2 xmm, xmm/m128" , "op": "[RM] NP 0F 38 CD /r"},
|
|
{"any": "sha256rnds2 xmm, xmm/m128, <xmm0>" , "op": "[RM] NP 0F 38 CB /r"}
|
|
]},
|
|
|
|
{"category": "AVX STATE", "ext": "AVX", "instructions": [
|
|
{"any": "vldmxcsr R:m32" , "op": "[M ] VEX.LZ.NP.0F.WIG AE /2", "io": "MXCSR=W"},
|
|
{"any": "vstmxcsr W:m32" , "op": "[M ] VEX.LZ.NP.0F.WIG AE /3", "io": "MXCSR=R"},
|
|
{"any": "vzeroall" , "op": "[OP ] VEX.256.NP.0F.WIG 77", "volatile": true},
|
|
{"any": "vzeroupper" , "op": "[OP ] VEX.128.NP.0F.WIG 77", "volatile": true}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "AVX", "instructions": [
|
|
{"any": "vaddpd W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 58 /r"},
|
|
{"any": "vaddps W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 58 /r"},
|
|
{"any": "vaddsd W:xmm, xmm, xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.F2.0F.WIG 58 /r"},
|
|
{"any": "vaddss W:xmm, xmm, xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 58 /r"},
|
|
{"any": "vaddsubpd W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG D0 /r"},
|
|
{"any": "vaddsubps W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.F2.0F.WIG D0 /r"},
|
|
{"any": "vandnpd W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 55 /r"},
|
|
{"any": "vandnps W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 55 /r"},
|
|
{"any": "vandpd W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 54 /r"},
|
|
{"any": "vandps W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 54 /r"},
|
|
{"any": "vblendpd W:xy, xy, xy/mxy, imm8" , "op": "[RVM] VEX.Lxy.66.0F3A.WIG 0D /r ib"},
|
|
{"any": "vblendps W:xy, xy, xy/mxy, imm8" , "op": "[RVM] VEX.Lxy.66.0F3A.WIG 0C /r ib"},
|
|
{"any": "vblendvpd W:xy, xy, xy/mxy, xy" , "op": "[RVMS]VEX.Lxy.66.0F3A.W0 4B /r /is4"},
|
|
{"any": "vblendvps W:xy, xy, xy/mxy, xy" , "op": "[RVMS]VEX.Lxy.66.0F3A.W0 4A /r /is4"},
|
|
{"any": "vbroadcastf128 W:ymm, m128" , "op": "[RM ] VEX.256.66.0F38.W0 1A /r"},
|
|
{"any": "vbroadcastsd W:ymm, m64" , "op": "[RM ] VEX.256.66.0F38.W0 19 /r"},
|
|
{"any": "vbroadcastss W:xy, m32" , "op": "[RM ] VEX.Lxy.66.0F38.W0 18 /r"},
|
|
{"any": "vcmppd W:xy, xy, xy/mxy, imm8" , "op": "[RVM] VEX.Lxy.66.0F.WIG C2 /r ib"},
|
|
{"any": "vcmpps W:xy, xy, xy/mxy, imm8" , "op": "[RVM] VEX.Lxy.NP.0F.WIG C2 /r ib"},
|
|
{"any": "vcmpsd W:xmm, xmm, xmm[63:0]/m64, imm8" , "op": "[RVM] VEX.LIG.F2.0F.WIG C2 /r ib"},
|
|
{"any": "vcmpss W:xmm, xmm, xmm[31:0]/m32, imm8" , "op": "[RVM] VEX.LIG.F3.0F.WIG C2 /r ib"},
|
|
{"any": "vcomisd R:xmm[63:0], xmm[63:0]/m64" , "op": "[RM ] VEX.LIG.66.0F.WIG 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vcomiss R:xmm[31:0], xmm[31:0]/m32" , "op": "[RM ] VEX.LIG.NP.0F.WIG 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vcvtdq2pd W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.F3.0F.WIG E6 /r"},
|
|
{"any": "vcvtdq2pd W:ymm, xmm/m128" , "op": "[RM ] VEX.256.F3.0F.WIG E6 /r"},
|
|
{"any": "vcvtdq2ps W:xmm, xmm/m128" , "op": "[RM ] VEX.128.NP.0F.WIG 5B /r"},
|
|
{"any": "vcvtdq2ps W:ymm, ymm/m256" , "op": "[RM ] VEX.256.NP.0F.WIG 5B /r"},
|
|
{"any": "vcvtpd2dq W:xmm[63:0], xmm/m128" , "op": "[RM ] VEX.128.F2.0F.WIG E6 /r"},
|
|
{"any": "vcvtpd2dq W:xmm, ymm/m256" , "op": "[RM ] VEX.256.F2.0F.WIG E6 /r"},
|
|
{"any": "vcvtpd2ps W:xmm[63:0], xmm/m128" , "op": "[RM ] VEX.128.66.0F.WIG 5A /r"},
|
|
{"any": "vcvtpd2ps W:xmm, ymm/m256" , "op": "[RM ] VEX.256.66.0F.WIG 5A /r"},
|
|
{"any": "vcvtps2dq W:xmm, xmm/m128" , "op": "[RM ] VEX.128.66.0F.WIG 5B /r"},
|
|
{"any": "vcvtps2dq W:ymm, ymm/m256" , "op": "[RM ] VEX.256.66.0F.WIG 5B /r"},
|
|
{"any": "vcvtps2pd W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.NP.0F.WIG 5A /r"},
|
|
{"any": "vcvtps2pd W:ymm, xmm/m128" , "op": "[RM ] VEX.256.NP.0F.WIG 5A /r"},
|
|
{"any": "vcvtsd2si W:ry, xmm[63:0]/m64" , "op": "[RM ] VEX.LIG.F2.0F.Wy 2D /r"},
|
|
{"any": "vcvtsd2ss W:xmm, xmm[127:32], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.F2.0F.WIG 5A /r"},
|
|
{"any": "vcvtsi2sd W:xmm, xmm[127:64], ry/my" , "op": "[RVM] VEX.LIG.F2.0F.Wy 2A /r"},
|
|
{"any": "vcvtsi2ss W:xmm, xmm[127:32], ry/my" , "op": "[RVM] VEX.LIG.F3.0F.Wy 2A /r"},
|
|
{"any": "vcvtss2sd W:xmm, xmm[127:64], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 5A /r"},
|
|
{"any": "vcvtss2si W:ry, xmm[31:0]/m32" , "op": "[RM ] VEX.LIG.F3.0F.Wy 2D /r"},
|
|
{"any": "vcvttpd2dq W:xmm[63:0], xmm/m128" , "op": "[RM ] VEX.128.66.0F.WIG E6 /r"},
|
|
{"any": "vcvttpd2dq W:xmm, ymm/m256" , "op": "[RM ] VEX.256.66.0F.WIG E6 /r"},
|
|
{"any": "vcvttps2dq W:xmm, xmm/m128" , "op": "[RM ] VEX.128.F3.0F.WIG 5B /r"},
|
|
{"any": "vcvttps2dq W:ymm, ymm/m256" , "op": "[RM ] VEX.256.F3.0F.WIG 5B /r"},
|
|
{"any": "vcvttsd2si W:ry, xmm[63:0]/m64" , "op": "[RM ] VEX.LIG.F2.0F.Wy 2C /r"},
|
|
{"any": "vcvttss2si W:ry, xmm[31:0]/m32" , "op": "[RM ] VEX.LIG.F3.0F.Wy 2C /r"},
|
|
{"any": "vdivpd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 5E /r"},
|
|
{"any": "vdivpd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 5E /r"},
|
|
{"any": "vdivps W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.NP.0F.WIG 5E /r"},
|
|
{"any": "vdivps W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.NP.0F.WIG 5E /r"},
|
|
{"any": "vdivsd W:xmm, xmm, xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.F2.0F.WIG 5E /r"},
|
|
{"any": "vdivss W:xmm, xmm, xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 5E /r"},
|
|
{"any": "vdppd W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] VEX.128.66.0F3A.WIG 41 /r ib"},
|
|
{"any": "vdpps W:xy, xy, xy/mxy, imm8" , "op": "[RVM] VEX.Lxy.66.0F3A.WIG 40 /r ib"},
|
|
{"any": "vextractps W:r32[31:0]/m32, xmm, imm8" , "op": "[MR ] VEX.128.66.0F3A.WIG 17 /r ib"},
|
|
{"any": "vextractf128 W:xmm/m128, ymm, imm8" , "op": "[MR ] VEX.256.66.0F3A.W0 19 /r ib"},
|
|
{"any": "vhaddpd W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 7C /r"},
|
|
{"any": "vhaddps W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.F2.0F.WIG 7C /r"},
|
|
{"any": "vhsubpd W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 7D /r"},
|
|
{"any": "vhsubps W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.F2.0F.WIG 7D /r"},
|
|
{"any": "vinsertf128 W:ymm, ymm, xmm/m128, imm8" , "op": "[RVM] VEX.256.66.0F3A.W0 18 /r ib"},
|
|
{"any": "vinsertps W:xmm, xmm, xmm[31:0]/m32, imm8" , "op": "[RVM] VEX.128.66.0F3A.WIG 21 /r ib"},
|
|
{"any": "vlddqu W:xy, mxy" , "op": "[RM ] VEX.Lxy.F2.0F.WIG F0 /r"},
|
|
{"any": "vmaskmovdqu R:xmm, xmm, X:<m128(ds:zdi)>" , "op": "[RM ] VEX.128.66.0F.WIG F7 /r"},
|
|
{"any": "vmaskmovpd X:mxy, xy, xy" , "op": "[MVR] VEX.Lxy.66.0F38.W0 2F /r"},
|
|
{"any": "vmaskmovpd W:xy, xy, mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 2D /r"},
|
|
{"any": "vmaskmovps X:mxy, xy, xy" , "op": "[MVR] VEX.Lxy.66.0F38.W0 2E /r"},
|
|
{"any": "vmaskmovps W:xy, xy, mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 2C /r"},
|
|
{"any": "vmaxpd W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 5F /r"},
|
|
{"any": "vmaxps W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 5F /r"},
|
|
{"any": "vmaxsd W:xmm, xmm, xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.F2.0F.WIG 5F /r"},
|
|
{"any": "vmaxss W:xmm, xmm, xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 5F /r"},
|
|
{"any": "vminpd W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 5D /r"},
|
|
{"any": "vminps W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 5D /r"},
|
|
{"any": "vminsd W:xmm, xmm, xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.F2.0F.WIG 5D /r"},
|
|
{"any": "vminss W:xmm, xmm, xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 5D /r"},
|
|
{"any": "vmovapd W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.66.0F.WIG 28 /r"},
|
|
{"any": "vmovapd W:xy/mxy, xy" , "op": "[MR ] VEX.Lxy.66.0F.WIG 29 /r"},
|
|
{"any": "vmovaps W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.NP.0F.WIG 28 /r"},
|
|
{"any": "vmovaps W:xy/mxy, xy" , "op": "[MR ] VEX.Lxy.NP.0F.WIG 29 /r"},
|
|
{"any": "vmovd W:r32[31:0]/m32, xmm[31:0]" , "op": "[MR ] VEX.128.66.0F.W0 7E /r"},
|
|
{"any": "vmovd W:xmm[31:0], r32[31:0]/m32" , "op": "[RM ] VEX.128.66.0F.W0 6E /r"},
|
|
{"any": "vmovddup W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.F2.0F.WIG 12 /r"},
|
|
{"any": "vmovddup W:ymm, ymm/m256" , "op": "[RM ] VEX.256.F2.0F.WIG 12 /r"},
|
|
{"any": "vmovdqa W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.66.0F.WIG 6F /r"},
|
|
{"any": "vmovdqa W:xy/mxy, xy" , "op": "[MR ] VEX.Lxy.66.0F.WIG 7F /r"},
|
|
{"any": "vmovdqu W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.F3.0F.WIG 6F /r"},
|
|
{"any": "vmovdqu W:xy/mxy, xy" , "op": "[MR ] VEX.Lxy.F3.0F.WIG 7F /r"},
|
|
{"any": "vmovhlps W:xmm, xmm[127:64], xmm[127:64]" , "op": "[RVM] VEX.128.NP.0F.WIG 12 /r"},
|
|
{"any": "vmovhpd W:m64, xmm[127:64]" , "op": "[MR ] VEX.128.66.0F.WIG 17 /r"},
|
|
{"any": "vmovhpd W:xmm, xmm[63:0], m64" , "op": "[RVM] VEX.128.66.0F.WIG 16 /r"},
|
|
{"any": "vmovhps W:m64, xmm[127:64]" , "op": "[MR ] VEX.128.NP.0F.WIG 17 /r"},
|
|
{"any": "vmovhps W:xmm, xmm[63:0], m64" , "op": "[RVM] VEX.128.NP.0F.WIG 16 /r"},
|
|
{"any": "vmovlhps W:xmm, xmm[63:0], xmm[63:0]" , "op": "[RVM] VEX.128.NP.0F.WIG 16 /r"},
|
|
{"any": "vmovlpd W:m64, xmm[63:0]" , "op": "[MR ] VEX.128.66.0F.WIG 13 /r"},
|
|
{"any": "vmovlpd W:xmm, xmm[127:64], m64" , "op": "[RVM] VEX.128.66.0F.WIG 12 /r"},
|
|
{"any": "vmovlps W:m64, xmm[63:0]" , "op": "[MR ] VEX.128.NP.0F.WIG 13 /r"},
|
|
{"any": "vmovlps W:xmm, xmm[127:64], m64" , "op": "[RVM] VEX.128.NP.0F.WIG 12 /r"},
|
|
{"any": "vmovmskpd W:r32[1:0], xmm" , "op": "[RM ] VEX.128.66.0F.WIG 50 /r"},
|
|
{"any": "vmovmskpd W:r32[3:0], ymm" , "op": "[RM ] VEX.256.66.0F.WIG 50 /r"},
|
|
{"any": "vmovmskps W:r32[3:0], xmm" , "op": "[RM ] VEX.128.NP.0F.WIG 50 /r"},
|
|
{"any": "vmovmskps W:r32[7:0], ymm" , "op": "[RM ] VEX.256.NP.0F.WIG 50 /r"},
|
|
{"any": "vmovntdq W:mxy, xy" , "op": "[MR ] VEX.Lxy.66.0F.WIG E7 /r"},
|
|
{"any": "vmovntdqa W:xmm, m128" , "op": "[RM ] VEX.128.66.0F38.WIG 2A /r"},
|
|
{"any": "vmovntpd W:mxy, xy" , "op": "[MR ] VEX.Lxy.66.0F.WIG 2B /r"},
|
|
{"any": "vmovntps W:mxy, xy" , "op": "[MR ] VEX.Lxy.NP.0F.WIG 2B /r"},
|
|
{"any": "vmovq W:r64/m64, xmm[63:0]" , "op": "[MR ] VEX.128.66.0F.W1 7E /r"},
|
|
{"any": "vmovq W:xmm[63:0], xmm[63:0]/m64" , "op": "[RM ] VEX.128.F3.0F.WIG 7E /r"},
|
|
{"any": "vmovq W:xmm[63:0], r64/m64" , "op": "[RM ] VEX.128.66.0F.W1 6E /r"},
|
|
{"any": "vmovq W:xmm[63:0]/m64, xmm[63:0]" , "op": "[MR ] VEX.128.66.0F.WIG D6 /r"},
|
|
{"any": "vmovsd W:m64, xmm[63:0]" , "op": "[MR ] VEX.LIG.F2.0F.WIG 11 /r"},
|
|
{"any": "vmovsd W:xmm[63:0], m64" , "op": "[RM ] VEX.LIG.F2.0F.WIG 10 /r"},
|
|
{"any": "vmovsd W:xmm, xmm[127:64], xmm[63:0]" , "op": "[MVR] VEX.LIG.F2.0F.WIG 11 /r"},
|
|
{"any": "vmovsd W:xmm, xmm[127:64], xmm[63:0]" , "op": "[RVM] VEX.LIG.F2.0F.WIG 10 /r"},
|
|
{"any": "vmovshdup W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.F3.0F.WIG 16 /r"},
|
|
{"any": "vmovsldup W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.F3.0F.WIG 12 /r"},
|
|
{"any": "vmovss W:m32, xmm[31:0]" , "op": "[MR ] VEX.LIG.F3.0F.WIG 11 /r"},
|
|
{"any": "vmovss W:xmm[31:0], m32" , "op": "[RM ] VEX.LIG.F3.0F.WIG 10 /r"},
|
|
{"any": "vmovss W:xmm, xmm[127:32], xmm[31:0]" , "op": "[MVR] VEX.LIG.F3.0F.WIG 11 /r"},
|
|
{"any": "vmovss W:xmm, xmm[127:32], xmm[31:0]" , "op": "[RVM] VEX.LIG.F3.0F.WIG 10 /r"},
|
|
{"any": "vmovupd W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.NP.0F.WIG 10 /r"},
|
|
{"any": "vmovupd W:xy/mxy, xy" , "op": "[MR ] VEX.Lxy.NP.0F.WIG 11 /r"},
|
|
{"any": "vmovups W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.66.0F.WIG 10 /r"},
|
|
{"any": "vmovups W:xy/mxy, xy" , "op": "[MR ] VEX.Lxy.66.0F.WIG 11 /r"},
|
|
{"any": "vmpsadbw W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] VEX.128.66.0F3A.WIG 42 /r ib"},
|
|
{"any": "vmulpd W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 59 /r"},
|
|
{"any": "vmulps W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 59 /r"},
|
|
{"any": "vmulsd W:xmm, xmm, xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.F2.0F.WIG 59 /r"},
|
|
{"any": "vmulss W:xmm, xmm, xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 59 /r"},
|
|
{"any": "vorpd W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 56 /r"},
|
|
{"any": "vorps W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 56 /r"},
|
|
{"any": "vpabsb W:xmm, xmm/m128" , "op": "[RM ] VEX.128.66.0F38.WIG 1C /r"},
|
|
{"any": "vpabsd W:xmm, xmm/m128" , "op": "[RM_] VEX.128.66.0F38.WIG 1E /r"},
|
|
{"any": "vpabsw W:xmm, xmm/m128" , "op": "[RM ] VEX.128.66.0F38.WIG 1D /r"},
|
|
{"any": "vpackssdw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 6B /r"},
|
|
{"any": "vpacksswb W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 63 /r"},
|
|
{"any": "vpackusdw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 2B /r"},
|
|
{"any": "vpackuswb W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 67 /r"},
|
|
{"any": "vpaddb W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG FC /r"},
|
|
{"any": "vpaddd W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG FE /r"},
|
|
{"any": "vpaddq W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG D4 /r"},
|
|
{"any": "vpaddsb W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG EC /r"},
|
|
{"any": "vpaddsw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG ED /r"},
|
|
{"any": "vpaddusb W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG DC /r"},
|
|
{"any": "vpaddusw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG DD /r"},
|
|
{"any": "vpaddw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG FD /r"},
|
|
{"any": "vpalignr W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] VEX.128.66.0F3A.WIG 0F /r ib"},
|
|
{"any": "vpand W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG DB /r"},
|
|
{"any": "vpandn W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG DF /r"},
|
|
{"any": "vpavgb W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG E0 /r"},
|
|
{"any": "vpavgw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG E3 /r"},
|
|
{"any": "vpblendvb W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]VEX.128.66.0F3A.W0 4C /r /is4"},
|
|
{"any": "vpblendw W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] VEX.128.66.0F3A.WIG 0E /r ib"},
|
|
{"any": "vpcmpeqb W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 74 /r"},
|
|
{"any": "vpcmpeqd W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 76 /r"},
|
|
{"any": "vpcmpeqq W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 29 /r"},
|
|
{"any": "vpcmpeqw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 75 /r"},
|
|
{"any": "vpcmpestri R:xmm, xmm/m128, imm8, W:<ecx>, <eax>, <edx>" , "op": "[RM ] VEX.128.66.0F3A.WIG 61 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "vpcmpestrm R:xmm, xmm/m128, imm8, W:<xmm0>, <eax>, <edx>" , "op": "[RM ] VEX.128.66.0F3A.WIG 60 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "vpcmpgtb W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 64 /r"},
|
|
{"any": "vpcmpgtd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 66 /r"},
|
|
{"any": "vpcmpgtq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 37 /r"},
|
|
{"any": "vpcmpgtw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 65 /r"},
|
|
{"any": "vpcmpistri R:xmm, xmm/m128, imm8, W:<ecx>" , "op": "[RM ] VEX.128.66.0F3A.WIG 63 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "vpcmpistrm R:xmm, xmm/m128, imm8, W:<xmm0>" , "op": "[RM ] VEX.128.66.0F3A.WIG 62 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "vperm2f128 W:ymm, ymm, ymm/m256, imm8" , "op": "[RVM] VEX.256.66.0F3A.W0 06 /r ib"},
|
|
{"any": "vpermilpd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.W0 0D /r"},
|
|
{"any": "vpermilpd W:xmm, xmm/m128, imm8" , "op": "[RM ] VEX.128.66.0F3A.W0 05 /r ib"},
|
|
{"any": "vpermilpd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.W0 0D /r"},
|
|
{"any": "vpermilpd W:ymm, ymm/m256, imm8" , "op": "[RM ] VEX.256.66.0F3A.W0 05 /r ib"},
|
|
{"any": "vpermilps W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.W0 0C /r"},
|
|
{"any": "vpermilps W:xmm, xmm/m128, imm8" , "op": "[RM ] VEX.128.66.0F3A.W0 04 /r ib"},
|
|
{"any": "vpermilps W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.W0 0C /r"},
|
|
{"any": "vpermilps W:ymm, ymm/m256, imm8" , "op": "[RM ] VEX.256.66.0F3A.W0 04 /r ib"},
|
|
{"any": "vpextrb W:r32[7:0]/m8, xmm, imm8" , "op": "[MR ] VEX.128.66.0F3A.W0 14 /r ib"},
|
|
{"any": "vpextrd W:r32/m32, xmm, imm8" , "op": "[MR ] VEX.128.66.0F3A.W0 16 /r ib"},
|
|
{"any": "vpextrq W:r64/m64, xmm, imm8" , "op": "[MR ] VEX.128.66.0F3A.W1 16 /r ib"},
|
|
{"any": "vpextrw W:r32[15:0], xmm, imm8" , "op": "[RM ] VEX.128.66.0F.W0 C5 /r ib"},
|
|
{"any": "vpextrw W:r32[15:0]/m16, xmm, imm8" , "op": "[MR ] VEX.128.66.0F3A.W0 15 /r ib"},
|
|
{"any": "vphaddd W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 02 /r"},
|
|
{"any": "vphaddsw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 03 /r"},
|
|
{"any": "vphaddw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 01 /r"},
|
|
{"any": "vphminposuw W:xmm[18:0], xmm/m128" , "op": "[RM ] VEX.128.66.0F38.WIG 41 /r"},
|
|
{"any": "vphsubd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 06 /r"},
|
|
{"any": "vphsubsw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 07 /r"},
|
|
{"any": "vphsubw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 05 /r"},
|
|
{"any": "vpinsrb W:xmm, xmm, r32[7:0]/m8, imm8" , "op": "[RVM] VEX.128.66.0F3A.W0 20 /r ib"},
|
|
{"any": "vpinsrd W:xmm, xmm, r32/m32, imm8" , "op": "[RVM] VEX.128.66.0F3A.W0 22 /r ib"},
|
|
{"any": "vpinsrq W:xmm, xmm, r64/m64, imm8" , "op": "[RVM] VEX.128.66.0F3A.W1 22 /r ib"},
|
|
{"any": "vpinsrw W:xmm, xmm, r32[15:0]/m16, imm8" , "op": "[RVM] VEX.128.66.0F.W0 C4 /r ib"},
|
|
{"any": "vpmaddubsw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 04 /r"},
|
|
{"any": "vpmaddwd W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG F5 /r"},
|
|
{"any": "vpmaxsb W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 3C /r"},
|
|
{"any": "vpmaxsd W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 3D /r"},
|
|
{"any": "vpmaxsw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG EE /r"},
|
|
{"any": "vpmaxub W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG DE /r"},
|
|
{"any": "vpmaxud W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 3F /r"},
|
|
{"any": "vpmaxuw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 3E /r"},
|
|
{"any": "vpminsb W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 38 /r"},
|
|
{"any": "vpminsd W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 39 /r"},
|
|
{"any": "vpminsw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG EA /r"},
|
|
{"any": "vpminub W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG DA /r"},
|
|
{"any": "vpminud W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 3B /r"},
|
|
{"any": "vpminuw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 3A /r"},
|
|
{"any": "vpmovmskb W:r32[15:0], xmm" , "op": "[RVM] VEX.128.66.0F.WIG D7 /r"},
|
|
{"any": "vpmovsxwq W:xmm, xmm[31:0]/m32" , "op": "[RM ] VEX.128.66.0F38.WIG 24 /r"},
|
|
{"any": "vpmovsxbd W:xmm, xmm[31:0]/m32" , "op": "[RM ] VEX.128.66.0F38.WIG 21 /r"},
|
|
{"any": "vpmovsxbq W:xmm, xmm[15:0]/m16" , "op": "[RM ] VEX.128.66.0F38.WIG 22 /r"},
|
|
{"any": "vpmovsxbw W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.66.0F38.WIG 20 /r"},
|
|
{"any": "vpmovsxdq W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.66.0F38.WIG 25 /r"},
|
|
{"any": "vpmovsxwd W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.66.0F38.WIG 23 /r"},
|
|
{"any": "vpmovzxbd W:xmm, xmm[31:0]/m32" , "op": "[RM ] VEX.128.66.0F38.WIG 31 /r"},
|
|
{"any": "vpmovzxbq W:xmm, xmm[15:0]/m16" , "op": "[RM ] VEX.128.66.0F38.WIG 32 /r"},
|
|
{"any": "vpmovzxbw W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.66.0F38.WIG 30 /r"},
|
|
{"any": "vpmovzxdq W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.66.0F38.WIG 35 /r"},
|
|
{"any": "vpmovzxwd W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.66.0F38.WIG 33 /r"},
|
|
{"any": "vpmovzxwq W:xmm, xmm[31:0]/m32" , "op": "[RM ] VEX.128.66.0F38.WIG 34 /r"},
|
|
{"any": "vpmuldq W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 28 /r"},
|
|
{"any": "vpmulhrsw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 0B /r"},
|
|
{"any": "vpmulhuw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG E4 /r"},
|
|
{"any": "vpmulhw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG E5 /r"},
|
|
{"any": "vpmulld W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 40 /r"},
|
|
{"any": "vpmullw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG D5 /r"},
|
|
{"any": "vpmuludq W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG F4 /r"},
|
|
{"any": "vpor W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG EB /r"},
|
|
{"any": "vpsadbw W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG F6 /r"},
|
|
{"any": "vpshufb W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 00 /r"},
|
|
{"any": "vpshufd W:xmm, xmm/m128, imm8" , "op": "[RM ] VEX.128.66.0F.WIG 70 /r ib"},
|
|
{"any": "vpshufhw W:xmm, xmm/m128, imm8" , "op": "[RM ] VEX.128.F3.0F.WIG 70 /r ib"},
|
|
{"any": "vpshuflw W:xmm, xmm/m128, imm8" , "op": "[RM ] VEX.128.F2.0F.WIG 70 /r ib"},
|
|
{"any": "vpsignb W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 08 /r"},
|
|
{"any": "vpsignd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 0A /r"},
|
|
{"any": "vpsignw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG 09 /r"},
|
|
{"any": "vpslld W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG F2 /r"},
|
|
{"any": "vpslld W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 72 /6 ib"},
|
|
{"any": "vpslldq W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 73 /7 ib"},
|
|
{"any": "vpsllq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG F3 /r"},
|
|
{"any": "vpsllq W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 73 /6 ib"},
|
|
{"any": "vpsllw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG F1 /r"},
|
|
{"any": "vpsllw W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 71 /6 ib"},
|
|
{"any": "vpsrad W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG E2 /r"},
|
|
{"any": "vpsrad W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 72 /4 ib"},
|
|
{"any": "vpsraw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG E1 /r"},
|
|
{"any": "vpsraw W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 71 /4 ib"},
|
|
{"any": "vpsrld W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG D2 /r"},
|
|
{"any": "vpsrld W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 72 /2 ib"},
|
|
{"any": "vpsrldq W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 73 /3 ib"},
|
|
{"any": "vpsrlq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG D3 /r"},
|
|
{"any": "vpsrlq W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 73 /2 ib"},
|
|
{"any": "vpsrlw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG D1 /r"},
|
|
{"any": "vpsrlw W:xmm, xmm, imm8" , "op": "[VM ] VEX.128.66.0F.WIG 71 /2 ib"},
|
|
{"any": "vpsubb W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG F8 /r"},
|
|
{"any": "vpsubd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG FA /r"},
|
|
{"any": "vpsubq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG FB /r"},
|
|
{"any": "vpsubsb W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG E8 /r"},
|
|
{"any": "vpsubsw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG E9 /r"},
|
|
{"any": "vpsubusb W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG D8 /r"},
|
|
{"any": "vpsubusw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG D9 /r"},
|
|
{"any": "vpsubw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG F9 /r"},
|
|
{"any": "vptest R:~xy, ~xy/mxy" , "op": "[RM ] VEX.Lxy.66.0F38.WIG 17 /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "vpunpckhbw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 68 /r"},
|
|
{"any": "vpunpckhdq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 6A /r"},
|
|
{"any": "vpunpckhqdq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 6D /r"},
|
|
{"any": "vpunpckhwd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 69 /r"},
|
|
{"any": "vpunpcklbw W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 60 /r"},
|
|
{"any": "vpunpckldq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 62 /r"},
|
|
{"any": "vpunpcklqdq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 6C /r"},
|
|
{"any": "vpunpcklwd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG 61 /r"},
|
|
{"any": "vpxor W:xmm, ~xmm, ~xmm/m128" , "op": "[RVM] VEX.128.66.0F.WIG EF /r"},
|
|
{"any": "vrcpps W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.NP.0F.WIG 53 /r"},
|
|
{"any": "vrcpss W:xmm, xmm[127:32], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 53 /r"},
|
|
{"any": "vroundpd W:xy, xy/mxy, imm8" , "op": "[RM ] VEX.Lxy.66.0F3A.WIG 09 /r ib"},
|
|
{"any": "vroundps W:xy, xy/mxy, imm8" , "op": "[RM ] VEX.Lxy.66.0F3A.WIG 08 /r ib"},
|
|
{"any": "vroundsd W:xmm, xmm[127:64], xmm[63:0]/m64, imm8" , "op": "[RVM] VEX.LIG.66.0F3A.WIG 0B /r ib"},
|
|
{"any": "vroundss W:xmm, xmm[127:32], xmm[31:0]/m32, imm8" , "op": "[RVM] VEX.LIG.66.0F3A.WIG 0A /r ib"},
|
|
{"any": "vrsqrtps W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.NP.0F.WIG 52 /r"},
|
|
{"any": "vrsqrtss W:xmm, xmm[127:32], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 52 /r"},
|
|
{"any": "vshufpd W:xy, xy, xy/mxy, imm8" , "op": "[RVM] VEX.Lxy.66.0F.WIG C6 /r ib"},
|
|
{"any": "vshufps W:xy, xy, xy/mxy, imm8" , "op": "[RVM] VEX.Lxy.NP.0F.WIG C6 /r ib"},
|
|
{"any": "vsqrtpd W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.66.0F.WIG 51 /r"},
|
|
{"any": "vsqrtps W:xy, xy/mxy" , "op": "[RM ] VEX.Lxy.NP.0F.WIG 51 /r"},
|
|
{"any": "vsqrtsd W:xmm, xmm[127:64], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.F2.0F.WIG 51 /r"},
|
|
{"any": "vsqrtss W:xmm, xmm[127:32], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 51 /r"},
|
|
{"any": "vsubpd W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 5C /r"},
|
|
{"any": "vsubps W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 5C /r"},
|
|
{"any": "vsubsd W:xmm, xmm, xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.F2.0F.WIG 5C /r"},
|
|
{"any": "vsubss W:xmm, xmm, xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.F3.0F.WIG 5C /r"},
|
|
{"any": "vtestpd R:~xy, ~xy/mxy" , "op": "[RM ] VEX.Lxy.66.0F38.W0 0F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "vtestps R:~xy, ~xy/mxy" , "op": "[RM ] VEX.Lxy.66.0F38.W0 0E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "vucomisd R:xmm[63:0], xmm[63:0]/m64" , "op": "[RM ] VEX.LIG.66.0F.WIG 2E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vucomiss R:xmm[31:0], xmm[31:0]/m32" , "op": "[RM ] VEX.LIG.NP.0F.WIG 2E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vunpckhpd W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 15 /r"},
|
|
{"any": "vunpckhps W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 15 /r"},
|
|
{"any": "vunpcklpd W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 14 /r"},
|
|
{"any": "vunpcklps W:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 14 /r"},
|
|
{"any": "vxorpd W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F.WIG 57 /r"},
|
|
{"any": "vxorps W:xy, ~xy, ~xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F.WIG 57 /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD CRYPTO_HASH", "ext": "AVX AESNI", "instructions": [
|
|
{"any": "vaesdec W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG DE /r"},
|
|
{"any": "vaesdeclast W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG DF /r"},
|
|
{"any": "vaesenc W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG DC /r"},
|
|
{"any": "vaesenclast W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG DD /r"},
|
|
{"any": "vaesimc W:xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.WIG DB /r"},
|
|
{"any": "vaeskeygenassist W:xmm, xmm/m128, imm8" , "op": "[RVM] VEX.128.66.0F3A.WIG DF /r ib"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD CRYPTO_HASH", "ext": "VAES", "instructions": [
|
|
{"any": "vaesdec W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG DE /r"},
|
|
{"any": "vaesdeclast W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG DF /r"},
|
|
{"any": "vaesenc W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG DC /r"},
|
|
{"any": "vaesenclast W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG DD /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "AVX GFNI", "instructions": [
|
|
{"any": "vgf2p8affineinvqb W:xy, R:xy, R:xy/mxy, imm8" , "op": "[RVM] VEX.Lxy.66.0F3A.W1 CF /r ib"},
|
|
{"any": "vgf2p8affineqb W:xy, R:xy, R:xy/mxy, imm8" , "op": "[RVM] VEX.Lxy.66.0F3A.W1 CE /r ib"},
|
|
{"any": "vgf2p8mulb W:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 CF /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "AVX2", "instructions": [
|
|
{"any": "vbroadcasti128 W:ymm, m128" , "op": "[RM ] VEX.256.66.0F38.W0 5A /r"},
|
|
{"any": "vbroadcastsd W:ymm, xmm[63:0]" , "op": "[RM ] VEX.256.66.0F38.W0 19 /r"},
|
|
{"any": "vbroadcastss W:xmm, xmm[31:0]" , "op": "[RM ] VEX.128.66.0F38.W0 18 /r"},
|
|
{"any": "vbroadcastss W:ymm, xmm[31:0]" , "op": "[RM ] VEX.256.66.0F38.W0 18 /r"},
|
|
{"any": "vextracti128 W:xmm/m128, ymm, imm8" , "op": "[MR ] VEX.256.66.0F3A.W0 39 /r ib"},
|
|
{"any": "vgatherdpd X:xmm, vm32x, X:xmm" , "op": "[RMV] VEX.128.66.0F38.W1 92 /r"},
|
|
{"any": "vgatherdpd X:ymm, vm32x, X:ymm" , "op": "[RMV] VEX.256.66.0F38.W1 92 /r"},
|
|
{"any": "vgatherdps X:xmm, vm32x, X:xmm" , "op": "[RMV] VEX.128.66.0F38.W0 92 /r"},
|
|
{"any": "vgatherdps X:ymm, vm32y, X:ymm" , "op": "[RMV] VEX.256.66.0F38.W0 92 /r"},
|
|
{"any": "vgatherqpd X:xmm, vm64x, X:xmm" , "op": "[RMV] VEX.128.66.0F38.W1 93 /r"},
|
|
{"any": "vgatherqpd X:ymm, vm64y, X:ymm" , "op": "[RMV] VEX.256.66.0F38.W1 93 /r"},
|
|
{"any": "vgatherqps X:xmm, vm64x, X:xmm" , "op": "[RMV] VEX.128.66.0F38.W0 93 /r"},
|
|
{"any": "vgatherqps X:xmm, vm64y, X:xmm" , "op": "[RMV] VEX.256.66.0F38.W0 93 /r"},
|
|
{"any": "vinserti128 W:ymm, ymm, xmm/m128, imm8" , "op": "[RVM] VEX.256.66.0F3A.W0 38 /r ib"},
|
|
{"any": "vmovntdqa W:ymm, m256" , "op": "[RM ] VEX.256.66.0F38.WIG 2A /r"},
|
|
{"any": "vmpsadbw W:ymm, ymm, ymm/m256, imm8" , "op": "[RVM] VEX.256.66.0F3A.WIG 42 /r ib"},
|
|
{"any": "vpabsb W:ymm, ymm/m256" , "op": "[RM ] VEX.256.66.0F38.WIG 1C /r"},
|
|
{"any": "vpabsd W:ymm, ymm/m256" , "op": "[RM ] VEX.256.66.0F38.WIG 1E /r"},
|
|
{"any": "vpabsw W:ymm, ymm/m256" , "op": "[RM ] VEX.256.66.0F38.WIG 1D /r"},
|
|
{"any": "vpackssdw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 6B /r"},
|
|
{"any": "vpacksswb W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 63 /r"},
|
|
{"any": "vpackusdw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 2B /r"},
|
|
{"any": "vpackuswb W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 67 /r"},
|
|
{"any": "vpaddb W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG FC /r"},
|
|
{"any": "vpaddd W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG FE /r"},
|
|
{"any": "vpaddq W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG D4 /r"},
|
|
{"any": "vpaddsb W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG EC /r"},
|
|
{"any": "vpaddsw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG ED /r"},
|
|
{"any": "vpaddusb W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG DC /r"},
|
|
{"any": "vpaddusw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG DD /r"},
|
|
{"any": "vpaddw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG FD /r"},
|
|
{"any": "vpalignr W:ymm, ymm, ymm/m256, imm8" , "op": "[RVM] VEX.256.66.0F3A.WIG 0F /r ib"},
|
|
{"any": "vpand W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG DB /r"},
|
|
{"any": "vpandn W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG DF /r"},
|
|
{"any": "vpavgb W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG E0 /r"},
|
|
{"any": "vpavgw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG E3 /r"},
|
|
{"any": "vpblendd W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] VEX.128.66.0F3A.W0 02 /r ib"},
|
|
{"any": "vpblendd W:ymm, ymm, ymm/m256, imm8" , "op": "[RVM] VEX.256.66.0F3A.W0 02 /r ib"},
|
|
{"any": "vpblendvb W:ymm, ymm, ymm/m256, ymm" , "op": "[RVMS]VEX.256.66.0F3A.W0 4C /r /is4"},
|
|
{"any": "vpblendw W:ymm, ymm, ymm/m256, imm8" , "op": "[RVM] VEX.256.66.0F3A.WIG 0E /r ib"},
|
|
{"any": "vpbroadcastb W:xmm, xmm[7:0]/m8" , "op": "[RM ] VEX.128.66.0F38.W0 78 /r"},
|
|
{"any": "vpbroadcastb W:ymm, xmm[7:0]/m8" , "op": "[RM ] VEX.256.66.0F38.W0 78 /r"},
|
|
{"any": "vpbroadcastd W:xmm, xmm[31:0]/m32" , "op": "[RM ] VEX.128.66.0F38.W0 58 /r"},
|
|
{"any": "vpbroadcastd W:ymm, xmm[31:0]/m32" , "op": "[RM ] VEX.256.66.0F38.W0 58 /r"},
|
|
{"any": "vpbroadcastq W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.66.0F38.W0 59 /r"},
|
|
{"any": "vpbroadcastq W:ymm, xmm[63:0]/m64" , "op": "[RM ] VEX.256.66.0F38.W0 59 /r"},
|
|
{"any": "vpbroadcastw W:xmm, xmm[15:0]/m16" , "op": "[RM ] VEX.128.66.0F38.W0 79 /r"},
|
|
{"any": "vpbroadcastw W:ymm, xmm[15:0]/m16" , "op": "[RM ] VEX.256.66.0F38.W0 79 /r"},
|
|
{"any": "vpcmpeqb W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 74 /r"},
|
|
{"any": "vpcmpeqd W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 76 /r"},
|
|
{"any": "vpcmpeqq W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 29 /r"},
|
|
{"any": "vpcmpeqw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 75 /r"},
|
|
{"any": "vpcmpgtb W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 64 /r"},
|
|
{"any": "vpcmpgtd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 66 /r"},
|
|
{"any": "vpcmpgtq W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 37 /r"},
|
|
{"any": "vpcmpgtw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 65 /r"},
|
|
{"any": "vperm2i128 W:ymm, ymm, ymm/m256, imm8" , "op": "[RVM] VEX.256.66.0F3A.W0 46 /r ib"},
|
|
{"any": "vpermd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.W0 36 /r"},
|
|
{"any": "vpermpd W:ymm, ymm/m256, imm8" , "op": "[RM ] VEX.256.66.0F3A.W1 01 /r ib"},
|
|
{"any": "vpermps W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.W0 16 /r"},
|
|
{"any": "vpermq W:ymm, ymm/m256, imm8" , "op": "[RM ] VEX.256.66.0F3A.W1 00 /r ib"},
|
|
{"any": "vpgatherdd X:xmm, vm32x, X:xmm" , "op": "[RMV] VEX.128.66.0F38.W0 90 /r"},
|
|
{"any": "vpgatherdd X:ymm, vm32y, X:ymm" , "op": "[RMV] VEX.256.66.0F38.W0 90 /r"},
|
|
{"any": "vpgatherdq X:xmm, vm32x, X:xmm" , "op": "[RMV] VEX.128.66.0F38.W1 90 /r"},
|
|
{"any": "vpgatherdq X:ymm, vm32x, X:ymm" , "op": "[RMV] VEX.256.66.0F38.W1 90 /r"},
|
|
{"any": "vpgatherqd X:xmm, vm64x, X:xmm" , "op": "[RMV] VEX.128.66.0F38.W0 91 /r"},
|
|
{"any": "vpgatherqd X:xmm, vm64y, X:xmm" , "op": "[RMV] VEX.256.66.0F38.W0 91 /r"},
|
|
{"any": "vpgatherqq X:xmm, vm64x, X:xmm" , "op": "[RMV] VEX.128.66.0F38.W1 91 /r"},
|
|
{"any": "vpgatherqq X:ymm, vm64y, X:ymm" , "op": "[RMV] VEX.256.66.0F38.W1 91 /r"},
|
|
{"any": "vphaddd W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 02 /r"},
|
|
{"any": "vphaddsw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 03 /r"},
|
|
{"any": "vphaddw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 01 /r"},
|
|
{"any": "vphsubd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 06 /r"},
|
|
{"any": "vphsubsw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 07 /r"},
|
|
{"any": "vphsubw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 05 /r"},
|
|
{"any": "vpmaddubsw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 04 /r"},
|
|
{"any": "vpmaddwd W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG F5 /r"},
|
|
{"any": "vpmaskmovd X:m128, xmm, xmm" , "op": "[MVR] VEX.128.66.0F38.W0 8E /r"},
|
|
{"any": "vpmaskmovd X:m256, ymm, ymm" , "op": "[MVR] VEX.256.66.0F38.W0 8E /r"},
|
|
{"any": "vpmaskmovd W:xmm, xmm, m128" , "op": "[RVM] VEX.128.66.0F38.W0 8C /r"},
|
|
{"any": "vpmaskmovd W:ymm, ymm, m256" , "op": "[RVM] VEX.256.66.0F38.W0 8C /r"},
|
|
{"any": "vpmaskmovq X:m128, xmm, xmm" , "op": "[MVR] VEX.128.66.0F38.W1 8E /r"},
|
|
{"any": "vpmaskmovq X:m256, ymm, ymm" , "op": "[MVR] VEX.256.66.0F38.W1 8E /r"},
|
|
{"any": "vpmaskmovq W:xmm, xmm, m128" , "op": "[RVM] VEX.128.66.0F38.W1 8C /r"},
|
|
{"any": "vpmaskmovq W:ymm, ymm, m256" , "op": "[RVM] VEX.256.66.0F38.W1 8C /r"},
|
|
{"any": "vpmaxsb W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 3C /r"},
|
|
{"any": "vpmaxsd W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 3D /r"},
|
|
{"any": "vpmaxsw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG EE /r"},
|
|
{"any": "vpmaxub W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG DE /r"},
|
|
{"any": "vpmaxud W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 3F /r"},
|
|
{"any": "vpmaxuw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 3E /r"},
|
|
{"any": "vpminsb W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 38 /r"},
|
|
{"any": "vpminsd W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 39 /r"},
|
|
{"any": "vpminsw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG EA /r"},
|
|
{"any": "vpminub W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG DA /r"},
|
|
{"any": "vpminud W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 3B /r"},
|
|
{"any": "vpminuw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 3A /r"},
|
|
{"any": "vpmovmskb W:r32[31:0], ymm" , "op": "[RVM] VEX.256.66.0F.WIG D7 /r"},
|
|
{"any": "vpmovsxbd W:ymm, xmm[63:0]/m64" , "op": "[RM ] VEX.256.66.0F38.WIG 21 /r"},
|
|
{"any": "vpmovsxbq W:ymm, xmm[31:0]/m32" , "op": "[RM ] VEX.256.66.0F38.WIG 22 /r"},
|
|
{"any": "vpmovsxbw W:ymm, xmm/m128" , "op": "[RM ] VEX.256.66.0F38.WIG 20 /r"},
|
|
{"any": "vpmovsxdq W:ymm, xmm/m128" , "op": "[RM ] VEX.256.66.0F38.WIG 25 /r"},
|
|
{"any": "vpmovsxwd W:ymm, xmm/m128" , "op": "[RM ] VEX.256.66.0F38.WIG 23 /r"},
|
|
{"any": "vpmovsxwq W:ymm, xmm[63:0]/m64" , "op": "[RM ] VEX.256.66.0F38.WIG 24 /r"},
|
|
{"any": "vpmovzxbd W:ymm, xmm[63:0]/m64" , "op": "[RM ] VEX.256.66.0F38.WIG 31 /r"},
|
|
{"any": "vpmovzxbq W:ymm, xmm[31:0]/m32" , "op": "[RM ] VEX.256.66.0F38.WIG 32 /r"},
|
|
{"any": "vpmovzxbw W:ymm, xmm/m128" , "op": "[RM ] VEX.256.66.0F38.WIG 30 /r"},
|
|
{"any": "vpmovzxdq W:ymm, xmm/m128" , "op": "[RM ] VEX.256.66.0F38.WIG 35 /r"},
|
|
{"any": "vpmovzxwd W:ymm, xmm/m128" , "op": "[RM ] VEX.256.66.0F38.WIG 33 /r"},
|
|
{"any": "vpmovzxwq W:ymm, xmm[63:0]/m64" , "op": "[RM ] VEX.256.66.0F38.WIG 34 /r"},
|
|
{"any": "vpmuldq W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 28 /r"},
|
|
{"any": "vpmulhrsw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 0B /r"},
|
|
{"any": "vpmulhuw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG E4 /r"},
|
|
{"any": "vpmulhw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG E5 /r"},
|
|
{"any": "vpmulld W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 40 /r"},
|
|
{"any": "vpmullw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG D5 /r"},
|
|
{"any": "vpmuludq W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG F4 /r"},
|
|
{"any": "vpor W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG EB /r"},
|
|
{"any": "vpsadbw W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG F6 /r"},
|
|
{"any": "vpshufb W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 00 /r"},
|
|
{"any": "vpshufd W:ymm, ymm/m256, imm8" , "op": "[RM ] VEX.256.66.0F.WIG 70 /r ib"},
|
|
{"any": "vpshufhw W:ymm, ymm/m256, imm8" , "op": "[RM ] VEX.256.F3.0F.WIG 70 /r ib"},
|
|
{"any": "vpshuflw W:ymm, ymm/m256, imm8" , "op": "[RM ] VEX.256.F2.0F.WIG 70 /r ib"},
|
|
{"any": "vpsignb W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 08 /r"},
|
|
{"any": "vpsignd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 0A /r"},
|
|
{"any": "vpsignw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.WIG 09 /r"},
|
|
{"any": "vpslld W:ymm, ymm, xmm/m128" , "op": "[RVM] VEX.256.66.0F.WIG F2 /r"},
|
|
{"any": "vpslld W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 72 /6 ib"},
|
|
{"any": "vpslldq W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 73 /7 ib"},
|
|
{"any": "vpsllq W:ymm, ymm, xmm/m128" , "op": "[RVM] VEX.256.66.0F.WIG F3 /r"},
|
|
{"any": "vpsllq W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 73 /6 ib"},
|
|
{"any": "vpsllvd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.W0 47 /r"},
|
|
{"any": "vpsllvd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.W0 47 /r"},
|
|
{"any": "vpsllvq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.W1 47 /r"},
|
|
{"any": "vpsllvq W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.W1 47 /r"},
|
|
{"any": "vpsllw W:ymm, ymm, xmm/m128" , "op": "[RVM] VEX.256.66.0F.WIG F1 /r"},
|
|
{"any": "vpsllw W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 71 /6 ib"},
|
|
{"any": "vpsrad W:ymm, ymm, xmm/m128" , "op": "[RVM] VEX.256.66.0F.WIG E2 /r"},
|
|
{"any": "vpsrad W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 72 /4 ib"},
|
|
{"any": "vpsravd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.W0 46 /r"},
|
|
{"any": "vpsravd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.W0 46 /r"},
|
|
{"any": "vpsraw W:ymm, ymm, xmm/m128" , "op": "[RVM] VEX.256.66.0F.WIG E1 /r"},
|
|
{"any": "vpsraw W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 71 /4 ib"},
|
|
{"any": "vpsrld W:ymm, ymm, xmm/m128" , "op": "[RVM] VEX.256.66.0F.WIG D2 /r"},
|
|
{"any": "vpsrld W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 72 /2 ib"},
|
|
{"any": "vpsrldq W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 73 /3 ib"},
|
|
{"any": "vpsrlq W:ymm, ymm, xmm/m128" , "op": "[RVM] VEX.256.66.0F.WIG D3 /r"},
|
|
{"any": "vpsrlq W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 73 /2 ib"},
|
|
{"any": "vpsrlvd W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.W0 45 /r"},
|
|
{"any": "vpsrlvd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.W0 45 /r"},
|
|
{"any": "vpsrlvq W:xmm, xmm, xmm/m128" , "op": "[RVM] VEX.128.66.0F38.W1 45 /r"},
|
|
{"any": "vpsrlvq W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F38.W1 45 /r"},
|
|
{"any": "vpsrlw W:ymm, ymm, xmm/m128" , "op": "[RVM] VEX.256.66.0F.WIG D1 /r"},
|
|
{"any": "vpsrlw W:ymm, ymm, imm8" , "op": "[VM ] VEX.256.66.0F.WIG 71 /2 ib"},
|
|
{"any": "vpsubb W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG F8 /r"},
|
|
{"any": "vpsubd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG FA /r"},
|
|
{"any": "vpsubq W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG FB /r"},
|
|
{"any": "vpsubsb W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG E8 /r"},
|
|
{"any": "vpsubsw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG E9 /r"},
|
|
{"any": "vpsubusb W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG D8 /r"},
|
|
{"any": "vpsubusw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG D9 /r"},
|
|
{"any": "vpsubw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG F9 /r"},
|
|
{"any": "vpunpckhbw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 68 /r"},
|
|
{"any": "vpunpckhdq W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 6A /r"},
|
|
{"any": "vpunpckhqdq W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 6D /r"},
|
|
{"any": "vpunpckhwd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 69 /r"},
|
|
{"any": "vpunpcklbw W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 60 /r"},
|
|
{"any": "vpunpckldq W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 62 /r"},
|
|
{"any": "vpunpcklqdq W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 6C /r"},
|
|
{"any": "vpunpcklwd W:ymm, ymm, ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG 61 /r"},
|
|
{"any": "vpxor W:ymm, ~ymm, ~ymm/m256" , "op": "[RVM] VEX.256.66.0F.WIG EF /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "F16C", "instructions": [
|
|
{"any": "vcvtph2ps W:xmm, xmm[63:0]/m64" , "op": "[RM ] VEX.128.66.0F38.W0 13 /r"},
|
|
{"any": "vcvtph2ps W:ymm, xmm/m128" , "op": "[RM ] VEX.256.66.0F38.W0 13 /r"},
|
|
{"any": "vcvtps2ph W:xmm[63:0]/m64, xmm, imm8" , "op": "[MR ] VEX.128.66.0F3A.W0 1D /r ib"},
|
|
{"any": "vcvtps2ph W:xmm/m128, ymm, imm8" , "op": "[MR ] VEX.256.66.0F3A.W0 1D /r ib"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "FMA", "instructions": [
|
|
{"any": "vfmadd132pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 98 /r"},
|
|
{"any": "vfmadd132ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 98 /r"},
|
|
{"any": "vfmadd132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 99 /r"},
|
|
{"any": "vfmadd132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 99 /r"},
|
|
{"any": "vfmadd213pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 A8 /r"},
|
|
{"any": "vfmadd213ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 A8 /r"},
|
|
{"any": "vfmadd213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 A9 /r"},
|
|
{"any": "vfmadd213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 A9 /r"},
|
|
{"any": "vfmadd231pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 B8 /r"},
|
|
{"any": "vfmadd231ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 B8 /r"},
|
|
{"any": "vfmadd231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 B9 /r"},
|
|
{"any": "vfmadd231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 B9 /r"},
|
|
{"any": "vfmaddsub132pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 96 /r"},
|
|
{"any": "vfmaddsub132ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 96 /r"},
|
|
{"any": "vfmaddsub213pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 A6 /r"},
|
|
{"any": "vfmaddsub213ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 A6 /r"},
|
|
{"any": "vfmaddsub231pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 B6 /r"},
|
|
{"any": "vfmaddsub231ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 B6 /r"},
|
|
{"any": "vfmsub132pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 9A /r"},
|
|
{"any": "vfmsub132ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 9A /r"},
|
|
{"any": "vfmsub132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 9B /r"},
|
|
{"any": "vfmsub132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 9B /r"},
|
|
{"any": "vfmsub213pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 AA /r"},
|
|
{"any": "vfmsub213ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 AA /r"},
|
|
{"any": "vfmsub213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 AB /r"},
|
|
{"any": "vfmsub213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 AB /r"},
|
|
{"any": "vfmsub231pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 BA /r"},
|
|
{"any": "vfmsub231ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 BA /r"},
|
|
{"any": "vfmsub231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 BB /r"},
|
|
{"any": "vfmsub231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 BB /r"},
|
|
{"any": "vfmsubadd132pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 97 /r"},
|
|
{"any": "vfmsubadd132ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 97 /r"},
|
|
{"any": "vfmsubadd213pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 A7 /r"},
|
|
{"any": "vfmsubadd213ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 A7 /r"},
|
|
{"any": "vfmsubadd231pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 B7 /r"},
|
|
{"any": "vfmsubadd231ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 B7 /r"},
|
|
{"any": "vfnmadd132pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 9C /r"},
|
|
{"any": "vfnmadd132ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 9C /r"},
|
|
{"any": "vfnmadd132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 9D /r"},
|
|
{"any": "vfnmadd132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 9D /r"},
|
|
{"any": "vfnmadd213pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 AC /r"},
|
|
{"any": "vfnmadd213ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 AC /r"},
|
|
{"any": "vfnmadd213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 AD /r"},
|
|
{"any": "vfnmadd213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 AD /r"},
|
|
{"any": "vfnmadd231pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 BC /r"},
|
|
{"any": "vfnmadd231ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 BC /r"},
|
|
{"any": "vfnmadd231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 BD /r"},
|
|
{"any": "vfnmadd231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 BD /r"},
|
|
{"any": "vfnmsub132pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 9E /r"},
|
|
{"any": "vfnmsub132ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 9E /r"},
|
|
{"any": "vfnmsub132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 9F /r"},
|
|
{"any": "vfnmsub132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 9F /r"},
|
|
{"any": "vfnmsub213pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 AE /r"},
|
|
{"any": "vfnmsub213ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 AE /r"},
|
|
{"any": "vfnmsub213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 AF /r"},
|
|
{"any": "vfnmsub213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 AF /r"},
|
|
{"any": "vfnmsub231pd X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 BE /r"},
|
|
{"any": "vfnmsub231ps X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 BE /r"},
|
|
{"any": "vfnmsub231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVM] VEX.LIG.66.0F38.W1 BF /r"},
|
|
{"any": "vfnmsub231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVM] VEX.LIG.66.0F38.W0 BF /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "FMA4", "deprecated": true, "instructions": [
|
|
{"any": "vfmaddpd W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 69 /r /is4"},
|
|
{"any": "vfmaddpd W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 69 /r /is4"},
|
|
{"any": "vfmaddps W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 68 /r /is4"},
|
|
{"any": "vfmaddps W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 68 /r /is4"},
|
|
{"any": "vfmaddsd W:xmm[63:0], xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVSM] VEX.128.66.0F3A.W1 6b /r /is4"},
|
|
{"any": "vfmaddsd W:xmm[63:0], xmm[63:0], xmm[63:0]/m64, xmm[63:0]" , "op": "[RVMS] VEX.128.66.0F3A.W0 6b /r /is4"},
|
|
{"any": "vfmaddss W:xmm[31:0], xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVSM] VEX.128.66.0F3A.W1 6a /r /is4"},
|
|
{"any": "vfmaddss W:xmm[31:0], xmm[31:0], xmm[31:0]/m32, xmm[31:0]" , "op": "[RVMS] VEX.128.66.0F3A.W0 6a /r /is4"},
|
|
{"any": "vfmaddsubpd W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 5D /r /is4"},
|
|
{"any": "vfmaddsubpd W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 5D /r /is4"},
|
|
{"any": "vfmaddsubps W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 5C /r /is4"},
|
|
{"any": "vfmaddsubps W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 5C /r /is4"},
|
|
{"any": "vfmsubaddpd W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 5F /r /is4"},
|
|
{"any": "vfmsubaddpd W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 5F /r /is4"},
|
|
{"any": "vfmsubaddps W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 5E /r /is4"},
|
|
{"any": "vfmsubaddps W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 5E /r /is4"},
|
|
{"any": "vfmsubpd W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 6D /r /is4"},
|
|
{"any": "vfmsubpd W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 6D /r /is4"},
|
|
{"any": "vfmsubps W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 6C /r /is4"},
|
|
{"any": "vfmsubps W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 6C /r /is4"},
|
|
{"any": "vfmsubsd W:xmm[63:0], xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVSM] VEX.128.66.0F3A.W1 6F /r /is4"},
|
|
{"any": "vfmsubsd W:xmm[63:0], xmm[63:0], xmm[63:0]/m64, xmm[63:0]" , "op": "[RVMS] VEX.128.66.0F3A.W0 6F /r /is4"},
|
|
{"any": "vfmsubss W:xmm[31:0], xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVSM] VEX.128.66.0F3A.W1 6E /r /is4"},
|
|
{"any": "vfmsubss W:xmm[31:0], xmm[31:0], xmm[31:0]/m32, xmm[31:0]" , "op": "[RVMS] VEX.128.66.0F3A.W0 6E /r /is4"},
|
|
{"any": "vfnmaddpd W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 79 /r /is4"},
|
|
{"any": "vfnmaddpd W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 79 /r /is4"},
|
|
{"any": "vfnmaddps W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 78 /r /is4"},
|
|
{"any": "vfnmaddps W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 78 /r /is4"},
|
|
{"any": "vfnmaddsd W:xmm[63:0], xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVSM] VEX.128.66.0F3A.W1 7B /r /is4"},
|
|
{"any": "vfnmaddsd W:xmm[63:0], xmm[63:0], xmm[63:0]/m64, xmm[63:0]" , "op": "[RVMS] VEX.128.66.0F3A.W0 7B /r /is4"},
|
|
{"any": "vfnmaddss W:xmm[31:0], xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVSM] VEX.128.66.0F3A.W1 7A /r /is4"},
|
|
{"any": "vfnmaddss W:xmm[31:0], xmm[31:0], xmm[31:0]/m32, xmm[31:0]" , "op": "[RVMS] VEX.128.66.0F3A.W0 7A /r /is4"},
|
|
{"any": "vfnmsubpd W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 7D /r /is4"},
|
|
{"any": "vfnmsubpd W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 7D /r /is4"},
|
|
{"any": "vfnmsubps W:xy, xy, xy, xy/mxy" , "op": "[RVSM] VEX.Lxy.66.0F3A.W1 7C /r /is4"},
|
|
{"any": "vfnmsubps W:xy, xy, xy/mxy, xy" , "op": "[RVMS] VEX.Lxy.66.0F3A.W0 7C /r /is4"},
|
|
{"any": "vfnmsubsd W:xmm[63:0], xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "[RVSM] VEX.128.66.0F3A.W1 7F /r /is4"},
|
|
{"any": "vfnmsubsd W:xmm[63:0], xmm[63:0], xmm[63:0]/m64, xmm[63:0]" , "op": "[RVMS] VEX.128.66.0F3A.W0 7F /r /is4"},
|
|
{"any": "vfnmsubss W:xmm[31:0], xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "[RVSM] VEX.128.66.0F3A.W1 7E /r /is4"},
|
|
{"any": "vfnmsubss W:xmm[31:0], xmm[31:0], xmm[31:0]/m32, xmm[31:0]" , "op": "[RVMS] VEX.128.66.0F3A.W0 7E /r /is4"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "XOP", "deprecated": true, "instructions": [
|
|
{"any": "vfrczpd W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 81 /r"},
|
|
{"any": "vfrczpd W:ymm, ymm/m256" , "op": "[RM ] XOP.256.P0.MAP9.W0 81 /r"},
|
|
{"any": "vfrczps W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 80 /r"},
|
|
{"any": "vfrczps W:ymm, ymm/m256" , "op": "[RM ] XOP.256.P0.MAP9.W0 80 /r"},
|
|
{"any": "vfrczsd W:xmm[63:0], xmm[63:0]/m64" , "op": "[RM ] XOP.128.P0.MAP9.W0 83 /r"},
|
|
{"any": "vfrczss W:xmm[31:0], xmm[31:0]/m32" , "op": "[RM ] XOP.128.P0.MAP9.W0 82 /r"},
|
|
{"any": "vpcmov W:xmm, xmm, xmm, xmm/m128" , "op": "[RVSM]XOP.128.P0.MAP8.W1 A2 /r /is4"},
|
|
{"any": "vpcmov W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 A2 /r /is4"},
|
|
{"any": "vpcmov W:ymm, ymm, ymm, ymm/m256" , "op": "[RVSM]XOP.256.P0.MAP8.W1 A2 /r /is4"},
|
|
{"any": "vpcmov W:ymm, ymm, ymm/m256, ymm" , "op": "[RVMS]XOP.256.P0.MAP8.W0 A2 /r /is4"},
|
|
{"any": "vpcomb W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] XOP.128.P0.MAP8.W0 CC /r ib"},
|
|
{"any": "vpcomd W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] XOP.128.P0.MAP8.W0 CE /r ib"},
|
|
{"any": "vpcomq W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] XOP.128.P0.MAP8.W0 CF /r ib"},
|
|
{"any": "vpcomub W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] XOP.128.P0.MAP8.W0 EC /r ib"},
|
|
{"any": "vpcomud W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] XOP.128.P0.MAP8.W0 EE /r ib"},
|
|
{"any": "vpcomuq W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] XOP.128.P0.MAP8.W0 EF /r ib"},
|
|
{"any": "vpcomuw W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] XOP.128.P0.MAP8.W0 ED /r ib"},
|
|
{"any": "vpcomw W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] XOP.128.P0.MAP8.W0 CD /r ib"},
|
|
{"any": "vpermil2pd W:xmm, xmm, xmm/m128, xmm, imm4" , "op": "[RVMS]VEX.128.66.0F3A.W0 49 /r /is4"},
|
|
{"any": "vpermil2pd W:xmm, xmm, xmm, xmm/m128, imm4" , "op": "[RVSM]VEX.128.66.0F3A.W1 49 /r /is4"},
|
|
{"any": "vpermil2pd W:ymm, ymm, ymm/m256, ymm, imm4" , "op": "[RVMS]VEX.256.66.0F3A.W0 49 /r /is4"},
|
|
{"any": "vpermil2pd W:ymm, ymm, ymm, ymm/m256, imm4" , "op": "[RVSM]VEX.256.66.0F3A.W1 49 /r /is4"},
|
|
{"any": "vpermil2ps W:xmm, xmm, xmm/m128, xmm, imm4" , "op": "[RVMS]VEX.128.66.0F3A.W0 48 /r /is4"},
|
|
{"any": "vpermil2ps W:xmm, xmm, xmm, xmm/m128, imm4" , "op": "[RVSM]VEX.128.66.0F3A.W1 48 /r /is4"},
|
|
{"any": "vpermil2ps W:ymm, ymm, ymm/m256, ymm, imm4" , "op": "[RVMS]VEX.256.66.0F3A.W0 48 /r /is4"},
|
|
{"any": "vpermil2ps W:ymm, ymm, ymm, ymm/m256, imm4" , "op": "[RVSM]VEX.256.66.0F3A.W1 48 /r /is4"},
|
|
{"any": "vphaddbd W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 C2 /r"},
|
|
{"any": "vphaddbq W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 C3 /r"},
|
|
{"any": "vphaddbw W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 C1 /r"},
|
|
{"any": "vphadddq W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 CB /r"},
|
|
{"any": "vphaddubd W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 D2 /r"},
|
|
{"any": "vphaddubq W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 D3 /r"},
|
|
{"any": "vphaddubw W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 D1 /r"},
|
|
{"any": "vphaddudq W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 DB /r"},
|
|
{"any": "vphadduwd W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 D6 /r"},
|
|
{"any": "vphadduwq W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 D7 /r"},
|
|
{"any": "vphaddwd W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 C6 /r"},
|
|
{"any": "vphaddwq W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 C7 /r"},
|
|
{"any": "vphsubbw W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 E1 /r"},
|
|
{"any": "vphsubdq W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 E3 /r"},
|
|
{"any": "vphsubwd W:xmm, xmm/m128" , "op": "[RM ] XOP.128.P0.MAP9.W0 E2 /r"},
|
|
{"any": "vpmacsdd W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 9E /r /is4"},
|
|
{"any": "vpmacsdqh W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 9F /r /is4"},
|
|
{"any": "vpmacsdql W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 97 /r /is4"},
|
|
{"any": "vpmacssdd W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 8E /r /is4"},
|
|
{"any": "vpmacssdqh W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 8F /r /is4"},
|
|
{"any": "vpmacssdql W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 87 /r /is4"},
|
|
{"any": "vpmacsswd W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 86 /r /is4"},
|
|
{"any": "vpmacssww W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 85 /r /is4"},
|
|
{"any": "vpmacswd W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 96 /r /is4"},
|
|
{"any": "vpmacsww W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 95 /r /is4"},
|
|
{"any": "vpmadcsswd W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 A6 /r /is4"},
|
|
{"any": "vpmadcswd W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 B6 /r /is4"},
|
|
{"any": "vpperm W:xmm, xmm, xmm, xmm/m128" , "op": "[RVSM]XOP.128.P0.MAP8.W1 A3 /r /is4"},
|
|
{"any": "vpperm W:xmm, xmm, xmm/m128, xmm" , "op": "[RVMS]XOP.128.P0.MAP8.W0 A3 /r /is4"},
|
|
{"any": "vprotb W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 90 /r"},
|
|
{"any": "vprotb W:xmm, xmm/m128, imm8" , "op": "[RM ] XOP.128.P0.MAP8.W0 C0 /r ib"},
|
|
{"any": "vprotb W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 90 /r"},
|
|
{"any": "vprotd W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 92 /r"},
|
|
{"any": "vprotd W:xmm, xmm/m128, imm8" , "op": "[RM ] XOP.128.P0.MAP8.W0 C2 /r ib"},
|
|
{"any": "vprotd W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 92 /r"},
|
|
{"any": "vprotq W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 93 /r"},
|
|
{"any": "vprotq W:xmm, xmm/m128, imm8" , "op": "[RM ] XOP.128.P0.MAP8.W0 C3 /r ib"},
|
|
{"any": "vprotq W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 93 /r"},
|
|
{"any": "vprotw W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 91 /r"},
|
|
{"any": "vprotw W:xmm, xmm/m128, imm8" , "op": "[RM ] XOP.128.P0.MAP8.W0 C1 /r ib"},
|
|
{"any": "vprotw W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 91 /r"},
|
|
{"any": "vpshab W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 98 /r"},
|
|
{"any": "vpshab W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 98 /r"},
|
|
{"any": "vpshad W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 9A /r"},
|
|
{"any": "vpshad W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 9A /r"},
|
|
{"any": "vpshaq W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 9B /r"},
|
|
{"any": "vpshaq W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 9B /r"},
|
|
{"any": "vpshaw W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 99 /r"},
|
|
{"any": "vpshaw W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 99 /r"},
|
|
{"any": "vpshlb W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 94 /r"},
|
|
{"any": "vpshlb W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 94 /r"},
|
|
{"any": "vpshld W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 96 /r"},
|
|
{"any": "vpshld W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 96 /r"},
|
|
{"any": "vpshlq W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 97 /r"},
|
|
{"any": "vpshlq W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 97 /r"},
|
|
{"any": "vpshlw W:xmm, xmm, xmm/m128" , "op": "[RVM] XOP.128.P0.MAP9.W1 95 /r"},
|
|
{"any": "vpshlw W:xmm, xmm/m128, xmm" , "op": "[RMV] XOP.128.P0.MAP9.W0 95 /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "AVX PCLMULQDQ", "instructions": [
|
|
{"any": "vpclmulqdq W:xmm, xmm, xmm/m128, imm8" , "op": "[RVM] VEX.128.66.0F3A.WIG 44 /r ib"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "VPCLMULQDQ", "instructions": [
|
|
{"any": "vpclmulqdq W:ymm, ymm, ymm/m256, imm8" , "op": "[RVM] VEX.256.66.0F3A.WIG 44 /r ib"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "AVX_IFMA", "instructions": [
|
|
{"any": "vpmadd52huq X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 B5 /r"},
|
|
{"any": "vpmadd52luq X:xy, xy, xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W1 B4 /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "AVX_NE_CONVERT", "instructions": [
|
|
{"any": "vbcstnebf162ps W:xy, m16" , "op": "[RM ] VEX.Lxy.F3.0F38.W0 B1 !(11):rrr:bbb"},
|
|
{"any": "vbcstnesh2ps W:xy, m16" , "op": "[RM ] VEX.Lxy.66.0F38.W0 B1 !(11):rrr:bbb"},
|
|
{"any": "vcvtneebf162ps W:xy, mxy" , "op": "[RM ] VEX.Lxy.F3.0F38.W0 B0 !(11):rrr:bbb"},
|
|
{"any": "vcvtneeph2ps W:xy, mxy" , "op": "[RM ] VEX.Lxy.66.0F38.W0 B0 !(11):rrr:bbb"},
|
|
{"any": "vcvtneobf162ps W:xy, mxy" , "op": "[RM ] VEX.Lxy.F2.0F38.W0 B0 !(11):rrr:bbb"},
|
|
{"any": "vcvtneoph2ps W:xy, mxy" , "op": "[RM ] VEX.Lxy.NP.0F38.W0 B0 !(11):rrr:bbb"},
|
|
{"any": "vcvtneps2bf16 W:xmm[63:0], xmm/m128" , "op": "[RM ] VEX.128.F3.0F38.W0 72 /r"},
|
|
{"any": "vcvtneps2bf16 W:xmm, ymm/m256" , "op": "[RM ] VEX.256.F3.0F38.W0 72 /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD CRYPTO_HASH", "ext": "AVX SHA512", "instructions": [
|
|
{"any": "vsha512msg1 X:ymm, R:xmm" , "op": "[RM ] VEX.256.F2.0F38.W0 CC 11:rrr:bbb"},
|
|
{"any": "vsha512msg2 X:ymm, R:ymm" , "op": "[RM ] VEX.256.F2.0F38.W0 CD 11:rrr:bbb"},
|
|
{"any": "vsha512rnds2 X:ymm, R:ymm, R:xmm" , "op": "[RVM] VEX.256.F2.0F38.W0 CB 11:rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD CRYPTO_HASH", "ext": "AVX SM3", "instructions": [
|
|
{"any": "vsm3msg1 X:xmm, R:xmm, R:xmm/m128" , "op": "[RVM] VEX.128.NP.0F38.W0 DA /r"},
|
|
{"any": "vsm3msg2 X:xmm, R:xmm, R:xmm/m128" , "op": "[RVM] VEX.128.66.0F38.W0 DA /r"},
|
|
{"any": "vsm3rnds2 X:xmm, R:xmm, R:xmm/m128, imm8" , "op": "[RVM] VEX.128.66.0F3A.W0 DE /r ib"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD CRYPTO_HASH", "ext": "AVX SM4", "instructions": [
|
|
{"any": "vsm4key4 W:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.F3.0F38.W0 DA /r"},
|
|
{"any": "vsm4rnds4 W:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.F2.0F38.W0 DA /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD CRYPTO_HASH", "ext": "AVX10_2 SM4", "instructions": [
|
|
{"any": "vsm4key4 W:xyz, R:xyz, R:xyz/mxyz" , "op": "[RVM] EVEX.xyz.F3.0F38.W0 DA /r"},
|
|
{"any": "vsm4rnds4 W:xyz, R:xyz, R:xyz/mxyz" , "op": "[RVM] EVEX.xyz.F2.0F38.W0 DA /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "AVX_VNNI", "instructions": [
|
|
{"any": "vpdpbusd X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 50 /r"},
|
|
{"any": "vpdpbusds X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 51 /r"},
|
|
{"any": "vpdpwssd X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 52 /r"},
|
|
{"any": "vpdpwssds X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 53 /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "AVX_VNNI_INT8", "instructions": [
|
|
{"any": "vpdpbssd X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.F2.0F38.W0 50 /r"},
|
|
{"any": "vpdpbssds X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.F2.0F38.W0 51 /r"},
|
|
{"any": "vpdpbsud X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.F3.0F38.W0 50 /r"},
|
|
{"any": "vpdpbsuds X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.F3.0F38.W0 51 /r"},
|
|
{"any": "vpdpbuud X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F38.W0 50 /r"},
|
|
{"any": "vpdpbuuds X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F38.W0 51 /r"}
|
|
]},
|
|
|
|
{"category": "AVX SIMD", "ext": "AVX_VNNI_INT16", "instructions": [
|
|
{"any": "vpdpwsud X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.F3.0F38.W0 D2 /r"},
|
|
{"any": "vpdpwsuds X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.F3.0F38.W0 D3 /r"},
|
|
{"any": "vpdpwusd X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 D2 /r"},
|
|
{"any": "vpdpwusds X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.66.0F38.W0 D3 /r"},
|
|
{"any": "vpdpwuud X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F38.W0 D2 /r"},
|
|
{"any": "vpdpwuuds X:xy, R:xy, R:xy/mxy" , "op": "[RVM] VEX.Lxy.NP.0F38.W0 D3 /r"}
|
|
]},
|
|
|
|
{"category": "AVX512 MASK", "ext": "AVX512_F", "instructions": [
|
|
{"any": "kandnw W:k[15:0], k[15:0], k[15:0]" , "op": "[RVM] VEX.L1.0F.W0 42 /r"},
|
|
{"any": "kandw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "[RVM] VEX.L1.0F.W0 41 /r"},
|
|
{"any": "kmovw W:k[15:0], k[15:0]/m16" , "op": "[RM ] VEX.L0.0F.W0 90 /r"},
|
|
{"apx": "kmovw W:k[15:0], k[15:0]/m16" , "op": "[RM ] EVEX.128.NP.0F.W0 90 /r"},
|
|
{"any": "kmovw W:k[15:0], r32[15:0]" , "op": "[RM ] VEX.L0.0F.W0 92 /r"},
|
|
{"apx": "kmovw W:k[15:0], r32[15:0]" , "op": "[RM ] EVEX.128.NP.0F.W0 92 11:rrr:bbb"},
|
|
{"any": "kmovw W:m16, k[15:0]" , "op": "[MR ] VEX.L0.0F.W0 91 /r"},
|
|
{"apx": "kmovw W:m16, k[15:0]" , "op": "[MR ] EVEX.128.NP.0F.W0 91 !(11):rrr:bbb"},
|
|
{"any": "kmovw W:r32[15:0], k[15:0]" , "op": "[RM ] VEX.L0.0F.W0 93 /r"},
|
|
{"apx": "kmovw W:r32[15:0], k[15:0]" , "op": "[RM ] EVEX.128.NP.0F.W0 93 11:rrr:bbb"},
|
|
{"any": "knotw W:k[15:0], k[15:0]" , "op": "[RM ] VEX.L0.0F.W0 44 /r"},
|
|
{"any": "kortestw R:~k[15:0], ~k[15:0]" , "op": "[RM ] VEX.L0.0F.W0 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "korw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "[RVM] VEX.L1.0F.W0 45 /r"},
|
|
{"any": "kshiftlw W:k[15:0], k[15:0], imm8" , "op": "[RM ] VEX.L0.66.0F3A.W1 32 /r ib"},
|
|
{"any": "kshiftrw W:k[15:0], k[15:0], imm8" , "op": "[RM ] VEX.L0.66.0F3A.W1 30 /r ib"},
|
|
{"any": "kunpckbw W:k[15:0], k[7:0], k[7:0]" , "op": "[RVM] VEX.L1.66.0F.W0 4B /r"},
|
|
{"any": "kxnorw W:k[15:0], k[15:0], k[15:0]" , "op": "[RVM] VEX.L1.0F.W0 46 /r"},
|
|
{"any": "kxorw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "[RVM] VEX.L1.0F.W0 47 /r"}
|
|
]},
|
|
|
|
{"category": "AVX512 MASK", "ext": "AVX512_DQ", "instructions": [
|
|
{"any": "kaddb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "[RVM] VEX.L1.66.0F.W0 4A /r"},
|
|
{"any": "kaddw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "[RVM] VEX.L1.NP.0F.W0 4A /r"},
|
|
{"any": "kandb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "[RVM] VEX.L1.66.0F.W0 41 /r"},
|
|
{"any": "kandnb W:k[7:0], k[7:0], k[7:0]" , "op": "[RVM] VEX.L1.66.0F.W0 42 /r"},
|
|
{"any": "kmovb W:k[7:0], k[7:0]/m8" , "op": "[RM ] VEX.L0.66.0F.W0 90 /r"},
|
|
{"apx": "kmovb W:k[7:0], k[7:0]/m8" , "op": "[RM ] EVEX.128.66.0F.W0 90 /r"},
|
|
{"any": "kmovb W:k[7:0], r32[7:0]" , "op": "[RM ] VEX.L0.66.0F.W0 92 /r"},
|
|
{"apx": "kmovb W:k[7:0], r32[7:0]" , "op": "[RM ] EVEX.128.66.0F.W0 92 11:rrr:bbb"},
|
|
{"any": "kmovb W:m8, k[7:0]" , "op": "[MR ] VEX.L0.66.0F.W0 91 /r"},
|
|
{"apx": "kmovb W:m8, k[7:0]" , "op": "[MR ] EVEX.128.66.0F.W0 91 !(11):rrr:bbb"},
|
|
{"any": "kmovb W:r32[7:0], k[7:0]" , "op": "[RM ] VEX.L0.66.0F.W0 93 /r"},
|
|
{"apx": "kmovb W:r32[7:0], k[7:0]" , "op": "[RM ] EVEX.128.66.0F.W0 93 11:rrr:bbb"},
|
|
{"any": "knotb W:k[7:0], k[7:0]" , "op": "[RM ] VEX.L0.66.0F.W0 44 /r"},
|
|
{"any": "korb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "[RVM] VEX.L1.66.0F.W0 45 /r"},
|
|
{"any": "kortestb R:~k[7:0], ~k[7:0]" , "op": "[RM ] VEX.L0.66.0F.W0 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "kshiftlb W:k[7:0], k[7:0], imm8" , "op": "[RM ] VEX.L0.66.0F3A.W0 32 /r ib"},
|
|
{"any": "kshiftrb W:k[7:0], k[7:0], imm8" , "op": "[RM ] VEX.L0.66.0F3A.W0 30 /r ib"},
|
|
{"any": "ktestb R:~k[7:0], ~k[7:0]" , "op": "[RM ] VEX.L0.66.0F.W0 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "ktestw R:~k[15:0], ~k[15:0]" , "op": "[RM ] VEX.L0.NP.0F.W0 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "kxnorb W:k[7:0], k[7:0], k[7:0]" , "op": "[RVM] VEX.L1.66.0F.W0 46 /r"},
|
|
{"any": "kxorb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "[RVM] VEX.L1.66.0F.W0 47 /r"}
|
|
]},
|
|
|
|
{"category": "AVX512 MASK", "ext": "AVX512_BW", "instructions": [
|
|
{"any": "kaddd W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "[RVM] VEX.L1.66.0F.W1 4A /r"},
|
|
{"any": "kaddq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "[RVM] VEX.L1.NP.0F.W1 4A /r"},
|
|
{"any": "kandd W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "[RVM] VEX.L1.66.0F.W1 41 /r"},
|
|
{"any": "kandnd W:k[31:0], k[31:0], k[31:0]" , "op": "[RVM] VEX.L1.66.0F.W1 42 /r"},
|
|
{"any": "kandnq W:k[63:0], k[63:0], k[63:0]" , "op": "[RVM] VEX.L1.NP.0F.W1 42 /r"},
|
|
{"any": "kandq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "[RVM] VEX.L1.NP.0F.W1 41 /r"},
|
|
{"any": "kmovd W:k[31:0], k[31:0]/m32" , "op": "[RM ] VEX.L0.66.0F.W1 90 /r"},
|
|
{"apx": "kmovd W:k[31:0], k[31:0]/m32" , "op": "[RM ] EVEX.128.66.0F.W1 90 /r"},
|
|
{"any": "kmovd W:k[31:0], r32" , "op": "[RM ] VEX.L0.F2.0F.W0 92 /r"},
|
|
{"apx": "kmovd W:k[31:0], r32" , "op": "[RM ] EVEX.128.F2.0F.W0 92 11:rrr:bbb"},
|
|
{"any": "kmovd W:m32, k[31:0]" , "op": "[MR ] VEX.L0.66.0F.W1 91 /r"},
|
|
{"apx": "kmovd W:m32, k[31:0]" , "op": "[MR ] EVEX.128.66.0F.W1 91 !(11):rrr:bbb"},
|
|
{"any": "kmovd W:r32, k[31:0]" , "op": "[RM ] VEX.L0.F2.0F.W0 93 /r"},
|
|
{"apx": "kmovd W:r32, k[31:0]" , "op": "[RM ] EVEX.128.F2.0F.W0 93 11:rrr:bbb"},
|
|
{"any": "kmovq W:k[63:0], k[63:0]/m64" , "op": "[RM ] VEX.L0.NP.0F.W1 90 /r"},
|
|
{"apx": "kmovq W:k[63:0], k[63:0]/m64" , "op": "[RM ] EVEX.128.NP.0F.W1 90 /r"},
|
|
{"any": "kmovq W:k[63:0], r64" , "op": "[RM ] VEX.L0.F2.0F.W1 92 /r"},
|
|
{"apx": "kmovq W:k[63:0], r64" , "op": "[RM ] EVEX.128.F2.0F.W1 92 11:rrr:bbb"},
|
|
{"any": "kmovq W:m64, k[63:0]" , "op": "[MR ] VEX.L0.NP.0F.W1 91 /r"},
|
|
{"apx": "kmovq W:m64, k[63:0]" , "op": "[MR ] EVEX.128.NP.0F.W1 91 !(11):rrr:bbb"},
|
|
{"any": "kmovq W:r64, k[63:0]" , "op": "[RM ] VEX.L0.F2.0F.W1 93 /r"},
|
|
{"apx": "kmovq W:r64, k[63:0]" , "op": "[RM ] EVEX.128.F2.0F.W1 93 11:rrr:bbb"},
|
|
{"any": "knotd W:k[31:0], k[31:0]" , "op": "[RM ] VEX.L0.66.0F.W1 44 /r"},
|
|
{"any": "knotq W:k[63:0], k[63:0]" , "op": "[RM ] VEX.L0.NP.0F.W1 44 /r"},
|
|
{"any": "kord W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "[RVM] VEX.L1.66.0F.W1 45 /r"},
|
|
{"any": "korq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "[RVM] VEX.L1.NP.0F.W1 45 /r"},
|
|
{"any": "kortestd R:~k[31:0], ~k[31:0]" , "op": "[RM ] VEX.L0.66.0F.W1 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "kortestq R:~k[63:0], ~k[63:0]" , "op": "[RM ] VEX.L0.NP.0F.W1 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "kshiftld W:k[31:0], k[31:0], imm8" , "op": "[RM ] VEX.L0.66.0F3A.W0 33 /r ib"},
|
|
{"any": "kshiftlq W:k[63:0], k[63:0], imm8" , "op": "[RM ] VEX.L0.66.0F3A.W1 33 /r ib"},
|
|
{"any": "kshiftrd W:k[31:0], k[31:0], imm8" , "op": "[RM ] VEX.L0.66.0F3A.W0 31 /r ib"},
|
|
{"any": "kshiftrq W:k[63:0], k[63:0], imm8" , "op": "[RM ] VEX.L0.66.0F3A.W1 31 /r ib"},
|
|
{"any": "ktestd R:~k[31:0], ~k[31:0]" , "op": "[RM ] VEX.L0.66.0F.W1 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "ktestq R:~k[63:0], ~k[63:0]" , "op": "[RM ] VEX.L0.NP.0F.W1 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
|
|
{"any": "kunpckdq W:k[63:0], k[31:0], k[31:0]" , "op": "[RVM] VEX.L1.NP.0F.W1 4B /r"},
|
|
{"any": "kunpckwd W:k[31:0], k[15:0], k[15:0]" , "op": "[RVM] VEX.L1.NP.0F.W0 4B /r"},
|
|
{"any": "kxnord W:k[31:0], k[31:0], k[31:0]" , "op": "[RVM] VEX.L1.66.0F.W1 46 /r"},
|
|
{"any": "kxnorq W:k[63:0], k[63:0], k[63:0]" , "op": "[RVM] VEX.L1.NP.0F.W1 46 /r"},
|
|
{"any": "kxord W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "[RVM] VEX.L1.66.0F.W1 47 /r"},
|
|
{"any": "kxorq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "[RVM] VEX.L1.NP.0F.W1 47 /r"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_F", "instructions": [
|
|
{"any": "vaddpd W:xyz {kz}, ~xyz, ~xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F.W1 58 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vaddps W:xyz {kz}, ~xyz, ~xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.NP.0F.W0 58 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vaddsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "[RVM] EVEX.LIG.F2.0F.W1 58 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vaddss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "[RVM] EVEX.LIG.F3.0F.W0 58 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "valignd W:xyz {kz}, xyz, xyz/mxyz/b32, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 03 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "valignq W:xyz {kz}, xyz, xyz/mxyz/b64, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 03 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vblendmpd W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 65 /r" , "tt": "fv" , "vl": "xy", "k": "blend"},
|
|
{"any": "vblendmps W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 65 /r" , "tt": "fv" , "vl": "xy", "k": "blend"},
|
|
{"any": "vbroadcastf32x4 W:ymm {kz}, m128" , "op": "[RM ] EVEX.256.66.0F38.W0 1A /r" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vbroadcastf32x4 W:zmm {kz}, m128" , "op": "[RM ] EVEX.512.66.0F38.W0 1A /r" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vbroadcastf64x4 W:zmm {kz}, m256" , "op": "[RM ] EVEX.512.66.0F38.W1 1B /r" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vbroadcasti32x4 W:ymm {kz}, m128" , "op": "[RM ] EVEX.256.66.0F38.W0 5A /r" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vbroadcasti32x4 W:zmm {kz}, m128" , "op": "[RM ] EVEX.512.66.0F38.W0 5A /r" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vbroadcasti64x4 W:zmm {kz}, m256" , "op": "[RM ] EVEX.512.66.0F38.W1 5B /r" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vbroadcastsd W:ymm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.256.66.0F38.W1 19 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vbroadcastsd W:zmm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.512.66.0F38.W1 19 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vbroadcastss W:xyz {kz}, xmm[31:0]/m32" , "op": "[RM ] EVEX.xyz.66.0F38.W0 18 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vcmppd W:k {k}, xyz, xyz/mxyz/b64, imm8 {sae}" , "op": "[RVM] EVEX.xyz.66.0F.W1 C2 /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vcmpps W:k {k}, xyz, xyz/mxyz/b32, imm8 {sae}" , "op": "[RVM] EVEX.xyz.NP.0F.W0 C2 /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vcmpsd W:k {k}, xmm, xmm[63:0]/m64, imm8 {sae}" , "op": "[RVM] EVEX.LIG.F2.0F.W1 C2 /r ib" , "tt": "t1s" , "vl": "no", "k": "zeroing"},
|
|
{"any": "vcmpss W:k {k}, xmm, xmm[31:0]/m32, imm8 {sae}" , "op": "[RVM] EVEX.LIG.F3.0F.W0 C2 /r ib" , "tt": "t1s" , "vl": "no", "k": "zeroing"},
|
|
{"any": "vcomisd R:xmm[63:0], xmm[63:0]/m64 {sae}" , "op": "[RM ] EVEX.LIG.66.0F.W1 2F /r" , "tt": "t1s" , "vl": "no", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vcomiss R:xmm[31:0], xmm[31:0]/m32 {sae}" , "op": "[RM ] EVEX.LIG.NP.0F.W0 2F /r" , "tt": "t1s" , "vl": "no", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vcompresspd W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.66.0F38.W1 8A /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vcompressps W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.66.0F38.W0 8A /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vcvtdq2pd W:xyz {kz}, xxy/mxxy/b32" , "op": "[RM ] EVEX.xyz.F3.0F.W0 E6 /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvtdq2ps W:xyz {kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.NP.0F.W0 5B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtpd2ps W:xxy {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.66.0F.W1 5A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtpd2dq W:xxy {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.F2.0F.W1 E6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtpd2udq W:xxy {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.NP.0F.W1 79 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtph2ps W:xyz {kz}, xxy/mxxy {sae}" , "op": "[RM ] EVEX.xyz.66.0F38.W0 13 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vcvtps2dq W:xyz {kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.66.0F.W0 5B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtps2pd W:xyz {kz}, xxy/mxxy/b32 {er}" , "op": "[RM ] EVEX.xyz.NP.0F.W0 5A /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvtps2ph W:xxy/mxxy {kz}, xyz, imm8 {sae}" , "op": "[MR ] EVEX.xyz.66.0F3A.W0 1D /r ib" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vcvtps2udq W:xyz {kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.NP.0F.W0 79 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtsd2si W:ry, xmm[63:0]/m64 {er}" , "op": "[RM ] EVEX.LIG.F2.0F.Wy 2D /r" , "tt": "t1f" , "vl": "no"},
|
|
{"any": "vcvtsd2ss W:xmm {kz}, xmm[127:32], xmm[63:0]/m64 {er}" , "op": "[RVM] EVEX.LIG.F2.0F.W1 5A /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtsd2usi W:ry, xmm[63:0]/m64 {er}" , "op": "[RM ] EVEX.LIG.F2.0F.Wy 79 /r" , "tt": "t1f" , "vl": "no"},
|
|
{"any": "vcvtsi2sd W:xmm, xmm[127:64], ry/my {er}" , "op": "[RVM] EVEX.LIG.F2.0F.Wy 2A /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtsi2ss W:xmm, xmm[127:32], ry/my {er}" , "op": "[RVM] EVEX.LIG.F3.0F.Wy 2A /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtss2sd W:xmm {kz}, xmm[127:64], xmm[31:0]/m32 {sae}" , "op": "[RVM] EVEX.LIG.F3.0F.W0 5A /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtss2si W:ry, xmm[31:0]/m32 {er}" , "op": "[RM ] EVEX.LIG.F3.0F.Wy 2D /r" , "tt": "t1f" , "vl": "no"},
|
|
{"any": "vcvtss2usi W:ry, xmm[31:0]/m32 {er}" , "op": "[RM ] EVEX.LIG.F3.0F.Wy 79 /r" , "tt": "t1f" , "vl": "no"},
|
|
{"any": "vcvttpd2dq W:xxy {kz}, xyz/mxyz/b64 {sae}" , "op": "[RM ] EVEX.xyz.66.0F.W1 E6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvttpd2qq W:xyz {kz}, xyz/mxyz/b64 {sae}" , "op": "[RM ] EVEX.xyz.66.0F.W1 7A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvttpd2udq W:xxy {kz}, xyz/mxyz/b64 {sae}" , "op": "[RM ] EVEX.xyz.NP.0F.W1 78 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvttps2dq W:xyz {kz}, xyz/mxyz/b32 {sae}" , "op": "[RM ] EVEX.xyz.F3.0F.W0 5B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvttps2udq W:xyz {kz}, xyz/mxyz/b32 {sae}" , "op": "[RM ] EVEX.xyz.NP.0F.W0 78 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvttsd2si W:ry, xmm[63:0]/m64 {sae}" , "op": "[RM ] EVEX.LIG.F2.0F.Wy 2C /r" , "tt": "t1f" , "vl": "no"},
|
|
{"any": "vcvttsd2usi W:ry, xmm[63:0]/m64 {sae}" , "op": "[RM ] EVEX.LIG.F2.0F.Wy 78 /r" , "tt": "t1f" , "vl": "no"},
|
|
{"any": "vcvttss2si W:ry, xmm[31:0]/m32 {sae}" , "op": "[RM ] EVEX.LIG.F3.0F.Wy 2C /r" , "tt": "t1f" , "vl": "no"},
|
|
{"any": "vcvttss2usi W:ry, xmm[31:0]/m32 {sae}" , "op": "[RM ] EVEX.LIG.F3.0F.Wy 78 /r" , "tt": "t1f" , "vl": "no"},
|
|
{"any": "vcvtudq2pd W:xyz {kz}, xxy/mxxy/b32 {er}" , "op": "[RM ] EVEX.xyz.F3.0F.W0 7A /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvtudq2ps W:xyz {kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.F2.0F.W0 7A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtusi2sd W:xmm, xmm[127:64], ry/my {er}" , "op": "[RVM] EVEX.LIG.F2.0F.Wy 7B /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtusi2ss W:xmm, xmm[127:32], ry/my {er}" , "op": "[RVM] EVEX.LIG.F3.0F.Wy 7B /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vdivpd W:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F.W1 5E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vdivps W:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.NP.0F.W0 5E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vdivsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "[RVM] EVEX.LIG.F2.0F.W1 5E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vdivss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "[RVM] EVEX.LIG.F3.0F.W0 5E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vexpandpd W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W1 88 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vexpandps W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W0 88 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vextractf32x4 W:xmm/m128 {kz}, ymm, imm8" , "op": "[MR ] EVEX.256.66.0F3A.W0 19 /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vextractf32x4 W:xmm/m128 {kz}, zmm, imm8" , "op": "[MR ] EVEX.512.66.0F3A.W0 19 /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vextractf64x4 W:ymm/m256 {kz}, zmm, imm8" , "op": "[MR ] EVEX.512.66.0F3A.W1 1B /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vextracti32x4 W:xmm/m128 {kz}, ymm, imm8" , "op": "[MR ] EVEX.256.66.0F3A.W0 39 /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vextracti32x4 W:xmm/m128 {kz}, zmm, imm8" , "op": "[MR ] EVEX.512.66.0F3A.W0 39 /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vextracti64x4 W:ymm/m256 {kz}, zmm, imm8" , "op": "[MR ] EVEX.512.66.0F3A.W1 3B /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vextractps W:r32[31:0]/m32, xmm, imm8" , "op": "[MR ] EVEX.128.66.0F3A.WIG 17 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfixupimmpd X:xyz {kz}, xyz, xyz/mxyz/b64, imm8 {sae}" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 54 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfixupimmps X:xyz {kz}, xyz, xyz/mxyz/b32, imm8 {sae}" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 54 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfixupimmsd X:xmm {kz},xmm[127:64],xmm[63:0]/m64,imm8 {sae}", "op": "[RVM] EVEX.LIG.66.0F3A.W1 55 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfixupimmss X:xmm {kz},xmm[127:32],xmm[31:0]/m32,imm8 {sae}", "op": "[RVM] EVEX.LIG.66.0F3A.W0 55 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmadd132pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 98 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmadd132ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 98 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmadd132sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 99 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmadd132ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 99 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmadd213pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 A8 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmadd213ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 A8 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmadd213sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 A9 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmadd213ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 A9 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmadd231pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 B8 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmadd231ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 B8 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmadd231sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 B9 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmadd231ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 B9 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmaddsub132pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 96 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmaddsub132ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 96 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmaddsub213pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 A6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmaddsub213ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 A6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmaddsub231pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 B6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmaddsub231ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 B6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub132pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 9A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub132ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 9A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub132sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 9B /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmsub132ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 9B /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmsub213pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 AA /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub213ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 AA /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub213sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 AB /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmsub213ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 AB /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmsub231pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 BA /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub231ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 BA /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub231sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 BB /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmsub231ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 BB /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmsubadd132pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 97 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsubadd132ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 97 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsubadd213pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 A7 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsubadd213ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 A7 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsubadd231pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 B7 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsubadd231ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 B7 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd132pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 9C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd132ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 9C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd132sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 9D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmadd132ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 9D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmadd213pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 AC /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd213ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 AC /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd213sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 AD /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmadd213ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 AD /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmadd231pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 BC /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd231ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 BC /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd231sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 BD /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmadd231ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 BD /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmsub132pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 9E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmsub132ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 9E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmsub132sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 9F /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmsub132ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 9F /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmsub213pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 AE /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmsub213ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 AE /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmsub213sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 AF /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmsub213ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 AF /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmsub231pd X:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 BE /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmsub231ps X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 BE /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmsub231sd X:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W1 BF /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmsub231ss X:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "[RVM] EVEX.LIG.66.0F38.W0 BF /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vgatherdpd X:xmm {k}, vm32x" , "op": "[RM ] EVEX.128.66.0F38.W1 92 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherdpd X:ymm {k}, vm32x" , "op": "[RM ] EVEX.256.66.0F38.W1 92 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherdpd X:zmm {k}, vm32y" , "op": "[RM ] EVEX.512.66.0F38.W1 92 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherdps X:xmm {k}, vm32x" , "op": "[RM ] EVEX.128.66.0F38.W0 92 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherdps X:ymm {k}, vm32y" , "op": "[RM ] EVEX.256.66.0F38.W0 92 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherdps X:zmm {k}, vm32z" , "op": "[RM ] EVEX.512.66.0F38.W0 92 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherqpd X:xmm {k}, vm64x" , "op": "[RM ] EVEX.128.66.0F38.W1 93 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherqpd X:ymm {k}, vm64y" , "op": "[RM ] EVEX.256.66.0F38.W1 93 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherqpd X:zmm {k}, vm64z" , "op": "[RM ] EVEX.512.66.0F38.W1 93 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherqps X:xmm {k}, vm64x" , "op": "[RM ] EVEX.128.66.0F38.W0 93 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherqps X:xmm {k}, vm64y" , "op": "[RM ] EVEX.256.66.0F38.W0 93 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgatherqps X:ymm {k}, vm64z" , "op": "[RM ] EVEX.512.66.0F38.W0 93 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vgetexppd W:xyz {kz}, xyz/mxyz/b64 {sae}" , "op": "[RM ] EVEX.xyz.66.0F38.W1 42 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vgetexpps W:xyz {kz}, xyz/mxyz/b32 {sae}" , "op": "[RM ] EVEX.xyz.66.0F38.W0 42 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vgetexpsd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {sae}" , "op": "[RM ] EVEX.LIG.66.0F38.W1 43 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vgetexpss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {sae}" , "op": "[RM ] EVEX.LIG.66.0F38.W0 43 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vgetmantpd W:xyz {kz}, xyz/mxyz/b64, imm8 {sae}" , "op": "[RM ] EVEX.xyz.66.0F3A.W1 26 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vgetmantps W:xyz {kz}, xyz/mxyz/b32, imm8 {sae}" , "op": "[RM ] EVEX.xyz.66.0F3A.W0 26 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vgetmantsd W:xmm {kz}, xmm[127:64],xmm[63:0]/m64,imm8 {sae}", "op": "[RM ] EVEX.LIG.66.0F3A.W1 27 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vgetmantss W:xmm {kz}, xmm[127:32],xmm[31:0]/m32,imm8 {sae}", "op": "[RM ] EVEX.LIG.66.0F3A.W0 27 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vinsertf32x4 W:ymm {kz}, ymm, xmm/m128, imm8" , "op": "[RVM] EVEX.256.66.0F3A.W0 18 /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vinsertf32x4 W:zmm {kz}, zmm, xmm/m128, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W0 18 /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vinsertf64x4 W:zmm {kz}, zmm, ymm/m256, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W1 1A /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vinserti32x4 W:ymm {kz}, ymm, xmm/m128, imm8" , "op": "[RVM] EVEX.256.66.0F3A.W0 38 /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vinserti32x4 W:zmm {kz}, zmm, xmm/m128, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W0 38 /r ib" , "tt": "t4" , "vl": "xy"},
|
|
{"any": "vinserti64x4 W:zmm {kz}, zmm, ymm/m256, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W1 3A /r ib" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vinsertps W:xmm, xmm, xmm[31:0]/m32, imm8" , "op": "[RVM] EVEX.128.66.0F3A.W0 21 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmaxpd W:xyz {kz}, xyz, xyz/mxyz/b64 {sae}" , "op": "[RVM] EVEX.xyz.66.0F.W1 5F /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vmaxps W:xyz {kz}, xyz, xyz/mxyz/b32 {sae}" , "op": "[RVM] EVEX.xyz.NP.0F.W0 5F /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vmaxsd W:xmm {kz}, xmm, xmm[63:0]/m64 {sae}" , "op": "[RVM] EVEX.LIG.F2.0F.W1 5F /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmaxss W:xmm {kz}, xmm, xmm[31:0]/m32 {sae}" , "op": "[RVM] EVEX.LIG.F3.0F.W0 5F /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vminpd W:xyz {kz}, xyz, xyz/mxyz/b64 {sae}" , "op": "[RVM] EVEX.xyz.66.0F.W1 5D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vminps W:xyz {kz}, xyz, xyz/mxyz/b32 {sae}" , "op": "[RVM] EVEX.xyz.NP.0F.W0 5D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vminsd W:xmm {kz}, xmm, xmm[63:0]/m64 {sae}" , "op": "[RVM] EVEX.LIG.F2.0F.W1 5D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vminss W:xmm {kz}, xmm, xmm[31:0]/m32 {sae}" , "op": "[RVM] EVEX.LIG.F3.0F.W0 5D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovapd W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F.W1 28 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovapd W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.66.0F.W1 29 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovaps W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.NP.0F.W0 28 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovaps W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.NP.0F.W0 29 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovd W:r32/m32, xmm[31:0]" , "op": "[MR ] EVEX.128.66.0F.W0 7E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovd W:xmm[31:0], r32/m32" , "op": "[RM ] EVEX.128.66.0F.W0 6E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovddup W:xmm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.128.F2.0F.W1 12 /r" , "tt": "movddup", "vl": "xy"},
|
|
{"any": "vmovddup W:ymm {kz}, ymm/m256" , "op": "[RM ] EVEX.256.F2.0F.W1 12 /r" , "tt": "movddup", "vl": "xy"},
|
|
{"any": "vmovddup W:zmm {kz}, zmm/m512" , "op": "[RM ] EVEX.512.F2.0F.W1 12 /r" , "tt": "movddup", "vl": "xy"},
|
|
{"any": "vmovdqa32 W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F.W0 6F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqa32 W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.66.0F.W0 7F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqa64 W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F.W1 6F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqa64 W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.66.0F.W1 7F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqu32 W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.F3.0F.W0 6F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqu32 W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F.W0 7F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqu64 W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.F3.0F.W1 6F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqu64 W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F.W1 7F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovhlps W:xmm, xmm[127:64], xmm[127:64]" , "op": "[RVM] EVEX.128.NP.0F.W0 12 /r" , "tt": "none" , "vl": "no"},
|
|
{"any": "vmovhpd W:m64, xmm[127:64]" , "op": "[MR ] EVEX.128.66.0F.W1 17 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovhpd W:xmm, xmm[63:0], m64" , "op": "[RVM] EVEX.128.66.0F.W1 16 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovhps W:m64, xmm[127:64]" , "op": "[MR ] EVEX.128.NP.0F.W0 17 /r" , "tt": "t2" , "vl": "no"},
|
|
{"any": "vmovhps W:xmm, xmm[63:0], m64" , "op": "[RVM] EVEX.128.NP.0F.W0 16 /r" , "tt": "t2" , "vl": "no"},
|
|
{"any": "vmovlhps W:xmm, xmm[63:0], xmm[63:0]" , "op": "[RVM] EVEX.128.NP.0F.W0 16 /r" , "tt": "none" , "vl": "no"},
|
|
{"any": "vmovlpd W:m64, xmm[63:0]" , "op": "[MR ] EVEX.128.66.0F.W1 13 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovlpd W:xmm, xmm[127:64], m64" , "op": "[RVM] EVEX.128.66.0F.W1 12 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovlps W:m64, xmm[63:0]" , "op": "[MR ] EVEX.128.NP.0F.W0 13 /r" , "tt": "t2" , "vl": "no"},
|
|
{"any": "vmovlps W:xmm, xmm[127:64], m64" , "op": "[RVM] EVEX.128.NP.0F.W0 12 /r" , "tt": "t2" , "vl": "no"},
|
|
{"any": "vmovntdq W:mxyz, xyz" , "op": "[MR ] EVEX.xyz.66.0F.W0 E7 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovntdqa W:xyz, mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W0 2A /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovntpd W:mxyz, xyz" , "op": "[MR ] EVEX.xyz.66.0F.W1 2B /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovntps W:mxyz, xyz" , "op": "[MR ] EVEX.xyz.66.0F.W0 2B /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovq W:r64/m64, xmm[63:0]" , "op": "[MR ] EVEX.128.66.0F.W1 7E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovq W:xmm[63:0], r64/m64" , "op": "[RM ] EVEX.128.66.0F.W1 6E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovq W:xmm[63:0], xmm[63:0]/m64" , "op": "[RM ] EVEX.128.F3.0F.W1 7E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovq W:xmm[63:0]/m64, xmm[63:0]" , "op": "[MR ] EVEX.128.66.0F.W1 D6 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovsd W:m64, xmm[63:0]" , "op": "[MR ] EVEX.LIG.F2.0F.W1 11 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovsd W:xmm[63:0] {kz}, m64" , "op": "[MR ] EVEX.LIG.F2.0F.W1 10 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovsd W:xmm {kz}, xmm[127:64], xmm[63:0]" , "op": "[MVR] EVEX.LIG.F2.0F.W1 11 /r" , "tt": "none" , "vl": "no"},
|
|
{"any": "vmovsd W:xmm {kz}, xmm[127:64], xmm[63:0]" , "op": "[RVM] EVEX.LIG.F2.0F.W1 10 /r" , "tt": "none" , "vl": "no"},
|
|
{"any": "vmovshdup W:xyz {kz}, xyz/mxyz" , "op": "[RVM] EVEX.xyz.F3.0F.W0 16 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovsldup W:xyz {kz}, xyz/mxyz" , "op": "[RVM] EVEX.xyz.F3.0F.W0 12 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovss W:m32, xmm[31:0]" , "op": "[MR ] EVEX.LIG.F3.0F.W0 11 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovss W:xmm[31:0] {kz}, m32" , "op": "[MR ] EVEX.LIG.F3.0F.W0 10 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovss W:xmm {kz}, xmm[127:32], xmm[31:0]" , "op": "[MVR] EVEX.LIG.F3.0F.W0 11 /r" , "tt": "none" , "vl": "no"},
|
|
{"any": "vmovss W:xmm {kz}, xmm[127:32], xmm[31:0]" , "op": "[RVM] EVEX.LIG.F3.0F.W0 10 /r" , "tt": "none" , "vl": "no"},
|
|
{"any": "vmovupd W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F.W1 10 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovupd W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.66.0F.W1 11 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovups W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.0F.W0 10 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovups W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.0F.W0 11 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmulpd W:xyz {kz}, ~xyz, ~xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F.W1 59 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vmulps W:xyz {kz}, ~xyz, ~xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.0F.W0 59 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vmulsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "[RVM] EVEX.LIG.F2.0F.W1 59 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmulss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "[RVM] EVEX.LIG.F3.0F.W0 59 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vpabsd W:xyz {kz}, xyz/mxyz/b32" , "op": "[RM ] EVEX.xyz.66.0F38.W0 1E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpabsq W:xyz {kz}, xyz/mxyz/b64" , "op": "[RM ] EVEX.xyz.66.0F38.W1 1F /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpaddd W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 FE /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpaddq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 D4 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpandd W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 DB /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpandnd W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 DF /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpandnq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 DF /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpandq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 DB /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpblendmd W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 64 /r" , "tt": "fv" , "vl": "xy", "k": "blend"},
|
|
{"any": "vpblendmq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 64 /r" , "tt": "fv" , "vl": "xy", "k": "blend"},
|
|
{"any": "vpbroadcastd W:xyz {kz}, r32[31:0]" , "op": "[RM ] EVEX.xyz.66.0F38.W0 7C /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpbroadcastd W:xyz {kz}, xmm[31:0]/m32" , "op": "[RM ] EVEX.xyz.66.0F38.W0 58 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpbroadcastq W:xyz {kz}, r64" , "op": "[RM ] EVEX.xyz.66.0F38.W1 7C /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpbroadcastq W:xyz {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.xyz.66.0F38.W1 59 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpcmpd W:k {k}, xyz, xyz/mxyz/b32, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 1F /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpeqd W:k {k}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 76 /r" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpeqq W:k {k}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 29 /r" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpgtd W:k {k}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 66 /r" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpgtq W:k {k}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 37 /r" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpq W:k {k}, xyz, xyz/mxyz/b64, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 1F /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpud W:k {k}, xyz, xyz/mxyz/b32, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 1E /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpuq W:k {k}, xyz, xyz/mxyz/b64, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 1E /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcompressd W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.66.0F38.W0 8B /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpcompressq W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.66.0F38.W1 8B /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpermd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "[RVM] EVEX.256.66.0F38.W0 36 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "[RVM] EVEX.512.66.0F38.W0 36 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermi2d X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 76 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermi2pd W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 77 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermi2ps W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 77 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermi2q X:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 76 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermilpd W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 0D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermilpd W:xyz {kz}, xyz/mxyz/b64, imm8" , "op": "[RM ] EVEX.xyz.66.0F3A.W1 05 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermilps W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 0C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermilps W:xyz {kz}, xyz/mxyz/b32, imm8" , "op": "[RM ] EVEX.xyz.66.0F3A.W0 04 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "[RVM] EVEX.256.66.0F38.W1 16 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "[RVM] EVEX.512.66.0F38.W1 16 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermpd W:ymm {kz}, ymm/m256/b64, imm8" , "op": "[RM ] EVEX.256.66.0F3A.W1 01 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermpd W:zmm {kz}, zmm/m512/b64, imm8" , "op": "[RM ] EVEX.512.66.0F3A.W1 01 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "[RVM] EVEX.256.66.0F38.W0 16 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "[RVM] EVEX.512.66.0F38.W0 16 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "[RVM] EVEX.256.66.0F38.W1 36 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "[RVM] EVEX.512.66.0F38.W1 36 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermq W:ymm {kz}, ymm/m256/b64, imm8" , "op": "[RM ] EVEX.256.66.0F3A.W1 00 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermq W:zmm {kz}, zmm/m512/b64, imm8" , "op": "[RM ] EVEX.512.66.0F3A.W1 00 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermt2d X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 7E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermt2pd X:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 7F /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermt2ps X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 7F /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpermt2q X:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 7E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpexpandd W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W0 89 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpexpandq W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W1 89 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherdd X:xmm {k}, vm32x" , "op": "[RM ] EVEX.128.66.0F38.W0 90" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherdd X:ymm {k}, vm32y" , "op": "[RM ] EVEX.256.66.0F38.W0 90" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherdd X:zmm {k}, vm32z" , "op": "[RM ] EVEX.512.66.0F38.W0 90" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherdq X:xmm {k}, vm32x" , "op": "[RM ] EVEX.128.66.0F38.W1 90" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherdq X:ymm {k}, vm32x" , "op": "[RM ] EVEX.256.66.0F38.W1 90" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherdq X:zmm {k}, vm32y" , "op": "[RM ] EVEX.512.66.0F38.W1 90" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherqd X:xmm {k}, vm64x" , "op": "[RM ] EVEX.128.66.0F38.W0 91" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherqd X:xmm {k}, vm64y" , "op": "[RM ] EVEX.256.66.0F38.W0 91" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherqd X:ymm {k}, vm64z" , "op": "[RM ] EVEX.512.66.0F38.W0 91" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherqq X:xmm {k}, vm64x" , "op": "[RM ] EVEX.128.66.0F38.W1 91" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherqq X:ymm {k}, vm64y" , "op": "[RM ] EVEX.256.66.0F38.W1 91" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpgatherqq X:zmm {k}, vm64z" , "op": "[RM ] EVEX.512.66.0F38.W1 91" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpmaxsd W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 3D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpmaxsq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 3D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpmaxud W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 3F /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpmaxuq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 3F /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpminsd W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 39 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpminsq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 39 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpminud W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 3B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpminuq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 3B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpmovdb W:xxx/mxxx {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 31 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmovdw W:xxy/mxxy {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 33 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovqb W:xmm[15:0]/m16 {kz}, xmm" , "op": "[MR ] EVEX.128.F3.0F38.W0 32 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovqb W:xmm[31:0]/m32 {kz}, ymm" , "op": "[MR ] EVEX.256.F3.0F38.W0 32 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovqb W:xmm[63:0]/m64 {kz}, zmm" , "op": "[MR ] EVEX.512.F3.0F38.W0 32 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovqd W:xxy/mxxy {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 35 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovqw W:xxx/mxxx {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 34 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmovsdb W:xxx/mxxx {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 21 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmovsdw W:xxy/mxxy {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 23 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovsqb W:xmm[15:0]/m16 {kz}, xmm" , "op": "[MR ] EVEX.128.F3.0F38.W0 22 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovsqb W:xmm[31:0]/m32 {kz}, ymm" , "op": "[MR ] EVEX.256.F3.0F38.W0 22 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovsqb W:xmm[63:0]/m64 {kz}, zmm" , "op": "[MR ] EVEX.512.F3.0F38.W0 22 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovsqd W:xxy/mxxy {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 25 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovsqw W:xxx/mxxx {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 24 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmovsxbd W:xyz {kz}, xxx/mxxx" , "op": "[RM ] EVEX.xyz.66.0F38.WIG 21 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmovsxbq W:xmm {kz}, xmm[15:0]/m16" , "op": "[RM ] EVEX.128.66.0F38.WIG 22 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovsxbq W:ymm {kz}, xmm[31:0]/m32" , "op": "[RM ] EVEX.256.66.0F38.WIG 22 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovsxbq W:zmm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.512.66.0F38.WIG 22 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovsxdq W:xyz {kz}, xxy/mxxy" , "op": "[RM ] EVEX.xyz.66.0F38.W0 25 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovsxwd W:xyz {kz}, xxy/mxxy" , "op": "[RM ] EVEX.xyz.66.0F38.WIG 23 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovsxwq W:xyz {kz}, xxx/mxxx" , "op": "[RM ] EVEX.xyz.66.0F38.WIG 24 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmovusdb W:xxx/mxxx {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 11 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmovusdw W:xxy/mxxy {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 13 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovusqb W:xmm[15:0]/m16 {kz}, xmm" , "op": "[MR ] EVEX.128.F3.0F38.W0 12 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovusqb W:xmm[31:0]/m32 {kz}, ymm" , "op": "[MR ] EVEX.256.F3.0F38.W0 12 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovusqb W:xmm[63:0]/m64 {kz}, zmm" , "op": "[MR ] EVEX.512.F3.0F38.W0 12 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovusqd W:xxy/mxxy {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 15 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovusqw W:xxx/mxxx {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 14 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmovzxbd W:xyz {kz}, xxx/mxxx" , "op": "[RM ] EVEX.xyz.66.0F38.WIG 31 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmovzxbq W:xmm {kz}, xmm[15:0]/m16" , "op": "[RM ] EVEX.128.66.0F38.WIG 32 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovzxbq W:ymm {kz}, xmm[31:0]/m32" , "op": "[RM ] EVEX.256.66.0F38.WIG 32 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovzxbq W:zmm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.512.66.0F38.WIG 32 /r" , "tt": "ovm" , "vl": "xy"},
|
|
{"any": "vpmovzxdq W:xyz {kz}, xxy/mxxy" , "op": "[RM ] EVEX.xyz.66.0F38.W0 35 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovzxwd W:xyz {kz}, xxy/mxxy" , "op": "[RM ] EVEX.xyz.66.0F38.WIG 33 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovzxwq W:xyz {kz}, xxx/mxxx" , "op": "[RM ] EVEX.xyz.66.0F38.WIG 34 /r" , "tt": "qvm" , "vl": "xy"},
|
|
{"any": "vpmuldq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 28 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpmulld W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 40 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpmuludq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 F4 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpord W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 EB /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vporq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 EB /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vprold W:xyz {kz}, xyz/mxyz/b32, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W0 72 /1 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vprolq W:xyz {kz}, xyz/mxyz/b64, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W1 72 /1 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vprolvd W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 15 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vprolvq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 15 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vprord W:xyz {kz}, xyz/mxyz/b32, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W0 72 /0 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vprorq W:xyz {kz}, xyz/mxyz/b64, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W1 72 /0 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vprorvd W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 14 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vprorvq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 14 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpscatterdd W:vm32x {k}, xmm" , "op": "[MR ] EVEX.128.66.0F38.W0 A0 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterdd W:vm32y {k}, ymm" , "op": "[MR ] EVEX.256.66.0F38.W0 A0 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterdd W:vm32z {k}, zmm" , "op": "[MR ] EVEX.512.66.0F38.W0 A0 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterdq W:vm32x {k}, xmm" , "op": "[MR ] EVEX.128.66.0F38.W1 A0 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterdq W:vm32x {k}, ymm" , "op": "[MR ] EVEX.256.66.0F38.W1 A0 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterdq W:vm32y {k}, zmm" , "op": "[MR ] EVEX.512.66.0F38.W1 A0 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterqd W:vm64x {k}, xmm" , "op": "[MR ] EVEX.128.66.0F38.W0 A1 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterqd W:vm64y {k}, xmm" , "op": "[MR ] EVEX.256.66.0F38.W0 A1 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterqd W:vm64z {k}, ymm" , "op": "[MR ] EVEX.512.66.0F38.W0 A1 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterqq W:vm64x {k}, xmm" , "op": "[MR ] EVEX.128.66.0F38.W1 A1 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterqq W:vm64y {k}, ymm" , "op": "[MR ] EVEX.256.66.0F38.W1 A1 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpscatterqq W:vm64z {k}, zmm" , "op": "[MR ] EVEX.512.66.0F38.W1 A1 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpshufd W:xyz {kz}, xyz/mxyz/b32, imm8" , "op": "[RM ] EVEX.xyz.66.0F.W0 70 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpslld W:xyz {kz}, xyz, xmm/m128" , "op": "[RVM] EVEX.xyz.66.0F.W0 F2 /r" , "tt": "m128" , "vl": "xy"},
|
|
{"any": "vpslld W:xyz {kz}, xyz/mxyz/b32, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W0 72 /6 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsllq W:xyz {kz}, xyz, xmm/m128" , "op": "[RVM] EVEX.xyz.66.0F.W1 F3 /r" , "tt": "m128" , "vl": "xy"},
|
|
{"any": "vpsllq W:xyz {kz}, xyz/mxyz/b64, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W1 73 /6 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsllvd W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 47 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsllvq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 47 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsrad W:xyz {kz}, xyz, xmm/m128" , "op": "[RVM] EVEX.xyz.66.0F.W0 E2 /r" , "tt": "m128" , "vl": "xy"},
|
|
{"any": "vpsrad W:xyz {kz}, xyz/mxyz/b32, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W0 72 /4 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsraq W:xyz {kz}, xyz, xmm/m128" , "op": "[RVM] EVEX.xyz.66.0F.W1 E2 /r" , "tt": "m128" , "vl": "xy"},
|
|
{"any": "vpsraq W:xyz {kz}, xyz/mxyz/b64, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W1 72 /4 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsravd W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 46 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsravq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 46 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsrld W:xyz {kz}, xyz, xmm/m128" , "op": "[RVM] EVEX.xyz.66.0F.W0 D2 /r" , "tt": "m128" , "vl": "xy"},
|
|
{"any": "vpsrld W:xyz {kz}, xyz/mxyz/b32, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W0 72 /2 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsrlq W:xyz {kz}, xyz, xmm/m128" , "op": "[RVM] EVEX.xyz.66.0F.W1 D3 /r" , "tt": "m128" , "vl": "xy"},
|
|
{"any": "vpsrlq W:xyz {kz}, xyz/mxyz/b64, imm8" , "op": "[VM ] EVEX.xyz.66.0F.W1 73 /2 ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsrlvd W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 45 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsrlvq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 45 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsubd W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 FA /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpsubq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 FB /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpternlogd X:xyz {kz}, xyz, xyz/mxyz/b32, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 25 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpternlogq X:xyz {kz}, xyz, xyz/mxyz/b64, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 25 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vptestmd W:k {k}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 27 /r" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vptestmq W:k {k}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 27 /r" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vptestnmd W:k {k}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F3.0F38.W0 27 /r" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vptestnmq W:k {k}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.F3.0F38.W1 27 /r" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpunpckhdq W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 6A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpunpckhqdq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 6D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpunpckldq W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 62 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpunpcklqdq W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 6C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpxord W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 EF /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpxorq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 EF /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrcp14pd W:xyz {kz}, xyz/mxyz/b64" , "op": "[RM ] EVEX.xyz.66.0F38.W1 4C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrcp14ps W:xyz {kz}, xyz/mxyz/b32" , "op": "[RM ] EVEX.xyz.66.0F38.W0 4C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrcp14sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64" , "op": "[RVM] EVEX.LIG.66.0F38.W1 4D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vrcp14ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32" , "op": "[RVM] EVEX.LIG.66.0F38.W0 4D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vrndscalepd W:xyz {kz}, xyz/mxyz/b64, imm8 {sae}" , "op": "[RM ] EVEX.xyz.66.0F3A.W1 09 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrndscaleps W:xyz {kz}, xyz/mxyz/b32, imm8 {sae}" , "op": "[RM ] EVEX.xyz.66.0F3A.W0 08 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrndscalesd W:xmm {kz},xmm[127:64],xmm[63:0]/m64,imm8 {sae}", "op": "[RVM] EVEX.LIG.66.0F3A.W1 0B /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vrndscaless W:xmm {kz},xmm[127:32],xmm[31:0]/m32,imm8 {sae}", "op": "[RVM] EVEX.LIG.66.0F3A.W0 0A /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vrsqrt14pd W:xyz {kz}, xyz/mxyz/b64" , "op": "[RM ] EVEX.xyz.66.0F38.W1 4E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrsqrt14ps W:xyz {kz}, xyz/mxyz/b32" , "op": "[RM ] EVEX.xyz.66.0F38.W0 4E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrsqrt14sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64" , "op": "[RVM] EVEX.LIG.66.0F38.W1 4F /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vrsqrt14ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32" , "op": "[RVM] EVEX.LIG.66.0F38.W0 4F /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vscalefpd W:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W1 2C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vscalefps W:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 2C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vscalefsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "[RVM] EVEX.LIG.66.0F38.W1 2D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vscalefss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "[RVM] EVEX.LIG.66.0F38.W0 2D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vscatterdpd W:vm32x {k}, xmm" , "op": "[MR ] EVEX.128.66.0F38.W1 A2 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterdpd W:vm32x {k}, ymm" , "op": "[MR ] EVEX.256.66.0F38.W1 A2 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterdpd W:vm32y {k}, zmm" , "op": "[MR ] EVEX.512.66.0F38.W1 A2 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterdps W:vm32x {k}, xmm" , "op": "[MR ] EVEX.128.66.0F38.W0 A2 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterdps W:vm32y {k}, ymm" , "op": "[MR ] EVEX.256.66.0F38.W0 A2 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterdps W:vm32z {k}, zmm" , "op": "[MR ] EVEX.512.66.0F38.W0 A2 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterqpd W:vm64x {k}, xmm" , "op": "[MR ] EVEX.128.66.0F38.W1 A3" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterqpd W:vm64y {k}, ymm" , "op": "[MR ] EVEX.256.66.0F38.W1 A3" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterqpd W:vm64z {k}, zmm" , "op": "[MR ] EVEX.512.66.0F38.W1 A3" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterqps W:vm64x {k}, xmm" , "op": "[MR ] EVEX.128.66.0F38.W0 A3" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterqps W:vm64y {k}, xmm" , "op": "[MR ] EVEX.256.66.0F38.W0 A3" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vscatterqps W:vm64z {k}, ymm" , "op": "[MR ] EVEX.512.66.0F38.W0 A3" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vshuff32x4 W:ymm {kz}, ymm, ymm/m256/b32, imm8" , "op": "[RVM] EVEX.256.66.0F3A.W0 23 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vshuff32x4 W:zmm {kz}, zmm, zmm/m512/b32, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W0 23 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vshuff64x2 W:ymm {kz}, ymm, ymm/m256/b64, imm8" , "op": "[RVM] EVEX.256.66.0F3A.W1 23 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vshuff64x2 W:zmm {kz}, zmm, zmm/m512/b64, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W1 23 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vshufi32x4 W:ymm {kz}, ymm, ymm/m256/b32, imm8" , "op": "[RVM] EVEX.256.66.0F3A.W0 43 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vshufi32x4 W:zmm {kz}, zmm, zmm/m512/b32, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W0 43 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vshufi64x2 W:ymm {kz}, ymm, ymm/m256/b64, imm8" , "op": "[RVM] EVEX.256.66.0F3A.W1 43 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vshufi64x2 W:zmm {kz}, zmm, zmm/m512/b64, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W1 43 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vshufpd W:xyz {kz}, xyz, xyz/mxyz/b64, imm8" , "op": "[RVM] EVEX.xyz.66.0F.W1 C6 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vshufps W:xyz {kz}, xyz, xyz/mxyz/b32, imm8" , "op": "[RVM] EVEX.xyz.0F.W0 C6 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vsqrtpd W:xyz {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.66.0F.W1 51 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vsqrtps W:xyz {kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.0F.W0 51 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vsqrtsd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {er}" , "op": "[RVM] EVEX.LIG.F2.0F.W1 51 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vsqrtss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {er}" , "op": "[RVM] EVEX.LIG.F3.0F.W0 51 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vsubpd W:xyz {kz}, xyz, xyz/mxyz/b64 {er}" , "op": "[RVM] EVEX.xyz.66.0F.W1 5C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vsubps W:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.0F.W0 5C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vsubsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "[RVM] EVEX.LIG.F2.0F.W1 5C /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vsubss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "[RVM] EVEX.LIG.F3.0F.W0 5C /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vucomisd R:xmm[63:0], xmm[63:0]/m64 {sae}" , "op": "[RM ] EVEX.LIG.66.0F.W1 2E /r" , "tt": "t1s" , "vl": "no", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vucomiss R:xmm[31:0], xmm[31:0]/m32 {sae}" , "op": "[RM ] EVEX.LIG.NP.0F.W0 2E /r" , "tt": "t1s" , "vl": "no", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vunpckhpd W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 15 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vunpckhps W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.0F.W0 15 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vunpcklpd W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 14 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vunpcklps W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.0F.W0 14 /r" , "tt": "fv" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD CRYPTO_HASH", "ext": "AVX512_F VAES", "instructions": [
|
|
{"any": "vaesdec W:xyz, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG DE /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vaesdeclast W:xyz, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG DF /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vaesenc W:xyz, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG DC /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vaesenclast W:xyz, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG DD /r" , "tt": "fvm" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_F GFNI", "instructions": [
|
|
{"any": "vgf2p8affineinvqb W:xyz {kz}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 CF /r ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vgf2p8affineqb W:xyz {kz}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 CE /r ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vgf2p8mulb W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W0 CF /r" , "tt": "fvm" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_F VPCLMULQDQ", "instructions": [
|
|
{"any": "vpclmulqdq W:xyz, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.WIG 44 /r ib" , "tt": "fvm" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_DQ", "instructions": [
|
|
{"any": "vandnpd W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 55 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vandnps W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.W0 55 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vandpd W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 54 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vandps W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.0F.W0 54 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vbroadcastf32x2 W:ymm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.256.66.0F38.W0 19 /r" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vbroadcastf32x2 W:zmm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.512.66.0F38.W0 19 /r" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vbroadcastf32x8 W:zmm {kz}, m256" , "op": "[RM ] EVEX.512.66.0F38.W0 1B /r" , "tt": "t8" , "vl": "xy"},
|
|
{"any": "vbroadcastf64x2 W:ymm {kz}, m128" , "op": "[RM ] EVEX.256.66.0F38.W1 1A /r" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vbroadcastf64x2 W:zmm {kz}, m128" , "op": "[RM ] EVEX.512.66.0F38.W1 1A /r" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vbroadcasti32x2 W:xmm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.128.66.0F38.W0 59 /r" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vbroadcasti32x2 W:ymm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.256.66.0F38.W0 59 /r" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vbroadcasti32x2 W:zmm {kz}, xmm[63:0]/m64" , "op": "[RM ] EVEX.512.66.0F38.W0 59 /r" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vbroadcasti32x8 W:zmm {kz}, m256" , "op": "[RM ] EVEX.512.66.0F38.W0 5B /r" , "tt": "t8" , "vl": "xy"},
|
|
{"any": "vbroadcasti64x2 W:ymm {kz}, m128" , "op": "[RM ] EVEX.256.66.0F38.W1 5A /r" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vbroadcasti64x2 W:zmm {kz}, m128" , "op": "[RM ] EVEX.512.66.0F38.W1 5A /r" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vcvtpd2qq W:xyz {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.66.0F.W1 7B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtpd2uqq W:xyz {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.66.0F.W1 79 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtps2qq W:xyz {kz}, xxy/mxxy/b32 {er}" , "op": "[RM ] EVEX.xyz.66.0F.W0 7B /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvtps2uqq W:xyz {kz}, xxy/mxxy/b32 {er}" , "op": "[RM ] EVEX.xyz.66.0F.W0 79 /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvtqq2pd W:xyz {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.F3.0F.W1 E6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtqq2ps W:xxy {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.NP.0F.W1 5B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvttpd2uqq W:xyz {kz}, xyz/mxyz/b64 {sae}" , "op": "[RM ] EVEX.xyz.66.0F.W1 78 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvttps2qq W:xyz {kz}, xxy/mxxy/b32 {sae}" , "op": "[RM ] EVEX.xyz.66.0F.W0 7A /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvttps2uqq W:xyz {kz}, xxy/mxxy/b32 {sae}" , "op": "[RM ] EVEX.xyz.66.0F.W0 78 /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvtuqq2pd W:xyz {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.F3.0F.W1 7A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtuqq2ps W:xxy {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.F2.0F.W1 7A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vextractf32x8 W:ymm/m256 {kz}, zmm, imm8" , "op": "[MR ] EVEX.512.66.0F3A.W0 1B /r ib" , "tt": "t8" , "vl": "xy"},
|
|
{"any": "vextractf64x2 W:xmm/m128 {kz}, ymm, imm8" , "op": "[MR ] EVEX.256.66.0F3A.W1 19 /r ib" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vextractf64x2 W:xmm/m128 {kz}, zmm, imm8" , "op": "[MR ] EVEX.512.66.0F3A.W1 19 /r ib" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vextracti32x8 W:ymm/m256 {kz}, zmm, imm8" , "op": "[MR ] EVEX.512.66.0F3A.W0 3B /r ib" , "tt": "t8" , "vl": "xy"},
|
|
{"any": "vextracti64x2 W:xmm/m128 {kz}, ymm, imm8" , "op": "[MR ] EVEX.256.66.0F3A.W1 39 /r ib" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vextracti64x2 W:xmm/m128 {kz}, zmm, imm8" , "op": "[MR ] EVEX.512.66.0F3A.W1 39 /r ib" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vfpclasspd W:k {k}, xyz/mxyz/b64, imm8" , "op": "[RM ] EVEX.xyz.66.0F3A.W1 66 /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vfpclassps W:k {k}, xyz/mxyz/b32, imm8" , "op": "[RM ] EVEX.xyz.66.0F3A.W0 66 /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vfpclasssd W:k {k}, xmm[63:0]/m64, imm8" , "op": "[RM ] EVEX.LIG.66.0F3A.W1 67 /r ib" , "tt": "t1s" , "vl": "no", "k": "zeroing"},
|
|
{"any": "vfpclassss W:k {k}, xmm[31:0]/m32, imm8" , "op": "[RM ] EVEX.LIG.66.0F3A.W0 67 /r ib" , "tt": "t1s" , "vl": "no", "k": "zeroing"},
|
|
{"any": "vinsertf32x8 W:zmm {kz}, zmm, ymm/m256, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W0 1A /r ib" , "tt": "t8" , "vl": "xy"},
|
|
{"any": "vinsertf64x2 W:ymm {kz}, ymm, xmm/m128, imm8" , "op": "[RVM] EVEX.256.66.0F3A.W1 18 /r ib" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vinsertf64x2 W:zmm {kz}, zmm, xmm/m128, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W1 18 /r ib" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vinserti32x8 W:zmm {kz}, zmm, ymm/m256, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W0 3A /r ib" , "tt": "t8" , "vl": "xy"},
|
|
{"any": "vinserti64x2 W:ymm {kz}, ymm, xmm/m128, imm8" , "op": "[RVM] EVEX.256.66.0F3A.W1 38 /r ib" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vinserti64x2 W:zmm {kz}, zmm, xmm/m128, imm8" , "op": "[RVM] EVEX.512.66.0F3A.W1 38 /r ib" , "tt": "t2" , "vl": "xy"},
|
|
{"any": "vorpd W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 56 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vorps W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.NP.0F.W0 56 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpextrd W:r32/m32, xmm, imm8" , "op": "[MR ] EVEX.128.66.0F3A.W0 16 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vpextrq W:r64/m64, xmm, imm8" , "op": "[MR ] EVEX.128.66.0F3A.W1 16 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vpinsrd W:xmm {kz}, xmm, r32/m32, imm8" , "op": "[RVM] EVEX.128.66.0F3A.W0 22 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vpinsrq W:xmm {kz}, xmm, r64/m64, imm8" , "op": "[RVM] EVEX.128.66.0F3A.W1 22 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vpmovd2m W:k, xyz" , "op": "[RM ] EVEX.xyz.F3.0F38.W0 39 /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpmovm2d W:xyz, k" , "op": "[RM ] EVEX.xyz.F3.0F38.W0 38 /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpmovm2q W:xyz, k" , "op": "[RM ] EVEX.xyz.F3.0F38.W1 38 /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpmovq2m W:k, xyz" , "op": "[RM ] EVEX.xyz.F3.0F38.W1 39 /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpmullq W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 40 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrangepd W:xyz {kz}, xyz, xyz/mxyz/b64, imm8 {sae}" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 50 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrangeps W:xyz {kz}, xyz, xyz/mxyz/b32, imm8 {sae}" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 50 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrangesd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64,imm8 {sae}" , "op": "[RVM] EVEX.LIG.66.0F3A.W1 51 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vrangess W:xmm {kz}, xmm[127:32], xmm[31:0]/m32,imm8 {sae}" , "op": "[RVM] EVEX.LIG.66.0F3A.W0 51 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vreducepd W:xyz {kz}, xyz/mxyz/b64, imm8" , "op": "[RM ] EVEX.xyz.66.0F3A.W1 56 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vreduceps W:xyz {kz}, xyz/mxyz/b32, imm8" , "op": "[RM ] EVEX.xyz.66.0F3A.W0 56 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vreducesd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64, imm8" , "op": "[RVM] EVEX.LIG.66.0F3A.W1 57 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vreducess W:xmm {kz}, xmm[127:32], xmm[31:0]/m32, imm8" , "op": "[RVM] EVEX.LIG.66.0F3A.W0 57 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vxorpd W:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F.W1 57 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vxorps W:xyz {kz}, ~xyz, ~xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.0F.W0 57 /r" , "tt": "fv" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_BW", "instructions": [
|
|
{"any": "vdbpsadbw W:xyz {kz}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 42 /r ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqu16 W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.F2.0F.W1 6F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqu16 W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.F2.0F.W1 7F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqu8 W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.F2.0F.W0 6F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vmovdqu8 W:xyz/mxyz {kz}, xyz" , "op": "[MR ] EVEX.xyz.F2.0F.W0 7F /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpabsb W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38 1C /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpabsw W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38 1D /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpackssdw W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F.W0 6B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpacksswb W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 63 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpackusdw W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 2B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpackuswb W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 67 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpaddb W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG FC /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpaddsb W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG EC /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpaddsw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG ED /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpaddusb W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG DC /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpaddusw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG DD /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpaddw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG FD /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpalignr W:xyz {kz}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.WIG 0F /r ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpavgb W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG E0 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpavgw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG E3 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpblendmb W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W0 66 /r" , "tt": "fvm" , "vl": "xy", "k": "blend"},
|
|
{"any": "vpblendmw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 66 /r" , "tt": "fvm" , "vl": "xy", "k": "blend"},
|
|
{"any": "vpbroadcastb W:xyz {kz}, r32[7:0]" , "op": "[RM ] EVEX.xyz.66.0F38.W0 7A /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpbroadcastb W:xyz {kz}, xmm[7:0]/m8" , "op": "[RM ] EVEX.xyz.66.0F38.W0 78 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpbroadcastw W:xyz {kz}, r32[15:0]" , "op": "[RM ] EVEX.xyz.66.0F38.W0 7B /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpbroadcastw W:xyz {kz}, xmm[15:0]/m16" , "op": "[RM ] EVEX.xyz.66.0F38.W0 79 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpcmpb W:k {k}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 3F /r ib" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpeqb W:k {k}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 74 /r" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpeqw W:k {k}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 75 /r" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpgtb W:k {k}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 64 /r" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpgtw W:k {k}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 65 /r" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpub W:k {k}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 3E /r ib" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpuw W:k {k}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 3E /r ib" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpcmpw W:k {k}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 3F /r ib" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpermi2w X:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 75 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpermt2w X:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 7D /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpermw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 8D /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpextrb W:r32[7:0]/m8 , xmm, imm8" , "op": "[MR ] EVEX.128.66.0F3A.WIG 14 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vpextrw W:r32[15:0], xmm, imm8" , "op": "[RM ] EVEX.128.66.0F.WIG C5 /r ib" , "tt": "none" , "vl": "no"},
|
|
{"any": "vpextrw W:r32[15:0]/m16, xmm, imm8" , "op": "[MR ] EVEX.128.66.0F3A.WIG 15 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vpinsrb W:xmm {kz}, xmm, r32[7:0]/m8, imm8" , "op": "[RVM] EVEX.128.66.0F3A.WIG 20 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vpinsrw W:xmm {kz}, xmm, r32[15:0]/m16, imm8" , "op": "[RVM] EVEX.128.66.0F.WIG C4 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vpmaddubsw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG 04 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmaddwd W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG F5 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmaxsb W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG 3C /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmaxsw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG EE /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmaxub W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG DE /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmaxuw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG 3E /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpminsb W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG 38 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpminsw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG EA /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpminub W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F DA /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpminuw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38 3A /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmovb2m W:k, xyz" , "op": "[RM ] EVEX.xyz.F3.0F38.W0 29 /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpmovm2b W:xyz, k" , "op": "[RM ] EVEX.xyz.F3.0F38.W0 28 /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpmovm2w W:xyz, k" , "op": "[RM ] EVEX.xyz.F3.0F38.W1 28 /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpmovswb W:xxy/mxxy {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 20 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovsxbw W:xyz {kz}, xxy/mxxy" , "op": "[RM ] EVEX.xyz.66.0F38.WIG 20 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovuswb W:xxy/mxxy {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 10 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovw2m W:k, xyz" , "op": "[RM ] EVEX.xyz.F3.0F38.W1 29 /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpmovwb W:xxy/mxxy {kz}, xyz" , "op": "[MR ] EVEX.xyz.F3.0F38.W0 30 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmovzxbw W:xyz {kz}, xxy/mxxy" , "op": "[RM ] EVEX.xyz.66.0F38.WIG 30 /r" , "tt": "hvm" , "vl": "xy"},
|
|
{"any": "vpmulhrsw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG 0B /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmulhuw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG E4 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmulhw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG E5 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmullw W:xyz {kz}, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG D5 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsadbw W:xyz, ~xyz, ~xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG F6 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpshufb W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.WIG 00 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpshufhw W:xyz {kz}, xyz/mxyz, imm8" , "op": "[RM ] EVEX.xyz.F3.0F.WIG 70 /r ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpshuflw W:xyz {kz}, xyz/mxyz, imm8" , "op": "[RM ] EVEX.xyz.F2.0F.WIG 70 /r ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpslldq W:xyz, xyz/mxyz, imm8" , "op": "[VM ] EVEX.xyz.66.0F.WIG 73 /7 ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsllvw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 12 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsllw W:xyz {kz}, xyz, xmm/m128" , "op": "[RVM] EVEX.xyz.66.0F.WIG F1 /r" , "tt": "m128" , "vl": "xy"},
|
|
{"any": "vpsllw W:xyz {kz}, xyz/mxyz, imm8" , "op": "[VM ] EVEX.xyz.66.0F.WIG 71 /6 ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsravw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 11 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsraw W:xyz {kz}, xyz, xmm/m128" , "op": "[RVM] EVEX.xyz.66.0F.WIG E1 /r" , "tt": "m128" , "vl": "xy"},
|
|
{"any": "vpsraw W:xyz {kz}, xyz/mxyz, imm8" , "op": "[VM ] EVEX.xyz.66.0F.WIG 71 /4 ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsrldq W:xyz, xyz/mxyz, imm8" , "op": "[VM ] EVEX.xyz.66.0F.WIG 73 /3 ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsrlvw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 10 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsrlw W:xyz {kz}, xyz, xmm/m128" , "op": "[RVM] EVEX.xyz.66.0F.WIG D1 /r" , "tt": "m128" , "vl": "xy"},
|
|
{"any": "vpsrlw W:xyz {kz}, xyz/mxyz, imm8" , "op": "[VM ] EVEX.xyz.66.0F.WIG 71 /2 ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsubb W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG F8 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsubsb W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG E8 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsubsw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG E9 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsubusb W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG D8 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsubusw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG D9 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpsubw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG F9 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vptestmb W:k {k}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W0 26 /r" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vptestmw W:k {k}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 26 /r" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vptestnmb W:k {k}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.F3.0F38.W0 26 /r" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vptestnmw W:k {k}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.F3.0F38.W1 26 /r" , "tt": "fvm" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vpunpckhbw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 68 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpunpckhwd W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 69 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpunpcklbw W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 60 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpunpcklwd W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F.WIG 61 /r" , "tt": "fvm" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_CD", "instructions": [
|
|
{"any": "vpbroadcastmb2q W:xyz, k" , "op": "[RM ] EVEX.xyz.F3.0F38.W1 2A /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpbroadcastmw2d W:xyz, k" , "op": "[RM ] EVEX.xyz.F3.0F38.W0 3A /r" , "tt": "none" , "vl": "xy"},
|
|
{"any": "vpconflictd W:xyz {kz}, xyz/mxyz/b32" , "op": "[RM ] EVEX.xyz.66.0F38.W0 C4 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpconflictq W:xyz {kz}, xyz/mxyz/b32" , "op": "[RM ] EVEX.xyz.66.0F38.W1 C4 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vplzcntd W:xyz {kz}, xyz/mxyz/b32" , "op": "[RM ] EVEX.xyz.66.0F38.W0 44 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vplzcntq W:xyz {kz}, xyz/mxyz/b64" , "op": "[RM ] EVEX.xyz.66.0F38.W1 44 /r" , "tt": "fv" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_IFMA", "instructions": [
|
|
{"any": "vpmadd52luq X:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 B4 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpmadd52huq X:xyz {kz}, ~xyz, ~xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 B5 /r" , "tt": "fv" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_VPOPCNTDQ", "instructions": [
|
|
{"any": "vpopcntd W:xyz {kz}, xyz/mxyz/b32" , "op": "[RM ] EVEX.xyz.66.0F38.W0 55 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpopcntq W:xyz {kz}, xyz/mxyz/b64" , "op": "[RM ] EVEX.xyz.66.0F38.W1 55 /r" , "tt": "fv" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_VBMI", "instructions": [
|
|
{"any": "vpermb W:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W0 8D /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpermi2b X:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W0 75 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpermt2b X:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W0 7D /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpmultishiftqb W:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 83 /r" , "tt": "fv" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_VBMI2", "instructions": [
|
|
{"any": "vpcompressb W:xyz/mxyz {kz}, xyz" , "op": "[RVM] EVEX.xyz.66.0F38.W0 63 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpcompressw W:xyz/mxyz {kz}, xyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 63 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpexpandb W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W0 62 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpexpandw W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W1 62 /r" , "tt": "t1s" , "vl": "xy"},
|
|
{"any": "vpshldd W:xyz {kz}, xyz, xyz/mxyz/b32, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 71 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpshldq W:xyz {kz}, xyz, xyz/mxyz/b64, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 71 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpshldvd X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 71 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpshldvq X:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 71 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpshldvw X:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 70 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpshldw W:xyz {kz}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 70 /r ib" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpshrdd W:xyz {kz}, xyz, xyz/mxyz/b32, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 73 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpshrdq W:xyz {kz}, xyz, xyz/mxyz/b64, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 73 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpshrdvd X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 73 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpshrdvq X:xyz {kz}, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.66.0F38.W1 73 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpshrdvw X:xyz {kz}, xyz, xyz/mxyz" , "op": "[RVM] EVEX.xyz.66.0F38.W1 72 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpshrdw W:xyz {kz}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 72 /r ib" , "tt": "fvm" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_VNNI", "instructions": [
|
|
{"any": "vpdpbusd X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 50 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpdpbusds X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 51 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpdpwssd X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 52 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vpdpwssds X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 53 /r" , "tt": "fv" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_BITALG", "instructions": [
|
|
{"any": "vpopcntb W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W0 54 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpopcntw W:xyz {kz}, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W1 54 /r" , "tt": "fvm" , "vl": "xy"},
|
|
{"any": "vpshufbitqmb W:k {k}, xyz, xyz/mxyz" , "op": "[RM ] EVEX.xyz.66.0F38.W0 8F /r" , "tt": "fvm" , "vl": "xy", "k": "zeroing"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_VP2INTERSECT", "instructions": [
|
|
{"any": "vp2intersectd W:k, W:k+1, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F2.0F38.W0 68 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vp2intersectq W:k, W:k+1, xyz, xyz/mxyz/b64" , "op": "[RVM] EVEX.xyz.F2.0F38.W1 68 /r" , "tt": "fv" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_BF16", "instructions": [
|
|
{"any": "vcvtne2ps2bf16 W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F2.0F38.W0 72 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtneps2bf16 W:xxy {kz}, xyz/mxyz/b32" , "op": "[RM ] EVEX.xyz.F3.0F38.W0 72 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vdpbf16ps W:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F3.0F38.W0 52 /r" , "tt": "fv" , "vl": "xy"}
|
|
]},
|
|
|
|
{"category": "AVX512 SIMD", "ext": "AVX512_FP16", "instructions": [
|
|
{"any": "vaddph W:xyz {kz}, ~xyz, ~xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.NP.MAP5.W0 58 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vaddsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.F3.MAP5.W0 58 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcmpph W:k {k}, xyz, xyz/mxyz/b16, imm8 {sae}" , "op": "[RVM] EVEX.xyz.NP.0F3A.W0 C2 /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vcmpsh W:k {k}, xmm[15:0], xmm[15:0]/m16, imm8 {sae}" , "op": "[RVM] EVEX.LIG.F3.0F3A.W0 C2 /r ib" , "tt": "t1s" , "vl": "no", "k": "zeroing"},
|
|
{"any": "vcomish R:xmm[15:0], xmm[15:0]/m16 {sae}" , "op": "[RM ] EVEX.LIG.NP.MAP5.W0 2F /r" , "tt": "t1s" , "vl": "no", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vcvtdq2ph W:xxy {kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 5B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtpd2ph W:xxx {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.66.MAP5.W1 5A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtph2dq W:xyz {kz}, xxy/mxxy/b16 {er}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 5B /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvtph2pd W:xyz {kz}, xxx/mxxx/b16 {sae}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 5A /r" , "tt": "qv" , "vl": "xy"},
|
|
{"any": "vcvtph2psx W:xyz {kz}, xxy/mxxy/b16 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP6.W0 13 /r" , "tt": "qv" , "vl": "xy"},
|
|
{"any": "vcvtph2qq W:xyz {kz}, xxx/mxxx/b16 {er}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 7B /r" , "tt": "qv" , "vl": "xy"},
|
|
{"any": "vcvtph2udq W:xyz {kz}, xxy/mxxy/b16 {er}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 79 /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvtph2uqq W:xyz {kz}, xxx/mxxx/b16 {er}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 79 /r" , "tt": "qv" , "vl": "xy"},
|
|
{"any": "vcvtph2uw W:xyz {kz}, xyz/mxyz/b16 {er}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 7D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtph2w W:xyz {kz}, xyz/mxyz/b16 {er}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 7D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtps2phx W:xxy {kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 1D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtqq2ph W:xmm {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W1 5B /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtsd2sh W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "[RVM] EVEX.LIG.F2.MAP5.W1 5A /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtsh2sd W:xmm {kz}, xmm, xmm[15:0]/m16 {sae}" , "op": "[RVM] EVEX.LIG.F3.MAP5.W0 5A /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtsh2si W:ry, xmm[15:0]/m16 {er}" , "op": "[RM ] EVEX.LIG.F3.MAP5.Wy 2D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtsh2ss W:xmm {kz}, xmm, xmm/m16 {sae}" , "op": "[RVM] EVEX.LIG.NP.MAP6.W0 13 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtsh2usi W:ry, xmm[15:0]/m16 {er}" , "op": "[RM ] EVEX.LIG.F3.MAP5.Wy 79 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtsi2sh W:xmm, xmm, ry/my {er}" , "op": "[RVM] EVEX.LIG.F3.MAP5.Wy 2A /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtss2sh W:xmm {kz}, xmm, xmm/m32 {er}" , "op": "[RVM] EVEX.LIG.NP.MAP5.W0 1D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvttph2dq W:xyz {kz}, xxy/mxxy/b16 {sae}" , "op": "[RM ] EVEX.xyz.F3.MAP5.W0 5B /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvttph2qq W:xyz {kz}, xxx/mxxx/b16 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 7A /r" , "tt": "qv" , "vl": "xy"},
|
|
{"any": "vcvttph2udq W:xyz {kz}, xxy/mxxy/b16 {sae}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 78 /r" , "tt": "hv" , "vl": "xy"},
|
|
{"any": "vcvttph2uqq W:xyz {kz}, xxx/mxxx/b16 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 78 /r" , "tt": "qv" , "vl": "xy"},
|
|
{"any": "vcvttph2uw W:xyz {kz}, xyz/mxyz/b16 {sae}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 7C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvttph2w W:xyz {kz}, xyz/mxyz/b16 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 7C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvttsh2si W:ry, xmm[15:0]/m16 {sae}" , "op": "[RM ] EVEX.LIG.F3.MAP5.Wy 2C /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvttsh2usi W:ry, xmm[15:0]/m16 {sae}" , "op": "[RM ] EVEX.LIG.F3.MAP5.Wy 78 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtudq2ph W:xxy {kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.F2.MAP5.W0 7A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtuqq2ph W:xxx {kz}, xyz/mxyz/b64 {er}" , "op": "[RM ] EVEX.xyz.F2.MAP5.W1 7A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtusi2sh W:xmm, xmm, ry/my {er}" , "op": "[RVM] EVEX.LIG.F3.MAP5.Wy 7B /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vcvtuw2ph W:xyz {kz}, xyz/mxyz/b16 {er}" , "op": "[RM ] EVEX.xyz.F2.MAP5.W0 7D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vcvtw2ph W:xyz {kz}, xyz/mxyz/b16 {er}" , "op": "[RM ] EVEX.xyz.F3.MAP5.W0 7D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vdivph W:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.NP.MAP5.W0 5E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vdivsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.F3.MAP5.W0 5E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfcmaddcph X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.F2.MAP6.W0 56 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfcmaddcsh x:xmm {kz}, xmm, xmm/m32 {er}" , "op": "[RVM] EVEX.LIG.F2.MAP6.W0 57 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfcmulcph X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.F2.MAP6.W0 D6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfcmulcsh x:xmm {kz}, xmm, xmm/m32 {er}" , "op": "[RVM] EVEX.LIG.F2.MAP6.W0 D7 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmadd132ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 98 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmadd132sh x:xmm {kz}, xmm, xmm/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 99 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmadd213ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 A8 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmadd213sh x:xmm {kz}, xmm, xmm/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 A9 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmadd231ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 B8 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmadd231sh x:xmm {kz}, xmm, xmm/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 B9 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmaddcph X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.F3.MAP6.W0 56 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmaddcsh x:xmm {kz}, xmm, xmm/m32 {er}" , "op": "[RVM] EVEX.LIG.F3.MAP6.W0 57 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmaddsub132ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 96 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmaddsub213ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 A6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmaddsub231ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 B6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub132ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 9A /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub132sh x:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 9B /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmsub213ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 AA /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub213sh x:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 AB /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmsub231ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 BA /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsub231sh x:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 BB /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfmsubadd132ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 97 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsubadd213ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 A7 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmsubadd231ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 B7 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmulcph X:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.F3.MAP6.W0 D6 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfmulcsh X:xmm {kz}, xmm, xmm/m32 {er}" , "op": "[RVM] EVEX.LIG.F3.MAP6.W0 D7 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmadd132ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 9C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd132sh x:xmm {kz}, xmm, xmm/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 9D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmadd213ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 AC /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd213sh x:xmm {kz}, xmm, xmm/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 AD /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmadd231ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 BC /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmadd231sh x:xmm {kz}, xmm, xmm/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 BD /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmsub132ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 9E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmsub132sh x:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 9F /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmsub213ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 AE /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmsub213sh x:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 AF /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfnmsub231ph X:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 BE /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vfnmsub231sh x:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 BF /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vfpclassph W:k {k}, xyz/mxyz/b16, imm8" , "op": "[RM ] EVEX.xyz.NP.0F3A.W0 66 /r ib" , "tt": "fv" , "vl": "xy", "k": "zeroing"},
|
|
{"any": "vfpclasssh W:k {k}, xmm[15:0]/m16, imm8" , "op": "[RM ] EVEX.LIG.NP.0F3A.W0 67 /r ib" , "tt": "t1s" , "vl": "no", "k": "zeroing"},
|
|
{"any": "vgetexpph W:xyz {kz}, xyz/mxyz/b16 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP6.W0 42 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vgetexpsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16 {sae}" , "op": "[RM ] EVEX.LIG.66.MAP6.W0 43 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vgetmantph W:xyz {kz}, xyz/mxyz/b16, imm8 {sae}" , "op": "[RM ] EVEX.xyz.NP.0F3A.W0 26 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vgetmantsh W:xmm {kz},xmm[127:16],xmm[15:0]/m16,imm8 {sae}" , "op": "[RM ] EVEX.LIG.NP.0F3A.W0 27 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmaxph W:xyz {kz}, xyz, xyz/mxyz/b16 {sae}" , "op": "[RVM] EVEX.xyz.NP.MAP5.W0 5F /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vmaxsh W:xmm {kz}, xmm, xmm[15:0]/m16 {sae}" , "op": "[RVM] EVEX.LIG.F3.MAP5.W0 5F /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vminph W:xyz {kz}, xyz, xyz/mxyz/b16 {sae}" , "op": "[RVM] EVEX.xyz.NP.MAP5.W0 5D /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vminsh W:xmm {kz}, xmm, xmm[15:0]/m16 {sae}" , "op": "[RVM] EVEX.LIG.F3.MAP5.W0 5D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovsh W:m16, xmm[15:0]" , "op": "[MR ] EVEX.LIG.F3.MAP5.W0 11 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovsh W:xmm[15:0] {kz}, m16" , "op": "[RM ] EVEX.LIG.F3.MAP5.W0 10 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovsh W:xmm {kz}, xmm[127:16], xmm[15:0]" , "op": "[MVR] EVEX.LIG.F3.MAP5.W0 11 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovsh W:xmm {kz}, xmm[127:16], xmm[15:0]" , "op": "[RVM] EVEX.LIG.F3.MAP5.W0 10 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovw W:r32[15:0]/m16, xmm[15:0]" , "op": "[MR ] EVEX.128.66.MAP5.WIG 7E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmovw W:xmm[15:0] {kz}, r32[15:0]/m16" , "op": "[RM ] EVEX.128.66.MAP5.WIG 6E /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vmulph W:xyz {kz}, ~xyz, ~xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.NP.MAP5.W0 59 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vmulsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.F3.MAP5.W0 59 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vrcpph W:xyz {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.66.MAP6.W0 4C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrcpsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 4D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vreduceph W:xyz {kz}, xyz/mxyz/b16, imm8 {sae}" , "op": "[RM ] EVEX.xyz.NP.0F3A.W0 56 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vreducesh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16,imm8 {sae}", "op": "[RVM] EVEX.LIG.NP.0F3A.W0 57 /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vrndscaleph W:xyz {kz}, xyz/mxyz/b16, imm8 {sae}" , "op": "[RM ] EVEX.xyz.NP.0F3A.W0 08 /r ib" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrndscalesh W:xmm {kz},xmm[127:16],xmm[15:0]/m16,imm8 {sae}", "op": "[RVM] EVEX.LIG.NP.0F3A.W0 0A /r ib" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vrsqrtph W:xyz {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.66.MAP6.W0 4E /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vrsqrtsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 4F /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vscalefph W:xyz {kz}, xyz, xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.66.MAP6.W0 2C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vscalefsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.66.MAP6.W0 2D /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vsqrtph W:xyz {kz}, xyz/mxyz/b16 {er}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 51 /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vsqrtsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.F3.MAP5.W0 51 /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vsubph W:xyz {kz}, ~xyz, ~xyz/mxyz/b16 {er}" , "op": "[RVM] EVEX.xyz.NP.MAP5.W0 5C /r" , "tt": "fv" , "vl": "xy"},
|
|
{"any": "vsubsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "[RVM] EVEX.LIG.F3.MAP5.W0 5C /r" , "tt": "t1s" , "vl": "no"},
|
|
{"any": "vucomish R:xmm[15:0], xmm[15:0]/m16 {sae}" , "op": "[RM ] EVEX.LIG.NP.MAP5.W0 2E /r" , "tt": "t1s" , "vl": "no", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}
|
|
]},
|
|
|
|
{"category": "AVX10_2 SIMD", "ext": "AVX10_2", "instructions": [
|
|
{"any": "vaddnepbf16 W:xyz{kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.66.MAP5.W0 58 /r" , "tt": "fv"},
|
|
{"any": "vcmppbf16 W:k {k}, xyz, xyz/mxyz/b16, imm8" , "op": "[RVM] EVEX.xyz.F2.0F3A.W0 C2 /r ib" , "tt": "fv" , "k": "zeroing"},
|
|
{"any": "vcomsbf16 R:xmm, xmm/m16" , "op": "[RM ] EVEX.LIG.66.MAP5.W0 2F /r" , "tt": "t1s" , "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vdivnepbf16 W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.66.MAP5.W0 5E /r" , "tt": "fv"},
|
|
{"any": "vfmadd132nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 98 /r" , "tt": "fv"},
|
|
{"any": "vfmadd213nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 A8 /r" , "tt": "fv"},
|
|
{"any": "vfmadd231nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 B8 /r" , "tt": "fv"},
|
|
{"any": "vfmsub132nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 9A /r" , "tt": "fv"},
|
|
{"any": "vfmsub213nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 AA /r" , "tt": "fv"},
|
|
{"any": "vfmsub231nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 BA /r" , "tt": "fv"},
|
|
{"any": "vfnmadd132nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 9C /r" , "tt": "fv"},
|
|
{"any": "vfnmadd213nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 AC /r" , "tt": "fv"},
|
|
{"any": "vfnmadd231nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 BC /r" , "tt": "fv"},
|
|
{"any": "vfnmsub132nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 9E /r" , "tt": "fv"},
|
|
{"any": "vfnmsub213nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 AE /r" , "tt": "fv"},
|
|
{"any": "vfnmsub231nepbf16 X:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 BE /r" , "tt": "fv"},
|
|
{"any": "vfpclasspbf16 W:k {k}, xyz/mxyz/b16, imm8" , "op": "[RM ] EVEX.xyz.F2.0F3A.W0 66 /r ib" , "tt": "fv" , "k": "zeroing"},
|
|
{"any": "vgetexppbf16 W:xyz {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 42 /r" , "tt": "fv"},
|
|
{"any": "vgetmantpbf16 W:xyz {kz}, xyz/mxyz/b16, imm8" , "op": "[RM ] EVEX.xyz.F2.0F3A.W0 26 /r ib" , "tt": "fv"},
|
|
{"any": "vmaxpbf16 W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.66.MAP5.W0 5F /r" , "tt": "fv"},
|
|
{"any": "vminpbf16 W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.66.MAP5.W0 5D /r" , "tt": "fv"},
|
|
{"any": "vmulnepbf16 W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.66.MAP5.W0 59 /r" , "tt": "fv"},
|
|
{"any": "vrcppbf16 W:xyz {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.NP.MAP6.W0 4C /r" , "tt": "fv"},
|
|
{"any": "vreducenepbf16 W:xyz {kz}, xyz/mxyz/b16, imm8" , "op": "[RM ] EVEX.xyz.F2.0F3A.W0 56 /r ib" , "tt": "fv"},
|
|
{"any": "vrndscalenepbf16 W:xyz {kz}, xyz/mxyz/b16, imm8" , "op": "[RM ] EVEX.xyz.F2.0F3A.W0 08 /r ib" , "tt": "fv"},
|
|
{"any": "vrsqrtpbf16 W:xyz {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.NP.MAP6.W0 4E /r" , "tt": "fv"},
|
|
{"any": "vscalefpbf16 W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP6.W0 2C /r" , "tt": "fv"},
|
|
{"any": "vsqrtnepbf16 W:xyz {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 51 /r " , "tt": "fv"},
|
|
{"any": "vsubnepbf16 W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.66.MAP5.W0 5C /r" , "tt": "fv"}
|
|
]},
|
|
|
|
{"category": "AVX10_2 SIMD", "ext": "AVX10_2", "instructions": [
|
|
{"any": "vcomxsd R:xmm[63:0], R:xmm[63:0]/m64 {sae}" , "op": "[RM ] EVEX.LIG.F3.0F.W1 2F /r" , "tt": "t1s" , "io": "OF=W SF=W ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vcomxsh R:xmm[15:0], R:xmm[15:0]/m16 {sae}" , "op": "[RM ] EVEX.LIG.F2.MAP5.W0 2F /r" , "tt": "t1s" , "io": "OF=W SF=W ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vcomxss R:xmm[31:0], R:xmm[31:0]/m32 {sae}" , "op": "[RM ] EVEX.LIG.F2.0F.W0 2F /r" , "tt": "t1s" , "io": "OF=W SF=W ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vucomxsd R:xmm[63:0], R:xmm[63:0]/m64 {sae}" , "op": "[RM ] EVEX.LIG.F3.0F.W1 2E /r" , "tt": "t1s" , "io": "OF=W SF=W ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vucomxsh R:xmm[15:0], R:xmm[15:0]/m16 {sae}" , "op": "[RM ] EVEX.LIG.F2.MAP5.W0 2E /r" , "tt": "t1s" , "io": "OF=W SF=W ZF=W AF=0 PF=W CF=W"},
|
|
{"any": "vucomxss R:xmm[31:0], R:xmm[31:0]/m32 {sae}" , "op": "[RM ] EVEX.LIG.F2.0F.W0 2E /r" , "tt": "t1s" , "io": "OF=W SF=W ZF=W AF=0 PF=W CF=W"}
|
|
]},
|
|
|
|
{"category": "AVX10_2 SIMD", "ext": "AVX10_2", "instructions": [
|
|
{"any": "vcvt2ps2phx W:xyz {kz}, xyz, xyz/mxyz/b32 {er}" , "op": "[RVM] EVEX.xyz.66.0F38.W0 67 /r" , "tt": "fv"},
|
|
{"any": "vcvtbiasph2bf8 W:xxy {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.0F38.W0 74 /r" , "tt": "fv"},
|
|
{"any": "vcvtbiasph2bf8s W:xxy {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP5.W0 74 /r" , "tt": "fv"},
|
|
{"any": "vcvtbiasph2hf8 W:xxy {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP5.W0 18 /r" , "tt": "fv"},
|
|
{"any": "vcvtbiasph2hf8s W:xxy {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.NP.MAP5.W0 1B /r" , "tt": "fv"},
|
|
{"any": "vcvthf82ph W:xyz {kz}, xxy/mxxy" , "op": "[RM ] EVEX.xyz.F2.MAP5.W0 1E /r" , "tt": "hv"},
|
|
{"any": "vcvtne2ph2bf8 W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.F2.0F38.W0 74 /r" , "tt": "fv"},
|
|
{"any": "vcvtne2ph2bf8s W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.F2.MAP5.W0 74 /r" , "tt": "fv"},
|
|
{"any": "vcvtne2ph2hf8 W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.F2.MAP5.W0 18 /r" , "tt": "fv"},
|
|
{"any": "vcvtne2ph2hf8s W:xyz {kz}, xyz, xyz/mxyz/b16" , "op": "[RVM] EVEX.xyz.F2.MAP5.W0 1B /r" , "tt": "fv"},
|
|
{"any": "vcvtneph2bf8 W:xxy {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.F3.0F38.W0 74 /r" , "tt": "fv"},
|
|
{"any": "vcvtneph2bf8s W:xxy {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.F3.MAP5.W0 74 /r" , "tt": "fv"},
|
|
{"any": "vcvtneph2hf8 W:xxy {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.F3.MAP5.W0 18 /r" , "tt": "fv"},
|
|
{"any": "vcvtneph2hf8s W:xxy {kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.F3.MAP5.W0 1B /r" , "tt": "fv"}
|
|
]},
|
|
|
|
{"category": "AVX10_2 SIMD", "ext": "AVX10_2", "instructions": [
|
|
{"any": "vdpphps X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.NP.0F38.W0 52 /r" , "tt": "fv"},
|
|
{"any": "vmpsadbw W:xyz {kz}, xyz, xyz/mxyz, imm8" , "op": "[RVM] EVEX.xyz.F3.0F3A.W0 42 /r ib" , "tt": "fv"},
|
|
{"any": "vpdpbssd X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F2.0F38.W0 50 /r" , "tt": "fv"},
|
|
{"any": "vpdpbssds X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F2.0F38.W0 51 /r" , "tt": "fv"},
|
|
{"any": "vpdpbsud X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F3.0F38.W0 50 /r" , "tt": "fv"},
|
|
{"any": "vpdpbsuds X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F3.0F38.W0 51 /r" , "tt": "fv"},
|
|
{"any": "vpdpbuud X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.NP.0F38.W0 50 /r" , "tt": "fv"},
|
|
{"any": "vpdpbuuds X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.NP.0F38.W0 51 /r" , "tt": "fv"},
|
|
{"any": "vpdpwsud X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F3.0F38.W0 D2 /r" , "tt": "fv"},
|
|
{"any": "vpdpwsuds X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.F3.0F38.W0 D3 /r" , "tt": "fv"},
|
|
{"any": "vpdpwusd X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 D2 /r" , "tt": "fv"},
|
|
{"any": "vpdpwusds X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.66.0F38.W0 D3 /r" , "tt": "fv"},
|
|
{"any": "vpdpwuud X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.NP.0F38.W0 D2 /r" , "tt": "fv"},
|
|
{"any": "vpdpwuuds X:xyz {kz}, xyz, xyz/mxyz/b32" , "op": "[RVM] EVEX.xyz.NP.0F38.W0 D3 /r" , "tt": "fv"}
|
|
]},
|
|
|
|
{"category": "AVX10_2 SIMD", "ext": "AVX10_2", "instructions": [
|
|
{"any": "vminmaxnepbf16 W:xyz {kz}, xyz, xyz/mxyz/b16, imm8" , "op": "[RVM] EVEX.xyz.F2.0F3A.W0 52 /r ib" , "tt": "fv"},
|
|
{"any": "vminmaxpd W:xyz {kz}, xyz, xyz/mxyz/b64 {sae}, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W1 52 /r ib" , "tt": "fv"},
|
|
{"any": "vminmaxph W:xyz {kz}, xyz, xyz/mxyz/b16 {sae}, imm8" , "op": "[RVM] EVEX.xyz.NP.0F3A.W0 52 /r ib" , "tt": "fv"},
|
|
{"any": "vminmaxps W:xyz {kz}, xyz, xyz/mxyz/b32 {sae}, imm8" , "op": "[RVM] EVEX.xyz.66.0F3A.W0 52 /r ib" , "tt": "fv"},
|
|
{"any": "vminmaxsd W:xmm {kz}, xmm, xmm/m64 {sae}, imm8" , "op": "[RVM] EVEX.LIG.66.0F3A.W1 53 /r ib" , "tt": "t1s"},
|
|
{"any": "vminmaxsh W:xmm {kz}, xmm, xmm/m16 {sae}, imm8" , "op": "[RVM] EVEX.LIG.NP.0F3A.W0 53 /r ib" , "tt": "t1s"},
|
|
{"any": "vminmaxss W:xmm {kz}, xmm, xmm/m32 {sae}, imm8" , "op": "[RVM] EVEX.LIG.66.0F3A.W0 53 /r ib" , "tt": "t1s"}
|
|
]},
|
|
|
|
{"category": "AVX10_2 SIMD", "ext": "AVX10_2", "instructions": [
|
|
{"any": "vcvtnebf162ibs W:xyz{kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.F2.MAP5.W0 69 /r" , "tt": "fv"},
|
|
{"any": "vcvtnebf162iubs W:xyz{kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.F2.MAP5.W0 6B /r" , "tt": "fv"},
|
|
{"any": "vcvttnebf162ibs W:xyz{kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.F2.MAP5.W0 68 /r" , "tt": "fv"},
|
|
{"any": "vcvttnebf162iubs W:xyz{kz}, xyz/mxyz/b16" , "op": "[RM ] EVEX.xyz.F2.MAP5.W0 6A /r" , "tt": "fv"},
|
|
{"any": "vcvttpd2dqs W:xxy{kz}, xyz/mxyz/b64 {sae}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W1 6D /r" , "tt": "fv"},
|
|
{"any": "vcvttpd2qqs W:xyz{kz}, xyz/mxyz/b64 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP5.W1 6D /r" , "tt": "fv"},
|
|
{"any": "vcvttpd2udqs W:xxy{kz}, xyz/mxyz/b64 {sae}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W1 6C /r" , "tt": "fv"},
|
|
{"any": "vcvttpd2uqqs W:xyz{kz}, xyz/mxyz/b64 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP5.W1 6C /r" , "tt": "fv"},
|
|
{"any": "vcvtph2ibs W:xyz{kz}, xyz/mxyz/b16 {er}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 69 /r" , "tt": "fv"},
|
|
{"any": "vcvtph2iubs W:xyz{kz}, xyz/mxyz/b16 {er}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 6B /r" , "tt": "fv"},
|
|
{"any": "vcvttph2ibs W:xyz{kz}, xyz/mxyz/b16 {sae}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 68 /r" , "tt": "fv"},
|
|
{"any": "vcvttph2iubs W:xyz{kz}, xyz/mxyz/b16 {sae}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 6A /r" , "tt": "fv"},
|
|
{"any": "vcvttps2dqs W:xyz{kz}, xyz/mxyz/b32 {sae}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 6D /r" , "tt": "fv"},
|
|
{"any": "vcvtps2ibs W:xyz{kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 69 /r" , "tt": "fv"},
|
|
{"any": "vcvtps2iubs W:xyz{kz}, xyz/mxyz/b32 {er}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 6B /r" , "tt": "fv"},
|
|
{"any": "vcvttps2ibs W:xyz{kz}, xyz/mxyz/b32 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 68 /r" , "tt": "fv"},
|
|
{"any": "vcvttps2iubs W:xyz{kz}, xyz/mxyz/b32 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 6A /r" , "tt": "fv"},
|
|
{"any": "vcvttps2qqs W:xyz{kz}, xxy/mxxy/b32 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 6D /r" , "tt": "fv"},
|
|
{"any": "vcvttps2udqs W:xyz{kz}, xyz/mxyz/b32 {sae}" , "op": "[RM ] EVEX.xyz.NP.MAP5.W0 6C /r" , "tt": "fv"},
|
|
{"any": "vcvttps2uqqs W:xyz{kz}, xxy/mxxy/b32 {sae}" , "op": "[RM ] EVEX.xyz.66.MAP5.W0 6C /r" , "tt": "fv"},
|
|
{"any": "vcvttsd2sis W:ry, xmm[63:0]/m64 {sae}" , "op": "[RM ] EVEX.LIG.F2.MAP5.Wy 6D /r" , "tt": "t1f"},
|
|
{"any": "vcvttsd2usis W:ry, xmm[63:0]/m64 {sae}" , "op": "[RM ] EVEX.LIG.F2.MAP5.Wy 6C /r" , "tt": "t1f"},
|
|
{"any": "vcvttss2sis W:ry, xmm[31:0]/m32 {sae}" , "op": "[RM ] EVEX.LIG.F3.MAP5.Wy 6D /r" , "tt": "t1f"},
|
|
{"any": "vcvttss2usis W:ry, xmm[31:0]/m32 {sae}" , "op": "[RM ] EVEX.LIG.F3.MAP5.Wy 6C /r" , "tt": "t1f"}
|
|
]},
|
|
|
|
{"category": "AVX10_2 SIMD", "ext": "AVX10_2", "instructions": [
|
|
{"any": "vmovd W:xmm[31:0], R:xmm[31:0]/m32" , "op": "[RM ] EVEX.128.F3.0F.W0 7E /r" , "tt": "t1"},
|
|
{"any": "vmovd W:xmm[31:0]/m32, R:xmm[31:0]" , "op": "[MR ] EVEX.128.66.0F.W0 D6 /r" , "tt": "t1"},
|
|
{"any": "vmovw W:xmm[15:0], R:xmm[15:0]/m16" , "op": "[RM ] EVEX.128.F3.MAP5.W0 6E /r" , "tt": "t1"},
|
|
{"any": "vmovw W:xmm[15:0]/m16, R:xmm[15:0]" , "op": "[MR ] EVEX.128.F3.MAP5.W0 7E /r" , "tt": "t1"}
|
|
]},
|
|
|
|
{"category": "AVX10_2 SIMD", "ext": "AVX10_2 MOVRS", "instructions": [
|
|
{"x64": "vmovrsb X:xyz {kz}, R:mxyz" , "op": "[RM ] EVEX.xyz.F2.MAP5.W0 6F !(11):rrr:bbb", "tt": "fm"},
|
|
{"x64": "vmovrsd X:xyz {kz}, R:mxyz" , "op": "[RM ] EVEX.xyz.F3.MAP5.W0 6F !(11):rrr:bbb", "tt": "fm"},
|
|
{"x64": "vmovrsq X:xyz {kz}, R:mxyz" , "op": "[RM ] EVEX.xyz.F3.MAP5.W1 6F !(11):rrr:bbb", "tt": "fm"},
|
|
{"x64": "vmovrsw X:xyz {kz}, R:mxyz" , "op": "[RM ] EVEX.xyz.F2.MAP5.W1 6F !(11):rrr:bbb", "tt": "fm"}
|
|
]},
|
|
|
|
{"category": "AMX", "ext": "AMX_TILE", "instructions": [
|
|
{"x64": "ldtilecfg R:m512" , "op": "[M ] VEX.128.NP.0F38.W0 49 !(11):000:bbb"},
|
|
{"apx": "ldtilecfg R:m512" , "op": "[M ] EVEX.128.NP.0F38.W0 49 !(11):000:bbb"},
|
|
{"x64": "sttilecfg W:m512" , "op": "[M ] VEX.128.66.0F38.W0 49 !(11):000:bbb"},
|
|
{"apx": "sttilecfg W:m512" , "op": "[M ] EVEX.128.66.0F38.W0 49 !(11):000:bbb"},
|
|
{"x64": "tileloadd W:tmm, tmem" , "op": "[RM ] VEX.128.F2.0F38.W0 4B !(11):rrr:100"},
|
|
{"apx": "tileloadd W:tmm, R:tmem" , "op": "[RM ] EVEX.128.F2.0F38.W0 4B !(11):rrr:100"},
|
|
{"x64": "tileloaddt1 W:tmm, tmem" , "op": "[RM ] VEX.128.66.0F38.W0 4B !(11):rrr:100"},
|
|
{"apx": "tileloaddt1 W:tmm, R:tmem" , "op": "[RM ] EVEX.128.66.0F38.W0 4B !(11):rrr:100"},
|
|
{"x64": "tilerelease" , "op": "[OP ] VEX.128.NP.0F38.W0 49 /0"},
|
|
{"x64": "tilestored W:tmem, R:tmm" , "op": "[MR ] VEX.128.F3.0F38.W0 4B !(11):rrr:100"},
|
|
{"apx": "tilestored W:tmem, R:tmm" , "op": "[MR ] EVEX.128.F3.0F38.W0 4B !(11):rrr:100"},
|
|
{"x64": "tilezero W:tmm" , "op": "[R ] VEX.128.F2.0F38.W0 49 11:rrr:000"}
|
|
]},
|
|
|
|
{"category": "AMX", "ext": "AMX_BF16", "instructions": [
|
|
{"x64": "tdpbf16ps X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.F3.0F38.W0 5C 11:rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "AMX", "ext": "AMX_COMPLEX", "instructions": [
|
|
{"x64": "tcmmimfp16ps X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.66.0F38.W0 6C 11:rrr:bbb"},
|
|
{"x64": "tcmmrlfp16ps X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.NP.0F38.W0 6C 11:rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "AMX", "ext": "AMX_FP16", "instructions": [
|
|
{"x64": "tdpfp16ps X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.F2.0F38.W0 5C 11:rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "AMX", "ext": "AMX_INT8", "instructions": [
|
|
{"x64": "tdpbssd X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.F2.0F38.W0 5E 11:rrr:bbb"},
|
|
{"x64": "tdpbsud X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.F3.0F38.W0 5E 11:rrr:bbb"},
|
|
{"x64": "tdpbusd X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.66.0F38.W0 5E 11:rrr:bbb"},
|
|
{"x64": "tdpbuud X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.NP.0F38.W0 5E 11:rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "AMX", "ext": "AMX_AVX512 AVX10_2", "instructions": [
|
|
{"x64": "tcvtrowd2ps W:zmm, tmm, r32" , "op": "[RMV] EVEX.512.F3.0F38.W0 4A 11:rrr:bbb"},
|
|
{"x64": "tcvtrowd2ps W:zmm, tmm, imm8" , "op": "[RM ] EVEX.512.F3.0F3A.W0 07 11:rrr:bbb ib"},
|
|
{"x64": "tcvtrowps2pbf16h W:zmm, tmm, r32" , "op": "[RMV] EVEX.512.F2.0F38.W0 6D 11:rrr:bbb"},
|
|
{"x64": "tcvtrowps2pbf16h W:zmm, tmm, imm8" , "op": "[RM ] EVEX.512.F2.0F3A.W0 07 11:rrr:bbb ib"},
|
|
{"x64": "tcvtrowps2pbf16l W:zmm, tmm, r32" , "op": "[RMV] EVEX.512.F3.0F38.W0 6D 11:rrr:bbb"},
|
|
{"x64": "tcvtrowps2pbf16l W:zmm, tmm, imm8" , "op": "[RM ] EVEX.512.F3.0F3A.W0 77 11:rrr:bbb ib"},
|
|
{"x64": "tcvtrowps2phh W:zmm, tmm, r32" , "op": "[RMV] EVEX.512.NP.0F38.W0 6D 11:rrr:bbb"},
|
|
{"x64": "tcvtrowps2phh W:zmm, tmm, imm8" , "op": "[RM ] EVEX.512.NP.0F3A.W0 07 11:rrr:bbb ib"},
|
|
{"x64": "tcvtrowps2phl W:zmm, tmm, r32" , "op": "[RMV] EVEX.512.66.0F38.W0 6D 11:rrr:bbb"},
|
|
{"x64": "tcvtrowps2phl W:zmm, tmm, imm8" , "op": "[RM ] EVEX.512.F2.0F3A.W0 77 11:rrr:bbb ib"},
|
|
{"x64": "tilemovrow W:zmm, tmm, r32" , "op": "[RMV] EVEX.512.66.0F38.W0 4A 11:rrr:bbb"},
|
|
{"x64": "tilemovrow W:zmm, tmm, imm8" , "op": "[RMV] EVEX.512.66.0F3A.W0 07 11:rrr:bbb ib"}
|
|
]},
|
|
|
|
{"category": "AMX", "ext": "AMX_FP8", "instructions": [
|
|
{"x64": "tdpbf8ps X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.NP.MAP5.W0 FD 11:rrr:bbb"},
|
|
{"x64": "tdpbhf8ps X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.F2.MAP5.W0 FD 11:rrr:bbb"},
|
|
{"x64": "tdphbf8ps X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.F3.MAP5.W0 FD 11:rrr:bbb"},
|
|
{"x64": "tdphf8ps X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.66.MAP5.W0 FD 11:rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "AMX", "ext": "AMX_MOVRS", "instructions": [
|
|
{"x64": "tileloaddrs W:tmm, tmem" , "op": "[RM ] VEX.128.F2.0F38.W0 4A !(11):rrr:100"},
|
|
{"apx": "tileloaddrs W:tmm, tmem" , "op": "[RM ] EVEX.128.F2.0F38.W0 4A !(11):rrr:100"},
|
|
{"x64": "tileloaddrst1 W:tmm, tmem" , "op": "[RM ] VEX.128.66.0F38.W0 4A !(11):rrr:100"},
|
|
{"apx": "tileloaddrst1 W:tmm, tmem" , "op": "[RM ] EVEX.128.66.0F38.W0 4A !(11):rrr:100"}
|
|
]},
|
|
|
|
{"category": "AMX", "ext": "AMX_TF32", "instructions": [
|
|
{"x64": "tmmultf32ps X:tmm, tmm, tmm" , "op": "[RMV] VEX.128.66.0F38.W0 48 11:rrr:bbb"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "APX_F", "instructions": [
|
|
{"apx": "adc x:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.LLZ.NP.MAP4.WIG 10 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc x:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 11 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc x:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.WIG 12 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc x:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 13 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG 80 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc x:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 83 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc x:rv/mv, immv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 81 /2 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc W:r8, R:r8/m8, R:r8" , "op": "[VMR] EVEX.ND=1.LLZ.NP.MAP4.WIG 10 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc W:rv, R:rv/mv, R:rv" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv 11 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc W:r8, R:r8, R:r8/m8" , "op": "[VRM] EVEX.ND=1.LLZ.NP.MAP4.WIG 12 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc W:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 13 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG 80 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc W:rv, R:rv/mv, imms8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 83 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "adc W:rv, R:rv/mv, immv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 81 /2 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "add{nf} x:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.LLZ.NP.MAP4.WIG 00 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} x:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 01 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} x:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.WIG 02 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} x:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 03 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG 80 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} x:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 83 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} x:rv/mv, immv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 81 /0 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} W:r8, R:r8/m8, R:r8" , "op": "[VMR] EVEX.ND=1.LLZ.NP.MAP4.WIG 00 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} W:rv, R:rv/mv, R:rv" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv 01 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} W:r8, R:r8, R:r8/m8" , "op": "[VRM] EVEX.ND=1.LLZ.NP.MAP4.WIG 02 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} W:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 03 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG 80 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} W:rv, R:rv/mv, imms8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 83 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "add{nf} W:rv, R:rv/mv, immv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 81 /0 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "and{nf} x:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.LLZ.NP.MAP4.WIG 20 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} x:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 21 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} x:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.WIG 22 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} x:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 23 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG 80 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} x:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 83 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} x:rv/mv, immv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 81 /4 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} W:r8, R:r8/m8, R:r8" , "op": "[VMR] EVEX.ND=1.LLZ.NP.MAP4.WIG 20 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} W:rv, R:rv/mv, R:rv" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv 21 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} W:r8, R:r8, R:r8/m8" , "op": "[VRM] EVEX.ND=1.LLZ.NP.MAP4.WIG 22 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} W:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 23 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG 80 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} W:rv, R:rv/mv, imms8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 83 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "and{nf} W:rv, R:rv/mv, immv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 81 /4 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "cmovb X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 42 /r" , "io": "CF=R"},
|
|
{"apx": "cmovbe X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 46 /r" , "io": "CF=R ZF=R"},
|
|
{"apx": "cmovl X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 4C /r" , "io": "SF=R OF=R"},
|
|
{"apx": "cmovle X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 4E /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"apx": "cmovnb X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 43 /r" , "io": "CF=R"},
|
|
{"apx": "cmovnbe X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 47 /r" , "io": "CF=R ZF=R"},
|
|
{"apx": "cmovnl X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 4D /r" , "io": "SF=R OF=R"},
|
|
{"apx": "cmovnle X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 4F /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"apx": "cmovno X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 41 /r" , "io": "OF=R"},
|
|
{"apx": "cmovnp X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 4B /r" , "io": "PF=R"},
|
|
{"apx": "cmovns X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 49 /r" , "io": "SF=R"},
|
|
{"apx": "cmovnz X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 45 /r" , "io": "ZF=R"},
|
|
{"apx": "cmovo X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 40 /r" , "io": "OF=R"},
|
|
{"apx": "cmovp X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 4A /r" , "io": "PF=R"},
|
|
{"apx": "cmovs X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 48 /r" , "io": "SF=R"},
|
|
{"apx": "cmovz X:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 44 /r" , "io": "ZF=R"},
|
|
{"any": "crc32 X:r32, R:r8/m8" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.W0 F0 /r"},
|
|
{"any": "crc32 X:r64, R:r8/m8" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.W1 F0 /r"},
|
|
{"any": "crc32 X:r32, R:r16/m16" , "op": "[RM ] EVEX.ND=0.LLZ.66.MAP4.W0 F1 /r"},
|
|
{"any": "crc32 X:r32, R:r32/m32" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.W0 F1 /r"},
|
|
{"any": "crc32 X:r64, R:r64/m64" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.W1 F1 /r"},
|
|
{"apx": "dec{nf} X:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG FE /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "dec{nf} X:rv/mv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv FF /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "dec{nf} W:r8, R:r8/m8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG FE /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "dec{nf} W:rv, R:rv/mv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv FF /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "inc{nf} X:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG FE /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "inc{nf} X:rv/mv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv FF /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "inc{nf} W:r8, R:r8/m8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG FE /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"apx": "inc{nf} W:rv, R:rv/mv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv FF /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
|
|
{"any": "div{nf} x:<ax>, R:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG F6 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"any": "div{nf} x:<dxv>, x:<axv>, R:rv/mv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv F7 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"apx": "idiv{nf} x:<ax>, R:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG F6 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"apx": "idiv{nf} x:<dxv>, x:<axv>, R:rv/mv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv F7 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
|
|
{"apx": "imul{nf} x:<ax>, R:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG F6 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "imul{nf} w:<dxv>, x:<axv>, R:rv/mv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv F7 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "imul{nf} x:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv AF /r" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "imul{nf} W:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv AF /r" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "imul{nf} w:rv, R:rv/mv, imms8" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 6B /r ib" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "imul{nf} w:rv, R:rv/mv, immv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 69 /r iv" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "imulzu{nf} W:r16, R:r16/m16, imms8" , "op": "[RM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 6B /r ib" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "imulzu{nf} W:r16, R:r16/m16, imm16" , "op": "[RM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 69 /r iv" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "mul{nf} x:<ax>, R:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG F6 /4" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "mul{nf} w:<dxv>, x:<axv>, rv/mv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv F7 /4" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
|
|
{"apx": "neg{nf} X:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG F6 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "neg{nf} X:rv/mv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv F7 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "neg{nf} W:r8, R:r8/m8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG F6 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "neg{nf} W:rv, R:rv/mv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv F7 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "not{nf} X:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG F6 /2"},
|
|
{"apx": "not{nf} X:rv/mv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv F7 /2"},
|
|
{"apx": "not{nf} W:r8, R:r8/m8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG F6 /2"},
|
|
{"apx": "not{nf} W:rv, R:rv/mv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv F7 /2"},
|
|
{"apx": "or{nf} x:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.LLZ.NP.MAP4.WIG 08 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} x:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 09 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} x:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.WIG 0A /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} x:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 0B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG 80 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} x:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 83 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} x:rv/mv, immv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 81 /1 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} W:r8, R:r8/m8, R:r8" , "op": "[VMR] EVEX.ND=1.LLZ.NP.MAP4.WIG 08 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} W:rv, R:rv/mv, R:rv" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv 09 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} W:r8, R:r8, R:r8/m8" , "op": "[VRM] EVEX.ND=1.LLZ.NP.MAP4.WIG 0A /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} W:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 0B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG 80 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} W:rv, R:rv/mv, imms8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 83 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "or{nf} W:rv, R:rv/mv, immv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 81 /1 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "rcl x:r8/m8, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D2 /2" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl x:rv/mv, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D3 /2" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl x:r8/m8, 1" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D0 /2" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl x:rv/mv, 1" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D1 /2" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG C0 /2 ib" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl x:rv/mv, imm8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv C1 /2 ib" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl W:r8, R:r8/m8, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D2 /2" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl W:rv, R:rv/mv, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D3 /2" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl W:r8, R:r8/m8, 1" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D0 /2" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl W:rv, R:rv/mv, 1" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D1 /2" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG C0 /2 ib" , "io": "CF=X OF=X"},
|
|
{"apx": "rcl W:rv, R:rv/mv, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv C1 /2 ib" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr x:r8/m8, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D2 /3" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr x:rv/mv, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D3 /3" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr x:r8/m8, 1" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D0 /3" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr x:rv/mv, 1" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D1 /3" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG C0 /3 ib" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr x:rv/mv, imm8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv C1 /3 ib" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr W:r8, R:r8/m8, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D2 /3" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr W:rv, R:rv/mv, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D3 /3" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr W:r8, R:r8/m8, 1" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D0 /3" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr W:rv, R:rv/mv, 1" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D1 /3" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG C0 /3 ib" , "io": "CF=X OF=X"},
|
|
{"apx": "rcr W:rv, R:rv/mv, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv C1 /3 ib" , "io": "CF=X OF=X"},
|
|
{"apx": "rol{nf} x:r8/m8, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D2 /0" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} x:rv/mv, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D3 /0" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} x:r8/m8, 1" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D0 /0" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} x:rv/mv, 1" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D1 /0" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG C0 /0 ib" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} x:rv/mv, imm8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv C1 /0 ib" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} W:r8, R:r8/m8, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D2 /0" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} W:rv, R:rv/mv, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D3 /0" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} W:r8, R:r8/m8, 1" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D0 /0" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} W:rv, R:rv/mv, 1" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D1 /0" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG C0 /0 ib" , "io": "CF=W OF=W"},
|
|
{"apx": "rol{nf} W:rv, R:rv/mv, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv C1 /0 ib" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} x:r8/m8, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D2 /1" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} x:rv/mv, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D3 /1" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} x:r8/m8, 1" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D0 /1" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} x:rv/mv, 1" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D1 /1" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG C0 /1 ib" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} x:rv/mv, imm8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv C1 /1 ib" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} W:r8, R:r8/m8, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D2 /1" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} W:rv, R:rv/mv, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D3 /1" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} W:r8, R:r8/m8, 1" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D0 /1" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} W:rv, R:rv/mv, 1" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D1 /1" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG C0 /1 ib" , "io": "CF=W OF=W"},
|
|
{"apx": "ror{nf} W:rv, R:rv/mv, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv C1 /1 ib" , "io": "CF=W OF=W"},
|
|
{"apx": "sar{nf} x:r8/m8, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D2 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} x:rv/mv, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D3 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} x:r8/m8, 1" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D0 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} x:rv/mv, 1" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D1 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG C0 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} x:rv/mv, imm8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv C1 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} W:r8, R:r8/m8, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D2 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} W:rv, R:rv/mv, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D3 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} W:r8, R:r8/m8, 1" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D0 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} W:rv, R:rv/mv, 1" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D1 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG C0 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sar{nf} W:rv, R:rv/mv, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv C1 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sbb x:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.LLZ.NP.MAP4.WIG 18 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb x:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 19 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb x:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.WIG 1A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb x:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 1B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG 80 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb x:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 83 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb x:rv/mv, immv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 81 /3 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb W:r8, R:r8/m8, R:r8" , "op": "[VMR] EVEX.ND=1.LLZ.NP.MAP4.WIG 18 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb W:rv, R:rv/mv, R:rv" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv 19 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb W:r8, R:r8, R:r8/m8" , "op": "[VRM] EVEX.ND=1.LLZ.NP.MAP4.WIG 1A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb W:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 1B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG 80 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb W:rv, R:rv/mv, imms8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 83 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "sbb W:rv, R:rv/mv, immv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 81 /3 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
|
|
{"apx": "shl{nf} x:r8/m8, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D2 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:r8/m8, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D2 /6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:r8/m8, 1" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D0 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:r8/m8, 1" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D0 /6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG C0 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG C0 /6 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:rv/mv, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D3 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:rv/mv, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D3 /6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:rv/mv, 1" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D1 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:rv/mv, 1" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D1 /6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:rv/mv, imm8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv C1 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} x:rv/mv, imm8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv C1 /6 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:r8, R:r8/m8, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D2 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:r8, R:r8/m8, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D2 /6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:rv, R:rv/mv, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D3 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:rv, R:rv/mv, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D3 /6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:r8, R:r8/m8, 1" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D0 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:r8, R:r8/m8, 1" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D0 /6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:rv, R:rv/mv, 1" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D1 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:rv, R:rv/mv, 1" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D1 /6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG C0 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG C0 /6 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:rv, R:rv/mv, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv C1 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shl{nf} W:rv, R:rv/mv, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv C1 /6 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shld{nf} x:rv/mv, R:rv, R:cl" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv A5 /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"apx": "shld{nf} x:rv/mv, R:rv, imm8" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 24 /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"apx": "shld{nf} W:rv, R:rv/mv, R:rv, R:cl" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv A5 /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"apx": "shld{nf} W:rv, R:rv/mv, R:rv, imm8" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv 24 /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"apx": "shr{nf} x:r8/m8, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D2 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} x:rv/mv, R:cl" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D3 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} x:r8/m8, 1" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG D0 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} x:rv/mv, 1" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv D1 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG C0 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} x:rv/mv, imm8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv C1 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} W:r8, R:r8/m8, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D2 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} W:rv, R:rv/mv, R:cl" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D3 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} W:r8, R:r8/m8, 1" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG D0 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} W:rv, R:rv/mv, 1" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv D1 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG C0 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shr{nf} W:rv, R:rv/mv, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv C1 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "shrd{nf} x:rv/mv, R:rv, R:cl" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv AD /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"apx": "shrd{nf} x:rv/mv, R:rv, imm8" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 2C /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"apx": "shrd{nf} W:rv, R:rv/mv, R:rv, R:cl" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv AD /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"apx": "shrd{nf} W:rv, R:rv/mv, R:rv, imm8" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv 2C /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
|
|
{"apx": "sub{nf} x:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.LLZ.NP.MAP4.WIG 28 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} x:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 29 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} x:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.WIG 2A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} x:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 2B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG 80 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} x:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 83 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} x:rv/mv, immv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 81 /5 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} W:r8, R:r8/m8, R:r8" , "op": "[VMR] EVEX.ND=1.LLZ.NP.MAP4.WIG 28 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} W:rv, R:rv/mv, R:rv" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv 29 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} W:r8, R:r8, R:r8/m8" , "op": "[VRM] EVEX.ND=1.LLZ.NP.MAP4.WIG 2A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} W:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 2B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG 80 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} W:rv, R:rv/mv, imms8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 83 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "sub{nf} W:rv, R:rv/mv, immv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 81 /5 iv" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
|
|
{"apx": "xor{nf} x:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.LLZ.NP.MAP4.WIG 38 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} x:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 39 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} x:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.LLZ.NP.MAP4.WIG 3A /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} x:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 3B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} x:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.LLZ.NP.MAP4.WIG 80 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} x:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 83 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} x:rv/mv, immv" , "op": "[M ] EVEX.ND=0.LLZ.Pv.MAP4.Wv 81 /6 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} W:r8, R:r8/m8, R:r8" , "op": "[VMR] EVEX.ND=1.LLZ.NP.MAP4.WIG 38 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} W:rv, R:rv/mv, R:rv" , "op": "[VMR] EVEX.ND=1.LLZ.Pv.MAP4.Wv 39 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} W:r8, R:r8, R:r8/m8" , "op": "[VRM] EVEX.ND=1.LLZ.NP.MAP4.WIG 3A /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} W:rv, R:rv, R:rv/mv" , "op": "[VRM] EVEX.ND=1.LLZ.Pv.MAP4.Wv 3B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} W:r8, R:r8/m8, imm8" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.WIG 80 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} W:rv, R:rv/mv, imms8" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 83 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
|
|
{"apx": "xor{nf} W:rv, R:rv/mv, immv" , "op": "[VM ] EVEX.ND=1.LLZ.Pv.MAP4.Wv 81 /6 iv" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "USER_MSR", "instructions": [
|
|
{"x64": "urdmsr W:r64, R:r64" , "op": "[MR ] F2 0F 38 F8 11:rrr:bbb"},
|
|
{"apx": "urdmsr W:r64, R:r64" , "op": "[MR ] EVEX.ND=0.LLZ.F2.MAP4.W0 F8 11:rrr:bbb"},
|
|
{"x64": "urdmsr W:r64, imm32" , "op": "[M ] VEX.128.F2.MAP7.W0 F8 11:000:bbb id"},
|
|
{"apx": "urdmsr W:r64, imm32" , "op": "[M ] EVEX.128.F2.MAP7.W0 F8 11:000:bbb id"},
|
|
{"x64": "uwrmsr R:r64, R:r64" , "op": "[RM ] F3 0F 38 F8 11:rrr:bbb"},
|
|
{"apx": "uwrmsr R:r64, R:r64" , "op": "[RM ] EVEX.ND=0.LLZ.F3.MAP4.W0 F8 11:rrr:bbb"},
|
|
{"x64": "uwrmsr imm32, R:r64" , "op": "[M ] VEX.128.F3.MAP7.W0 F8 11:000:bbb id"},
|
|
{"apx": "uwrmsr imm32, R:r64" , "op": "[M ] EVEX.128.F3.MAP7.W0 F8 11:000:bbb id"}
|
|
]},
|
|
|
|
{"category": "GP GP_EXT", "ext": "APX_F", "instructions": [
|
|
{"x64": "ccmpb dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=2.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpb dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=2.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpb dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=2.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpb dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=2.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpb dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=2.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpb dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=2.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpb dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=2.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpbe dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=6.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpbe dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=6.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpbe dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=6.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpbe dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=6.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpbe dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=6.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpbe dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=6.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpbe dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=6.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpf dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=A.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpf dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=A.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpf dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=A.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpf dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=A.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpf dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=A.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpf dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=A.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpf dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=A.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpl dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=C.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpl dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=C.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpl dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=C.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpl dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=C.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpl dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=C.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpl dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=C.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpl dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=C.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmple dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=E.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmple dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=E.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmple dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=E.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmple dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=E.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmple dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=E.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmple dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=E.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmple dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=E.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpnb dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=3.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpnb dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=3.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpnb dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=3.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpnb dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=3.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpnb dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=3.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpnb dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=3.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpnb dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=3.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpnbe dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=7.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpnbe dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=7.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpnbe dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=7.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpnbe dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=7.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpnbe dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=7.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpnbe dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=7.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpnbe dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=7.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpnl dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=D.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpnl dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=D.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpnl dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=D.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpnl dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=D.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpnl dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=D.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpnl dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=D.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpnl dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=D.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpnle dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=F.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpnle dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=F.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpnle dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=F.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpnle dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=F.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpnle dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=F.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpnle dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=F.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpnle dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=F.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpno dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=1.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpno dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=1.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpno dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=1.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpno dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=1.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpno dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=1.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpno dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=1.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpno dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=1.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpns dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=9.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpns dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=9.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpns dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=9.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpns dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=9.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpns dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=9.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpns dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=9.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpns dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=9.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpnz dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=5.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpnz dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=5.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpnz dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=5.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpnz dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=5.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpnz dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=5.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpnz dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=5.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpnz dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=5.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpo dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=0.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpo dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=0.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpo dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=0.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpo dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=0.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpo dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=0.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpo dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=0.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpo dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=0.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmps dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=8.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmps dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=8.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmps dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=8.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmps dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=8.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmps dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=8.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmps dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=8.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmps dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=8.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpt dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=B.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpt dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=B.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpt dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=B.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpt dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=B.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpt dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=B.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpt dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=B.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpt dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=B.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "ccmpz dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=4.LLZ.NP.MAP4.WIG 38 /r" },
|
|
{"x64": "ccmpz dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=4.LLZ.Pv.MAP4.Wv 39 /r" },
|
|
{"x64": "ccmpz dfv, R:r8, R:r8/m8" , "op": "[RM ] EVEX.ND=0.SCC=4.LLZ.NP.MAP4.WIG 3A /r" },
|
|
{"x64": "ccmpz dfv, R:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.SCC=4.LLZ.Pv.MAP4.Wv 3B /r" },
|
|
{"x64": "ccmpz dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=4.LLZ.NP.MAP4.WIG 80 /7 ib" },
|
|
{"x64": "ccmpz dfv, R:rv/mv, imms8" , "op": "[M ] EVEX.ND=0.SCC=4.LLZ.Pv.MAP4.Wv 83 /7 ib" },
|
|
{"x64": "ccmpz dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=4.LLZ.Pv.MAP4.Wv 81 /7 iv" },
|
|
{"x64": "cfcmovb X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 42 /r" , "io": "CF=R"},
|
|
{"x64": "cfcmovb X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 42 /r" , "io": "CF=R"},
|
|
{"x64": "cfcmovb X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 42 /r" , "io": "CF=R"},
|
|
{"x64": "cfcmovb W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 42 /r" , "io": "CF=R"},
|
|
{"x64": "cfcmovbe X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 46 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "cfcmovbe X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 46 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "cfcmovbe X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 46 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "cfcmovbe W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 46 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "cfcmovl X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 4C /r" , "io": "SF=R OF=R"},
|
|
{"x64": "cfcmovl X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4C /r" , "io": "SF=R OF=R"},
|
|
{"x64": "cfcmovl X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4C /r" , "io": "SF=R OF=R"},
|
|
{"x64": "cfcmovl W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 4C /r" , "io": "SF=R OF=R"},
|
|
{"x64": "cfcmovle X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 4E /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "cfcmovle X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4E /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "cfcmovle X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4E /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "cfcmovle W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 4E /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "cfcmovnb X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 43 /r" , "io": "CF=R"},
|
|
{"x64": "cfcmovnb X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 43 /r" , "io": "CF=R"},
|
|
{"x64": "cfcmovnb X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 43 /r" , "io": "CF=R"},
|
|
{"x64": "cfcmovnb W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 43 /r" , "io": "CF=R"},
|
|
{"x64": "cfcmovnbe X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 47 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "cfcmovnbe X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 47 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "cfcmovnbe X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 47 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "cfcmovnbe W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 47 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "cfcmovnl X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 4D /r" , "io": "SF=R OF=R"},
|
|
{"x64": "cfcmovnl X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4D /r" , "io": "SF=R OF=R"},
|
|
{"x64": "cfcmovnl X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4D /r" , "io": "SF=R OF=R"},
|
|
{"x64": "cfcmovnl W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 4D /r" , "io": "SF=R OF=R"},
|
|
{"x64": "cfcmovnle X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 4F /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "cfcmovnle X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4F /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "cfcmovnle X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4F /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "cfcmovnle W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 4F /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "cfcmovno X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 41 /r" , "io": "OF=R"},
|
|
{"x64": "cfcmovno X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 41 /r" , "io": "OF=R"},
|
|
{"x64": "cfcmovno X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 41 /r" , "io": "OF=R"},
|
|
{"x64": "cfcmovno W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 41 /r" , "io": "OF=R"},
|
|
{"x64": "cfcmovnp X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 4B /r" , "io": "PF=R"},
|
|
{"x64": "cfcmovnp X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4B /r" , "io": "PF=R"},
|
|
{"x64": "cfcmovnp X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4B /r" , "io": "PF=R"},
|
|
{"x64": "cfcmovnp W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 4B /r" , "io": "PF=R"},
|
|
{"x64": "cfcmovns X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 49 /r" , "io": "SF=R"},
|
|
{"x64": "cfcmovns X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 49 /r" , "io": "SF=R"},
|
|
{"x64": "cfcmovns X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 49 /r" , "io": "SF=R"},
|
|
{"x64": "cfcmovns W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 49 /r" , "io": "SF=R"},
|
|
{"x64": "cfcmovnz X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 45 /r" , "io": "ZF=R"},
|
|
{"x64": "cfcmovnz X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 45 /r" , "io": "ZF=R"},
|
|
{"x64": "cfcmovnz X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 45 /r" , "io": "ZF=R"},
|
|
{"x64": "cfcmovnz W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 45 /r" , "io": "ZF=R"},
|
|
{"x64": "cfcmovo X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 40 /r" , "io": "OF=R"},
|
|
{"x64": "cfcmovo X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 40 /r" , "io": "OF=R"},
|
|
{"x64": "cfcmovo X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 40 /r" , "io": "OF=R"},
|
|
{"x64": "cfcmovo W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 40 /r" , "io": "OF=R"},
|
|
{"x64": "cfcmovp X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 4A /r" , "io": "PF=R"},
|
|
{"x64": "cfcmovp X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4A /r" , "io": "PF=R"},
|
|
{"x64": "cfcmovp X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 4A /r" , "io": "PF=R"},
|
|
{"x64": "cfcmovp W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 4A /r" , "io": "PF=R"},
|
|
{"x64": "cfcmovs X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 48 /r" , "io": "SF=R"},
|
|
{"x64": "cfcmovs X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 48 /r" , "io": "SF=R"},
|
|
{"x64": "cfcmovs X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 48 /r" , "io": "SF=R"},
|
|
{"x64": "cfcmovs W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 48 /r" , "io": "SF=R"},
|
|
{"x64": "cfcmovz X:rv, R:rv/mv" , "op": "[RM ] EVEX.ND=0.NF=0.LLZ.Pv.MAP4.Wv 44 /r" , "io": "ZF=R"},
|
|
{"x64": "cfcmovz X:rv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 44 /r" , "io": "ZF=R"},
|
|
{"x64": "cfcmovz X?:mv, R:rv" , "op": "[MR ] EVEX.ND=0.NF=1.LLZ.Pv.MAP4.Wv 44 /r" , "io": "ZF=R"},
|
|
{"x64": "cfcmovz W:rv, R:rv, R?:rv/mv" , "op": "[VRM] EVEX.ND=1.NF=1.LLZ.Pv.MAP4.Wv 44 /r" , "io": "ZF=R"},
|
|
{"x64": "ctestb dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=2.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestb dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=2.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestb dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=2.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestb dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=2.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestb dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=2.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestb dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=2.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestbe dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=6.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestbe dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=6.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestbe dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=6.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestbe dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=6.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestbe dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=6.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestbe dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=6.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestf dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=A.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestf dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=A.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestf dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=A.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestf dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=A.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestf dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=A.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestf dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=A.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestl dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=C.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestl dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=C.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestl dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=C.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestl dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=C.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestl dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=C.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestl dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=C.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestle dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=E.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestle dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=E.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestle dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=E.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestle dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=E.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestle dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=E.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestle dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=E.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestnb dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=3.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestnb dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=3.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestnb dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=3.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestnb dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=3.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestnb dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=3.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestnb dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=3.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestnbe dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=7.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestnbe dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=7.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestnbe dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=7.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestnbe dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=7.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestnbe dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=7.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestnbe dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=7.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestnl dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=D.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestnl dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=D.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestnl dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=D.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestnl dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=D.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestnl dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=D.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestnl dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=D.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestnle dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=F.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestnle dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=F.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestnle dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=F.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestnle dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=F.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestnle dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=F.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestnle dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=F.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestno dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=1.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestno dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=1.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestno dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=1.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestno dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=1.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestno dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=1.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestno dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=1.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestns dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=9.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestns dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=9.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestns dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=9.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestns dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=9.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestns dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=9.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestns dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=9.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestnz dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=5.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestnz dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=5.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestnz dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=5.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestnz dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=5.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestnz dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=5.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestnz dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=5.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctesto dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=0.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctesto dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=0.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctesto dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=0.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctesto dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=0.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctesto dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=0.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctesto dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=0.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctests dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=8.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctests dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=8.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctests dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=8.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctests dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=8.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctests dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=8.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctests dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=8.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestt dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=B.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestt dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=B.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestt dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=B.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestt dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=B.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestt dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=B.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestt dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=B.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "ctestz dfv, R:r8/m8, R:r8" , "op": "[MR ] EVEX.ND=0.SCC=4.LLZ.NP.MAP4.WIG 84 /r" },
|
|
{"x64": "ctestz dfv, R:rv/mv, R:rv" , "op": "[MR ] EVEX.ND=0.SCC=4.LLZ.Pv.MAP4.Wv 85 /r" },
|
|
{"x64": "ctestz dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=4.LLZ.NP.MAP4.WIG F6 /0 ib" },
|
|
{"x64": "ctestz dfv, R:r8/m8, imm8" , "op": "[M ] EVEX.ND=0.SCC=4.LLZ.NP.MAP4.WIG F6 /1 ib" },
|
|
{"x64": "ctestz dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=4.LLZ.Pv.MAP4.Wv F7 /0 iv" },
|
|
{"x64": "ctestz dfv, R:rv/mv, immv" , "op": "[M ] EVEX.ND=0.SCC=4.LLZ.Pv.MAP4.Wv F7 /1 iv" },
|
|
{"x64": "jmpabs imm64" , "op": "[OP] NO67 NP REX2.MAP0.W0 A1 iq"},
|
|
{"x64": "pop2 W:r64, W:r64" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.W0 8F 11:000:bbb"},
|
|
{"x64": "pop2p W:r64, W:r64" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.W1 8F 11:000:bbb"},
|
|
{"x64": "popp W:r64" , "op": "[OP] REX2.MAP0.W1 58+r"},
|
|
{"x64": "push2 R:r64, R:r64" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.W0 FF 11:110:bbb"},
|
|
{"x64": "push2p R:r64, R:r64" , "op": "[VM ] EVEX.ND=1.LLZ.NP.MAP4.W1 FF 11:110:bbb"},
|
|
{"x64": "pushp R:r64" , "op": "[OP] REX2.MAP0.W1 50+r"},
|
|
{"x64": "setb w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 42 /r" , "io": "CF=R"},
|
|
{"x64": "setbe w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 46 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "setl w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 4C /r" , "io": "SF=R OF=R"},
|
|
{"x64": "setle w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 4E /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "setnb w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 43 /r" , "io": "CF=R"},
|
|
{"x64": "setnbe w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 47 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "setnl w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 4D /r" , "io": "SF=R OF=R"},
|
|
{"x64": "setnle w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 4F /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "setno w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 41 /r" , "io": "OF=R"},
|
|
{"x64": "setnp w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 4B /r" , "io": "PF=R"},
|
|
{"x64": "setns w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 49 /r" , "io": "SF=R"},
|
|
{"x64": "setnz w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 45 /r" , "io": "ZF=R"},
|
|
{"x64": "seto w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 40 /r" , "io": "OF=R"},
|
|
{"x64": "setp w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 4A /r" , "io": "PF=R"},
|
|
{"x64": "sets w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 48 /r" , "io": "SF=R"},
|
|
{"x64": "setz w:r8/m8" , "op": "[M ] EVEX.ND=0.LLZ.F2.MAP4.WIG 44 /r" , "io": "ZF=R"},
|
|
{"x64": "setzub W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 42 /r" , "io": "CF=R"},
|
|
{"x64": "setzube W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 46 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "setzul W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 4C /r" , "io": "SF=R OF=R"},
|
|
{"x64": "setzule W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 4E /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "setzunb W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 43 /r" , "io": "CF=R"},
|
|
{"x64": "setzunbe W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 47 /r" , "io": "CF=R ZF=R"},
|
|
{"x64": "setzunl W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 4D /r" , "io": "SF=R OF=R"},
|
|
{"x64": "setzunle W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 4F /r" , "io": "ZF=R SF=R OF=R"},
|
|
{"x64": "setzuno W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 41 /r" , "io": "OF=R"},
|
|
{"x64": "setzunp W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 4B /r" , "io": "PF=R"},
|
|
{"x64": "setzuns W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 49 /r" , "io": "SF=R"},
|
|
{"x64": "setzunz W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 45 /r" , "io": "ZF=R"},
|
|
{"x64": "setzuo W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 40 /r" , "io": "OF=R"},
|
|
{"x64": "setzup W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 4A /r" , "io": "PF=R"},
|
|
{"x64": "setzus W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 48 /r" , "io": "SF=R"},
|
|
{"x64": "setzuz W:r8" , "op": "[M ] EVEX.ND=1.LLZ.F2.MAP4.WIG 44 /r" , "io": "ZF=R"}
|
|
]}
|
|
],
|
|
|
|
"aliases": {
|
|
"ccmpb" : {"aliases": ["ccmpnae", "ccmpc" ], "format": "ccmp.b|nae|c" , "sign": "u"},
|
|
"ccmpbe" : {"aliases": ["ccmpna" ], "format": "ccmp.be|na" , "sign": "u"},
|
|
"ccmpl" : {"aliases": ["ccmpnge" ], "format": "ccmp.l|nge" , "sign": "s"},
|
|
"ccmple" : {"aliases": ["ccmpng" ], "format": "ccmp.le|ng" , "sign": "s"},
|
|
"ccmpnb" : {"aliases": ["ccmpae", "ccmpnc" ], "format": "ccmp.nb|ae|nc" , "sign": "u"},
|
|
"ccmpnbe" : {"aliases": ["ccmpa" ], "format": "ccmp.nbe|a" , "sign": "u"},
|
|
"ccmpnl" : {"aliases": ["ccmpge" ], "format": "ccmp.nl|ge" , "sign": "s"},
|
|
"ccmpnle" : {"aliases": ["ccmpg" ], "format": "ccmp.nle|g" , "sign": "s"},
|
|
"ccmpnz" : {"aliases": ["ccmpne" ], "format": "ccmp.nz|ne" , "sign": "_"},
|
|
"ccmpz" : {"aliases": ["ccmpe" ], "format": "ccmp.z|e" , "sign": "_"},
|
|
|
|
"cfcmovb" : {"aliases": ["cfcmovnae", "cfcmovc"], "format": "cfmov.b|nae|c" , "sign": "u"},
|
|
"cfcmovbe" : {"aliases": ["cfcmovna" ], "format": "cfmov.be|na" , "sign": "u"},
|
|
"cfcmovl" : {"aliases": ["cfcmovnge" ], "format": "cfmov.l|nge" , "sign": "s"},
|
|
"cfcmovle" : {"aliases": ["cfcmovng" ], "format": "cfmov.le|ng" , "sign": "s"},
|
|
"cfcmovnb" : {"aliases": ["cfcmovae", "cfcmovnc"], "format": "cfmov.nb|ae|nc" , "sign": "u"},
|
|
"cfcmovnbe": {"aliases": ["cfcmova" ], "format": "cfmov.nbe|a" , "sign": "u"},
|
|
"cfcmovnl" : {"aliases": ["cfcmovge" ], "format": "cfmov.nl|ge" , "sign": "s"},
|
|
"cfcmovnle": {"aliases": ["cfcmovg" ], "format": "cfmov.nle|g" , "sign": "s"},
|
|
"cfcmovnp" : {"aliases": ["cfcmovpo" ], "format": "cfmov.np|po" , "sign": "_"},
|
|
"cfcmovnz" : {"aliases": ["cfcmovne" ], "format": "cfmov.nz|ne" , "sign": "_"},
|
|
"cfcmovp" : {"aliases": ["cfcmovpe" ], "format": "cfmov.p|pe" , "sign": "_"},
|
|
"cfcmovz" : {"aliases": ["cfcmove" ], "format": "cfmov.z|e" , "sign": "_"},
|
|
|
|
"cmovb" : {"aliases": ["cmovnae", "cmovc" ], "format": "cmov.b|nae|c" , "sign": "u"},
|
|
"cmovbe" : {"aliases": ["cmovna" ], "format": "cmov.be|na" , "sign": "u"},
|
|
"cmovl" : {"aliases": ["cmovnge" ], "format": "cmov.l|nge" , "sign": "s"},
|
|
"cmovle" : {"aliases": ["cmovng" ], "format": "cmov.le|ng" , "sign": "s"},
|
|
"cmovnb" : {"aliases": ["cmovae", "cmovnc" ], "format": "cmov.nb|ae|nc" , "sign": "u"},
|
|
"cmovnbe" : {"aliases": ["cmova" ], "format": "cmov.nbe|a" , "sign": "u"},
|
|
"cmovnl" : {"aliases": ["cmovge" ], "format": "cmov.nl|ge" , "sign": "s"},
|
|
"cmovnle" : {"aliases": ["cmovg" ], "format": "cmov.nle|g" , "sign": "s"},
|
|
"cmovnp" : {"aliases": ["cmovpo" ], "format": "cmov.np|po" , "sign": "_"},
|
|
"cmovnz" : {"aliases": ["cmovne" ], "format": "cmov.nz|ne" , "sign": "_"},
|
|
"cmovp" : {"aliases": ["cmovpe" ], "format": "cmov.p|pe" , "sign": "_"},
|
|
"cmovz" : {"aliases": ["cmove" ], "format": "cmov.z|e" , "sign": "_"},
|
|
|
|
"ctestb" : {"aliases": ["ctestnae", "ctestc" ], "format": "ctest.b|nae|c" , "sign": "u"},
|
|
"ctestbe" : {"aliases": ["ctestna" ], "format": "ctest.be|na" , "sign": "u"},
|
|
"ctestl" : {"aliases": ["ctestnge" ], "format": "ctest.l|nge" , "sign": "s"},
|
|
"ctestle" : {"aliases": ["ctestng" ], "format": "ctest.le|ng" , "sign": "s"},
|
|
"ctestnb" : {"aliases": ["ctestae", "ctestnc" ], "format": "ctest.nb|ae|nc" , "sign": "u"},
|
|
"ctestnbe" : {"aliases": ["ctesta" ], "format": "ctest.nbe|a" , "sign": "u"},
|
|
"ctestnl" : {"aliases": ["ctestge" ], "format": "ctest.nl|ge" , "sign": "s"},
|
|
"ctestnle" : {"aliases": ["ctestg" ], "format": "ctest.nle|g" , "sign": "s"},
|
|
"ctestnz" : {"aliases": ["ctestne" ], "format": "ctest.nz|ne" , "sign": "_"},
|
|
"ctestz" : {"aliases": ["cteste" ], "format": "ctest.z|e" , "sign": "_"},
|
|
|
|
"jb" : {"aliases": ["jnae", "jc" ], "format": "jb|jnae|jc" , "sign": "u"},
|
|
"jbe" : {"aliases": ["jna" ], "format": "jbe|jna" , "sign": "u"},
|
|
"jl" : {"aliases": ["jnge" ], "format": "jl|jnge" , "sign": "s"},
|
|
"jle" : {"aliases": ["jng" ], "format": "jle|jng" , "sign": "s"},
|
|
"jnb" : {"aliases": ["jae", "jnc" ], "format": "jnb|jae|jnc" , "sign": "u"},
|
|
"jnbe" : {"aliases": ["ja" ], "format": "jnbe|ja" , "sign": "u"},
|
|
"jnl" : {"aliases": ["jge" ], "format": "jnl|jge" , "sign": "s"},
|
|
"jnle" : {"aliases": ["jg" ], "format": "jnle|jg" , "sign": "s"},
|
|
"jnp" : {"aliases": ["jpo" ], "format": "jnp|jpo" , "sign": "_"},
|
|
"jnz" : {"aliases": ["jne" ], "format": "jnz|jne" , "sign": "_"},
|
|
"jp" : {"aliases": ["jpe" ], "format": "jp|jpe" , "sign": "_"},
|
|
"jz" : {"aliases": ["je" ], "format": "jz|je" , "sign": "_"},
|
|
|
|
"setb" : {"aliases": ["setnae", "setc" ], "format": "set.b|nae|c" , "sign": "u"},
|
|
"setbe" : {"aliases": ["setna" ], "format": "set.be|na" , "sign": "u"},
|
|
"setl" : {"aliases": ["setnge" ], "format": "set.l|nge" , "sign": "s"},
|
|
"setle" : {"aliases": ["setng" ], "format": "set.le|ng" , "sign": "s"},
|
|
"setnb" : {"aliases": ["setae", "setnc" ], "format": "set.nb|ae|nc" , "sign": "u"},
|
|
"setnbe" : {"aliases": ["seta" ], "format": "set.nbe|a" , "sign": "u"},
|
|
"setnl" : {"aliases": ["setge" ], "format": "set.nl|ge" , "sign": "s"},
|
|
"setnle" : {"aliases": ["setg" ], "format": "set.nle|g" , "sign": "s"},
|
|
"setnp" : {"aliases": ["setpo" ], "format": "set.np|po" , "sign": "_"},
|
|
"setnz" : {"aliases": ["setne" ], "format": "set.nz|ne" , "sign": "_"},
|
|
"setp" : {"aliases": ["setpe" ], "format": "set.p|pe" , "sign": "_"},
|
|
"setz" : {"aliases": ["sete" ], "format": "set.z|e" , "sign": "_"},
|
|
|
|
"setzub" : {"aliases": ["setzunae", "setzuc" ], "format": "setzu.b|nae|c" , "sign": "u"},
|
|
"setzube" : {"aliases": ["setzuna" ], "format": "setzu.be|na" , "sign": "u"},
|
|
"setzul" : {"aliases": ["setzunge" ], "format": "setzu.l|nge" , "sign": "s"},
|
|
"setzule" : {"aliases": ["setzung" ], "format": "setzu.le|ng" , "sign": "s"},
|
|
"setzunb" : {"aliases": ["setzuae", "setzunc" ], "format": "setzu.nb|ae|nc" , "sign": "u"},
|
|
"setzunbe" : {"aliases": ["setzua" ], "format": "setzu.nbe|a" , "sign": "u"},
|
|
"setzunl" : {"aliases": ["setzuge" ], "format": "setzu.nl|ge" , "sign": "s"},
|
|
"setzunle" : {"aliases": ["setzug" ], "format": "setzu.nle|g" , "sign": "s"},
|
|
"setzunp" : {"aliases": ["setzupo" ], "format": "setzu.np|po" , "sign": "_"},
|
|
"setzunz" : {"aliases": ["setzune" ], "format": "setzu.nz|ne" , "sign": "_"},
|
|
"setzup" : {"aliases": ["setzupe" ], "format": "setzu.p|pe" , "sign": "_"},
|
|
"setzuz" : {"aliases": ["setzue" ], "format": "setzu.z|e" , "sign": "_"},
|
|
|
|
"fwait" : {"aliases": ["wait" ], "format": "fwait"},
|
|
"shl" : {"aliases": ["sal" ], "format": "shl"}
|
|
},
|
|
|
|
"postproc": [
|
|
{"group": "Control Flow", "instructions": [
|
|
{"name": "call lcall", "control": "call"},
|
|
{"name": "iret iretd iretq", "control": "return"},
|
|
{"name": "jb jbe jl jle jnb jnbe jnl jnle jno jnp jns jnz jo jp js jz jecxz", "control": "branch"},
|
|
{"name": "jmp jmpabs ljmp", "control": "jump"},
|
|
{"name": "loop loope loopne", "control": "branch"},
|
|
{"name": "ret retf", "control": "return"}
|
|
]},
|
|
|
|
{"group": "Encoding Preference", "instructions": [
|
|
{"name": "vcvtneps2bf16", "encodingPreference": "EVEX"},
|
|
{"name": "vpmadd52huq vpmadd52luq", "encodingPreference": "EVEX"},
|
|
{"name": "vpdpbusd vpdpbusds vpdpwssd vpdpwssds", "encodingPreference": "EVEX"}
|
|
]}
|
|
]
|
|
}
|