mirror of
https://github.com/asmjit/asmjit.git
synced 2025-12-16 20:17:05 +03:00
* Refactored the whole codebase to use snake_case convention to
name functions and variables, including member variables.
Class naming is unchanged and each starts with upper-case
character. The intention of this change is to make the source
code more readable and consistent across multiple projects
where AsmJit is currently used.
* Refactored support.h to make it more shareable across projects.
* x86::Vec now inherits from UniVec
* minor changes in JitAllocator and WriteScope in order to make
the size of WriteScope smaller
* added ZoneStatistics and Zone::statistics() getter
* improved x86::EmitHelper to use tables instead of choose() and
other mechanisms to pick between SSE and AVX instructions
* Refactored the whole codebase to use snake_case convention for
for functions names, function parameter names, struct members,
and variables
* Added a non-owning asmjit::Span<T> type and use into public API
to hide the usage of ZoneVector in CodeHolder, Builder, and
Compiler. Users now only get Span (with data and size), which
doesn't require users to know about ZoneVector
* Removed RAWorkId from RATiedReg in favor of RAWorkReg*
* Removed GEN from LiveInfo as it's not needed by CFG construction
to save memory (GEN was merged with LIVE-IN bits). The remaining
LIVE-IN, LIVE-OUT, and KILL bits are enough, however KILL bits may
be removed in the future as KILL bits are not needed after LIVE-IN
and LIVE-OUT converged
* Optimized the representation of LIVE-IN, LIVE-OUT, and KILL bits
per block. Now only registers that live across multiple basic
blocks are included here, which means that virtual registers that
only live in a single block are not included and won't be overhead
during liveness analysis. This optimization alone can make liveness
analysis 90% faster depending on the code generated (more virtual
registers that only live in a single basic block -> more gains)
* Optimized building liveness information bits per block. The new
code uses an optimized algorithm to prevent too many traversals
and uses a more optimized code for a case in which not too many
registers are used (it avoids array operations if the number of
all virtual registers within the function fits a single BitWord)
* Optimized code that computes which virtual register is only used
in a single basic block - this aims to optimize register allocator
in the future by using a designed code path for allocating regs
only used in a single basic block
* Reduced the information required for each live-span, which is used
by bin-packing. Now the struct is 8 bytes, which is good for a lot
of optimizations C++ compiler can do
* Added UniCompiler (ujit) which can be used to share code paths
between X86, X86_64, and AArch64 code generation (experimental).
988 lines
27 KiB
JavaScript
988 lines
27 KiB
JavaScript
// This file is part of AsmJit project <https://asmjit.com>
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//
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// See <asmjit/core.h> or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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(function($scope, $as) {
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"use strict";
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function FAIL(msg) { throw new Error("[AArch32] " + msg); }
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// Import
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// ======
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const base = $scope.base ? $scope.base : require("./base.js");
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const exp = $scope.exp ? $scope.exp : require("./exp.js")
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const dict = base.dict;
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const NONE = base.NONE;
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const Parsing = base.Parsing;
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const MapUtils = base.MapUtils;
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// Export
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// ======
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const arm = $scope[$as] = dict();
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// Database
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// ========
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arm.dbName = "isa_aarch32.json";
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// asmdb.aarch32.Utils
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// ===================
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// Can be used to assign the number of bits each part of the opcode occupies.
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// NOTE: THUMB instructions that use halfword must always specify the width
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// of all registers as many instructions accept only LO (r0..r7) registers.
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const FieldInfo = {
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"P" : { "bits": 1 },
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"U" : { "bits": 1 },
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"W" : { "bits": 1 },
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"S" : { "bits": 1 },
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"R" : { "bits": 1 },
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"H" : { "bits": 1 },
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"isFp32": { "bits": 1 },
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"F" : { "bits": 1 },
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"align" : { "bits": 2 },
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"ja" : { "bits": 1 },
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"jb" : { "bits": 1 },
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"op" : { "bits": 1 }, // TODO: This should be fixed.
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"sz" : { "bits": 2 },
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"sop" : { "bits": 2 },
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"cond" : { "bits": 4 },
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"cmode" : { "bits": 4 },
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"Cn" : { "bits": 4 },
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"Cm" : { "bits": 4 },
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"Rd" : { "bits": 4, "read": false, "write": true },
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"Rd2" : { "bits": 4, "read": false, "write": true },
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"RdLo" : { "bits": 4, "read": false, "write": true },
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"RdHi" : { "bits": 4, "read": false, "write": true },
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"RdList": { "bits": 4, "read": false, "write": true , "list": true },
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"Rx" : { "bits": 4, "read": true , "write": true },
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"RxLo" : { "bits": 4, "read": true , "write": true },
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"RxHi" : { "bits": 4, "read": true , "write": true },
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"Rn" : { "bits": 4, "read": true , "write": false },
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"Rm" : { "bits": 4, "read": true , "write": false },
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"Ra" : { "bits": 4, "read": true , "write": false },
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"Rs" : { "bits": 4, "read": true , "write": false },
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"Rs2" : { "bits": 4, "read": true , "write": false },
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"RsList": { "bits": 4, "read": true , "write": false , "list": true },
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"Sd" : { "bits": 4, "read": false, "write": true },
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"Sd2" : { "bits": 4, "read": false, "write": true },
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"SdList": { "bits": 4, "read": false, "write": true , "list": true },
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"Sx" : { "bits": 4, "read": true , "write": true },
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"Sn" : { "bits": 4, "read": true , "write": false },
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"Sm" : { "bits": 4, "read": true , "write": false },
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"Ss" : { "bits": 4, "read": true , "write": false },
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"Ss2" : { "bits": 4, "read": true , "write": false },
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"SsList": { "bits": 4, "read": true , "write": false , "list": true },
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"Dd" : { "bits": 4, "read": false, "write": true },
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"Dd2" : { "bits": 4, "read": false, "write": true },
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"Dd3" : { "bits": 4, "read": false, "write": true },
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"Dd4" : { "bits": 4, "read": false, "write": true },
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"DdList": { "bits": 4, "read": false, "write": true , "list": true },
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"Dx" : { "bits": 4, "read": true , "write": true },
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"Dx2" : { "bits": 4, "read": true , "write": true },
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"Dn" : { "bits": 4, "read": true , "write": false },
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"Dn2" : { "bits": 4, "read": true , "write": false },
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"Dn3" : { "bits": 4, "read": true , "write": false },
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"Dn4" : { "bits": 4, "read": true , "write": false },
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"Dm" : { "bits": 4, "read": true , "write": false },
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"Ds" : { "bits": 4, "read": true , "write": false },
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"Ds2" : { "bits": 4, "read": true , "write": false },
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"Ds3" : { "bits": 4, "read": true , "write": false },
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"Ds4" : { "bits": 4, "read": true , "write": false },
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"DsList": { "bits": 4, "read": true , "write": false , "list": true },
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"Vd" : { "bits": 4, "read": false, "write": true },
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"Vd2" : { "bits": 4, "read": false, "write": true },
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"Vd3" : { "bits": 4, "read": false, "write": true },
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"Vd4" : { "bits": 4, "read": false, "write": true },
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"Vx" : { "bits": 4, "read": true , "write": true },
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"Vx2" : { "bits": 4, "read": true , "write": true },
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"Vn" : { "bits": 4, "read": true , "write": false },
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"Vm" : { "bits": 4, "read": true , "write": false },
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"Vs" : { "bits": 4, "read": true , "write": false },
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"Vs2" : { "bits": 4, "read": true , "write": false },
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};
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arm.FieldInfo = FieldInfo;
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// ARM utilities.
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class Utils {
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static splitInstructionSignature(s) {
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const names = s.match(/^[\w\|]+/)[0];
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s = s.substring(names.length);
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const opOffset = s.indexOf(" ")
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const suffix = s.substring(0, opOffset).trim();
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const operands = opOffset === -1 ? "" : s.substring(opOffset + 1).trim();
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return {
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names: names.split("|").map((base)=>{ return base + suffix}),
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operands: operands
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}
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}
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static parseShiftOp(s) {
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const m = s.match(/^(sop|lsl_or_asr|lsl|lsr|asr|ror|rrx) /);
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return m ? m[1] : "";
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}
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static parseDtArray(s) {
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const out = [];
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if (!s) return out;
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const arr = s.split("|");
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let i;
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// First expand anything between X-Y, for example s8-32 would be expanded to [s8, s16, s32].
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for (i = 0; i < arr.length; i++) {
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const v = arr[i];
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if (v.indexOf("-") !== -1) {
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const m = /^([A-Za-z]+)?(\d+)-(\d+)$/.exec(v);
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if (!m)
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FAIL(`Couldn't parse '${s}' data-type`);
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let type = m[1] || "";
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let size = parseInt(m[2], 10);
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let last = parseInt(m[3], 10);
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if (!Utils.checkDtSize(size) || !Utils.checkDtSize(last))
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FAIL(`Invalid dt width in '${s}'`);
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do {
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out.push(type + String(size));
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size <<= 1;
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} while (size <= last);
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}
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else {
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out.push(v);
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}
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}
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// Now expand 'x' to 's' and 'u'.
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i = 0;
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while (i < out.length) {
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const v = out[i];
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if (v.startsWith("x")) {
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out.splice(i, 1, "s" + v.substr(1), "u" + v.substr(1));
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i += 2;
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}
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else {
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i++;
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}
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}
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return out;
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}
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static checkDtSize(x) {
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return x === 8 || x === 16 || x === 32 || x === 64;
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}
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}
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arm.Utils = Utils;
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function normalizeNumber(n) {
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return n < 0 ? 0x100000000 + n : n;
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}
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function decomposeOperand(s) {
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const elementSuffix = "[#i]";
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let element = null;
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let consecutive = 0;
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let userRegList = false;
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if (s.endsWith("^")) {
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userRegList = true;
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s = s.substring(0, s.length - 1);
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}
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if (s.endsWith(elementSuffix)) {
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element = "#i";
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s = s.substring(0, s.length - elementSuffix.length);
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}
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if (s.endsWith("++")) {
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consecutive = 2;
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s = s.substr(0, s.length - 2);
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}
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else if (s.endsWith("+")) {
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consecutive = 1;
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s = s.substr(0, s.length - 1);
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}
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let m = s.match(/==|\!=|>=|<=|\*/);
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let restrict = false;
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if (m) {
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restrict = s.substr(m.index);
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s = s.substr(0, m.index);
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}
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return {
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data : s,
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element : element,
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restrict: restrict,
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consecutive: consecutive,
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userRegList: true
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};
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}
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function splitOpcodeFields(s) {
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const arr = s.split("|");
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const out = [];
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for (let i = 0; i < arr.length; i++) {
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const val = arr[i];
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if (/^[0-1A-Z]{2,}$/.test(val))
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out.push.apply(out, val.match(/([0-1]+)|[A-Z]/g));
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else
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out.push(val);
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}
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return out.map((field) => { return field.trim(); });
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}
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// asmdb.aarch32.Operand
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// =====================
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// ARM operand.
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class Operand extends base.Operand {
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constructor(def) {
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super();
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this.data = def;
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}
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hasMemModes() {
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return Object.keys(this.memModes).length !== 0;
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}
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get name() {
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switch (this.type) {
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case "reg": return this.reg;
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case "mem": return this.mem;
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case "imm": return this.imm;
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case "rel": return this.rel;
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default : return "";
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}
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}
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get scale() {
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if (this.restrict && this.restrict.startsWith("*"))
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return parseInt(this.restrict.substr(1), 10);
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else
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return 0;
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}
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isRelative() {
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if (this.type === "imm")
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return this.name === "relA" || this.name === "relS" || this.name === "relZ";
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else
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return false;
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}
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}
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arm.Operand = Operand;
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// asmdb.aarch32.Instruction
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// =========================
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function patternFromOperand(key) {
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return key;
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// return key.replace(/\b(?:[RVDS](?:d|s|n|m|x|x2))\b/, "R");
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}
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// Rewrite a memory operand expression (either base or index) to a simplified one, which is okay
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// to be generated as C++ expression. In general, we want to simplify != to a more favorable code.
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function simplifyMemoryExpression(e) {
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if (e.type === "binary" && e.op === "!=" && e.right.type === "var") {
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// Rewrite A != PC to A < PC
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if (e.right.name === "PC") { e.op = "<"; }
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// Rewrite A != HI to A < 8
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if (e.right.name === "HI") { e.op = "<"; e.right = exp.Imm(8); }
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// Rewrite A != XX to A < SP || A == LR
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if (e.right.name === "XX") {
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return exp.Or(exp.Lt(e.left, exp.Var("SP")),
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exp.Eq(e.left.clone(), exp.Var("LR")));
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}
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}
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return e;
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}
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// ARM instruction.
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class Instruction extends base.Instruction {
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constructor(db, data) {
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super(db, data);
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// name, operands, encoding, opcode, metadata
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const encoding = Object.hasOwn(data, "a32") ? "a32" :
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Object.hasOwn(data, "t32") ? "t32" :
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Object.hasOwn(data, "t16") ? "t16" : "";
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this.name = data.name;
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this.it = dict(); // THUMB's 'it' flags.
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this.apsr = dict();
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this.fpcsr = dict();
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this.calc = dict(); // Calculations required to generate opcode.
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this.immCond = []; // Immediate value conditions (array of conditions).
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this.s = null; // Instruction S flag (null, true, or false).
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this.dt = []; // Instruction <dt> field (first data-type).
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this.dt2 = []; // Instruction <dt2> field (second data-type).
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this.availableFrom = ""; // Instruction supported by from ARMv???.
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this.availableUntil = ""; // Instruction supported by until ARMv???.
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this._assignOperands(data.operands);
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this._assignEncoding(encoding.toUpperCase());
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this._assignOpcode(data[encoding]);
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for (let k in data) {
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if (k === "name" || k == encoding || k === "operands")
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continue;
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this._assignAttribute(k, data[k]);
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}
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this._updateOperandsInfo();
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this._postProcess();
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}
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_assignAttribute(key, value) {
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switch (key) {
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case "it":
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for (let it of value.split(" "))
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this.it[it.trim()] = true;
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break;
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case "apsr":
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case "fpcsr":
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this._assignAttributeKeyValue(key, value);
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break;
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case "imm":
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this.imm = exp.parse(value);
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break;
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case "calc":
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for (let calcKey in value)
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this.calc[calcKey] = exp.parse(value[calcKey]);
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break;
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default:
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super._assignAttribute(key, value);
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}
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}
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_assignAttributeKeyValue(name, content) {
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const attributes = content.trim().split(/[ ]+/);
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for (let i = 0; i < attributes.length; i++) {
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const attr = attributes[i].trim();
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if (!attr)
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continue;
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const eq = attr.indexOf("=");
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let key = eq === -1 ? attr : attr.substr(0, eq);
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let val = eq === -1 ? true : attr.substr(eq + 1);
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// If the key contains "|" it's a definition of multiple attributes.
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if (key.indexOf("|") !== -1) {
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const dot = key.indexOf(".");
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const base = dot === -1 ? "" : key.substr(0, dot + 1);
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const keys = (dot === -1 ? key : key.substr(dot + 1)).split("|");
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for (let j = 0; j < keys.length; j++)
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this[name][base + keys[j]] = val;
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}
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else {
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this[name][key] = val;
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}
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}
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}
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_assignEncoding(s) {
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this.arch = s === "T16" || s === "T32" ? "THUMB" : "ARM";
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this.encoding = s;
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}
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_assignOperands(s) {
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if (!s) return;
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// Split into individual operands and push them to `operands`.
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const arr = base.Parsing.splitOperands(s);
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for (let i = 0; i < arr.length; i++) {
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let def = arr[i];
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const op = new Operand(def);
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const consecutive = def.match(/(\d+)x\{(.*)\}([+][+]?)/);
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if (consecutive)
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def = consecutive[2];
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op.sign = false;
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op.element = null;
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op.shiftOp = "";
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op.shiftImm = null;
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// Handle {optional} attribute.
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if (Parsing.isOptional(def)) {
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op.optional = true;
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def = Parsing.clearOptional(def);
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}
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// Handle commutativity <-> symbol.
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if (Parsing.isCommutative(def)) {
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op.commutative = true;
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def = Parsing.clearCommutative(def);
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}
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// Handle shift operation.
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let shiftOp = Utils.parseShiftOp(def);
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if (shiftOp) {
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op.shiftOp = shiftOp;
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def = def.substring(shiftOp.length + 1);
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}
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|
|
if (def.startsWith("[")) {
|
|
op.type = "mem";
|
|
op.memModes = dict();
|
|
|
|
op.base = null;
|
|
op.index = null;
|
|
op.offset = null;
|
|
|
|
let mem = def;
|
|
let didHaveMemMode = false;
|
|
|
|
for (;;) {
|
|
if (mem.endsWith("!")) {
|
|
op.memModes.preIndex = true;
|
|
mem = mem.substring(0, mem.length - 1);
|
|
|
|
didHaveMemMode = true;
|
|
break;
|
|
}
|
|
|
|
if (mem.endsWith("@")) {
|
|
op.memModes.postIndex = true;
|
|
mem = mem.substring(0, mem.length - 1);
|
|
|
|
didHaveMemMode = true;
|
|
break;
|
|
}
|
|
|
|
if (mem.endsWith("{!}")) {
|
|
op.memModes.offset = true;
|
|
op.memModes.preIndex = true;
|
|
mem = mem.substring(0, mem.length - 3);
|
|
|
|
didHaveMemMode = true;
|
|
continue;
|
|
}
|
|
|
|
if (mem.endsWith("{@}")) {
|
|
op.memModes.offset = true;
|
|
op.memModes.postIndex = true;
|
|
mem = mem.substring(0, mem.length - 3);
|
|
|
|
didHaveMemMode = true;
|
|
continue;
|
|
}
|
|
|
|
break;
|
|
}
|
|
|
|
if (!mem.endsWith("]"))
|
|
FAIL(`Unknown memory operand '${mem}' in '${def}'`);
|
|
|
|
let parts = mem.substring(1, mem.length - 1).split(",").map(function(s) { return s.trim() });
|
|
for (let i = 0; i < parts.length; i++) {
|
|
const part = parts[i];
|
|
|
|
const m = part.match(/^\{(lsl|sop)\s+#(\w+)\}$/);
|
|
if (m) {
|
|
op.shiftOp = m[1];
|
|
op.shiftImm = m[2];
|
|
continue;
|
|
}
|
|
|
|
if (i === 0) {
|
|
op.base = dict();
|
|
op.base.field = part;
|
|
op.base.exp = null;
|
|
|
|
const m = part.match(/^([A-Za-z]\w*)/);
|
|
if (m.length < part.length) {
|
|
op.base.exp = simplifyMemoryExpression(exp.parse(part));
|
|
op.base.field = m[1];
|
|
}
|
|
}
|
|
else if (part.startsWith("#")) {
|
|
let p = part.substring(1);
|
|
let u = "1";
|
|
let alwaysNegative = false;
|
|
|
|
let offExp = null;
|
|
let offMul = 1;
|
|
|
|
if (p.startsWith("+/-")) {
|
|
u = "U";
|
|
p = p.substring(3);
|
|
}
|
|
|
|
if (p.startsWith("-")) {
|
|
alwaysNegative = false;
|
|
p = p.substring(1);
|
|
}
|
|
|
|
const expMatch = p.match(/^([A-Za-z]\w*)==/);
|
|
if (expMatch) {
|
|
offExp = exp.parse(p);
|
|
p = p.substr(0, expMatch[1].length);
|
|
}
|
|
|
|
const mulMatch = p.match(/\s*\*\s*(\d+)$/);
|
|
if (mulMatch) {
|
|
offMul = parseInt(mulMatch[1]);
|
|
p = p.substr(0, mulMatch.index);
|
|
}
|
|
|
|
op.offset = dict();
|
|
op.offset.field = p;
|
|
op.offset.u = u;
|
|
op.offset.exp = offExp;
|
|
op.offset.mul = offMul;
|
|
op.offset.negative = alwaysNegative;
|
|
}
|
|
else {
|
|
let p = part;
|
|
let u = "1";
|
|
|
|
if (p.startsWith("+/-")) {
|
|
u = "U";
|
|
p = p.substring(3);
|
|
}
|
|
|
|
op.index = dict();
|
|
op.index.field = p;
|
|
op.index.u = u;
|
|
|
|
const m = p.match(/^([A-Za-z]\w*)/);
|
|
if (m.length < p.length) {
|
|
op.index.exp = simplifyMemoryExpression(exp.parse(p));
|
|
op.index.field = m[1];
|
|
}
|
|
}
|
|
}
|
|
|
|
if (!op.hasMemModes() && (op.offset || op.index))
|
|
op.memModes.offset = true;
|
|
|
|
op.mem = mem;
|
|
}
|
|
else if (def.startsWith("#")) {
|
|
const obj = decomposeOperand(def);
|
|
const imm = obj.data;
|
|
|
|
op.type = "imm";
|
|
op.imm = imm.substring(1); // Immediate operand name.
|
|
op.immSize = 0; // Immediate size in bits.
|
|
op.restrict = obj.restrict; // Immediate condition.
|
|
}
|
|
else {
|
|
const obj = decomposeOperand(def);
|
|
const reg = obj.data;
|
|
|
|
const type = reg.substr(0, 1).toLowerCase();
|
|
const info = FieldInfo[reg];
|
|
|
|
if (!info)
|
|
FAIL(`Unknown register operand '${reg}' in '${def}'`);
|
|
|
|
op.type = info.list ? "reg-list" : "reg";
|
|
op.reg = reg; // Register name (as specified in manual).
|
|
op.regType = type; // Register type.
|
|
op.regList = !!info.list; // Register list.
|
|
op.read = info.read; // Register access (read).
|
|
op.write = info.write; // Register access (write).
|
|
op.element = obj.element; // Register element[] access.
|
|
op.restrict = obj.restrict; // Register condition.
|
|
op.consecutive = obj.consecutive;
|
|
}
|
|
|
|
this.operands.push(op);
|
|
|
|
if (consecutive) {
|
|
const count = parseInt(consecutive[1]);
|
|
for (let n = 2; n <= count; n++) {
|
|
const def = consecutive[3].replace(op.reg, op.reg + n);
|
|
const opN = new Operand(def);
|
|
opN.type = "reg";
|
|
opN.reg = op.reg + n;
|
|
opN.regType = op.regType;
|
|
opN.read = op.read;
|
|
opN.write = op.write;
|
|
opN.element = op.element;
|
|
opN.consecutive = consecutive[3].length;
|
|
this.operands.push(opN);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
_assignOpcode(s) {
|
|
this.opcodeString = s;
|
|
|
|
let opcodeIndex = 0;
|
|
let opcodeValue = 0;
|
|
|
|
let patternMap = {};
|
|
|
|
// Split opcode into its fields.
|
|
const arr = splitOpcodeFields(s);
|
|
const dup = dict();
|
|
|
|
const fields = this.fields;
|
|
const pattern = [];
|
|
|
|
const fieldMap = Object.create(null);
|
|
for (let field of arr) {
|
|
fieldMap[field] = true;
|
|
}
|
|
|
|
for (let i = arr.length - 1; i >= 0; i--) {
|
|
let key = arr[i];
|
|
let m;
|
|
|
|
if (/^[0-1]+$/.test(key)) {
|
|
// This part of the opcode is RAW bits, they contribute to the `opcodeValue`.
|
|
opcodeValue |= parseInt(key, 2) << opcodeIndex;
|
|
opcodeIndex += key.length;
|
|
pattern.unshift("_".repeat(key.length));
|
|
}
|
|
else {
|
|
pattern.unshift(patternFromOperand(key));
|
|
patternMap[patternFromOperand(key)] = true;
|
|
|
|
let size = 0;
|
|
let mask = 0;
|
|
let bits = 0;
|
|
let from = -1;
|
|
|
|
let lbit = key.startsWith("'");
|
|
let hbit = key.endsWith("'");
|
|
|
|
if ((m = key.match(/\[\s*(\d+)\s*\:\s*(\d+)\s*\]$/))) {
|
|
const a = parseInt(m[1], 10);
|
|
const b = parseInt(m[2], 10);
|
|
if (a < b)
|
|
FAIL(`Invalid bit range '${key}' in opcode '${s}'`);
|
|
from = b;
|
|
size = a - b + 1;
|
|
mask = ((1 << size) - 1) << b;
|
|
key = key.substr(0, m.index).trim();
|
|
}
|
|
else if ((m = key.match(/\[\s*(\d+)\s*\]$/))) {
|
|
from = parseInt(m[1], 10);
|
|
size = 1;
|
|
mask = 1 << from;
|
|
key = key.substr(0, m.index).trim();
|
|
}
|
|
else if ((m = key.match(/\:\s*(\d+)$/))) {
|
|
size = parseInt(m[1], 10);
|
|
bits = size;
|
|
key = key.substr(0, m.index).trim();
|
|
}
|
|
else {
|
|
const key_ = key;
|
|
|
|
if (lbit || hbit) {
|
|
from = 0;
|
|
|
|
if (lbit && hbit)
|
|
FAIL(`Couldn't recognize the format of '${key}' in opcode '${s}'`);
|
|
|
|
if (lbit) {
|
|
key = key.substring(1);
|
|
}
|
|
|
|
if (hbit) {
|
|
key = key.substring(0, key.length - 1);
|
|
from = 4;
|
|
}
|
|
|
|
size = 1;
|
|
}
|
|
else if (FieldInfo[key]) {
|
|
// Sizes of some standard fields can be assigned automatically.
|
|
size = FieldInfo[key].bits;
|
|
bits = size;
|
|
|
|
if (fieldMap["'" + key])
|
|
from = 1;
|
|
}
|
|
else if (key.length === 1) {
|
|
// Sizes of one-letter fields (like 'U', 'F', etc...) is 1 if not specified.
|
|
size = 1;
|
|
bits = 1;
|
|
}
|
|
else {
|
|
FAIL(`Couldn't recognize the size of '${key}' in opcode '${s}'`);
|
|
}
|
|
|
|
if (dup[key_] === true) {
|
|
bits = 0;
|
|
lbit = 0;
|
|
hbit = 0;
|
|
}
|
|
else {
|
|
dup[key_] = true;
|
|
}
|
|
}
|
|
|
|
let field = fields[key];
|
|
if (!field) {
|
|
field = {
|
|
index: opcodeIndex,
|
|
values: [],
|
|
bits: 0,
|
|
mask: 0,
|
|
lbit: 0,
|
|
hbit: 0 // Only 1 if a single quote (') was used.
|
|
}
|
|
fields[key] = field;
|
|
}
|
|
|
|
if (from === -1)
|
|
from = field.bits;
|
|
|
|
field.mask |= mask;
|
|
field.bits += bits;
|
|
field.lbit += lbit;
|
|
field.hbit += hbit;
|
|
field.values.push({
|
|
index: opcodeIndex,
|
|
from: from,
|
|
size: size
|
|
});
|
|
|
|
opcodeIndex += size;
|
|
}
|
|
}
|
|
|
|
for (let i = 0; i < pattern.length; i++)
|
|
if (pattern[i] === 'U')
|
|
pattern[i] = "_";
|
|
|
|
// Normalize all fields.
|
|
for (let key in fields) {
|
|
const field = fields[key];
|
|
|
|
// There should be either number of bits or mask, there shouldn't be both.
|
|
if (!field.bits && !field.mask)
|
|
FAIL(`Part '${key}' of opcode '${s}' contains neither size nor mask`);
|
|
|
|
if (field.bits && field.mask)
|
|
FAIL(`Part '${key}' of opcode '${s}' contains both size and mask`);
|
|
|
|
if (field.bits)
|
|
field.mask = ((1 << field.bits) - 1);
|
|
else if (field.mask)
|
|
field.bits = 32 - Math.clz32(field.mask);
|
|
|
|
// Handle field that used single-quote.
|
|
if (field.lbit) {
|
|
field.mask = (field.mask << 1) | 0x1;
|
|
field.bits++;
|
|
}
|
|
|
|
if (field.hbit) {
|
|
field.mask |= 1 << field.bits;
|
|
field.bits++;
|
|
}
|
|
|
|
const op = this.operandByName(key);
|
|
if (op && op.isImm())
|
|
op.immSize = field.bits;
|
|
}
|
|
|
|
// Check if the opcode value has the correct number of bits (either 16 or 32).
|
|
if (opcodeIndex !== 16 && opcodeIndex !== 32)
|
|
FAIL(`The number of bits '${opcodeIndex}' used by the opcode '${s}' doesn't match 16 or 32`);
|
|
this.opcodeValue = normalizeNumber(opcodeValue);
|
|
}
|
|
|
|
_assignSpecificAttribute(key, value) {
|
|
// Support ARMv?+ and ARMv?- attributes.
|
|
if (/^ARM\w+[+-]$/.test(key)) {
|
|
const armv = key.substr(0, key.length - 1);
|
|
const sign = key.substr(key.length - 1);
|
|
|
|
if (sign === "+")
|
|
this.availableFrom = armv;
|
|
else
|
|
this.availableUntil = armv;
|
|
return true;
|
|
}
|
|
|
|
switch (key) {
|
|
case "it": {
|
|
const values = String(value).split("|");
|
|
for (let i = 0; i < values.length; i++) {
|
|
const value = values[i];
|
|
switch (value) {
|
|
case "in" : this.it.IN = true; break;
|
|
case "out" : this.it.OUT = true; break;
|
|
case "any" : this.it.IN = true;
|
|
this.it.OUT = true; break;
|
|
case "last": this.it.LAST = true; break;
|
|
case "def" : this.it.DEF = true; break;
|
|
default:
|
|
this.report(`${this.name}: Unhandled IT value '${value}'`);
|
|
}
|
|
}
|
|
return true;
|
|
}
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
// ARM instruction name could consist of name and optional type information
|
|
// specified as <dt> and <dt2> in ARM manuals. We parse this information and
|
|
// store it to `dt` and `dt2` fields. In addition, we also recognize the `S`
|
|
// suffix (uppercase) of the instruction and mark it as `S` instruction. After
|
|
// that the name is normalized to be lowercased.
|
|
//
|
|
// This functionality requires all the instruction data to be already set-up.
|
|
_postProcess() {
|
|
let s = this.name;
|
|
|
|
// Parse <dt> and <dt2> fields.
|
|
if (s.indexOf(".") !== -1) {
|
|
const parts = s.split(".");
|
|
this.name = parts[0];
|
|
|
|
if (parts.length > 3)
|
|
FAIL(`Couldn't recognize name attributes of '${s}'`);
|
|
|
|
for (let i = 1; i < parts.length; i++) {
|
|
const dt = Utils.parseDtArray(parts[i]);
|
|
if (i === 1)
|
|
this.dt = dt;
|
|
else
|
|
this.dt2 = dt;
|
|
}
|
|
}
|
|
|
|
// Recognize "S" suffix.
|
|
if (this.name.endsWith("S")) {
|
|
this.name = this.name.substr(0, this.name.length - 1) + "s";
|
|
this.s = true;
|
|
}
|
|
|
|
this.dt.sort();
|
|
}
|
|
|
|
operandByName(name) {
|
|
const operands = this.operands;
|
|
for (let i = 0; i < operands.length; i++) {
|
|
const op = operands[i];
|
|
if (op.name === name)
|
|
return op;
|
|
}
|
|
return null;
|
|
}
|
|
}
|
|
arm.Instruction = Instruction;
|
|
|
|
// asmdb.aarch32.ISA
|
|
// =================
|
|
|
|
function mergeGroupData(data, group) {
|
|
for (let k in group) {
|
|
switch (k) {
|
|
case "group":
|
|
case "data":
|
|
break;
|
|
|
|
case "ext":
|
|
data[k] = (data[k] ? data[k] + " " : "") + group[k];
|
|
break;
|
|
|
|
default:
|
|
if (data[k] === undefined)
|
|
data[k] = group[k]
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
class ISA extends base.ISA {
|
|
constructor(data) {
|
|
super(data);
|
|
this.addData(data || NONE);
|
|
}
|
|
|
|
_addInstructions(groups) {
|
|
for (let group of groups) {
|
|
for (let inst of group.data) {
|
|
const sgn = Utils.splitInstructionSignature(inst.inst);
|
|
const data = MapUtils.cloneExcept(inst, { "inst": true });
|
|
|
|
mergeGroupData(data, group)
|
|
|
|
for (let j = 0; j < sgn.names.length; j++) {
|
|
data.name = sgn.names[j];
|
|
data.operands = sgn.operands;
|
|
if (j > 0)
|
|
data.aliasOf = sgn.names[0];
|
|
this._addInstruction(new Instruction(this, data));
|
|
}
|
|
}
|
|
}
|
|
|
|
return this;
|
|
}
|
|
/*
|
|
_addInstructions(instructions) {
|
|
for (let i = 0; i < instructions.length; i++) {
|
|
const obj = instructions[i];
|
|
const sgn = obj.inst;
|
|
const sep = sgn.indexOf(" ");
|
|
|
|
const names = (sep !== -1 ? sgn.substring(0, sep) : sgn).trim().split("/");
|
|
const operands = sep !== -1 ? sgn.substring(sep + 1) : "";
|
|
|
|
const encoding = Object.hasOwn(obj, "a32") ? "a32" :
|
|
Object.hasOwn(obj, "t32") ? "t32" :
|
|
Object.hasOwn(obj, "t16") ? "t16" : "";
|
|
|
|
if (!encoding)
|
|
FAIL(`Instruction ${names.join("/")} doesn't encoding, it must provide either a32, t32, or t16 field`);
|
|
|
|
for (let j = 0; j < names.length; j++) {
|
|
const inst = new Instruction(this, names[j], operands, encoding.toUpperCase(), obj[encoding], obj);
|
|
if (j > 0)
|
|
inst.aliasOf = names[0];
|
|
this._addInstruction(inst);
|
|
}
|
|
}
|
|
|
|
return this;
|
|
}
|
|
*/
|
|
}
|
|
arm.ISA = ISA;
|
|
|
|
}).apply(this, typeof module === "object" && module && module.exports
|
|
? [module, "exports"] : [this.asmdb || (this.asmdb = {}), "aarch32"]);
|