5 Commits

Author	SHA1	Message	Date
kobalicek	d28c4be2e7	[bug] Properly validate ADD[S]/SUB[S]/CMP/CMN with extend option ... Extend option in ADD, ADDS, SUB, SUBS, CMP, and CMN instructions doesn't always use the same second register type. For example when extending from a BYTE the second source register must be W and not X. This change makes sure that the assembler accepts the correct combination and refuses the incorrect one. IMPORTANT: Although this is not an ABI change, the new behavior can break AArch64 code that used the incorrect signatures.	2024-11-15 22:02:48 +01:00
kobalicek	3772c447ca	[ABI] Accumulated API/ABI changes ... * Renamed all eq() methods to equals() (consistency) (ABI) * Reorganized some X86 instructions in X86 database * Properly detect RISC-V CPU at compile time (Environment) * Removed CallConvId::kNone in favor of defaulting to kCDecl (ABI) * CallConvId::kHost is now alias to CallConvId::kCDecl (ABI) * Added FloatABI to Environment to disginguish between softfloat and hardfloat * Added more AArch64 CPU features and their detection (ABI) * Because of CallConvId changes it's now possible to run compiler tests on 32-bit ARM (fixes a bug in test cases) * Added QEMU to CI build matrix to test different architectures	2024-01-01 20:15:00 +01:00
kobalicek	a465fe71ab	[ABI] Reworked FuncSignature	2023-12-27 21:17:45 +01:00
kobalicek	1ed8b77f5b	[ABI] Added CpuFeatures to Target and CodeHolder, improved test_perf	2023-01-16 00:10:56 +01:00
kobalicek	23ddf56b00	[ABI] Initial AArch64 support	2022-02-09 17:08:40 +01:00