Refactored asmjit::x86 register definitions (now exported as a single symbol).
Refactored bit utilities, now using proper naming like `or_`, `and_`, `andNot`.
Refactored X86RegCount and X86RegMask to support K instead of Fp register.
Refactored X86 instruction table (won't stay for long, new tool to export it is in development).
Renamed instruction group to instruction encoding.
Added XSAVE/OSXSAVE and other CPU features to X86CpuInfo.
Added proper AVX and AVX-512 detection to X86CpuInfo.
Added support to get content of XCR0 in X86CpuInfo (callXGetBV).
Added XSAVE instruction set support (Assembler/Compiler).
Added SSE4a instruction set support (Assembler/Compiler).
Added X86KReg and X86KVar register/variable support (AVX-512).
Added X86ZmmReg and X86ZmmVar register/variable support (AVX-512).
Changed instruction table schema to minimize its size and added use of EFLAGS register (for scheduler).
Changed the rest of intrinsics accepting `void*` to accept `Ptr` instead.
Changed clear()/reset() concept - only `reset()` now exists and accepts a `releaseMemory` argument.
Changed unit tests to use bundled `Broken` framework.
Moved podvector and podlist to base/containers.
Added CMPS, LODS, MOVS, SCAS, STOS instructions.
Added Label::isInitialized() and Var::isInitialized().
Added X86Scheduler stub - preparing for instruction reordering.
Added support for tracing (see ASMJIT_TRACE) to allow consumers to find bugs in AsmJit quicker.
Fixed possible Zone memory leak.
Fixed and improved alloc/spill (added support for home register which asmjit honors from now).
Fixed Assembler `LEA REG, [LABEL]` bug.
Fixed [Mem, Imm] instructions with zero-sized operand to return error instead of emitting garbage.
Fixed minor bug in VMemMgr - always point to a correct hProcess so it can be used properly (#41).
