mirror of
https://github.com/asmjit/asmjit.git
synced 2025-12-17 04:24:37 +03:00
Fixed some minor issues reported by clang
This commit is contained in:
@@ -40,11 +40,11 @@ enum { kBaseCompilerDefaultLookAhead = 64 };
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Compiler::Compiler(Runtime* runtime) :
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CodeGen(runtime),
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_assembler(NULL),
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_nodeFlowId(0),
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_nodeFlags(0),
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_maxLookAhead(kBaseCompilerDefaultLookAhead),
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_targetVarMapping(NULL),
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_assembler(NULL),
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_firstNode(NULL),
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_lastNode(NULL),
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_cursor(NULL),
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@@ -162,19 +162,6 @@ void ConstPool::reset() {
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// [asmjit::ConstPool - Ops]
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// ============================================================================
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static ASMJIT_INLINE size_t ConstPool_getGapIndex(size_t size) {
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if (size <= 1)
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return ConstPool::kIndex1;
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else if (size <= 3)
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return ConstPool::kIndex2;
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else if (size <= 7)
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return ConstPool::kIndex4;
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else if (size <= 15)
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return ConstPool::kIndex8;
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else
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return ConstPool::kIndex16;
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}
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static ASMJIT_INLINE ConstPoolGap* ConstPool_allocGap(ConstPool* self) {
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ConstPoolGap* gap = self->_gapPool;
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if (gap == NULL)
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@@ -481,7 +468,6 @@ UNIT(base_constpool) {
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INFO("Checking pool alignment when combined constants are added.");
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{
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uint8_t bytes[32] = { 0 };
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uint64_t c = 0;
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size_t offset;
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pool.add(bytes, 1, offset);
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@@ -217,7 +217,7 @@ Error Context::resolveCellOffsets() {
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// Vars - Allocated according to alignment/width.
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while (varCell != NULL) {
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uint32_t size = varCell->getSize();
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uint32_t offset;
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uint32_t offset = 0;
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switch (size) {
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case 1: offset = pos1 ; pos1 += 1 ; break;
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@@ -968,16 +968,18 @@ static bool X86Assembler_dumpComment(StringBuilder& sb, size_t len, const uint8_
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// [asmjit::X86Assembler - Emit]
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// ============================================================================
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#define HI_REG(_Index_) ((_kX86RegTypePatchedGpbHi << 8) | _Index_)
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//! \internal
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static const Operand::VRegOp x86PatchedHiRegs[4] = {
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// --------------+---+--------------------------------+--------------+------+
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// Operand | S | Register Code | OperandId |Unused|
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// --------------+---+--------------------------------+--------------+------+
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{ kOperandTypeReg, 1 , (_kX86RegTypePatchedGpbHi << 8) | 4, kInvalidValue, 0, 0 },
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{ kOperandTypeReg, 1 , (_kX86RegTypePatchedGpbHi << 8) | 5, kInvalidValue, 0, 0 },
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{ kOperandTypeReg, 1 , (_kX86RegTypePatchedGpbHi << 8) | 6, kInvalidValue, 0, 0 },
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{ kOperandTypeReg, 1 , (_kX86RegTypePatchedGpbHi << 8) | 7, kInvalidValue, 0, 0 }
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// --------------+---+--------------+--------------+------------+
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// Operand | S | Reg. Code | OperandId | Unused |
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// --------------+---+--------------+--------------+------------+
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{ kOperandTypeReg, 1 , { HI_REG(4) }, kInvalidValue, {{ 0, 0 }} },
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{ kOperandTypeReg, 1 , { HI_REG(5) }, kInvalidValue, {{ 0, 0 }} },
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{ kOperandTypeReg, 1 , { HI_REG(6) }, kInvalidValue, {{ 0, 0 }} },
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{ kOperandTypeReg, 1 , { HI_REG(7) }, kInvalidValue, {{ 0, 0 }} }
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};
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#undef HI_REG
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template<int Arch>
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static Error ASMJIT_CDECL X86Assembler_emit(Assembler* self_, uint32_t code, const Operand* o0, const Operand* o1, const Operand* o2, const Operand* o3) {
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@@ -4108,7 +4110,6 @@ _EmitJmpOrCallAbs:
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if (Arch == kArchX64) {
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Ptr baseAddress = self->getBaseAddress();
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Ptr diff = rd.data - (baseAddress + rd.from + 4);
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// If the base address of the output is known, it's possible to determine
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// the need for a trampoline here. This saves possible REX prefix in
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@@ -279,8 +279,8 @@ X86Context::~X86Context() {}
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// [asmjit::X86Context - Reset]
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// ============================================================================
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void X86Context::reset() {
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Context::reset();
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void X86Context::reset(bool releaseMemory) {
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Context::reset(releaseMemory);
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_x86State.reset(0);
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_clobberedRegs.reset();
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@@ -2090,7 +2090,6 @@ Error X86Context::fetch() {
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Node* next = NULL;
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Node* stop = getStop();
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uint32_t groupId = 1;
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uint32_t flowId = 0;
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VarAttr vaTmpList[80];
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@@ -4432,8 +4431,6 @@ ASMJIT_INLINE void X86CallAlloc::ret() {
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//! \internal
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static Error X86Context_translateOperands(X86Context* self, Operand* opList, uint32_t opCount) {
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X86Compiler* compiler = self->getCompiler();
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const X86VarInfo* varInfo = _x86VarInfo;
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uint32_t hasGpdBase = compiler->getRegSize() == 4;
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// Translate variables into registers.
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@@ -59,7 +59,7 @@ struct X86Context : public Context {
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// [Reset]
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// --------------------------------------------------------------------------
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virtual void reset();
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virtual void reset(bool releaseMemory = false);
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// --------------------------------------------------------------------------
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// [Arch]
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