diff --git a/.gitignore b/.gitignore index 75d36d0..7847c1c 100644 --- a/.gitignore +++ b/.gitignore @@ -1,6 +1,3 @@ /build /build_* -/tools/asmdb .vscode -.kdev4 -*.kdev4 diff --git a/CMakeLists.txt b/CMakeLists.txt index 7de1ccf..dedb8b6 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -55,10 +55,6 @@ if (NOT DEFINED ASMJIT_NO_X86) set(ASMJIT_NO_X86 FALSE) endif() -if (NOT DEFINED ASMJIT_NO_AARCH32) - set(ASMJIT_NO_AARCH32 FALSE) -endif() - if (NOT DEFINED ASMJIT_NO_AARCH64) set(ASMJIT_NO_AARCH64 FALSE) endif() @@ -86,7 +82,6 @@ set(ASMJIT_EMBED "${ASMJIT_EMBED}" CACHE BOOL "Embed 'asmjit set(ASMJIT_STATIC "${ASMJIT_STATIC}" CACHE BOOL "Build 'asmjit' library as static") set(ASMJIT_SANITIZE "${ASMJIT_SANITIZE}" CACHE STRING "Build with sanitizers: 'address', 'undefined', etc...") set(ASMJIT_NO_X86 "${ASMJIT_NO_X86}" CACHE BOOL "Disable X86/X64 backend") -set(ASMJIT_NO_AARCH32 "${ASMJIT_NO_AARCH32}" CACHE BOOL "Disable AArch32 backend (ARM and THUMB)") set(ASMJIT_NO_AARCH64 "${ASMJIT_NO_AARCH64}" CACHE BOOL "Disable AArch64 backend") set(ASMJIT_NO_FOREIGN "${ASMJIT_NO_FOREIGN}" CACHE BOOL "Disable all foreign architectures (enables only a native architecture)") set(ASMJIT_NO_NATVIS "${ASMJIT_NO_NATVIS}" CACHE BOOL "Disable natvis support (embedding asmjit.natvis in PDB)") @@ -274,7 +269,6 @@ endif() foreach(build_option ASMJIT_STATIC # AsmJit backends selection. ASMJIT_NO_X86 - ASMJIT_NO_AARCH32 ASMJIT_NO_AARCH64 ASMJIT_NO_FOREIGN # AsmJit features selection. @@ -396,11 +390,13 @@ set(ASMJIT_SRC_LIST asmjit/core/zonevector.cpp asmjit/core/zonevector.h + asmjit/a64.h asmjit/arm.h asmjit/arm/armformatter.cpp asmjit/arm/armformatter_p.h asmjit/arm/armglobals.h asmjit/arm/armoperand.h + asmjit/arm/armutils.h asmjit/arm/a64archtraits_p.h asmjit/arm/a64assembler.cpp asmjit/arm/a64assembler.h @@ -424,7 +420,6 @@ set(ASMJIT_SRC_LIST asmjit/arm/a64operand.h asmjit/arm/a64rapass.cpp asmjit/arm/a64rapass_p.h - asmjit/arm/a64utils.h asmjit/x86.h asmjit/x86/x86archtraits_p.h diff --git a/README.md b/README.md index c683989..7bf0893 100644 --- a/README.md +++ b/README.md @@ -45,8 +45,6 @@ Project Organization TODO ---- - * [ ] Core: - * [ ] Add support for user external buffers in CodeBuffer / CodeHolder. * [ ] Ports: * [ ] 32-bit ARM/Thumb port. * [ ] 64-bit ARM (AArch64) port. diff --git a/db/README.md b/db/README.md new file mode 100644 index 0000000..36444fb --- /dev/null +++ b/db/README.md @@ -0,0 +1,15 @@ +AsmJit Instruction Database +--------------------------- + +This is a database of instructions that is used by AsmJit to generate its internal database and also assembler implementations. This project started initially as AsmDB, but was merged to AsmJit later to make the maintenance easier. The database was created in a way so that each instruction definition would only need a single line in JSON data. The data is then processed by architecture specific data readers that make the data canonical and ready for processing. + +AsmJit database provides the following ISAs: + + * `isa_x86.json` - provides X86 instruction data (both 32-bit and 64-bit) + * `isa_arm.json` - provides AArch32 instruction data (both ARM32 and THUMB) + * `isa_a64.json` - provides AArch64 instruction data + +To Be Documented +---------------- + +This project will be refactored and documented in the future. diff --git a/db/aarch64.js b/db/aarch64.js new file mode 100644 index 0000000..ddea8d9 --- /dev/null +++ b/db/aarch64.js @@ -0,0 +1,921 @@ +// This file is part of AsmJit project +// +// See asmjit.h or LICENSE.md for license and copyright information +// SPDX-License-Identifier: Zlib + + +(function($scope, $as) { +"use strict"; + +function FAIL(msg) { throw new Error("[AArch64] " + msg); } + +// Import +// ====== + +const base = $scope.base ? $scope.base : require("./base.js"); +const exp = $scope.exp ? $scope.exp : require("./exp.js") + +const hasOwn = Object.prototype.hasOwnProperty; +const dict = base.dict; +const NONE = base.NONE; +const Parsing = base.Parsing; +const MapUtils = base.MapUtils; + +// Export +// ====== + +const arm = $scope[$as] = dict(); + +// Database +// ======== + +arm.dbName = "isa_aarch64.json"; + +// asmdb.aarch64.Utils +// =================== + +// Can be used to assign the number of bits each part of the opcode occupies. +// NOTE: THUMB instructions that use halfword must always specify the width +// of all registers as many instructictions accept only LO (r0..r7) registers. +const FieldInfo = { + "P" : { "bits": 1 }, + "U" : { "bits": 1 }, + "W" : { "bits": 1 }, + "S" : { "bits": 1 }, + "R" : { "bits": 1 }, + "H" : { "bits": 1 }, + "F" : { "bits": 1 }, + "post" : { "bits": 1 }, + "!post" : { "bits": 1 }, + "op" : { "bits": 1 }, // TODO: This should be fixed. + "s" : { "bits": 1 }, + "sz" : { "bits": 2 }, + "msz" : { "bits": 2 }, + "sop" : { "bits": 2 }, + "cond" : { "bits": 4 }, + "nzcv" : { "bits": 4 }, + "cmode" : { "bits": 4 }, + "CRn" : { "bits": 4 }, + "CRm" : { "bits": 4 }, + + "Rx" : { "bits": 5, "read": true , "write": true }, + "Rx2" : { "bits": 5, "read": true , "write": true }, + "Rdn" : { "bits": 5, "read": true , "write": true }, + "Rd" : { "bits": 5, "read": false, "write": true }, + "Rd2" : { "bits": 5, "read": false, "write": true }, + "Rs" : { "bits": 5, "read": true , "write": false }, + "Rs2" : { "bits": 5, "read": true , "write": false }, + "Rn" : { "bits": 5, "read": true , "write": false }, + "Rm" : { "bits": 5, "read": true , "write": false }, + "Ra" : { "bits": 5, "read": true , "write": false }, + "Rt" : { "bits": 5, "read": true , "write": false }, + "Rt2" : { "bits": 5, "read": true , "write": false }, + + "Wx" : { "bits": 5, "read": true , "write": true }, + "Wx2" : { "bits": 5, "read": true , "write": true }, + "Wdn" : { "bits": 5, "read": true , "write": true }, + "Wd" : { "bits": 5, "read": false, "write": true }, + "Wd2" : { "bits": 5, "read": false, "write": true }, + "Ws" : { "bits": 5, "read": true , "write": false }, + "Ws2" : { "bits": 5, "read": true , "write": false }, + "Wn" : { "bits": 5, "read": true , "write": false }, + "Wm" : { "bits": 5, "read": true , "write": false }, + "Wa" : { "bits": 5, "read": true , "write": false }, + "Wt" : { "bits": 5, "read": true , "write": false }, + "Wt2" : { "bits": 5, "read": true , "write": false }, + + "Xx" : { "bits": 5, "read": true , "write": true }, + "Xx2" : { "bits": 5, "read": true , "write": true }, + "Xdn" : { "bits": 5, "read": true , "write": true }, + "Xd" : { "bits": 5, "read": false, "write": true }, + "Xd2" : { "bits": 5, "read": false, "write": true }, + "Xs" : { "bits": 5, "read": true , "write": false }, + "Xs2" : { "bits": 5, "read": true , "write": false }, + "Xn" : { "bits": 5, "read": true , "write": false }, + "Xm" : { "bits": 5, "read": true , "write": false }, + "Xa" : { "bits": 5, "read": true , "write": false }, + "Xt" : { "bits": 5, "read": true , "write": false }, + "Xt2" : { "bits": 5, "read": true , "write": false }, + + "Bx" : { "bits": 5, "read": true , "write": true }, + "Bx2" : { "bits": 5, "read": true , "write": true }, + "Bdn" : { "bits": 5, "read": true , "write": true }, + "Bd" : { "bits": 5, "read": false, "write": true }, + "Bd2" : { "bits": 5, "read": false, "write": true }, + "Bs" : { "bits": 5, "read": true , "write": false }, + "Bs2" : { "bits": 5, "read": true , "write": false }, + "Bn" : { "bits": 5, "read": true , "write": false }, + "Bm" : { "bits": 5, "read": true , "write": false }, + "Ba" : { "bits": 5, "read": true , "write": false }, + + "Hx" : { "bits": 5, "read": true , "write": true }, + "Hx2" : { "bits": 5, "read": true , "write": true }, + "Hdn" : { "bits": 5, "read": true , "write": true }, + "Hd" : { "bits": 5, "read": false, "write": true }, + "Hd2" : { "bits": 5, "read": false, "write": true }, + "Hs" : { "bits": 5, "read": true , "write": false }, + "Hs2" : { "bits": 5, "read": true , "write": false }, + "Hn" : { "bits": 5, "read": true , "write": false }, + "Hm" : { "bits": 5, "read": true , "write": false }, + "Ha" : { "bits": 5, "read": true , "write": false }, + + "Sx" : { "bits": 5, "read": true , "write": true }, + "Sx2" : { "bits": 5, "read": true , "write": true }, + "Sdn" : { "bits": 5, "read": true , "write": true }, + "Sd" : { "bits": 5, "read": false, "write": true }, + "Sd2" : { "bits": 5, "read": false, "write": true }, + "Ss" : { "bits": 5, "read": true , "write": false }, + "Ss2" : { "bits": 5, "read": true , "write": false }, + "Sn" : { "bits": 5, "read": true , "write": false }, + "Sm" : { "bits": 5, "read": true , "write": false }, + "Sa" : { "bits": 5, "read": true , "write": false }, + + "Dx" : { "bits": 5, "read": true , "write": true }, + "Dx2" : { "bits": 5, "read": true , "write": true }, + "Ddn" : { "bits": 5, "read": true , "write": true }, + "Dd" : { "bits": 5, "read": false, "write": true }, + "Dd2" : { "bits": 5, "read": false, "write": true }, + "Ds" : { "bits": 5, "read": true , "write": false }, + "Ds2" : { "bits": 5, "read": true , "write": false }, + "Dn" : { "bits": 5, "read": true , "write": false }, + "Dn2" : { "bits": 5, "read": true , "write": false }, + "Dm" : { "bits": 5, "read": true , "write": false }, + "Da" : { "bits": 5, "read": true , "write": false }, + + "Qx" : { "bits": 5, "read": true , "write": true }, + "Qx2" : { "bits": 5, "read": true , "write": true }, + "Qdn" : { "bits": 5, "read": true , "write": true }, + "Qd" : { "bits": 5, "read": false, "write": true }, + "Qd2" : { "bits": 5, "read": false, "write": true }, + "Qs" : { "bits": 5, "read": true , "write": false }, + "Qs2" : { "bits": 5, "read": true , "write": false }, + "Qn" : { "bits": 5, "read": true , "write": false }, + "Qn2" : { "bits": 5, "read": true , "write": false }, + "Qm" : { "bits": 5, "read": true , "write": false }, + "Qa" : { "bits": 5, "read": true , "write": false }, + + "Vx" : { "bits": 5, "read": true , "write": true }, + "Vx2" : { "bits": 5, "read": true , "write": true }, + "Vdn" : { "bits": 5, "read": true , "write": true }, + "Vd" : { "bits": 5, "read": false, "write": true }, + "Vd2" : { "bits": 5, "read": false, "write": true }, + "Vs" : { "bits": 5, "read": true , "write": false }, + "Vs2" : { "bits": 5, "read": true , "write": false }, + "Vn" : { "bits": 5, "read": true , "write": false }, + "Vm" : { "bits": 5, "read": true , "write": false }, + "Va" : { "bits": 5, "read": true , "write": false }, + + "Zx" : { "bits": 5, "read": true , "write": true }, + "Zx2" : { "bits": 5, "read": true , "write": true }, + "Zda" : { "bits": 5, "read": true , "write": true }, + "Zdn" : { "bits": 5, "read": true , "write": true }, + "Zdn2" : { "bits": 5, "read": true , "write": true }, + "Zd" : { "bits": 5, "read": false, "write": true }, + "Zd2" : { "bits": 5, "read": false, "write": true }, + "Zs" : { "bits": 5, "read": true , "write": false }, + "Zs2" : { "bits": 5, "read": true , "write": false }, + "Zn" : { "bits": 5, "read": true , "write": false }, + "Zm" : { "bits": 5, "read": true , "write": false }, + "Zk" : { "bits": 5, "read": true , "write": false }, + "Za" : { "bits": 5, "read": true , "write": false }, + + "Pdn" : { "bits": 4, "read": true , "write": true }, + "Pdm" : { "bits": 4, "read": true , "write": true }, + "Pd" : { "bits": 4, "read": false, "write": true }, + "Ps" : { "bits": 4, "read": true , "write": false }, + "Pn" : { "bits": 4, "read": true , "write": false }, + "Pm" : { "bits": 4, "read": true , "write": false }, + "Pg" : { "bits": 4, "read": true , "write": false } +}; + +arm.FieldInfo = FieldInfo; + +// AArch64 utilities. +class Utils { + static splitInstructionSignature(s) { + const names = s.match(/^[\w\|]+/)[0]; + s = s.substring(names.length); + + const opOffset = s.indexOf(" ") + const suffix = s.substring(0, opOffset).trim(); + const operands = opOffset === -1 ? "" : s.substring(opOffset + 1).trim(); + + return { + names: names.split("|").map((base)=>{ return base + suffix}), + operands: operands + } + } + + static parseShiftOrExtendOp(s) { + const space = s.indexOf(" "); + if (space === -1) + return ""; + + const ops = s.substring(0, space).trim(); + for (let op of ops.split("|")) + if (!/^(sop|extend|lsl|lsr|asr|uxtw|sxtw|sxtx|mul)$/.test(op)) + return ""; + + return ops; + } +} +arm.Utils = Utils; + +function normalizeNumber(n) { + return n < 0 ? 0x100000000 + n : n; +} + +function decomposeOperand(s) { + let type = null; + let element = null; + let consecutive = 0; + let maskType = ""; + + const elementM = s.match(/\[#(\w+)\]$/); + if (elementM) { + element = elementM[1]; + s = s.substring(0, s.length - elementM[0].length); + } + + const typeM = s.match(/\.(\w+)$/); + if (typeM) { + type = typeM[1]; + s = s.substring(0, s.length - typeM[0].length); + } + + const maskM = s.match(/\/(M|Z|MZ)$/); + if (maskM) { + maskType = maskM[1]; + s = s.substring(0, s.length - maskM[0].length); + } + + if (s.endsWith("++")) { + consecutive = 2; + s = s.substring(0, s.length - 2); + } + else if (s.endsWith("+")) { + consecutive = 1; + s = s.substring(0, s.length - 1); + } + + let m = s.match(/==|\!=|>=|<=|\*/); + let restrict = false; + + if (m) { + restrict = s.substring(m.index); + s = s.substring(0, m.index); + } + + return { + data : s, + maskType : maskType, + type : type, + element : element, + restrict : restrict, + consecutive: consecutive + }; +} + +function splitOpcodeFields(s) { + const arr = s.split("|"); + const out = []; + + for (let i = 0; i < arr.length; i++) { + const val = arr[i]; + if (/^[0-1A-Z]{2,}$/.test(val)) + out.push.apply(out, val.match(/([0-1]+)|[A-Z]/g)); + else + out.push(val); + } + + return out.map((field)=>{return field.trim(); }); +} + +// asmdb.aarch64.Operand +// ===================== + +// ARM operand. +class Operand extends base.Operand { + constructor(def) { + super(def); + + // Register. + this.sp = ""; // GP register stack access: ["", "WSP" or "SP"]. + this.mask = ""; // Masking specifier. + } + + hasMemModes() { + return Object.keys(this.memModes).length !== 0; + } + + get name() { + switch (this.type) { + case "reg": return this.reg; + case "mem": return this.mem; + case "imm": return this.imm; + case "rel": return this.rel; + default : return ""; + } + } + + get scale() { + if (this.restrict && this.restrict.startsWith("*")) + return parseInt(this.restrict.substring(1), 10); + else + return 0; + } +} +arm.Operand = Operand; + +// asmdb.aarch64.Instruction +// ========================= + +function patternFromOperand(key) { return key; } + +// ARM instruction. +class Instruction extends base.Instruction { + constructor(db, data) { + super(db, data); + + this.name = data.name; + this.it = dict(); // THUMB's 'it' flags. + this.apsr = dict(); + this.fpcsr = dict(); + this.calc = dict(); // Calculations required to generate opcode. + this.immCond = []; // Immediate value conditions (array of conditions). + + this._assignOperands(data.operands); + this._assignOpcode(data.op); + + for (let k in data) { + if (k === "name" || k == "op" || k === "operands") + continue; + this._assignAttribute(k, data[k]); + } + + this._updateOperandsInfo(); + this._postProcess(); + } + + _assignAttribute(key, value) { + switch (key) { + case "it": + for (let it of value.split(" ")) + this.it[it.trim()] = true; + break; + + case "apsr": + case "fpcsr": + this._assignAttributeKeyValue(key, value); + break; + + case "imm": + this.imm = exp.parse(value); + break; + + case "calc": + for (let calcKey in value) + this.calc[calcKey] = exp.parse(value[calcKey]); + break; + + default: + super._assignAttribute(key, value); + } + } + + _assignAttributeKeyValue(name, content) { + const attributes = content.trim().split(/[ ]+/); + + for (let i = 0; i < attributes.length; i++) { + const attr = attributes[i].trim(); + if (!attr) + continue; + + const eq = attr.indexOf("="); + let key = eq === -1 ? attr : attr.substring(0, eq); + let val = eq === -1 ? true : attr.substring(eq + 1); + + // If the key contains "|" it's a definition of multiple attributes. + if (key.indexOf("|") !== -1) { + const dot = key.indexOf("."); + + const base = dot === -1 ? "" : key.substring(0, dot + 1); + const keys = (dot === -1 ? key : key.substring(dot + 1)).split("|"); + + for (let j = 0; j < keys.length; j++) + this[name][base + keys[j]] = val; + } + else { + this[name][key] = val; + } + } + } + + _assignOperands(s) { + if (!s) return; + + // Split into individual operands and push them to `operands`. + const arr = base.Parsing.splitOperands(s); + for (let i = 0; i < arr.length; i++) { + let def = arr[i].trim(); + const op = new Operand(def); + + const sp = def.match(/^(\w+)\|(SP|WSP)$/); + if (sp) { + def = sp[1]; + op.sp = sp[2]; + } + + const consecutive = def.match(/(\d+)x\{(.*)\}([+]?[+]?)/); + if (consecutive) + def = consecutive[2]; + + op.sign = false; + op.element = null; + op.shiftOp = ""; + op.shiftImm = null; + op.shiftCond = ""; + + // Handle {optional} attribute. + if (Parsing.isOptional(def)) { + op.optional = true; + def = Parsing.clearOptional(def); + } + + // Handle commutativity <-> symbol. + if (Parsing.isCommutative(def)) { + op.commutative = true; + def = Parsing.clearCommutative(def); + } + + // Handle shift operation. + let shiftOp = Utils.parseShiftOrExtendOp(def); + if (shiftOp) { + op.shiftOp = shiftOp; + def = def.substring(shiftOp.length + 1); + } + + if (def.startsWith("[")) { + op.type = "mem"; + op.memModes = dict(); + + op.base = null; + op.index = null; + op.offset = null; + + let mem = def; + let didHaveMemMode = false; + + for (;;) { + if (mem.endsWith("!")) { + op.memModes.preIndex = true; + mem = mem.substring(0, mem.length - 1); + + didHaveMemMode = true; + break; + } + + if (mem.endsWith("@")) { + op.memModes.postIndex = true; + mem = mem.substring(0, mem.length - 1); + + didHaveMemMode = true; + break; + } + + if (mem.endsWith("{!}")) { + op.memModes.offset = true; + op.memModes.preIndex = true; + mem = mem.substring(0, mem.length - 3); + + didHaveMemMode = true; + continue; + } + + if (mem.endsWith("{@}")) { + op.memModes.offset = true; + op.memModes.postIndex = true; + mem = mem.substring(0, mem.length - 3); + + didHaveMemMode = true; + continue; + } + + break; + } + + if (!mem.endsWith("]")) + FAIL(`Unknown memory operand '${mem}' in '${def}'`); + + let parts = mem.substring(1, mem.length - 1).split(",").map(function(s) { return s.trim() }); + for (let i = 0; i < parts.length; i++) { + const part = parts[i]; + + const m = part.match(/^\{(([a-z]+)(\|[a-z]+)*)\s+#(\w+)\s*(\*\s*\d+\s*)?\}$/); + if (m) { + op.shiftOp = m[1]; + op.shiftImm = m[2]; + if (m[3]) + op.shiftCond = m[3] + continue; + } + + if (i === 0) { + op.base = dict(); + op.base.field = part; + op.base.exp = null; + + const m = part.match(/^([A-Za-z]\w*(?:\.\w+)?)/); + if (m && m[1].length < part.length) { + op.base.exp = exp.parse(part); + op.base.field = m[1]; + } + } + else if (part.startsWith("#")) { + let p = part.substring(1); + let u = "1"; + + let offExp = null; + let offMul = 1; + + if (p.startsWith("+/-")) { + u = "U"; + p = p.substring(3); + } + + const expMatch = p.match(/^([A-Za-z]\w*)==/); + if (expMatch) { + offExp = exp.parse(p); + p = p.substring(0, expMatch[1].length); + } + + const mulMatch = p.match(/\s*\*\s*(\d+)$/); + if (mulMatch) { + offMul = parseInt(mulMatch[1]); + p = p.substring(0, mulMatch.index); + } + + op.offset = dict(); + op.offset.field = p; + op.offset.u = u; + op.offset.exp = offExp; + op.offset.mul = offMul; + } + else { + let p = part; + let u = "1"; + + if (p.startsWith("+/-")) { + u = "U"; + p = p.substring(3); + } + + op.index = dict(); + op.index.field = p; + op.index.u = u; + + const m = p.match(/^([A-Za-z\|]\w*(?:\.\w+)?)/); + if (m && m[1].length < p.length) { + op.index.exp = exp.parse(p); + op.index.field = m[1]; + } + } + } + + if (!op.hasMemModes() && (op.offset || op.index)) + op.memModes.offset = true; + + op.mem = mem; + } + else if (def.startsWith("#")) { + const obj = decomposeOperand(def); + const imm = obj.data; + + op.type = "imm"; + op.imm = imm.substring(1); // Immediate operand name. + op.immSize = 0; // Immediate size in bits. + op.restrict = obj.restrict; // Immediate condition. + } + else { + // Some instructions use Reg! to specify that the register increments. + if (def.endsWith("!")) { + def = def.substring(0, def.length - 1) + op.regInc = true + } + + const obj = decomposeOperand(def); + const reg = obj.data; + + const type = reg.substring(0, 1).toLowerCase(); + const info = FieldInfo[reg]; + + if (!info) + FAIL(`Unknown register operand '${reg}' in '${def}'`); + + op.type = info.list ? "reg-list" : "reg"; + op.reg = reg; // Register name (as specified in manual). + op.regType = type; // Register type. + op.regList = !!info.list; // Register list. + op.maskType = obj.maskType; // Mask type. + op.elementType = obj.type // Element type or t, ta, tb. + op.read = info.read; // Register access (read). + op.write = info.write; // Register access (write). + op.element = obj.element; // Register element[] access. + op.restrict = obj.restrict; // Register condition. + op.consecutive = obj.consecutive; + } + + this.operands.push(op); + + if (consecutive) { + const count = parseInt(consecutive[1]); + for (let n = 2; n <= count; n++) { + const def = consecutive[3].replace(op.reg, op.reg + n); + const opN = new Operand(def); + opN.type = "reg"; + opN.reg = op.reg + n; + opN.regType = op.regType; + opN.read = op.read; + opN.write = op.write; + opN.element = op.element; + opN.consecutive = consecutive[3].length; + opN.artificial = true; + this.operands.push(opN); + } + } + } + } + + _assignOpcode(s) { + this.opcodeString = s; + + let opcodeIndex = 0; + let opcodeValue = 0; + + let patternMap = {}; + + // Split opcode into its fields. + const arr = splitOpcodeFields(s); + const dup = dict(); + + const fields = this.fields; + const pattern = []; + + const fieldMap = Object.create(null); + for (let field of arr) { + fieldMap[field] = true; + } + + for (let i = arr.length - 1; i >= 0; i--) { + let key = arr[i].trim(); + let m; + + if (/^[0-1]+$/.test(key)) { + // This part of the opcode is RAW bits, they contribute to the `opcodeValue`. + opcodeValue |= parseInt(key, 2) << opcodeIndex; + opcodeIndex += key.length; + pattern.unshift("_".repeat(key.length)); + } + else { + pattern.unshift(patternFromOperand(key)); + patternMap[patternFromOperand(key)] = true; + + let size = 0; + let mask = 0; + let bits = 0; + let from = -1; + + let lbit = key.startsWith("'"); + let hbit = key.endsWith("'"); + + if ((m = key.match(/\[\s*(\d+)\s*\:\s*(\d+)\s*\]$/))) { + const a = parseInt(m[1], 10); + const b = parseInt(m[2], 10); + if (a < b) + FAIL(`Invalid bit range '${key}' in opcode '${s}'`); + from = b; + size = a - b + 1; + mask = ((1 << size) - 1) << b; + key = key.substring(0, m.index).trim(); + } + else if ((m = key.match(/\[\s*(\d+)\s*\]$/))) { + from = parseInt(m[1], 10); + size = 1; + mask = 1 << from; + key = key.substring(0, m.index).trim(); + } + else if ((m = key.match(/\:\s*(\d+)$/))) { + size = parseInt(m[1], 10); + bits = size; + key = key.substring(0, m.index).trim(); + } + else { + const key_ = key; + + if (lbit || hbit) { + from = 0; + + if (lbit && hbit) + FAIL(`Couldn't recognize the format of '${key}' in opcode '${s}'`); + + if (lbit) { + key = key.substring(1); + } + + if (hbit) { + key = key.substring(0, key.length - 1); + from = 4; + } + + size = 1; + } + else if (FieldInfo[key]) { + // Sizes of some standard fields can be assigned automatically. + size = FieldInfo[key].bits; + bits = size; + + if (fieldMap["'" + key]) + from = 1; + } + else if (key.length === 1) { + // Sizes of one-letter fields (like 'U', 'F', etc...) is 1 if not specified. + size = 1; + bits = 1; + } + else { + FAIL(`Couldn't recognize the size of '${key}' in opcode '${s}'`); + } + + if (dup[key_] === true) { + bits = 0; + lbit = 0; + hbit = 0; + } + else { + dup[key_] = true; + } + } + + let field = fields[key]; + if (!field) { + field = { + index: opcodeIndex, + values: [], + bits: 0, + mask: 0, + lbit: 0, + hbit: 0 // Only 1 if a single quote (') was used. + } + fields[key] = field; + } + + if (from === -1) + from = field.bits; + + field.mask |= mask; + field.bits += bits; + field.lbit += lbit; + field.hbit += hbit; + field.values.push({ + index: opcodeIndex, + from: from, + size: size + }); + + opcodeIndex += size; + } + } + + for (let i = 0; i < pattern.length; i++) + if (pattern[i] === 'U') + pattern[i] = "_"; + + // Normalize all fields. + for (let key in fields) { + const field = fields[key]; + + // There should be either number of bits or mask, there shouldn't be both. + if (!field.bits && !field.mask) + FAIL(`Part '${key}' of opcode '${s}' contains neither size nor mask`); + + if (field.bits && field.mask) + FAIL(`Part '${key}' of opcode '${s}' contains both size and mask`); + + if (field.bits) + field.mask = ((1 << field.bits) - 1); + else if (field.mask) + field.bits = 32 - Math.clz32(field.mask); + + // Handle field that used single-quote. + if (field.lbit) { + field.mask = (field.mask << 1) | 0x1; + field.bits++; + } + + if (field.hbit) { + field.mask |= 1 << field.bits; + field.bits++; + } + + const op = this.operandByName(key); + if (op && op.isImm()) + op.immSize = field.bits; + } + + // Check if the opcode value has the correct number of bits. + if (opcodeIndex !== 32) + FAIL(`The number of bits '${opcodeIndex}' used by the opcode '${s}' doesn't match 32`); + this.opcodeValue = normalizeNumber(opcodeValue); + } + + _assignSpecificAttribute(key, value) { + switch (key) { + case "it": { + const values = String(value).split("|"); + for (let i = 0; i < values.length; i++) { + const value = values[i]; + switch (value) { + case "in" : this.it.IN = true; break; + case "out" : this.it.OUT = true; break; + case "any" : this.it.IN = true; + this.it.OUT = true; break; + case "last": this.it.LAST = true; break; + case "def" : this.it.DEF = true; break; + default: + this.report(`${this.name}: Unhandled IT value '${value}'`); + } + } + return true; + } + } + + return false; + } + + _postProcess() {} + + operandByName(name) { + const operands = this.operands; + for (let i = 0; i < operands.length; i++) { + const op = operands[i]; + if (op.name === name) + return op; + } + return null; + } +} +arm.Instruction = Instruction; + +// asmdb.aarch64.ISA +// ================= + +function mergeGroupData(data, group) { + for (let k in group) { + switch (k) { + case "group": + case "data": + break; + + case "ext": + data[k] = (data[k] ? data[k] + " " : "") + group[k]; + break; + + default: + if (data[k] === undefined) + data[k] = group[k] + break; + } + } +} + +class ISA extends base.ISA { + constructor(data) { + super(data); + this.addData(data || NONE); + } + + _addInstructions(groups) { + for (let group of groups) { + for (let inst of group.data) { + const sgn = Utils.splitInstructionSignature(inst.inst); + const data = MapUtils.cloneExcept(inst, { "inst": true }); + + mergeGroupData(data, group) + + for (let j = 0; j < sgn.names.length; j++) { + data.name = sgn.names[j]; + data.operands = sgn.operands; + if (j > 0) + data.aliasOf = sgn.names[0]; + this._addInstruction(new Instruction(this, data)); + } + } + } + + return this; + } +} +arm.ISA = ISA; + +}).apply(this, typeof module === "object" && module && module.exports + ? [module, "exports"] : [this.asmdb || (this.asmdb = {}), "aarch64"]); diff --git a/db/arm.js b/db/arm.js new file mode 100644 index 0000000..6f66b90 --- /dev/null +++ b/db/arm.js @@ -0,0 +1,941 @@ +// This file is part of AsmJit project +// +// See asmjit.h or LICENSE.md for license and copyright information +// SPDX-License-Identifier: Zlib + + +(function($scope, $as) { +"use strict"; + +function FAIL(msg) { throw new Error("[AArch32] " + msg); } + +// Import +// ====== + +const base = $scope.base ? $scope.base : require("./base.js"); +const exp = $scope.exp ? $scope.exp : require("./exp.js") + +const hasOwn = Object.prototype.hasOwnProperty; +const dict = base.dict; +const NONE = base.NONE; +const Parsing = base.Parsing; +const MapUtils = base.MapUtils; + +// Export +// ====== + +const arm = $scope[$as] = dict(); + +// Database +// ======== + +arm.dbName = "isa_arm.json"; + +// asmdb.arm.Utils +// =============== + +// Can be used to assign the number of bits each part of the opcode occupies. +// NOTE: THUMB instructions that use halfword must always specify the width +// of all registers as many instructictions accept only LO (r0..r7) registers. +const FieldInfo = { + "P" : { "bits": 1 }, + "U" : { "bits": 1 }, + "W" : { "bits": 1 }, + "S" : { "bits": 1 }, + "R" : { "bits": 1 }, + "H" : { "bits": 1 }, + "isFp32": { "bits": 1 }, + "F" : { "bits": 1 }, + "align" : { "bits": 2 }, + "ja" : { "bits": 1 }, + "jb" : { "bits": 1 }, + "op" : { "bits": 1 }, // TODO: This should be fixed. + "sz" : { "bits": 2 }, + "sop" : { "bits": 2 }, + "cond" : { "bits": 4 }, + "cmode" : { "bits": 4 }, + "Cn" : { "bits": 4 }, + "Cm" : { "bits": 4 }, + "Rd" : { "bits": 4, "read": false, "write": true }, + "Rd2" : { "bits": 4, "read": false, "write": true }, + "RdLo" : { "bits": 4, "read": false, "write": true }, + "RdHi" : { "bits": 4, "read": false, "write": true }, + "RdList": { "bits": 4, "read": false, "write": true , "list": true }, + "Rx" : { "bits": 4, "read": true , "write": true }, + "RxLo" : { "bits": 4, "read": true , "write": true }, + "RxHi" : { "bits": 4, "read": true , "write": true }, + "Rn" : { "bits": 4, "read": true , "write": false }, + "Rm" : { "bits": 4, "read": true , "write": false }, + "Ra" : { "bits": 4, "read": true , "write": false }, + "Rs" : { "bits": 4, "read": true , "write": false }, + "Rs2" : { "bits": 4, "read": true , "write": false }, + "RsList": { "bits": 4, "read": true , "write": false , "list": true }, + "Sd" : { "bits": 4, "read": false, "write": true }, + "Sd2" : { "bits": 4, "read": false, "write": true }, + "Sx" : { "bits": 4, "read": true , "write": true }, + "Sn" : { "bits": 4, "read": true , "write": false }, + "Sm" : { "bits": 4, "read": true , "write": false }, + "Ss" : { "bits": 4, "read": true , "write": false }, + "Ss2" : { "bits": 4, "read": true , "write": false }, + "Dd" : { "bits": 4, "read": false, "write": true }, + "Dd2" : { "bits": 4, "read": false, "write": true }, + "Dd3" : { "bits": 4, "read": false, "write": true }, + "Dd4" : { "bits": 4, "read": false, "write": true }, + "Dx" : { "bits": 4, "read": true , "write": true }, + "Dx2" : { "bits": 4, "read": true , "write": true }, + "Dn" : { "bits": 4, "read": true , "write": false }, + "Dn2" : { "bits": 4, "read": true , "write": false }, + "Dn3" : { "bits": 4, "read": true , "write": false }, + "Dn4" : { "bits": 4, "read": true , "write": false }, + "Dm" : { "bits": 4, "read": true , "write": false }, + "Ds" : { "bits": 4, "read": true , "write": false }, + "Ds2" : { "bits": 4, "read": true , "write": false }, + "Ds3" : { "bits": 4, "read": true , "write": false }, + "Ds4" : { "bits": 4, "read": true , "write": false }, + "Vd" : { "bits": 4, "read": false, "write": true }, + "Vd2" : { "bits": 4, "read": false, "write": true }, + "Vd3" : { "bits": 4, "read": false, "write": true }, + "Vd4" : { "bits": 4, "read": false, "write": true }, + "VdList": { "bits": 4, "read": false, "write": true , "list": true }, + "Vx" : { "bits": 4, "read": true , "write": true }, + "Vx2" : { "bits": 4, "read": true , "write": true }, + "Vn" : { "bits": 4, "read": true , "write": false }, + "Vm" : { "bits": 4, "read": true , "write": false }, + "Vs" : { "bits": 4, "read": true , "write": false }, + "Vs2" : { "bits": 4, "read": true , "write": false }, + "VsList": { "bits": 4, "read": true , "write": false , "list": true } +}; + +arm.FieldInfo = FieldInfo; + +// ARM utilities. +class Utils { + static splitInstructionSignature(s) { + const names = s.match(/^[\w\|]+/)[0]; + s = s.substring(names.length); + + const opOffset = s.indexOf(" ") + const suffix = s.substring(0, opOffset).trim(); + const operands = opOffset === -1 ? "" : s.substring(opOffset + 1).trim(); + + return { + names: names.split("|").map((base)=>{ return base + suffix}), + operands: operands + } + } + + static parseShiftOp(s) { + const m = s.match(/^(sop|lsl_or_asr|lsl|lsr|asr|ror|rrx) /); + return m ? m[1] : ""; + } + + static parseDtArray(s) { + const out = []; + if (!s) return out; + + const arr = s.split("|"); + let i; + + // First expand anything between X-Y, for example s8-32 would be expanded to [s8, s16, s32]. + for (i = 0; i < arr.length; i++) { + const v = arr[i]; + + if (v.indexOf("-") !== -1) { + const m = /^([A-Za-z]+)?(\d+)-(\d+)$/.exec(v); + if (!m) + FAIL(`Couldn't parse '${s}' data-type`); + + let type = m[1] || ""; + let size = parseInt(m[2], 10); + let last = parseInt(m[3], 10); + + if (!Utils.checkDtSize(size) || !Utils.checkDtSize(last)) + FAIL(`Invalid dt width in '${s}'`); + + do { + out.push(type + String(size)); + size <<= 1; + } while (size <= last); + } + else { + out.push(v); + } + } + + // Now expand 'x' to 's' and 'u'. + i = 0; + while (i < out.length) { + const v = out[i]; + if (v.startsWith("x")) { + out.splice(i, 1, "s" + v.substr(1), "u" + v.substr(1)); + i += 2; + } + else { + i++; + } + } + + return out; + } + + static checkDtSize(x) { + return x === 8 || x === 16 || x === 32 || x === 64; + } +} +arm.Utils = Utils; + +function normalizeNumber(n) { + return n < 0 ? 0x100000000 + n : n; +} + +function decomposeOperand(s) { + const elementSuffix = "[#i]"; + let element = null; + let consecutive = 0; + + if (s.endsWith(elementSuffix)) { + element = "#i"; + s = s.substr(0, s.length - elementSuffix.length); + } + + if (s.endsWith("++")) { + consecutive = 2; + s = s.substr(0, s.length - 2); + } + else if (s.endsWith("+")) { + consecutive = 1; + s = s.substr(0, s.length - 1); + } + + let m = s.match(/==|\!=|>=|<=|\*/); + let restrict = false; + + if (m) { + restrict = s.substr(m.index); + s = s.substr(0, m.index); + } + + return { + data : s, + element : element, + restrict: restrict, + consecutive: consecutive + }; +} + +function splitOpcodeFields(s) { + const arr = s.split("|"); + const out = []; + + for (let i = 0; i < arr.length; i++) { + const val = arr[i]; + if (/^[0-1A-Z]{2,}$/.test(val)) + out.push.apply(out, val.match(/([0-1]+)|[A-Z]/g)); + else + out.push(val); + } + + return out.map((field) => { return field.trim(); }); +} + +// asmdb.arm.Operand +// ================= + +// ARM operand. +class Operand extends base.Operand { + constructor(def) { + super(def); + } + + hasMemModes() { + return Object.keys(this.memModes).length !== 0; + } + + get name() { + switch (this.type) { + case "reg": return this.reg; + case "mem": return this.mem; + case "imm": return this.imm; + case "rel": return this.rel; + default : return ""; + } + } + + get scale() { + if (this.restrict && this.restrict.startsWith("*")) + return parseInt(this.restrict.substr(1), 10); + else + return 0; + } +} +arm.Operand = Operand; + +// asmdb.arm.Instruction +// ===================== + +function patternFromOperand(key) { + return key; + // return key.replace(/\b(?:[RVDS](?:d|s|n|m|x|x2))\b/, "R"); +} + +// ARM instruction. +class Instruction extends base.Instruction { + constructor(db, data) { + super(db, data); + // name, operands, encoding, opcode, metadata + + const encoding = hasOwn.call(data, "a32") ? "a32" : + hasOwn.call(data, "t32") ? "t32" : + hasOwn.call(data, "t16") ? "t16" : ""; + + this.name = data.name; + this.it = dict(); // THUMB's 'it' flags. + this.apsr = dict(); + this.fpcsr = dict(); + this.calc = dict(); // Calculations required to generate opcode. + this.immCond = []; // Immediate value conditions (array of conditions). + + this.s = null; // Instruction S flag (null, true, or false). + this.dt = []; // Instruction
field (first data-type). + this.dt2 = []; // Instruction field (second data-type). + + this.availableFrom = ""; // Instruction supported by from ARMv???. + this.availableUntil = ""; // Instruction supported by until ARMv???. + + this._assignOperands(data.operands); + this._assignEncoding(encoding.toUpperCase()); + this._assignOpcode(data[encoding]); + + for (let k in data) { + if (k === "name" || k == encoding || k === "operands") + continue; + this._assignAttribute(k, data[k]); + } + + this._updateOperandsInfo(); + this._postProcess(); + } + + _assignAttribute(key, value) { + switch (key) { + case "it": + for (let it of value.split(" ")) + this.it[it.trim()] = true; + break; + + case "apsr": + case "fpcsr": + this._assignAttributeKeyValue(key, value); + break; + + case "imm": + this.imm = exp.parse(value); + break; + + case "calc": + for (let calcKey in value) + this.calc[calcKey] = exp.parse(value[calcKey]); + break; + + default: + super._assignAttribute(key, value); + } + } + + _assignAttributeKeyValue(name, content) { + const attributes = content.trim().split(/[ ]+/); + + for (let i = 0; i < attributes.length; i++) { + const attr = attributes[i].trim(); + if (!attr) + continue; + + const eq = attr.indexOf("="); + let key = eq === -1 ? attr : attr.substr(0, eq); + let val = eq === -1 ? true : attr.substr(eq + 1); + + // If the key contains "|" it's a definition of multiple attributes. + if (key.indexOf("|") !== -1) { + const dot = key.indexOf("."); + + const base = dot === -1 ? "" : key.substr(0, dot + 1); + const keys = (dot === -1 ? key : key.substr(dot + 1)).split("|"); + + for (let j = 0; j < keys.length; j++) + this[name][base + keys[j]] = val; + } + else { + this[name][key] = val; + } + } + } + + _assignEncoding(s) { + this.arch = s === "T16" || s === "T32" ? "THUMB" : "ARM"; + this.encoding = s; + } + + _assignOperands(s) { + if (!s) return; + + // Split into individual operands and push them to `operands`. + const arr = base.Parsing.splitOperands(s); + for (let i = 0; i < arr.length; i++) { + let def = arr[i]; + const op = new Operand(def); + + const consecutive = def.match(/(\d+)x\{(.*)\}([+][+]?)/); + if (consecutive) + def = consecutive[2]; + + op.sign = false; + op.element = null; + op.shiftOp = ""; + op.shiftImm = null; + + // Handle {optional} attribute. + if (Parsing.isOptional(def)) { + op.optional = true; + def = Parsing.clearOptional(def); + } + + // Handle commutativity <-> symbol. + if (Parsing.isCommutative(def)) { + op.commutative = true; + def = Parsing.clearCommutative(def); + } + + // Handle shift operation. + let shiftOp = Utils.parseShiftOp(def); + if (shiftOp) { + op.shiftOp = shiftOp; + def = def.substring(shiftOp.length + 1); + } + + if (def.startsWith("[")) { + op.type = "mem"; + op.memModes = dict(); + + op.base = null; + op.index = null; + op.offset = null; + + let mem = def; + let didHaveMemMode = false; + + for (;;) { + if (mem.endsWith("!")) { + op.memModes.preIndex = true; + mem = mem.substring(0, mem.length - 1); + + didHaveMemMode = true; + break; + } + + if (mem.endsWith("@")) { + op.memModes.postIndex = true; + mem = mem.substring(0, mem.length - 1); + + didHaveMemMode = true; + break; + } + + if (mem.endsWith("{!}")) { + op.memModes.offset = true; + op.memModes.preIndex = true; + mem = mem.substring(0, mem.length - 3); + + didHaveMemMode = true; + continue; + } + + if (mem.endsWith("{@}")) { + op.memModes.offset = true; + op.memModes.postIndex = true; + mem = mem.substring(0, mem.length - 3); + + didHaveMemMode = true; + continue; + } + + break; + } + + if (!mem.endsWith("]")) + FAIL(`Unknown memory operand '${mem}' in '${def}'`); + + let parts = mem.substring(1, mem.length - 1).split(",").map(function(s) { return s.trim() }); + for (let i = 0; i < parts.length; i++) { + const part = parts[i]; + + const m = part.match(/^\{(lsl|sop)\s+#(\w+)\}$/); + if (m) { + op.shiftOp = m[1]; + op.shiftImm = m[2]; + continue; + } + + if (i === 0) { + op.base = dict(); + op.base.field = part; + op.base.exp = null; + + const m = part.match(/^([A-Za-z]\w*)/); + if (m.length < part.length) { + op.base.exp = exp.parse(part); + op.base.field = m[1]; + } + } + else if (part.startsWith("#")) { + let p = part.substring(1); + let u = "1"; + + let offExp = null; + let offMul = 1; + + if (p.startsWith("+/-")) { + u = "U"; + p = p.substring(3); + } + + const expMatch = p.match(/^([A-Za-z]\w*)==/); + if (expMatch) { + offExp = exp.parse(p); + p = p.substr(0, expMatch[1].length); + } + + const mulMatch = p.match(/\s*\*\s*(\d+)$/); + if (mulMatch) { + offMul = parseInt(mulMatch[1]); + p = p.substr(0, mulMatch.index); + } + + op.offset = dict(); + op.offset.field = p; + op.offset.u = u; + op.offset.exp = offExp; + op.offset.mul = offMul; + } + else { + let p = part; + let u = "1"; + + if (p.startsWith("+/-")) { + u = "U"; + p = p.substring(3); + } + + op.index = dict(); + op.index.field = p; + op.index.u = u; + + const m = p.match(/^([A-Za-z]\w*)/); + if (m.length < p.length) { + op.index.exp = exp.parse(p); + op.index.field = m[1]; + } + } + } + + if (!op.hasMemModes() && (op.offset || op.index)) + op.memModes.offset = true; + + op.mem = mem; + } + else if (def.startsWith("#")) { + const obj = decomposeOperand(def); + const imm = obj.data; + + op.type = "imm"; + op.imm = imm.substring(1); // Immediate operand name. + op.immSize = 0; // Immediate size in bits. + op.restrict = obj.restrict; // Immediate condition. + } + else { + const obj = decomposeOperand(def); + const reg = obj.data; + + const type = reg.substr(0, 1).toLowerCase(); + const info = FieldInfo[reg]; + + if (!info) + FAIL(`Unknown register operand '${reg}' in '${def}'`); + + op.type = info.list ? "reg-list" : "reg"; + op.reg = reg; // Register name (as specified in manual). + op.regType = type; // Register type. + op.regList = !!info.list; // Register list. + op.read = info.read; // Register access (read). + op.write = info.write; // Register access (write). + op.element = obj.element; // Register element[] access. + op.restrict = obj.restrict; // Register condition. + op.consecutive = obj.consecutive; + } + + this.operands.push(op); + + if (consecutive) { + const count = parseInt(consecutive[1]); + for (let n = 2; n <= count; n++) { + const def = consecutive[3].replace(op.reg, op.reg + n); + const opN = new Operand(def); + opN.type = "reg"; + opN.reg = op.reg + n; + opN.regType = op.regType; + opN.read = op.read; + opN.write = op.write; + opN.element = op.element; + opN.consecutive = consecutive[3].length; + this.operands.push(opN); + } + } + } + } + + _assignOpcode(s) { + this.opcodeString = s; + + let opcodeIndex = 0; + let opcodeValue = 0; + + let patternMap = {}; + + // Split opcode into its fields. + const arr = splitOpcodeFields(s); + const dup = dict(); + + const fields = this.fields; + const pattern = []; + + const fieldMap = Object.create(null); + for (let field of arr) { + fieldMap[field] = true; + } + + for (let i = arr.length - 1; i >= 0; i--) { + let key = arr[i]; + let m; + + if (/^[0-1]+$/.test(key)) { + // This part of the opcode is RAW bits, they contribute to the `opcodeValue`. + opcodeValue |= parseInt(key, 2) << opcodeIndex; + opcodeIndex += key.length; + pattern.unshift("_".repeat(key.length)); + } + else { + pattern.unshift(patternFromOperand(key)); + patternMap[patternFromOperand(key)] = true; + + let size = 0; + let mask = 0; + let bits = 0; + let from = -1; + + let lbit = key.startsWith("'"); + let hbit = key.endsWith("'"); + + if ((m = key.match(/\[\s*(\d+)\s*\:\s*(\d+)\s*\]$/))) { + const a = parseInt(m[1], 10); + const b = parseInt(m[2], 10); + if (a < b) + FAIL(`Invalid bit range '${key}' in opcode '${s}'`); + from = b; + size = a - b + 1; + mask = ((1 << size) - 1) << b; + key = key.substr(0, m.index).trim(); + } + else if ((m = key.match(/\[\s*(\d+)\s*\]$/))) { + from = parseInt(m[1], 10); + size = 1; + mask = 1 << from; + key = key.substr(0, m.index).trim(); + } + else if ((m = key.match(/\:\s*(\d+)$/))) { + size = parseInt(m[1], 10); + bits = size; + key = key.substr(0, m.index).trim(); + } + else { + const key_ = key; + + if (lbit || hbit) { + from = 0; + + if (lbit && hbit) + FAIL(`Couldn't recognize the format of '${key}' in opcode '${s}'`); + + if (lbit) { + key = key.substring(1); + } + + if (hbit) { + key = key.substring(0, key.length - 1); + from = 4; + } + + size = 1; + } + else if (FieldInfo[key]) { + // Sizes of some standard fields can be assigned automatically. + size = FieldInfo[key].bits; + bits = size; + + if (fieldMap["'" + key]) + from = 1; + } + else if (key.length === 1) { + // Sizes of one-letter fields (like 'U', 'F', etc...) is 1 if not specified. + size = 1; + bits = 1; + } + else { + FAIL(`Couldn't recognize the size of '${key}' in opcode '${s}'`); + } + + if (dup[key_] === true) { + bits = 0; + lbit = 0; + hbit = 0; + } + else { + dup[key_] = true; + } + } + + let field = fields[key]; + if (!field) { + field = { + index: opcodeIndex, + values: [], + bits: 0, + mask: 0, + lbit: 0, + hbit: 0 // Only 1 if a single quote (') was used. + } + fields[key] = field; + } + + if (from === -1) + from = field.bits; + + field.mask |= mask; + field.bits += bits; + field.lbit += lbit; + field.hbit += hbit; + field.values.push({ + index: opcodeIndex, + from: from, + size: size + }); + + opcodeIndex += size; + } + } + + for (let i = 0; i < pattern.length; i++) + if (pattern[i] === 'U') + pattern[i] = "_"; + + // Normalize all fields. + for (let key in fields) { + const field = fields[key]; + + // There should be either number of bits or mask, there shouldn't be both. + if (!field.bits && !field.mask) + FAIL(`Part '${key}' of opcode '${s}' contains neither size nor mask`); + + if (field.bits && field.mask) + FAIL(`Part '${key}' of opcode '${s}' contains both size and mask`); + + if (field.bits) + field.mask = ((1 << field.bits) - 1); + else if (field.mask) + field.bits = 32 - Math.clz32(field.mask); + + // Handle field that used single-quote. + if (field.lbit) { + field.mask = (field.mask << 1) | 0x1; + field.bits++; + } + + if (field.hbit) { + field.mask |= 1 << field.bits; + field.bits++; + } + + const op = this.operandByName(key); + if (op && op.isImm()) + op.immSize = field.bits; + } + + // Check if the opcode value has the correct number of bits (either 16 or 32). + if (opcodeIndex !== 16 && opcodeIndex !== 32) + FAIL(`The number of bits '${opcodeIndex}' used by the opcode '${s}' doesn't match 16 or 32`); + this.opcodeValue = normalizeNumber(opcodeValue); + } + + _assignSpecificAttribute(key, value) { + // Support ARMv?+ and ARMv?- attributes. + if (/^ARM\w+[+-]$/.test(key)) { + const armv = key.substr(0, key.length - 1); + const sign = key.substr(key.length - 1); + + if (sign === "+") + this.availableFrom = armv; + else + this.availableUntil = armv; + return true; + } + + switch (key) { + case "it": { + const values = String(value).split("|"); + for (let i = 0; i < values.length; i++) { + const value = values[i]; + switch (value) { + case "in" : this.it.IN = true; break; + case "out" : this.it.OUT = true; break; + case "any" : this.it.IN = true; + this.it.OUT = true; break; + case "last": this.it.LAST = true; break; + case "def" : this.it.DEF = true; break; + default: + this.report(`${this.name}: Unhandled IT value '${value}'`); + } + } + return true; + } + } + + return false; + } + + // ARM instruction name could consist of name and optional type information + // specified as
and in ARM manuals. We parse this information and + // store it to `dt` and `dt2` fields. In addition, we also recognize the `S` + // suffix (uppercase) of the instruction and mark it as `S` instruction. After + // that the name is normalized to be lowercased. + // + // This functionality requires all the instruction data to be already set-up. + _postProcess() { + let s = this.name; + + // Parse
and fields. + if (s.indexOf(".") !== -1) { + const parts = s.split("."); + this.name = parts[0]; + + if (parts.length > 3) + FAIL(`Couldn't recognize name attributes of '${s}'`); + + for (let i = 1; i < parts.length; i++) { + const dt = Utils.parseDtArray(parts[i]); + if (i === 1) + this.dt = dt; + else + this.dt2 = dt; + } + } + + // Recognize "S" suffix. + if (this.name.endsWith("S")) { + this.name = this.name.substr(0, this.name.length - 1) + "s"; + this.s = true; + } + + this.dt.sort(); + } + + operandByName(name) { + const operands = this.operands; + for (let i = 0; i < operands.length; i++) { + const op = operands[i]; + if (op.name === name) + return op; + } + return null; + } +} +arm.Instruction = Instruction; + +// asmdb.arm.ISA +// ============= + +function mergeGroupData(data, group) { + for (let k in group) { + switch (k) { + case "group": + case "data": + break; + + case "ext": + data[k] = (data[k] ? data[k] + " " : "") + group[k]; + break; + + default: + if (data[k] === undefined) + data[k] = group[k] + break; + } + } +} + +class ISA extends base.ISA { + constructor(data) { + super(data); + this.addData(data || NONE); + } + + _addInstructions(groups) { + for (let group of groups) { + for (let inst of group.data) { + const sgn = Utils.splitInstructionSignature(inst.inst); + const data = MapUtils.cloneExcept(inst, { "inst": true }); + + mergeGroupData(data, group) + + for (let j = 0; j < sgn.names.length; j++) { + data.name = sgn.names[j]; + data.operands = sgn.operands; + if (j > 0) + data.aliasOf = sgn.names[0]; + this._addInstruction(new Instruction(this, data)); + } + } + } + + return this; + } +/* + _addInstructions(instructions) { + for (let i = 0; i < instructions.length; i++) { + const obj = instructions[i]; + const sgn = obj.inst; + const sep = sgn.indexOf(" "); + + const names = (sep !== -1 ? sgn.substring(0, sep) : sgn).trim().split("/"); + const operands = sep !== -1 ? sgn.substring(sep + 1) : ""; + + const encoding = hasOwn.call(obj, "a32") ? "a32" : + hasOwn.call(obj, "t32") ? "t32" : + hasOwn.call(obj, "t16") ? "t16" : ""; + + if (!encoding) + FAIL(`Instrution ${names.join("/")} doesn't encoding, it must provide either a32, t32, or t16 field`); + + for (let j = 0; j < names.length; j++) { + const inst = new Instruction(this, names[j], operands, encoding.toUpperCase(), obj[encoding], obj); + if (j > 0) + inst.aliasOf = names[0]; + this._addInstruction(inst); + } + } + + return this; + } +*/ +} +arm.ISA = ISA; + +}).apply(this, typeof module === "object" && module && module.exports + ? [module, "exports"] : [this.asmdb || (this.asmdb = {}), "arm"]); diff --git a/db/base.js b/db/base.js new file mode 100644 index 0000000..06cf74f --- /dev/null +++ b/db/base.js @@ -0,0 +1,645 @@ +// This file is part of AsmJit project +// +// See asmjit.h or LICENSE.md for license and copyright information +// SPDX-License-Identifier: Zlib + +(function($scope, $as) { +"use strict"; + +function FAIL(msg) { throw new Error("[BASE] " + msg); } + +// Import. +const hasOwn = Object.prototype.hasOwnProperty; + +const exp = $scope.exp ? $scope.exp : require("./exp.js"); + + +// Export. +const base = $scope[$as] = Object.create(null); + +base.exp = exp; + +function dict(src) { + const dst = Object.create(null); + if (src) + Object.assign(dst, src); + return dst; +} +base.dict = dict; +const NONE = base.NONE = Object.freeze(dict()); + +// asmdb.base.Symbols +// ================== + +const Symbols = Object.freeze({ + Commutative: '~' +}); +base.Symbols = Symbols; + +// asmdb.base.Parsing +// ================== + +// Namespace that provides functions related to text parsing. +const Parsing = { + // Get whether the string `s` representing an operand is . + isImplicit: function(s) { return s.startsWith("<") && s.endsWith(">"); }, + + // Clear attribute from the given operand string `s`. + clearImplicit: function(s) { return s.substring(1, s.length - 1); }, + + // Get whether the string `s` representing an operand is {optional}. + isOptional: function(s) { return s.startsWith("{") && s.endsWith("}"); }, + + // Clear {optional} attribute from the given operand string `s`. + clearOptional: function(s) { return s.substring(1, s.length - 1); }, + + // Get whether the string `s` representing an operand specifies commutativity. + isCommutative: function(s) { return s.length > 0 && s.charAt(0) === Symbols.Commutative; }, + + // Clear commutative attribute from the given operand string `s`. + clearCommutative: function(s) { return s.substring(1); }, + + // Matches a closing bracket in string `s` starting `from` the given index. + // It behaves like `s.indexOf()`, but uses a counter and skips all nested + // matches. + matchClosingChar: function(s, from) { + const len = s.length; + const opening = s.charCodeAt(from); + const closing = opening === 40 ? 31 : // (). + opening === 60 ? 62 : // <>. + opening === 91 ? 93 : // []. + opening === 123 ? 125 : 0; // {}. + + let i = from; + let pending = 1; + do { + if (++i >= len) + break; + + const c = s.charCodeAt(i); + pending += Number(c === opening); + pending -= Number(c === closing); + } while (pending); + + return i; + }, + + // Split instruction operands into an array containing each operand as a + // trimmed string. This function is similar to `s.split(",")`, however, + // it matches brackets inside the operands and won't just blindly split + // the string based on "," token. If operand contains metadata or it's + // an address it would still be split correctly. + splitOperands: function(s) { + const result = []; + + s = s.trim(); + if (!s) + return result; + + let start = 0; + let i = 0; + let c = ""; + + for (;;) { + if (i === s.length || (c = s[i]) === ",") { + const op = s.substring(start, i).trim(); + if (!op) + FAIL(`Found empty operand in '${s}'`); + + result.push(op); + if (i === s.length) + return result; + + start = ++i; + continue; + } + + if ((c === "<" || c === ">") && i != start) { + i++; + continue; + } + + if (c === "[" || c === "{" || c === "(" || c === "<") + i = base.Parsing.matchClosingChar(s, i); + else + i++; + } + } +} +base.Parsing = Parsing; + +// asmdb.base.MapUtils +// =================== + +const MapUtils = { + cloneExcept(map, except) { + const out = Object.create(null); + for (let k in map) { + if (k in except) + continue + out[k] = map[k]; + } + return out; + } +}; +base.MapUtils = MapUtils; + +// asmdb.base.Operand +// ================== + +const OperandFlags = Object.freeze({ + Optional : 0x00000001, + Implicit : 0x00000002, + Commutative: 0x00000004, + ZExt : 0x00000008, + ReadAccess : 0x00000010, + WriteAccess: 0x00000020 +}); +base.OperandFlags = OperandFlags; + +class Operand { + constructor(data) { + this.type = ""; // Type of the operand ("reg", "reg-list", "mem", "reg/mem", "imm", "rel"). + this.data = data; // The operand's data (possibly processed). + this.flags = 0; + + this.reg = ""; // Register operand's definition. + this.mem = ""; // Memory operand's definition. + this.imm = 0; // Immediate operand's size. + this.rel = 0; // Relative displacement operand's size. + + this.restrict = ""; // Operand is restricted (specific register or immediate value). + this.read = false; // True if the operand is a read-op from reg/mem. + this.write = false; // True if the operand is a write-op to reg/mem. + + this.regType = ""; // Register operand's type. + this.regIndexRel = 0; // Register index is relative to the previous register operand index (0 if not). + this.memSize = -1; // Memory operand's size. + this.immSign = ""; // Immediate sign (any / signed / unsigned). + this.immValue = null; // Immediate value - `null` or `1` (only used by shift/rotate instructions). + + this.rwxIndex = -1; // Read/Write (RWX) index. + this.rwxWidth = -1; // Read/Write (RWX) width. + } + + _getFlag(flag) { + return (this.flags & flag) != 0; + } + + _setFlag(flag, value) { + this.flags = (this.flags & ~flag) | (value ? flag : 0); + return this; + } + + get optional() { return this._getFlag(OperandFlags.Optional); } + set optional(value) { this._setFlag(OperandFlags.Optional, value); } + + get implicit() { return this._getFlag(OperandFlags.Implicit); } + set implicit(value) { this._setFlag(OperandFlags.Implicit, value); } + + get commutative() { return this._getFlag(OperandFlags.Commutative); } + set commutative(value) { this._setFlag(OperandFlags.Commutative, value); } + + get zext() { return this._getFlag(OperandFlags.ZExt); } + set zext(value) { this._setFlag(OperandFlags.ZExt, value); } + + toString() { return this.data; } + + isReg() { return !!this.reg; } + isMem() { return !!this.mem; } + isImm() { return !!this.imm; } + isRel() { return !!this.rel; } + + isRegMem() { return this.reg && this.mem; } + isRegOrMem() { return !!this.reg || !!this.mem; } + + isRegList() { return this.type === "reg-list" } + isPartialOp() { return false; } +} +base.Operand = Operand; + +// asmdb.base.Instruction +// ====================== + +// Defines interface and properties that each architecture dependent instruction +// must provide even if that particular architecture doesn't use that feature(s). +class Instruction { + constructor(db) { + Object.defineProperty(this, "db", { value: db }); + + this.name = ""; // Instruction name. + this.arch = "ANY"; // Architecture. + this.encoding = ""; // Encoding type. + this.operands = []; // Instruction operands. + + this.implicit = 0; // Indexes of all implicit operands (registers / memory). + this.commutative = 0; // Indexes of all commutative operands. + + this.opcodeString = ""; // Instruction opcode as specified in manual. + this.opcodeValue = 0; // Instruction opcode as number (arch dependent). + this.fields = dict(); // Information about each opcode field (arch dependent). + this.operations = dict(); // Operations the instruction performs. + + this.io = dict(); // Instruction input / output (CPU flags, states, and other registers). + this.ext = dict(); // ISA extensions required by the instruction. + this.category = dict(); // Instruction categories. + + this.specialRegs = dict(); // Information about read/write to special registers. + + this.altForm = false; // This is an alternative form, not needed to create a signature. + this.volatile = false; // Instruction is volatile and should not be reordered. + this.control = "none"; // Control flow type (none by default). + this.privilege = ""; // Privilege-level required to execute the instruction. + this.aliasOf = ""; // Instruction is an alias of another instruction + } + + get extArray() { + const out = Object.keys(this.ext); + out.sort(); + return out; + } + + _assignAttribute(key, value) { + switch (key) { + case "ext": + case "io": + case "category": + return this._combineAttribute(key, value); + + default: + if (typeof this[key] === undefined) + FAIL(`Cannot assign ${key}=${value}`); + this[key] = value; + break; + } + } + + _combineAttribute(key, value) { + if (typeof value === "string") + value = value.split(" "); + + if (Array.isArray(value)) { + for (let v of value) { + let pKeys = v; + let pValue = true; + + const i = v.indexOf("="); + if (i !== -1) { + pValue = v.substring(i + 1); + pKeys = v.substring(0, i).trim(); + } + + for (let pk of pKeys.trim().split("|").map(function(s) { return s.trim(); })) { + this[key][pk] = pValue; + } + } + } + else { + for (let k in value) + this[key][k] = value[k]; + } + } + + _updateOperandsInfo() { + this.implicit = 0; + this.commutative = 0; + + for (let i = 0; i < this.operands.length; i++) { + const op = this.operands[i]; + + if (op.implicit) this.implicit |= (1 << i); + if (op.commutative) this.commutative |= (1 << i); + } + } + + isAlias() { return !!this.aliasOf; } + isCommutative() { return this.commutative !== 0; } + + hasImplicit() { return this.implicit !== 0; } + + hasAttribute(name, matchValue) { + const value = this[name]; + if (value === undefined) + return false; + + if (matchValue === undefined) + return true; + + return value === matchValue; + } + + report(msg) { + console.log(`${this}: ${msg}`); + } + + toString() { + return `${this.name} ${this.operands.join(", ")}`; + } +} +base.Instruction = Instruction; + +// asmdb.base.InstructionGroup +// =========================== + +// Instruction group is simply array of function that has some additional +// functionality. +class InstructionGroup extends Array { + constructor() { + super(); + + if (arguments.length === 1) { + const a = arguments[0]; + if (Array.isArray(a)) { + for (let i = 0; i < a.length; i++) + this.push(a[i]); + } + } + } + + unionCpuFeatures(name) { + const result = dict(); + for (let i = 0; i < this.length; i++) { + const inst = this[i]; + const features = inst.ext; + for (let k in features) + result[k] = features[k]; + } + return result; + } + + checkAttribute(key, value) { + let n = 0; + for (let i = 0; i < this.length; i++) + n += Number(this[i][key] === value); + return n; + } +} +base.InstructionGroup = InstructionGroup; + +const EmptyInstructionGroup = Object.freeze(new InstructionGroup()); + +// asmdb.base.ISA +// ============== + +class ISA { + constructor() { + this._instructions = null; // Instruction array (contains all instructions). + this._instructionNames = null; // Instruction names (sorted), regenerated when needed. + this._instructionMap = dict(); // Instruction name to `Instruction[]` mapping. + this._aliases = dict(); // Instruction aliases. + this._cpuLevels = dict(); // Architecture versions. + this._extensions = dict(); // Architecture extensions. + this._attributes = dict(); // Instruction attributes. + this._specialRegs = dict(); // Special registers. + this._shortcuts = dict(); // Shortcuts used by instructions metadata. + this.stats = { + insts : 0, // Number of all instructions. + groups: 0 // Number of grouped instructions (having unique name). + }; + } + + get instructions() { + let array = this._instructions; + if (array === null) { + array = []; + const map = this.instructionMap; + const names = this.instructionNames; + for (let i = 0; i < names.length; i++) + array.push.apply(array, map[names[i]]); + this._instructions = array; + } + return array; + } + + get instructionNames() { + let names = this._instructionNames; + if (names === null) { + names = Object.keys(this._instructionMap); + names.sort(); + this._instructionNames = names; + } + return names; + } + + get instructionMap() { return this._instructionMap; } + get aliases() { return this._aliases; } + get cpuLevels() { return this._cpuLevels; } + get extensions() { return this._extensions; } + get attributes() { return this._attributes; } + get specialRegs() { return this._specialRegs; } + get shortcuts() { return this._shortcuts; } + + query(args, copy) { + if (typeof args !== "object" || !args || Array.isArray(args)) + return this._queryByName(args, copy); + + const filter = args.filter; + if (filter) + copy = false; + + let result = this._queryByName(args.name, copy); + if (filter) + result = result.filter(filter, args.filterThis); + + return result; + } + + _queryByName(name, copy) { + let result = EmptyInstructionGroup; + const map = this._instructionMap; + + if (typeof name === "string") { + const insts = map[name]; + if (insts) result = insts; + return copy ? result.slice() : result; + } + + if (Array.isArray(name)) { + const names = name; + for (let i = 0; i < names.length; i++) { + const insts = map[names[i]]; + if (!insts) continue; + + if (result === EmptyInstructionGroup) + result = new InstructionGroup(); + + for (let j = 0; j < insts.length; j++) + result.push(insts[j]); + } + return result; + } + + result = this.instructions; + return copy ? result.slice() : result; + } + + forEachGroup(cb, thisArg) { + const map = this._instructionMap; + const names = this.instructionNames; + + for (let i = 0; i < names.length; i++) { + const name = names[i]; + cb.call(thisArg, name, map[name]); + } + + return this; + } + + addData(data) { + if (typeof data !== "object" || !data) + FAIL("ISA.addData(): data argument must be object"); + + if (data.cpuLevels) this._addCpuLevels(data.cpuLevels); + if (data.specialRegs) this._addSpecialRegs(data.specialRegs); + if (data.shortcuts) this._addShortcuts(data.shortcuts); + if (data.instructions) this._addInstructions(data.instructions); + if (data.postproc) this._postProc(data.postproc); + } + + _postProc(groups) { + for (let group of groups) { + for (let iRule of group.instructions) { + const names = iRule.inst.split(" "); + for (let name of names) { + const insts = this._instructionMap[name]; + if (!insts) + FAIL(`Instruction ${name} referenced by '${group.group}' group doesn't exist`); + + for (let k in iRule) { + if (k === "inst" || k === "data") + continue; + for (let inst of insts) { + inst._assignAttribute(k, iRule[k]); + } + } + } + } + } + } + + _addCpuLevels(items) { + if (!Array.isArray(items)) + FAIL("Property 'cpuLevels' must be array"); + + for (let i = 0; i < items.length; i++) { + const item = items[i]; + const name = item.name; + + const obj = { + name: name + }; + + this._cpuLevels[name] = obj; + } + } + + _addExtensions(items) { + if (!Array.isArray(items)) + FAIL("Property 'extensions' must be array"); + + for (let i = 0; i < items.length; i++) { + const item = items[i]; + const name = item.name; + + const obj = { + name: name, + from: item.from || "" + }; + + this._extensions[name] = obj; + } + } + + _addAttributes(items) { + if (!Array.isArray(items)) + FAIL("Property 'attributes' must be array"); + + for (let i = 0; i < items.length; i++) { + const item = items[i]; + const name = item.name; + const type = item.type; + + if (!/^(?:flag|string|string\[\])$/.test(type)) + FAIL(`Unknown attribute type '${type}'`); + + const obj = { + name: name, + type: type, + doc : item.doc || "" + }; + + this._attributes[name] = obj; + } + } + + _addSpecialRegs(items) { + if (!Array.isArray(items)) + FAIL("Property 'specialRegs' must be array"); + + for (let i = 0; i < items.length; i++) { + const item = items[i]; + const name = item.name; + + const obj = { + name : name, + group: item.group || name, + doc : item.doc || "" + }; + + this._specialRegs[name] = obj; + } + } + + _addShortcuts(items) { + if (!Array.isArray(items)) + FAIL("Property 'shortcuts' must be array"); + + for (let i = 0; i < items.length; i++) { + const item = items[i]; + const name = item.name; + const expand = item.expand; + + if (!name || !expand) + FAIL("Shortcut must contain 'name' and 'expand' properties"); + + const obj = { + name : name, + expand: expand, + doc : item.doc || "" + }; + + this._shortcuts[name] = obj; + } + } + + _addInstructions(instructions) { + FAIL("ISA._addInstructions() must be reimplemented"); + } + + _addInstruction(inst) { + let group; + + if (hasOwn.call(this._instructionMap, inst.name)) { + group = this._instructionMap[inst.name]; + } + else { + group = new InstructionGroup(); + this._instructionNames = null; + this._instructionMap[inst.name] = group; + this.stats.groups++; + } + + if (inst.aliasOf) + this._aliases[inst.name] = inst.aliasOf; + + group.push(inst); + this.stats.insts++; + this._instructions = null; + + return this; + } +} +base.ISA = ISA; + +}).apply(this, typeof module === "object" && module && module.exports + ? [module, "exports"] : [this.asmdb || (this.asmdb = {}), "base"]); diff --git a/db/exp.js b/db/exp.js new file mode 100644 index 0000000..df69c84 --- /dev/null +++ b/db/exp.js @@ -0,0 +1,635 @@ +// This file is part of AsmJit project +// +// See asmjit.h or LICENSE.md for license and copyright information +// SPDX-License-Identifier: Zlib + +(function($scope, $as) { +"use strict"; + +const hasOwn = Object.prototype.hasOwnProperty; + +// Supported Operators +// ------------------- + +const kUnaryOperators = { + "-": {prec: 3, rtl : 1, emit: "-@1" }, + "~": {prec: 3, rtl : 1, emit: "~@1" }, + "!": {prec: 3, rtl : 1, emit: "!@1" } +}; + +const kBinaryOperators = { + "*" : { prec: 5, rtl : 0, emit: "@1 * @2" }, + "/" : { prec: 5, rtl : 0, emit: "@1 / @2" }, + "%" : { prec: 5, rtl : 0, emit: "@1 % @2" }, + "+" : { prec: 6, rtl : 0, emit: "@1 + @2" }, + "-" : { prec: 6, rtl : 0, emit: "@1 - @2" }, + ">>": { prec: 7, rtl : 0, emit: "@1 >> @2" }, + "<<": { prec: 7, rtl : 0, emit: "@1 << @2" }, + "<" : { prec: 9, rtl : 0, emit: "@1 < @2" }, + ">" : { prec: 9, rtl : 0, emit: "@1 > @2" }, + "<=": { prec: 9, rtl : 0, emit: "@1 <= @2" }, + ">=": { prec: 9, rtl : 0, emit: "@1 >= @2" }, + "==": { prec:10, rtl : 0, emit: "@1 == @2" }, + "!=": { prec:10, rtl : 0, emit: "@1 != @2" }, + "&" : { prec:11, rtl : 0, emit: "@1 & @2" }, + "^" : { prec:12, rtl : 0, emit: "@1 ^ @2" }, + "|" : { prec:13, rtl : 0, emit: "@1 | @2" }, + "&&": { prec:14, rtl : 0, emit: "@1 && @2" }, + "||": { prec:15, rtl : 0, emit: "@1 || @2" }, + "?" : { prec:16, rtl : 0, emit: "@1 ? @2" }, + ":" : { prec:16, rtl : 0, emit: "@1 : @2" } +}; + +const kMaxOperatorLen = 4; + +function rightAssociate(info, bPrec) { + return info.prec > bPrec || (info.prec === bPrec && info.rtl); +} + +// Expression Error +// ---------------- + +// Contains `message` and `position` members. If the `position` is not `-1` then it is +// a zero-based index, which points to a first character of the token near the error. +class ExpressionError extends Error { + constructor(message, position) { + super(message); + this.name = "ExpressionError"; + this.message = message; + this.position = position != null ? position : -1; + } +} + +function throwTokenizerError(token) { + throw new ExpressionError(`Unexpected token '${token.data}'`, token.position); +} + +function throwExpressionError(message, position) { + throw new ExpressionError(message, position); +} + +// Expression Tree +// --------------- + +function mustEnclose(node) { + return node.isUnary() ? node.child.isOperator() : node.isBinary() ? true : false; +} + +class ExpNode { + constructor(type) { this.type = type; } + + isImm() { return this.type === "imm"; } + isVar() { return this.type === "var"; } + isCall() { return this.type === "call"; } + isUnary() { return this.type === "unary"; } + isBinary() { return this.type === "binary"; } + isOperator() { return this.type === "unary" || this.type === "binary"; } + + info() { return null; } + clone() { throw new Error("ExpNode.clone() must be overridden"); } + toString(ctx) { throw new Error("ExpNode.toString() must be overridden"); } +} + +class ImmNode extends ExpNode { + constructor(imm) { + super("imm"); + this.imm = imm || 0; + } + + clone() { return new ImmNode(this.imm); } + toString(ctx) { return ctx ? ctx.stringifyImmediate(this.imm) : String(this.imm); } +} + +class VarNode extends ExpNode { + constructor(name) { + super("var"); + this.name = name || ""; + } + + clone() { return new VarNode(this.var); } + toString(ctx) { return ctx ? ctx.stringifyVariable(this.name) : String(this.name); } +} + +class CallNode extends ExpNode { + constructor(name, args) { + super("call"); + this.name = name || ""; + this.args = args || []; + } + + clone() { return new CallNode(this.name, this.args.map(function(arg) { return arg.clone(); })); } + + toString(ctx) { + if (this.name === "$bit") { + return `((${this.args[0]} >> ${this.args[1]}) & 1)`; + } + else { + let argsCode = this.args.map(function(arg) { return arg.toString(ctx); }).join(", "); + if (ctx) + return `${ctx.stringifyFunction(this.name)}(${argsCode})`; + else + return `${this.name}(${argsCode})`; + } + } +} + +class UnaryNode extends ExpNode { + constructor(op, child) { + if (!hasOwn.call(kUnaryOperators, op)) + throw new Error(`Invalid unary operator '${op}`); + + super("unary"); + this.op = op; + this.child = child || null; + } + + info() { return kUnaryOperators[this.op]; } + clone() { return new UnaryNode(this.op, this.left ? this.left.clone() : null); } + + toString(ctx) { + return this.info().emit.replace(/@1/g, () => { + const node = this.child; + const code = node.toString(ctx); + return mustEnclose(node) ? `(${code})` : code; + }); + } +} + +class BinaryNode extends ExpNode { + constructor(op, left, right) { + if (!hasOwn.call(kBinaryOperators, op)) + throw new Error(`Invalid binary operator '${op}`); + + super("binary"); + this.op = op || ""; + this.left = left || null; + this.right = right || null; + } + + info() { return kBinaryOperators[this.op]; } + clone() { return new BinaryNode(this.op, this.left ? this.left.clone() : null, this.right ? this.right.clone() : null); } + + toString(ctx) { + return this.info().emit.replace(/@[1-2]/g, (p) => { + const node = p === "@1" ? this.left : this.right; + const code = node.toString(ctx); + return mustEnclose(node) ? `(${code})` : code; + }); + } +} + +function Imm(imm) { return new ImmNode(imm); } +function Var(name) { return new VarNode(name); } +function Call(name, args) { return new CallNode(name, args); } +function Unary(op, child) { return new UnaryNode(op, child); } +function Binary(op, left, right) { return new BinaryNode(op, left, right); } + +/* +// TODO: Unused, remove? +function Negate(child) { return Unary("-", child); } +function BitNot(child) { return Unary("~", child); } + +function Add(left, right) { return Binary("+", left, right); } +function Sub(left, right) { return Binary("-", left, right); } +function Mul(left, right) { return Binary("*", left, right); } +function Div(left, right) { return Binary("/", left, right); } +function Mod(left, right) { return Binary("%", left, right); } +function Shl(left, right) { return Binary("<<", left, right); } +function Shr(left, right) { return Binary(">>", left, right); } +function BitAnd(left, right) { return Binary("&", left, right); } +function BitOr(left, right) { return Binary("|", left, right); } +function BitXor(left, right) { return Binary("^", left, right); } +function Eq(left, right) { return Binary("==", left, right); } +function Ne(left, right) { return Binary("!=", left, right); } +function Lt(left, right) { return Binary("<", left, right); } +function Le(left, right) { return Binary("<=", left, right); } +function Gt(left, right) { return Binary(">", left, right); } +function Ge(left, right) { return Binary(">=", left, right); } +function And(left, right) { return Binary("&&", left, right); } +function Or(left, right) { return Binary("||", left, right); } +*/ + +// Expression Tokenizer +// -------------------- + +const kCharNone = 0; // '_' - Character category - Invalid or . +const kCharSpace = 1; // 'S' - Character category - Space. +const kCharAlpha = 2; // 'A' - Character category - Alpha [A-Za-z_]. +const kCharDigit = 3; // 'D' - Character category - Digit [0-9]. +const kCharPunct = 4; // '$' - Character category - Punctuation. + +const Category = (function(_, S, A, D, $) { + const Table = [ + _,_,_,_,_,_,_,_,_,S,S,S,S,S,_,_, // 000-015 |......... ..| + _,_,_,_,_,_,_,_,_,_,_,_,_,_,_,_, // 016-031 |................| + S,$,$,$,$,$,$,$,$,$,$,$,$,$,$,$, // 032-047 | !"#$%&'()*+,-./| + D,D,D,D,D,D,D,D,D,D,$,$,$,$,$,$, // 048-063 |0123456789:;<=>?| + $,A,A,A,A,A,A,A,A,A,A,A,A,A,A,A, // 064-079 |@ABCDEFGHIJKLMNO| + A,A,A,A,A,A,A,A,A,A,A,$,$,$,$,A, // 080-095 |PQRSTUVWXYZ[\]^_| + $,A,A,A,A,A,A,A,A,A,A,A,A,A,A,A, // 096-111 |`abcdefghijklmno| + A,A,A,A,A,A,A,A,A,A,A,$,$,$,$,_, // 112-127 |pqrstuvwxyz{|}~ | + _,_,_,_,_,_,_,_,_,_,_,_,_,_,_,_, // 128-143 |................| + _,_,_,_,_,_,_,_,_,_,_,_,_,_,_,_ // 144-159 |................| + ]; + const kTableLength = Table.length; + + return function(c) { + if (c < kTableLength) + return Table[c]; + return kCharNone; + }; +})(kCharNone, kCharSpace, kCharAlpha, kCharDigit, kCharPunct); + +const kTokenNone = 0; +const kTokenPunct = 1; +const kTokenIdent = 2; +const kTokenValue = 3; + +function newToken(type, position, data, value) { + return { + type : type, // Token type, see `kToken...`. + position: position, // Token position in expression's source. + data : data, // Token data (content) as string. + value : value // Token value (only if the token is a value). + }; +} +const NoToken = newToken(kTokenNone, -1, "", null); + +// Must be reset before it can be used, use `RegExp.lastIndex`. +const reValue = /(?:(?:\d*\.\d+|\d+)(?:[E|e][+|-]?\d+)?)/g; + +function tokenize(source) { + const len = source.length; + const tokens = []; + + let i = 0, j = 0; // Current index in `source` and temporary. + let start = 0; // Current token start position. + let data = ""; // Current token data (content) as string. + let c, cat; // Current character code and category. + + while (i < len) { + cat = Category(c = source.charCodeAt(i)); + + if (cat === kCharSpace) { + i++; + } + else if (cat === kCharDigit) { + const n = tokens.length - 1; + if (n >= 0 && tokens[n].data === "." && source[i - 1] === ".") { + tokens.length = n; + i--; + } + reValue.lastIndex = i; + data = reValue.exec(source)[0]; + + tokens.push(newToken(kTokenValue, i, data, parseFloat(data))); + i += data.length; + } + else if (cat === kCharAlpha) { + start = i; + while (++i < len && ((cat = Category(source.charCodeAt(i))) === kCharAlpha || cat === kCharDigit)) + continue; + + data = source.substring(start, i); + tokens.push(newToken(kTokenIdent, start, data, null)); + } + else if (cat === kCharPunct) { + start = i; + while (++i < len && Category(source.charCodeAt(i)) === kCharPunct) + continue; + + data = source.substring(start, i); + do { + for (j = Math.min(i - start, kMaxOperatorLen); j > 0; j--) { + const part = source.substr(start, j); + if (hasOwn.call(kUnaryOperators, part) || hasOwn.call(kBinaryOperators, part) || j === 1) { + tokens.push(newToken(kTokenPunct, start, part, null)); + start += j; + break; + } + } + } while (start < i); + } + else { + throwExpressionError(`Unrecognized character '0x${c.toString(16)}'`, i); + } + } + + return tokens; +} + +// Expression Parser +// ----------------- + +class Parser { + constructor(tokens) { + this.tokens = tokens; + this.tIndex = 0; + } + + peek() { return this.tIndex < this.tokens.length ? this.tokens[this.tIndex ] : NoToken; } + next() { return this.tIndex < this.tokens.length ? this.tokens[this.tIndex++] : NoToken; } + skip() { this.tIndex++; return this; } + back(token) { this.tIndex -= +(token !== NoToken); return this; } + + parse() { + // The root expression cannot be empty. + let token = this.peek(); + if (token === NoToken) + throwExpressionError("Expression cannot be empty", 0); + + const exp = this.parseExpression(); + + // The root expression must reach the end of the input. + token = this.peek(); + if (token !== NoToken) + throwTokenizerError(token); + + return exp; + } + + parseExpression() { + const stack = []; + let value = null; + let token = null; + + for (;;) { + // The only case of value not being `null` is after ternary-if. In that + // case the value was already parsed so we want to skip this section. + if (value === null) { + let unaryFirst = null; + let unaryLast = null; + + token = this.next(); + + // Parse a possible unary operator(s). + if (token.type === kTokenPunct) { + do { + const opName = token.data; + const opInfo = kUnaryOperators[opName]; + + if (!opInfo) + break; + + const node = Unary(opName); + if (unaryLast) + unaryLast.child = node; + else + unaryFirst = node; + + unaryLast = node; + token = this.next(); + } while (token.type === kTokenPunct); + } + + // Parse a value, variable, function call, or nested expression. + if (token.type === kTokenValue) { + value = Imm(token.value); + } + else if (token.type === kTokenIdent) { + const name = token.data; + const after = this.peek(); + + if (after.data === "(") + value = this.parseCall(token.data); + else if (after.data === "[") + value = this.parseBitAccess(token.data); + else + value = Var(name); + } + else if (token.data === "(") { + value = this.parseExpression(); + token = this.next(); + + if (token.data !== ")") + throwTokenizerError(token); + } + else { + throwTokenizerError(token); + } + + // Replace the value with the top-level unary operator, if parsed. + if (unaryFirst) { + unaryLast.child = value; + value = unaryFirst; + } + } + + // Parse a possible binary operator - the loop must repeat, if present. + token = this.peek(); + if (token.type === kTokenPunct && hasOwn.call(kBinaryOperators, token.data)) { + const opName = token.data; + if (opName === ":") + break; + + // Consume the token. + this.skip(); + + const bNode = Binary(opName, null, null); + + if (!stack.length) { + bNode.left = value; + stack.push(bNode); + } + else { + let aNode = stack.pop(); + let aPrec = aNode.info().prec; + let bPrec = bNode.info().prec; + + if (aPrec > bPrec) { + aNode.right = bNode; + bNode.left = value; + stack.push(aNode, bNode); + } + else { + aNode.right = value; + + // Advance to the top-most op that has less/equal precedence than `bPrec`. + while (stack.length) { + if (rightAssociate(aNode.info(), bPrec)) + break; + aNode = stack.pop(); + } + + if (!stack.length && !rightAssociate(aNode.info(), bPrec)) { + bNode.left = aNode; + stack.push(bNode); + } + else { + const tmp = aNode.right; + aNode.right = bNode; + bNode.left = tmp; + stack.push(aNode, bNode); + } + } + } + + // Parse " {ternary-if} {ternary-else} ". + if (opName === "?") { + const ternLeft = this.parseExpression(); + const ternTok = this.next(); + + if (ternTok.data !== ":") + throwExpressionError(`Unterminated ternary if '${token.data}'`, token.position); + + const ternRight = this.parseExpression(); + value = Binary(opName, info, ternLeft, ternRight); + } + else { + value = null; + } + + continue; + } + + break; + } + + if (value === null) + throwExpressionError("Invalid expression"); + + if (stack.length !== 0) { + stack[stack.length - 1].right = value; + value = stack[0]; + } + + return value; + } + + parseCall(name) { + const args = []; + + let token = this.next(); + if (token.data !== "(") + throwTokenizerError(token); + + for (;;) { + token = this.peek(); + if (token.data === ")") + break; + + if (args.length !== 0) { + if (token.data !== ",") + throwTokenizerError(token); + this.skip(); + } + + args.push(this.parseExpression()); + } + + this.skip(); + return Call(name, args); + } + + parseBitAccess(name) { + let token = this.next(); + if (token.data !== "[") + throwTokenizerError(token); + + token = this.next(); + if (token.type != kTokenValue) + throwTokenizerError(token); + + const index = token.value; + + token = this.next(); + if (token.data !== "]") + throwTokenizerError(token); + + return Call("$bit", [Var(name), index]); + } +} + +function parse(source) { + const tokens = tokenize(source); + return new Parser(tokens).parse(); +} + +// Expression Visitors +// ------------------- + +class Visitor { + visit(node) { + switch (node.type) { + case "imm": + case "var": { + break; + } + + case "call": { + for (let arg of node.args) + this.visit(arg); + break; + } + + case "unary": { + if (node.child) + this.visit(node.child); + break; + } + + case "binary": { + if (node.left) + this.visit(node.left); + if (node.right) + this.visit(node.right); + break; + } + + default: { + throw new Error(`Visitor.visit(): Unknown node type '${node.type}'`); + } + } + } +} + +class Collector extends Visitor { + constructor(nodeType, dst) { + super(); + this.dict = dst || Object.create(null); + this.nodeType = nodeType; + } + + visit(node) { + if (node.type === this.nodeType) { + if (hasOwn.call(this.dict, node.name)) + this.dict[node.name]++; + else + this.dict[node.name] = 1; + } + + super.visit(node); + } +} + +function collectVars(node, dst) { + const collector = new Collector("var", dst); + collector.visit(node) + return collector.dict; +} + +function collectCalls(node, dst) { + const collector = new Collector("call", dst); + collector.visit(node) + return collector.dict; +} + +// Exports +// ------- + +$scope[$as] = { + Imm: Imm, + Var: Var, + Call: Call, + Unary: Unary, + Binary: Binary, + Visitor: Visitor, + ExpressionError: ExpressionError, + + parse: parse, + collectVars: collectVars, + collectCalls: collectCalls +}; + +}).apply(this, typeof module === "object" && module && module.exports + ? [module, "exports"] : [this.asmdb || (this.asmdb = {}), "exp"]); diff --git a/db/index.js b/db/index.js new file mode 100644 index 0000000..75449da --- /dev/null +++ b/db/index.js @@ -0,0 +1,11 @@ +// This file is part of AsmJit project +// +// See asmjit.h or LICENSE.md for license and copyright information +// SPDX-License-Identifier: Zlib + +"use strict"; + +exports.base = require("./base.js"); +exports.arm = require("./arm.js"); +exports.aarch64 = require("./aarch64.js"); +exports.x86 = require("./x86.js"); diff --git a/db/isa_aarch64.json b/db/isa_aarch64.json new file mode 100644 index 0000000..17f98ed --- /dev/null +++ b/db/isa_aarch64.json @@ -0,0 +1,3743 @@ +{ + "registers": { + "r": {"kind": "gp" , "any": "r", "names": ["r0-31"]}, + "b": {"kind": "vec", "any": "b", "names": ["b0-31"]}, + "h": {"kind": "vec", "any": "h", "names": ["h0-31"]}, + "s": {"kind": "vec", "any": "s", "names": ["s0-31"]}, + "d": {"kind": "vec", "any": "d", "names": ["d0-31"]}, + "v": {"kind": "vec", "any": "v", "names": ["v0-31"]} + }, + + "instructions": [ + {"category": "GP", "data": [ + {"inst": "adc Wd, Wn, Wm" , "op": "00011010|000|Rm|000000|Rn|Rd" , "io": "C=R"}, + {"inst": "adc Xd, Xn, Xm" , "op": "10011010|000|Rm|000000|Rn|Rd" , "io": "C=R"}, + {"inst": "adcs Wd, Wn, Wm" , "op": "00111010|000|Rm|000000|Rn|Rd" , "io": "N=W Z=W C=X V=W"}, + {"inst": "adcs Xd, Xn, Xm" , "op": "10111010|000|Rm|000000|Rn|Rd" , "io": "N=W Z=W C=X V=W"}, + {"inst": "add Wd, Wn, Wm, {lsl|lsr|asr #n}" , "op": "00001011|sop:2|0|Rm|n:6|Rn|Rd"}, + {"inst": "add Xd, Xn, Xm, {lsl|lsr|asr #n}" , "op": "10001011|sop:2|0|Rm|n:6|Rn|Rd"}, + {"inst": "add Wd|WSP, Wn|WSP, Wm, {extend #n}" , "op": "00001011|001|Rm|option:3|n:3|Rn|Rd"}, + {"inst": "add Xd|SP, Xn|SP, Rm, {extend #n}" , "op": "10001011|001|Rm|option:3|n:3|Rn|Rd"}, + {"inst": "add Wd|WSP, Wn|WSP, #immZ, {lsl #n=0|12}" , "op": "00010001|0|n:1|immZ:12|Rn|Rd"}, + {"inst": "add Xd|SP, Xn|SP, #immZ, {lsl #n=0|12}" , "op": "10010001|0|n:1|immZ:12|Rn|Rd"}, + {"inst": "adds Wd, Wn, Wm, {lsl|lsr|asr #n}" , "op": "00101011|sop:2|0|Rm|n:6|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "adds Xd, Xn, Xm, {lsl|lsr|asr #n}" , "op": "10101011|sop:2|0|Rm|n:6|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "adds Wd, Wn|WSP, Wm, {extend #n}" , "op": "00101011|001|Rm|option:3|n:3|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "adds Xd, Xn|SP, Rm, {extend #n}" , "op": "10101011|001|Rm|option:3|n:3|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "adds Wd|WSP, Wn|WSP, #immZ, {lsl #n=0|12}" , "op": "00110001|0|n:1|immZ:12|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "adds Xd|SP, Xn|SP, #immZ, {lsl #n=0|12}" , "op": "10110001|0|n:1|immZ:12|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "adr Xd, #relS" , "op": "0|relS[1:0]|10000|relS[20:2]|Rd"}, + {"inst": "adrp Xd, #relS" , "op": "1|relS[1:0]|10000|relS[20:2]|Rd"}, + {"inst": "and Wd|WSP, Wn, Wm, {sop #n}" , "op": "00001010|sop|0|Rm|n:6|Rn|Rd" , "imm": "ShiftImm(n, x)"}, + {"inst": "and Xd|SP, Xn, Xm, {sop #n}" , "op": "10001010|sop|0|Rm|n:6|Rn|Rd" , "imm": "ShiftImm(n, x)"}, + {"inst": "and Wd|WSP, Wn, #imm" , "op": "00010010|0|imm:13|Rn|Rd" , "imm": "LogicalImm(imm, 0)"}, + {"inst": "and Xd|SP, Xn, #imm" , "op": "10010010|0|imm:13|Rn|Rd" , "imm": "LogicalImm(imm, 1)"}, + {"inst": "ands Wd|WSP, Wn, Wm, {sop #n}" , "op": "01101010|sop|0|Rm|n:6|Rn|Rd" , "io": "N=W Z=W C=W V=W", "imm": "ShiftImm(n, x)"}, + {"inst": "ands Xd|SP, Xn, Xm, {sop #n}" , "op": "11101010|sop|0|Rm|n:6|Rn|Rd" , "io": "N=W Z=W C=W V=W", "imm": "ShiftImm(n, x)"}, + {"inst": "ands Wd|WSP, Wn, #imm" , "op": "01110010|0|imm:13|Rn|Rd" , "io": "N=W Z=W C=W V=W", "imm": "LogicalImm(imm, 0)"}, + {"inst": "ands Xd|SP, Xn, #imm" , "op": "11110010|0|imm:13|Rn|Rd" , "io": "N=W Z=W C=W V=W", "imm": "LogicalImm(imm, 1)"}, + {"inst": "asr|asrv Wd, Wn, Wm" , "op": "00011010|110|Rm|001010|Rn|Rd"}, + {"inst": "asr|asrv Xd, Xn, Xm" , "op": "10011010|110|Rm|001010|Rn|Rd"}, + {"inst": "asr Wd, Wn, #n" , "op": "00010011|00|immr:6|011111|Rn|Rd"}, + {"inst": "asr Xd, Xn, #n" , "op": "10010011|01|immr:6|111111|Rn|Rd"}, + {"inst": "at #at_op, Xt" , "op": "11010101|00001|op1:3|0111|CRm|op2:3|Rt" , "imm": "ImmAt(at_op)"}, + {"inst": "b #relS*4" , "op": "000101|relS:26" , "control": "jump"}, + {"inst": "b. #relS*4" , "op": "01010100|relS:19|0|cond" , "control": "branch", "io": "N=R Z=R C=R V=R"}, + {"inst": "bfc Wd, #lsb, #width" , "op": "00110011|00|immr:6|imms:6|11111|Rd"}, + {"inst": "bfc Xd, #lsb, #width" , "op": "10110011|01|immr:6|imms:6|11111|Rd"}, + {"inst": "bfi Wd, Wn, #lsb, #width" , "op": "00110011|00|immr:6|imms:6|Rn|Rd"}, + {"inst": "bfi Xd, Xn, #lsb, #width" , "op": "10110011|01|immr:6|imms:6|Rn|Rd"}, + {"inst": "bfm Wd, Wn, #immr, #imms" , "op": "00110011|00|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFM(immr, imms)"}, + {"inst": "bfm Xd, Xn, #immr, #imms" , "op": "10110011|01|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFM(immr, imms)"}, + {"inst": "bfxil Wd, Wn, #lsb, #width" , "op": "00110011|00|immr:6|imms:6|Rn|Rd"}, + {"inst": "bfxil Xd, Xn, #lsb, #width" , "op": "10110011|01|immr:6|imms:6|Rn|Rd"}, + {"inst": "bic Wd, Wn, Wm, {sop #n}" , "op": "00001010|sop:2|1|Rm|n:6|Rn|Rd"}, + {"inst": "bic Xd, Xn, Xm, {sop #n}" , "op": "10001010|sop:2|1|Rm|n:6|Rn|Rd"}, + {"inst": "bics Wd, Wn, Wm, {sop #n}" , "op": "01101010|sop:2|1|Rm|n:6|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "bics Xd, Xn, Xm, {sop #n}" , "op": "11101010|sop:2|1|Rm|n:6|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "bl #relS*4" , "op": "100101|relS:26" , "control": "call"}, + {"inst": "blr Xn" , "op": "11010110|001|11111000000|Rn|00000" , "control": "call"}, + {"inst": "br Xn" , "op": "11010110|000|11111000000|Rn|00000" , "control": "jump"}, + {"inst": "brk #imm" , "op": "11010100|001|imm:16|00000"}, + {"inst": "cbnz Wn, #relS*4" , "op": "00110101|relS:19|Rn" , "control": "branch"}, + {"inst": "cbnz Xn, #relS*4" , "op": "10110101|relS:19|Rn" , "control": "branch"}, + {"inst": "cbz Wn, #relS*4" , "op": "00110101|relS:19|Rn" , "control": "branch"}, + {"inst": "cbz Xn, #relS*4" , "op": "10110101|relS:19|Rn" , "control": "branch"}, + {"inst": "ccmn Wn, Wm, #nzcv, #cond" , "op": "00111010|010|Rm|cond|00|Rn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "ccmn Xn, Xm, #nzcv, #cond" , "op": "10111010|010|Rm|cond|00|Rn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "ccmn Wn, #imm, #nzcv, #cond" , "op": "00111010|010|imm:5|cond|10|Rn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "ccmn Xn, #imm, #nzcv, #cond" , "op": "10111010|010|imm:5|cond|10|Rn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "ccmp Wn, Wm, #nzcv, #cond" , "op": "01111010|010|Rm|cond|00|Rn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "ccmp Xn, Xm, #nzcv, #cond" , "op": "11111010|010|Rm|cond|00|Rn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "ccmp Wn, #imm, #nzcv, #cond" , "op": "01111010|010|imm:5|cond|10|Rn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "ccmp Xn, #imm, #nzcv, #cond" , "op": "11111010|010|imm:5|cond|10|Rn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cinc Wd, Wn, #cond" , "op": "00011010|100|Rn|cond|01|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "cinc Xd, Xn, #cond" , "op": "10011010|100|Rn|cond|01|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "cinv Wd, Wn, #cond" , "op": "01011010|100|Rn|cond|00|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "cinv Xd, Xn, #cond" , "op": "11011010|100|Rn|cond|00|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "clrex {#imm=15}" , "op": "11010101|000|00011|0011|CRm|010|11111" , "CRm": "imm"}, + {"inst": "cls Wd, Wn" , "op": "01011010|110|00000000101|Rn|Rd"}, + {"inst": "cls Xd, Xn" , "op": "11011010|110|00000000101|Rn|Rd"}, + {"inst": "clz Wd, Wn" , "op": "01011010|110|00000000100|Rn|Rd"}, + {"inst": "clz Xd, Xn" , "op": "11011010|110|00000000100|Rn|Rd"}, + {"inst": "cmn Wn|WSP, #imm, {lsl #n=0|12}" , "op": "00110001|0|n:1|imm:12|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmn Xn|SP, #imm, {lsl #n=0|12}" , "op": "10110001|0|n:1|imm:12|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmn Wn|WSP, Wm, {extend #n}" , "op": "00101011|001|Rm|option:3|n:3|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmn Xn|SP, Rm, {extend #n}" , "op": "10101011|001|Rm|option:3|n:3|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmn Wn, Wm, {lsl|lsr|asr #n}" , "op": "00101011|sop:2|0|Rm|n:6|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmn Xn, Xm, {lsl|lsr|asr #n}" , "op": "10101011|sop:2|0|Rm|n:6|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmp Wn, Wm, {lsl|lsr|asr #n}" , "op": "01101011|sop:2|0|Rm|n:6|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmp Xn, Xm, {lsl|lsr|asr #n}" , "op": "11101011|sop:2|0|Rm|n:6|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmp Wn|WSP, Wm, {extend #n}" , "op": "01101011|001|Rm|option:3|n:3|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmp Xn|SP, Rm, {extend #n}" , "op": "11101011|001|Rm|option:3|n:3|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmp Wn|WSP, #imm, {lsl #n=0|12}" , "op": "01110001|0|n:1|imm:12|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cmp Xn|SP, #imm, {lsl #n=0|12}" , "op": "11110001|0|n:1|imm:12|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "cneg Wd, Wn, #cond" , "op": "01011010|100|Rn|cond|01|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "cneg Xd, Xn, #cond" , "op": "11011010|100|Rn|cond|01|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csdb" , "op": "11010101|00|000|011|0010|0010|100|11111"}, + {"inst": "csel Wd, Wn, Wm, #cond" , "op": "00011010|100|Rm|cond|00|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csel Xd, Xn, Xm, #cond" , "op": "10011010|100|Rm|cond|00|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "cset Wd, #cond" , "op": "00011010|100|11111|cond|01|11111|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "cset Xd, #cond" , "op": "10011010|100|11111|cond|01|11111|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csetm Wd, #cond" , "op": "01011010|100|11111|cond|00|11111|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csetm Xd, #cond" , "op": "11011010|100|11111|cond|00|11111|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csinc Wd, Wn, Wm, #cond" , "op": "00011010|100|Rm|cond|01|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csinc Xd, Xn, Xm, #cond" , "op": "10011010|100|Rm|cond|01|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csinv Wd, Wn, Wm, #cond" , "op": "01011010|100|Rm|cond|00|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csinv Xd, Xn, Xm, #cond" , "op": "11011010|100|Rm|cond|00|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csneg Wd, Wn, Wm, #cond" , "op": "01011010|100|Rm|cond|01|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "csneg Xd, Xn, Xm, #cond" , "op": "11011010|100|Rm|cond|01|Rn|Rd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "dc #dc_op, Xt" , "op": "11010101|000|01|op1:3|0111|CRm|op2:3|Rt" , "imm": "ImmDC(dc_op)"}, + {"inst": "dcps1 {#imm}" , "op": "11010100|101|imm:16|00001"}, + {"inst": "dcps2 {#imm}" , "op": "11010100|101|imm:16|00010"}, + {"inst": "dcps3 {#imm}" , "op": "11010100|101|imm:16|00011"}, + {"inst": "dmb #barrier_op" , "op": "11010101|000|00|011|0011|CRm|101|11111" , "imm": "ImmDataBarrier(barrier_op)"}, + {"inst": "drps" , "op": "11010110|101|11111|00000|01111|1|00000"}, + {"inst": "dsb #barrier_op" , "op": "11010101|000|00|011|0011|CRm|101|11111" , "imm": "ImmDataBarrier(barrier_op)", "ext": "XS"}, + {"inst": "eon Wd, Wn, Wm, {sop #n}" , "op": "01001010|sop:2|1|Rm|n:6|Rn|Rd"}, + {"inst": "eon Xd, Xn, Xm, {sop #n}" , "op": "11001010|sop:2|1|Rm|n:6|Rn|Rd"}, + {"inst": "eor Wd, Wn, Wm, {sop #n}" , "op": "01001010|sop:2|0|Rm|n:6|Rn|Rd"}, + {"inst": "eor Xd, Xn, Xm, {sop #n}" , "op": "11001010|sop:2|0|Rm|n:6|Rn|Rd"}, + {"inst": "eor Wd|WSP, Wn, #imm" , "op": "01010010|0|imm:13|Rn|Rd" , "imm": "LogicalImm(imm, 0)"}, + {"inst": "eor Xd|SP, Xn, #imm" , "op": "11010010|0|imm:13|Rn|Rd" , "imm": "LogicalImm(imm, 1)"}, + {"inst": "eret" , "op": "11010110|100|11111|0000|00|11111|00000"}, + {"inst": "extr Wd, Wn, Wm, #imm" , "op": "00010011|100|Rm|0|imm:5|Rn|Rd"}, + {"inst": "extr Xd, Xn, Xm, #imm" , "op": "10010011|110|Rm|imm:6|Rn|Rd"}, + {"inst": "hint #imm" , "op": "11010101|000|00|011|0010|imm:7|11111"}, + {"inst": "hlt #imm" , "op": "11010100|010|imm:16|00000"}, + {"inst": "hvc #imm" , "op": "11010100|000|imm:16|00010"}, + {"inst": "ic #ic_op" , "op": "11010101|000|01|op1:3|0111|CRm|op2:3|11111" , "imm": "ImmIC(ic_op)"}, + {"inst": "ic #ic_op, Xt" , "op": "11010101|000|01|op1:3|0111|CRm|op2:3|Rt" , "imm": "ImmIC(ic_op)"}, + {"inst": "isb {#isb_op=15}" , "op": "11010101|000|00|011|0011|CRm|110|11111" , "imm": "ImmISB(isb_op)"}, + {"inst": "ldar Wd, [Xn|SP]" , "op": "10001000|110|11111|1|11111|Rn|Rd"}, + {"inst": "ldar Xd, [Xn|SP]" , "op": "11001000|110|11111|1|11111|Rn|Rd"}, + {"inst": "ldarb Wd, [Xn|SP]" , "op": "00001000|110|11111|1|11111|Rn|Rd"}, + {"inst": "ldarh Wd, [Xn|SP]" , "op": "01001000|110|11111|1|11111|Rn|Rd"}, + {"inst": "ldaxp Wd, Wd2, [Xn|SP]" , "op": "10001000|011|11111|1|Rd2|Rn|Rd"}, + {"inst": "ldaxp Xd, Xd2, [Xn|SP]" , "op": "11001000|011|11111|1|Rd2|Rn|Rd"}, + {"inst": "ldaxr Wd, [Xn|SP]" , "op": "10001000|010|11111|1|11111|Rn|Rd"}, + {"inst": "ldaxr Xd, [Xn|SP]" , "op": "11001000|010|11111|1|11111|Rn|Rd"}, + {"inst": "ldaxrb Wd, [Xn|SP]" , "op": "00001000|010|11111|1|11111|Rn|Rd"}, + {"inst": "ldaxrh Xd, [Xn|SP]" , "op": "01001000|010|11111|1|11111|Rn|Rd"}, + {"inst": "ldnp Wd, Wd2, [Xn|SP, #soff*4]" , "op": "00101000|01|soff:7|Rd2|Rn|Rd"}, + {"inst": "ldnp Xd, Xd2, [Xn|SP, #soff*8]" , "op": "10101000|01|soff:7|Rd2|Rn|Rd"}, + {"inst": "ldp Wd, Wd2, [Xn|SP, #soff*4]{@}{!}" , "op": "0010100|!post|W|1|soff:7|Rd2|Rn|Rd"}, + {"inst": "ldp Xd, Xd2, [Xn|SP, #soff*8]{@}{!}" , "op": "1010100|!post|W|1|soff:7|Rd2|Rn|Rd"}, + {"inst": "ldpsw Xd, Xd2, [Xn|SP, #soff*4]{@}{!}" , "op": "0110100|!post|W|1|soff:7|Rd2|Rn|Rd"}, + {"inst": "ldr Wd, [Xn|SP, #zoff*4]" , "op": "10111001|01|zoff:12|Rn|Rd"}, + {"inst": "ldr Xd, [Xn|SP, #zoff*8]" , "op": "11111001|01|zoff:12|Rn|Rd"}, + {"inst": "ldr Wd, [Xn|SP, #soff*4]@" , "op": "10111000|010|soff:9|01|Rn|Rd"}, + {"inst": "ldr Xd, [Xn|SP, #soff*8]@" , "op": "11111000|010|soff:9|01|Rn|Rd"}, + {"inst": "ldr Wd, [Xn|SP, #soff*4]!" , "op": "10111000|010|soff:9|11|Rn|Rd"}, + {"inst": "ldr Xd, [Xn|SP, #soff*8]!" , "op": "11111000|010|soff:9|11|Rn|Rd"}, + {"inst": "ldr Wd, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "10111000|011|Rm|option:3|s:1|10|Rn|Rd" , "imm": "ImmLDR(iop, n)"}, + {"inst": "ldr Xd, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "11111000|011|Rm|option:3|s:1|10|Rn|Rd" , "imm": "ImmLDR(iop, n)"}, + {"inst": "ldr Wd, [PC, #soff*4]" , "op": "00011000|soff:19|Rd"}, + {"inst": "ldr Xd, [PC, #soff*4]" , "op": "01011000|soff:19|Rd"}, + {"inst": "ldrb Wd, [Xn|SP, #zoff]" , "op": "00111001|01|zoff:12|Rn|Rd"}, + {"inst": "ldrb Wd, [Xn|SP, #soff]@" , "op": "00111000|010|soff:9|01|Rn|Rd"}, + {"inst": "ldrb Wd, [Xn|SP, #soff]!" , "op": "00111000|010|soff:9|11|Rn|Rd"}, + {"inst": "ldrb Wd, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "00111000|011|Rm|option:3|s:1|10|Rn|Rd" , "imm": "ImmLDRB(iop, n)"}, + {"inst": "ldrh Wd, [Xn|SP, #zoff*2]" , "op": "01111001|01|zoff:12|Rn|Rd"}, + {"inst": "ldrh Wd, [Xn|SP, #soff*2]@" , "op": "01111000|010|soff:9|01|Rn|Rd"}, + {"inst": "ldrh Wd, [Xn|SP, #soff*2]!" , "op": "01111000|010|soff:9|11|Rn|Rd"}, + {"inst": "ldrh Wd, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "01111000|011|Rm|option:3|s:1|10|Rn|Rd" , "imm": "ImmLDRH(iop, n)"}, + {"inst": "ldrsb Wd, [Xn|SP, #zoff]" , "op": "00111001|11|zoff:12|Rn|Rd"}, + {"inst": "ldrsb Xd, [Xn|SP, #zoff]" , "op": "00111001|10|zoff:12|Rn|Rd"}, + {"inst": "ldrsb Wd, [Xn|SP, #soff]@" , "op": "00111000|110|soff:9|01|Rn|Rd"}, + {"inst": "ldrsb Xd, [Xn|SP, #soff]@" , "op": "00111000|100|soff:9|01|Rn|Rd"}, + {"inst": "ldrsb Wd, [Xn|SP, #soff]!" , "op": "00111000|110|soff:9|11|Rn|Rd"}, + {"inst": "ldrsb Xd, [Xn|SP, #soff]!" , "op": "00111000|100|soff:9|11|Rn|Rd"}, + {"inst": "ldrsb Wd, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "00111000|111|Rm|option:3|s:1|10|Rn|Rd" , "imm": "ImmLDRB(iop, n)"}, + {"inst": "ldrsb Xd, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "00111000|101|Rm|option:3|s:1|10|Rn|Rd" , "imm": "ImmLDRB(iop, n)"}, + {"inst": "ldrsh Wd, [Xn|SP, #zoff*2]" , "op": "01111001|11|zoff:12|Rn|Rd"}, + {"inst": "ldrsh Xd, [Xn|SP, #zoff*2]" , "op": "01111001|10|zoff:12|Rn|Rd"}, + {"inst": "ldrsh Wd, [Xn|SP, #soff*2]@" , "op": "01111000|110|soff:9|01|Rn|Rd"}, + {"inst": "ldrsh Xd, [Xn|SP, #soff*2]@" , "op": "01111000|100|soff:9|01|Rn|Rd"}, + {"inst": "ldrsh Wd, [Xn|SP, #soff*2]!" , "op": "01111000|110|soff:9|11|Rn|Rd"}, + {"inst": "ldrsh Xd, [Xn|SP, #soff*2]!" , "op": "01111000|100|soff:9|11|Rn|Rd"}, + {"inst": "ldrsh Wd, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "01111000|111|Rm|option:3|s:1|10|Rn|Rd" , "imm": "ImmLDRH(iop, n)"}, + {"inst": "ldrsh Xd, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "01111000|101|Rm|option:3|s:1|10|Rn|Rd" , "imm": "ImmLDRH(iop, n)"}, + {"inst": "ldrsw Xd, [Xn|SP, #zoff*4]" , "op": "10111001|10|zoff:12|Rn|Rd"}, + {"inst": "ldrsw Xd, [Xn|SP, #soff*4]@" , "op": "10111000|100|soff:9|01|Rn|Rd"}, + {"inst": "ldrsw Xd, [Xn|SP, #soff*4]!" , "op": "10111000|100|soff:9|11|Rn|Rd"}, + {"inst": "ldrsw Xd, [PC, #soff*4]" , "op": "10011000|soff:19|Rd"}, + {"inst": "ldrsw Xd, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "10111000|101|Rm|option:3|s:1|10|Rn|Rd" , "imm": "ImmLDRW(iop, n)"}, + {"inst": "ldtr Wd, [Xn|SP, #soff]" , "op": "10111000|010|soff:9|10|Rn|Rd"}, + {"inst": "ldtr Xd, [Xn|SP, #soff]" , "op": "11111000|010|soff:9|10|Rn|Rd"}, + {"inst": "ldtrb Wd, [Xn|SP, #soff]" , "op": "00111000|010|soff:9|10|Rn|Rd"}, + {"inst": "ldtrh Wd, [Xn|SP, #soff]" , "op": "01111000|010|soff:9|10|Rn|Rd"}, + {"inst": "ldtrsb Wd, [Xn|SP, #soff]" , "op": "00111000|100|soff:9|10|Rn|Rd"}, + {"inst": "ldtrsb Xd, [Xn|SP, #soff]" , "op": "00111000|110|soff:9|10|Rn|Rd"}, + {"inst": "ldtrsh Wd, [Xn|SP, #soff]" , "op": "01111000|100|soff:9|10|Rn|Rd"}, + {"inst": "ldtrsh Xd, [Xn|SP, #soff]" , "op": "01111000|110|soff:9|10|Rn|Rd"}, + {"inst": "ldtrsw Xd, [Xn|SP, #soff]" , "op": "10111000|100|soff:9|10|Rn|Rd"}, + {"inst": "ldur Wd, [Xn|SP, #soff]" , "op": "10111000|010|soff:9|00|Rn|Rd"}, + {"inst": "ldur Xd, [Xn|SP, #soff]" , "op": "11111000|010|soff:9|00|Rn|Rd"}, + {"inst": "ldurb Wd, [Xn|SP, #soff]" , "op": "00111000|010|soff:9|00|Rn|Rd"}, + {"inst": "ldurh Wd, [Xn|SP, #soff]" , "op": "01111000|010|soff:9|00|Rn|Rd"}, + {"inst": "ldursb Wd, [Xn|SP, #soff]" , "op": "00111000|100|soff:9|00|Rn|Rd"}, + {"inst": "ldursb Xd, [Xn|SP, #soff]" , "op": "00111000|110|soff:9|00|Rn|Rd"}, + {"inst": "ldursh Wd, [Xn|SP, #soff]" , "op": "01111000|100|soff:9|00|Rn|Rd"}, + {"inst": "ldursh Xd, [Xn|SP, #soff]" , "op": "01111000|110|soff:9|00|Rn|Rd"}, + {"inst": "ldursw Xd, [Xn|SP, #soff]" , "op": "10111000|100|soff:9|00|Rn|Rd"}, + {"inst": "ldxp Wd, Wd2, [Xn|SP, #soff*4]" , "op": "10001000|011|11111|0|Rd2|Rn|Rd"}, + {"inst": "ldxp Xd, Xd2, [Xn|SP, #soff*8]" , "op": "11001000|011|11111|0|Rd2|Rn|Rd"}, + {"inst": "ldxr Wd, [Xn|SP]" , "op": "10001000|010|11111|0|11111|Rn|Rd"}, + {"inst": "ldxr Xd, [Xn|SP]" , "op": "11001000|010|11111|0|11111|Rn|Rd"}, + {"inst": "ldxrb Wd, [Xn|SP]" , "op": "00001000|010|11111|0|11111|Rn|Rd"}, + {"inst": "ldxrh Wd, [Xn|SP]" , "op": "01001000|010|11111|0|11111|Rn|Rd"}, + {"inst": "lsl|lslv Wd, Wn, Wm" , "op": "00011010|110|Rm|001000|Rn|Rd"}, + {"inst": "lsl|lslv Xd, Xn, Xm" , "op": "10011010|110|Rm|001000|Rn|Rd"}, + {"inst": "lsl Wd, Wn, #n" , "op": "01010011|00|immr:6|imms:6|Rn|Rd"}, + {"inst": "lsl Xd, Xn, #n" , "op": "11010011|01|immr:6|imms:6|Rn|Rd"}, + {"inst": "lsr|lsrv Wd, Wn, Wm" , "op": "00011010|110|Rm|001001|Rn|Rd"}, + {"inst": "lsr|lsrv Xd, Xn, Xm" , "op": "10011010|110|Rm|001001|Rn|Rd"}, + {"inst": "lsr Wd, Wn, #n" , "op": "01010011|00|immr:6|011111|Rn|Rd"}, + {"inst": "lsr Xd, Xn, #n" , "op": "11010011|01|immr:6|111111|Rn|Rd"}, + {"inst": "madd Wd, Wn, Wm, Wa" , "op": "00011011|000|Rm|0|Ra|Rn|Rd"}, + {"inst": "madd Xd, Xn, Xm, Xa" , "op": "10011011|000|Rm|0|Ra|Rn|Rd"}, + {"inst": "mneg Wd, Wn, Wm" , "op": "00011011|000|Rm|1|11111|Rn|Rd"}, + {"inst": "mneg Xd, Xn, Xm" , "op": "10011011|000|Rm|1|11111|Rn|Rd"}, + {"inst": "mov Wd, Wm" , "op": "00101010|000|Rm|0|00000|11111|Rd"}, + {"inst": "mov Xd, Xm" , "op": "10101010|000|Rm|0|00000|11111|Rd"}, + {"inst": "mov Wd|WSP, Wn|WSP" , "op": "00010001|000|00000|0|00000|Rn|Rd"}, + {"inst": "mov Xd|SP, Xn|SP" , "op": "10010001|000|00000|0|00000|Rn|Rd"}, + {"inst": "mov Wd, #imm" , "op": "01010010|1|hw:2|imm:16|Rd" , "imm": "ImmWide(imm, 0, 0)"}, + {"inst": "mov Xd, #imm" , "op": "11010010|1|hw:2|imm:16|Rd" , "imm": "ImmWide(imm, 0, 1)"}, + {"inst": "mov Wd, #imm" , "op": "00010010|1|hw:2|imm:16|Rd" , "imm": "ImmWideInv(imm, 0, 0)"}, + {"inst": "mov Xd, #imm" , "op": "10010010|1|hw:2|imm:16|Rd" , "imm": "ImmWideInv(imm, 0, 1)"}, + {"inst": "mov Wd|WSP, #log_imm" , "op": "00110010|00|immr:6|imms:6|11111|Rd" , "imm": "ImmLogical(log_imm, 0)"}, + {"inst": "mov Xd|SP, #log_imm" , "op": "10110010|01|immr:6|imms:6|11111|Rd" , "imm": "ImmLogical(log_imm, 1)"}, + {"inst": "movk Wd, #imm, {lsl #n}" , "op": "01110010|1|hw:2|imm:16|Rd" , "imm": "ImmWide(imm, n, 0)"}, + {"inst": "movk Xd, #imm, {lsl #n}" , "op": "11110010|1|hw:2|imm:16|Rd" , "imm": "ImmWide(imm, n, 1)"}, + {"inst": "movn Wd, #imm, {lsl #n}" , "op": "00010010|1|hw:2|imm:16|Rd" , "imm": "ImmWideInv(imm, n, 0)"}, + {"inst": "movn Xd, #imm, {lsl #n}" , "op": "10010010|1|hw:2|imm:16|Rd" , "imm": "ImmWideInv(imm, n, 1)"}, + {"inst": "movz Wd, #imm, {lsl #n}" , "op": "01010010|1|hw:2|imm:16|Rd" , "imm": "ImmWide(imm, n, 0)"}, + {"inst": "movz Xd, #imm, {lsl #n}" , "op": "11010010|1|hw:2|imm:16|Rd" , "imm": "ImmWide(imm, n, 1)"}, + {"inst": "mrs Xd, #sysreg" , "op": "11010101|001|1|sysreg:15|Rd"}, + {"inst": "msr #sysreg, Xs" , "op": "11010101|000|1|sysreg:15|Rs"}, + {"inst": "msr #pstatefield, #imm" , "op": "11010101|000|00|op1:3|0100|imm:4|op2:3|11111" , "imm": "ImmMSR(pstatefield)"}, + {"inst": "msub Wd, Wn, Wm, Wa" , "op": "00011011|000|Rm|1|Ra|Rn|Rd"}, + {"inst": "msub Xd, Xn, Xm, Xa" , "op": "10011011|000|Rm|1|Ra|Rn|Rd"}, + {"inst": "mul Wd, Wn, Wm" , "op": "00011011|000|Rm|0|11111|Rn|Rd"}, + {"inst": "mul Xd, Xn, Xm" , "op": "10011011|000|Rm|0|11111|Rn|Rd"}, + {"inst": "mvn Wd, Wn, {sop #n}" , "op": "X0101010|sop|1|Rn|n:6|Rn|Rd"}, + {"inst": "mvn Xd, Xn, {sop #n}" , "op": "X0101010|sop|1|Rn|n:6|Rn|Rd"}, + {"inst": "neg Wd, Wm, {lsl|lsr|asr #n}" , "op": "01001011|sop:2|0|Rm|n:6|11111|Rd"}, + {"inst": "neg Xd, Xm, {lsl|lsr|asr #n}" , "op": "11001011|sop:2|0|Rm|n:6|11111|Rd"}, + {"inst": "negs Wd, Wm, {lsl|lsr|asr #n}" , "op": "01101011|sop:2|0|Rm|n:6|11111|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "negs Xd, Xm, {lsl|lsr|asr #n}" , "op": "11101011|sop:2|0|Rm|n:6|11111|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "ngc Wd, Wm" , "op": "01011010|000|Rm|0|00000|11111|Rd" , "io": "C=R"}, + {"inst": "ngc Xd, Xm" , "op": "11011010|000|Rm|0|00000|11111|Rd" , "io": "C=R"}, + {"inst": "ngcs Wd, Wm" , "op": "01111010|000|Rm|0|00000|11111|Rd" , "io": "N=W Z=W C=X V=W"}, + {"inst": "ngcs Xd, Xm" , "op": "11111010|000|Rm|0|00000|11111|Rd" , "io": "N=W Z=W C=X V=W"}, + {"inst": "nop" , "op": "11010101|00|000011|0010|0000|000|11111"}, + {"inst": "orn Wd, Wn, Wm, {sop #n}" , "op": "00101010|sop:2|1|Rm|n:6|Rn|Rd"}, + {"inst": "orn Xd, Xn, Xm, {sop #n}" , "op": "10101010|sop:2|1|Rm|n:6|Rn|Rd"}, + {"inst": "orr Wd, Wn, Wm, {sop #n}" , "op": "00101010|sop:2|0|Rm|n:6|Rn|Rd"}, + {"inst": "orr Xd, Xn, Xm, {sop #n}" , "op": "10101010|sop:2|0|Rm|n:6|Rn|Rd"}, + {"inst": "orr Wd|WSP, Wn, #log_imm" , "op": "00110010|0|imm:13|Rn|Rd" , "imm": "ImmLogical(log_imm, 0)"}, + {"inst": "orr Xd|SP, Xn, #log_imm" , "op": "10110010|0|imm:13|Rn|Rd" , "imm": "ImmLogical(log_imm, 1)"}, + {"inst": "prfm #prf_op, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n*8}]" , "op": "11111000|101|Rm|option:3|n:1|10|Rn|prf_op:5" , "imm": "ImmPRF(prf_op)"}, + {"inst": "prfm #prf_op, [Xn|SP, #zoff]" , "op": "11111001|10|zoff:12|Rn|prf_op:5" , "imm": "ImmPRF(prf_op)"}, + {"inst": "prfm #prf_op, [PC, #soff*4]" , "op": "11011000|soff:19|prf_op:5" , "imm": "ImmPRF(prf_op)"}, + {"inst": "prfum #prf_op, [Xn|SP, #soff]" , "op": "11111000|100|soff:9|00|Rn|prf_op:5" , "imm": "ImmPRF(prf_op)"}, + {"inst": "pssbb" , "op": "11010101|000|00011|0011|0100|100|11111"}, + {"inst": "rbit Wd, Wn" , "op": "01011010|110|00000|0|00000|Rn|Rd"}, + {"inst": "rbit Xd, Xn" , "op": "11011010|110|00000|0|00000|Rn|Rd"}, + {"inst": "ret Xn" , "op": "11010100|010|11111|0|00000|Rn|00000" , "control": "return"}, + {"inst": "rev Wd, Wn" , "op": "01011010|110|00000|0|00010|Rn|Rd"}, + {"inst": "rev|rev64 Xd, Xn" , "op": "11011010|110|00000|0|00011|Rn|Rd"}, + {"inst": "rev16 Wd, Wn" , "op": "01011010|110|00000|0|00001|Rn|Rd"}, + {"inst": "rev16 Xd, Xn" , "op": "11011010|110|00000|0|00001|Rn|Rd"}, + {"inst": "rev32 Xd, Xn" , "op": "11011010|110|00000|0|00010|Rn|Rd"}, + {"inst": "ror|rorv Wd, Wn, Wm" , "op": "00011010|110|Rm|0|01011|Rn|Rd"}, + {"inst": "ror|rorv Xd, Xn, Xm" , "op": "10011010|110|Rm|0|01011|Rn|Rd"}, + {"inst": "ror Wd, Wn, #n" , "op": "00010011|100|Rn|n:6|Rn|Rd"}, + {"inst": "ror Xd, Xn, #n" , "op": "10010011|111|Rn|n:6|Rn|Rd"}, + {"inst": "sbc Wd, Wn, Wm" , "op": "01011010|000|Rm|0|00000|Rn|Rd" , "io": "C=R"}, + {"inst": "sbc Xd, Xn, Xm" , "op": "11011010|000|Rm|0|00000|Rn|Rd" , "io": "C=R"}, + {"inst": "sbcs Wd, Wn, Wm" , "op": "01111010|000|Rm|0|00000|Rn|Rd" , "io": "N=W Z=W C=X V=W"}, + {"inst": "sbcs Xd, Xn, Xm" , "op": "11111010|000|Rm|0|00000|Rn|Rd" , "io": "N=W Z=W C=X V=W"}, + {"inst": "sbfiz Wd, Wn, #lsb, #width" , "op": "00010011|00|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFIZ(lsb, width, 0)"}, + {"inst": "sbfiz Xd, Xn, #lsb, #width" , "op": "10010011|01|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFIZ(lsb, width, 1)"}, + {"inst": "sbfm Wd, Wn, #immr, #imms" , "op": "00010011|00|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFM(immr, imms, 0)"}, + {"inst": "sbfm Xd, Xn, #immr, #imms" , "op": "10010011|01|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFM(immr, imms, 1)"}, + {"inst": "sbfx Wd, Wn, #lsb, #width" , "op": "00010011|00|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFX(lsb, width, 0)"}, + {"inst": "sbfx Xd, Xn, #lsb, #width" , "op": "10010011|01|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFX(lsb, width, 1)"}, + {"inst": "sdiv Wd, Wn, Wm" , "op": "00011010|110|Rm|0|00011|Rn|Rd"}, + {"inst": "sdiv Xd, Xn, Xm" , "op": "10011010|110|Rm|0|00011|Rn|Rd"}, + {"inst": "sev" , "op": "11010101|000|00011|0010|0000|100|11111"}, + {"inst": "sevl" , "op": "11010101|000|00011|0010|0000|101|11111"}, + {"inst": "smaddl Xd, Wn, Wm, Xa" , "op": "10011011|001|Rm|0|Ra|Rn|Rd"}, + {"inst": "smc #zimm" , "op": "11010100|000|zimm:16|00011"}, + {"inst": "smnegl Xd, Wn, Wm" , "op": "10011011|001|Rm|1|11111|Rn|Rd"}, + {"inst": "smsubl Xd, Wn, Wm, Xa" , "op": "10011011|001|Rm|1|Ra|Rn|Rd"}, + {"inst": "smulh Xd, Xn, Xm" , "op": "10011011|010|Rm|0|11111|Rn|Rd"}, + {"inst": "smull Xd, Wn, Wm" , "op": "10011011|001|Rm|0|11111|Rn|Rd"}, + {"inst": "ssbb" , "op": "11010101|000|00011|0011|0000|100|11111"}, + {"inst": "stlr Ws, [Xn|SP]" , "op": "10001000|100|11111|1|11111|Rn|Rs"}, + {"inst": "stlr Xs, [Xn|SP]" , "op": "11001000|100|11111|1|11111|Rn|Rs"}, + {"inst": "stlrb Ws, [Xn|SP]" , "op": "00001000|100|11111|1|11111|Rn|Rs"}, + {"inst": "stlrh Ws, [Xn|SP]" , "op": "01001000|100|11111|1|11111|Rn|Rs"}, + {"inst": "stlxp Wd, Ws, Ws2, [Xn|SP]" , "op": "10001000|001|Rd|1|Rs2|Rn|Rs"}, + {"inst": "stlxp Wd, Xs, Xs2, [Xn|SP]" , "op": "11001000|001|Rd|1|Rs2|Rn|Rs"}, + {"inst": "stlxr Wd, Ws, [Xn|SP]" , "op": "10001000|000|Rd|1|11111|Rn|Rs"}, + {"inst": "stlxr Wd, Xs, [Xn|SP]" , "op": "11001000|000|Rd|1|11111|Rn|Rs"}, + {"inst": "stlxrb Wd, Ws, [Xn|SP]" , "op": "00001000|000|Rd|1|11111|Rn|Rs"}, + {"inst": "stlxrh Wd, Xs, [Xn|SP]" , "op": "01001000|000|Rd|1|11111|Rn|Rs"}, + {"inst": "stnp Ws, Ws2, [Xn|SP, #simm*4]" , "op": "00101000|00|simm:7|Rs2|Rn|Rs"}, + {"inst": "stnp Xs, Xs2, [Xn|SP, #simm*8]" , "op": "10101000|00|simm:7|Rs2|Rn|Rs"}, + {"inst": "stp Ws, Ws2, [Xn|SP, #simm*4]{@}{!}" , "op": "0010100|!post|W|0|simm:7|Rs2|Rn|Rs"}, + {"inst": "stp Xs, Xs2, [Xn|SP, #simm*8]{@}{!}" , "op": "1010100|!post|W|0|simm:7|Rs2|Rn|Rs"}, + {"inst": "str Ws, [Xn|SP, #zoff*4]" , "op": "10111001|00|zoff:12|Rn|Rs"}, + {"inst": "str Xs, [Xn|SP, #zoff*8]" , "op": "11111001|00|zoff:12|Rn|Rs"}, + {"inst": "str Ws, [Xn|SP, #soff*4]@" , "op": "10111000|000|soff:9|01|Rn|Rs"}, + {"inst": "str Xs, [Xn|SP, #soff*8]@" , "op": "11111000|000|soff:9|01|Rn|Rs"}, + {"inst": "str Ws, [Xn|SP, #soff*4]!" , "op": "10111000|000|soff:9|11|Rn|Rs"}, + {"inst": "str Xs, [Xn|SP, #soff*8]!" , "op": "11111000|000|soff:9|11|Rn|Rs"}, + {"inst": "str Ws, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "10111000|001|Rm|option:3|s:1|10|Rn|Rs" , "imm": "ImmLDR_STR(iop, n)"}, + {"inst": "str Xs, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "11111000|001|Rm|option:3|s:1|10|Rn|Rs" , "imm": "ImmLDR_STR(iop, n)"}, + {"inst": "strb Ws, [Xn|SP, #zoff]" , "op": "00111001|00|zoff:12|Rn|Rs"}, + {"inst": "strb Ws, [Xn|SP, #soff]@" , "op": "00111000|000|soff:9|01|Rn|Rs"}, + {"inst": "strb Ws, [Xn|SP, #soff]!" , "op": "00111000|000|soff:9|11|Rn|Rs"}, + {"inst": "strb Ws, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "00111000|001|Rm|option:3|s:1|10|Rn|Rs" , "imm": "ImmLDRB_STRB(iop, n)"}, + {"inst": "strh Ws, [Xn|SP, #zoff*2]" , "op": "01111001|00|zoff:12|Rn|Rs"}, + {"inst": "strh Ws, [Xn|SP, #soff*2]@" , "op": "01111000|000|soff:9|01|Rn|Rs"}, + {"inst": "strh Ws, [Xn|SP, #soff*2]!" , "op": "01111000|000|soff:9|11|Rn|Rs"}, + {"inst": "strh Ws, [Xn|SP, Rm, {uxtw|lsl|sxtw|sxtx #n}]" , "op": "01111000|001|Rm|option:3|s:1|10|Rn|Rs" , "imm": "ImmLDRH_STRH(iop, n)"}, + {"inst": "sttr Ws, [Xn|SP, #soff]" , "op": "10111000|000|soff:9|10|Rn|Rs"}, + {"inst": "sttr Xs, [Xn|SP, #soff]" , "op": "11111000|000|soff:9|10|Rn|Rs"}, + {"inst": "sttrb Ws, [Xn|SP, #soff]" , "op": "00111000|000|soff:9|10|Rn|Rs"}, + {"inst": "sttrh Ws, [Xn|SP, #soff]" , "op": "01111000|000|soff:9|10|Rn|Rs"}, + {"inst": "stur Ws, [Xn|SP, #soff]" , "op": "10111000|000|soff:9|00|Rn|Rs"}, + {"inst": "stur Xs, [Xn|SP, #soff]" , "op": "11111000|000|soff:9|00|Rn|Rs"}, + {"inst": "sturb Ws, [Xn|SP, #soff]" , "op": "00111000|000|soff:9|00|Rn|Rs"}, + {"inst": "sturh Ws, [Xn|SP, #soff]" , "op": "01111000|000|soff:9|00|Rn|Rs"}, + {"inst": "stxp Wd, Ws, Ws2, [Xn|SP]" , "op": "10001000|001|Rd|0|Rs2|Rn|Rs"}, + {"inst": "stxp Wd, Xs, Xs2, [Xn|SP]" , "op": "11001000|001|Rd|0|Rs2|Rn|Rs"}, + {"inst": "stxr Wd, Ws, [Xn|SP]" , "op": "10001000|000|Rd|0|11111|Rn|Rs"}, + {"inst": "stxr Wd, Xs, [Xn|SP]" , "op": "11001000|000|Rd|0|11111|Rn|Rs"}, + {"inst": "stxrb Wd, Ws, [Xn|SP]" , "op": "00001000|000|Rd|0|11111|Rn|Rs"}, + {"inst": "stxrh Wd, Xs, [Xn|SP]" , "op": "01001000|000|Rd|0|11111|Rn|Rs"}, + {"inst": "sub Wd, Wn, Wm, {lsl|lsr|asr #n}" , "op": "01001011|sop:2|0|Rm|n:6|Rn|Rd"}, + {"inst": "sub Xd, Xn, Xm, {lsl|lsr|asr #n}" , "op": "11001011|sop:2|0|Rm|n:6|Rn|Rd"}, + {"inst": "sub Wd|WSP, Wn|WSP, Wm, {extend #n}" , "op": "01001011|00|1|Rm|option:3|n:3|Rn|Rd"}, + {"inst": "sub Xd|SP, Xn|SP, Rm, {extend #n}" , "op": "11001011|00|1|Rm|option:3|n:3|Rn|Rd"}, + {"inst": "sub Wd|WSP, Wn|WSP, #immZ, {lsl #n=0|12}" , "op": "01010001|0|n:1|immZ:12|Rn|Rd"}, + {"inst": "sub Xd|SP, Xn|SP, #immZ, {lsl #n=0|12}" , "op": "11010001|0|n:1|immZ:12|Rn|Rd"}, + {"inst": "subs Wd, Wn, Wm, {lsl|lsr|asr #n}" , "op": "01101011|sop:2|0|Rm|n:6|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "subs Xd, Xn, Xm, {lsl|lsr|asr #n}" , "op": "11101011|sop:2|0|Rm|n:6|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "subs Wd, Wn|WSP, Wm, {extend #n}" , "op": "01101011|00|1|Rm|option:3|n:3|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "subs Xd, Xn|SP, Rm, {extend #n}" , "op": "11101011|00|1|Rm|option:3|n:3|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "subs Wd|WSP, Wn|WSP, #immZ, {lsl #n=0|12}" , "op": "01110001|0|n:1|immZ:12|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "subs Xd|SP, Xn|SP, #immZ, {lsl #n=0|12}" , "op": "11110001|0|n:1|immZ:12|Rn|Rd" , "io": "N=W Z=W C=W V=W"}, + {"inst": "svc #zimm" , "op": "11010100|000|zimm:16|00001"}, + {"inst": "sxtb Wd, Wn" , "op": "00010011|000|00000|0|00111|Rn|Rd"}, + {"inst": "sxtb Xd, Wn" , "op": "10010011|010|00000|0|00111|Rn|Rd"}, + {"inst": "sxth Wd, Wn" , "op": "00010011|000|00000|0|01111|Rn|Rd"}, + {"inst": "sxth Xd, Wn" , "op": "10010011|010|00000|0|01111|Rn|Rd"}, + {"inst": "sxtw Xd, Wn" , "op": "10010011|010|00000|0|11111|Rn|Rd"}, + {"inst": "sys #op1, #Cn, #Cm, #op2" , "op": "11010101|000|01|op1:3|CRn|CRm|op2:3|11111"}, + {"inst": "sys #op1, #Cn, #Cm, #op2, Xt" , "op": "11010101|000|01|op1:3|CRn|CRm|op2:3|Rt"}, + {"inst": "sysl Xd, #op1, #Cn, #Cm, #op2" , "op": "11010101|001|01|op1:3|CRn|CRm|op2:3|Rd"}, + {"inst": "tbnz Wt, #imm, #relS*4" , "op": "00110111|imm:5|relS:14|Rt"}, + {"inst": "tbnz Xt, #imm, #relS*4" , "op": "imm:1|0110111|imm:5|relS:14|Rt"}, + {"inst": "tbz Wt, #imm, #relS*4" , "op": "00110110|imm:5|relS:14|Rt"}, + {"inst": "tbz Xt, #imm, #relS*4" , "op": "imm:1|0110110|imm:5|relS:14|Rt"}, + {"inst": "tlbi #tlbi_op" , "op": "11010101|00|001|op1:3|1000|CRm|op2:3|11111" , "imm": "ImmTLBI(tlbi_op)"}, + {"inst": "tlbi #tlbi_op, Xt" , "op": "11010101|00|001|op1:3|1000|CRm|op2:3|Rt" , "imm": "ImmTLBI(tlbi_op)"}, + {"inst": "tst Wn, Wm, {sop #n}" , "op": "01101010|sop:2|0|Rm|n:6|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "tst Xn, Xm, {sop #n}" , "op": "11101010|sop:2|0|Rm|n:6|Rn|11111" , "io": "N=W Z=W C=W V=W"}, + {"inst": "tst Wn, #imm" , "op": "01110010|0|imm:13|Rn|11111" , "io": "N=W Z=W C=W V=W", "imm": "LogicalImm(imm, 0)"}, + {"inst": "tst Xn, #imm" , "op": "11110010|0|imm:13|Rn|11111" , "io": "N=W Z=W C=W V=W", "imm": "LogicalImm(imm, 1)"}, + {"inst": "ubfiz Wd, Wn, #lsb, #width" , "op": "01010011|00|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFIZ(lsb, width, 0)"}, + {"inst": "ubfiz Xd, Xn, #lsb, #width" , "op": "11010011|01|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFIZ(lsb, width, 1)"}, + {"inst": "ubfm Wd, Wn, #immr, #imms" , "op": "01010011|00|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFM(immr, imms, 0)"}, + {"inst": "ubfm Xd, Xn, #immr, #imms" , "op": "11010011|01|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFM(immr, imms, 1)"}, + {"inst": "ubfx Wd, Wn, #lsb, #width" , "op": "01010011|00|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFX(lsb, width, 0)"}, + {"inst": "ubfx Xd, Xn, #lsb, #width" , "op": "11010011|01|immr:6|imms:6|Rn|Rd" , "imm": "ImmBFX(lsb, width, 1)"}, + {"inst": "udf #imm" , "op": "00000000|000|00000|imm:16"}, + {"inst": "udiv Wd, Wn, Wm" , "op": "00011010|110|Rm|0|00010|Rn|Rd"}, + {"inst": "udiv Xd, Xn, Xm" , "op": "10011010|110|Rm|0|00010|Rn|Rd"}, + {"inst": "umaddl Xd, Wn, Wm, Xa" , "op": "10011011|101|Rm|0|Ra|Rn|Rd"}, + {"inst": "umnegl Xd, Wn, Wm" , "op": "10011011|101|Rm|1|11111|Rn|Rd"}, + {"inst": "umsubl Xd, Wn, Wm, Xa" , "op": "10011011|101|Rm|1|Ra|Rn|Rd"}, + {"inst": "umulh Xd, Xn, Xm" , "op": "10011011|110|Rm|0|11111|Rn|Rd"}, + {"inst": "umull Xd, Wn, Wm" , "op": "10011011|101|Rm|0|11111|Rn|Rd"}, + {"inst": "uxtb Wd, Wn" , "op": "01010011|000|00000|0|00111|Rn|Rd"}, + {"inst": "uxth Wd, Wn" , "op": "01010011|000|00000|0|01111|Rn|Rd"}, + {"inst": "wfe" , "op": "11010101|000|00011|0010|0000|010|11111"}, + {"inst": "wfi" , "op": "11010101|000|00011|0010|0000|011|11111"}, + {"inst": "yield" , "op": "11010101|000|00011|0010|0000|001|11111"} + ]}, + + {"category": "GP GP_EXT", "ext": "BRBE", "data": [ + {"inst": "brb #brb_op" , "op": "11010101|000|01001|0111|0010|op2:3|11111" , "imm": "ImmBRB(beb_op)"}, + {"inst": "brb #brb_op, Xt" , "op": "11010101|000|01001|0111|0010|op2:3|Rt" , "imm": "ImmBRB(beb_op)"} + ]}, + + {"category": "GP GP_EXT", "ext": "BTI", "data": [ + {"inst": "bti {#targets}" , "op": "11010101|000|00011|0010|0100|op2:3|11111" , "imm": "ImmBTI(targets)"} + ]}, + + {"category": "GP GP_EXT", "ext": "CHK", "data": [ + {"inst": "chkfeat" , "op": "11010101|000|00011|0010|0101|000|11111"} + ]}, + + {"category": "GP GP_EXT", "ext": "CLRBHB", "data": [ + {"inst": "clrbhb" , "op": "11010101|000|00011|0010|0010|110|11111"} + ]}, + + {"category": "GP GP_EXT CRYPTO_HASH", "ext": "CRC32", "data": [ + {"inst": "crc32b Wd, Wn, Wm" , "op": "00011010|110|Rm|0|10000|Rn|Rd"}, + {"inst": "crc32h Wd, Wn, Wm" , "op": "00011010|110|Rm|0|10001|Rn|Rd"}, + {"inst": "crc32w Wd, Wn, Wm" , "op": "00011010|110|Rm|0|10010|Rn|Rd"}, + {"inst": "crc32x Xd, Xn, Xm" , "op": "10011010|110|Rm|0|10011|Rn|Rd"}, + + {"inst": "crc32cb Wd, Wn, Wm" , "op": "00011010|110|Rm|0|10100|Rn|Rd"}, + {"inst": "crc32ch Wd, Wn, Wm" , "op": "00011010|110|Rm|0|10101|Rn|Rd"}, + {"inst": "crc32cw Wd, Wn, Wm" , "op": "00011010|110|Rm|0|10110|Rn|Rd"}, + {"inst": "crc32cx Xd, Xn, Xm" , "op": "10011010|110|Rm|0|10111|Rn|Rd"} + ]}, + + {"category": "GP GP_EXT", "ext": "CSSC", "data": [ + {"inst": "abs Wd, Wn" , "op": "01011010|110|00000|0|01000|Rn|Rd"}, + {"inst": "abs Xd, Xn" , "op": "11011010|110|00000|0|01000|Rn|Rd"}, + {"inst": "cnt Wd, Wn" , "op": "01011010|110|00000|0|00111|Rn|Rd"}, + {"inst": "cnt Xd, Xn" , "op": "11011010|110|00000|0|00111|Rn|Rd"}, + {"inst": "ctz Wd, Wn" , "op": "01011010|110|00000|0|00110|Rn|Rd"}, + {"inst": "ctz Xd, Xn" , "op": "11011010|110|00000|0|00110|Rn|Rd"}, + {"inst": "smax Wd, Wn, Wm" , "op": "00011010|110|Rm|0|11000|Rn|Rd"}, + {"inst": "smax Xd, Xn, Xm" , "op": "10011010|110|Rm|0|11000|Rn|Rd"}, + {"inst": "smax Wd, Wn, #simm" , "op": "00010001|110|000|simm:8|Rn|Rd"}, + {"inst": "smax Xd, Xn, #simm" , "op": "10010001|110|000|simm:8|Rn|Rd"}, + {"inst": "smin Wd, Wn, Wm" , "op": "00011010|110|Rm|0|11010|Rn|Rd"}, + {"inst": "smin Xd, Xn, Xm" , "op": "10011010|110|Rm|0|11010|Rn|Rd"}, + {"inst": "smin Wd, Wn, #simm" , "op": "00010001|110|010|simm:8|Rn|Rd"}, + {"inst": "smin Xd, Xn, #simm" , "op": "10010001|110|010|simm:8|Rn|Rd"}, + {"inst": "umax Wd, Wn, Wm" , "op": "00011010|110|Rm|0|11001|Rn|Rd"}, + {"inst": "umax Xd, Xn, Xm" , "op": "10011010|110|Rm|0|11001|Rn|Rd"}, + {"inst": "umax Wd, Wn, #simm" , "op": "00010001|110|001|simm:8|Rn|Rd"}, + {"inst": "umax Xd, Xn, #simm" , "op": "10010001|110|001|simm:8|Rn|Rd"}, + {"inst": "umin Wd, Wn, Wm" , "op": "00011010|110|Rm|0|11011|Rn|Rd"}, + {"inst": "umin Xd, Xn, Xm" , "op": "10011010|110|Rm|0|11011|Rn|Rd"}, + {"inst": "umin Wd, Wn, #simm" , "op": "00010001|110|011|simm:8|Rn|Rd"}, + {"inst": "umin Xd, Xn, #simm" , "op": "10010001|110|011|simm:8|Rn|Rd"} + ]}, + + {"category": "GP GP_EXT", "ext": "D128", "data": [ + {"inst": "tlbip #tlbip_op, 2x{Xt}+" , "op": "11010101|010|01|op1:3|CRn|CRm|op2:3|Rt" , "imm": "ImmTLBIP(tlbip_op)"} + ]}, + + {"category": "GP GP_EXT", "ext": "DGH", "data": [ + {"inst": "dgh" , "op": "11010101|000|00|011|0010|0000|110|11111"} + ]}, + + {"category": "GP GP_EXT", "ext": "FLAGM", "data": [ + {"inst": "cfinv" , "op": "11010101|000|00000|0100|0000|000|11111" , "io": "C=X"}, + {"inst": "rmif Xn, #shift, #mask" , "op": "10111010|000|shift:6|00001|Rn|0|mask:4" , "io": "N=W Z=W C=W V=W"}, + {"inst": "setf16 Wn" , "op": "00111010|000|00000|0|10010|Rn|01101" , "io": "N=W Z=W V=W"}, + {"inst": "setf8 Wn" , "op": "00111010|000|00000|0|00010|Rn|01101" , "io": "N=W Z=W V=W"} + ]}, + + {"category": "GP GP_EXT", "ext": "FLAGM2", "data": [ + {"inst": "axflag" , "op": "11010101|000|00000|0100|0000|010|11111" , "io": "N=X Z=X C=X V=X"}, + {"inst": "xaflag" , "op": "11010101|000|00000|0100|0000|001|11111" , "io": "N=X Z=X C=X V=X"} + ]}, + + {"category": "GP GP_EXT", "ext": "GCS", "data": [ + {"inst": "gcsb #dsync" , "op": "11010101|000|00011|0010|0010|011|11111"}, + {"inst": "gcspopcx" , "op": "11010101|000|01000|0111|0111|101|11111"}, + {"inst": "gcspopcx Xt" , "op": "11010101|000|01000|0111|0111|101|Rt"}, + {"inst": "gcspopm Xt" , "op": "11010101|001|01011|0111|0111|001|Rt"}, + {"inst": "gcspopx" , "op": "11010101|000|01000|0111|0111|110|11111"}, + {"inst": "gcspopx Xt" , "op": "11010101|000|01000|0111|0111|110|Rt"}, + {"inst": "gcspushm Xt" , "op": "11010101|000|01011|0111|0111|000|Rt"}, + {"inst": "gcspushx" , "op": "11010101|000|01000|0111|0111|100|11111"}, + {"inst": "gcspushx Xt" , "op": "11010101|000|01000|0111|0111|100|Rt"}, + {"inst": "gcsss1 Xt" , "op": "11010101|000|01011|0111|0111|010|Rt"}, + {"inst": "gcsss2 Xt" , "op": "11010101|001|01011|0111|0111|011|Rt"}, + {"inst": "gcsstr Xs, [Xn|SP]" , "op": "11011001|000|11111|0|00011|Rn|Rs"}, + {"inst": "gcssttr Xs, [Xn|SP]" , "op": "11011001|000|11111|0|00111|Rn|Rs"} + ]}, + + {"category": "GP GP_EXT", "ext": "HBC", "data": [ + {"inst": "bc. #relS*4" , "op": "01010100|relS:19|1|cond" , "control": "branch", "io": "N=R Z=R C=R V=R"} + ]}, + + {"category": "GP GP_EXT", "ext": "ITE", "data": [ + {"inst": "trcit Xt" , "op": "11010101|000|01011|0111|0010|111|Rt"} + ]}, + + {"category": "GP GP_EXT", "ext": "LOR", "data": [ + {"inst": "ldlar Wd, [Xn|SP]" , "op": "10001000|110|11111|0|11111|Rn|Rd"}, + {"inst": "ldlar Xd, [Xn|SP]" , "op": "11001000|110|11111|0|11111|Rn|Rd"}, + {"inst": "ldlarb Wd, [Xn|SP]" , "op": "00001000|110|11111|0|11111|Rn|Rd"}, + {"inst": "ldlarh Wd, [Xn|SP]" , "op": "01001000|110|11111|0|11111|Rn|Rd"}, + {"inst": "stllr Ws, [Xn|SP]" , "op": "10001000|100|11111|0|11111|Rn|Rs"}, + {"inst": "stllr Xs, [Xn|SP]" , "op": "11001000|100|11111|0|11111|Rn|Rs"}, + {"inst": "stllrb Ws, [Xn|SP]" , "op": "00001000|100|11111|0|11111|Rn|Rs"}, + {"inst": "stllrh Ws, [Xn|SP]" , "op": "01001000|100|11111|0|11111|Rn|Rs"} + ]}, + + {"category": "GP GP_EXT", "ext": "LRCPC", "data": [ + {"inst": "ldapr Wd, [Xn|SP]" , "op": "10111000|101|11111|1|10000|Rn|Rd"}, + {"inst": "ldapr Xd, [Xn|SP]" , "op": "11111000|101|11111|1|10000|Rn|Rd"}, + {"inst": "ldaprb Wd, [Xn|SP]" , "op": "00111000|101|11111|1|10000|Rn|Rd"}, + {"inst": "ldaprh Wd, [Xn|SP]" , "op": "01111000|101|11111|1|10000|Rn|Rd"} + ]}, + + {"category": "GP GP_EXT", "ext": "LRCPC2", "data": [ + {"inst": "ldapur Wd, [Xn|SP, #soff]" , "op": "10011001|010|soff:9|00|Rn|Rd"}, + {"inst": "ldapur Xd, [Xn|SP, #soff]" , "op": "11011001|010|soff:9|00|Rn|Rd"}, + {"inst": "ldapurb Wd, [Xn|SP, #soff]" , "op": "00011001|010|soff:9|00|Rn|Rd"}, + {"inst": "ldapurh Wd, [Xn|SP, #soff]" , "op": "01011001|010|soff:9|00|Rn|Rd"}, + + {"inst": "ldapursb Wd, [Xn|SP, #soff]" , "op": "00011001|110|soff:9|00|Rn|Rd"}, + {"inst": "ldapursb Xd, [Xn|SP, #soff]" , "op": "00011001|100|soff:9|00|Rn|Rd"}, + {"inst": "ldapursh Wd, [Xn|SP, #soff]" , "op": "01011001|110|soff:9|00|Rn|Rd"}, + {"inst": "ldapursh Xd, [Xn|SP, #soff]" , "op": "01011001|100|soff:9|00|Rn|Rd"}, + {"inst": "ldapursw Xd, [Xn|SP, #soff]" , "op": "10011001|100|soff:9|00|Rn|Rd"}, + + {"inst": "stlur Ws, [Xn|SP, #soff]" , "op": "10011001|000|soff:9|00|Rn|Rs"}, + {"inst": "stlur Xs, [Xn|SP, #soff]" , "op": "11011001|000|soff:9|00|Rn|Rs"}, + {"inst": "stlurb Ws, [Xn|SP, #soff]" , "op": "00011001|000|soff:9|00|Rn|Rs"}, + {"inst": "stlurh Ws, [Xn|SP, #soff]" , "op": "01011001|000|soff:9|00|Rn|Rs"} + ]}, + + {"category": "GP GP_EXT", "ext": "LRCPC3", "data": [ + {"inst": "ldiapp Wd, Wd2, [Xn|SP]" , "op": "10011001|010|Rd2|0|00110|Rn|Rd"}, + {"inst": "ldiapp Wd, Wd2, [Xn|SP, #8]@" , "op": "10011001|010|Rd2|0|00010|Rn|Rd"}, + {"inst": "ldiapp Xd, Xd2, [Xn|SP]" , "op": "11011001|010|Rd2|0|00110|Rn|Rd"}, + {"inst": "ldiapp Xd, Xd2, [Xn|SP, #16]@" , "op": "11011001|010|Rd2|0|00010|Rn|Rd"}, + {"inst": "stilp Ws, Ws2, [Xn|SP]" , "op": "10011001|000|Rs2|0|00110|Rn|Rs"}, + {"inst": "stilp Ws, Ws2, [Xn|SP, #8]@" , "op": "10011001|000|Rs2|0|00010|Rn|Rs"}, + {"inst": "stilp Xs, Xs2, [Xn|SP]" , "op": "11011001|000|Rs2|0|00110|Rn|Rs"}, + {"inst": "stilp Xs, Xs2, [Xn|SP, #16]@" , "op": "11011001|000|Rs2|0|00010|Rn|Rs"} + ]}, + + {"category": "GP GP_EXT", "ext": "LS64", "data": [ + {"inst": "ld64b 8x{Xd}+, [Xn|SP]" , "op": "11111000|001|11111|1|10100|Rn|Rd"}, + {"inst": "st64b 8x{Xs}+, [Xn|SP]" , "op": "11111000|001|11111|1|00100|Rn|Rs"} + ]}, + + {"category": "GP GP_EXT", "ext": "LS64_ACCDATA", "data": [ + {"inst": "st64bv0 Rd, 8x{Xs}+, [Xn|SP]" , "op": "11111000|001|Rd|1|01000|Rn|Rs"} + ]}, + + {"category": "GP GP_EXT", "ext": "LS64_V", "data": [ + {"inst": "st64bv Rd, 8x{Xs}+, [Xn|SP]" , "op": "11111000|001|Rd|1|01100|Rn|Rs"} + ]}, + + {"category": "GP GP_EXT", "ext": "LSE", "data": [ + {"inst": "cas Ws, Wd, [Xn|SP]" , "op": "10001000|001|Rs|0|11111|Rn|Rd"}, + {"inst": "casa Ws, Wd, [Xn|SP]" , "op": "10001000|011|Rs|0|11111|Rn|Rd"}, + {"inst": "casal Ws, Wd, [Xn|SP]" , "op": "10001000|011|Rs|1|11111|Rn|Rd"}, + {"inst": "casl Ws, Wd, [Xn|SP]" , "op": "10001000|001|Rs|1|11111|Rn|Rd"}, + {"inst": "cas Xs, Xd, [Xn|SP]" , "op": "11001000|001|Rs|0|11111|Rn|Rd"}, + {"inst": "casa Xs, Xd, [Xn|SP]" , "op": "11001000|011|Rs|0|11111|Rn|Rd"}, + {"inst": "casal Xs, Xd, [Xn|SP]" , "op": "11001000|011|Rs|1|11111|Rn|Rd"}, + {"inst": "casl Xs, Xd, [Xn|SP]" , "op": "11001000|001|Rs|1|11111|Rn|Rd"}, + {"inst": "casab Ws, Wd, [Xn|SP]" , "op": "00001000|111|Rs|0|11111|Rn|Rd"}, + {"inst": "casalb Ws, Wd, [Xn|SP]" , "op": "00001000|111|Rs|1|11111|Rn|Rd"}, + {"inst": "casb Ws, Wd, [Xn|SP]" , "op": "00001000|101|Rs|0|11111|Rn|Rd"}, + {"inst": "caslb Ws, Wd, [Xn|SP]" , "op": "00001000|101|Rs|1|11111|Rn|Rd"}, + {"inst": "casah Ws, Wd, [Xn|SP]" , "op": "01001000|111|Rs|0|11111|Rn|Rd"}, + {"inst": "casalh Ws, Wd, [Xn|SP]" , "op": "01001000|111|Rs|1|11111|Rn|Rd"}, + {"inst": "cash Ws, Wd, [Xn|SP]" , "op": "01001000|101|Rs|0|11111|Rn|Rd"}, + {"inst": "caslh Ws, Wd, [Xn|SP]" , "op": "01001000|101|Rs|1|11111|Rn|Rd"}, + {"inst": "casp 2x{Ws}+, 2x{Wd}+, [Xn|SP]" , "op": "00001000|001|Rs|0|11111|Rn|Rd"}, + {"inst": "caspa 2x{Ws}+, 2x{Wd}+, [Xn|SP]" , "op": "00001000|011|Rs|0|11111|Rn|Rd"}, + {"inst": "caspal 2x{Ws}+, 2x{Wd}+, [Xn|SP]" , "op": "00001000|011|Rs|1|11111|Rn|Rd"}, + {"inst": "caspl 2x{Ws}+, 2x{Wd}+, [Xn|SP]" , "op": "00001000|001|Rs|1|11111|Rn|Rd"}, + {"inst": "casp 2x{Xs}+, 2x{Xd}+, [Xn|SP]" , "op": "01001000|001|Rs|0|11111|Rn|Rd"}, + {"inst": "caspa 2x{Xs}+, 2x{Xd}+, [Xn|SP]" , "op": "01001000|011|Rs|0|11111|Rn|Rd"}, + {"inst": "caspal 2x{Xs}+, 2x{Xd}+, [Xn|SP]" , "op": "01001000|011|Rs|1|11111|Rn|Rd"}, + {"inst": "caspl 2x{Xs}+, 2x{Xd}+, [Xn|SP]" , "op": "01001000|001|Rs|1|11111|Rn|Rd"}, + {"inst": "ldadd Ws, Wd, [Xn|SP]" , "op": "10111000|001|Rs|0|00000|Rn|Rd"}, + {"inst": "ldadda Ws, Wd, [Xn|SP]" , "op": "10111000|101|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddal Ws, Wd, [Xn|SP]" , "op": "10111000|111|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddl Ws, Wd, [Xn|SP]" , "op": "10111000|011|Rs|0|00000|Rn|Rd"}, + {"inst": "ldadd Xs, Xd, [Xn|SP]" , "op": "11111000|001|Rs|0|00000|Rn|Rd"}, + {"inst": "ldadda Xs, Xd, [Xn|SP]" , "op": "11111000|101|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddal Xs, Xd, [Xn|SP]" , "op": "11111000|111|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddl Xs, Xd, [Xn|SP]" , "op": "11111000|011|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddb Ws, Wd, [Xn|SP]" , "op": "00111000|001|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddab Ws, Wd, [Xn|SP]" , "op": "00111000|101|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddalb Ws, Wd, [Xn|SP]" , "op": "00111000|111|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddlb Ws, Wd, [Xn|SP]" , "op": "00111000|011|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddh Ws, Wd, [Xn|SP]" , "op": "01111000|001|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddah Ws, Wd, [Xn|SP]" , "op": "01111000|101|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddalh Ws, Wd, [Xn|SP]" , "op": "01111000|111|Rs|0|00000|Rn|Rd"}, + {"inst": "ldaddlh Ws, Wd, [Xn|SP]" , "op": "01111000|011|Rs|0|00000|Rn|Rd"}, + {"inst": "ldclr Ws, Wd, [Xn|SP]" , "op": "10111000|001|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclra Ws, Wd, [Xn|SP]" , "op": "10111000|101|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclral Ws, Wd, [Xn|SP]" , "op": "10111000|111|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclrl Ws, Wd, [Xn|SP]" , "op": "10111000|011|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclr Xs, Xd, [Xn|SP]" , "op": "11111000|001|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclra Xs, Xd, [Xn|SP]" , "op": "11111000|101|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclral Xs, Xd, [Xn|SP]" , "op": "11111000|111|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclrl Xs, Xd, [Xn|SP]" , "op": "11111000|011|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclrb Ws, Wd, [Xn|SP]" , "op": "00111000|001|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclrab Ws, Wd, [Xn|SP]" , "op": "00111000|101|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclralb Ws, Wd, [Xn|SP]" , "op": "00111000|111|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclrlb Ws, Wd, [Xn|SP]" , "op": "00111000|011|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclrh Ws, Wd, [Xn|SP]" , "op": "01111000|001|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclrah Ws, Wd, [Xn|SP]" , "op": "01111000|101|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclralh Ws, Wd, [Xn|SP]" , "op": "01111000|111|Rs|0|00100|Rn|Rd"}, + {"inst": "ldclrlh Ws, Wd, [Xn|SP]" , "op": "01111000|011|Rs|0|00100|Rn|Rd"}, + {"inst": "ldeor Ws, Wd, [Xn|SP]" , "op": "10111000|001|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeora Ws, Wd, [Xn|SP]" , "op": "10111000|101|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeoral Ws, Wd, [Xn|SP]" , "op": "10111000|111|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeorl Ws, Wd, [Xn|SP]" , "op": "10111000|011|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeor Xs, Xd, [Xn|SP]" , "op": "11111000|001|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeora Xs, Xd, [Xn|SP]" , "op": "11111000|101|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeoral Xs, Xd, [Xn|SP]" , "op": "11111000|111|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeorl Xs, Xd, [Xn|SP]" , "op": "11111000|011|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeorb Ws, Wd, [Xn|SP]" , "op": "00111000|001|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeorab Ws, Wd, [Xn|SP]" , "op": "00111000|101|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeoralb Ws, Wd, [Xn|SP]" , "op": "00111000|111|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeorlb Ws, Wd, [Xn|SP]" , "op": "00111000|011|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeorh Ws, Wd, [Xn|SP]" , "op": "01111000|001|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeorah Ws, Wd, [Xn|SP]" , "op": "01111000|101|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeoralh Ws, Wd, [Xn|SP]" , "op": "01111000|111|Rs|0|01000|Rn|Rd"}, + {"inst": "ldeorlh Ws, Wd, [Xn|SP]" , "op": "01111000|011|Rs|0|01000|Rn|Rd"}, + {"inst": "ldset Ws, Wd, [Xn|SP]" , "op": "10111000|001|Rs|0|01100|Rn|Rd"}, + {"inst": "ldseta Ws, Wd, [Xn|SP]" , "op": "10111000|101|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetal Ws, Wd, [Xn|SP]" , "op": "10111000|111|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetl Ws, Wd, [Xn|SP]" , "op": "10111000|011|Rs|0|01100|Rn|Rd"}, + {"inst": "ldset Xs, Wd, [Xn|SP]" , "op": "11111000|001|Rs|0|01100|Rn|Rd"}, + {"inst": "ldseta Xs, Wd, [Xn|SP]" , "op": "11111000|101|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetal Xs, Wd, [Xn|SP]" , "op": "11111000|111|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetl Xs, Wd, [Xn|SP]" , "op": "11111000|011|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetb Ws, Wd, [Xn|SP]" , "op": "00111000|001|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetab Ws, Wd, [Xn|SP]" , "op": "00111000|101|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetalb Ws, Wd, [Xn|SP]" , "op": "00111000|111|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetlb Ws, Wd, [Xn|SP]" , "op": "00111000|011|Rs|0|01100|Rn|Rd"}, + {"inst": "ldseth Ws, Wd, [Xn|SP]" , "op": "01111000|001|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetah Ws, Wd, [Xn|SP]" , "op": "01111000|101|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetalh Ws, Wd, [Xn|SP]" , "op": "01111000|111|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsetlh Ws, Wd, [Xn|SP]" , "op": "01111000|011|Rs|0|01100|Rn|Rd"}, + {"inst": "ldsmax Ws, Wd, [Xn|SP]" , "op": "10111000|001|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxa Ws, Wd, [Xn|SP]" , "op": "10111000|101|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxal Ws, Wd, [Xn|SP]" , "op": "10111000|111|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxl Ws, Wd, [Xn|SP]" , "op": "10111000|011|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmax Xs, Xd, [Xn|SP]" , "op": "11111000|001|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxa Xs, Xd, [Xn|SP]" , "op": "11111000|101|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxal Xs, Xd, [Xn|SP]" , "op": "11111000|111|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxl Xs, Xd, [Xn|SP]" , "op": "11111000|011|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxb Ws, Wd, [Xn|SP]" , "op": "00111000|001|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxab Ws, Wd, [Xn|SP]" , "op": "00111000|101|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxalb Ws, Wd, [Xn|SP]" , "op": "00111000|111|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxlb Ws, Wd, [Xn|SP]" , "op": "00111000|011|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxh Ws, Wd, [Xn|SP]" , "op": "01111000|001|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxah Ws, Wd, [Xn|SP]" , "op": "01111000|101|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxalh Ws, Wd, [Xn|SP]" , "op": "01111000|111|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmaxlh Ws, Wd, [Xn|SP]" , "op": "01111000|011|Rs|0|10000|Rn|Rd"}, + {"inst": "ldsmin Ws, Wd, [Xn|SP]" , "op": "10111000|001|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsmina Ws, Wd, [Xn|SP]" , "op": "10111000|101|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminal Ws, Wd, [Xn|SP]" , "op": "10111000|111|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminl Ws, Wd, [Xn|SP]" , "op": "10111000|011|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsmin Xs, Xd, [Xn|SP]" , "op": "11111000|001|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsmina Xs, Xd, [Xn|SP]" , "op": "11111000|101|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminal Xs, Xd, [Xn|SP]" , "op": "11111000|111|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminl Xs, Xd, [Xn|SP]" , "op": "11111000|011|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminb Ws, Wd, [Xn|SP]" , "op": "00111000|001|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminab Ws, Wd, [Xn|SP]" , "op": "00111000|101|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminalb Ws, Wd, [Xn|SP]" , "op": "00111000|111|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminlb Ws, Wd, [Xn|SP]" , "op": "00111000|011|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminh Ws, Wd, [Xn|SP]" , "op": "01111000|001|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminah Ws, Wd, [Xn|SP]" , "op": "01111000|101|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminalh Ws, Wd, [Xn|SP]" , "op": "01111000|111|Rs|0|10100|Rn|Rd"}, + {"inst": "ldsminlh Ws, Wd, [Xn|SP]" , "op": "01111000|011|Rs|0|10100|Rn|Rd"}, + {"inst": "ldumax Ws, Wd, [Xn|SP]" , "op": "10111000|001|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxa Ws, Wd, [Xn|SP]" , "op": "10111000|101|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxal Ws, Wd, [Xn|SP]" , "op": "10111000|111|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxl Ws, Wd, [Xn|SP]" , "op": "10111000|011|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumax Xs, Xd, [Xn|SP]" , "op": "11111000|001|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxa Xs, Xd, [Xn|SP]" , "op": "11111000|101|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxal Xs, Xd, [Xn|SP]" , "op": "11111000|111|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxl Xs, Xd, [Xn|SP]" , "op": "11111000|011|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxb Ws, Wd, [Xn|SP]" , "op": "00111000|001|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxab Ws, Wd, [Xn|SP]" , "op": "00111000|101|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxalb Ws, Wd, [Xn|SP]" , "op": "00111000|111|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxlb Ws, Wd, [Xn|SP]" , "op": "00111000|011|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxh Ws, Wd, [Xn|SP]" , "op": "01111000|001|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxah Ws, Wd, [Xn|SP]" , "op": "01111000|101|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxalh Ws, Wd, [Xn|SP]" , "op": "01111000|111|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumaxlh Ws, Wd, [Xn|SP]" , "op": "01111000|011|Rs|0|11000|Rn|Rd"}, + {"inst": "ldumin Ws, Wd, [Xn|SP]" , "op": "10111000|001|Rs|0|11100|Rn|Rd"}, + {"inst": "ldumina Ws, Wd, [Xn|SP]" , "op": "10111000|101|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminal Ws, Wd, [Xn|SP]" , "op": "10111000|111|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminl Ws, Wd, [Xn|SP]" , "op": "10111000|011|Rs|0|11100|Rn|Rd"}, + {"inst": "ldumin Xs, Xd, [Xn|SP]" , "op": "11111000|001|Rs|0|11100|Rn|Rd"}, + {"inst": "ldumina Xs, Xd, [Xn|SP]" , "op": "11111000|101|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminal Xs, Xd, [Xn|SP]" , "op": "11111000|111|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminl Xs, Xd, [Xn|SP]" , "op": "11111000|011|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminb Ws, Wd, [Xn|SP]" , "op": "00111000|001|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminab Ws, Wd, [Xn|SP]" , "op": "00111000|101|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminalb Ws, Wd, [Xn|SP]" , "op": "00111000|111|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminlb Ws, Wd, [Xn|SP]" , "op": "00111000|011|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminh Ws, Wd, [Xn|SP]" , "op": "01111000|001|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminah Ws, Wd, [Xn|SP]" , "op": "01111000|101|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminalh Ws, Wd, [Xn|SP]" , "op": "01111000|111|Rs|0|11100|Rn|Rd"}, + {"inst": "lduminlh Ws, Wd, [Xn|SP]" , "op": "01111000|011|Rs|0|11100|Rn|Rd"}, + {"inst": "stadd Ws, [Xn|SP]" , "op": "10111000|001|Rs|0|00000|Rn|11111"}, + {"inst": "stadda Ws, [Xn|SP]" , "op": "10111000|101|Rs|0|00000|Rn|11111"}, + {"inst": "staddal Ws, [Xn|SP]" , "op": "10111000|111|Rs|0|00000|Rn|11111"}, + {"inst": "staddl Ws, [Xn|SP]" , "op": "10111000|011|Rs|0|00000|Rn|11111"}, + {"inst": "stadd Xs, [Xn|SP]" , "op": "11111000|001|Rs|0|00000|Rn|11111"}, + {"inst": "stadda Xs, [Xn|SP]" , "op": "11111000|101|Rs|0|00000|Rn|11111"}, + {"inst": "staddal Xs, [Xn|SP]" , "op": "11111000|111|Rs|0|00000|Rn|11111"}, + {"inst": "staddl Xs, [Xn|SP]" , "op": "11111000|011|Rs|0|00000|Rn|11111"}, + {"inst": "staddb Ws, [Xn|SP]" , "op": "00111000|001|Rs|0|00000|Rn|11111"}, + {"inst": "staddab Ws, [Xn|SP]" , "op": "00111000|101|Rs|0|00000|Rn|11111"}, + {"inst": "staddalb Ws, [Xn|SP]" , "op": "00111000|111|Rs|0|00000|Rn|11111"}, + {"inst": "staddlb Ws, [Xn|SP]" , "op": "00111000|011|Rs|0|00000|Rn|11111"}, + {"inst": "staddh Ws, [Xn|SP]" , "op": "01111000|001|Rs|0|00000|Rn|11111"}, + {"inst": "staddah Ws, [Xn|SP]" , "op": "01111000|101|Rs|0|00000|Rn|11111"}, + {"inst": "staddalh Ws, [Xn|SP]" , "op": "01111000|111|Rs|0|00000|Rn|11111"}, + {"inst": "staddlh Ws, [Xn|SP]" , "op": "01111000|011|Rs|0|00000|Rn|11111"}, + {"inst": "stclr Ws, [Xn|SP]" , "op": "10111000|001|Rs|0|00100|Rn|11111"}, + {"inst": "stclra Ws, [Xn|SP]" , "op": "10111000|101|Rs|0|00100|Rn|11111"}, + {"inst": "stclral Ws, [Xn|SP]" , "op": "10111000|111|Rs|0|00100|Rn|11111"}, + {"inst": "stclrl Ws, [Xn|SP]" , "op": "10111000|011|Rs|0|00100|Rn|11111"}, + {"inst": "stclr Xs, [Xn|SP]" , "op": "11111000|001|Rs|0|00100|Rn|11111"}, + {"inst": "stclra Xs, [Xn|SP]" , "op": "11111000|101|Rs|0|00100|Rn|11111"}, + {"inst": "stclral Xs, [Xn|SP]" , "op": "11111000|111|Rs|0|00100|Rn|11111"}, + {"inst": "stclrl Xs, [Xn|SP]" , "op": "11111000|011|Rs|0|00100|Rn|11111"}, + {"inst": "stclrb Ws, [Xn|SP]" , "op": "00111000|001|Rs|0|00100|Rn|11111"}, + {"inst": "stclrab Ws, [Xn|SP]" , "op": "00111000|101|Rs|0|00100|Rn|11111"}, + {"inst": "stclralb Ws, [Xn|SP]" , "op": "00111000|111|Rs|0|00100|Rn|11111"}, + {"inst": "stclrlb Ws, [Xn|SP]" , "op": "00111000|011|Rs|0|00100|Rn|11111"}, + {"inst": "stclrh Ws, [Xn|SP]" , "op": "01111000|001|Rs|0|00100|Rn|11111"}, + {"inst": "stclrah Ws, [Xn|SP]" , "op": "01111000|101|Rs|0|00100|Rn|11111"}, + {"inst": "stclralh Ws, [Xn|SP]" , "op": "01111000|111|Rs|0|00100|Rn|11111"}, + {"inst": "stclrlh Ws, [Xn|SP]" , "op": "01111000|011|Rs|0|00100|Rn|11111"}, + {"inst": "steor Ws, [Xn|SP]" , "op": "10111000|001|Rs|0|01000|Rn|11111"}, + {"inst": "steora Ws, [Xn|SP]" , "op": "10111000|101|Rs|0|01000|Rn|11111"}, + {"inst": "steoral Ws, [Xn|SP]" , "op": "10111000|111|Rs|0|01000|Rn|11111"}, + {"inst": "steorl Ws, [Xn|SP]" , "op": "10111000|011|Rs|0|01000|Rn|11111"}, + {"inst": "steor Xs, [Xn|SP]" , "op": "11111000|001|Rs|0|01000|Rn|11111"}, + {"inst": "steora Xs, [Xn|SP]" , "op": "11111000|101|Rs|0|01000|Rn|11111"}, + {"inst": "steoral Xs, [Xn|SP]" , "op": "11111000|111|Rs|0|01000|Rn|11111"}, + {"inst": "steorl Xs, [Xn|SP]" , "op": "11111000|011|Rs|0|01000|Rn|11111"}, + {"inst": "steorb Ws, [Xn|SP]" , "op": "00111000|001|Rs|0|01000|Rn|11111"}, + {"inst": "steorab Ws, [Xn|SP]" , "op": "00111000|101|Rs|0|01000|Rn|11111"}, + {"inst": "steoralb Ws, [Xn|SP]" , "op": "00111000|111|Rs|0|01000|Rn|11111"}, + {"inst": "steorlb Ws, [Xn|SP]" , "op": "00111000|011|Rs|0|01000|Rn|11111"}, + {"inst": "steorh Ws, [Xn|SP]" , "op": "01111000|001|Rs|0|01000|Rn|11111"}, + {"inst": "steorah Ws, [Xn|SP]" , "op": "01111000|101|Rs|0|01000|Rn|11111"}, + {"inst": "steoralh Ws, [Xn|SP]" , "op": "01111000|111|Rs|0|01000|Rn|11111"}, + {"inst": "steorlh Ws, [Xn|SP]" , "op": "01111000|011|Rs|0|01000|Rn|11111"}, + {"inst": "stset Ws, [Xn|SP]" , "op": "10111000|001|Rs|0|01100|Rn|11111"}, + {"inst": "stseta Ws, [Xn|SP]" , "op": "10111000|101|Rs|0|01100|Rn|11111"}, + {"inst": "stsetal Ws, [Xn|SP]" , "op": "10111000|111|Rs|0|01100|Rn|11111"}, + {"inst": "stsetl Ws, [Xn|SP]" , "op": "10111000|011|Rs|0|01100|Rn|11111"}, + {"inst": "stset Xs, [Xn|SP]" , "op": "11111000|001|Rs|0|01100|Rn|11111"}, + {"inst": "stseta Xs, [Xn|SP]" , "op": "11111000|101|Rs|0|01100|Rn|11111"}, + {"inst": "stsetal Xs, [Xn|SP]" , "op": "11111000|111|Rs|0|01100|Rn|11111"}, + {"inst": "stsetl Xs, [Xn|SP]" , "op": "11111000|011|Rs|0|01100|Rn|11111"}, + {"inst": "stsetb Ws, [Xn|SP]" , "op": "00111000|001|Rs|0|01100|Rn|11111"}, + {"inst": "stsetab Ws, [Xn|SP]" , "op": "00111000|101|Rs|0|01100|Rn|11111"}, + {"inst": "stsetalb Ws, [Xn|SP]" , "op": "00111000|111|Rs|0|01100|Rn|11111"}, + {"inst": "stsetlb Ws, [Xn|SP]" , "op": "00111000|011|Rs|0|01100|Rn|11111"}, + {"inst": "stseth Ws, [Xn|SP]" , "op": "01111000|001|Rs|0|01100|Rn|11111"}, + {"inst": "stsetah Ws, [Xn|SP]" , "op": "01111000|101|Rs|0|01100|Rn|11111"}, + {"inst": "stsetalh Ws, [Xn|SP]" , "op": "01111000|111|Rs|0|01100|Rn|11111"}, + {"inst": "stsetlh Ws, [Xn|SP]" , "op": "01111000|011|Rs|0|01100|Rn|11111"}, + {"inst": "stsmax Ws, [Xn|SP]" , "op": "10111000|001|Rs|0|10000|Rn|11111"}, + {"inst": "stsmaxa Ws, [Xn|SP]" , "op": "10111000|101|Rs|0|10000|Rn|11111"}, + {"inst": "stsmaxal Ws, [Xn|SP]" , "op": "10111000|111|Rs|0|10000|Rn|11111"}, + {"inst": "stsmaxl Ws, [Xn|SP]" , "op": "10111000|011|Rs|0|10000|Rn|11111"}, + {"inst": "stsmax Xs, [Xn|SP]" , "op": "11111000|001|Rs|0|10000|Rn|11111"}, + {"inst": "stsmaxa Xs, [Xn|SP]" , "op": "11111000|101|Rs|0|10000|Rn|11111"}, + {"inst": "stsmaxal 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"dvp #rctx, Xt" , "op": "11010101|000|01|011|0111|0011|101|Rt" , "imm": "ImmRCTX(rctx)"} + ]}, + + {"category": "GP GP_EXT", "ext": "SPECRES2", "data": [ + {"inst": "cosp #rctx, Xt" , "op": "11010101|000|01011|0111|0011|110|Rt" , "imm": "ImmRCTX(rctx)"} + ]}, + + {"category": "GP GP_EXT", "ext": "SYSINSTR128", "data": [ + {"inst": "sysp #op1, #CRn, #CRm, #op2, 2x{Xt}+" , "op": "11010101|010|01|op1:3|CRn|CRm|op2:3|Rt"} + ]}, + + {"category": "GP GP_EXT", "ext": "SYSREG128", "data": [ + {"inst": "mrrs 2x{Xd}+, #sysreg" , "op": "11010101|011|1|sysreg:15|Rd"}, + {"inst": "msrr 2x{Xs}+, #sysreg" , "op": "11010101|010|1|sysreg:15|Rd"} + ]}, + + {"category": "GP GP_EXT", "ext": "THE", "data": [ + {"inst": "rcwcas Xs, Xt, [Xn|SP]" , "op": "00011001|001|Rs|0|00010|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwcasa Xs, Xt, [Xn|SP]" , "op": "00011001|101|Rs|0|00010|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwcasal Xs, Xt, [Xn|SP]" , "op": "00011001|111|Rs|0|00010|Rn|Rt" , "io": "N=W Z=W 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"00111000|011|Rs|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwclrp Xt, Xt2, [Xn|SP]" , "op": "00011001|001|Rt2|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwclrpa Xt, Xt2, [Xn|SP]" , "op": "00011001|101|Rt2|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwclrpal Xt, Xt2, [Xn|SP]" , "op": "00011001|111|Rt2|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwclrpl Xt, Xt2, [Xn|SP]" , "op": "00011001|011|Rt2|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwscas Xs, Xt, [Xn|SP]" , "op": "01011001|001|Rs|0|00010|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwscasa Xs, Xt, [Xn|SP]" , "op": "01011001|101|Rs|0|00010|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwscasal Xs, Xt, [Xn|SP]" , "op": "01011001|111|Rs|0|00010|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwscasl Xs, Xt, [Xn|SP]" , "op": "01011001|011|Rs|0|00010|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwscasp 2x{Xs}+, 2x{Xt}+, [Xn|SP]" , "op": "01011001|001|Rs|0|00011|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwscaspa 2x{Xs}+, 2x{Xt}+, [Xn|SP]" , "op": "01011001|101|Rs|0|00011|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwscaspal 2x{Xs}+, 2x{Xt}+, [Xn|SP]" , "op": "01011001|111|Rs|0|00011|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwscaspl 2x{Xs}+, 2x{Xt}+, [Xn|SP]" , "op": "01011001|011|Rs|0|00011|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsclr Xs, Xt, [Xn|SP]" , "op": "01111000|001|Rs|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsclra Xs, Xt, [Xn|SP]" , "op": "01111000|101|Rs|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsclral Xs, Xt, [Xn|SP]" , "op": "01111000|111|Rs|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsclrl Xs, Xt, [Xn|SP]" , "op": "01111000|011|Rs|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsclrp Xt, Xt2, [Xn|SP]" , "op": "01011001|001|Rt2|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsclrpa Xt, Xt2, [Xn|SP]" , "op": "01011001|101|Rt2|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsclrpal Xt, Xt2, [Xn|SP]" , "op": "01011001|111|Rt2|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsclrpl Xt, Xt2, [Xn|SP]" , "op": "01011001|011|Rt2|1|00100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwset Xs, Xt, [Xn|SP]" , "op": "00111000|001|Rs|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwseta Xs, Xt, [Xn|SP]" , "op": "00111000|101|Rs|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsetal Xs, Xt, [Xn|SP]" , "op": "00111000|111|Rs|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsetl Xs, Xt, [Xn|SP]" , "op": "00111000|011|Rs|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsetp Xt, Xt2, [Xn|SP]" , "op": "00011001|001|Rt2|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsetpa Xt, Xt2, [Xn|SP]" , "op": "00011001|101|Rt2|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsetpal Xt, Xt2, [Xn|SP]" , "op": "00011001|111|Rt2|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsetpl Xt, Xt2, [Xn|SP]" , "op": "00011001|011|Rt2|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsset Xs, Xt, [Xn|SP]" , "op": "01111000|001|Rs|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsseta Xs, Xt, [Xn|SP]" , "op": "01111000|101|Rs|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwssetal Xs, Xt, [Xn|SP]" , "op": "01111000|111|Rs|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwssetl Xs, Xt, [Xn|SP]" , "op": "01111000|011|Rs|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwssetp Xt, Xt2, [Xn|SP]" , "op": "01011001|001|Rt2|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwssetpa Xt, Xt2, [Xn|SP]" , "op": "01011001|101|Rt2|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwssetpal Xt, Xt2, [Xn|SP]" , "op": "01011001|111|Rt2|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwssetpl Xt, Xt2, [Xn|SP]" , "op": "01011001|011|Rt2|1|01100|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsswp Xs, Xt, [Xn|SP]" , "op": "01111000|001|Rs|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsswpa Xs, Xt, [Xn|SP]" , "op": "01111000|101|Rs|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsswpal Xs, Xt, [Xn|SP]" , "op": "01111000|111|Rs|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsswpl Xs, Xt, [Xn|SP]" , "op": "01111000|011|Rs|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwsswpp Xt, Xt2, [Xn|SP]" , "op": "01011001|001|Rt2|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsswppa Xt, Xt2, [Xn|SP]" , "op": "01011001|101|Rt2|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsswppal Xt, Xt2, [Xn|SP]" , "op": "01011001|111|Rt2|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwsswppl Xt, Xt2, [Xn|SP]" , "op": "01011001|011|Rt2|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwswp Xs, Xt, [Xn|SP]" , "op": "00111000|001|Rs|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwswpa Xs, Xt, [Xn|SP]" , "op": "00111000|101|Rs|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwswpal Xs, Xt, [Xn|SP]" , "op": "00111000|111|Rs|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwswpl Xs, Xt, [Xn|SP]" , "op": "00111000|011|Rs|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W"}, + {"inst": "rcwswpp Xt, Xt2, [Xn|SP]" , "op": "00011001|001|Rt2|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwswppa Xt, Xt2, [Xn|SP]" , "op": "00011001|101|Rt2|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwswppal Xt, Xt2, [Xn|SP]" , "op": "00011001|111|Rt2|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"}, + {"inst": "rcwswppl Xt, Xt2, [Xn|SP]" , "op": "00011001|011|Rt2|1|01000|Rn|Rt" , "io": "N=W Z=W C=W V=W", "ext": "D128"} + ]}, + + {"category": "GP GP_EXT", "ext": "TME", "data": [ + {"inst": "tcancel #imm" , "op": "11010100|011|imm:16|00000"}, + {"inst": "tcommit" , "op": "11010101|000|00011|0011|0000|011|11111"}, + {"inst": "tstart Xt" , "op": "11010101|001|00011|0011|0000|011|Rt"}, + {"inst": "ttest Xd" , "op": "11010101|001|00011|0011|0001|011|Rd"} + ]}, + + {"category": "GP GP_EXT", "ext": "TRF", "data": [ + {"inst": "tsb #psb_tsb_op" , "op": "11010101|000|00011|0010|0010|010|11111" , "imm": "ImmPSB_TSB(psb_tsb_op)"} + ]}, + + {"category": "GP GP_EXT", "ext": "WFXT", "data": [ + {"inst": "wfet Xs" , "op": "11010101|000|00011|0001|0000|000|Rs"}, + {"inst": "wfit Xs" , "op": "11010101|000|00011|0001|0000|001|Rs"} + ]}, + + {"category": "ASIMD", "ext": "ASIMD", "data": [ + {"inst": "abs Dd, Dn" , "op": "01011110|11|10000|01011|10|Vn|Vd"}, + {"inst": "abs Vd.t, Vn.t" , "op": "00001110|sz|10000|01011|10|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "abs Vd.t, Vn.t" , "op": "01001110|sz|10000|01011|10|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "add Dd, Dn, Dm" , "op": "01011110|11|1|Vm|10000|1|Vn|Vd"}, + {"inst": "add Vd.t, Vn.t, Vm.t" , "op": "00001110|sz|1|Vm|10000|1|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "add Vd.t, Vn.t, Vm.t" , "op": "01001110|sz|1|Vm|10000|1|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "addhn Vd.ta, Vn.tb, Vm.tb" , "op": "00001110|sz|1|Vm|01000|0|Vn|Vd" , "ta.tb": "8B.8H 4H.4S 2S.2D"}, + {"inst": "addhn2 Vx.ta, Vn.tb, Vm.tb" , "op": "01001110|sz|1|Vm|01000|0|Vn|Vx" , "ta.tb": "16B.8H 8H.4S 4S.2D"}, + {"inst": "addp Dd, Vn.2D" , "op": "01011110|sz|11000|11011|10|Vn|Vd"}, + {"inst": "addp Vd.t, Vn.t, Vm.t" , "op": "00001110|sz|1|Vm|10111|1|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "addp Vd.t, Vn.t, Vm.t" , "op": "01001110|sz|1|Vm|10111|1|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "addv Bd, Vn.8B" , "op": "00001110|00|11000|11011|10|Vn|Vd"}, + {"inst": "addv Bd, Vn.16B" , "op": "01001110|00|11000|11011|10|Vn|Vd"}, + {"inst": "addv Hd, Vn.4H" , "op": "00001110|01|11000|11011|10|Vn|Vd"}, + {"inst": "addv Hd, Vn.8H" , "op": "01001110|01|11000|11011|10|Vn|Vd"}, + {"inst": "addv Sd, Vn.4S" , "op": "01001110|10|11000|11011|10|Vn|Vd"}, + {"inst": "and Vd.8B, Vn.8B, Vm.8B" , "op": "00001110|00|1|Vm|00011|1|Vn|Vd"}, + {"inst": "and Vd.16B, Vn.16B, Vm.16B" , "op": "01001110|00|1|Vm|00011|1|Vn|Vd"}, + {"inst": "bic Vd.8B, Vn.8B, Vm.8B" , "op": "00001110|01|1|Vm|00011|1|Vn|Vd"}, + {"inst": "bic Vd.16B, Vn.16B, Vm.16B" , "op": "01001110|01|1|Vm|00011|1|Vn|Vd"}, + {"inst": "bic Vd.t, #imm, {lsl #n}" , "op": "00101111|00000|abc:3|cmode:4|01|defgh:5|Vd" , "t": "4H 2S", "imm": "ASimdLogicalImm(sz, 1, imm, lsl)"}, + {"inst": "bic Vd.t, #imm, {lsl #n}" , "op": "01101111|00000|abc:3|cmode:4|01|defgh:5|Vd" , "t": "8H 4S", "imm": "ASimdLogicalImm(sz, 1, imm, lsl)"}, + {"inst": "bif Dx.8B, Vn.8B, Vm.8B" , "op": "00101111|11|1|Vm|00011|1|Vn|Vx"}, + {"inst": "bif Vx.16B, Vn.16B, Vm.16B" , "op": "01101111|11|1|Vm|00011|1|Vn|Vx"}, + {"inst": "bit Dx.8B, Vn.8B, Vm.8B" , "op": "00101111|10|1|Vm|00011|1|Vn|Vx"}, + {"inst": "bit Vx.16B, Vn.16B, Vm.16B" , "op": "01101111|10|1|Vm|00011|1|Vn|Vx"}, + {"inst": "bsl Dx.8B, Vn.8B, Vm.8B" , "op": "00101111|01|1|Vm|00011|1|Vn|Vx"}, + {"inst": "bsl Vx.16B, Vn.16B, Vm.16B" , "op": "01101111|01|1|Vm|00011|1|Vn|Vx"}, + {"inst": "cls Vd.t, Vn.t" , "op": "00001110|sz|10000|00100|10|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cls Vd.t, Vn.t" , "op": "01001110|sz|10000|00100|10|Vn|Vd" , "t": "16B 8H 4S"}, + {"inst": "clz Vd.t, Vn.t" , "op": "00101110|sz|10000|00100|10|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "clz Vd.t, Vn.t" , "op": "01101110|sz|10000|00100|10|Vn|Vd" , "t": "16B 8H 4S"}, + {"inst": "cmeq Dd, Dn, Dm" , "op": "01111110|11|1|Vm|10001|1|Vn|Vd"}, + {"inst": "cmeq Dd, Dn, #0" , "op": "01011110|11|10000|01001|10|Vn|Vd"}, + {"inst": "cmeq Vd.t, Vn.t, Vm.t" , "op": "00101110|sz|1|Vm|10001|1|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmeq Vd.t, Vn.t, #0" , "op": "00101110|sz|10000|01001|10|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmeq Vd.t, Vn.t, Vm.t" , "op": "01101110|sz|1|Vm|10001|1|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmeq Vd.t, Vn.t, #0" , "op": "01101110|sz|10000|01001|10|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmge Dd, Dn, Dm" , "op": "01011110|11|1|Vm|00111|1|Vn|Vd"}, + {"inst": "cmge Dd, Dn, #0" , "op": "01111110|11|10000|01000|10|Vn|Vd"}, + {"inst": "cmge Vd.t, Vn.t, Vm.t" , "op": "00001110|sz|1|Vm|00111|1|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmge Vd.t, Vn.t, #0" , "op": "00101110|sz|10000|01000|10|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmge Vd.t, Vn.t, Vm.t" , "op": "01001110|sz|1|Vm|00111|1|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmge Vd.t, Vn.t, #0" , "op": "01101110|sz|10000|01000|10|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmgt Dd, Dn, Dm" , "op": "01011110|11|1|Vm|00110|1|Vn|Vd"}, + {"inst": "cmgt Dd, Dn, #0" , "op": "01011110|11|10000|01000|10|Vn|Vd"}, + {"inst": "cmgt Vd.t, Vn.t, Vm.t" , "op": "00001110|sz|1|Vm|00110|1|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmgt Vd.t, Vn.t, #0" , "op": "00001110|sz|10000|01000|10|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmgt Vd.t, Vn.t, Vm.t" , "op": "01001110|sz|1|Vm|00110|1|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmgt Vd.t, Vn.t, #0" , "op": "01001110|sz|10000|01000|10|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmhi Dd, Dn, Dm" , "op": "01111110|11|1|Vm|00110|1|Vn|Vd"}, + {"inst": "cmhi Vd.t, Vn.t, Vm.t" , "op": "00101110|sz|1|Vm|00110|1|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmhi Vd.t, Vn.t, Vm.t" , "op": "01101110|sz|1|Vm|00110|1|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmhs Dd, Dn, Dm" , "op": "01111110|11|1|Vm|00111|1|Vn|Vd"}, + {"inst": "cmhs Vd.t, Vn.t, Vm.t" , "op": "00101110|sz|1|Vm|00111|1|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmhs Vd.t, Vn.t, Vm.t" , "op": "01101110|sz|1|Vm|00111|1|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmle Dd, Dn, #0" , "op": "01111110|11|10000|01001|10|Vn|Vd"}, + {"inst": "cmle Vd.t, Vn.t, #0" , "op": "00101110|sz|10000|01001|10|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmle Vd.t, Vn.t, #0" , "op": "01101110|sz|10000|01001|10|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmlt Dd, Dn, #0" , "op": "01011110|11|10000|01010|10|Vn|Vd"}, + {"inst": "cmlt Vd.t, Vn.t, #0" , "op": "00001110|sz|10000|01010|10|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmlt Vd.t, Vn.t, #0" , "op": "01001110|sz|10000|01010|10|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cmtst Dd, Dn, Dm" , "op": "01011110|11|1|Vm|10001|1|Vn|Vd"}, + {"inst": "cmtst Vd.t, Vn.t, Vm.t" , "op": "00001110|sz|1|Vm|10001|1|Vn|Vd" , "t": "8B 4H 2S"}, + {"inst": "cmtst Vd.t, Vn.t, Vm.t" , "op": "01001110|sz|1|Vm|10001|1|Vn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "cnt Vd.8B, Vn.8B" , "op": "00001110|sz|10000|00101|10|Vn|Vd"}, + {"inst": "cnt Vd.16B, Vn.16B" , "op": "01001110|sz|10000|00101|10|Vn|Vd"}, + {"inst": "dup|mov Bd, Vn.B[#idx]" , "op": "01011110|00|0|idx:4| 1|00000|1|Vn|Vd"}, + {"inst": "dup|mov Hd, Vn.H[#idx]" , "op": "01011110|00|0|idx:3| 10|00000|1|Vn|Vd"}, + {"inst": "dup|mov Sd, Vn.S[#idx]" , "op": "01011110|00|0|idx:2| 100|00000|1|Vn|Vd"}, + {"inst": "dup|mov Dd, Vn.D[#idx]" , "op": "01011110|00|0|idx:1| 1000|00000|1|Vn|Vd"}, + {"inst": "dup Vd.8B, Wn" , "op": "00001110|00|0|00001|00001|1|Rn|Vd"}, + {"inst": "dup Vd.4H, Wn" , "op": "00001110|00|0|00010|00001|1|Rn|Vd"}, + {"inst": "dup Vd.2S, Wn" , "op": "00001110|00|0|11011|00001|1|Rn|Vd"}, + {"inst": "dup Vd.16B, Wn" , "op": "01001110|00|0|00001|00001|1|Rn|Vd"}, + {"inst": "dup Vd.8H, Wn" , "op": "01001110|00|0|00010|00001|1|Rn|Vd"}, + {"inst": "dup Vd.4S, Wn" , "op": "01001110|00|0|11011|00001|1|Rn|Vd"}, + {"inst": "dup Vd.2D, Xn" , "op": "01001110|00|0|11011|00001|1|Rn|Vd"}, + {"inst": "dup Vd.8B, Vn.B[#idx]" , "op": "00001110|00|0|idx:4| 1|00000|1|Vn|Vd"}, + {"inst": "dup Vd.4H, Vn.H[#idx]" , "op": "00001110|00|0|idx:3| 10|00000|1|Vn|Vd"}, + {"inst": "dup Vd.2S, Vn.S[#idx]" , "op": "00001110|00|0|idx:2| 100|00000|1|Vn|Vd"}, + {"inst": "dup Vd.16B, Vn.B[#idx]" , "op": "01001110|00|0|idx:4| 1|00000|1|Vn|Vd"}, + {"inst": "dup Vd.8H, Vn.H[#idx]" , "op": "01001110|00|0|idx:3| 10|00000|1|Vn|Vd"}, + {"inst": "dup Vd.4S, Vn.S[#idx]" , "op": "01001110|00|0|idx:2| 100|00000|1|Vn|Vd"}, + {"inst": "dup Vd.2D, Vn.D[#idx]" , "op": "01001110|00|0|idx:1| 1000|00000|1|Vn|Vd"}, + {"inst": "eor Vd.8B, Vn.8B, Vm.8B" , "op": "00101110|00|1|Vm|00011|1|Vn|Vd"}, + {"inst": "eor Vd.16B, Vn.16B, Vm.16B" , "op": "01101110|00|1|Vm|00011|1|Vn|Vd"}, + {"inst": "ext Vd.8B, Vn.8B, Vm.8B, #idx" , "op": "00101110|00|0|Vm|00|idx:3|0|Vn|Vd"}, + {"inst": "ext Vd.16B, Vn.16B, Vm.16B, #idx" , "op": "01101110|00|0|Vm|0|idx:4|0|Vn|Vd"}, + {"inst": "fabd Sd, Sn, Sm" , "op": "01111110|10|1|Vm|11010|1|Vn|Vd"}, + {"inst": "fabd Dd, Dn, Dm" , "op": "01111110|11|1|Vm|11010|1|Vn|Vd"}, + {"inst": "fabd Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|10|0|Vm|11010|1|Vn|Vd"}, + {"inst": "fabd Vd.4S, Vn.4S, Vm.4S" , "op": "00101110|10|0|Vm|11010|1|Vn|Vd"}, + {"inst": "fabd Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|11|0|Vm|11010|1|Vn|Vd"}, + {"inst": "fabs Sd, Sn" , "op": "00011110|00|10000|01100|00|Vn|Vd"}, + {"inst": "fabs Dd, Dn" , "op": "00011110|01|10000|01100|00|Vn|Vd"}, + {"inst": "fabs Vd.2S, Vn.2S" , "op": "00001110|10|10000|01111|10|Vn|Vd"}, + {"inst": "fabs Vd.4S, Vn.4S" , "op": "01001110|10|10000|01111|10|Vn|Vd"}, + {"inst": "fabs Vd.2D, Vn.2D" , "op": "01001110|11|10000|01111|10|Vn|Vd"}, + {"inst": "facge Sd, Sn, Sm" , "op": "01111110|00|1|Vm|11101|1|Vn|Vd"}, + {"inst": "facge Dd, Dn, Dm" , "op": "01111110|01|0|Vm|11101|1|Vn|Vd"}, + {"inst": "facge Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|00|1|Vm|11101|1|Vn|Vd"}, + {"inst": "facge Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|00|1|Vm|11101|1|Vn|Vd"}, + {"inst": "facge Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|01|1|Vm|11101|1|Vn|Vd"}, + {"inst": "facgt Sd, Sn, Sm" , "op": "01111110|10|1|Vm|11101|1|Vn|Vd"}, + {"inst": "facgt Dd, Dn, Dm" , "op": "01111110|11|0|Vm|11101|1|Vn|Vd"}, + {"inst": "facgt Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|10|1|Vm|11101|1|Vn|Vd"}, + {"inst": "facgt Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|10|1|Vm|11101|1|Vn|Vd"}, + {"inst": "facgt Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|11|1|Vm|11101|1|Vn|Vd"}, + {"inst": "fadd Sd, Sn, Sm" , "op": "00011110|00|1|Vm|00101|0|Vn|Vd"}, + {"inst": "fadd Dd, Dn, Dm" , "op": "00011110|01|1|Vm|00101|0|Vn|Vd"}, + {"inst": "fadd Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|00|1|Vm|11010|1|Vn|Vd"}, + {"inst": "fadd Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|00|1|Vm|11010|1|Vn|Vd"}, + {"inst": "fadd Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|01|1|Vm|11010|1|Vn|Vd"}, + {"inst": "faddp Sd, Vn.2S" , "op": "01111110|00|11000|01101|10|Vn|Vd"}, + {"inst": "faddp Dd, Vn.2D" , "op": "01111110|01|11000|01101|10|Vn|Vd"}, + {"inst": "faddp Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|00|1|Vm|11010|1|Vn|Vd"}, + {"inst": "faddp Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|00|1|Vm|11010|1|Vn|Vd"}, + {"inst": "faddp Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|01|1|Vm|11010|1|Vn|Vd"}, + {"inst": "fccmp Sn, Sm, #nzcv, #cond" , "op": "00011110|00|1|Vm|cond|01|Vn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fccmp Dn, Dm, #nzcv, #cond" , "op": "00011110|01|1|Vm|cond|01|Vn|0|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fccmpe Sn, Sm, #nzcv, #cond" , "op": "00011110|00|1|Vm|cond|01|Vn|1|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fccmpe Dn, Dm, #nzcv, #cond" , "op": "00011110|01|1|Vm|cond|01|Vn|1|nzcv" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fcmeq Sd, Sn, Sm" , "op": "01011110|00|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmeq Sd, Sn, #0" , "op": "01011110|10|10000|01101|10|Vn|Vd"}, + {"inst": "fcmeq Dd, Dn, Dm" , "op": "01011110|01|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmeq Dd, Dn, #0" , "op": "01011110|11|10000|01101|10|Vn|Vd"}, + {"inst": "fcmeq Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|00|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmeq Vd.2S, Vn.2S, #0" , "op": "00001110|10|10000|01101|10|Vn|Vd"}, + {"inst": "fcmeq Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|00|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmeq Vd.4S, Vn.4S, #0" , "op": "01001110|10|10000|01101|10|Vn|Vd"}, + {"inst": "fcmeq Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|01|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmeq Vd.2D, Vn.2D, #0" , "op": "01001110|11|10000|01101|10|Vn|Vd"}, + {"inst": "fcmge Sd, Sn, Sm" , "op": "01111110|00|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmge Sd, Sn, #0" , "op": "01111110|10|10000|01100|10|Vn|Vd"}, + {"inst": "fcmge Dd, Dn, Dm" , "op": "01111110|01|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmge Dd, Dn, #0" , "op": "01111110|11|10000|01100|10|Vn|Vd"}, + {"inst": "fcmge Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|00|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmge Vd.2S, Vn.2S, #0" , "op": "00101110|10|10000|01100|10|Vn|Vd"}, + {"inst": "fcmge Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|00|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmge Vd.4S, Vn.4S, #0" , "op": "01101110|10|10000|01100|10|Vn|Vd"}, + {"inst": "fcmge Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|01|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmge Vd.2D, Vn.2D, #0" , "op": "01101110|11|10000|01100|10|Vn|Vd"}, + {"inst": "fcmgt Sd, Sn, Sm" , "op": "01111110|10|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmgt Sd, Sn, #0" , "op": "01011110|10|10000|01100|10|Vn|Vd"}, + {"inst": "fcmgt Dd, Dn, Dm" , "op": "01111110|11|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmgt Dd, Dn, #0" , "op": "01011110|11|10000|01100|10|Vn|Vd"}, + {"inst": "fcmgt Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|10|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmgt Vd.2S, Vn.2S, #0" , "op": "00001110|10|10000|01100|10|Vn|Vd"}, + {"inst": "fcmgt Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|10|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmgt Vd.4S, Vn.4S, #0" , "op": "01001110|10|10000|01100|10|Vn|Vd"}, + {"inst": "fcmgt Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|11|1|Vm|11100|1|Vn|Vd"}, + {"inst": "fcmgt Vd.2D, Vn.2D, #0" , "op": "01001110|11|10000|01100|10|Vn|Vd"}, + {"inst": "fcmle Sd, Sn, #0" , "op": "01111110|10|10000|01101|10|Vn|Vd"}, + {"inst": "fcmle Dd, Dn, #0" , "op": "01111110|11|10000|01101|10|Vn|Vd"}, + {"inst": "fcmle Vd.2S, Vn.2S, #0" , "op": "00101110|10|10000|01101|10|Vn|Vd"}, + {"inst": "fcmle Vd.4S, Vn.4S, #0" , "op": "01101110|10|10000|01101|10|Vn|Vd"}, + {"inst": "fcmle Vd.2D, Vn.2D, #0" , "op": "01101110|11|10000|01101|10|Vn|Vd"}, + {"inst": "fcmlt Sd, Sn, #0" , "op": "01011110|10|10000|01110|10|Vn|Vd"}, + {"inst": "fcmlt Dd, Dn, #0" , "op": "01011110|11|10000|01110|10|Vn|Vd"}, + {"inst": "fcmlt Vd.2S, Vn.2S, #0" , "op": "00001110|10|10000|01110|10|Vn|Vd"}, + {"inst": "fcmlt Vd.4S, Vn.4S, #0" , "op": "01001110|10|10000|01110|10|Vn|Vd"}, + {"inst": "fcmlt Vd.2D, Vn.2D, #0" , "op": "01001110|11|10000|01110|10|Vn|Vd"}, + {"inst": "fcmp Sn, Sm" , "op": "00011110|00|1|Vm|00100|0|Vn|00000" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fcmp Sn, #0" , "op": "00011110|00|1|00000|00100|0|Vn|01000" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fcmp Dn, Dm" , "op": "00011110|01|1|Vm|00100|0|Vn|00000" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fcmp Dn, #0" , "op": "00011110|01|1|00000|00100|0|Vn|01000" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fcmpe Sn, Sm" , "op": "00011110|00|1|Vm|00100|0|Vn|10000" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fcmpe Sn, #0" , "op": "00011110|00|1|00000|00100|0|Vn|11000" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fcmpe Dn, Dm" , "op": "00011110|01|1|Vm|00100|0|Vn|10000" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fcmpe Dn, #0" , "op": "00011110|01|1|00000|00100|0|Vn|11000" , "io": "N=W Z=W C=W V=W"}, + {"inst": "fcsel Sd, Sn, Sm, #cond" , "op": "00011110|00|1|Vm|cond|11|Vn|Vd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "fcsel Dd, Dn, Dm, #cond" , "op": "00011110|01|1|Vm|cond|11|Vn|Vd" , "io": "N=R Z=R C=R V=R"}, + {"inst": "fcvt Sd, Hn" , "op": "00011110|11|10001|00100|00|Vn|Vd"}, + {"inst": "fcvt Dd, Hn" , "op": "00011110|11|10001|01100|00|Vn|Vd"}, + {"inst": "fcvt Hd, Sn" , "op": "00011110|00|10001|11100|00|Vn|Vd"}, + {"inst": "fcvt Dd, Sn" , "op": "00011110|00|10001|01100|00|Vn|Vd"}, + {"inst": "fcvt Hd, Dn" , "op": "00011110|01|10001|11100|00|Vn|Vd"}, + {"inst": "fcvt Sd, Dn" , "op": "00011110|01|10001|00100|00|Vn|Vd"}, + {"inst": "fcvtas Wd, Sn" , "op": "00011110|00|10010|00000|00|Vn|Rd"}, + {"inst": "fcvtas Xd, Sn" , "op": "10011110|00|10010|00000|00|Vn|Rd"}, + {"inst": "fcvtas Wd, Dn" , "op": "00011110|01|10010|00000|00|Vn|Rd"}, + {"inst": "fcvtas Xd, Dn" , "op": "10011110|01|10010|00000|00|Vn|Rd"}, + {"inst": "fcvtas Sd, Sn" , "op": "01011110|00|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtas Dd, Dn" , "op": "01011110|01|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtas Vd.2S, Vn.2S" , "op": "00001110|00|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtas Vd.4S, Vn.4S" , "op": "01001110|00|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtas Vd.2D, Vn.2D" , "op": "01001110|01|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtau Wd, Sn" , "op": "00011110|00|10010|10000|00|Vn|Rd"}, + {"inst": "fcvtau Xd, Sn" , "op": "10011110|00|10010|10000|00|Vn|Rd"}, + {"inst": "fcvtau Wd, Dn" , "op": "00011110|01|10010|10000|00|Vn|Rd"}, + {"inst": "fcvtau Xd, Dn" , "op": "10011110|01|10010|10000|00|Vn|Rd"}, + {"inst": "fcvtau Sd, Sn" , "op": "01111110|00|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtau Dd, Dn" , "op": "01111110|01|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtau Vd.2S, Vn.2S" , "op": "00101110|00|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtau Vd.4S, Vn.4S" , "op": "01101110|00|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtau Vd.2D, Vn.2D" , "op": "01101110|01|10000|11100|10|Vn|Vd"}, + {"inst": "fcvtl Vd.4S, Vn.4H" , "op": "00001110|00|10000|10111|10|Vn|Vd"}, + {"inst": "fcvtl2 Vd.4S, Vn.8H" , "op": "01001110|00|10000|10111|10|Vn|Vd"}, + {"inst": "fcvtl Vd.2D, Vn.2S" , "op": "00001110|01|10000|10111|10|Vn|Vd"}, + {"inst": "fcvtl2 Vd.2D, Vn.4S" , "op": "01001110|01|10000|10111|10|Vn|Vd"}, + {"inst": "fcvtms Wd, Sn" , "op": "00011110|00|11000|00000|00|Vn|Rd"}, + {"inst": "fcvtms Xd, Sn" , "op": "10011110|00|11000|00000|00|Vn|Rd"}, + {"inst": "fcvtms Wd, Dn" , "op": "00011110|01|11000|00000|00|Vn|Rd"}, + {"inst": "fcvtms Xd, Dn" , "op": "10011110|01|11000|00000|00|Vn|Rd"}, + {"inst": "fcvtms Sd, Sn" , "op": "01011110|00|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtms Dd, Dn" , "op": "01011110|01|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtms Vd.2S, Vn.2S" , "op": "00001110|00|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtms Vd.4S, Vn.4S" , "op": "01001110|00|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtms Vd.2D, Vn.2D" , "op": "01001110|01|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtmu Wd, Sn" , "op": "00011110|00|11000|10000|00|Vn|Rd"}, + {"inst": "fcvtmu Xd, Sn" , "op": "10011110|00|11000|10000|00|Vn|Rd"}, + {"inst": "fcvtmu Wd, Dn" , "op": "00011110|01|11000|10000|00|Vn|Rd"}, + {"inst": "fcvtmu Xd, Dn" , "op": "10011110|01|11000|10000|00|Vn|Rd"}, + {"inst": "fcvtmu Sd, Sn" , "op": "01111110|00|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtmu Dd, Dn" , "op": "01111110|01|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtmu Vd.2S, Vn.2S" , "op": "00101110|00|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtmu Vd.4S, Vn.4S" , "op": "01101110|00|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtmu Vd.2D, Vn.2D" , "op": "01101110|01|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtn Vd.4S, Vn.4H" , "op": "00001110|00|10000|10110|10|Vn|Vd"}, + {"inst": "fcvtn2 Vd.4S, Vn.8H" , "op": "01001110|00|10000|10110|10|Vn|Vd"}, + {"inst": "fcvtn Vd.2D, Vn.2S" , "op": "00001110|01|10000|10110|10|Vn|Vd"}, + {"inst": "fcvtn2 Vd.2D, Vn.4S" , "op": "01001110|01|10000|10110|10|Vn|Vd"}, + {"inst": "fcvtns Wd, Sn" , "op": "00011110|00|10000|00000|00|Vn|Rd"}, + {"inst": "fcvtns Xd, Sn" , "op": "10011110|00|10000|00000|00|Vn|Rd"}, + {"inst": "fcvtns Wd, Dn" , "op": "00011110|01|10000|00000|00|Vn|Rd"}, + {"inst": "fcvtns Xd, Dn" , "op": "10011110|01|10000|00000|00|Vn|Rd"}, + {"inst": "fcvtns Sd, Sn" , "op": "01011110|00|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtns Dd, Dn" , "op": "01011110|01|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtns Vd.2S, Vn.2S" , "op": "00001110|00|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtns Vd.4S, Vn.4S" , "op": "01001110|00|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtns Vd.2D, Vn.2D" , "op": "01001110|01|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtnu Wd, Sn" , "op": "00011110|00|10000|10000|00|Vn|Rd"}, + {"inst": "fcvtnu Xd, Sn" , "op": "10011110|00|10000|10000|00|Vn|Rd"}, + {"inst": "fcvtnu Wd, Dn" , "op": "00011110|01|10000|10000|00|Vn|Rd"}, + {"inst": "fcvtnu Xd, Dn" , "op": "10011110|01|10000|10000|00|Vn|Rd"}, + {"inst": "fcvtnu Sd, Sn" , "op": "01111110|00|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtnu Dd, Dn" , "op": "01111110|01|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtnu Vd.2S, Vn.2S" , "op": "00101110|00|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtnu Vd.4S, Vn.4S" , "op": "01101110|00|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtnu Vd.2D, Vn.2D" , "op": "01101110|01|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtps Wd, Sn" , "op": "00011110|00|10100|00000|00|Vn|Rd"}, + {"inst": "fcvtps Xd, Sn" , "op": "10011110|00|10100|00000|00|Vn|Rd"}, + {"inst": "fcvtps Wd, Dn" , "op": "00011110|01|10100|00000|00|Vn|Rd"}, + {"inst": "fcvtps Xd, Dn" , "op": "10011110|01|10100|00000|00|Vn|Rd"}, + {"inst": "fcvtps Sd, Sn" , "op": "01011110|10|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtps Dd, Dn" , "op": "01011110|11|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtps Vd.2S, Vn.2S" , "op": "00001110|10|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtps Vd.4S, Vn.4S" , "op": "01001110|10|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtps Vd.2D, Vn.2D" , "op": "01001110|11|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtpu Wd, Sn" , "op": "00011110|00|10100|10000|00|Vn|Rd"}, + {"inst": "fcvtpu Xd, Sn" , "op": "10011110|00|10100|10000|00|Vn|Rd"}, + {"inst": "fcvtpu Wd, Dn" , "op": "00011110|01|10100|10000|00|Vn|Rd"}, + {"inst": "fcvtpu Xd, Dn" , "op": "10011110|01|10100|10000|00|Vn|Rd"}, + {"inst": "fcvtpu Sd, Sn" , "op": "01111110|10|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtpu Dd, Dn" , "op": "01111110|11|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtpu Vd.2S, Vn.2S" , "op": "00101110|10|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtpu Vd.4S, Vn.4S" , "op": "01101110|10|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtpu Vd.2D, Vn.2D" , "op": "01101110|11|10000|11010|10|Vn|Vd"}, + {"inst": "fcvtx Sd, Dn" , "op": "01111110|01|10000|10110|10|Vn|Vd"}, + {"inst": "fcvtx Vd.4S, Vn.4H" , "op": "00101110|00|10000|10110|10|Vn|Vd"}, + {"inst": "fcvtx2 Vd.4S, Vn.8H" , "op": "01101110|00|10000|10110|10|Vn|Vd"}, + {"inst": "fcvtx Vd.2D, Vn.2S" , "op": "00101110|01|10000|10110|10|Vn|Vd"}, + {"inst": "fcvtx2 Vd.2D, Vn.4S" , "op": "01101110|01|10000|10110|10|Vn|Vd"}, + {"inst": "fcvtzs Wd, Sn" , "op": "00011110|00|11100|00000|00|Vn|Rd"}, + {"inst": "fcvtzs Xd, Sn" , "op": "10011110|00|11100|00000|00|Vn|Rd"}, + {"inst": "fcvtzs Wd, Dn" , "op": "00011110|01|11100|00000|00|Vn|Rd"}, + {"inst": "fcvtzs Xd, Dn" , "op": "10011110|01|11100|00000|00|Vn|Rd"}, + {"inst": "fcvtzs Sd, Sn" , "op": "01011110|10|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzs Dd, Dn" , "op": "01011110|11|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzs Vd.2S, Vn.2S" , "op": "00001110|10|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzs Vd.4S, Vn.4S" , "op": "01001110|10|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzs Vd.2D, Vn.2D" , "op": "01001110|11|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzs Wd, Sn, #fbits" , "op": "00011110|00|011000|scale:6|Vn|Vd" , "imm": "ASimdFBitsScaleImm(fbits, 32)"}, + {"inst": "fcvtzs Xd, Sn, #fbits" , "op": "10011110|00|011000|scale:6|Vn|Vd" , "imm": "ASimdFBitsScaleImm(fbits, 64)"}, + {"inst": "fcvtzs Wd, Dn, #fbits" , "op": "00011110|01|011000|scale:6|Vn|Vd" , "imm": "ASimdFBitsScaleImm(fbits, 32)"}, + {"inst": "fcvtzs Xd, Dn, #fbits" , "op": "10011110|01|011000|scale:6|Vn|Vd" , "imm": "ASimdFBitsScaleImm(fbits, 64)"}, + {"inst": "fcvtzs Sd, Sn, #fbits" , "op": "01011111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 32)"}, + {"inst": "fcvtzs Dd, Dn, #fbits" , "op": "01011111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 64)"}, + {"inst": "fcvtzs Vd.2S, Vn.2S, #fbits" , "op": "00001111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 32)"}, + {"inst": "fcvtzs Vd.4S, Vn.4S, #fbits" , "op": "01001111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 32)"}, + {"inst": "fcvtzs Vd.2D, Vn.2D, #fbits" , "op": "01001111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 64)"}, + {"inst": "fcvtzu Wd, Sn" , "op": "00011110|00|11100|10000|00|Vn|Rd"}, + {"inst": "fcvtzu Xd, Sn" , "op": "10011110|00|11100|10000|00|Vn|Rd"}, + {"inst": "fcvtzu Wd, Dn" , "op": "00011110|01|11100|10000|00|Vn|Rd"}, + {"inst": "fcvtzu Xd, Dn" , "op": "10011110|01|11100|10000|00|Vn|Rd"}, + {"inst": "fcvtzu Sd, Sn" , "op": "01111110|10|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzu Dd, Dn" , "op": "01111110|11|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzu Vd.2S, Vn.2S" , "op": "00101110|10|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzu Vd.4S, Vn.4S" , "op": "01101110|10|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzu Vd.2D, Vn.2D" , "op": "01101110|11|10000|11011|10|Vn|Vd"}, + {"inst": "fcvtzu Wd, Sn, #fbits" , "op": "00011110|00|011001|scale:6|Vn|Vd" , "imm": "ASimdFBitsScaleImm(fbits, 32)"}, + {"inst": "fcvtzu Xd, Sn, #fbits" , "op": "10011110|00|011001|scale:6|Vn|Vd" , "imm": "ASimdFBitsScaleImm(fbits, 64)"}, + {"inst": "fcvtzu Wd, Dn, #fbits" , "op": "00011110|01|011001|scale:6|Vn|Vd" , "imm": "ASimdFBitsScaleImm(fbits, 32)"}, + {"inst": "fcvtzu Xd, Dn, #fbits" , "op": "10011110|01|011001|scale:6|Vn|Vd" , "imm": "ASimdFBitsScaleImm(fbits, 64)"}, + {"inst": "fcvtzu Sd, Sn, #fbits" , "op": "01111111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 32)"}, + {"inst": "fcvtzu Dd, Dn, #fbits" , "op": "01111111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 64)"}, + {"inst": "fcvtzu Vd.2S, Vn.2S, #fbits" , "op": "00101111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 32)"}, + {"inst": "fcvtzu Vd.4S, Vn.4S, #fbits" , "op": "01101111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 32)"}, + {"inst": "fcvtzu Vd.2D, Vn.2D, #fbits" , "op": "01101111|0|immh:4|immb:3|11111|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 64)"}, + {"inst": "fdiv Sd, Sn, Sm" , "op": "00011110|00|1|Vm|00011|0|Vn|Vd"}, + {"inst": "fdiv Dd, Dn, Dm" , "op": "00011110|01|1|Vm|00011|0|Vn|Vd"}, + {"inst": "fdiv Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|00|1|Vm|11111|1|Vn|Vd"}, + {"inst": "fdiv Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|00|1|Vm|11111|1|Vn|Vd"}, + {"inst": "fdiv Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|01|1|Vm|11111|1|Vn|Vd"}, + {"inst": "fmadd Sd, Sn, Sm, Sa" , "op": "00011111|00|0|Vm|0|Va|Vn|Vd"}, + {"inst": "fmadd Dd, Dn, Dm, Da" , "op": "00011111|01|0|Vm|0|Va|Vn|Vd"}, + {"inst": "fmax Sd, Sn, Sm" , "op": "00011110|00|1|Vm|01001|0|Vn|Vd"}, + {"inst": "fmax Dd, Dn, Dm" , "op": "00011110|01|1|Vm|01001|0|Vn|Vd"}, + {"inst": "fmax Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|00|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fmax Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|00|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fmax Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|01|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fmaxnm Sd, Sn, Sm" , "op": "00011110|00|1|Vm|01101|0|Vn|Vd"}, + {"inst": "fmaxnm Dd, Dn, Dm" , "op": "00011110|01|1|Vm|01101|0|Vn|Vd"}, + {"inst": "fmaxnm Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|00|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fmaxnm Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|01|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fmaxnm Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|00|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fmaxnmp Sd, Vn.2S" , "op": "01111110|00|11000|01100|10|Vn|Vd"}, + {"inst": "fmaxnmp Dd, Vn.2D" , "op": "01111110|01|11000|01100|10|Vn|Vd"}, + {"inst": "fmaxnmp Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|00|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fmaxnmp Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|00|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fmaxnmp Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|01|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fmaxnmv Sd, Vn.4S" , "op": "01101110|00|11000|01100|10|Vn|Vd"}, + {"inst": "fmaxp Sd, Vn.2S" , "op": "01111110|00|11000|01111|10|Vn|Vd"}, + {"inst": "fmaxp Dd, Vn.2D" , "op": "01111110|01|11000|01111|10|Vn|Vd"}, + {"inst": "fmaxp Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|00|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fmaxp Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|00|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fmaxp Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|01|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fmaxv Sd, Vn.4S" , "op": "01101110|00|11000|01111|10|Vn|Vd"}, + {"inst": "fmin Sd, Sn, Sm" , "op": "00011110|00|1|Vm|01011|0|Vn|Vd"}, + {"inst": "fmin Dd, Dn, Dm" , "op": "00011110|01|1|Vm|01011|0|Vn|Vd"}, + {"inst": "fmin Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|10|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fmin Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|10|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fmin Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|11|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fminnm Sd, Sn, Sm" , "op": "00011110|00|1|Vm|01111|0|Vn|Vd"}, + {"inst": "fminnm Dd, Dn, Dm" , "op": "00011110|01|1|Vm|01111|0|Vn|Vd"}, + {"inst": "fminnm Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|10|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fminnm Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|11|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fminnm Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|10|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fminnmp Sd, Vn.2S" , "op": "01111110|10|11000|01100|10|Vn|Vd"}, + {"inst": "fminnmp Dd, Vn.2D" , "op": "01111110|11|11000|01100|10|Vn|Vd"}, + {"inst": "fminnmp Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|10|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fminnmp Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|10|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fminnmp Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|11|1|Vm|11000|1|Vn|Vd"}, + {"inst": "fminnmv Sd, Vn.4S" , "op": "01101110|10|11000|01100|10|Vn|Vd"}, + {"inst": "fminp Sd, Vn.2S" , "op": "01111110|10|11000|01111|10|Vn|Vd"}, + {"inst": "fminp Dd, Vn.2D" , "op": "01111110|11|11000|01111|10|Vn|Vd"}, + {"inst": "fminp Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|10|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fminp Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|10|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fminp Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|11|1|Vm|11110|1|Vn|Vd"}, + {"inst": "fminv Sd, Vn.4S" , "op": "01101110|10|11000|01111|10|Vn|Vd"}, + {"inst": "fmla Sx, Sn, Vm.S[#idx]" , "op": "01011111|10|idx[0]|Vm|0001|idx[1]|0|Vn|Vx"}, + {"inst": "fmla Dx, Dn, Vm.D[#idx]" , "op": "01011111|11|0|Vm|0001|idx[0]|0|Vn|Vx"}, + {"inst": "fmla Vx.2S, Vn.2S, Vm.2S" , "op": "00001110|00|1|Vm|11001|1|Vn|Vx"}, + {"inst": "fmla Vx.4S, Vn.4S, Vm.4S" , "op": "01001110|00|1|Vm|11001|1|Vn|Vx"}, + {"inst": "fmla Vx.2D, Vn.2D, Vm.2D" , "op": "01001110|01|1|Vm|11001|1|Vn|Vx"}, + {"inst": "fmla Vx.2S, Vn.2S, Vm.S[#idx]" , "op": "00001111|10|idx[0]|Vm|0001|idx[1]|0|Vn|Vx"}, + {"inst": "fmla Vx.4S, Vn.4S, Vm.S[#idx]" , "op": "01001111|11|idx[0]|Vm|0001|idx[1]|0|Vn|Vx"}, + {"inst": "fmla Vx.2D, Vn.2D, Vm.D[#idx]" , "op": "01001111|11|0|Vm|0001|idx[0]|0|Vn|Vx"}, + {"inst": "fmls Sx, Sn, Vm.S[#idx]" , "op": "01011111|10|idx[0]|Vm|0101|idx[1]|0|Vn|Vx"}, + {"inst": "fmls Dx, Dn, Vm.D[#idx]" , "op": "01011111|11|0|Vm|0101|idx[0]|0|Vn|Vx"}, + {"inst": "fmls Vx.2S, Vn.2S, Vm.2S" , "op": "00001110|10|1|Vm|11001|1|Vn|Vx"}, + {"inst": "fmls Vx.4S, Vn.4S, Vm.4S" , "op": "01001110|10|1|Vm|11001|1|Vn|Vx"}, + {"inst": "fmls Vx.2D, Vn.2D, Vm.2D" , "op": "01001110|11|1|Vm|11001|1|Vn|Vx"}, + {"inst": "fmls Vx.2S, Vn.2S, Vm.S[#idx]" , "op": "00001111|10|idx[0]|Vm|0101|idx[1]|0|Vn|Vx"}, + {"inst": "fmls Vx.4S, Vn.4S, Vm.S[#idx]" , "op": "01001111|11|idx[0]|Vm|0101|idx[1]|0|Vn|Vx"}, + {"inst": "fmls Vx.2D, Vn.2D, Vm.D[#idx]" , "op": "01001111|11|0|Vm|0101|idx[0]|0|Vn|Vx"}, + {"inst": "fmov Wd, Sn" , "op": "00011110|00|10011|00000|00|Vn|Rd"}, + {"inst": "fmov Xd, Dn" , "op": "10011110|01|10011|00000|00|Vn|Rd"}, + {"inst": "fmov Xd, Vn.D[#1]" , "op": "10011110|10|10111|00000|00|Vn|Rd"}, + {"inst": "fmov Sd, Wn" , "op": "00011110|00|10011|10000|00|Rn|Vd"}, + {"inst": "fmov Sd, Sn" , "op": "00011110|00|10000|00100|00|Vn|Vd"}, + {"inst": "fmov Sd, #fimm" , "op": "00011110|00|1|imm:8|100|00000|Vd" , "imm": "ASimdFMovImm(fimm)"}, + {"inst": "fmov Dd, Xn" , "op": "10011110|01|10011|10000|00|Rn|Vd"}, + {"inst": "fmov Dd, Dn" , "op": "00011110|01|10000|00100|00|Vn|Vd"}, + {"inst": "fmov Dd, #fimm" , "op": "00011110|01|1|imm:8|100|00000|Vd" , "imm": "ASimdFMovImm(fimm)"}, + {"inst": "fmov Vd.D[#1], Xn" , "op": "10011110|10|10111|10000|00|Rn|Vd"}, + {"inst": "fmov Vd.2S, #fimm" , "op": "00001111|00|000|abc:3|111101|defgh:5|Vd" , "imm": "ASimdFMovImm(fimm)"}, + {"inst": "fmov Vd.4S, #fimm" , "op": "01001111|00|000|abc:3|111101|defgh:5|Vd" , "imm": "ASimdFMovImm(fimm)"}, + {"inst": "fmov Vd.2D, #fimm" , "op": "01101111|00|000|abc:3|111101|defgh:5|Vd" , "imm": "ASimdFMovImm(fimm)"}, + {"inst": "fmsub Sd, Sn, Sm, Sa" , "op": "00011111|00|0|Vm|1|Va|Vn|Vd"}, + {"inst": "fmsub Dd, Dn, Dm, Da" , "op": "00011111|01|0|Vm|1|Va|Vn|Vd"}, + {"inst": "fmul Sd, Sn, Sm" , "op": "00011110|00|1|Vm|00001|0|Vn|Vd"}, + {"inst": "fmul Dd, Dn, Dm" , "op": "00011110|01|1|Vm|00001|0|Vn|Vd"}, + {"inst": "fmul Sd, Sn, Vm.S[#idx]" , "op": "01011111|10|idx[0]|Vm|1001|idx[1]|0|Vn|Vd"}, + {"inst": "fmul Dd, Dn, Vm.D[#idx]" , "op": "01011111|11|0|Vm|1001|idx[0]|0|Vn|Vd"}, + {"inst": "fmul Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|00|1|Vm|11011|1|Vn|Vd"}, + {"inst": "fmul Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|00|1|Vm|11011|1|Vn|Vd"}, + {"inst": "fmul Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|01|1|Vm|11011|1|Vn|Vd"}, + {"inst": "fmul Vd.2S, Vn.2S, Vm.S[#idx]" , "op": "00001111|10|idx[0]|Vm|1001|idx[1]|0|Vn|Vd"}, + {"inst": "fmul Vd.4S, Vn.4S, Vm.S[#idx]" , "op": "01001111|11|idx[0]|Vm|1001|idx[1]|0|Vn|Vd"}, + {"inst": "fmul Vd.2D, Vn.2D, Vm.D[#idx]" , "op": "01001111|11|0|Vm|1001|idx[0]|0|Vn|Vd"}, + {"inst": "fmulx Sd, Sn, Sm" , "op": "01011110|00|1|Vm|11011|1|Vn|Vd"}, + {"inst": "fmulx Dd, Dn, Dm" , "op": "01011110|01|1|Vm|11011|1|Vn|Vd"}, + {"inst": "fmulx Sd, Sn, Vm.S[#idx]" , "op": "01111111|10|idx[0]|Vm|1001|idx[1]|0|Vn|Vd"}, + {"inst": "fmulx Dd, Dn, Vm.D[#idx]" , "op": "01111111|11|0|Vm|1001|idx:1|0|Vn|Vd"}, + {"inst": "fmulx Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|00|1|Vm|11011|1|Vn|Vd"}, + {"inst": "fmulx Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|00|1|Vm|11011|1|Vn|Vd"}, + {"inst": "fmulx Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|01|1|Vm|11011|1|Vn|Vd"}, + {"inst": "fmulx Vd.2S, Vn.2S, Vm.S[#idx]" , "op": "00101111|10|idx[0]|Vm|1001|idx[1]|0|Vn|Vd"}, + {"inst": "fmulx Vd.4S, Vn.4S, Vm.S[#idx]" , "op": "01101111|10|idx[0]|Vm|1001|idx[1]|0|Vn|Vd"}, + {"inst": "fmulx Vd.2D, Vn.2D, Vm.D[#idx]" , "op": "01101111|11|0|Vm|1001|idx:1|0|Vn|Vd"}, + {"inst": "fneg Sd, Sn" , "op": "00011110|00|10000|10100|00|Vn|Vd"}, + {"inst": "fneg Dd, Dn" , "op": "00011110|01|10000|10100|00|Vn|Vd"}, + {"inst": "fneg Vd.2S, Vn.2S" , "op": "00101110|10|10000|01111|10|Vn|Vd"}, + {"inst": "fneg Vd.4S, Vn.4S" , "op": "01101110|10|10000|01111|10|Vn|Vd"}, + {"inst": "fneg Vd.2D, Vn.2D" , "op": "01101110|11|10000|01111|10|Vn|Vd"}, + {"inst": "fnmadd Sd, Sn, Sm, Sa" , "op": "00011111|00|1|Vm|0|Va|Vn|Vd"}, + {"inst": "fnmadd Dd, Dn, Dm, Da" , "op": "00011111|01|1|Vm|0|Va|Vn|Vd"}, + {"inst": "fnmsub Sd, Sn, Sm, Sa" , "op": "00011111|00|1|Vm|1|Va|Vn|Vd"}, + {"inst": "fnmsub Dd, Dn, Dm, Da" , "op": "00011111|01|1|Vm|1|Va|Vn|Vd"}, + {"inst": "fnmul Sd, Sn, Sm" , "op": "00011110|00|1|Vm|10001|0|Vn|Vd"}, + {"inst": "fnmul Dd, Dn, Dm" , "op": "00011110|01|1|Vm|10001|0|Vn|Vd"}, + {"inst": "frecpe Sd, Sn" , "op": "01011110|10|10000|11101|10|Vn|Vd"}, + {"inst": "frecpe Dd, Dn" , "op": "01011110|11|10000|11101|10|Vn|Vd"}, + {"inst": "frecpe Vd.2S, Vn.2S" , "op": "00001110|10|10000|11101|10|Vn|Vd"}, + {"inst": "frecpe Vd.4S, Vn.4S" , "op": "01001110|10|10000|11101|10|Vn|Vd"}, + {"inst": "frecpe Vd.2D, Vn.2D" , "op": "01001110|11|10000|11101|10|Vn|Vd"}, + {"inst": "frecps Sd, Sn, Sm" , "op": "01011110|00|1|Vm|11111|1|Vn|Vd"}, + {"inst": "frecps Dd, Dn, Dm" , "op": "01011110|01|1|Vm|11111|1|Vn|Vd"}, + {"inst": "frecps Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|00|1|Vm|11111|1|Vn|Vd"}, + {"inst": "frecps Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|00|1|Vm|11111|1|Vn|Vd"}, + {"inst": "frecps Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|01|1|Vm|11111|1|Vn|Vd"}, + {"inst": "frecpx Sd, Sn, Sm" , "op": "01011110|10|10000|11111|10|Vn|Vd"}, + {"inst": "frecpx Dd, Dn, Dm" , "op": "01011110|11|10000|11111|10|Vn|Vd"}, + {"inst": "frinta Sd, Sn" , "op": "00011110|00|10011|00100|00|Vn|Vd"}, + {"inst": "frinta Dd, Dn" , "op": "00011110|01|10011|00100|00|Vn|Vd"}, + {"inst": "frinta Vd.2S, Vn.2S" , "op": "00101110|00|10000|11000|10|Vn|Vd"}, + {"inst": "frinta Vd.4S, Vn.4S" , "op": "01101110|00|10000|11000|10|Vn|Vd"}, + {"inst": "frinta Vd.2D, Vn.2D" , "op": "01101110|01|10000|11000|10|Vn|Vd"}, + {"inst": "frinti Sd, Sn" , "op": "00011110|00|10011|11100|00|Vn|Vd"}, + {"inst": "frinti Dd, Dn" , "op": "00011110|01|10011|11100|00|Vn|Vd"}, + {"inst": "frinti Vd.2S, Vn.2S" , "op": "00101110|10|10000|11001|10|Vn|Vd"}, + {"inst": "frinti Vd.4S, Vn.4S" , "op": "01101110|10|10000|11001|10|Vn|Vd"}, + {"inst": "frinti Vd.2D, Vn.2D" , "op": "01101110|11|10000|11001|10|Vn|Vd"}, + {"inst": "frintm Sd, Sn" , "op": "00011110|00|10010|10100|00|Vn|Vd"}, + {"inst": "frintm Dd, Dn" , "op": "00011110|01|10010|10100|00|Vn|Vd"}, + {"inst": "frintm Vd.2S, Vn.2S" , "op": "00001110|00|10000|11001|10|Vn|Vd"}, + {"inst": "frintm Vd.4S, Vn.4S" , "op": "01001110|00|10000|11001|10|Vn|Vd"}, + {"inst": "frintm Vd.2D, Vn.2D" , "op": "01001110|01|10000|11001|10|Vn|Vd"}, + {"inst": "frintn Sd, Sn" , "op": "00011110|00|10010|00100|00|Vn|Vd"}, + {"inst": "frintn Dd, Dn" , "op": "00011110|01|10010|00100|00|Vn|Vd"}, + {"inst": "frintn Vd.2S, Vn.2S" , "op": "00001110|00|10000|11000|10|Vn|Vd"}, + {"inst": "frintn Vd.4S, Vn.4S" , "op": "01001110|00|10000|11000|10|Vn|Vd"}, + {"inst": "frintn Vd.2D, Vn.2D" , "op": "01001110|01|10000|11000|10|Vn|Vd"}, + {"inst": "frintp Sd, Sn" , "op": "00011110|00|10010|01100|00|Vn|Vd"}, + {"inst": "frintp Dd, Dn" , "op": "00011110|01|10010|01100|00|Vn|Vd"}, + {"inst": "frintp Vd.2S, Vn.2S" , "op": "00001110|10|10000|11000|10|Vn|Vd"}, + {"inst": "frintp Vd.4S, Vn.4S" , "op": "01001110|10|10000|11000|10|Vn|Vd"}, + {"inst": "frintp Vd.2D, Vn.2D" , "op": "01001110|11|10000|11000|10|Vn|Vd"}, + {"inst": "frintx Sd, Sn" , "op": "00011110|00|10011|10100|00|Vn|Vd"}, + {"inst": "frintx Dd, Dn" , "op": "00011110|01|10011|10100|00|Vn|Vd"}, + {"inst": "frintx Vd.2S, Vn.2S" , "op": "00101110|00|10000|11001|10|Vn|Vd"}, + {"inst": "frintx Vd.4S, Vn.4S" , "op": "01101110|00|10000|11001|10|Vn|Vd"}, + {"inst": "frintx Vd.2D, Vn.2D" , "op": "01101110|01|10000|11001|10|Vn|Vd"}, + {"inst": "frintz Sd, Sn" , "op": "00011110|00|10010|11100|00|Vn|Vd"}, + {"inst": "frintz Dd, Dn" , "op": "00011110|01|10010|11100|00|Vn|Vd"}, + {"inst": "frintz Vd.2S, Vn.2S" , "op": "00001110|10|10000|11001|10|Vn|Vd"}, + {"inst": "frintz Vd.4S, Vn.4S" , "op": "01001110|10|10000|11001|10|Vn|Vd"}, + {"inst": "frintz Vd.2D, Vn.2D" , "op": "01001110|11|10000|11001|10|Vn|Vd"}, + {"inst": "frsqrte Sd, Sn" , "op": "01111110|10|10000|11101|10|Vn|Vd"}, + {"inst": "frsqrte Dd, Dn" , "op": "01111110|11|10000|11101|10|Vn|Vd"}, + {"inst": "frsqrte Vd.2S, Vn.2S" , "op": "00101110|10|10000|11101|10|Vn|Vd"}, + {"inst": "frsqrte Vd.4S, Vn.4S" , "op": "01101110|10|10000|11101|10|Vn|Vd"}, + {"inst": "frsqrte Vd.2D, Vn.2D" , "op": "01101110|11|10000|11101|10|Vn|Vd"}, + {"inst": "frsqrts Sd, Sn, Sm" , "op": "01011110|10|1|Vm|11111|1|Vn|Vd"}, + {"inst": "frsqrts Dd, Dn, Dm" , "op": "01011110|11|1|Vm|11111|1|Vn|Vd"}, + {"inst": "frsqrts Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|10|1|Vm|11111|1|Vn|Vd"}, + {"inst": "frsqrts Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|10|1|Vm|11111|1|Vn|Vd"}, + {"inst": "frsqrts Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|11|1|Vm|11111|1|Vn|Vd"}, + {"inst": "fsqrt Sd, Sn" , "op": "00011110|10|10000|11100|00|Vn|Vd"}, + {"inst": "fsqrt Dd, Dn" , "op": "00011110|11|10000|11100|00|Vn|Vd"}, + {"inst": "fsqrt Vd.2S, Vn.2S" , "op": "00101110|10|10000|11111|10|Vn|Vd"}, + {"inst": "fsqrt Vd.4S, Vn.4S" , "op": "01101110|10|10000|11111|10|Vn|Vd"}, + {"inst": "fsqrt Vd.2D, Vn.2D" , "op": "01101110|11|10000|11111|10|Vn|Vd"}, + {"inst": "fsub Sd, Sn, Sm" , "op": "00011110|00|1|Vm|00111|0|Vn|Vd"}, + {"inst": "fsub Dd, Dn, Dm" , "op": "00011110|01|1|Vm|00111|0|Vn|Vd"}, + {"inst": "fsub Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|10|1|Vm|11010|1|Vn|Vd"}, + {"inst": "fsub Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|10|1|Vm|11010|1|Vn|Vd"}, + {"inst": "fsub Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|11|1|Vm|11010|1|Vn|Vd"}, + {"inst": "ins|mov Vd.B[#idx], Wn" , "op": "01001110|00|0|idx:4|1 |00011|1|Rn|Vd"}, + {"inst": "ins|mov Vd.H[#idx], Wn" , "op": "01001110|00|0|idx:3|10 |00011|1|Rn|Vd"}, + {"inst": "ins|mov Vd.S[#idx], Wn" , "op": "01001110|00|0|idx:2|100 |00011|1|Rn|Vd"}, + {"inst": "ins|mov Vd.D[#idx], Xn" , "op": "01001110|00|0|idx:1|1000|00011|1|Rn|Vd"}, + {"inst": "ins|mov Vd.B[#idx1], Vn.B[#idx2]" , "op": "01101110|00|0|idx1:4|1 |0|idx2:4|1 |Rn|Vd"}, + {"inst": "ins|mov Vd.H[#idx1], Vn.H[#idx2]" , "op": "01101110|00|0|idx1:3|10 |0|idx2:3|01 |Rn|Vd"}, + {"inst": "ins|mov Vd.S[#idx1], Vn.S[#idx2]" , "op": "01101110|00|0|idx1:2|100 |0|idx2:2|001 |Rn|Vd"}, + {"inst": "ins|mov Vd.D[#idx1], Vn.D[#idx2]" , "op": "01101110|00|0|idx1:1|1000|0|idx2:1|0001|Rn|Vd"}, + {"inst": "ld1 Vx.B[#idx], [Xn|SP]" , "op": "0|idx:1|001101|010|00000|000|idx:3 |Rn|Vx"}, + {"inst": "ld1 Vx.H[#idx], [Xn|SP]" , "op": "0|idx:1|001101|010|00000|010|idx:2| 0|Rn|Vx"}, + {"inst": "ld1 Vx.S[#idx], [Xn|SP]" , "op": "0|idx:1|001101|010|00000|100|idx:1|00|Rn|Vx"}, + {"inst": "ld1 Vx.D[#idx], [Xn|SP]" , "op": "0|idx:1|001101|010|00000|100| 001|Rn|Vx"}, + {"inst": "ld1 Vx.B[#idx], [Xn|SP, Xm]@" , "op": "0|idx:1|001101|110|Rm |000|idx:3 |Rn|Vx"}, + {"inst": "ld1 Vx.H[#idx], [Xn|SP, Xm]@" , "op": "0|idx:1|001101|110|Rm |010|idx:2| 0|Rn|Vx"}, + {"inst": "ld1 Vx.S[#idx], [Xn|SP, Xm]@" , "op": "0|idx:1|001101|110|Rm |100|idx:1|00|Rn|Vx"}, + {"inst": "ld1 Vx.D[#idx], [Xn|SP, Xm]@" , "op": "0|idx:1|001101|110|Rm |100| 001|Rn|Vx"}, + {"inst": "ld1 Vx.B[#idx], [Xn|SP, #off=1]@" , "op": "0|idx:1|001101|110|11111|000|idx:3 |Rn|Vx"}, + {"inst": "ld1 Vx.H[#idx], [Xn|SP, #off=2]@" , "op": "0|idx:1|001101|110|11111|010|idx:2| 0|Rn|Vx"}, + {"inst": "ld1 Vx.S[#idx], [Xn|SP, #off=4]@" , "op": "0|idx:1|001101|110|11111|100|idx:1|00|Rn|Vx"}, + {"inst": "ld1 Vx.D[#idx], [Xn|SP, #off=8]@" , "op": "0|idx:1|001101|110|11111|100| 001|Rn|Vx"}, + {"inst": "ld1 1x{Vd.t}, [Xn|SP]" , "op": "00001100|010|00000|0111|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 1x{Vd.t}, [Xn|SP]" , "op": "01001100|010|00000|0111|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 2x{Vd.t}, [Xn|SP]" , "op": "00001100|010|00000|1010|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 2x{Vd.t}, [Xn|SP]" , "op": "01001100|010|00000|1010|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 3x{Vd.t}, [Xn|SP]" , "op": "00001100|010|00000|0110|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 3x{Vd.t}, [Xn|SP]" , "op": "01001100|010|00000|0110|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 4x{Vd.t}, [Xn|SP]" , "op": "00001100|010|00000|0010|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 4x{Vd.t}, [Xn|SP]" , "op": "01001100|010|00000|0010|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 1x{Vd.t}, [Xn|SP, Xm]@" , "op": "00001100|110|Rm |0111|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 1x{Vd.t}, [Xn|SP, Xm]@" , "op": "01001100|110|Rm |0111|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 2x{Vd.t}, [Xn|SP, Xm]@" , "op": "00001100|110|Rm |1010|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 2x{Vd.t}, [Xn|SP, Xm]@" , "op": "01001100|110|Rm |1010|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 3x{Vd.t}, [Xn|SP, Xm]@" , "op": "00001100|110|Rm |0110|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 3x{Vd.t}, [Xn|SP, Xm]@" , "op": "01001100|110|Rm |0110|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 4x{Vd.t}, [Xn|SP, Xm]@" , "op": "00001100|110|Rm |0010|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 4x{Vd.t}, [Xn|SP, Xm]@" , "op": "01001100|110|Rm |0010|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 1x{Vd.t}, [Xn|SP, #off==8]@" , "op": "00001100|110|11111|0111|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 1x{Vd.t}, [Xn|SP, #off==16]@" , "op": "01001100|110|11111|0111|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 2x{Vd.t}, [Xn|SP, #off==16]@" , "op": "00001100|110|11111|1010|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 2x{Vd.t}, [Xn|SP, #off==32]@" , "op": "01001100|110|11111|1010|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 3x{Vd.t}, [Xn|SP, #off==24]@" , "op": "00001100|110|11111|0110|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 3x{Vd.t}, [Xn|SP, #off==48]@" , "op": "01001100|110|11111|0110|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1 4x{Vd.t}, [Xn|SP, #off==32]@" , "op": "00001100|110|11111|0010|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1 4x{Vd.t}, [Xn|SP, #off==64]@" , "op": "01001100|110|11111|0010|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1r 1x{Vd.t}, [Xn|SP]" , "op": "00001101|010|00000|1100|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1r 1x{Vd.t}, [Xn|SP]" , "op": "01001101|010|00000|1100|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1r 1x{Vd.t}, [Xn|SP, Xm]@" , "op": "00001101|110|Rm |1100|sz|Rn|Vd" , "t": "8B 4H 2S 1D"}, + {"inst": "ld1r 1x{Vd.t}, [Xn|SP, Xm]@" , "op": "01001101|110|Rm |1100|sz|Rn|Vd" , "t": "16B 8H 4S 2D"}, + {"inst": "ld1r 1x{Vd.t}, [Xn|SP, #off==1<" , "op": "66 98"}, + {"inst": "cdq W:, " , "op": "99"}, + {"inst": "cdqe X:" , "op": "REX.W 98"}, + {"inst": "clc" , "op": "F8" , "io": "CF=0"}, + {"inst": "cld" , "op": "FC" , "io": "DF=0"}, + {"inst": "cmc" , "op": "F5" , "io": "CF=X"}, + {"inst": "cmp R:al, ib/ub" , "op": "3C ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "cmp R:ax, iw/uw" , "op": "66 3D iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "cmp R:eax, id/ud" , "op": "3D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "cmp R:rax, id" , "op": "REX.W 3D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "cmp R:r8/m8, ib/ub" , "op": "M: 80 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r16/m16, iw/uw" , "op": "M: 66 81 /7 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r32/m32, id/ud" , "op": "M: 81 /7 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r64/m64, id" , "op": "M: REX.W 81 /7 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r16/m16, ib" , "op": "M: 66 83 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r32/m32, ib" , "op": "M: 83 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r64/m64, ib" , "op": "M: REX.W 83 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r8/m8, r8" , "op": "MR: 38 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r16/m16, r16" , "op": "MR: 66 39 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r32/m32, r32" , "op": "MR: 39 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r64/m64, r64" , "op": "MR: REX.W 39 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r8, r8/m8" , "op": "RM: 3A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r16, r16/m16" , "op": "RM: 66 3B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r32, r32/m32" , "op": "RM: 3B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "cmp R:r64, r64/m64" , "op": "RM: REX.W 3B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[rep|repne] cmps R:m8(ds:zsi), R:m8(es:zdi)" , "op": "A6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"}, + {"inst": "[rep|repne] cmps R:m16(ds:zsi), R:m16(es:zdi)" , "op": "66 A7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"}, + {"inst": "[rep|repne] cmps R:m32(ds:zsi), R:m32(es:zdi)" , "op": "A7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"}, + {"inst": "[rep|repne] cmps R:m64(ds:zsi), R:m64(es:zdi)" , "op": "REX.W A7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"}, + {"inst": "cwde X:" , "op": "98"}, + {"inst": "cqo W:, " , "op": "REX.W 99"}, + {"inst": "cwd w:, " , "op": "66 99"}, + {"inst": "dec x:r16" , "op": "66 48+r" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X86"}, + {"inst": "dec X:r32" , "op": "48+r" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X86"}, + {"inst": "[lock|xacqrel] dec x:r8/m8" , "op": "FE /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "[lock|xacqrel] dec x:r16/m16" , "op": "66 FF /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "[lock|xacqrel] dec X:r32/m32" , "op": "FF /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "[lock|xacqrel] dec X:r64/m64" , "op": "REX.W FF /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "div x:, r8/m8" , "op": "F6 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "div x:, x:, r16/m16" , "op": "66 F7 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "div X:, X:, r32/m32" , "op": "F7 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "div X:, X:, r64/m64" , "op": "REX.W F7 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "enter iw/uw, ib/ub" , "op": "C8 iw ib" , "volatile": true}, + {"inst": "idiv x:, r8/m8" , "op": "F6 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "idiv x:, x:, r16/m16" , "op": "66 F7 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "idiv X:, X:, r32/m32" , "op": "F7 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "idiv X:, X:, r64/m64" , "op": "REX.W F7 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "imul x:, r8/m8" , "op": "F6 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul w:, x:, r16/m16" , "op": "66 F7 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul W:, X:, r32/m32" , "op": "F7 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul W:, X:, r64/m64" , "op": "REX.W F7 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul x:~r16, ~r16/m16" , "op": "RM: 66 0F AF /r" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul X:~r32, ~r32/m32" , "op": "RM: 0F AF /r" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul X:~r64, ~r64/m64" , "op": "RM: REX.W 0F AF /r" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul w:r16, r16/m16, ib" , "op": "RM: 66 6B /r ib" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul W:r32, r32/m32, ib" , "op": "RM: 6B /r ib" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul W:r64, r64/m64, ib" , "op": "RM: REX.W 6B /r ib" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul w:r16, r16/m16, iw/uw" , "op": "RM: 66 69 /r iw" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul W:r32, r32/m32, id/ud" , "op": "RM: 69 /r id" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "imul W:r64, r64/m64, id" , "op": "RM: REX.W 69 /r id" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"}, + {"inst": "inc x:r16" , "op": "66 40+r" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X86"}, + {"inst": "inc X:r32" , "op": "40+r" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X86"}, + {"inst": "[lock] inc x:r8/m8" , "op": "FE /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "[lock] inc x:r16/m16" , "op": "66 FF /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "[lock] inc X:r32/m32" , "op": "FF /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "[lock] inc X:r64/m64" , "op": "REX.W FF /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "iret" , "op": "66 CF" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "iretd" , "op": "CF" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "iretq" , "op": "REX.W CF" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "[bnd] jo rel8" , "op": "70 cb" , "io": "OF=R"}, + {"inst": "[bnd] jo rel16" , "op": "66 0F 80 cw" , "io": "OF=R"}, + {"inst": "[bnd] jo rel32" , "op": "0F 80 cd" , "io": "OF=R"}, + {"inst": "[bnd] jno rel8" , "op": "71 cb" , "io": "OF=R"}, + {"inst": "[bnd] jno rel16" , "op": "66 0F 81 cw" , "io": "OF=R"}, + {"inst": "[bnd] jno rel32" , "op": "0F 81 cd" , "io": "OF=R"}, + {"inst": "[bnd] jb|jnae|jc rel8" , "op": "72 cb" , "io": "CF=R"}, + {"inst": "[bnd] jb|jnae|jc rel16" , "op": "66 0F 82 cw" , "io": "CF=R"}, + {"inst": "[bnd] jb|jnae|jc rel32" , "op": "0F 82 cd" , "io": "CF=R"}, + {"inst": "[bnd] jae|jnb|jnc rel8" , "op": "73 cb" , "io": "CF=R"}, + {"inst": "[bnd] jae|jnb|jnc rel16" , "op": "66 0F 83 cw" , "io": "CF=R"}, + {"inst": "[bnd] jae|jnb|jnc rel32" , "op": "0F 83 cd" , "io": "CF=R"}, + {"inst": "[bnd] je|jz rel8" , "op": "74 cb" , "io": "ZF=R"}, + {"inst": "[bnd] je|jz rel16" , "op": "66 0F 84 cw" , "io": "ZF=R"}, + {"inst": "[bnd] je|jz rel32" , "op": "0F 84 cd" , "io": "ZF=R"}, + {"inst": "[bnd] jne|jnz rel8" , "op": "75 cb" , "io": "ZF=R"}, + {"inst": "[bnd] jne|jnz rel16" , "op": "66 0F 85 cw" , "io": "ZF=R"}, + {"inst": "[bnd] jne|jnz rel32" , "op": "0F 85 cd" , "io": "ZF=R"}, + {"inst": "[bnd] jbe|jna rel8" , "op": "76 cb" , "io": "CF=R ZF=R"}, + {"inst": "[bnd] jbe|jna rel16" , "op": "66 0F 86 cw" , "io": "CF=R ZF=R"}, + {"inst": "[bnd] jbe|jna rel32" , "op": "0F 86 cd" , "io": "CF=R ZF=R"}, + {"inst": "[bnd] ja|jnbe rel8" , "op": "77 cb" , "io": "CF=R ZF=R"}, + {"inst": "[bnd] ja|jnbe rel16" , "op": "66 0F 87 cw" , "io": "CF=R ZF=R"}, + {"inst": "[bnd] ja|jnbe rel32" , "op": "0F 87 cd" , "io": "CF=R ZF=R"}, + {"inst": "[bnd] js rel8" , "op": "78 cb" , "io": "SF=R"}, + {"inst": "[bnd] js rel16" , "op": "66 0F 88 cw" , "io": "SF=R"}, + {"inst": "[bnd] js rel32" , "op": "0F 88 cd" , "io": "SF=R"}, + {"inst": "[bnd] jns rel8" , "op": "79 cb" , "io": "SF=R"}, + {"inst": "[bnd] jns rel16" , "op": "66 0F 89 cw" , "io": "SF=R"}, + {"inst": "[bnd] jns rel32" , "op": "0F 89 cd" , "io": "SF=R"}, + {"inst": "[bnd] jp|jpe rel8" , "op": "7A cb" , "io": "PF=R"}, + {"inst": "[bnd] jp|jpe rel16" , "op": "66 0F 8A cw" , "io": "PF=R"}, + {"inst": "[bnd] jp|jpe rel32" , "op": "0F 8A cd" , "io": "PF=R"}, + {"inst": "[bnd] jnp|jpo rel8" , "op": "7B cb" , "io": "PF=R"}, + {"inst": "[bnd] jnp|jpo rel16" , "op": "66 0F 8B cw" , "io": "PF=R"}, + {"inst": "[bnd] jnp|jpo rel32" , "op": "0F 8B cd" , "io": "PF=R"}, + {"inst": "[bnd] jl|jnge rel8" , "op": "7C cb" , "io": "SF=R OF=R"}, + {"inst": "[bnd] jl|jnge rel16" , "op": "66 0F 8C cw" , "io": "SF=R OF=R"}, + {"inst": "[bnd] jl|jnge rel32" , "op": "0F 8C cd" , "io": "SF=R OF=R"}, + {"inst": "[bnd] jge|jnl rel8" , "op": "7D cb" , "io": "SF=R OF=R"}, + {"inst": "[bnd] jge|jnl rel16" , "op": "66 0F 8D cw" , "io": "SF=R OF=R"}, + {"inst": "[bnd] jge|jnl rel32" , "op": "0F 8D cd" , "io": "SF=R OF=R"}, + {"inst": "[bnd] jle|jng rel8" , "op": "7E cb" , "io": "ZF=R SF=R OF=R"}, + {"inst": "[bnd] jle|jng rel16" , "op": "66 0F 8E cw" , "io": "ZF=R SF=R OF=R"}, + {"inst": "[bnd] jle|jng rel32" , "op": "0F 8E cd" , "io": "ZF=R SF=R OF=R"}, + {"inst": "[bnd] jg|jnle rel8" , "op": "7F cb" , "io": "ZF=R SF=R OF=R"}, + {"inst": "[bnd] jg|jnle rel16" , "op": "66 0F 8F cw" , "io": "ZF=R SF=R OF=R"}, + {"inst": "[bnd] jg|jnle rel32" , "op": "0F 8F cd" , "io": "ZF=R SF=R OF=R"}, + {"inst": "[bnd] jecxz R:, rel8" , "op": "67 E3 cb" , "arch": "X86"}, + {"inst": "[bnd] jecxz R:, rel8" , "op": "E3 cb" , "arch": "X86"}, + {"inst": "[bnd] jecxz R:, rel8" , "op": "67 E3 cb" , "arch": "X64"}, + {"inst": "[bnd] jecxz R:, rel8" , "op": "E3 cb" , "arch": "X64"}, + {"inst": "[bnd] jmp rel8" , "op": "EB cb"}, + {"inst": "[bnd] jmp rel16" , "op": "66 E9 cw" , "arch": "X86"}, + {"inst": "[bnd] jmp rel32" , "op": "E9 cd"}, + {"inst": "[bnd] jmp R:r32/m32" , "op": "FF /4" , "arch": "X86"}, + {"inst": "[bnd] jmp R:r64/m64" , "op": "FF /4" , "arch": "X64"}, + {"inst": "lcall iw, iw" , "op": "66 9A iw iw" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X86"}, + {"inst": "lcall iw, id" , "op": "9A id iw" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X86"}, + {"inst": "lcall R:m16_16" , "op": "66 FF /3" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "lcall R:m16_32" , "op": "FF /3" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "lcall R:m16_64" , "op": "REX.W FF /3" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X64"}, + {"inst": "lea w:r16, mem" , "op": "RM: 67 8D /r"}, + {"inst": "lea W:r32, mem" , "op": "RM: 8D /r"}, + {"inst": "lea W:r64, mem" , "op": "RM: REX.W 8D /r"}, + {"inst": "leave" , "op": "C9" , "volatile": true}, + {"inst": "ljmp iw, iw" , "op": "66 EA iw iw" , "arch": "X86"}, + {"inst": "ljmp iw, id" , "op": "EA id iw" , "arch": "X86"}, + {"inst": "ljmp R:m16_16" , "op": "66 FF /5"}, + {"inst": "ljmp R:m16_32" , "op": "FF /5"}, + {"inst": "ljmp R:m16_64" , "op": "REX.W FF /5"}, + {"inst": "[rep] lods w:al, R:m8(ds:zsi)" , "op": "AC" , "io": "DF=R"}, + {"inst": "[rep] lods w:ax, R:m16(ds:zsi)" , "op": "66 AD" , "io": "DF=R"}, + {"inst": "[rep] lods W:eax, R:m32(ds:zsi)" , "op": "AD" , "io": "DF=R"}, + {"inst": "[rep] lods W:rax, R:m64(ds:zsi)" , "op": "REX.W AD" , "io": "DF=R"}, + {"inst": "loop x:, rel8" , "op": "67 E2 cb" , "arch": "X86"}, + {"inst": "loop X:, rel8" , "op": "E2 cb" , "arch": "X86"}, + {"inst": "loop X:, rel8" , "op": "67 E2 cb" , "arch": "X64"}, + {"inst": "loop X:, rel8" , "op": "E2 cb" , "arch": "X64"}, + {"inst": "loope x:, rel8" , "op": "67 E1 cb" , "io": "ZF=R", "arch": "X86"}, + {"inst": "loope X:, rel8" , "op": "E1 cb" , "io": "ZF=R", "arch": "X86"}, + {"inst": "loope X:, rel8" , "op": "67 E1 cb" , "io": "ZF=R", "arch": "X64"}, + {"inst": "loope X:, rel8" , "op": "E1 cb" , "io": "ZF=R", "arch": "X64"}, + {"inst": "loopne x:, rel8" , "op": "67 E0 cb" , "io": "ZF=R", "arch": "X86"}, + {"inst": "loopne X:, rel8" , "op": "E0 cb" , "io": "ZF=R", "arch": "X86"}, + {"inst": "loopne X:, rel8" , "op": "67 E0 cb" , "io": "ZF=R", "arch": "X64"}, + {"inst": "loopne X:, rel8" , "op": "E0 cb" , "io": "ZF=R", "arch": "X64"}, + {"inst": "[xrelease] mov w:r8/m8, r8" , "op": "MR: 88 /r"}, + {"inst": "[xrelease] mov w:r16/m16, r16" , "op": "MR: 66 89 /r"}, + {"inst": "[xrelease] mov W:r32/m32, r32" , "op": "MR: 89 /r"}, + {"inst": "[xrelease] mov W:r64/m64, r64" , "op": "MR: REX.W 89 /r"}, + {"inst": "[xrelease] mov w:r8/m8, ib/ub" , "op": "M: C6 /0 ib"}, + {"inst": "[xrelease] mov w:r16/m16, iw/uw" , "op": "M: 66 C7 /0 iw"}, + {"inst": "[xrelease] mov W:r32/m32, id/ud" , "op": "M: C7 /0 id"}, + {"inst": "[xrelease] mov W:r64/m64, id" , "op": "M: REX.W C7 /0 id"}, + {"inst": "mov w:r8, ib/ub" , "op": "B0+r ib"}, + {"inst": "mov w:r16, iw/uw" , "op": "66 B8+r iw"}, + {"inst": "mov W:r32, id/ud" , "op": "B8+r id"}, + {"inst": "mov W:r64, iq/uq" , "op": "REX.W B8+r iq"}, + {"inst": "mov w:r8, r8/m8" , "op": "RM: 8A /r"}, + {"inst": "mov w:r16, r16/m16" , "op": "RM: 66 8B /r"}, + {"inst": "mov W:r32, r32/m32" , "op": "RM: 8B /r"}, + {"inst": "mov W:r64, r64/m64" , "op": "RM: REX.W 8B /r"}, + {"inst": "mov w:r16/m16, sreg" , "op": "MR: 66 8C /r"}, + {"inst": "mov W:r32/m16, sreg" , "op": "MR: 8C /r"}, + {"inst": "mov W:r64/m16, sreg" , "op": "MR: REX.W 8C /r"}, + {"inst": "mov W:sreg, r16/m16" , "op": "RM: 66 8E /r"}, + {"inst": "mov W:sreg, r32/m16" , "op": "RM: 8E /r"}, + {"inst": "mov W:sreg, r64/m16" , "op": "RM: REX.W 8E /r"}, + {"inst": "mov w:al, moff8" , "op": "A0 moff"}, + {"inst": "mov w:ax, moff16" , "op": "66 A1 moff"}, + {"inst": "mov W:eax, moff32" , "op": "A1 moff"}, + {"inst": "mov W:rax, moff64" , "op": "REX.W A1 moff"}, + {"inst": "mov W:moff8, al" , "op": "A2 moff"}, + {"inst": "mov W:moff16, ax" , "op": "66 A3 moff"}, + {"inst": "mov W:moff32, eax" , "op": "A3 moff"}, + {"inst": "mov W:moff64, rax" , "op": "REX.W A3 moff"}, + {"inst": "mov W:r32, creg" , "op": "MR: 0F 20 /r" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"}, + {"inst": "mov W:r64, creg" , "op": "MR: 0F 20 /r" , "arch": "X64", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"}, + {"inst": "mov W:creg, r32" , "op": "RM: 0F 22 /r" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"}, + {"inst": "mov W:creg, r64" , "op": "RM: 0F 22 /r" , "arch": "X64", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"}, + {"inst": "mov W:r32, dreg" , "op": "MR: 0F 21 /r" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"}, + {"inst": "mov W:r64, dreg" , "op": "MR: 0F 21 /r" , "arch": "X64", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"}, + {"inst": "mov W:dreg, r32" , "op": "RM: 0F 23 /r" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"}, + {"inst": "mov W:dreg, r64" , "op": "RM: 0F 23 /r" , "arch": "X64", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"}, + {"inst": "movabs W:r64, iq/uq" , "op": "REX.W B8+r iq"}, + {"inst": "movabs w:al, moff8" , "op": "A0 moff"}, + {"inst": "movabs w:ax, moff16" , "op": "66 A1 moff"}, + {"inst": "movabs W:eax, moff32" , "op": "A1 moff"}, + {"inst": "movabs W:rax, moff64" , "op": "REX.W A1 moff"}, + {"inst": "movabs W:moff8, al" , "op": "A2 moff"}, + {"inst": "movabs W:moff16, ax" , "op": "66 A3 moff"}, + {"inst": "movabs W:moff32, eax" , "op": "A3 moff"}, + {"inst": "movabs W:moff64, rax" , "op": "REX.W A3 moff"}, + {"inst": "[rep] movs W:m8(es:zdi), R:m8(ds:zsi)" , "op": "A4" , "io": "DF=R"}, + {"inst": "[rep] movs W:m16(es:zdi), R:m16(ds:zsi)" , "op": "66 A5" , "io": "DF=R"}, + {"inst": "[rep] movs W:m32(es:zdi), R:m32(ds:zsi)" , "op": "A5" , "io": "DF=R"}, + {"inst": "[rep] movs W:m64(es:zdi), R:m64(ds:zsi)" , "op": "REX.W A5" , "io": "DF=R"}, + {"inst": "movsx w:r16, r8/m8" , "op": "RM: 66 0F BE /r"}, + {"inst": "movsx W:r32, r8/m8" , "op": "RM: 0F BE /r"}, + {"inst": "movsx W:r64, r8/m8" , "op": "RM: REX.W 0F BE /r"}, + {"inst": "movsx W:r32, r16/m16" , "op": "RM: 0F BF /r"}, + {"inst": "movsx W:r64, r16/m16" , "op": "RM: REX.W 0F BF /r"}, + {"inst": "movsxd W:r16, r16/m16" , "op": "RM: 66 63 /r" , "arch": "X64"}, + {"inst": "movsxd W:r32, r32/m32" , "op": "RM: 63 /r" , "arch": "X64"}, + {"inst": "movsxd W:r64, r32/m32" , "op": "RM: REX.W 63 /r" , "arch": "X64"}, + {"inst": "movzx w:r16, r8/m8" , "op": "RM: 66 0F B6 /r"}, + {"inst": "movzx W:r32, r8/m8" , "op": "RM: 0F B6 /r"}, + {"inst": "movzx W:r64, r8/m8" , "op": "RM: REX.W 0F B6 /r"}, + {"inst": "movzx W:r32, r16/m16" , "op": "RM: 0F B7 /r"}, + {"inst": "movzx W:r64, r16/m16" , "op": "RM: REX.W 0F B7 /r"}, + {"inst": "mul x:, r8/m8" , "op": "F6 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"}, + {"inst": "mul w:, x:, r16/m16" , "op": "66 F7 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"}, + {"inst": "mul W:, X:, r32/m32" , "op": "F7 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"}, + {"inst": "mul W:, X:, r64/m64" , "op": "REX.W F7 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"}, + {"inst": "[lock|xacqrel] neg x:r8/m8" , "op": "F6 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] neg x:r16/m16" , "op": "66 F7 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] neg X:r32/m32" , "op": "F7 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] neg X:r64/m64" , "op": "REX.W F7 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "nop" , "op": "90"}, + {"inst": "nop R:r16/m16" , "op": "66 0F 1F /0"}, + {"inst": "nop R:r32/m32" , "op": "0F 1F /0"}, + {"inst": "nop R:r64/m64" , "op": "REX.W 0F 1F /0"}, + {"inst": "nop R:r16/m16, r16" , "op": "MR: 66 0F 1F /r"}, + {"inst": "nop R:r32/m32, r32" , "op": "MR: 0F 1F /r"}, + {"inst": "nop R:r64/m64, r64" , "op": "MR: REX.W 0F 1F /r"}, + {"inst": "[lock|xacqrel] not x:r8/m8" , "op": "F6 /2"}, + {"inst": "[lock|xacqrel] not x:r16/m16" , "op": "66 F7 /2"}, + {"inst": "[lock|xacqrel] not X:r32/m32" , "op": "F7 /2"}, + {"inst": "[lock|xacqrel] not X:r64/m64" , "op": "REX.W F7 /2"}, + {"inst": "or x:al, ib/ub" , "op": "0C ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "or x:ax, iw/uw" , "op": "66 0D iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "or X:eax, id/ud" , "op": "0D id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "or X:rax, id" , "op": "REX.W 0D id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "[lock|xacqrel] or x:r8/m8, ib/ub" , "op": "M: 80 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or x:r16/m16, iw/uw" , "op": "M: 66 81 /1 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or X:r32/m32, id/ud" , "op": "M: 81 /1 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or X:r64/m64, id" , "op": "M: REX.W 81 /1 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or x:r16/m16, ib" , "op": "M: 66 83 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or X:r32/m32, ib" , "op": "M: 83 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or X:r64/m64, ib" , "op": "M: REX.W 83 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or x:~r8/m8, ~r8" , "op": "MR: 08 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or x:~r16/m16, ~r16" , "op": "MR: 66 09 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or X:~r32/m32, ~r32" , "op": "MR: 09 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] or X:~r64/m64, ~r64" , "op": "MR: REX.W 09 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "or x:~r8, ~r8/m8" , "op": "RM: 0A /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "or x:~r16, ~r16/m16" , "op": "RM: 66 0B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "or X:~r32, ~r32/m32" , "op": "RM: 0B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "or X:~r64, ~r64/m64" , "op": "RM: REX.W 0B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "pop w:r16/m16" , "op": "66 8F /0"}, + {"inst": "pop W:r32/m32" , "op": "8F /0" , "arch": "X86"}, + {"inst": "pop W:r64/m64" , "op": "8F /0" , "arch": "X64"}, + {"inst": "pop w:r16" , "op": "66 58+r"}, + {"inst": "pop W:r32" , "op": "58+r" , "arch": "X86"}, + {"inst": "pop W:r64" , "op": "58+r" , "arch": "X64"}, + {"inst": "pop W:ds" , "op": "1F" , "arch": "X86"}, + {"inst": "pop W:es" , "op": "07" , "arch": "X86"}, + {"inst": "pop W:ss" , "op": "17" , "arch": "X86"}, + {"inst": "pop W:fs" , "op": "0F A1"}, + {"inst": "pop W:gs" , "op": "0F A9"}, + {"inst": "popf" , "op": "66 9D" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=W IF=W TF=W"}, + {"inst": "popfd" , "op": "9D" , "arch": "X86", "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=W IF=W TF=W"}, + {"inst": "popfq" , "op": "9D" , "arch": "X64", "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=W IF=W TF=W"}, + {"inst": "push R:r16/m16" , "op": "66 FF /6"}, + {"inst": "push R:r32/m32" , "op": "FF /6" , "arch": "X86"}, + {"inst": "push R:r64/m64" , "op": "FF /6" , "arch": "X64"}, + {"inst": "push R:r16" , "op": "66 50+r"}, + {"inst": "push R:r32" , "op": "50+r" , "arch": "X86"}, + {"inst": "push R:r64" , "op": "50+r" , "arch": "X64"}, + {"inst": "push ib" , "op": "6A ib"}, + {"inst": "push iw" , "op": "66 68 iw"}, + {"inst": "push id/ud" , "op": "68 id" , "arch": "X86"}, + {"inst": "push id" , "op": "68 id" , "arch": "X64"}, + {"inst": "push R:cs" , "op": "0E" , "arch": "X86"}, + {"inst": "push R:ss" , "op": "16" , "arch": "X86"}, + {"inst": "push R:ds" , "op": "1E" , "arch": "X86"}, + {"inst": "push R:es" , "op": "06" , "arch": "X86"}, + {"inst": "push R:fs" , "op": "0F A0"}, + {"inst": "push R:gs" , "op": "0F A8"}, + {"inst": "pushf" , "op": "66 9C" , "io": "OF=R SF=R ZF=R AF=R PF=R CF=R DF=R IF=R TF=R"}, + {"inst": "pushfd" , "op": "9C" , "arch": "X86", "io": "OF=R SF=R ZF=R AF=R PF=R CF=R DF=R IF=R TF=R"}, + {"inst": "pushfq" , "op": "9C" , "arch": "X64", "io": "OF=R SF=R ZF=R AF=R PF=R CF=R DF=R IF=R TF=R"}, + {"inst": "rcl x:r8/m8, 1" , "op": "D0 /2" , "io": "CF=X OF=X", "altForm": true}, + {"inst": "rcl x:r8/m8, cl" , "op": "D2 /2" , "io": "CF=X OF=X"}, + {"inst": "rcl x:r8/m8, ib/ub" , "op": "M: C0 /2 ib" , "io": "CF=X OF=X"}, + {"inst": "rcl x:r16/m16, 1" , "op": "66 D1 /2" , "io": "CF=X OF=X", "altForm": true}, + {"inst": "rcl x:r16/m16, cl" , "op": "66 D3 /2" , "io": "CF=X OF=X"}, + {"inst": "rcl x:r16/m16, ib/ub" , "op": "M: 66 C1 /2 ib" , "io": "CF=X OF=X"}, + {"inst": "rcl X:r32/m32, 1" , "op": "D1 /2" , "io": "CF=X OF=X", "altForm": true}, + {"inst": "rcl X:r32/m32, cl" , "op": "D3 /2" , "io": "CF=X OF=X"}, + {"inst": "rcl X:r32/m32, ib/ub" , "op": "M: C1 /2 ib" , "io": "CF=X OF=X"}, + {"inst": "rcl X:r64/m64, 1" , "op": "REX.W D1 /2" , "io": "CF=X OF=X", "altForm": true}, + {"inst": "rcl X:r64/m64, cl" , "op": "REX.W D3 /2" , "io": "CF=X OF=X"}, + {"inst": "rcl X:r64/m64, ib/ub" , "op": "M: REX.W C1 /2 ib" , "io": "CF=X OF=X"}, + {"inst": "rcr x:r8/m8, 1" , "op": "D0 /3" , "io": "CF=X OF=X", "altForm": true}, + {"inst": "rcr x:r8/m8, cl" , "op": "D2 /3" , "io": "CF=X OF=X"}, + {"inst": "rcr x:r8/m8, ib/ub" , "op": "M: C0 /3 ib" , "io": "CF=X OF=X"}, + {"inst": "rcr x:r16/m16, 1" , "op": "66 D1 /3" , "io": "CF=X OF=X", "altForm": true}, + {"inst": "rcr x:r16/m16, cl" , "op": "66 D3 /3" , "io": "CF=X OF=X"}, + {"inst": "rcr x:r16/m16, ib/ub" , "op": "M: 66 C1 /3 ib" , "io": "CF=X OF=X"}, + {"inst": "rcr X:r32/m32, 1" , "op": "D1 /3" , "io": "CF=X OF=X", "altForm": true}, + {"inst": "rcr X:r32/m32, cl" , "op": "D3 /3" , "io": "CF=X OF=X"}, + {"inst": "rcr X:r32/m32, ib/ub" , "op": "M: C1 /3 ib" , "io": "CF=X OF=X"}, + {"inst": "rcr X:r64/m64, 1" , "op": "REX.W D1 /3" , "io": "CF=X OF=X", "altForm": true}, + {"inst": "rcr X:r64/m64, cl" , "op": "REX.W D3 /3" , "io": "CF=X OF=X"}, + {"inst": "rcr X:r64/m64, ib/ub" , "op": "M: REX.W C1 /3 ib" , "io": "CF=X OF=X"}, + {"inst": "[bnd|repIgnore] ret" , "op": "C3"}, + {"inst": "[bnd|repIgnore] ret uw" , "op": "C2 iw"}, + {"inst": "retf" , "op": "CB"}, + {"inst": "retf uw" , "op": "CA iw"}, + {"inst": "rol x:r8/m8, 1" , "op": "D0 /0" , "io": "CF=W OF=W", "altForm": true}, + {"inst": "rol x:r8/m8, cl" , "op": "D2 /0" , "io": "CF=W OF=W"}, + {"inst": "rol x:r8/m8, ib/ub" , "op": "M: C0 /0 ib" , "io": "CF=W OF=W"}, + {"inst": "rol x:r16/m16, 1" , "op": "66 D1 /0" , "io": "CF=W OF=W", "altForm": true}, + {"inst": "rol x:r16/m16, cl" , "op": "66 D3 /0" , "io": "CF=W OF=W"}, + {"inst": "rol x:r16/m16, ib/ub" , "op": "M: 66 C1 /0 ib" , "io": "CF=W OF=W"}, + {"inst": "rol X:r32/m32, 1" , "op": "D1 /0" , "io": "CF=W OF=W", "altForm": true}, + {"inst": "rol X:r32/m32, cl" , "op": "D3 /0" , "io": "CF=W OF=W"}, + {"inst": "rol X:r32/m32, ib/ub" , "op": "M: C1 /0 ib" , "io": "CF=W OF=W"}, + {"inst": "rol X:r64/m64, 1" , "op": "REX.W D1 /0" , "io": "CF=W OF=W", "altForm": true}, + {"inst": "rol X:r64/m64, cl" , "op": "REX.W D3 /0" , "io": "CF=W OF=W"}, + {"inst": "rol X:r64/m64, ib/ub" , "op": "M: REX.W C1 /0 ib" , "io": "CF=W OF=W"}, + {"inst": "ror x:r8/m8, 1" , "op": "D0 /1" , "io": "CF=W OF=W", "altForm": true}, + {"inst": "ror x:r8/m8, cl" , "op": "D2 /1" , "io": "CF=W OF=W"}, + {"inst": "ror x:r8/m8, ib/ub" , "op": "M: C0 /1 ib" , "io": "CF=W OF=W"}, + {"inst": "ror x:r16/m16, 1" , "op": "66 D1 /1" , "io": "CF=W OF=W", "altForm": true}, + {"inst": "ror x:r16/m16, cl" , "op": "66 D3 /1" , "io": "CF=W OF=W"}, + {"inst": "ror x:r16/m16, ib/ub" , "op": "M: 66 C1 /1 ib" , "io": "CF=W OF=W"}, + {"inst": "ror X:r32/m32, 1" , "op": "D1 /1" , "io": "CF=W OF=W", "altForm": true}, + {"inst": "ror X:r32/m32, cl" , "op": "D3 /1" , "io": "CF=W OF=W"}, + {"inst": "ror X:r32/m32, ib/ub" , "op": "M: C1 /1 ib" , "io": "CF=W OF=W"}, + {"inst": "ror X:r64/m64, 1" , "op": "REX.W D1 /1" , "io": "CF=W OF=W", "altForm": true}, + {"inst": "ror X:r64/m64, cl" , "op": "REX.W D3 /1" , "io": "CF=W OF=W"}, + {"inst": "ror X:r64/m64, ib/ub" , "op": "M: REX.W C1 /1 ib" , "io": "CF=W OF=W"}, + {"inst": "sar x:r8/m8, 1" , "op": "D0 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "sar x:r8/m8, cl" , "op": "D2 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sar x:r8/m8, ib/ub" , "op": "M: C0 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sar x:r16/m16, 1" , "op": "66 D1 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "sar x:r16/m16, cl" , "op": "66 D3 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sar x:r16/m16, ib/ub" , "op": "M: 66 C1 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sar X:r32/m32, 1" , "op": "D1 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "sar X:r32/m32, cl" , "op": "D3 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sar X:r32/m32, ib/ub" , "op": "M: C1 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sar X:r64/m64, 1" , "op": "REX.W D1 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "sar X:r64/m64, cl" , "op": "REX.W D3 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sar X:r64/m64, ib/ub" , "op": "M: REX.W C1 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sbb x:al, ib/ub" , "op": "1C ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true}, + {"inst": "sbb x:ax, iw/uw" , "op": "66 1D iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true}, + {"inst": "sbb X:eax, id/ud" , "op": "1D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true}, + {"inst": "sbb X:rax, id" , "op": "REX.W 1D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true}, + {"inst": "[lock|xacqrel] sbb x:r8/m8, ib/ub" , "op": "M: 80 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb x:r16/m16, iw/uw" , "op": "M: 66 81 /3 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb X:r32/m32, id/ud" , "op": "M: 81 /3 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb X:r64/m64, id" , "op": "M: REX.W 81 /3 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb x:r16/m16, ib" , "op": "M: 66 83 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb X:r32/m32, ib" , "op": "M: 83 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb X:r64/m64, ib" , "op": "M: REX.W 83 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb x:r8/m8, r8" , "op": "MR: 18 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb x:r16/m16, r16" , "op": "MR: 66 19 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb X:r32/m32, r32" , "op": "MR: 19 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[lock|xacqrel] sbb X:r64/m64, r64" , "op": "MR: REX.W 19 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "sbb x:r8, r8/m8" , "op": "RM: 1A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "sbb x:r16, r16/m16" , "op": "RM: 66 1B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "sbb X:r32, r32/m32" , "op": "RM: 1B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "sbb X:r64, r64/m64" , "op": "RM: REX.W 1B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"}, + {"inst": "[rep|repne] scas R:al, R:m8(es:zdi)" , "op": "AE" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"}, + {"inst": "[rep|repne] scas R:ax, R:m16(es:zdi)" , "op": "66 AF" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"}, + {"inst": "[rep|repne] scas R:eax, R:m32(es:zdi)" , "op": "AF" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"}, + {"inst": "[rep|repne] scas R:rax, R:m64(es:zdi)" , "op": "REX.W AF" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"}, + {"inst": "seto w:r8/m8" , "op": "0F 90 /r" , "io": "OF=R"}, + {"inst": "setno w:r8/m8" , "op": "0F 91 /r" , "io": "OF=R"}, + {"inst": "setb|setnae|setc w:r8/m8" , "op": "0F 92 /r" , "io": "CF=R"}, + {"inst": "setae|setnb|setnc w:r8/m8" , "op": "0F 93 /r" , "io": "CF=R"}, + {"inst": "sete|setz w:r8/m8" , "op": "0F 94 /r" , "io": "ZF=R"}, + {"inst": "setne|setnz w:r8/m8" , "op": "0F 95 /r" , "io": "ZF=R"}, + {"inst": "setbe|setna w:r8/m8" , "op": "0F 96 /r" , "io": "CF=R ZF=R"}, + {"inst": "seta|setnbe w:r8/m8" , "op": "0F 97 /r" , "io": "CF=R ZF=R"}, + {"inst": "sets w:r8/m8" , "op": "0F 98 /r" , "io": "SF=R"}, + {"inst": "setns w:r8/m8" , "op": "0F 99 /r" , "io": "SF=R"}, + {"inst": "setp|setpe w:r8/m8" , "op": "0F 9A /r" , "io": "PF=R"}, + {"inst": "setnp|setpo w:r8/m8" , "op": "0F 9B /r" , "io": "PF=R"}, + {"inst": "setl|setnge w:r8/m8" , "op": "0F 9C /r" , "io": "SF=R OF=R"}, + {"inst": "setge|setnl w:r8/m8" , "op": "0F 9D /r" , "io": "SF=R OF=R"}, + {"inst": "setle|setng w:r8/m8" , "op": "0F 9E /r" , "io": "ZF=R SF=R OF=R"}, + {"inst": "setg|setnle w:r8/m8" , "op": "0F 9F /r" , "io": "ZF=R SF=R OF=R"}, + {"inst": "shl|sal x:r8/m8, 1" , "op": "D0 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "shl|sal x:r8/m8, cl" , "op": "D2 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shl|sal x:r8/m8, ib/ub" , "op": "M: C0 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shl|sal x:r16/m16, 1" , "op": "66 D1 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "shl|sal x:r16/m16, cl" , "op": "66 D3 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shl|sal x:r16/m16, ib/ub" , "op": "M: 66 C1 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shl|sal X:r32/m32, 1" , "op": "D1 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "shl|sal X:r32/m32, cl" , "op": "D3 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shl|sal X:r32/m32, ib/ub" , "op": "M: C1 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shl|sal X:r64/m64, 1" , "op": "REX.W D1 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "shl|sal X:r64/m64, cl" , "op": "REX.W D3 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shl|sal X:r64/m64, ib/ub" , "op": "M: REX.W C1 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shr x:r8/m8, 1" , "op": "D0 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "shr x:r8/m8, cl" , "op": "D2 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shr x:r8/m8, ib/ub" , "op": "M: C0 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shr x:r16/m16, 1" , "op": "66 D1 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "shr x:r16/m16, cl" , "op": "66 D3 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shr x:r16/m16, ib/ub" , "op": "M: 66 C1 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shr X:r32/m32, 1" , "op": "D1 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "shr X:r32/m32, cl" , "op": "D3 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shr X:r32/m32, ib/ub" , "op": "M: C1 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shr X:r64/m64, 1" , "op": "REX.W D1 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "shr X:r64/m64, cl" , "op": "REX.W D3 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shr X:r64/m64, ib/ub" , "op": "M: REX.W C1 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "shld x:r16/m16, r16, cl" , "op": "MR: 66 0F A5 /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shld x:r16/m16, r16, ib/ub" , "op": "MR: 66 0F A4 /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shld X:r32/m32, r32, cl" , "op": "MR: 0F A5 /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shld X:r32/m32, r32, ib/ub" , "op": "MR: 0F A4 /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shld X:r64/m64, r64, cl" , "op": "MR: REX.W 0F A5 /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shld X:r64/m64, r64, ib/ub" , "op": "MR: REX.W 0F A4 /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shrd x:r16/m16, r16, cl" , "op": "MR: 66 0F AD /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shrd x:r16/m16, r16, ib/ub" , "op": "MR: 66 0F AC /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shrd X:r32/m32, r32, cl" , "op": "MR: 0F AD /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shrd X:r32/m32, r32, ib/ub" , "op": "MR: 0F AC /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shrd X:r64/m64, r64, cl" , "op": "MR: REX.W 0F AD /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "shrd X:r64/m64, r64, ib/ub" , "op": "MR: REX.W 0F AC /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"}, + {"inst": "stc" , "op": "F9" , "io": "CF=1"}, + {"inst": "std" , "op": "FD" , "io": "DF=1"}, + {"inst": "[rep] stos W:m8(es:zdi), R:al" , "op": "AA" , "io": "DF=R"}, + {"inst": "[rep] stos W:m16(es:zdi), R:ax" , "op": "66 AB" , "io": "DF=R"}, + {"inst": "[rep] stos W:m32(es:zdi), R:eax" , "op": "AB" , "io": "DF=R"}, + {"inst": "[rep] stos W:m64(es:zdi), R:rax" , "op": "REX.W AB" , "io": "DF=R"}, + {"inst": "sub x:al, ib/ub" , "op": "2C ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "sub x:ax, iw/uw" , "op": "66 2D iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "sub X:eax, id/ud" , "op": "2D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "sub X:rax, id" , "op": "REX.W 2D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true}, + {"inst": "[lock|xacqrel] sub x:r8/m8, ib/ub" , "op": "M: 80 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub x:r16/m16, iw/uw" , "op": "M: 66 81 /5 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub X:r32/m32, id/ud" , "op": "M: 81 /5 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub X:r64/m64, id" , "op": "M: REX.W 81 /5 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub x:r16/m16, ib" , "op": "M: 66 83 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub X:r32/m32, ib" , "op": "M: 83 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub X:r64/m64, ib" , "op": "M: REX.W 83 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub x:r8/m8, r8" , "op": "MR: 28 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub x:r16/m16, r16" , "op": "MR: 66 29 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub X:r32/m32, r32" , "op": "MR: 29 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] sub X:r64/m64, r64" , "op": "MR: REX.W 29 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sub x:r8, r8/m8" , "op": "RM: 2A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sub x:r16, r16/m16" , "op": "RM: 66 2B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sub X:r32, r32/m32" , "op": "RM: 2B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sub X:r64, r64/m64" , "op": "RM: REX.W 2B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "test R:al, ib/ub" , "op": "A8 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "test R:ax, iw/uw" , "op": "66 A9 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "test R:eax, id/ud" , "op": "A9 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "test R:rax, id" , "op": "REX.W A9 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "test R:r8/m8, ib/ub" , "op": "M: F6 /0 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "test R:r16/m16, iw/uw" , "op": "M: 66 F7 /0 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "test R:r32/m32, id/ud" , "op": "M: F7 /0 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "test R:r64/m64, id" , "op": "M: REX.W F7 /0 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "test R:~r8/m8, ~r8" , "op": "MR: 84 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "test R:~r16/m16, ~r16" , "op": "MR: 66 85 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "test R:~r32/m32, ~r32" , "op": "MR: 85 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "test R:~r64/m64, ~r64" , "op": "MR: REX.W 85 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "ud0 r32, r32/m32" , "op": "RM: 0F FF /r"}, + {"inst": "ud1 r32, r32/m32" , "op": "RM: 0F B9 /r"}, + {"inst": "ud2" , "op": "0F 0B"}, + {"inst": "xchg x:~ax, x:~r16" , "op": "66 90+r" , "altForm": true}, + {"inst": "xchg X:~eax, X:~r32" , "op": "90+r" , "altForm": true}, + {"inst": "xchg X:~rax, X:~r64" , "op": "REX.W 90+r" , "altForm": true}, + {"inst": "xchg x:~r16, x:~ax" , "op": "66 90+r" , "altForm": true}, + {"inst": "xchg X:~r32, X:~eax" , "op": "90+r" , "altForm": true}, + {"inst": "xchg X:~r64, X:~rax" , "op": "REX.W 90+r" , "altForm": true}, + {"inst": "[ilock|xacquire] xchg x:~r8/m8, x:~r8" , "op": "MR: 86 /r"}, + {"inst": "[ilock|xacquire] xchg x:~r16/m16, x:~r16" , "op": "MR: 66 87 /r"}, + {"inst": "[ilock|xacquire] xchg X:~r32/m32, X:~r32" , "op": "MR: 87 /r"}, + {"inst": "[ilock|xacquire] xchg X:~r64/m64, X:~r64" , "op": "MR: REX.W 87 /r"}, + {"inst": "[ilock|xacquire] xchg x:~r8, x:~r8/m8" , "op": "RM: 86 /r"}, + {"inst": "[ilock|xacquire] xchg x:~r16, x:~r16/m16" , "op": "RM: 66 87 /r"}, + {"inst": "[ilock|xacquire] xchg X:~r32, X:~r32/m32" , "op": "RM: 87 /r"}, + {"inst": "[ilock|xacquire] xchg X:~r64, X:~r64/m64" , "op": "RM: REX.W 87 /r"}, + {"inst": "xor x:al, ib/ub" , "op": "34 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "xor x:ax, iw/uw" , "op": "66 35 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "xor X:eax, id/ud" , "op": "35 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "xor X:rax, id" , "op": "REX.W 35 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true}, + {"inst": "[lock|xacqrel] xor x:r8/m8, ib/ub" , "op": "M: 80 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor x:r16/m16, iw/uw" , "op": "M: 66 81 /6 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor X:r32/m32, id/ud" , "op": "M: 81 /6 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor X:r64/m64, id" , "op": "M: REX.W 81 /6 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor x:r16/m16, ib" , "op": "M: 66 83 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor X:r32/m32, ib" , "op": "M: 83 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor X:r64/m64, ib" , "op": "M: REX.W 83 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor x:~r8/m8, ~r8" , "op": "MR: 30 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor x:~r16/m16, ~r16" , "op": "MR: 66 31 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor X:~r32/m32, ~r32" , "op": "MR: 31 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "[lock|xacqrel] xor X:~r64/m64, ~r64" , "op": "MR: REX.W 31 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "xor x:~r8, ~r8/m8" , "op": "RM: 32 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "xor x:~r16, ~r16/m16" , "op": "RM: 66 33 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "xor X:~r32, ~r32/m32" , "op": "RM: 33 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}, + {"inst": "xor X:~r64, ~r64/m64" , "op": "RM: REX.W 33 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"} + ]}, + + {"category": "GP GP_IN_OUT", "volatile": true, "data": [ + {"inst": "in w:al, ib/ub" , "op": "E4 ib"}, + {"inst": "in w:ax, ib/ub" , "op": "66 E5 ib"}, + {"inst": "in W:eax, ib/ub" , "op": "E5 ib"}, + {"inst": "in w:al, dx" , "op": "EC"}, + {"inst": "in w:ax, dx" , "op": "66 ED"}, + {"inst": "in W:eax, dx" , "op": "ED"}, + {"inst": "[rep] ins W:m8(es:zdi), dx" , "op": "6C"}, + {"inst": "[rep] ins W:m16(es:zdi), dx" , "op": "66 6D"}, + {"inst": "[rep] ins W:m32(es:zdi), dx" , "op": "6D"}, + {"inst": "out ub, al" , "op": "E6 ib"}, + {"inst": "out ub, ax" , "op": "66 E7 ib"}, + {"inst": "out ub, eax" , "op": "E7 ib"}, + {"inst": "out R:dx, R:al" , "op": "EE"}, + {"inst": "out R:dx, R:ax" , "op": "66 EF"}, + {"inst": "out R:dx, R:eax" , "op": "EF"}, + {"inst": "[rep] outs R:dx, R:m8(ds:zsi)" , "op": "6E"}, + {"inst": "[rep] outs R:dx, R:m16(ds:zsi)" , "op": "66 6F"}, + {"inst": "[rep] outs R:dx, R:m32(ds:zsi)" , "op": "6F"} + ]}, + + {"category": "GP GP_EXT", "data": [ + {"inst": "aadd X:m32, r32" , "op": "MR: 0F 38 FC /r" , "ext": "RAO_INT"}, + {"inst": "aadd X:m64, r64" , "op": "MR: REX.W 0F 38 FC /r" , "ext": "RAO_INT"}, + {"inst": "aand X:m32, r32" , "op": "MR: 66 0F 38 FC /r" , "ext": "RAO_INT"}, + {"inst": "aand X:m64, r64" , "op": "MR: REX.W 66 0F 38 FC /r" , "ext": "RAO_INT"}, + {"inst": "adcx X:~r32, ~r32/m32" , "op": "RM: 66 0F 38 F6 /r" , "ext": "ADX" , "io": "CF=X"}, + {"inst": "adcx X:~r64, ~r64/m64" , "op": "RM: REX.W 66 0F 38 F6 /r" , "ext": "ADX" , "io": "CF=X"}, + {"inst": "adox X:~r32, ~r32/m32" , "op": "RM: F3 0F 38 F6 /r" , "ext": "ADX" , "io": "OF=X"}, + {"inst": "adox X:~r64, ~r64/m64" , "op": "RM: REX.W F3 0F 38 F6 /r" , "ext": "ADX" , "io": "OF=X"}, + {"inst": "andn W:r32, r32, r32/m32" , "op": "RVM: VEX.LZ.0F38.W0 F2 /r" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=0"}, + {"inst": "andn W:r64, r64, r64/m64" , "op": "RVM: VEX.LZ.0F38.W1 F2 /r" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=0"}, + {"inst": "aor X:m32, r32" , "op": "MR: F2 0F 38 FC /r" , "ext": "RAO_INT"}, + {"inst": "aor X:m64, r64" , "op": "MR: REX.W F2 0F 38 FC /r" , "ext": "RAO_INT"}, + {"inst": "axor X:m32, r32" , "op": "MR: F3 0F 38 FC /r" , "ext": "RAO_INT"}, + {"inst": "axor X:m64, r64" , "op": "MR: REX.W F3 0F 38 FC /r" , "ext": "RAO_INT"}, + {"inst": "bextr W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.0F38.W0 F7 /r" , "ext": "BMI" , "io": "OF=0 SF=U ZF=W AF=U PF=U CF=0"}, + {"inst": "bextr W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.0F38.W1 F7 /r" , "ext": "BMI" , "io": "OF=0 SF=U ZF=W AF=U PF=U CF=0"}, + {"inst": "blsi W:r32, r32/m32" , "op": "VM: VEX.LZ.0F38.W0 F3 /3" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"}, + {"inst": "blsi W:r64, r64/m64" , "op": "VM: VEX.LZ.0F38.W1 F3 /3" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"}, + {"inst": "blsmsk W:r32, r32/m32" , "op": "VM: VEX.LZ.0F38.W0 F3 /2" , "ext": "BMI" , "io": "OF=0 SF=W ZF=0 AF=U PF=U CF=W"}, + {"inst": "blsmsk W:r64, r64/m64" , "op": "VM: VEX.LZ.0F38.W1 F3 /2" , "ext": "BMI" , "io": "OF=0 SF=W ZF=0 AF=U PF=U CF=W"}, + {"inst": "blsr W:r32, r32/m32" , "op": "VM: VEX.LZ.0F38.W0 F3 /1" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"}, + {"inst": "blsr W:r64, r64/m64" , "op": "VM: VEX.LZ.0F38.W1 F3 /1" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"}, + {"inst": "bzhi W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.0F38.W0 F5 /r" , "ext": "BMI2" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"}, + {"inst": "bzhi W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.0F38.W1 F5 /r" , "ext": "BMI2" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"}, + {"inst": "cldemote R:mem" , "op": "0F 1C /0" , "ext": "CLDEMOTE"}, + {"inst": "clflush R:mem" , "op": "0F AE /7" , "ext": "CLFLUSH"}, + {"inst": "clflushopt R:mem" , "op": "66 0F AE /7" , "ext": "CLFLUSHOPT"}, + {"inst": "clwb R:mem" , "op": "66 0F AE /6" , "ext": "CLWB"}, + {"inst": "clzero R:" , "op": "0F 01 FC" , "ext": "CLZERO"}, + {"inst": "cmovo x:r16, r16/m16" , "op": "RM: 66 0F 40 /r" , "ext": "CMOV" , "io": "OF=R"}, + {"inst": "cmovo X:r32, r32/m32" , "op": "RM: 0F 40 /r" , "ext": "CMOV" , "io": "OF=R"}, + {"inst": "cmovo X:r64, r64/m64" , "op": "RM: REX.W 0F 40 /r" , "ext": "CMOV" , "io": "OF=R"}, + {"inst": "cmovno x:r16, r16/m16" , "op": "RM: 66 0F 41 /r" , "ext": "CMOV" , "io": "OF=R"}, + {"inst": "cmovno X:r32, r32/m32" , "op": "RM: 0F 41 /r" , "ext": "CMOV" , "io": "OF=R"}, + {"inst": "cmovno X:r64, r64/m64" , "op": "RM: REX.W 0F 41 /r" , "ext": "CMOV" , "io": "OF=R"}, + {"inst": "cmovb|cmovnae|cmovc x:r16, r16/m16" , "op": "RM: 66 0F 42 /r" , "ext": "CMOV" , "io": "CF=R"}, + {"inst": "cmovb|cmovnae|cmovc X:r32, r32/m32" , "op": "RM: 0F 42 /r" , "ext": "CMOV" , "io": "CF=R"}, + {"inst": "cmovb|cmovnae|cmovc X:r64, r64/m64" , "op": "RM: REX.W 0F 42 /r" , "ext": "CMOV" , "io": "CF=R"}, + {"inst": "cmovae|cmovnb|cmovnc x:r16, r16/m16" , "op": "RM: 66 0F 43 /r" , "ext": "CMOV" , "io": "CF=R"}, + {"inst": "cmovae|cmovnb|cmovnc X:r32, r32/m32" , "op": "RM: 0F 43 /r" , "ext": "CMOV" , "io": "CF=R"}, + {"inst": "cmovae|cmovnb|cmovnc X:r64, r64/m64" , "op": "RM: REX.W 0F 43 /r" , "ext": "CMOV" , "io": "CF=R"}, + {"inst": "cmove|cmovz x:r16, r16/m16" , "op": "RM: 66 0F 44 /r" , "ext": "CMOV" , "io": "ZF=R"}, + {"inst": "cmove|cmovz X:r32, r32/m32" , "op": "RM: 0F 44 /r" , "ext": "CMOV" , "io": "ZF=R"}, + {"inst": "cmove|cmovz X:r64, r64/m64" , "op": "RM: REX.W 0F 44 /r" , "ext": "CMOV" , "io": "ZF=R"}, + {"inst": "cmovne|cmovnz x:r16, r16/m16" , "op": "RM: 66 0F 45 /r" , "ext": "CMOV" , "io": "ZF=R"}, + {"inst": "cmovne|cmovnz X:r32, r32/m32" , "op": "RM: 0F 45 /r" , "ext": "CMOV" , "io": "ZF=R"}, + {"inst": "cmovne|cmovnz X:r64, r64/m64" , "op": "RM: REX.W 0F 45 /r" , "ext": "CMOV" , "io": "ZF=R"}, + {"inst": "cmovbe|cmovna x:r16, r16/m16" , "op": "RM: 66 0F 46 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"}, + {"inst": "cmovbe|cmovna X:r32, r32/m32" , "op": "RM: 0F 46 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"}, + {"inst": "cmovbe|cmovna X:r64, r64/m64" , "op": "RM: REX.W 0F 46 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"}, + {"inst": "cmova|cmovnbe x:r16, r16/m16" , "op": "RM: 66 0F 47 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"}, + {"inst": "cmova|cmovnbe X:r32, r32/m32" , "op": "RM: 0F 47 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"}, + {"inst": "cmova|cmovnbe X:r64, r64/m64" , "op": "RM: REX.W 0F 47 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"}, + {"inst": "cmovs x:r16, r16/m16" , "op": "RM: 66 0F 48 /r" , "ext": "CMOV" , "io": "SF=R"}, + {"inst": "cmovs X:r32, r32/m32" , "op": "RM: 0F 48 /r" , "ext": "CMOV" , "io": "SF=R"}, + {"inst": "cmovs X:r64, r64/m64" , "op": "RM: REX.W 0F 48 /r" , "ext": "CMOV" , "io": "SF=R"}, + {"inst": "cmovns x:r16, r16/m16" , "op": "RM: 66 0F 49 /r" , "ext": "CMOV" , "io": "SF=R"}, + {"inst": "cmovns X:r32, r32/m32" , "op": "RM: 0F 49 /r" , "ext": "CMOV" , "io": "SF=R"}, + {"inst": "cmovns X:r64, r64/m64" , "op": "RM: REX.W 0F 49 /r" , "ext": "CMOV" , "io": "SF=R"}, + {"inst": "cmovp|cmovpe x:r16, r16/m16" , "op": "RM: 66 0F 4A /r" , "ext": "CMOV" , "io": "PF=R"}, + {"inst": "cmovp|cmovpe X:r32, r32/m32" , "op": "RM: 0F 4A /r" , "ext": "CMOV" , "io": "PF=R"}, + {"inst": "cmovp|cmovpe X:r64, r64/m64" , "op": "RM: REX.W 0F 4A /r" , "ext": "CMOV" , "io": "PF=R"}, + {"inst": "cmovnp|cmovpo x:r16, r16/m16" , "op": "RM: 66 0F 4B /r" , "ext": "CMOV" , "io": "PF=R"}, + {"inst": "cmovnp|cmovpo X:r32, r32/m32" , "op": "RM: 0F 4B /r" , "ext": "CMOV" , "io": "PF=R"}, + {"inst": "cmovnp|cmovpo X:r64, r64/m64" , "op": "RM: REX.W 0F 4B /r" , "ext": "CMOV" , "io": "PF=R"}, + {"inst": "cmovl|cmovnge x:r16, r16/m16" , "op": "RM: 66 0F 4C /r" , "ext": "CMOV" , "io": "SF=R OF=R"}, + {"inst": "cmovl|cmovnge X:r32, r32/m32" , "op": "RM: 0F 4C /r" , "ext": "CMOV" , "io": "SF=R OF=R"}, + {"inst": "cmovl|cmovnge X:r64, r64/m64" , "op": "RM: REX.W 0F 4C /r" , "ext": "CMOV" , "io": "SF=R OF=R"}, + {"inst": "cmovge|cmovnl x:r16, r16/m16" , "op": "RM: 66 0F 4D /r" , "ext": "CMOV" , "io": "SF=R OF=R"}, + {"inst": "cmovge|cmovnl X:r32, r32/m32" , "op": "RM: 0F 4D /r" , "ext": "CMOV" , "io": "SF=R OF=R"}, + {"inst": "cmovge|cmovnl X:r64, r64/m64" , "op": "RM: REX.W 0F 4D /r" , "ext": "CMOV" , "io": "SF=R OF=R"}, + {"inst": "cmovle|cmovng x:r16, r16/m16" , "op": "RM: 66 0F 4E /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"}, + {"inst": "cmovle|cmovng X:r32, r32/m32" , "op": "RM: 0F 4E /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"}, + {"inst": "cmovle|cmovng X:r64, r64/m64" , "op": "RM: REX.W 0F 4E /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"}, + {"inst": "cmovg|cmovnle x:r16, r16/m16" , "op": "RM: 66 0F 4F /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"}, + {"inst": "cmovg|cmovnle X:r32, r32/m32" , "op": "RM: 0F 4F /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"}, + {"inst": "cmovg|cmovnle X:r64, r64/m64" , "op": "RM: REX.W 0F 4F /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"}, + {"inst": "cmpbexadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E6 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpbexadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E6 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpbxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E2 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpbxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E2 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmplexadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EE /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmplexadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EE /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmplxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EC /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmplxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EC /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnbexadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E7 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnbexadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E7 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnbxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E3 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnbxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E3 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnlexadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EF /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnlexadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EF /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnlxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 ED /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnlxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 ED /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnoxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E1 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnoxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E1 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnpxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EB /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnpxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EB /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnsxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E9 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnsxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E9 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnzxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E5 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpnzxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E5 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpoxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E0 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpoxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E0 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmppxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EA /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmppxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EA /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpsxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E8 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpsxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E8 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "[lock|xacqrel] cmpxchg x:r8/m8, r8, " , "op": "MR: 0F B0 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] cmpxchg x:r16/m16, r16, " , "op": "MR: 66 0F B1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] cmpxchg X:r32/m32, r32, " , "op": "MR: 0F B1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] cmpxchg X:r64/m64, r64, " , "op": "MR: REX.W 0F B1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] cmpxchg8b X:m64,X:,X:,," , "op": "0F C7 /1" , "ext": "CMPXCHG8B" , "io": "ZF=W"}, + {"inst": "[lock|xacqrel] cmpxchg16b X:m128,X:,X:,,","op": "REX.W 0F C7 /1" , "ext": "CMPXCHG16B" , "io": "ZF=W"}, + {"inst": "cmpzxadd X:m32, X:r32, R:r32" , "op": "VEX.128.66.0F38.W0 E4 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cmpzxadd X:m64, X:r64, R:r64" , "op": "VEX.128.66.0F38.W1 E4 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"}, + {"inst": "cpuid X:, W:, X:, W:" , "op": "0F A2" , "ext": "I486" , "volatile": true}, + {"inst": "lahf w:" , "op": "9F" , "ext": "LAHFSAHF" , "io": "SF=R ZF=R AF=R PF=R CF=R"}, + {"inst": "lfence" , "op": "0F AE E8" , "ext": "SSE2"}, + {"inst": "lzcnt w:r16, r16/m16" , "op": "RM: 66 F3 0F BD /r" , "ext": "LZCNT" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"}, + {"inst": "lzcnt W:r32, r32/m32" , "op": "RM: F3 0F BD /r" , "ext": "LZCNT" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"}, + {"inst": "lzcnt W:r64, r64/m64" , "op": "RM: REX.W F3 0F BD /r" , "ext": "LZCNT" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"}, + {"inst": "mcommit" , "op": "F3 0F 01 FA" , "ext": "MCOMMIT" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}, + {"inst": "mfence" , "op": "0F AE F0" , "ext": "SSE2"}, + {"inst": "movbe w:r16, m16" , "op": "RM: 66 0F 38 F0 /r" , "ext": "MOVBE"}, + {"inst": "movbe W:r32, m32" , "op": "RM: 0F 38 F0 /r" , "ext": "MOVBE"}, + {"inst": "movbe W:r64, m64" , "op": "RM: REX.W 0F 38 F0 /r" , "ext": "MOVBE"}, + {"inst": "movbe W:m16, r16" , "op": "MR: 66 0F 38 F1 /r" , "ext": "MOVBE"}, + {"inst": "movbe W:m32, r32" , "op": "MR: 0F 38 F1 /r" , "ext": "MOVBE"}, + {"inst": "movbe W:m64, r64" , "op": "MR: REX.W 0F 38 F1 /r" , "ext": "MOVBE"}, + {"inst": "movdiri W:m32, r32" , "op": "MR: 0F 38 F9 /r" , "ext": "MOVDIRI"}, + {"inst": "movdiri W:m64, r64" , "op": "MR: REX.W 0F 38 F9 /r" , "ext": "MOVDIRI"}, + {"inst": "movdir64b W:m512(es:r32), m512" , "op": "RM: 66 0F 38 F8 /r" , "ext": "MOVDIR64B"}, + {"inst": "movdir64b W:m512(es:r64), m512" , "op": "RM: 66 0F 38 F8 /r" , "ext": "MOVDIR64B"}, + {"inst": "movnti W:m32, r32" , "op": "MR: 0F C3 /r" , "ext": "SSE2"}, + {"inst": "movnti W:m64, r64" , "op": "MR: REX.W 0F C3 /r" , "ext": "SSE2"}, + {"inst": "mulx W:r32, W:r32, ~r32/m32, ~" , "op": "RVM: VEX.LZ.F2.0F38.W0 F6 /r" , "ext": "BMI2"}, + {"inst": "mulx W:r64, W:r64, ~r64/m64, ~" , "op": "RVM: VEX.LZ.F2.0F38.W1 F6 /r" , "ext": "BMI2"}, + {"inst": "pdep W:r32, r32, r32/m32" , "op": "RVM: VEX.LZ.F2.0F38.W0 F5 /r" , "ext": "BMI2"}, + {"inst": "pdep W:r64, r64, r64/m64" , "op": "RVM: VEX.LZ.F2.0F38.W1 F5 /r" , "ext": "BMI2"}, + {"inst": "pext W:r32, r32, r32/m32" , "op": "RVM: VEX.LZ.F3.0F38.W0 F5 /r" , "ext": "BMI2"}, + {"inst": "pext W:r64, r64, r64/m64" , "op": "RVM: VEX.LZ.F3.0F38.W1 F5 /r" , "ext": "BMI2"}, + {"inst": "popcnt w:r16, r16/m16" , "op": "RM: 66 F3 0F B8 /r" , "ext": "POPCNT" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}, + {"inst": "popcnt W:r32, r32/m32" , "op": "RM: F3 0F B8 /r" , "ext": "POPCNT" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}, + {"inst": "popcnt W:r64, r64/m64" , "op": "RM: REX.W F3 0F B8 /r" , "ext": "POPCNT" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}, + {"inst": "prefetch R:mem" , "op": "0F 0D /0" , "ext": "3DNOW"}, + {"inst": "prefetchit0 R:mem" , "op": "0F 18 /7" , "ext": "PREFETCHI" , "arch": "X64"}, + {"inst": "prefetchit1 R:mem" , "op": "0F 18 /6" , "ext": "PREFETCHI" , "arch": "X64"}, + {"inst": "prefetchnta R:mem" , "op": "0F 18 /0" , "ext": "SSE"}, + {"inst": "prefetcht0 R:mem" , "op": "0F 18 /1" , "ext": "SSE"}, + {"inst": "prefetcht1 R:mem" , "op": "0F 18 /2" , "ext": "SSE"}, + {"inst": "prefetcht2 R:mem" , "op": "0F 18 /3" , "ext": "SSE"}, + {"inst": "prefetchw R:mem" , "op": "0F 0D /1" , "ext": "PREFETCHW" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "prefetchwt1 R:mem" , "op": "0F 0D /2" , "ext": "PREFETCHWT1", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "ptwrite R:r32/m32" , "op": "F3 0F AE /4" , "ext": "PTWRITE"}, + {"inst": "ptwrite R:r64/m64" , "op": "REX.W F3 0F AE /4" , "ext": "PTWRITE"}, + {"inst": "rdpid W:r32" , "op": "R: F3 0F C7 /7" , "ext": "RDPID" , "arch": "X86"}, + {"inst": "rdpid W:r64" , "op": "R: F3 0F C7 /7" , "ext": "RDPID" , "arch": "X64"}, + {"inst": "rdpkru W:, W:, R:" , "op": "0F 01 EE" , "ext": "OSPKE"}, + {"inst": "rdpru W:, W:, R:" , "op": "0F 01 FD" , "ext": "RDPRU"}, + {"inst": "rdrand w:r16" , "op": "66 0F C7 /6" , "ext": "RDRAND" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}, + {"inst": "rdrand W:r32" , "op": "0F C7 /6" , "ext": "RDRAND" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}, + {"inst": "rdrand W:r64" , "op": "REX.W 0F C7 /6" , "ext": "RDRAND" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}, + {"inst": "rdseed w:r16" , "op": "66 0F C7 /7" , "ext": "RDSEED" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}, + {"inst": "rdseed W:r32" , "op": "0F C7 /7" , "ext": "RDSEED" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}, + {"inst": "rdseed W:r64" , "op": "REX.W 0F C7 /7" , "ext": "RDSEED" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}, + {"inst": "rdtsc W:, W:" , "op": "0F 31" , "ext": "RDTSC"}, + {"inst": "rdtscp W:, W:, W:" , "op": "0F 01 F9" , "ext": "RDTSCP"}, + {"inst": "rorx W:r32, r32/m32, ib/ub" , "op": "RM: VEX.LZ.F2.0F3A.W0 F0 /r ib" , "ext": "BMI2"}, + {"inst": "rorx W:r64, r64/m64, ib/ub" , "op": "RM: VEX.LZ.F2.0F3A.W1 F0 /r ib" , "ext": "BMI2"}, + {"inst": "sahf R:" , "op": "9E" , "ext": "LAHFSAHF" , "io": "SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "sarx W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.F3.0F38.W0 F7 /r" , "ext": "BMI2"}, + {"inst": "sarx W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.F3.0F38.W1 F7 /r" , "ext": "BMI2"}, + {"inst": "serialize" , "op": "0F 01 E8" , "ext": "SERIALIZE"}, + {"inst": "sfence" , "op": "0F AE F8" , "ext": "SSE"}, + {"inst": "shlx W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.66.0F38.W0 F7 /r" , "ext": "BMI2"}, + {"inst": "shlx W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.66.0F38.W1 F7 /r" , "ext": "BMI2"}, + {"inst": "shrx W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.F2.0F38.W0 F7 /r" , "ext": "BMI2"}, + {"inst": "shrx W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.F2.0F38.W1 F7 /r" , "ext": "BMI2"}, + {"inst": "tzcnt w:r16, r16/m16" , "op": "RM: 66 F3 0F BC /r" , "ext": "BMI" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"}, + {"inst": "tzcnt W:r32, r32/m32" , "op": "RM: F3 0F BC /r" , "ext": "BMI" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"}, + {"inst": "tzcnt W:r64, r64/m64" , "op": "RM: REX.W F3 0F BC /r" , "ext": "BMI" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"}, + {"inst": "[lock|xacqrel] xadd x:r8/m8, x:r8" , "op": "MR: 0F C0 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] xadd x:r16/m16, x:r16" , "op": "MR: 66 0F C1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] xadd X:r32/m32, X:r32" , "op": "MR: 0F C1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "[lock|xacqrel] xadd X:r64/m64, X:r64" , "op": "MR: REX.W 0F C1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"} + ]}, + + {"category": "GP GP_EXT CRYPTO_HASH", "data": [ + {"inst": "crc32 X:r32, r8/m8" , "op": "RM: F2 0F 38 F0 /r" , "ext": "SSE4_2"}, + {"inst": "crc32 X:r32, r16/m16" , "op": "RM: 66 F2 0F 38 F1 /r" , "ext": "SSE4_2"}, + {"inst": "crc32 X:r32, r32/m32" , "op": "RM: F2 0F 38 F1 /r" , "ext": "SSE4_2"}, + {"inst": "crc32 X:r64, r8/m8" , "op": "RM: REX.W F2 0F 38 F0 /r" , "ext": "SSE4_2"}, + {"inst": "crc32 X:r64, r64/m64" , "op": "RM: REX.W F2 0F 38 F1 /r" , "ext": "SSE4_2"} + ]}, + + {"category": "GP", "volatile": true, "data": [ + {"inst": "cli" , "op": "FA" , "io": "IF=W"}, + {"inst": "int ib/ub" , "op": "CD ib"}, + {"inst": "int3" , "op": "CC"}, + {"inst": "lar w:r16, R:r16/m16" , "op": "RM: 66 0F 02 /r" , "io": "ZF=W"}, + {"inst": "lar W:r32, R:r32/m16" , "op": "RM: 0F 02 /r" , "io": "ZF=W"}, + {"inst": "lds x:r16, m16_16" , "op": "RM: 66 C5 /r" , "arch": "X86"}, + {"inst": "lds X:r32, m16_32" , "op": "RM: C5 /r" , "arch": "X86"}, + {"inst": "les x:r16, m16_16" , "op": "RM: 66 C4 /r" , "arch": "X86"}, + {"inst": "les X:r32, m16_32" , "op": "RM: C4 /r" , "arch": "X86"}, + {"inst": "lfs x:r16, m16_16" , "op": "RM: 66 0F B4 /r"}, + {"inst": "lfs X:r32, m16_32" , "op": "RM: 0F B4 /r"}, + {"inst": "lfs X:r64, m16_64" , "op": "RM: REX.W 0F B4 /r"}, + {"inst": "lgs x:r16, m16_16" , "op": "RM: 66 0F B5 /r"}, + {"inst": "lgs X:r32, m16_32" , "op": "RM: 0F B5 /r"}, + {"inst": "lgs X:r64, m16_64" , "op": "RM: REX.W 0F B5 /r"}, + {"inst": "lsl w:r16, R:r16/m16" , "op": "RM: 66 0F 03 /r" , "io": "ZF=W"}, + {"inst": "lsl W:r32, R:r32/m16" , "op": "RM: 0F 03 /r" , "io": "ZF=W"}, + {"inst": "lsl W:r64, R:r32/m16" , "op": "RM: REX.W 0F 03 /r" , "io": "ZF=W"}, + {"inst": "lss x:r16, m16_16" , "op": "RM: 66 0F B2 /r"}, + {"inst": "lss X:r32, m16_32" , "op": "RM: 0F B2 /r"}, + {"inst": "lss X:r64, m16_64" , "op": "RM: REX.W 0F B2 /r"}, + {"inst": "pause" , "op": "F3 90"}, + {"inst": "rsm" , "op": "0F AA" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"}, + {"inst": "sgdt W:mem" , "op": "0F 01 /0"}, + {"inst": "sidt W:mem" , "op": "0F 01 /1"}, + {"inst": "sldt w:r16/m16" , "op": "66 0F 00 /0"}, + {"inst": "sldt W:r32/m16" , "op": "0F 00 /0"}, + {"inst": "sldt W:r64/m16" , "op": "REX.W 0F 00 /0"}, + {"inst": "smsw w:r16/m16" , "op": "66 0F 01 /4"}, + {"inst": "smsw W:r32/m16" , "op": "0F 01 /4"}, + {"inst": "smsw W:r64/m16" , "op": "REX.W 0F 01 /4"}, + {"inst": "sti" , "op": "FB" , "io": "IF=1"}, + {"inst": "str w:r16/m16" , "op": "66 0F 00 /1"}, + {"inst": "str W:r32/m16" , "op": "0F 00 /1"}, + {"inst": "str W:r64/m16" , "op": "REX.W 0F 00 /1"}, + {"inst": "syscall" , "op": "0F 05" , "arch": "X64"}, + {"inst": "sysenter" , "op": "0F 34"}, + {"inst": "verr R:r16/m16" , "op": "0F 00 /4" , "io": "ZF=W"}, + {"inst": "verw R:r16/m16" , "op": "0F 00 /5" , "io": "ZF=W"}, + {"inst": "xlatb" , "op": "D7"} + ]}, + + {"category": "GP", "deprecated": true, "data": [ + {"inst": "aaa x:" , "op": "37" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=W PF=U CF=W"}, + {"inst": "aas x:" , "op": "3F" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=W PF=U CF=W"}, + {"inst": "aad x:, ib/ub" , "op": "D5 ib" , "arch": "X86", "io": "OF=U SF=W ZF=W AF=U PF=W CF=U"}, + {"inst": "aam x:, ib/ub" , "op": "D4 ib" , "arch": "X86", "io": "OF=U SF=W ZF=W AF=U PF=W CF=U"}, + {"inst": "arpl x:r16/m16, R:r16" , "op": "MR: 63 /r" , "arch": "X86", "io": "ZF=W"}, + {"inst": "bound R:r16, R:m32" , "op": "RM: 66 62 /r" , "arch": "X86"}, + {"inst": "bound R:r32, R:m64" , "op": "RM: 62 /r" , "arch": "X86"}, + {"inst": "daa x:" , "op": "27" , "arch": "X86", "io": "OF=U SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "das x:" , "op": "2F" , "arch": "X86", "io": "OF=U SF=W ZF=W AF=W PF=W CF=W"}, + {"inst": "into" , "op": "CE" , "arch": "X86", "io": "OF=R"}, + {"inst": "popa" , "op": "66 61" , "arch": "X86"}, + {"inst": "popad" , "op": "61" , "arch": "X86"}, + {"inst": "pusha" , "op": "66 60" , "arch": "X86"}, + {"inst": "pushad" , "op": "60" , "arch": "X86"} + ]}, + + {"category": "GP GP_EXT", "ext": "TBM", "deprecated": true, "data": [ + {"inst": "blci W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 02 /6"}, + {"inst": "blci W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 02 /6"}, + {"inst": "blcic W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /5"}, + {"inst": "blcic W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /5"}, + {"inst": "blsic W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /6"}, + {"inst": "blsic W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /6"}, + {"inst": "blcfill W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /1"}, + {"inst": "blcfill W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /1"}, + {"inst": "blsfill W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /2"}, + {"inst": "blsfill W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /2"}, + {"inst": "blcmsk W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 02 /1"}, + {"inst": "blcmsk W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 02 /1"}, + {"inst": "blcs W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /3"}, + {"inst": "blcs W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /3"}, + {"inst": "tzmsk W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /4"}, + {"inst": "tzmsk W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /4"}, + {"inst": "t1mskc W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /7"}, + {"inst": "t1mskc W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /7"} + ]}, + + {"category": "GP GP_EXT", "ext": "MPX", "deprecated": true, "data": [ + {"inst": "bndcl R:bnd, r32/m32" , "op": "RM: F3 0F 1A /r" , "arch": "X86"}, + {"inst": "bndcl R:bnd, r64/m64" , "op": "RM: F3 0F 1A /r" , "arch": "X64"}, + {"inst": "bndcn R:bnd, r32/m32" , "op": "RM: F2 0F 1B /r" , "arch": "X86"}, + {"inst": "bndcn R:bnd, r64/m64" , "op": "RM: F2 0F 1B /r" , "arch": "X64"}, + {"inst": "bndcu R:bnd, r32/m32" , "op": "RM: F2 0F 1A /r" , "arch": "X86"}, + {"inst": "bndcu R:bnd, r64/m64" , "op": "RM: F2 0F 1A /r" , "arch": "X64"}, + {"inst": "bndldx W:bnd, mib" , "op": "RM: 0F 1A /r"}, + {"inst": "bndmk W:bnd, mem" , "op": "RM: F3 0F 1B /r"}, + {"inst": "bndmov W:bnd, bnd/mem" , "op": "RM: 66 0F 1A /r"}, + {"inst": "bndmov W:bnd/mem, bnd" , "op": "MR: 66 0F 1B /r"}, + {"inst": "bndstx W:mib, bnd" , "op": "MR: 0F 1B /r"} + ]}, + + {"category": "GP GP_EXT", "volatile": true, "data": [ + {"inst": "fxrstor R:mem" , "op": "0F AE /1" , "ext": "FXSR" , "io": "C0=W C1=W C2=W C3=W"}, + {"inst": "fxrstor64 R:mem" , "op": "REX.W 0F AE /1" , "ext": "FXSR" , "io": "C0=W C1=W C2=W C3=W"}, + {"inst": "fxsave W:mem" , "op": "0F AE /0" , "ext": "FXSR" , "io": "C0=R C1=R C2=R C3=R"}, + {"inst": "fxsave64 W:mem" , "op": "REX.W 0F AE /0" , "ext": "FXSR" , "io": "C0=R C1=R C2=R C3=R"}, + {"inst": "xgetbv W:, W:, R:" , "op": "0F 01 D0" , "ext": "XSAVE" , "io": "XCR=R"}, + {"inst": "xrstor R:mem, , " , "op": "0F AE /5" , "ext": "XSAVE" , "io": "XCR=R"}, + {"inst": "xrstor64 R:mem, , " , "op": "REX.W 0F AE /5" , "ext": "XSAVE" , "io": "XCR=R"}, + {"inst": "xsave W:mem, , " , "op": "0F AE /4" , "ext": "XSAVE" , "io": "XCR=R"}, + {"inst": "xsave64 W:mem, , " , "op": "REX.W 0F AE /4" , "ext": "XSAVE" , "io": "XCR=R"}, + {"inst": "xsavec W:mem, , " , "op": "0F C7 /4" , "ext": "XSAVEC" , "io": "XCR=R"}, + {"inst": "xsavec64 W:mem, , " , "op": "REX.W 0F C7 /4" , "ext": "XSAVEC" , "io": "XCR=R"}, + {"inst": "xsaveopt W:mem, , " , "op": "0F AE /6" , "ext": "XSAVEOPT", "io": "XCR=R"}, + {"inst": "xsaveopt64 W:mem, , " , "op": "REX.W 0F AE /6" , "ext": "XSAVEOPT", "io": "XCR=R"} + ]}, + + {"category": "GP GP_EXT", "volatile": true, "data": [ + {"inst": "incsspd r32" , "op": "F3 0F AE /5" , "ext": "CET_SS"}, + {"inst": "incsspq r64" , "op": "REX.W F3 0F AE /5" , "ext": "CET_SS"}, + {"inst": "monitorx R:, R:, R:" , "op": "0F 01 FA" , "ext": "MONITORX"}, + {"inst": "mwaitx R:, R:, R:" , "op": "0F 01 FB" , "ext": "MONITORX"}, + {"inst": "rdsspd W:r32" , "op": "F3 0F 1E /1" , "ext": "CET_SS"}, + {"inst": "rdsspq W:r64" , "op": "REX.W F3 0F 1E /1" , "ext": "CET_SS"}, + {"inst": "rstorssp R:m64" , "op": "F3 0F 01 /5" , "ext": "CET_SS" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}, + 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/r"}, + {"inst": "pmaddwd X:~mm, ~mm/m64" , "op": "RM: 0F F5 /r"}, + {"inst": "pmulhw X:~mm, ~mm/m64" , "op": "RM: 0F E5 /r"}, + {"inst": "pmullw X:~mm, ~mm/m64" , "op": "RM: 0F D5 /r"}, + {"inst": "por X:~mm, ~mm/m64" , "op": "RM: 0F EB /r"}, + {"inst": "pslld X:mm, ib/ub" , "op": "M: 0F 72 /6 ib"}, + {"inst": "pslld X:mm, mm/m64" , "op": "RM: 0F F2 /r"}, + {"inst": "psllq X:mm, ib/ub" , "op": "M: 0F 73 /6 ib"}, + {"inst": "psllq X:mm, mm/m64" , "op": "RM: 0F F3 /r"}, + {"inst": "psllw X:mm, ib/ub" , "op": "M: 0F 71 /6 ib"}, + {"inst": "psllw X:mm, mm/m64" , "op": "RM: 0F F1 /r"}, + {"inst": "psrad X:mm, ib/ub" , "op": "M: 0F 72 /4 ib"}, + {"inst": "psrad X:mm, mm/m64" , "op": "RM: 0F E2 /r"}, + {"inst": "psraw X:mm, ib/ub" , "op": "M: 0F 71 /4 ib"}, + {"inst": "psraw X:mm, mm/m64" , "op": "RM: 0F E1 /r"}, + {"inst": "psrld X:mm, ib/ub" , "op": "M: 0F 72 /2 ib"}, + {"inst": "psrld X:mm, mm/m64" , "op": "RM: 0F D2 /r"}, + {"inst": "psrlq X:mm, ib/ub" , "op": "M: 0F 73 /2 ib"}, + {"inst": "psrlq X:mm, mm/m64" , "op": "RM: 0F D3 /r"}, + {"inst": "psrlw X:mm, ib/ub" , "op": "M: 0F 71 /2 ib"}, + {"inst": "psrlw X:mm, mm/m64" , "op": "RM: 0F D1 /r"}, + {"inst": "psubb X:mm, mm/m64" , "op": "RM: 0F F8 /r"}, + {"inst": "psubd X:mm, mm/m64" , "op": "RM: 0F FA /r"}, + {"inst": "psubsb X:mm, mm/m64" , "op": "RM: 0F E8 /r"}, + {"inst": "psubsw X:mm, mm/m64" , "op": "RM: 0F E9 /r"}, + {"inst": "psubusb X:mm, mm/m64" , "op": "RM: 0F D8 /r"}, + {"inst": "psubusw X:mm, mm/m64" , "op": "RM: 0F D9 /r"}, + {"inst": "psubw X:mm, mm/m64" , "op": "RM: 0F F9 /r"}, + {"inst": "punpckhbw X:mm, mm/m64" , "op": "RM: 0F 68 /r"}, + {"inst": "punpckhdq X:mm, mm/m64" , "op": "RM: 0F 6A /r"}, + {"inst": "punpckhwd X:mm, mm/m64" , "op": "RM: 0F 69 /r"}, + {"inst": "punpcklbw X:mm, mm/m32" , "op": "RM: 0F 60 /r"}, + {"inst": "punpckldq X:mm, mm/m32" , "op": "RM: 0F 62 /r"}, + {"inst": "punpcklwd X:mm, mm/m32" , "op": "RM: 0F 61 /r"}, + {"inst": "pxor X:~mm, ~mm/m64" , "op": "RM: 0F EF /r"} + ]}, + + {"category": "MMX SIMD", "ext": "MMX2", "deprecated": true, "data": [ + {"inst": "maskmovq R:mm, mm, X:" , "op": "RM: 0F F7 /r"}, + {"inst": "movntq W:m64, mm" , "op": "MR: 0F E7 /r"}, + {"inst": "pavgb X:~mm, ~mm/m64" , "op": "RM: 0F E0 /r"}, + {"inst": "pavgw X:~mm, ~mm/m64" , "op": "RM: 0F E3 /r"}, + {"inst": "pextrw W:r32[15:0], mm, ib/ub" , "op": "RM: 0F C5 /r ib"}, + {"inst": "pinsrw X:mm, r32[15:0]/m16, ib/ub" , "op": "RM: 0F C4 /r ib"}, + {"inst": "pmaxsw X:~mm, ~mm/m64" , "op": "RM: 0F EE /r"}, + {"inst": "pmaxub X:~mm, ~mm/m64" , "op": "RM: 0F DE /r"}, + {"inst": "pminsw X:~mm, ~mm/m64" , "op": "RM: 0F EA /r"}, + {"inst": "pminub X:~mm, ~mm/m64" , "op": "RM: 0F DA /r"}, + {"inst": "pmovmskb W:r32[7:0], mm" , "op": "RM: 0F D7 /r"}, + {"inst": "pmulhuw X:~mm, ~mm/m64" , "op": "RM: 0F E4 /r"}, + {"inst": "psadbw X:~mm, ~mm/m64" , "op": "RM: 0F F6 /r"}, + {"inst": "pshufw W:mm, mm/m64, ib/ub" , "op": "RM: 0F 70 /r ib"} + ]}, + + {"category": "MMX SIMD", "ext": "3DNOW", "deprecated": true, "data": [ + {"inst": "pavgusb X:mm, mm/m64" , "op": "RM: 0F 0F /r BF"}, + {"inst": "pf2id W:mm, mm/m64" , "op": "RM: 0F 0F /r 1D"}, + {"inst": "pfacc X:mm, mm/m64" , "op": "RM: 0F 0F /r AE"}, + {"inst": "pfadd X:mm, mm/m64" , "op": "RM: 0F 0F /r 9E"}, + {"inst": "pfcmpeq X:mm, mm/m64" , "op": "RM: 0F 0F /r B0"}, + {"inst": "pfcmpge X:mm, mm/m64" , "op": "RM: 0F 0F /r 90"}, + {"inst": "pfcmpgt X:mm, mm/m64" , "op": "RM: 0F 0F /r A0"}, + {"inst": "pfmax X:mm, mm/m64" , "op": "RM: 0F 0F /r A4"}, + {"inst": "pfmin X:mm, mm/m64" , "op": "RM: 0F 0F /r 94"}, + {"inst": "pfmul X:mm, mm/m64" , "op": "RM: 0F 0F /r B4"}, + {"inst": "pfrcp W:mm, mm/m64" , "op": "RM: 0F 0F /r 96"}, + {"inst": "pfrcpit1 X:mm, mm/m64" , "op": "RM: 0F 0F /r A6"}, + {"inst": "pfrcpit2 X:mm, mm/m64" , "op": "RM: 0F 0F /r B6"}, + {"inst": "pfrsqit1 W:mm, mm/m64" , "op": "RM: 0F 0F /r A7"}, + {"inst": "pfrsqrt W:mm, mm/m64" , "op": "RM: 0F 0F /r 97"}, + {"inst": "pfsub X:mm, mm/m64" , "op": "RM: 0F 0F /r 9A"}, + {"inst": "pfsubr X:mm, mm/m64" , "op": "RM: 0F 0F /r AA"}, + {"inst": "pi2fd W:mm, mm/m64" , "op": "RM: 0F 0F /r 0D"}, + {"inst": "pmulhrw X:mm, mm/m64" , "op": "RM: 0F 0F /r B7"} + ]}, + + {"category": "MMX SIMD", "ext": "3DNOW2", "deprecated": true, "data": [ + {"inst": "pf2iw W:mm, mm/m64" , "op": "RM: 0F 0F /r 1C"}, + {"inst": "pfnacc X:mm, mm/m64" , "op": "RM: 0F 0F /r 8A"}, + {"inst": "pfpnacc X:mm, mm/m64" , "op": "RM: 0F 0F /r 8E"}, + {"inst": "pi2fw W:mm, mm/m64" , "op": "RM: 0F 0F /r 0C"}, + {"inst": "pswapd W:mm, mm/m64" , "op": "RM: 0F 0F /r BB"} + ]}, + + {"category": "MMX SIMD", "ext": "GEODE", "deprecated": true, "data": [ + {"inst": "pfrcpv X:mm, mm/m64" , "op": "RM: 0F 0F /r 86"}, + {"inst": "pfrsqrtv X:mm, mm/m64" , "op": "RM: 0F 0F /r 87"} + ]}, + + {"category": "SSE STATE", "ext": "SSE", "data": [ + {"inst": "ldmxcsr R:m32" , "op": "0F AE /2", "io": "MXCSR=W"}, + {"inst": "stmxcsr W:m32" , "op": "0F AE /3", "io": "MXCSR=R"} + ]}, + + {"category": "SSE SCALAR", "ext": "SSE", "data": [ + {"inst": "addss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 58 /r"}, + {"inst": "cmpss x:xmm[31:0], xmm[31:0]/m32, ib/ub" , "op": "RM: F3 0F C2 /r ib"}, + {"inst": "comiss R:xmm[31:0], xmm[31:0]/m32" , "op": "RM: 0F 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "cvtsi2ss w:xmm[31:0], r64/m64" , "op": "RM: REX.W F3 0F 2A /r"}, + {"inst": "cvtsi2ss w:xmm[31:0], r32/m32" , "op": "RM: F3 0F 2A /r"}, + {"inst": "cvtss2si W:r32, xmm[31:0]/m32" , "op": "RM: F3 0F 2D /r"}, + {"inst": "cvtss2si W:r64, xmm[31:0]/m32" , "op": "RM: REX.W F3 0F 2D /r"}, + {"inst": "cvttss2si W:r64, xmm[31:0]/m32" , "op": "RM: REX.W F3 0F 2C /r"}, + {"inst": "cvttss2si W:r32, xmm[31:0]/m32" , "op": "RM: F3 0F 2C /r"}, + {"inst": "divss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5E /r"}, + {"inst": "maxss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5F /r"}, + {"inst": "minss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5D /r"}, + {"inst": "movss w:xmm[31:0], xmm[31:0]" , "op": "RM: F3 0F 10 /r"}, + {"inst": "movss W:xmm[31:0], m32" , "op": "RM: F3 0F 10 /r"}, + {"inst": "movss W:m32, xmm[31:0]" , "op": "MR: F3 0F 11 /r"}, + {"inst": "mulss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 59 /r"}, + {"inst": "rcpss w:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 53 /r"}, + {"inst": "rsqrtss w:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 52 /r"}, + {"inst": "sqrtss w:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 51 /r"}, + {"inst": "subss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5C /r"}, + {"inst": "ucomiss R:xmm[31:0], xmm[31:0]/m32" , "op": "RM: 0F 2E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"} + ]}, + + {"category": "SSE SIMD", "ext": "SSE", "data": [ + {"inst": "addps X:~xmm, ~xmm/m128" , "op": "RM: 0F 58 /r"}, + {"inst": "andnps X:xmm, xmm/m128" , "op": "RM: 0F 55 /r"}, + {"inst": "andps X:~xmm, ~xmm/m128" , "op": "RM: 0F 54 /r"}, + {"inst": "cmpps X:xmm, xmm/m128, ib/ub" , "op": "RM: 0F C2 /r ib"}, + {"inst": "cvtpi2ps w:xmm[63:0], mm/m64" , "op": "RM: 0F 2A /r"}, + {"inst": "cvtps2pi W:mm, xmm[63:0]/m64" , "op": "RM: 0F 2D /r"}, + {"inst": "cvttps2pi W:mm, xmm[63:0]/m64" , "op": "RM: 0F 2C /r"}, + {"inst": "divps X:xmm, xmm/m128" , "op": "RM: 0F 5E /r"}, + {"inst": "maxps X:xmm, xmm/m128" , "op": "RM: 0F 5F /r"}, + {"inst": "minps X:xmm, xmm/m128" , "op": "RM: 0F 5D /r"}, + {"inst": "movaps W:xmm, xmm/m128" , "op": "RM: 0F 28 /r"}, + {"inst": "movaps W:xmm/m128, xmm" , "op": "MR: 0F 29 /r"}, + {"inst": "movhlps w:xmm[63:0], xmm[127:64]" , "op": "RM: 0F 12 /r"}, + {"inst": "movhps W:m64, xmm[127:64]" , "op": "MR: 0F 17 /r"}, + {"inst": "movhps w:xmm[127:64], m64" , "op": "RM: 0F 16 /r"}, + {"inst": "movlhps w:xmm[127:64], xmm[63:0]" , "op": "RM: 0F 16 /r"}, + {"inst": "movlps W:m64, xmm[63:0]" , "op": "MR: 0F 13 /r"}, + {"inst": "movlps w:xmm[63:0], m64" , "op": "RM: 0F 12 /r"}, + {"inst": "movmskps W:r32[3:0], xmm" , "op": "RM: 0F 50 /r"}, + {"inst": "movntps W:m128, xmm" , "op": "MR: 0F 2B /r"}, + {"inst": "movups W:xmm, xmm/m128" , "op": "RM: 0F 10 /r"}, + {"inst": "movups W:xmm/m128, xmm" , "op": "MR: 0F 11 /r"}, + {"inst": "mulps X:~xmm, ~xmm/m128" , "op": "RM: 0F 59 /r"}, + {"inst": "orps X:~xmm, ~xmm/m128" , "op": "RM: 0F 56 /r"}, + {"inst": "rcpps W:xmm, xmm/m128" , "op": "RM: 0F 53 /r"}, + {"inst": "rsqrtps W:xmm, xmm/m128" , "op": "RM: 0F 52 /r"}, + {"inst": "shufps X:xmm, xmm/m128, ib/ub" , "op": "RM: 0F C6 /r ib"}, + {"inst": "sqrtps W:xmm, xmm/m128" , "op": "RM: 0F 51 /r"}, + {"inst": "subps X:xmm, xmm/m128" , "op": "RM: 0F 5C /r"}, + {"inst": "unpckhps X:xmm, xmm/m128" , "op": "RM: 0F 15 /r"}, + {"inst": "unpcklps X:xmm, xmm/m128" , "op": "RM: 0F 14 /r"}, + {"inst": "xorps X:~xmm, ~xmm/m128" , "op": "RM: 0F 57 /r"} + ]}, + + {"category": "SSE SCALAR", "ext": "SSE2", "data": [ + {"inst": "addsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 58 /r"}, + {"inst": "cmpsd x:xmm[63:0], xmm[63:0]/m64, ib/ub" , "op": "RM: F2 0F C2 /r ib"}, + {"inst": "comisd R:xmm[63:0], xmm[63:0]/m64" , "op": "RM: 66 0F 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "cvtsd2si W:r32, xmm[63:0]/m64" , "op": "RM: F2 0F 2D /r"}, + {"inst": "cvtsd2si W:r64, xmm[63:0]/m64" , "op": "RM: REX.W F2 0F 2D /r"}, + {"inst": "cvtsd2ss w:xmm[31:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5A /r"}, + {"inst": "cvtsi2sd w:xmm[63:0], r32/m32" , "op": "RM: F2 0F 2A /r"}, + {"inst": "cvtsi2sd w:xmm[63:0], r64/m64" , "op": "RM: REX.W F2 0F 2A /r"}, + {"inst": "cvtss2sd w:xmm[63:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5A /r"}, + {"inst": "cvttsd2si W:r32, xmm[63:0]/m64" , "op": "RM: F2 0F 2C /r"}, + {"inst": "cvttsd2si W:r64, xmm[63:0]/m64" , "op": "RM: REX.W F2 0F 2C /r"}, + {"inst": "divsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5E /r"}, + {"inst": "maxsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5F /r"}, + {"inst": "minsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5D /r"}, + {"inst": "movsd w:xmm[63:0], xmm[63:0]" , "op": "RM: F2 0F 10 /r"}, + {"inst": "movsd W:xmm[63:0], m64" , "op": "RM: F2 0F 10 /r"}, + {"inst": "movsd W:m64, xmm[63:0]" , "op": "MR: F2 0F 11 /r"}, + {"inst": "mulsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 59 /r"}, + {"inst": "sqrtsd w:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 51 /r"}, + {"inst": "subsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5C /r"}, + {"inst": "ucomisd R:xmm[63:0], xmm[63:0]/m64" , "op": "RM: 66 0F 2E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"} + ]}, + + {"category": "SSE SIMD", "ext": "SSE2", "data": [ + {"inst": "addpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 58 /r"}, + {"inst": "andnpd X:xmm, xmm/m128" , "op": "RM: 66 0F 55 /r"}, + {"inst": "andpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 54 /r"}, + {"inst": "cmppd X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F C2 /r ib"}, + {"inst": "cvtdq2pd W:xmm, xmm[63:0]/m64" , "op": "RM: F3 0F E6 /r"}, + {"inst": "cvtdq2ps W:xmm, xmm/m128" , "op": "RM: 0F 5B /r"}, + {"inst": "cvtpd2dq W:xmm[63:0], xmm/m128" , "op": "RM: F2 0F E6 /r"}, + {"inst": "cvtpd2pi W:mm, xmm/m128" , "op": "RM: 66 0F 2D /r"}, + {"inst": "cvtpd2ps W:xmm[63:0], xmm/m128" , "op": "RM: 66 0F 5A /r"}, + {"inst": "cvtpi2pd W:xmm, R:mm[63:0]/m64" , "op": "RM: 66 0F 2A /r"}, + {"inst": "cvtps2dq W:xmm, xmm/m128" , "op": "RM: 66 0F 5B /r"}, + {"inst": "cvtps2pd W:xmm, xmm[63:0]/m64" , "op": "RM: 0F 5A /r"}, + {"inst": "cvttpd2dq W:xmm[63:0], xmm/m128" , "op": "RM: 66 0F E6 /r"}, + {"inst": "cvttpd2pi W:mm, xmm/m128" , "op": "RM: 66 0F 2C /r"}, + {"inst": "cvttps2dq W:xmm, xmm/m128" , "op": "RM: F3 0F 5B /r"}, + {"inst": "divpd X:xmm, xmm/m128" , "op": "RM: 66 0F 5E /r"}, + {"inst": "maskmovdqu R:xmm, xmm, X:" , "op": "RM: 66 0F F7 /r"}, + {"inst": "maxpd X:xmm, xmm/m128" , "op": "RM: 66 0F 5F /r"}, + {"inst": "minpd X:xmm, xmm/m128" , "op": "RM: 66 0F 5D /r"}, + {"inst": "movapd W:xmm, xmm/m128" , "op": "RM: 66 0F 28 /r"}, + {"inst": "movapd W:xmm/m128, xmm" , "op": "MR: 66 0F 29 /r"}, + {"inst": "movd W:r32[31:0]/m32, xmm[31:0]" , "op": "MR: 66 0F 7E /r"}, + {"inst": "movd W:xmm[31:0], R:r32[31:0]/m32" , "op": "RM: 66 0F 6E /r"}, + {"inst": "movdq2q W:mm, xmm[63:0]" , "op": "RM: F2 0F D6 /r"}, + {"inst": "movdqa W:xmm, xmm/m128" , "op": "RM: 66 0F 6F /r"}, + {"inst": "movdqa W:xmm/m128, xmm" , "op": "MR: 66 0F 7F /r"}, + {"inst": "movdqu W:xmm, xmm/m128" , "op": "RM: F3 0F 6F /r"}, + {"inst": "movdqu W:xmm/m128, xmm" , "op": "MR: F3 0F 7F /r"}, + {"inst": "movhpd W:m64, xmm[127:64]" , "op": "MR: 66 0F 17 /r"}, + {"inst": "movhpd w:xmm[127:64], m64" , "op": "RM: 66 0F 16 /r"}, + {"inst": "movlpd W:m64, xmm[63:0]" , "op": "MR: 66 0F 13 /r"}, + {"inst": "movlpd w:xmm[63:0], m64" , "op": "RM: 66 0F 12 /r"}, + {"inst": "movmskpd W:r32[1:0], xmm" , "op": "RM: 66 0F 50 /r"}, + {"inst": "movntdq W:m128, xmm" , "op": "MR: 66 0F E7 /r"}, + {"inst": "movntpd W:m128, xmm" , "op": "MR: 66 0F 2B /r"}, + {"inst": "movq W:r64/m64, xmm[63:0]" , "op": "MR: REX.W 66 0F 7E /r"}, + {"inst": "movq W:xmm[63:0], r64[63:0]/m64" , "op": "RM: REX.W 66 0F 6E /r"}, + {"inst": "movq W:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F3 0F 7E /r"}, + {"inst": "movq W:xmm[63:0]/m64, xmm[63:0]" , "op": "MR: 66 0F D6 /r"}, + {"inst": "movq2dq W:xmm[63:0], mm" , "op": "RM: F3 0F D6 /r"}, + {"inst": "movupd W:xmm, xmm/m128" , "op": "RM: 66 0F 10 /r"}, + {"inst": "movupd W:xmm/m128, xmm" , "op": "MR: 66 0F 11 /r"}, + {"inst": "mulpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 59 /r"}, + {"inst": "orpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 56 /r"}, + {"inst": "packssdw X:xmm, xmm/m128" , "op": "RM: 66 0F 6B /r"}, + {"inst": "packsswb X:xmm, xmm/m128" , "op": "RM: 66 0F 63 /r"}, + {"inst": "packuswb X:xmm, xmm/m128" , "op": "RM: 66 0F 67 /r"}, + {"inst": "paddb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F FC /r"}, + {"inst": "paddd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F FE /r"}, + {"inst": "paddq X:~mm, ~mm/m64" , "op": "RM: 0F D4 /r"}, + {"inst": "paddq X:~xmm, ~xmm/m128" , "op": "RM: 66 0F D4 /r"}, + {"inst": "paddsb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EC /r"}, + {"inst": "paddsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F ED /r"}, + {"inst": "paddusb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DC /r"}, + {"inst": "paddusw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DD /r"}, + {"inst": "paddw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F FD /r"}, + {"inst": "pand X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DB /r"}, + {"inst": "pandn X:xmm, xmm/m128" , "op": "RM: 66 0F DF /r"}, + {"inst": "pavgb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F E0 /r"}, + {"inst": "pavgw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F E3 /r"}, + {"inst": "pcmpeqb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 74 /r"}, + {"inst": "pcmpeqd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 76 /r"}, + {"inst": "pcmpeqw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 75 /r"}, + {"inst": "pcmpgtb X:xmm, xmm/m128" , "op": "RM: 66 0F 64 /r"}, + {"inst": "pcmpgtd X:xmm, xmm/m128" , "op": "RM: 66 0F 66 /r"}, + {"inst": "pcmpgtw X:xmm, xmm/m128" , "op": "RM: 66 0F 65 /r"}, + {"inst": "pextrw W:r32[15:0], xmm, ib/ub" , "op": "RM: 66 0F C5 /r ib"}, + {"inst": "pinsrw X:xmm, r32[15:0]/m16, ib/ub" , "op": "RM: 66 0F C4 /r ib"}, + {"inst": "pmaddwd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F F5 /r"}, + {"inst": "pmaxsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EE /r"}, + {"inst": "pmaxub X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DE /r"}, + {"inst": "pminsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EA /r"}, + {"inst": "pminub X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DA /r"}, + {"inst": "pmovmskb W:r32[15:0], xmm" , "op": "RM: 66 0F D7 /r"}, + {"inst": "pmulhuw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F E4 /r"}, + {"inst": "pmulhw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F E5 /r"}, + {"inst": "pmullw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F D5 /r"}, + {"inst": "pmuludq X:~mm, ~mm/m64" , "op": "RM: 0F F4 /r"}, + {"inst": "pmuludq X:~xmm, ~xmm/m128" , "op": "RM: 66 0F F4 /r"}, + {"inst": "por X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EB /r"}, + {"inst": "psadbw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F F6 /r"}, + {"inst": "pshufd W:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 70 /r ib"}, + {"inst": "pshufhw W:xmm, xmm/m128, ib/ub" , "op": "RM: F3 0F 70 /r ib"}, + {"inst": "pshuflw W:xmm, xmm/m128, ib/ub" , "op": "RM: F2 0F 70 /r ib"}, + {"inst": "pslld X:xmm, ib/ub" , "op": "M: 66 0F 72 /6 ib"}, + {"inst": "pslld X:xmm, xmm/m128" , "op": "RM: 66 0F F2 /r"}, + {"inst": "pslldq X:xmm, ib/ub" , "op": "M: 66 0F 73 /7 ib"}, + {"inst": "psllq X:xmm, ib/ub" , "op": "M: 66 0F 73 /6 ib"}, + {"inst": "psllq X:xmm, xmm/m128" , "op": "RM: 66 0F F3 /r"}, + {"inst": "psllw X:xmm, ib/ub" , "op": "M: 66 0F 71 /6 ib"}, + {"inst": "psllw X:xmm, xmm/m128" , "op": "RM: 66 0F F1 /r"}, + {"inst": "psrad X:xmm, ib/ub" , "op": "M: 66 0F 72 /4 ib"}, + {"inst": "psrad X:xmm, xmm/m128" , "op": "RM: 66 0F E2 /r"}, + {"inst": "psraw X:xmm, ib/ub" , "op": "M: 66 0F 71 /4 ib"}, + {"inst": "psraw X:xmm, xmm/m128" , "op": "RM: 66 0F E1 /r"}, + {"inst": "psrld X:xmm, ib/ub" , "op": "M: 66 0F 72 /2 ib"}, + {"inst": "psrld X:xmm, xmm/m128" , "op": "RM: 66 0F D2 /r"}, + {"inst": "psrldq X:xmm, ib/ub" , "op": "M: 66 0F 73 /3 ib"}, + {"inst": "psrlq X:xmm, ib/ub" , "op": "M: 66 0F 73 /2 ib"}, + {"inst": "psrlq X:xmm, xmm/m128" , "op": "RM: 66 0F D3 /r"}, + {"inst": "psrlw X:xmm, ib/ub" , "op": "M: 66 0F 71 /2 ib"}, + {"inst": "psrlw X:xmm, xmm/m128" , "op": "RM: 66 0F D1 /r"}, + {"inst": "psubb X:xmm, xmm/m128" , "op": "RM: 66 0F F8 /r"}, + {"inst": "psubd X:xmm, xmm/m128" , "op": "RM: 66 0F FA /r"}, + {"inst": "psubq X:mm, mm/m64" , "op": "RM: 0F FB /r"}, + {"inst": "psubq X:xmm, xmm/m128" , "op": "RM: 66 0F FB /r"}, + {"inst": "psubsb X:xmm, xmm/m128" , "op": "RM: 66 0F E8 /r"}, + {"inst": "psubsw X:xmm, xmm/m128" , "op": "RM: 66 0F E9 /r"}, + {"inst": "psubusb X:xmm, xmm/m128" , "op": "RM: 66 0F D8 /r"}, + {"inst": "psubusw X:xmm, xmm/m128" , "op": "RM: 66 0F D9 /r"}, + {"inst": "psubw X:xmm, xmm/m128" , "op": "RM: 66 0F F9 /r"}, + {"inst": "punpckhbw X:xmm, xmm/m128" , "op": "RM: 66 0F 68 /r"}, + {"inst": "punpckhdq X:xmm, xmm/m128" , "op": "RM: 66 0F 6A /r"}, + {"inst": "punpckhqdq X:xmm, xmm/m128" , "op": "RM: 66 0F 6D /r"}, + {"inst": "punpckhwd X:xmm, xmm/m128" , "op": "RM: 66 0F 69 /r"}, + {"inst": "punpcklbw X:xmm, xmm/m128" , "op": "RM: 66 0F 60 /r"}, + {"inst": "punpckldq X:xmm, xmm/m128" , "op": "RM: 66 0F 62 /r"}, + {"inst": "punpcklqdq X:xmm, xmm/m128" , "op": "RM: 66 0F 6C /r"}, + {"inst": "punpcklwd X:xmm, xmm/m128" , "op": "RM: 66 0F 61 /r"}, + {"inst": "pxor X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EF /r"}, + {"inst": "shufpd X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F C6 /r ib"}, + {"inst": "sqrtpd W:xmm, xmm/m128" , "op": "RM: 66 0F 51 /r"}, + {"inst": "subpd X:xmm, xmm/m128" , "op": "RM: 66 0F 5C /r"}, + {"inst": "unpckhpd X:xmm, xmm/m128" , "op": "RM: 66 0F 15 /r"}, + {"inst": "unpcklpd X:xmm, xmm/m128" , "op": "RM: 66 0F 14 /r"}, + {"inst": "xorpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 57 /r"} + ]}, + + {"category": "SSE SIMD", "ext": "SSE3", "data": [ + {"inst": "addsubpd X:xmm, xmm/m128" , "op": "RM: 66 0F D0 /r"}, + {"inst": "addsubps X:xmm, xmm/m128" , "op": "RM: F2 0F D0 /r"}, + {"inst": "haddpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 7C /r"}, + {"inst": "haddps X:~xmm, ~xmm/m128" , "op": "RM: F2 0F 7C /r"}, + {"inst": "hsubpd X:xmm, xmm/m128" , "op": "RM: 66 0F 7D /r"}, + {"inst": "hsubps X:xmm, xmm/m128" , "op": "RM: F2 0F 7D /r"}, + {"inst": "lddqu W:xmm, m128" , "op": "RM: F2 0F F0 /r"}, + {"inst": "movddup W:xmm, xmm[63:0]/m64" , "op": "RM: F2 0F 12 /r"}, + {"inst": "movshdup W:xmm, xmm/m128" , "op": "RM: F3 0F 16 /r"}, + {"inst": "movsldup W:xmm, xmm/m128" , "op": "RM: F3 0F 12 /r"} + ]}, + + {"category": "SSE SIMD", "ext": "SSSE3", "data": [ + {"inst": "pabsb W:mm, mm/m64" , "op": "RM: 0F 38 1C /r"}, + {"inst": "pabsb W:xmm, xmm/m128" , "op": "RM: 66 0F 38 1C /r"}, + {"inst": "pabsd W:mm, mm/m64" , "op": "RM: 0F 38 1E /r"}, + {"inst": "pabsd W:xmm, xmm/m128" , "op": "RM: 66 0F 38 1E /r"}, + {"inst": "pabsw W:mm, mm/m64" , "op": "RM: 0F 38 1D /r"}, + {"inst": "pabsw W:xmm, xmm/m128" , "op": "RM: 66 0F 38 1D /r"}, + {"inst": "palignr X:mm, mm/m64, ib/ub" , "op": "RM: 0F 3A 0F /r ib"}, + {"inst": "palignr X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 0F /r ib"}, + {"inst": "phaddd X:~mm, ~mm/m64" , "op": "RM: 0F 38 02 /r"}, + {"inst": "phaddd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 02 /r"}, + {"inst": "phaddsw X:~mm, ~mm/m64" , "op": "RM: 0F 38 03 /r"}, + {"inst": "phaddsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 03 /r"}, + {"inst": "phaddw X:~mm, ~mm/m64" , "op": "RM: 0F 38 01 /r"}, + {"inst": "phaddw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 01 /r"}, + {"inst": "phsubd X:mm, mm/m64" , "op": "RM: 0F 38 06 /r"}, + {"inst": "phsubd X:xmm, xmm/m128" , "op": "RM: 66 0F 38 06 /r"}, + {"inst": "phsubsw X:mm, mm/m64" , "op": "RM: 0F 38 07 /r"}, + {"inst": "phsubsw X:xmm, xmm/m128" , "op": "RM: 66 0F 38 07 /r"}, + {"inst": "phsubw X:mm, mm/m64" , "op": "RM: 0F 38 05 /r"}, + {"inst": "phsubw X:xmm, xmm/m128" , "op": "RM: 66 0F 38 05 /r"}, + {"inst": "pmaddubsw X:~mm, ~mm/m64" , "op": "RM: 0F 38 04 /r"}, + {"inst": "pmaddubsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 04 /r"}, + {"inst": "pmulhrsw X:~mm, ~mm/m64" , "op": "RM: 0F 38 0B /r"}, + {"inst": "pmulhrsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 0B /r"}, + {"inst": "pshufb X:mm, mm/m64" , "op": "RM: 0F 38 00 /r"}, + {"inst": "pshufb X:xmm, xmm/m128" , "op": "RM: 66 0F 38 00 /r"}, + {"inst": "psignb X:mm, mm/m64" , "op": "RM: 0F 38 08 /r"}, + {"inst": "psignb X:xmm, xmm/m128" , "op": "RM: 66 0F 38 08 /r"}, + {"inst": "psignd X:mm, mm/m64" , "op": "RM: 0F 38 0A /r"}, + {"inst": "psignd X:xmm, xmm/m128" , "op": "RM: 66 0F 38 0A /r"}, + {"inst": "psignw X:mm, mm/m64" , "op": "RM: 0F 38 09 /r"}, + {"inst": "psignw X:xmm, xmm/m128" , "op": "RM: 66 0F 38 09 /r"} + ]}, + + {"category": "SSE SCALAR", "ext": "SSE4_1", "data": [ + {"inst": "roundsd w:xmm[63:0], xmm[63:0]/m64, ib/ub" , "op": "RM: 66 0F 3A 0B /r ib"}, + {"inst": "roundss w:xmm[31:0], xmm[31:0]/m32, ib/ub" , "op": "RM: 66 0F 3A 0A /r ib"} + ]}, + + {"category": "SSE SIMD", "ext": "SSE4_1", "data": [ + {"inst": "blendpd X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 0D /r ib"}, + {"inst": "blendps X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 0C /r ib"}, + {"inst": "blendvpd X:xmm, xmm/m128, " , "op": "RM: 66 0F 38 15 /r"}, + {"inst": "blendvps X:xmm, xmm/m128, " , "op": "RM: 66 0F 38 14 /r"}, + {"inst": "dppd X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 41 /r ib"}, + {"inst": "dpps X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 40 /r ib"}, + {"inst": "extractps W:r32/m32, xmm, ib/ub" , "op": "MR: 66 0F 3A 17 /r ib"}, + {"inst": "insertps X:xmm, xmm[31:0]/m32, ib/ub" , "op": "RM: 66 0F 3A 21 /r ib"}, + {"inst": "movntdqa W:xmm, m128" , "op": "RM: 66 0F 38 2A /r"}, + {"inst": "mpsadbw X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 42 /r ib"}, + {"inst": "packusdw X:xmm, xmm/m128" , "op": "RM: 66 0F 38 2B /r"}, + {"inst": "pblendvb X:xmm, xmm/m128, " , "op": "RM: 66 0F E0 /r"}, + {"inst": "pblendw X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 0E /r ib"}, + {"inst": "pcmpeqq X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 29 /r"}, + {"inst": "pextrb W:r32[7:0]/m8, xmm, ib/ub" , "op": "MR: 66 0F 3A 14 /r ib"}, + {"inst": "pextrd W:r32[31:0]/m32, xmm, ib/ub" , "op": "MR: 66 0F 3A 16 /r ib"}, + {"inst": "pextrq W:r64/m64, xmm, ib/ub" , "op": "MR: REX.W 66 0F 3A 16 /r ib"}, + {"inst": "pextrw W:r32[15:0]/m16, xmm, ib/ub" , "op": "MR: 66 0F 3A 15 /r ib"}, + {"inst": "phminposuw W:xmm[18:0], xmm/m128" , "op": "RM: 66 0F 38 41 /r"}, + {"inst": "pinsrb X:xmm, r32[7:0]/m8, ib/ub" , "op": "RM: 66 0F 3A 20 /r ib"}, + {"inst": "pinsrd X:xmm, r32[31:0]/m32, ib/ub" , "op": "RM: 66 0F 3A 22 /r ib"}, + {"inst": "pinsrq X:xmm, r64/m64, ib/ub" , "op": "RM: REX.W 66 0F 3A 22 /r ib"}, + {"inst": "pmaxsb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3C /r"}, + {"inst": "pmaxsd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3D /r"}, + {"inst": "pmaxud X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3F /r"}, + {"inst": "pmaxuw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3E /r"}, + {"inst": "pminsb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 38 /r"}, + {"inst": "pminsd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 39 /r"}, + {"inst": "pminud X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3B /r"}, + {"inst": "pminuw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3A /r"}, + {"inst": "pmovsxbd W:xmm, xmm[31:0]/m32" , "op": "RM: 66 0F 38 21 /r"}, + {"inst": "pmovsxbq W:xmm, xmm[15:0]/m16" , "op": "RM: 66 0F 38 22 /r"}, + {"inst": "pmovsxbw W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 20 /r"}, + {"inst": "pmovsxdq W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 25 /r"}, + {"inst": "pmovsxwd W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 23 /r"}, + {"inst": "pmovsxwq W:xmm, xmm[31:0]/m32" , "op": "RM: 66 0F 38 24 /r"}, + {"inst": "pmovzxbd W:xmm, xmm[31:0]/m32" , "op": "RM: 66 0F 38 31 /r"}, + {"inst": "pmovzxbq W:xmm, xmm[15:0]/m16" , "op": "RM: 66 0F 38 32 /r"}, + {"inst": "pmovzxbw W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 30 /r"}, + {"inst": "pmovzxdq W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 35 /r"}, + {"inst": "pmovzxwd W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 33 /r"}, + {"inst": "pmovzxwq W:xmm, xmm[31:0]/m32" , "op": "RM: 66 0F 38 34 /r"}, + {"inst": "pmuldq X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 28 /r"}, + {"inst": "pmulld X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 40 /r"}, + {"inst": "ptest R:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 17 /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "roundpd W:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 09 /r ib"}, + {"inst": "roundps W:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 08 /r ib"} + ]}, + + {"category": "SSE SIMD", "ext": "SSE4_2", "data": [ + {"inst": "pcmpestri R:xmm, xmm/m128, ib/ub, W:,," , "op": "RM: 66 0F 3A 61 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"}, + {"inst": "pcmpestrm R:xmm, xmm/m128, ib/ub, W:,," , "op": "RM: 66 0F 3A 60 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"}, + {"inst": "pcmpgtq X:xmm, xmm/m128" , "op": "RM: 66 0F 38 37 /r"}, + {"inst": "pcmpistri R:xmm, xmm/m128, ib/ub, W:" , "op": "RM: 66 0F 3A 63 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"}, + {"inst": "pcmpistrm R:xmm, xmm/m128, ib/ub, W:" , "op": "RM: 66 0F 3A 62 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"} + ]}, + + {"category": "SSE SCALAR", "ext": "SSE4A", "data": [ + {"inst": "movntsd W:m64, xmm[63:0]" , "op": "RM: F2 0F 2B /r"}, + {"inst": "movntss W:m32, xmm[31:0]" , "op": "RM: F3 0F 2B /r"} + ]}, + + {"category": "SSE SIMD", "ext": "SSE4A", "data": [ + {"inst": "extrq X:xmm, ib/ub, ib/ub" , "op": "R: 66 0F 78 /0 ib ib"}, + {"inst": "extrq X:xmm, xmm" , "op": "RM: 66 0F 79 /r"}, + {"inst": "insertq X:xmm, xmm" , "op": "RM: F2 0F 79 /r"}, + {"inst": "insertq X:xmm, xmm, ib/ub, ib/ub" , "op": "RM: F2 0F 78 /r ib ib"} + ]}, + + {"category": "SSE SIMD", "ext": "PCLMULQDQ", "data": [ + {"inst": "pclmulqdq X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 44 /r ib"} + ]}, + + {"category": "SSE SIMD CRYPTO_HASH", "ext": "AESNI", "data": [ + {"inst": "aesdec X:xmm, xmm/m128" , "op": "RM: 66 0F 38 DE /r"}, + {"inst": "aesdeclast X:xmm, xmm/m128" , "op": "RM: 66 0F 38 DF /r"}, + {"inst": "aesenc X:xmm, xmm/m128" , "op": "RM: 66 0F 38 DC /r"}, + {"inst": "aesenclast X:xmm, xmm/m128" , "op": "RM: 66 0F 38 DD /r"}, + {"inst": "aesimc W:xmm, xmm/m128" , "op": "RM: 66 0F 38 DB /r"}, + {"inst": "aeskeygenassist W:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A DF /r ib"} + ]}, + + {"category": "SSE SIMD CRYPTO_HASH", "ext": "SHA", "data": [ + {"inst": "sha1msg1 xmm, xmm/m128" , "op": "RM: 0F 38 C9 /r"}, + {"inst": "sha1msg2 xmm, xmm/m128" , "op": "RM: 0F 38 CA /r"}, + {"inst": "sha1nexte xmm, xmm/m128" , "op": "RM: 0F 38 C8 /r"}, + {"inst": "sha1rnds4 xmm, xmm/m128, ib/ub" , "op": "RM: 0F 3A CC /r ib"}, + {"inst": "sha256msg1 xmm, xmm/m128" , "op": "RM: 0F 38 CC /r"}, + {"inst": "sha256msg2 xmm, xmm/m128" , "op": "RM: 0F 38 CD /r"}, + {"inst": "sha256rnds2 xmm, xmm/m128, " , "op": "RM: 0F 38 CB /r"} + ]}, + + {"category": "SSE SIMD", "ext": "GFNI", "data": [ + {"inst": "gf2p8affineinvqb X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A CF /r ib"}, + {"inst": "gf2p8affineqb X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A CE /r ib"}, + {"inst": "gf2p8mulb X:xmm, xmm/m128" , "op": "RM: 66 0F 38 CF /r"} + ]}, + + {"category": "AVX STATE", "ext": "AVX", "data": [ + {"inst": "vldmxcsr R:m32" , "op": "VEX.LZ.0F.WIG AE /2", "io": "MXCSR=W"}, + {"inst": "vstmxcsr W:m32" , "op": "VEX.LZ.0F.WIG AE /3", "io": "MXCSR=R"}, + {"inst": "vzeroall" , "op": "VEX.256.0F.WIG 77", "volatile": true}, + {"inst": "vzeroupper" , "op": "VEX.128.0F.WIG 77", "volatile": true} + ]}, + + {"category": "AVX SCALAR", "ext": "AVX", "data": [ + {"inst": "vaddsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 58 /r"}, + {"inst": "vaddss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 58 /r"}, + {"inst": "vcmpsd W:xmm, xmm, xmm[63:0]/m64, ib/ub" , "op": "RVM: VEX.LIG.F2.0F.WIG C2 /r ib"}, + {"inst": "vcmpss W:xmm, xmm, xmm[31:0]/m32, ib/ub" , "op": "RVM: VEX.LIG.F3.0F.WIG C2 /r ib"}, + {"inst": "vcomisd R:xmm[63:0], xmm[63:0]/m64" , "op": "RM: VEX.LIG.66.0F.WIG 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "vcomiss R:xmm[31:0], xmm[31:0]/m32" , "op": "RM: VEX.LIG.0F.WIG 2F /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "vcvtsd2si W:r32, xmm[63:0]/m64" , "op": "RM: VEX.LIG.F2.0F.W0 2D /r"}, + {"inst": "vcvtsd2si W:r64, xmm[63:0]/m64" , "op": "RM: VEX.LIG.F2.0F.W1 2D /r"}, + {"inst": "vcvtsd2ss W:xmm, xmm[127:32], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5A /r"}, + {"inst": "vcvtsi2sd W:xmm, xmm[127:64], r32/m32" , "op": "RVM: VEX.LIG.F2.0F.W0 2A /r"}, + {"inst": "vcvtsi2sd W:xmm, xmm[127:64], r64/m64" , "op": "RVM: VEX.LIG.F2.0F.W1 2A /r"}, + {"inst": "vcvtsi2ss W:xmm, xmm[127:32], r32/m32" , "op": "RVM: VEX.LIG.F3.0F.W0 2A /r"}, + {"inst": "vcvtsi2ss W:xmm, xmm[127:32], r64/m64" , "op": "RVM: VEX.LIG.F3.0F.W1 2A /r"}, + {"inst": "vcvtss2sd W:xmm, xmm[127:64], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5A /r"}, + {"inst": "vcvtss2si W:r32, xmm[31:0]/m32" , "op": "RM: VEX.LIG.F3.0F.W0 2D /r"}, + {"inst": "vcvtss2si W:r64, xmm[31:0]/m32" , "op": "RM: VEX.LIG.F3.0F.W1 2D /r"}, + {"inst": "vcvttsd2si W:r32, xmm[63:0]/m64" , "op": "RM: VEX.LIG.F2.0F.W0 2C /r"}, + {"inst": "vcvttsd2si W:r64, xmm[63:0]/m64" , "op": "RM: VEX.LIG.F2.0F.W1 2C /r"}, + {"inst": "vcvttss2si W:r32, xmm[31:0]/m32" , "op": "RM: VEX.LIG.F3.0F.W0 2C /r"}, + {"inst": "vcvttss2si W:r64, xmm[31:0]/m32" , "op": "RM: VEX.LIG.F3.0F.W1 2C /r"}, + {"inst": "vdivsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5E /r"}, + {"inst": "vdivss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5E /r"}, + {"inst": "vmaxsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5F /r"}, + {"inst": "vmaxss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5F /r"}, + {"inst": "vminsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5D /r"}, + {"inst": "vminss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5D /r"}, + {"inst": "vmovsd W:m64, xmm[63:0]" , "op": "MR: VEX.LIG.F2.0F.WIG 11 /r"}, + {"inst": "vmovsd W:xmm[63:0], m64" , "op": "RM: VEX.LIG.F2.0F.WIG 10 /r"}, + {"inst": "vmovsd W:xmm, xmm[127:64], xmm[63:0]" , "op": "MVR: VEX.LIG.F2.0F.WIG 11 /r"}, + {"inst": "vmovsd W:xmm, xmm[127:64], xmm[63:0]" , "op": "RVM: VEX.LIG.F2.0F.WIG 10 /r"}, + {"inst": "vmovss W:m32, xmm[31:0]" , "op": "MR: VEX.LIG.F3.0F.WIG 11 /r"}, + {"inst": "vmovss W:xmm[31:0], m32" , "op": "RM: VEX.LIG.F3.0F.WIG 10 /r"}, + {"inst": "vmovss W:xmm, xmm[127:32], xmm[31:0]" , "op": "MVR: VEX.LIG.F3.0F.WIG 11 /r"}, + {"inst": "vmovss W:xmm, xmm[127:32], xmm[31:0]" , "op": "RVM: VEX.LIG.F3.0F.WIG 10 /r"}, + {"inst": "vmulsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 59 /r"}, + {"inst": "vmulss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 59 /r"}, + {"inst": "vrcpss W:xmm, xmm[127:32], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 53 /r"}, + {"inst": "vroundsd W:xmm, xmm[127:64], xmm[63:0]/m64, ib/ub" , "op": "RVM: VEX.LIG.66.0F3A.WIG 0B /r ib"}, + {"inst": "vroundss W:xmm, xmm[127:32], xmm[31:0]/m32, ib/ub" , "op": "RVM: VEX.LIG.66.0F3A.WIG 0A /r ib"}, + {"inst": "vrsqrtss W:xmm, xmm[127:32], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 52 /r"}, + {"inst": "vsqrtsd W:xmm, xmm[127:64], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 51 /r"}, + {"inst": "vsqrtss W:xmm, xmm[127:32], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 51 /r"}, + {"inst": "vsubsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5C /r"}, + {"inst": "vsubss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5C /r"}, + {"inst": "vucomisd R:xmm[63:0], xmm[63:0]/m64" , "op": "RM: VEX.LIG.66.0F.WIG 2E /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "vucomiss R:xmm[31:0], xmm[31:0]/m32" , "op": "RM: VEX.LIG.0F.WIG 2E /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX", "data": [ + {"inst": "vaddpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 58 /r"}, + {"inst": "vaddpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 58 /r"}, + {"inst": "vaddps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 58 /r"}, + {"inst": "vaddps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 58 /r"}, + {"inst": "vaddsubpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D0 /r"}, + {"inst": "vaddsubpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D0 /r"}, + {"inst": "vaddsubps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F.WIG D0 /r"}, + {"inst": "vaddsubps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F.WIG D0 /r"}, + {"inst": "vandnpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 55 /r"}, + {"inst": "vandnpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 55 /r"}, + {"inst": "vandnps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 55 /r"}, + {"inst": "vandnps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 55 /r"}, + {"inst": "vandpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 54 /r"}, + {"inst": "vandpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 54 /r"}, + {"inst": "vandps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 54 /r"}, + {"inst": "vandps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 54 /r"}, + {"inst": "vblendpd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 0D /r ib"}, + {"inst": "vblendpd W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 0D /r ib"}, + {"inst": "vblendps W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 0C /r ib"}, + {"inst": "vblendps W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 0C /r ib"}, + {"inst": "vblendvpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 4B /r /is4"}, + {"inst": "vblendvpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 4B /r /is4"}, + {"inst": "vblendvps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 4A /r /is4"}, + {"inst": "vblendvps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 4A /r /is4"}, + {"inst": "vbroadcastf128 W:ymm, m128" , "op": "RM: VEX.256.66.0F38.W0 1A /r"}, + {"inst": "vbroadcastsd W:ymm, m64" , "op": "RM: VEX.256.66.0F38.W0 19 /r"}, + {"inst": "vbroadcastss W:xmm, m32" , "op": "RM: VEX.128.66.0F38.W0 18 /r"}, + {"inst": "vbroadcastss W:ymm, m32" , "op": "RM: VEX.256.66.0F38.W0 18 /r"}, + {"inst": "vcmppd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F.WIG C2 /r ib"}, + {"inst": "vcmppd W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F.WIG C2 /r ib"}, + {"inst": "vcmpps W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.0F.WIG C2 /r ib"}, + {"inst": "vcmpps W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.0F.WIG C2 /r ib"}, + {"inst": "vcvtdq2pd W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.F3.0F.WIG E6 /r"}, + {"inst": "vcvtdq2pd W:ymm, xmm/m128" , "op": "RM: VEX.256.F3.0F.WIG E6 /r"}, + {"inst": "vcvtdq2ps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 5B /r"}, + {"inst": "vcvtdq2ps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 5B /r"}, + {"inst": "vcvtpd2dq W:xmm[63:0], xmm/m128" , "op": "RM: VEX.128.F2.0F.WIG E6 /r"}, + {"inst": "vcvtpd2dq W:xmm, ymm/m256" , "op": "RM: VEX.256.F2.0F.WIG E6 /r"}, + {"inst": "vcvtpd2ps W:xmm[63:0], xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 5A /r"}, + {"inst": "vcvtpd2ps W:xmm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 5A /r"}, + {"inst": "vcvtps2dq W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 5B /r"}, + {"inst": "vcvtps2dq W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 5B /r"}, + {"inst": "vcvtps2pd W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.0F.WIG 5A /r"}, + {"inst": "vcvtps2pd W:ymm, xmm/m128" , "op": "RM: VEX.256.0F.WIG 5A /r"}, + {"inst": "vcvttpd2dq W:xmm[63:0], xmm/m128" , "op": "RM: VEX.128.66.0F.WIG E6 /r"}, + {"inst": "vcvttpd2dq W:xmm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG E6 /r"}, + {"inst": "vcvttps2dq W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F.WIG 5B /r"}, + {"inst": "vcvttps2dq W:ymm, ymm/m256" , "op": "RM: VEX.256.F3.0F.WIG 5B /r"}, + {"inst": "vdivpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 5E /r"}, + {"inst": "vdivpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 5E /r"}, + {"inst": "vdivps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 5E /r"}, + {"inst": "vdivps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 5E /r"}, + {"inst": "vdppd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 41 /r ib"}, + {"inst": "vdpps W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 40 /r ib"}, + {"inst": "vdpps W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 40 /r ib"}, + {"inst": "vextractps W:r32[31:0]/m32, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.WIG 17 /r ib"}, + {"inst": "vextractf128 W:xmm/m128, ymm, ib/ub" , "op": "MR: VEX.256.66.0F3A.W0 19 /r ib"}, + {"inst": "vhaddpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 7C /r"}, + {"inst": "vhaddpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 7C /r"}, + {"inst": "vhaddps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.F2.0F.WIG 7C /r"}, + {"inst": "vhaddps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.F2.0F.WIG 7C /r"}, + {"inst": "vhsubpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 7D /r"}, + {"inst": "vhsubpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 7D /r"}, + {"inst": "vhsubps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F.WIG 7D /r"}, + {"inst": "vhsubps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F.WIG 7D /r"}, + {"inst": "vinsertf128 W:ymm, ymm, xmm/m128, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 18 /r ib"}, + {"inst": "vinsertps W:xmm, xmm, xmm[31:0]/m32, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 21 /r ib"}, + {"inst": "vlddqu W:xmm, m128" , "op": "RM: VEX.128.F2.0F.WIG F0 /r"}, + {"inst": "vlddqu W:ymm, m256" , "op": "RM: VEX.256.F2.0F.WIG F0 /r"}, + {"inst": "vmaskmovdqu R:xmm, xmm, X:" , "op": "RM: VEX.128.66.0F.WIG F7 /r"}, + {"inst": "vmaskmovpd X:m128, xmm, xmm" , "op": "MVR: VEX.128.66.0F38.W0 2F /r"}, + {"inst": "vmaskmovpd X:m256, ymm, ymm" , "op": "MVR: VEX.256.66.0F38.W0 2F /r"}, + {"inst": "vmaskmovpd W:xmm, xmm, m128" , "op": "RVM: VEX.128.66.0F38.W0 2D /r"}, + {"inst": "vmaskmovpd W:ymm, ymm, m256" , "op": "RVM: VEX.256.66.0F38.W0 2D /r"}, + {"inst": "vmaskmovps X:m128, xmm, xmm" , "op": "MVR: VEX.128.66.0F38.W0 2E /r"}, + {"inst": "vmaskmovps X:m256, ymm, ymm" , "op": "MVR: VEX.256.66.0F38.W0 2E /r"}, + {"inst": "vmaskmovps W:xmm, xmm, m128" , "op": "RVM: VEX.128.66.0F38.W0 2C /r"}, + {"inst": "vmaskmovps W:ymm, ymm, m256" , "op": "RVM: VEX.256.66.0F38.W0 2C /r"}, + {"inst": "vmaxpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 5F /r"}, + {"inst": "vmaxpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 5F /r"}, + {"inst": "vmaxps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 5F /r"}, + {"inst": "vmaxps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 5F /r"}, + {"inst": "vminpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 5D /r"}, + {"inst": "vminpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 5D /r"}, + {"inst": "vminps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 5D /r"}, + {"inst": "vminps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 5D /r"}, + {"inst": "vmovapd W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 28 /r"}, + {"inst": "vmovapd W:xmm/m128, xmm" , "op": "MR: VEX.128.66.0F.WIG 29 /r"}, + {"inst": "vmovapd W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 28 /r"}, + {"inst": "vmovapd W:ymm/m256, ymm" , "op": "MR: VEX.256.66.0F.WIG 29 /r"}, + {"inst": "vmovaps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 28 /r"}, + {"inst": "vmovaps W:xmm/m128, xmm" , "op": "MR: VEX.128.0F.WIG 29 /r"}, + {"inst": "vmovaps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 28 /r"}, + {"inst": "vmovaps W:ymm/m256, ymm" , "op": "MR: VEX.256.0F.WIG 29 /r"}, + {"inst": "vmovd W:r32[31:0]/m32, xmm[31:0]" , "op": "MR: VEX.128.66.0F.W0 7E /r"}, + {"inst": "vmovd W:xmm[31:0], r32[31:0]/m32" , "op": "RM: VEX.128.66.0F.W0 6E /r"}, + {"inst": "vmovddup W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.F2.0F.WIG 12 /r"}, + {"inst": "vmovddup W:ymm, ymm/m256" , "op": "RM: VEX.256.F2.0F.WIG 12 /r"}, + {"inst": "vmovdqa W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 6F /r"}, + {"inst": "vmovdqa W:xmm/m128, xmm" , "op": "MR: VEX.128.66.0F.WIG 7F /r"}, + {"inst": "vmovdqa W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 6F /r"}, + {"inst": "vmovdqa W:ymm/m256, ymm" , "op": "MR: VEX.256.66.0F.WIG 7F /r"}, + {"inst": "vmovdqu W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F.WIG 6F /r"}, + {"inst": "vmovdqu W:xmm/m128, xmm" , "op": "MR: VEX.128.F3.0F.WIG 7F /r"}, + {"inst": "vmovdqu W:ymm, ymm/m256" , "op": "RM: VEX.256.F3.0F.WIG 6F /r"}, + {"inst": "vmovdqu W:ymm/m256, ymm" , "op": "MR: VEX.256.F3.0F.WIG 7F /r"}, + {"inst": "vmovhlps W:xmm, xmm[127:64], xmm[127:64]" , "op": "RVM: VEX.128.0F.WIG 12 /r"}, + {"inst": "vmovhpd W:m64, xmm[127:64]" , "op": "MR: VEX.128.66.0F.WIG 17 /r"}, + {"inst": "vmovhpd W:xmm, xmm[63:0], m64" , "op": "RVM: VEX.128.66.0F.WIG 16 /r"}, + {"inst": "vmovhps W:m64, xmm[127:64]" , "op": "MR: VEX.128.0F.WIG 17 /r"}, + {"inst": "vmovhps W:xmm, xmm[63:0], m64" , "op": "RVM: VEX.128.0F.WIG 16 /r"}, + {"inst": "vmovlhps W:xmm, xmm[63:0], xmm[63:0]" , "op": "RVM: VEX.128.0F.WIG 16 /r"}, + {"inst": "vmovlpd W:m64, xmm[63:0]" , "op": "MR: VEX.128.66.0F.WIG 13 /r"}, + {"inst": "vmovlpd W:xmm, xmm[127:64], m64" , "op": "RVM: VEX.128.66.0F.WIG 12 /r"}, + {"inst": "vmovlps W:m64, xmm[63:0]" , "op": "MR: VEX.128.0F.WIG 13 /r"}, + {"inst": "vmovlps W:xmm, xmm[127:64], m64" , "op": "RVM: VEX.128.0F.WIG 12 /r"}, + {"inst": "vmovmskpd W:r32[1:0], xmm" , "op": "RM: VEX.128.66.0F.WIG 50 /r"}, + {"inst": "vmovmskpd W:r32[3:0], ymm" , "op": "RM: VEX.256.66.0F.WIG 50 /r"}, + {"inst": "vmovmskps W:r32[3:0], xmm" , "op": "RM: VEX.128.0F.WIG 50 /r"}, + {"inst": "vmovmskps W:r32[7:0], ymm" , "op": "RM: VEX.256.0F.WIG 50 /r"}, + {"inst": "vmovntdq W:m128, xmm" , "op": "MR: VEX.128.66.0F.WIG E7 /r"}, + {"inst": "vmovntdq W:m256, ymm" , "op": "MR: VEX.256.66.0F.WIG E7 /r"}, + {"inst": "vmovntdqa W:xmm, m128" , "op": "RM: VEX.128.66.0F38.WIG 2A /r"}, + {"inst": "vmovntpd W:m128, xmm" , "op": "MR: VEX.128.66.0F.WIG 2B /r"}, + {"inst": "vmovntpd W:m256, ymm" , "op": "MR: VEX.256.66.0F.WIG 2B /r"}, + {"inst": "vmovntps W:m128, xmm" , "op": "MR: VEX.128.0F.WIG 2B /r"}, + {"inst": "vmovntps W:m256, ymm" , "op": "MR: VEX.256.0F.WIG 2B /r"}, + {"inst": "vmovq W:r64/m64, xmm[63:0]" , "op": "MR: VEX.128.66.0F.W1 7E /r"}, + {"inst": "vmovq W:xmm[63:0], xmm[63:0]/m64" , "op": "RM: VEX.128.F3.0F.WIG 7E /r"}, + {"inst": "vmovq W:xmm[63:0], r64/m64" , "op": "RM: VEX.128.66.0F.W1 6E /r"}, + {"inst": "vmovq W:xmm[63:0]/m64, xmm[63:0]" , "op": "MR: VEX.128.66.0F.WIG D6 /r"}, + {"inst": "vmovshdup W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F.WIG 16 /r"}, + {"inst": "vmovshdup W:ymm, ymm/m256" , "op": "RM: VEX.256.F3.0F.WIG 16 /r"}, + {"inst": "vmovsldup W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F.WIG 12 /r"}, + {"inst": "vmovsldup W:ymm, ymm/m256" , "op": "RM: VEX.256.F3.0F.WIG 12 /r"}, + {"inst": "vmovupd W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 10 /r"}, + {"inst": "vmovupd W:xmm/m128, xmm" , "op": "MR: VEX.128.0F.WIG 11 /r"}, + {"inst": "vmovupd W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 10 /r"}, + {"inst": "vmovupd W:ymm/m256, ymm" , "op": "MR: VEX.256.0F.WIG 11 /r"}, + {"inst": "vmovups W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 10 /r"}, + {"inst": "vmovups W:xmm/m128, xmm" , "op": "MR: VEX.128.66.0F.WIG 11 /r"}, + {"inst": "vmovups W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 10 /r"}, + {"inst": "vmovups W:ymm/m256, ymm" , "op": "MR: VEX.256.66.0F.WIG 11 /r"}, + {"inst": "vmpsadbw W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 42 /r ib"}, + {"inst": "vmulpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 59 /r"}, + {"inst": "vmulpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 59 /r"}, + {"inst": "vmulps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 59 /r"}, + {"inst": "vmulps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 59 /r"}, + {"inst": "vorpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 56 /r"}, + {"inst": "vorpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 56 /r"}, + {"inst": "vorps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 56 /r"}, + {"inst": "vorps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 56 /r"}, + {"inst": "vpabsb W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 1C /r"}, + {"inst": "vpabsd W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 1E /r"}, + {"inst": "vpabsw W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 1D /r"}, + {"inst": "vpackssdw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 6B /r"}, + {"inst": "vpacksswb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 63 /r"}, + {"inst": "vpackusdw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 2B /r"}, + {"inst": "vpackuswb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 67 /r"}, + {"inst": "vpaddb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FC /r"}, + {"inst": "vpaddd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FE /r"}, + {"inst": "vpaddq W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D4 /r"}, + {"inst": "vpaddsb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EC /r"}, + {"inst": "vpaddsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG ED /r"}, + {"inst": "vpaddusb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DC /r"}, + {"inst": "vpaddusw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DD /r"}, + {"inst": "vpaddw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FD /r"}, + {"inst": "vpalignr W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 0F /r ib"}, + {"inst": "vpand W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DB /r"}, + {"inst": "vpandn W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DF /r"}, + {"inst": "vpavgb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E0 /r"}, + {"inst": "vpavgw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E3 /r"}, + {"inst": "vpblendvb W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 4C /r /is4"}, + {"inst": "vpblendw W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 0E /r ib"}, + {"inst": "vpcmpeqb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 74 /r"}, + {"inst": "vpcmpeqd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 76 /r"}, + {"inst": "vpcmpeqq W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 29 /r"}, + {"inst": "vpcmpeqw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 75 /r"}, + {"inst": "vpcmpestri R:xmm, xmm/m128, ib/ub, W:,," , "op": "RM: VEX.128.66.0F3A.WIG 61 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vpcmpestrm R:xmm, xmm/m128, ib/ub, W:,," , "op": "RM: VEX.128.66.0F3A.WIG 60 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vpcmpgtb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 64 /r"}, + {"inst": "vpcmpgtd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 66 /r"}, + {"inst": "vpcmpgtq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 37 /r"}, + {"inst": "vpcmpgtw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 65 /r"}, + {"inst": "vpcmpistri R:xmm, xmm/m128, ib/ub, W:" , "op": "RM: VEX.128.66.0F3A.WIG 63 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vpcmpistrm R:xmm, xmm/m128, ib/ub, W:" , "op": "RM: VEX.128.66.0F3A.WIG 62 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vperm2f128 W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 06 /r ib"}, + {"inst": "vpermilpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 0D /r"}, + {"inst": "vpermilpd W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F3A.W0 05 /r ib"}, + {"inst": "vpermilpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 0D /r"}, + {"inst": "vpermilpd W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.W0 05 /r ib"}, + {"inst": "vpermilps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 0C /r"}, + {"inst": "vpermilps W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F3A.W0 04 /r ib"}, + {"inst": "vpermilps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 0C /r"}, + {"inst": "vpermilps W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.W0 04 /r ib"}, + {"inst": "vpextrb W:r32[7:0]/m8, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W0 14 /r ib"}, + {"inst": "vpextrd W:r32/m32, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W0 16 /r ib"}, + {"inst": "vpextrq W:r64/m64, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W1 16 /r ib"}, + {"inst": "vpextrw W:r32[15:0], xmm, ib/ub" , "op": "RM: VEX.128.66.0F.W0 C5 /r ib"}, + {"inst": "vpextrw W:r32[15:0]/m16, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W0 15 /r ib"}, + {"inst": "vphaddd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 02 /r"}, + {"inst": "vphaddsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 03 /r"}, + {"inst": "vphaddw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 01 /r"}, + {"inst": "vphminposuw W:xmm[18:0], xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 41 /r"}, + {"inst": "vphsubd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 06 /r"}, + {"inst": "vphsubsw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 07 /r"}, + {"inst": "vphsubw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 05 /r"}, + {"inst": "vpinsrb W:xmm, xmm, r32[7:0]/m8, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W0 20 /r ib"}, + {"inst": "vpinsrd W:xmm, xmm, r32/m32, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W0 22 /r ib"}, + {"inst": "vpinsrq W:xmm, xmm, r64/m64, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W1 22 /r ib"}, + {"inst": "vpinsrw W:xmm, xmm, r32[15:0]/m16, ib/ub" , "op": "RVM: VEX.128.66.0F.W0 C4 /r ib"}, + {"inst": "vpmaddubsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 04 /r"}, + {"inst": "vpmaddwd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F5 /r"}, + {"inst": "vpmaxsb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3C /r"}, + {"inst": "vpmaxsd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3D /r"}, + {"inst": "vpmaxsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EE /r"}, + {"inst": "vpmaxub W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DE /r"}, + {"inst": "vpmaxud W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3F /r"}, + {"inst": "vpmaxuw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3E /r"}, + {"inst": "vpminsb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 38 /r"}, + {"inst": "vpminsd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 39 /r"}, + {"inst": "vpminsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EA /r"}, + {"inst": "vpminub W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DA /r"}, + {"inst": "vpminud W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3B /r"}, + {"inst": "vpminuw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3A /r"}, + {"inst": "vpmovmskb W:r32[15:0], xmm" , "op": "RVM: VEX.128.66.0F.WIG D7 /r"}, + {"inst": "vpmovsxwq W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.WIG 24 /r"}, + {"inst": "vpmovsxbd W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.WIG 21 /r"}, + {"inst": "vpmovsxbq W:xmm, xmm[15:0]/m16" , "op": "RM: VEX.128.66.0F38.WIG 22 /r"}, + {"inst": "vpmovsxbw W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 20 /r"}, + {"inst": "vpmovsxdq W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 25 /r"}, + {"inst": "vpmovsxwd W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 23 /r"}, + {"inst": "vpmovzxbd W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.WIG 31 /r"}, + {"inst": "vpmovzxbq W:xmm, xmm[15:0]/m16" , "op": "RM: VEX.128.66.0F38.WIG 32 /r"}, + {"inst": "vpmovzxbw W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 30 /r"}, + {"inst": "vpmovzxdq W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 35 /r"}, + {"inst": "vpmovzxwd W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 33 /r"}, + {"inst": "vpmovzxwq W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.WIG 34 /r"}, + {"inst": "vpmuldq W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 28 /r"}, + {"inst": "vpmulhrsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 0B /r"}, + {"inst": "vpmulhuw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E4 /r"}, + {"inst": "vpmulhw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E5 /r"}, + {"inst": "vpmulld W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 40 /r"}, + {"inst": "vpmullw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D5 /r"}, + {"inst": "vpmuludq W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F4 /r"}, + {"inst": "vpor W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EB /r"}, + {"inst": "vpsadbw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F6 /r"}, + {"inst": "vpshufb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 00 /r"}, + {"inst": "vpshufd W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F.WIG 70 /r ib"}, + {"inst": "vpshufhw W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.F3.0F.WIG 70 /r ib"}, + {"inst": "vpshuflw W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.F2.0F.WIG 70 /r ib"}, + {"inst": "vpsignb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 08 /r"}, + {"inst": "vpsignd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 0A /r"}, + {"inst": "vpsignw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 09 /r"}, + {"inst": "vpslld W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 72 /6 ib"}, + {"inst": "vpslld W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F2 /r"}, + {"inst": "vpslldq W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 73 /7 ib"}, + {"inst": "vpsllq W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 73 /6 ib"}, + {"inst": "vpsllq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F3 /r"}, + {"inst": "vpsllw W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 71 /6 ib"}, + {"inst": "vpsllw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F1 /r"}, + {"inst": "vpsrad W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 72 /4 ib"}, + {"inst": "vpsrad W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E2 /r"}, + {"inst": "vpsraw W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 71 /4 ib"}, + {"inst": "vpsraw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E1 /r"}, + {"inst": "vpsrld W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 72 /2 ib"}, + {"inst": "vpsrld W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D2 /r"}, + {"inst": "vpsrldq W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 73 /3 ib"}, + {"inst": "vpsrlq W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 73 /2 ib"}, + {"inst": "vpsrlq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D3 /r"}, + {"inst": "vpsrlw W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 71 /2 ib"}, + {"inst": "vpsrlw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D1 /r"}, + {"inst": "vpsubb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F8 /r"}, + {"inst": "vpsubd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FA /r"}, + {"inst": "vpsubq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FB /r"}, + {"inst": "vpsubsb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E8 /r"}, + {"inst": "vpsubsw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E9 /r"}, + {"inst": "vpsubusb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D8 /r"}, + {"inst": "vpsubusw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D9 /r"}, + {"inst": "vpsubw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F9 /r"}, + {"inst": "vptest R:~xmm, ~xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 17 /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vptest R:~ymm, ~ymm/m256" , "op": "RM: VEX.256.66.0F38.WIG 17 /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vpunpckhbw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 68 /r"}, + {"inst": "vpunpckhdq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 6A /r"}, + {"inst": "vpunpckhqdq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 6D /r"}, + {"inst": "vpunpckhwd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 69 /r"}, + {"inst": "vpunpcklbw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 60 /r"}, + {"inst": "vpunpckldq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 62 /r"}, + {"inst": "vpunpcklqdq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 6C /r"}, + {"inst": "vpunpcklwd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 61 /r"}, + {"inst": "vpxor W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EF /r"}, + {"inst": "vrcpps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 53 /r"}, + {"inst": "vrcpps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 53 /r"}, + {"inst": "vroundpd W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F3A.WIG 09 /r ib"}, + {"inst": "vroundpd W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.WIG 09 /r ib"}, + {"inst": "vroundps W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F3A.WIG 08 /r ib"}, + {"inst": "vroundps W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.WIG 08 /r ib"}, + {"inst": "vrsqrtps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 52 /r"}, + {"inst": "vrsqrtps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 52 /r"}, + {"inst": "vshufpd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F.WIG C6 /r ib"}, + {"inst": "vshufpd W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F.WIG C6 /r ib"}, + {"inst": "vshufps W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.0F.WIG C6 /r ib"}, + {"inst": "vshufps W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.0F.WIG C6 /r ib"}, + {"inst": "vsqrtpd W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 51 /r"}, + {"inst": "vsqrtpd W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 51 /r"}, + {"inst": "vsqrtps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 51 /r"}, + {"inst": "vsqrtps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 51 /r"}, + {"inst": "vsubpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 5C /r"}, + {"inst": "vsubpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 5C /r"}, + {"inst": "vsubps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 5C /r"}, + {"inst": "vsubps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 5C /r"}, + {"inst": "vtestpd R:~xmm, ~xmm/m128" , "op": "RM: VEX.128.66.0F38.W0 0F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vtestpd R:~ymm, ~ymm/m256" , "op": "RM: VEX.256.66.0F38.W0 0F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vtestps R:~xmm, ~xmm/m128" , "op": "RM: VEX.128.66.0F38.W0 0E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vtestps R:~ymm, ~ymm/m256" , "op": "RM: VEX.256.66.0F38.W0 0E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "vunpckhpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 15 /r"}, + {"inst": "vunpckhpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 15 /r"}, + {"inst": "vunpckhps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 15 /r"}, + {"inst": "vunpckhps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 15 /r"}, + {"inst": "vunpcklpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 14 /r"}, + {"inst": "vunpcklpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 14 /r"}, + {"inst": "vunpcklps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 14 /r"}, + {"inst": "vunpcklps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 14 /r"}, + {"inst": "vxorpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 57 /r"}, + {"inst": "vxorpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 57 /r"}, + {"inst": "vxorps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 57 /r"}, + {"inst": "vxorps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 57 /r"} + ]}, + + {"category": "AVX SIMD CRYPTO_HASH", "ext": "AVX AESNI", "data": [ + {"inst": "vaesdec W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DE /r"}, + {"inst": "vaesdeclast W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DF /r"}, + {"inst": "vaesenc W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DC /r"}, + {"inst": "vaesenclast W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DD /r"}, + {"inst": "vaesimc W:xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DB /r"}, + {"inst": "vaeskeygenassist W:xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG DF /r ib"} + ]}, + + {"category": "AVX SIMD CRYPTO_HASH", "ext": "VAES", "data": [ + {"inst": "vaesdec W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG DE /r"}, + {"inst": "vaesdeclast W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG DF /r"}, + {"inst": "vaesenc W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG DC /r"}, + {"inst": "vaesenclast W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG DD /r"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX GFNI", "data": [ + {"inst": "vgf2p8affineinvqb W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W1 CF /r ib"}, + {"inst": "vgf2p8affineinvqb W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W1 CF /r ib"}, + {"inst": "vgf2p8affineqb W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W1 CE /r ib"}, + {"inst": "vgf2p8affineqb W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W1 CE /r ib"}, + {"inst": "vgf2p8mulb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 CF /r"}, + {"inst": "vgf2p8mulb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 CF /r"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX PCLMULQDQ", "data": [ + {"inst": "vpclmulqdq W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 44 /r ib"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX2", "data": [ + {"inst": "vbroadcasti128 W:ymm, m128" , "op": "RM: VEX.256.66.0F38.W0 5A /r"}, + {"inst": "vbroadcastsd W:ymm, xmm[63:0]" , "op": "RM: VEX.256.66.0F38.W0 19 /r"}, + {"inst": "vbroadcastss W:xmm, xmm[31:0]" , "op": "RM: VEX.128.66.0F38.W0 18 /r"}, + {"inst": "vbroadcastss W:ymm, xmm[31:0]" , "op": "RM: VEX.256.66.0F38.W0 18 /r"}, + {"inst": "vextracti128 W:xmm/m128, ymm, ib/ub" , "op": "MR: VEX.256.66.0F3A.W0 39 /r ib"}, + {"inst": "vgatherdpd X:xmm, vm32x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W1 92 /r"}, + {"inst": "vgatherdpd X:ymm, vm32x, X:ymm" , "op": "RMV: VEX.256.66.0F38.W1 92 /r"}, + {"inst": "vgatherdps X:xmm, vm32x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W0 92 /r"}, + {"inst": "vgatherdps X:ymm, vm32y, X:ymm" , "op": "RMV: VEX.256.66.0F38.W0 92 /r"}, + {"inst": "vgatherqpd X:xmm, vm64x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W1 93 /r"}, + {"inst": "vgatherqpd X:ymm, vm64y, X:ymm" , "op": "RMV: VEX.256.66.0F38.W1 93 /r"}, + {"inst": "vgatherqps X:xmm, vm64x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W0 93 /r"}, + {"inst": "vgatherqps X:xmm, vm64y, X:xmm" , "op": "RMV: VEX.256.66.0F38.W0 93 /r"}, + {"inst": "vinserti128 W:ymm, ymm, xmm/m128, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 38 /r ib"}, + {"inst": "vmovntdqa W:ymm, m256" , "op": "RM: VEX.256.66.0F38.WIG 2A /r"}, + {"inst": "vmpsadbw W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 42 /r ib"}, + {"inst": "vpabsb W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F38.WIG 1C /r"}, + {"inst": "vpabsd W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F38.WIG 1E /r"}, + {"inst": "vpabsw W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F38.WIG 1D /r"}, + {"inst": "vpackssdw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 6B /r"}, + {"inst": "vpacksswb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 63 /r"}, + {"inst": "vpackusdw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 2B /r"}, + {"inst": "vpackuswb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 67 /r"}, + {"inst": "vpaddb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FC /r"}, + {"inst": "vpaddd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FE /r"}, + {"inst": "vpaddq W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D4 /r"}, + {"inst": "vpaddsb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EC /r"}, + {"inst": "vpaddsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG ED /r"}, + {"inst": "vpaddusb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DC /r"}, + {"inst": "vpaddusw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DD /r"}, + {"inst": "vpaddw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FD /r"}, + {"inst": "vpalignr W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 0F /r ib"}, + {"inst": "vpand W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DB /r"}, + {"inst": "vpandn W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DF /r"}, + {"inst": "vpavgb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E0 /r"}, + {"inst": "vpavgw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E3 /r"}, + {"inst": "vpblendd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W0 02 /r ib"}, + {"inst": "vpblendd W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 02 /r ib"}, + {"inst": "vpblendvb W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 4C /r /is4"}, + {"inst": "vpblendw W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 0E /r ib"}, + {"inst": "vpbroadcastb W:xmm, xmm[7:0]/m8" , "op": "RM: VEX.128.66.0F38.W0 78 /r"}, + {"inst": "vpbroadcastb W:ymm, xmm[7:0]/m8" , "op": "RM: VEX.256.66.0F38.W0 78 /r"}, + {"inst": "vpbroadcastd W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.W0 58 /r"}, + {"inst": "vpbroadcastd W:ymm, xmm[31:0]/m32" , "op": "RM: VEX.256.66.0F38.W0 58 /r"}, + {"inst": "vpbroadcastq W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.W0 59 /r"}, + {"inst": "vpbroadcastq W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.W0 59 /r"}, + {"inst": "vpbroadcastw W:xmm, xmm[15:0]/m16" , "op": "RM: VEX.128.66.0F38.W0 79 /r"}, + {"inst": "vpbroadcastw W:ymm, xmm[15:0]/m16" , "op": "RM: VEX.256.66.0F38.W0 79 /r"}, + {"inst": "vpcmpeqb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 74 /r"}, + {"inst": "vpcmpeqd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 76 /r"}, + {"inst": "vpcmpeqq W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 29 /r"}, + {"inst": "vpcmpeqw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 75 /r"}, + {"inst": "vpcmpgtb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 64 /r"}, + {"inst": "vpcmpgtd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 66 /r"}, + {"inst": "vpcmpgtq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 37 /r"}, + {"inst": "vpcmpgtw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 65 /r"}, + {"inst": "vperm2i128 W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 46 /r ib"}, + {"inst": "vpermd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 36 /r"}, + {"inst": "vpermpd W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.W1 01 /r ib"}, + {"inst": "vpermps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 16 /r"}, + {"inst": "vpermq W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.W1 00 /r ib"}, + {"inst": "vpgatherdd X:xmm, vm32x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W0 90 /r"}, + {"inst": "vpgatherdd X:ymm, vm32y, X:ymm" , "op": "RMV: VEX.256.66.0F38.W0 90 /r"}, + {"inst": "vpgatherdq X:xmm, vm32x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W1 90 /r"}, + {"inst": "vpgatherdq X:ymm, vm32x, X:ymm" , "op": "RMV: VEX.256.66.0F38.W1 90 /r"}, + {"inst": "vpgatherqd X:xmm, vm64x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W0 91 /r"}, + {"inst": "vpgatherqd X:xmm, vm64y, X:xmm" , "op": "RMV: VEX.256.66.0F38.W0 91 /r"}, + {"inst": "vpgatherqq X:xmm, vm64x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W1 91 /r"}, + {"inst": "vpgatherqq X:ymm, vm64y, X:ymm" , "op": "RMV: VEX.256.66.0F38.W1 91 /r"}, + {"inst": "vphaddd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 02 /r"}, + {"inst": "vphaddsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 03 /r"}, + {"inst": "vphaddw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 01 /r"}, + {"inst": "vphsubd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 06 /r"}, + {"inst": "vphsubsw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 07 /r"}, + {"inst": "vphsubw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 05 /r"}, + {"inst": "vpmaddubsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 04 /r"}, + {"inst": "vpmaddwd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F5 /r"}, + {"inst": "vpmaskmovd X:m128, xmm, xmm" , "op": "MVR: VEX.128.66.0F38.W0 8E /r"}, + {"inst": "vpmaskmovd X:m256, ymm, ymm" , "op": "MVR: VEX.256.66.0F38.W0 8E /r"}, + {"inst": "vpmaskmovd W:xmm, xmm, m128" , "op": "RVM: VEX.128.66.0F38.W0 8C /r"}, + {"inst": "vpmaskmovd W:ymm, ymm, m256" , "op": "RVM: VEX.256.66.0F38.W0 8C /r"}, + {"inst": "vpmaskmovq X:m128, xmm, xmm" , "op": "MVR: VEX.128.66.0F38.W1 8E /r"}, + {"inst": "vpmaskmovq X:m256, ymm, ymm" , "op": "MVR: VEX.256.66.0F38.W1 8E /r"}, + {"inst": "vpmaskmovq W:xmm, xmm, m128" , "op": "RVM: VEX.128.66.0F38.W1 8C /r"}, + {"inst": "vpmaskmovq W:ymm, ymm, m256" , "op": "RVM: VEX.256.66.0F38.W1 8C /r"}, + {"inst": "vpmaxsb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3C /r"}, + {"inst": "vpmaxsd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3D /r"}, + {"inst": "vpmaxsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EE /r"}, + {"inst": "vpmaxub W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DE /r"}, + {"inst": "vpmaxud W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3F /r"}, + {"inst": "vpmaxuw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3E /r"}, + {"inst": "vpminsb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 38 /r"}, + {"inst": "vpminsd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 39 /r"}, + {"inst": "vpminsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EA /r"}, + {"inst": "vpminub W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DA /r"}, + {"inst": "vpminud W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3B /r"}, + {"inst": "vpminuw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3A /r"}, + {"inst": "vpmovmskb W:r32[31:0], ymm" , "op": "RVM: VEX.256.66.0F.WIG D7 /r"}, + {"inst": "vpmovsxbd W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.WIG 21 /r"}, + {"inst": "vpmovsxbq W:ymm, xmm[31:0]/m32" , "op": "RM: VEX.256.66.0F38.WIG 22 /r"}, + {"inst": "vpmovsxbw W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 20 /r"}, + {"inst": "vpmovsxdq W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 25 /r"}, + {"inst": "vpmovsxwd W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 23 /r"}, + {"inst": "vpmovsxwq W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.WIG 24 /r"}, + {"inst": "vpmovzxbd W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.WIG 31 /r"}, + {"inst": "vpmovzxbq W:ymm, xmm[31:0]/m32" , "op": "RM: VEX.256.66.0F38.WIG 32 /r"}, + {"inst": "vpmovzxbw W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 30 /r"}, + {"inst": "vpmovzxdq W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 35 /r"}, + {"inst": "vpmovzxwd W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 33 /r"}, + {"inst": "vpmovzxwq W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.WIG 34 /r"}, + {"inst": "vpmuldq W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 28 /r"}, + {"inst": "vpmulhrsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 0B /r"}, + {"inst": "vpmulhuw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E4 /r"}, + {"inst": "vpmulhw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E5 /r"}, + {"inst": "vpmulld W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 40 /r"}, + {"inst": "vpmullw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D5 /r"}, + {"inst": "vpmuludq W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F4 /r"}, + {"inst": "vpor W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EB /r"}, + {"inst": "vpsadbw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F6 /r"}, + {"inst": "vpshufb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 00 /r"}, + {"inst": "vpshufd W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F.WIG 70 /r ib"}, + {"inst": "vpshufhw W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.F3.0F.WIG 70 /r ib"}, + {"inst": "vpshuflw W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.F2.0F.WIG 70 /r ib"}, + {"inst": "vpsignb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 08 /r"}, + {"inst": "vpsignd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 0A /r"}, + {"inst": "vpsignw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 09 /r"}, + {"inst": "vpslld W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 72 /6 ib"}, + {"inst": "vpslld W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG F2 /r"}, + {"inst": "vpslldq W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 73 /7 ib"}, + {"inst": "vpsllq W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 73 /6 ib"}, + {"inst": "vpsllq W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG F3 /r"}, + {"inst": "vpsllvd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 47 /r"}, + {"inst": "vpsllvd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 47 /r"}, + {"inst": "vpsllvq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 47 /r"}, + {"inst": "vpsllvq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 47 /r"}, + {"inst": "vpsllw W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 71 /6 ib"}, + {"inst": "vpsllw W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG F1 /r"}, + {"inst": "vpsrad W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 72 /4 ib"}, + {"inst": "vpsrad W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG E2 /r"}, + {"inst": "vpsravd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 46 /r"}, + {"inst": "vpsravd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 46 /r"}, + {"inst": "vpsraw W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 71 /4 ib"}, + {"inst": "vpsraw W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG E1 /r"}, + {"inst": "vpsrld W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 72 /2 ib"}, + {"inst": "vpsrld W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG D2 /r"}, + {"inst": "vpsrldq W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 73 /3 ib"}, + {"inst": "vpsrlq W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 73 /2 ib"}, + {"inst": "vpsrlq W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG D3 /r"}, + {"inst": "vpsrlvd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 45 /r"}, + {"inst": "vpsrlvd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 45 /r"}, + {"inst": "vpsrlvq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 45 /r"}, + {"inst": "vpsrlvq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 45 /r"}, + {"inst": "vpsrlw W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 71 /2 ib"}, + {"inst": "vpsrlw W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG D1 /r"}, + {"inst": "vpsubb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F8 /r"}, + {"inst": "vpsubd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FA /r"}, + {"inst": "vpsubq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FB /r"}, + {"inst": "vpsubsb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E8 /r"}, + {"inst": "vpsubsw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E9 /r"}, + {"inst": "vpsubusb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D8 /r"}, + {"inst": "vpsubusw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D9 /r"}, + {"inst": "vpsubw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F9 /r"}, + {"inst": "vpunpckhbw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 68 /r"}, + {"inst": "vpunpckhdq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 6A /r"}, + {"inst": "vpunpckhqdq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 6D /r"}, + {"inst": "vpunpckhwd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 69 /r"}, + {"inst": "vpunpcklbw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 60 /r"}, + {"inst": "vpunpckldq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 62 /r"}, + {"inst": "vpunpcklqdq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 6C /r"}, + {"inst": "vpunpcklwd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 61 /r"}, + {"inst": "vpxor W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EF /r"} + ]}, + + {"category": "AVX SIMD", "ext": "F16C", "data": [ + {"inst": "vcvtph2ps W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.W0 13 /r"}, + {"inst": "vcvtph2ps W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.W0 13 /r"}, + {"inst": "vcvtps2ph W:xmm[63:0]/m64, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W0 1D /r ib"}, + {"inst": "vcvtps2ph W:xmm/m128, ymm, ib/ub" , "op": "MR: VEX.256.66.0F3A.W0 1D /r ib"} + ]}, + + {"category": "AVX SCALAR", "ext": "FMA", "data": [ + {"inst": "vfmadd132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 99 /r"}, + {"inst": "vfmadd132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 99 /r"}, + {"inst": "vfmadd213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 A9 /r"}, + {"inst": "vfmadd213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 A9 /r"}, + {"inst": "vfmadd231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 B9 /r"}, + {"inst": "vfmadd231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 B9 /r"}, + {"inst": "vfmsub132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 9B /r"}, + {"inst": "vfmsub132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 9B /r"}, + {"inst": "vfmsub213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 AB /r"}, + {"inst": "vfmsub213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 AB /r"}, + {"inst": "vfmsub231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 BB /r"}, + {"inst": "vfmsub231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 BB /r"}, + {"inst": "vfnmadd132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 9D /r"}, + {"inst": "vfnmadd132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 9D /r"}, + {"inst": "vfnmadd213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 AD /r"}, + {"inst": "vfnmadd213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 AD /r"}, + {"inst": "vfnmadd231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 BD /r"}, + {"inst": "vfnmadd231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 BD /r"}, + {"inst": "vfnmsub132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 9F /r"}, + {"inst": "vfnmsub132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 9F /r"}, + {"inst": "vfnmsub213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 AF /r"}, + {"inst": "vfnmsub213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 AF /r"}, + {"inst": "vfnmsub231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 BF /r"}, + {"inst": "vfnmsub231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 BF /r"} + ]}, + + {"category": "AVX SIMD", "ext": "FMA", "data": [ + {"inst": "vfmadd132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 98 /r"}, + {"inst": "vfmadd132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 98 /r"}, + {"inst": "vfmadd132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 98 /r"}, + {"inst": "vfmadd132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 98 /r"}, + {"inst": "vfmadd213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 A8 /r"}, + {"inst": "vfmadd213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 A8 /r"}, + {"inst": "vfmadd213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 A8 /r"}, + {"inst": "vfmadd213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 A8 /r"}, + {"inst": "vfmadd231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B8 /r"}, + {"inst": "vfmadd231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B8 /r"}, + {"inst": "vfmadd231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 B8 /r"}, + {"inst": "vfmadd231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 B8 /r"}, + {"inst": "vfmaddsub132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 96 /r"}, + {"inst": "vfmaddsub132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 96 /r"}, + {"inst": "vfmaddsub132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 96 /r"}, + {"inst": "vfmaddsub132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 96 /r"}, + {"inst": "vfmaddsub213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 A6 /r"}, + {"inst": "vfmaddsub213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 A6 /r"}, + {"inst": "vfmaddsub213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 A6 /r"}, + {"inst": "vfmaddsub213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 A6 /r"}, + {"inst": "vfmaddsub231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B6 /r"}, + {"inst": "vfmaddsub231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B6 /r"}, + {"inst": "vfmaddsub231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 B6 /r"}, + {"inst": "vfmaddsub231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 B6 /r"}, + {"inst": "vfmsub132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 9A /r"}, + {"inst": "vfmsub132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 9A /r"}, + {"inst": "vfmsub132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 9A /r"}, + {"inst": "vfmsub132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 9A /r"}, + {"inst": "vfmsub213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 AA /r"}, + {"inst": "vfmsub213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 AA /r"}, + {"inst": "vfmsub213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 AA /r"}, + {"inst": "vfmsub213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 AA /r"}, + {"inst": "vfmsub231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 BA /r"}, + {"inst": "vfmsub231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 BA /r"}, + {"inst": "vfmsub231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 BA /r"}, + {"inst": "vfmsub231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 BA /r"}, + {"inst": "vfmsubadd132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 97 /r"}, + {"inst": "vfmsubadd132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 97 /r"}, + {"inst": "vfmsubadd132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 97 /r"}, + {"inst": "vfmsubadd132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 97 /r"}, + {"inst": "vfmsubadd213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 A7 /r"}, + {"inst": "vfmsubadd213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 A7 /r"}, + {"inst": "vfmsubadd213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 A7 /r"}, + {"inst": "vfmsubadd213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 A7 /r"}, + {"inst": "vfmsubadd231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B7 /r"}, + {"inst": "vfmsubadd231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B7 /r"}, + {"inst": "vfmsubadd231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 B7 /r"}, + {"inst": "vfmsubadd231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 B7 /r"}, + {"inst": "vfnmadd132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 9C /r"}, + {"inst": "vfnmadd132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 9C /r"}, + {"inst": "vfnmadd132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 9C /r"}, + {"inst": "vfnmadd132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 9C /r"}, + {"inst": "vfnmadd213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 AC /r"}, + {"inst": "vfnmadd213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 AC /r"}, + {"inst": "vfnmadd213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 AC /r"}, + {"inst": "vfnmadd213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 AC /r"}, + {"inst": "vfnmadd231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 BC /r"}, + {"inst": "vfnmadd231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 BC /r"}, + {"inst": "vfnmadd231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 BC /r"}, + {"inst": "vfnmadd231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 BC /r"}, + {"inst": "vfnmsub132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 9E /r"}, + {"inst": "vfnmsub132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 9E /r"}, + {"inst": "vfnmsub132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 9E /r"}, + {"inst": "vfnmsub132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 9E /r"}, + {"inst": "vfnmsub213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 AE /r"}, + {"inst": "vfnmsub213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 AE /r"}, + {"inst": "vfnmsub213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 AE /r"}, + {"inst": "vfnmsub213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 AE /r"}, + {"inst": "vfnmsub231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 BE /r"}, + {"inst": "vfnmsub231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 BE /r"}, + {"inst": "vfnmsub231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 BE /r"}, + {"inst": "vfnmsub231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 BE /r"} + ]}, + + {"category": "AVX SCALAR", "ext": "FMA4", "deprecated": true, "data": [ + {"inst": "vfmaddsd W:xmm[63:0], xmm[63:0], xmm[63:0],xmm[63:0]/m64" , "op": "RVSM: VEX.128.66.0F3A.W1 6b /r /is4"}, + {"inst": "vfmaddsd W:xmm[63:0], xmm[63:0], xmm[63:0]/m64,xmm[63:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 6b /r /is4"}, + {"inst": "vfmaddss W:xmm[31:0], xmm[31:0], xmm[31:0],xmm[31:0]/m32" , "op": "RVSM: VEX.128.66.0F3A.W1 6a /r /is4"}, + {"inst": "vfmaddss W:xmm[31:0], xmm[31:0], xmm[31:0]/m32,xmm[31:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 6a /r /is4"}, + {"inst": "vfmsubsd W:xmm[63:0], xmm[63:0], xmm[63:0],xmm[63:0]/m64" , "op": "RVSM: VEX.128.66.0F3A.W1 6F /r /is4"}, + {"inst": "vfmsubsd W:xmm[63:0], xmm[63:0], xmm[63:0]/m64,xmm[63:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 6F /r /is4"}, + {"inst": "vfmsubss W:xmm[31:0], xmm[31:0], xmm[31:0],xmm[31:0]/m32" , "op": "RVSM: VEX.128.66.0F3A.W1 6E /r /is4"}, + {"inst": "vfmsubss W:xmm[31:0], xmm[31:0], xmm[31:0]/m32,xmm[31:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 6E /r /is4"}, + {"inst": "vfnmaddsd W:xmm[63:0], xmm[63:0],xmm[63:0],xmm[63:0]/m64" , "op": "RVSM: VEX.128.66.0F3A.W1 7B /r /is4"}, + {"inst": "vfnmaddsd W:xmm[63:0], xmm[63:0],xmm[63:0]/m64,xmm[63:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 7B /r /is4"}, + {"inst": "vfnmaddss W:xmm[31:0], xmm[31:0],xmm[31:0],xmm[31:0]/m32" , "op": "RVSM: VEX.128.66.0F3A.W1 7A /r /is4"}, + {"inst": "vfnmaddss W:xmm[31:0], xmm[31:0],xmm[31:0]/m32,xmm[31:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 7A /r /is4"}, + {"inst": "vfnmsubsd W:xmm[63:0], xmm[63:0],xmm[63:0],xmm[63:0]/m64" , "op": "RVSM: VEX.128.66.0F3A.W1 7F /r /is4"}, + {"inst": "vfnmsubsd W:xmm[63:0], xmm[63:0],xmm[63:0]/m64,xmm[63:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 7F /r /is4"}, + {"inst": "vfnmsubss W:xmm[31:0], xmm[31:0],xmm[31:0],xmm[31:0]/m32" , "op": "RVSM: VEX.128.66.0F3A.W1 7E /r /is4"}, + {"inst": "vfnmsubss W:xmm[31:0], xmm[31:0],xmm[31:0]/m32,xmm[31:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 7E /r /is4"} + ]}, + + {"category": "AVX SIMD", "ext": "FMA4", "deprecated": true, "data": [ + {"inst": "vfmaddpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 69 /r /is4"}, + {"inst": "vfmaddpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 69 /r /is4"}, + {"inst": "vfmaddpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 69 /r /is4"}, + {"inst": "vfmaddpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 69 /r /is4"}, + {"inst": "vfmaddps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 68 /r /is4"}, + {"inst": "vfmaddps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 68 /r /is4"}, + {"inst": "vfmaddps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 68 /r /is4"}, + {"inst": "vfmaddps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 68 /r /is4"}, + {"inst": "vfmaddsubpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 5D /r /is4"}, + {"inst": "vfmaddsubpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 5D /r /is4"}, + {"inst": "vfmaddsubpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 5D /r /is4"}, + {"inst": "vfmaddsubpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 5D /r /is4"}, + {"inst": "vfmaddsubps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 5C /r /is4"}, + {"inst": "vfmaddsubps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 5C /r /is4"}, + {"inst": "vfmaddsubps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 5C /r /is4"}, + {"inst": "vfmaddsubps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 5C /r /is4"}, + {"inst": "vfmsubaddpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 5F /r /is4"}, + {"inst": "vfmsubaddpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 5F /r /is4"}, + {"inst": "vfmsubaddpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 5F /r /is4"}, + {"inst": "vfmsubaddpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 5F /r /is4"}, + {"inst": "vfmsubaddps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 5E /r /is4"}, + {"inst": "vfmsubaddps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 5E /r /is4"}, + {"inst": "vfmsubaddps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 5E /r /is4"}, + {"inst": "vfmsubaddps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 5E /r /is4"}, + {"inst": "vfmsubpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 6D /r /is4"}, + {"inst": "vfmsubpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 6D /r /is4"}, + {"inst": "vfmsubpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 6D /r /is4"}, + {"inst": "vfmsubpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 6D /r /is4"}, + {"inst": "vfmsubps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 6C /r /is4"}, + {"inst": "vfmsubps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 6C /r /is4"}, + {"inst": "vfmsubps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 6C /r /is4"}, + {"inst": "vfmsubps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 6C /r /is4"}, + {"inst": "vfnmaddpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 79 /r /is4"}, + {"inst": "vfnmaddpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 79 /r /is4"}, + {"inst": "vfnmaddpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 79 /r /is4"}, + {"inst": "vfnmaddpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 79 /r /is4"}, + {"inst": "vfnmaddps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 78 /r /is4"}, + {"inst": "vfnmaddps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 78 /r /is4"}, + {"inst": "vfnmaddps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 78 /r /is4"}, + {"inst": "vfnmaddps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 78 /r /is4"}, + {"inst": "vfnmsubpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 7D /r /is4"}, + {"inst": "vfnmsubpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 7D /r /is4"}, + {"inst": "vfnmsubpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 7D /r /is4"}, + {"inst": "vfnmsubpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 7D /r /is4"}, + {"inst": "vfnmsubps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 7C /r /is4"}, + {"inst": "vfnmsubps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 7C /r /is4"}, + {"inst": "vfnmsubps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 7C /r /is4"}, + {"inst": "vfnmsubps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 7C /r /is4"} + ]}, + + {"category": "AVX SCALAR", "ext": "XOP", "deprecated": true, "data": [ + {"inst": "vfrczsd W:xmm[63:0], xmm[63:0]/m64" , "op": "RM: XOP.L0.P0.M09.W0 83 /r"}, + {"inst": "vfrczss W:xmm[31:0], xmm[31:0]/m32" , "op": "RM: XOP.L0.P0.M09.W0 82 /r"} + ]}, + + {"category": "AVX SIMD", "ext": "XOP", "deprecated": true, "data": [ + {"inst": "vfrczpd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 81 /r"}, + {"inst": "vfrczpd W:ymm, ymm/m256" , "op": "RM: XOP.L1.P0.M09.W0 81 /r"}, + {"inst": "vfrczps W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 80 /r"}, + {"inst": "vfrczps W:ymm, ymm/m256" , "op": "RM: XOP.L1.P0.M09.W0 80 /r"}, + {"inst": "vpcmov W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: XOP.L0.P0.M08.W1 A2 /r /is4"}, + {"inst": "vpcmov W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 A2 /r /is4"}, + {"inst": "vpcmov W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: XOP.L1.P0.M08.W1 A2 /r /is4"}, + {"inst": "vpcmov W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: XOP.L1.P0.M08.W0 A2 /r /is4"}, + {"inst": "vpcomb W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 CC /r ib"}, + {"inst": "vpcomd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 CE /r ib"}, + {"inst": "vpcomq W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 CF /r ib"}, + {"inst": "vpcomub W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 EC /r ib"}, + {"inst": "vpcomud W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 EE /r ib"}, + {"inst": "vpcomuq W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 EF /r ib"}, + {"inst": "vpcomuw W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 ED /r ib"}, + {"inst": "vpcomw W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 CD /r ib"}, + {"inst": "vpermil2pd W:xmm, xmm, xmm/m128, xmm, i4/u4" , "op": "RVMS: VEX.L0.66.0F3A.W0 49 /r /is4"}, + {"inst": "vpermil2pd W:xmm, xmm, xmm, xmm/m128, i4/u4" , "op": "RVSM: VEX.L0.66.0F3A.W1 49 /r /is4"}, + {"inst": "vpermil2pd W:ymm, ymm, ymm/m256, ymm, i4/u4" , "op": "RVMS: VEX.L1.66.0F3A.W0 49 /r /is4"}, + {"inst": "vpermil2pd W:ymm, ymm, ymm, ymm/m256, i4/u4" , "op": "RVSM: VEX.L1.66.0F3A.W1 49 /r /is4"}, + {"inst": "vpermil2ps W:xmm, xmm, xmm/m128, xmm, i4/u4" , "op": "RVMS: VEX.L0.66.0F3A.W0 48 /r /is4"}, + {"inst": "vpermil2ps W:xmm, xmm, xmm, xmm/m128, i4/u4" , "op": "RVSM: VEX.L0.66.0F3A.W1 48 /r /is4"}, + {"inst": "vpermil2ps W:ymm, ymm, ymm/m256, ymm, i4/u4" , "op": "RVMS: VEX.L1.66.0F3A.W0 48 /r /is4"}, + {"inst": "vpermil2ps W:ymm, ymm, ymm, ymm/m256, i4/u4" , "op": "RVSM: VEX.L1.66.0F3A.W1 48 /r /is4"}, + {"inst": "vphaddbd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C2 /r"}, + {"inst": "vphaddbq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C3 /r"}, + {"inst": "vphaddbw W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C1 /r"}, + {"inst": "vphadddq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 CB /r"}, + {"inst": "vphaddubd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D2 /r"}, + {"inst": "vphaddubq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D3 /r"}, + {"inst": "vphaddubw W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D1 /r"}, + {"inst": "vphaddudq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 DB /r"}, + {"inst": "vphadduwd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D6 /r"}, + {"inst": "vphadduwq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D7 /r"}, + {"inst": "vphaddwd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C6 /r"}, + {"inst": "vphaddwq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C7 /r"}, + {"inst": "vphsubbw W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 E1 /r"}, + {"inst": "vphsubdq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 E3 /r"}, + {"inst": "vphsubwd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 E2 /r"}, + {"inst": "vpmacsdd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 9E /r /is4"}, + {"inst": "vpmacsdqh W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 9F /r /is4"}, + {"inst": "vpmacsdql W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 97 /r /is4"}, + {"inst": "vpmacssdd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 8E /r /is4"}, + {"inst": "vpmacssdqh W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 8F /r /is4"}, + {"inst": "vpmacssdql W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 87 /r /is4"}, + {"inst": "vpmacsswd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 86 /r /is4"}, + {"inst": "vpmacssww W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 85 /r /is4"}, + {"inst": "vpmacswd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 96 /r /is4"}, + {"inst": "vpmacsww W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 95 /r /is4"}, + {"inst": "vpmadcsswd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 A6 /r /is4"}, + {"inst": "vpmadcswd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 B6 /r /is4"}, + {"inst": "vpperm W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: XOP.L0.P0.M08.W1 A3 /r /is4"}, + {"inst": "vpperm W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 A3 /r /is4"}, + {"inst": "vprotb W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 90 /r"}, + {"inst": "vprotb W:xmm, xmm/m128, ib/ub" , "op": "RM: XOP.L0.P0.M08.W0 C0 /r ib"}, + {"inst": "vprotb W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 90 /r"}, + {"inst": "vprotd W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 92 /r"}, + {"inst": "vprotd W:xmm, xmm/m128, ib/ub" , "op": "RM: XOP.L0.P0.M08.W0 C2 /r ib"}, + {"inst": "vprotd W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 92 /r"}, + {"inst": "vprotq W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 93 /r"}, + {"inst": "vprotq W:xmm, xmm/m128, ib/ub" , "op": "RM: XOP.L0.P0.M08.W0 C3 /r ib"}, + {"inst": "vprotq W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 93 /r"}, + {"inst": "vprotw W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 91 /r"}, + {"inst": "vprotw W:xmm, xmm/m128, ib/ub" , "op": "RM: XOP.L0.P0.M08.W0 C1 /r ib"}, + {"inst": "vprotw W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 91 /r"}, + {"inst": "vpshab W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 98 /r"}, + {"inst": "vpshab W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 98 /r"}, + {"inst": "vpshad W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 9A /r"}, + {"inst": "vpshad W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 9A /r"}, + {"inst": "vpshaq W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 9B /r"}, + {"inst": "vpshaq W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 9B /r"}, + {"inst": "vpshaw W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 99 /r"}, + {"inst": "vpshaw W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 99 /r"}, + {"inst": "vpshlb W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 94 /r"}, + {"inst": "vpshlb W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 94 /r"}, + {"inst": "vpshld W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 96 /r"}, + {"inst": "vpshld W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 96 /r"}, + {"inst": "vpshlq W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 97 /r"}, + {"inst": "vpshlq W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 97 /r"}, + {"inst": "vpshlw W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 95 /r"}, + {"inst": "vpshlw W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 95 /r"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX_IFMA", "data": [ + {"inst": "vpmadd52huq X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B5 /r"}, + {"inst": "vpmadd52huq X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B5 /r"}, + {"inst": "vpmadd52luq X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B4 /r"}, + {"inst": "vpmadd52luq X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B4 /r"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX_NE_CONVERT", "data": [ + {"inst": "vbcstnebf162ps W:xmm, m16" , "op": "RM: VEX.128.F3.0F38.W0 B1 /r"}, + {"inst": "vbcstnebf162ps W:ymm, m16" , "op": "RM: VEX.256.F3.0F38.W0 B1 /r"}, + {"inst": "vbcstnesh2ps W:xmm, m16" , "op": "RM: VEX.128.66.0F38.W0 B1 /r"}, + {"inst": "vbcstnesh2ps W:ymm, m16" , "op": "RM: VEX.256.66.0F38.W0 B1 /r"}, + {"inst": "vcvtneebf162ps W:xmm, m128" , "op": "RM: VEX.128.F3.0F38.W0 B0 /r"}, + {"inst": "vcvtneebf162ps W:ymm, m256" , "op": "RM: VEX.256.F3.0F38.W0 B0 /r"}, + {"inst": "vcvtneeph2ps W:xmm, m128" , "op": "RM: VEX.128.66.0F38.W0 B0 /r"}, + {"inst": "vcvtneeph2ps W:ymm, m256" , "op": "RM: VEX.256.66.0F38.W0 B0 /r"}, + {"inst": "vcvtneobf162ps W:xmm, m128" , "op": "RM: VEX.128.F2.0F38.W0 B0 /r"}, + {"inst": "vcvtneobf162ps W:ymm, m256" , "op": "RM: VEX.256.F2.0F38.W0 B0 /r"}, + {"inst": "vcvtneoph2ps W:xmm, m128" , "op": "RM: VEX.128.NP.0F38.W0 B0 /r"}, + {"inst": "vcvtneoph2ps W:ymm, m256" , "op": "RM: VEX.256.NP.0F38.W0 B0 /r"}, + {"inst": "vcvtneps2bf16 W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F38.W0 72 /r"}, + {"inst": "vcvtneps2bf16 W:xmm, ymm/m256" , "op": "RM: VEX.256.F3.0F38.W0 72 /r"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX SHA512", "data": [ + {"inst": "vsha512msg1 X:ymm, xmm" , "op": "RM: VEX.256.F2.0F38.W0 CC /r"}, + {"inst": "vsha512msg2 X:ymm, ymm" , "op": "RM: VEX.256.F2.0F38.W0 CD /r"}, + {"inst": "vsha512rnds2 X:ymm, ymm, xmm" , "op": "RVM: VEX.256.F2.0F38.W0 CB /r"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX SM3", "data": [ + {"inst": "vsm3msg1 X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 DA /r"}, + {"inst": "vsm3msg2 X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 DA /r"}, + {"inst": "vsm3rnds2 X:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W0 DE /r /ib"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX SM4", "data": [ + {"inst": "vsm4key4 W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 DA /r"}, + {"inst": "vsm4key4 W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 DA /r"}, + {"inst": "vsm4rnds4 W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F38.W0 DA /r"}, + {"inst": "vsm4rnds4 W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F38.W0 DA /r"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX_VNNI", "data": [ + {"inst": "vpdpbusd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 50 /r"}, + {"inst": "vpdpbusd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 50 /r"}, + {"inst": "vpdpbusds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 51 /r"}, + {"inst": "vpdpbusds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 51 /r"}, + {"inst": "vpdpwssd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 52 /r"}, + {"inst": "vpdpwssd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 52 /r"}, + {"inst": "vpdpwssds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 53 /r"}, + {"inst": "vpdpwssds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 53 /r"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX_VNNI_INT8", "data": [ + {"inst": "vpdpbssd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F38.W0 50 /r"}, + {"inst": "vpdpbssd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F38.W0 50 /r"}, + {"inst": "vpdpbssds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F38.W0 51 /r"}, + {"inst": "vpdpbssds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F38.W0 51 /r"}, + {"inst": "vpdpbsud X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 50 /r"}, + {"inst": "vpdpbsud X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 50 /r"}, + {"inst": "vpdpbsuds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 51 /r"}, + {"inst": "vpdpbsuds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 51 /r"}, + {"inst": "vpdpbuud X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 50 /r"}, + {"inst": "vpdpbuud X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.NP.0F38.W0 50 /r"}, + {"inst": "vpdpbuuds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 51 /r"}, + {"inst": "vpdpbuuds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.NP.0F38.W0 51 /r"} + ]}, + + {"category": "AVX SIMD", "ext": "AVX_VNNI_INT16", "data": [ + {"inst": "vpdpwsud X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 D2 /r"}, + {"inst": "vpdpwsud X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 D2 /r"}, + {"inst": "vpdpwsuds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 D3 /r"}, + {"inst": "vpdpwsuds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 D3 /r"}, + {"inst": "vpdpwusd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 D2 /r"}, + {"inst": "vpdpwusd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 D2 /r"}, + {"inst": "vpdpwusds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 D3 /r"}, + {"inst": "vpdpwusds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 D3 /r"}, + {"inst": "vpdpwuud X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 D2 /r"}, + {"inst": "vpdpwuud X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.NP.0F38.W0 D2 /r"}, + {"inst": "vpdpwuuds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 D3 /r"}, + {"inst": "vpdpwuuds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.NP.0F38.W0 D3 /r"} + ]}, + + {"category": "AVX SIMD", "ext": "VPCLMULQDQ", "data": [ + {"inst": "vpclmulqdq W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 44 /r ib"} + ]}, + + {"category": "AVX512 MASK", "ext": "AVX512_F", "data": [ + {"inst": "kandnw W:k[15:0], k[15:0], k[15:0]" , "op": "RVM: VEX.L1.0F.W0 42 /r"}, + {"inst": "kandw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "RVM: VEX.L1.0F.W0 41 /r"}, + {"inst": "kmovw W:k[15:0], k[15:0]/m16" , "op": "RM: VEX.L0.0F.W0 90 /r"}, + {"inst": "kmovw W:k[15:0], r32[15:0]" , "op": "RM: VEX.L0.0F.W0 92 /r"}, + {"inst": "kmovw W:m16, k[15:0]" , "op": "MR: VEX.L0.0F.W0 91 /r"}, + {"inst": "kmovw W:r32[15:0], k[15:0]" , "op": "RM: VEX.L0.0F.W0 93 /r"}, + {"inst": "knotw W:k[15:0], k[15:0]" , "op": "RM: VEX.L0.0F.W0 44 /r"}, + {"inst": "kortestw R:~k[15:0], ~k[15:0]" , "op": "RM: VEX.L0.0F.W0 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "korw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "RVM: VEX.L1.0F.W0 45 /r"}, + {"inst": "kshiftlw W:k[15:0], k[15:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W1 32 /r ib"}, + {"inst": "kshiftrw W:k[15:0], k[15:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W1 30 /r ib"}, + {"inst": "kunpckbw W:k[15:0], k[7:0], k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 4B /r"}, + {"inst": "kxnorw W:k[15:0], k[15:0], k[15:0]" , "op": "RVM: VEX.L1.0F.W0 46 /r"}, + {"inst": "kxorw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "RVM: VEX.L1.0F.W0 47 /r"} + ]}, + + {"category": "AVX512 MASK", "ext": "AVX512_DQ", "data": [ + {"inst": "kaddb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 4A /r"}, + {"inst": "kaddw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "RVM: VEX.L1.0F.W0 4A /r"}, + {"inst": "kandb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 41 /r"}, + {"inst": "kandnb W:k[7:0], k[7:0], k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 42 /r"}, + {"inst": "kmovb W:k[7:0], k[7:0]/m8" , "op": "RM: VEX.L0.66.0F.W0 90 /r"}, + {"inst": "kmovb W:k[7:0], r32[7:0]" , "op": "RM: VEX.L0.66.0F.W0 92 /r"}, + {"inst": "kmovb W:m8, k[7:0]" , "op": "MR: VEX.L0.66.0F.W0 91 /r"}, + {"inst": "kmovb W:r32[7:0], k[7:0]" , "op": "RM: VEX.L0.66.0F.W0 93 /r"}, + {"inst": "knotb W:k[7:0], k[7:0]" , "op": "RM: VEX.L0.66.0F.W0 44 /r"}, + {"inst": "korb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 45 /r"}, + {"inst": "kortestb R:~k[7:0], ~k[7:0]" , "op": "RM: VEX.L0.66.0F.W0 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "kshiftlb W:k[7:0], k[7:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W0 32 /r ib"}, + {"inst": "kshiftrb W:k[7:0], k[7:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W0 30 /r ib"}, + {"inst": "ktestb R:~k[7:0], ~k[7:0]" , "op": "RM: VEX.L0.66.0F.W0 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "ktestw R:~k[15:0], ~k[15:0]" , "op": "RM: VEX.L0.0F.W0 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "kxnorb W:k[7:0], k[7:0], k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 46 /r"}, + {"inst": "kxorb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 47 /r"} + ]}, + + {"category": "AVX512 MASK", "ext": "AVX512_BW", "data": [ + {"inst": "kaddd W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 4A /r"}, + {"inst": "kaddq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "RVM: VEX.L1.0F.W1 4A /r"}, + {"inst": "kandd W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 41 /r"}, + {"inst": "kandnd W:k[31:0], k[31:0], k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 42 /r"}, + {"inst": "kandnq W:k[63:0], k[63:0], k[63:0]" , "op": "RVM: VEX.L1.0F.W1 42 /r"}, + {"inst": "kandq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "RVM: VEX.L1.0F.W1 41 /r"}, + {"inst": "kmovd W:k[31:0], k[31:0]/m32" , "op": "RM: VEX.L0.66.0F.W1 90 /r"}, + {"inst": "kmovd W:k[31:0], r32[31:0]" , "op": "RM: VEX.L0.F2.0F.W0 92 /r"}, + {"inst": "kmovd W:m32, k[31:0]" , "op": "MR: VEX.L0.66.0F.W1 91 /r"}, + {"inst": "kmovd W:r32[31:0], k[31:0]" , "op": "RM: VEX.L0.F2.0F.W0 93 /r"}, + {"inst": "kmovq W:k[63:0], k[63:0]/m64" , "op": "RM: VEX.L0.0F.W1 90 /r"}, + {"inst": "kmovq W:k[63:0], r64" , "op": "RM: VEX.L0.F2.0F.W1 92 /r"}, + {"inst": "kmovq W:m64, k[63:0]" , "op": "MR: VEX.L0.0F.W1 91 /r"}, + {"inst": "kmovq W:r64, k[63:0]" , "op": "RM: VEX.L0.F2.0F.W1 93 /r"}, + {"inst": "knotd W:k[31:0], k[31:0]" , "op": "RM: VEX.L0.66.0F.W1 44 /r"}, + {"inst": "knotq W:k[63:0], k[63:0]" , "op": "RM: VEX.L0.0F.W1 44 /r"}, + {"inst": "kord W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 45 /r"}, + {"inst": "korq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "RVM: VEX.L1.0F.W1 45 /r"}, + {"inst": "kortestd R:~k[31:0], ~k[31:0]" , "op": "RM: VEX.L0.66.0F.W1 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "kortestq R:~k[63:0], ~k[63:0]" , "op": "RM: VEX.L0.0F.W1 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "kshiftld W:k[31:0], k[31:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W0 33 /r ib"}, + {"inst": "kshiftlq W:k[63:0], k[63:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W1 33 /r ib"}, + {"inst": "kshiftrd W:k[31:0], k[31:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W0 31 /r ib"}, + {"inst": "kshiftrq W:k[63:0], k[63:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W1 31 /r ib"}, + {"inst": "ktestd R:~k[31:0], ~k[31:0]" , "op": "RM: VEX.L0.66.0F.W1 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "ktestq R:~k[63:0], ~k[63:0]" , "op": "RM: VEX.L0.0F.W1 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"}, + {"inst": "kunpckdq W:k[63:0], k[31:0], k[31:0]" , "op": "RVM: VEX.L1.0F.W1 4B /r"}, + {"inst": "kunpckwd W:k[31:0], k[15:0], k[15:0]" , "op": "RVM: VEX.L1.0F.W0 4B /r"}, + {"inst": "kxnord W:k[31:0], k[31:0], k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 46 /r"}, + {"inst": "kxnorq W:k[63:0], k[63:0], k[63:0]" , "op": "RVM: VEX.L1.0F.W1 46 /r"}, + {"inst": "kxord W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 47 /r"}, + {"inst": "kxorq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "RVM: VEX.L1.0F.W1 47 /r"} + ]}, + + {"category": "AVX512 SCALAR", "ext": "AVX512_F", "data": [ + {"inst": "vaddsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 58 /r" , "vl": 0}, + {"inst": "vaddss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 58 /r" , "vl": 0}, + {"inst": "vcmpsd W:k {k}, xmm, xmm[63:0]/m64, ib/ub {sae}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 C2 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vcmpss W:k {k}, xmm, xmm[31:0]/m32, ib/ub {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 C2 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vcomisd R:xmm[63:0], xmm[63:0]/m64 {sae}" , "op": "RM-T1S: EVEX.LIG.66.0F.W1 2F /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "vcomiss R:xmm[31:0], xmm[31:0]/m32 {sae}" , "op": "RM-T1S: EVEX.LIG.0F.W0 2F /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "vcvtsd2si W:r32, xmm[63:0]/m64 {er}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W0 2D /r" , "vl": 0}, + {"inst": "vcvtsd2si W:r64, xmm[63:0]/m64 {er}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W1 2D /r" , "vl": 0}, + {"inst": "vcvtsd2ss W:xmm {kz}, xmm[127:32], xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5A /r" , "vl": 0}, + {"inst": "vcvtsd2usi W:r32, xmm[63:0]/m64 {er}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W0 79 /r" , "vl": 0}, + {"inst": "vcvtsd2usi W:r64, xmm[63:0]/m64 {er}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W1 79 /r" , "vl": 0}, + {"inst": "vcvtsi2sd W:xmm, xmm[127:64], r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W0 2A /r" , "vl": 0}, + {"inst": "vcvtsi2sd W:xmm, xmm[127:64], r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 2A /r" , "vl": 0}, + {"inst": "vcvtsi2ss W:xmm, xmm[127:32], r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 2A /r" , "vl": 0}, + {"inst": "vcvtsi2ss W:xmm, xmm[127:32], r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W1 2A /r" , "vl": 0}, + {"inst": "vcvtss2sd W:xmm {kz}, xmm[127:64], xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5A /r" , "vl": 0}, + {"inst": "vcvtss2si W:r32, xmm[31:0]/m32 {er}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W0 2D /r" , "vl": 0}, + {"inst": "vcvtss2si W:r64, xmm[31:0]/m32 {er}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W1 2D /r" , "vl": 0}, + {"inst": "vcvtss2usi W:r32, xmm[31:0]/m32 {er}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W0 79 /r" , "vl": 0}, + {"inst": "vcvtss2usi W:r64, xmm[31:0]/m32 {er}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W1 79 /r" , "vl": 0}, + {"inst": "vcvttsd2si W:r32, xmm[63:0]/m64 {sae}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W0 2C /r" , "vl": 0}, + {"inst": "vcvttsd2si W:r64, xmm[63:0]/m64 {sae}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W1 2C /r" , "vl": 0}, + {"inst": "vcvttsd2usi W:r32, xmm[63:0]/m64 {sae}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W0 78 /r" , "vl": 0}, + {"inst": "vcvttsd2usi W:r64, xmm[63:0]/m64 {sae}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W1 78 /r" , "vl": 0}, + {"inst": "vcvttss2si W:r32, xmm[31:0]/m32 {sae}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W0 2C /r" , "vl": 0}, + {"inst": "vcvttss2si W:r64, xmm[31:0]/m32 {sae}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W1 2C /r" , "vl": 0}, + {"inst": "vcvttss2usi W:r32, xmm[31:0]/m32 {sae}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W0 78 /r" , "vl": 0}, + {"inst": "vcvttss2usi W:r64, xmm[31:0]/m32 {sae}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W1 78 /r" , "vl": 0}, + {"inst": "vcvtusi2sd W:xmm, xmm[127:64], r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W0 7B /r" , "vl": 0}, + {"inst": "vcvtusi2sd W:xmm, xmm[127:64], r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 7B /r" , "vl": 0}, + {"inst": "vcvtusi2ss W:xmm, xmm[127:32], r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 7B /r" , "vl": 0}, + {"inst": "vcvtusi2ss W:xmm, xmm[127:32], r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W1 7B /r" , "vl": 0}, + {"inst": "vdivsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5E /r" , "vl": 0}, + {"inst": "vdivss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5E /r" , "vl": 0}, + {"inst": "vfixupimmsd X:xmm {kz},xmm[127:64],xmm[63:0]/m64,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.66.0F3A.W1 55 /r ib" , "vl": 0}, + {"inst": "vfixupimmss X:xmm {kz},xmm[127:32],xmm[31:0]/m32,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.66.0F3A.W0 55 /r ib" , "vl": 0}, + {"inst": "vfmadd132sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 99 /r" , "vl": 0}, + {"inst": "vfmadd132ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 99 /r" , "vl": 0}, + {"inst": "vfmadd213sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 A9 /r" , "vl": 0}, + {"inst": "vfmadd213ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 A9 /r" , "vl": 0}, + {"inst": "vfmadd231sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 B9 /r" , "vl": 0}, + {"inst": "vfmadd231ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 B9 /r" , "vl": 0}, + {"inst": "vfmsub132sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 9B /r" , "vl": 0}, + {"inst": "vfmsub132ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 9B /r" , "vl": 0}, + {"inst": "vfmsub213sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 AB /r" , "vl": 0}, + {"inst": "vfmsub213ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 AB /r" , "vl": 0}, + {"inst": "vfmsub231sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 BB /r" , "vl": 0}, + {"inst": "vfmsub231ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 BB /r" , "vl": 0}, + {"inst": "vfnmadd132sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 9D /r" , "vl": 0}, + {"inst": "vfnmadd132ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 9D /r" , "vl": 0}, + {"inst": "vfnmadd213sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 AD /r" , "vl": 0}, + {"inst": "vfnmadd213ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 AD /r" , "vl": 0}, + {"inst": "vfnmadd231sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 BD /r" , "vl": 0}, + {"inst": "vfnmadd231ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 BD /r" , "vl": 0}, + {"inst": "vfnmsub132sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 9F /r" , "vl": 0}, + {"inst": "vfnmsub132ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 9F /r" , "vl": 0}, + {"inst": "vfnmsub213sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 AF /r" , "vl": 0}, + {"inst": "vfnmsub213ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 AF /r" , "vl": 0}, + {"inst": "vfnmsub231sd X:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 BF /r" , "vl": 0}, + {"inst": "vfnmsub231ss X:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 BF /r" , "vl": 0}, + {"inst": "vgetexpsd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {sae}" , "op": "RM-T1S: EVEX.LIG.66.0F38.W1 43 /r" , "vl": 0}, + {"inst": "vgetexpss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {sae}" , "op": "RM-T1S: EVEX.LIG.66.0F38.W0 43 /r" , "vl": 0}, + {"inst": "vgetmantsd W:xmm {kz},xmm[127:64],xmm[63:0]/m64,ib/ub {sae}", "op": "RM-T1S: EVEX.LIG.66.0F3A.W1 27 /r ib" , "vl": 0}, + {"inst": "vgetmantss W:xmm {kz},xmm[127:32],xmm[31:0]/m32,ib/ub {sae}", "op": "RM-T1S: EVEX.LIG.66.0F3A.W0 27 /r ib" , "vl": 0}, + {"inst": "vmaxsd W:xmm {kz}, xmm, xmm[63:0]/m64 {sae}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5F /r" , "vl": 0}, + {"inst": "vmaxss W:xmm {kz}, xmm, xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5F /r" , "vl": 0}, + {"inst": "vminsd W:xmm {kz}, xmm, xmm[63:0]/m64 {sae}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5D /r" , "vl": 0}, + {"inst": "vminss W:xmm {kz}, xmm, xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5D /r" , "vl": 0}, + {"inst": "vmovsd W:m64, xmm[63:0]" , "op": "MR-T1S: EVEX.LIG.F2.0F.W1 11 /r" , "vl": 0}, + {"inst": "vmovsd W:xmm[63:0] {kz}, m64" , "op": "MR-T1S: EVEX.LIG.F2.0F.W1 10 /r" , "vl": 0}, + {"inst": "vmovsd W:xmm {kz}, xmm[127:64], xmm[63:0]" , "op": "MVR: EVEX.LIG.F2.0F.W1 11 /r" , "vl": 0}, + {"inst": "vmovsd W:xmm {kz}, xmm[127:64], xmm[63:0]" , "op": "RVM: EVEX.LIG.F2.0F.W1 10 /r" , "vl": 0}, + {"inst": "vmovss W:m32, xmm[31:0]" , "op": "MR-T1S: EVEX.LIG.F3.0F.W0 11 /r" , "vl": 0}, + {"inst": "vmovss W:xmm[31:0] {kz}, m32" , "op": "MR-T1S: EVEX.LIG.F3.0F.W0 10 /r" , "vl": 0}, + {"inst": "vmovss W:xmm {kz}, xmm[127:32], xmm[31:0]" , "op": "MVR: EVEX.LIG.F3.0F.W0 11 /r" , "vl": 0}, + {"inst": "vmovss W:xmm {kz}, xmm[127:32], xmm[31:0]" , "op": "RVM: EVEX.LIG.F3.0F.W0 10 /r" , "vl": 0}, + {"inst": "vmulsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 59 /r" , "vl": 0}, + {"inst": "vmulss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 59 /r" , "vl": 0}, + {"inst": "vrcp14sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 4D /r" , "vl": 0}, + {"inst": "vrcp14ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 4D /r" , "vl": 0}, + {"inst": "vrndscalesd W:xmm {kz},xmm[127:64],xmm[63:0]/m64,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.66.0F3A.W1 0B /r ib" , "vl": 0}, + {"inst": "vrndscaless W:xmm {kz},xmm[127:32],xmm[31:0]/m32,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.66.0F3A.W0 0A /r ib" , "vl": 0}, + {"inst": "vrsqrt14sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 4F /r" , "vl": 0}, + {"inst": "vrsqrt14ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 4F /r" , "vl": 0}, + {"inst": "vscalefsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 2D /r" , "vl": 0}, + {"inst": "vscalefss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 2D /r" , "vl": 0}, + {"inst": "vsqrtsd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 51 /r" , "vl": 0}, + {"inst": "vsqrtss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 51 /r" , "vl": 0}, + {"inst": "vsubsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5C /r" , "vl": 0}, + {"inst": "vsubss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5C /r" , "vl": 0}, + {"inst": "vucomisd R:xmm[63:0], xmm[63:0]/m64 {sae}" , "op": "RM-T1S: EVEX.LIG.66.0F.W1 2E /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "vucomiss R:xmm[31:0], xmm[31:0]/m32 {sae}" , "op": "RM-T1S: EVEX.LIG.0F.W0 2E /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_F", "data": [ + {"inst": "vaddpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 58 /r" , "vl": 1}, + {"inst": "vaddpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 58 /r" , "vl": 1}, + {"inst": "vaddpd W:zmm {kz}, ~zmm, ~zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F.W1 58 /r" , "vl": 0}, + {"inst": "vaddps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 58 /r" , "vl": 1}, + {"inst": "vaddps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 58 /r" , "vl": 1}, + {"inst": "vaddps W:zmm {kz}, ~zmm, ~zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.0F.W0 58 /r" , "vl": 0}, + {"inst": "valignd W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 03 /r ib" , "vl": 1}, + {"inst": "valignd W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 03 /r ib" , "vl": 1}, + {"inst": "valignd W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 03 /r ib" , "vl": 0}, + {"inst": "valignq W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 03 /r ib" , "vl": 1}, + {"inst": "valignq W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 03 /r ib" , "vl": 1}, + {"inst": "valignq W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 03 /r ib" , "vl": 0}, + {"inst": "vblendmpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 65 /r" , "vl": 1, "k": "blend"}, + {"inst": "vblendmpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 65 /r" , "vl": 1, "k": "blend"}, + {"inst": "vblendmpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 65 /r" , "vl": 0, "k": "blend"}, + {"inst": "vblendmps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 65 /r" , "vl": 1, "k": "blend"}, + {"inst": "vblendmps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 65 /r" , "vl": 1, "k": "blend"}, + {"inst": "vblendmps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 65 /r" , "vl": 0, "k": "blend"}, + {"inst": "vbroadcastf32x4 W:ymm {kz}, m128" , "op": "RM-T4: EVEX.256.66.0F38.W0 1A /r" , "vl": 0}, + {"inst": "vbroadcastf32x4 W:zmm {kz}, m128" , "op": "RM-T4: EVEX.512.66.0F38.W0 1A /r" , "vl": 0}, + {"inst": "vbroadcastf64x4 W:zmm {kz}, m256" , "op": "RM-T4: EVEX.512.66.0F38.W1 1B /r" , "vl": 0}, + {"inst": "vbroadcasti32x4 W:ymm {kz}, m128" , "op": "RM-T4: EVEX.256.66.0F38.W0 5A /r" , "vl": 1}, + {"inst": "vbroadcasti32x4 W:zmm {kz}, m128" , "op": "RM-T4: EVEX.512.66.0F38.W0 5A /r" , "vl": 0}, + {"inst": "vbroadcasti64x4 W:zmm {kz}, m256" , "op": "RM-T4: EVEX.512.66.0F38.W1 5B /r" , "vl": 0}, + {"inst": "vbroadcastsd W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.256.66.0F38.W1 19 /r" , "vl": 1}, + {"inst": "vbroadcastsd W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.512.66.0F38.W1 19 /r" , "vl": 0}, + {"inst": "vbroadcastss W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.128.66.0F38.W0 18 /r" , "vl": 1}, + {"inst": "vbroadcastss W:ymm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.256.66.0F38.W0 18 /r" , "vl": 1}, + {"inst": "vbroadcastss W:zmm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.512.66.0F38.W0 18 /r" , "vl": 0}, + {"inst": "vcmppd W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F.W1 C2 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vcmppd W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F.W1 C2 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vcmppd W:k {k}, zmm, zmm/m512/b64, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.66.0F.W1 C2 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vcmpps W:k {k}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.0F.W0 C2 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vcmpps W:k {k}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.0F.W0 C2 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vcmpps W:k {k}, zmm, zmm/m512/b32, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.0F.W0 C2 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vcompresspd W:xmm/m128 {kz}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 8A /r" , "vl": 1}, + {"inst": "vcompresspd W:ymm/m256 {kz}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 8A /r" , "vl": 1}, + {"inst": "vcompresspd W:zmm/m512 {kz}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 8A /r" , "vl": 0}, + {"inst": "vcompressps W:xmm/m128 {kz}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 8A /r" , "vl": 1}, + {"inst": "vcompressps W:ymm/m256 {kz}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 8A /r" , "vl": 1}, + {"inst": "vcompressps W:zmm/m512 {kz}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 8A /r" , "vl": 0}, + {"inst": "vcvtdq2pd W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.F3.0F.W0 E6 /r" , "vl": 1}, + {"inst": "vcvtdq2pd W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.F3.0F.W0 E6 /r" , "vl": 1}, + {"inst": "vcvtdq2pd W:zmm {kz}, ymm/m256/b32" , "op": "RM-HV: EVEX.512.F3.0F.W0 E6 /r" , "vl": 0}, + {"inst": "vcvtdq2ps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.0F.W0 5B /r" , "vl": 1}, + {"inst": "vcvtdq2ps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.0F.W0 5B /r" , "vl": 1}, + {"inst": "vcvtdq2ps W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.0F.W0 5B /r" , "vl": 0}, + {"inst": "vcvtpd2ps W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 5A /r" , "vl": 1}, + {"inst": "vcvtpd2ps W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 5A /r" , "vl": 1}, + {"inst": "vcvtpd2ps W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.0F.W1 5A /r" , "vl": 0}, + {"inst": "vcvtpd2dq W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F2.0F.W1 E6 /r" , "vl": 1}, + {"inst": "vcvtpd2dq W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F2.0F.W1 E6 /r" , "vl": 1}, + {"inst": "vcvtpd2dq W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F2.0F.W1 E6 /r" , "vl": 0}, + {"inst": "vcvtpd2udq W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.0F.W1 79 /r" , "vl": 1}, + {"inst": "vcvtpd2udq W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.0F.W1 79 /r" , "vl": 1}, + {"inst": "vcvtpd2udq W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.0F.W1 79 /r" , "vl": 0}, + {"inst": "vcvtph2ps W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.W0 13 /r" , "vl": 1}, + {"inst": "vcvtph2ps W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.W0 13 /r" , "vl": 1}, + {"inst": "vcvtph2ps W:zmm {kz}, ymm/m256 {sae}" , "op": "RM-HVM: EVEX.512.66.0F38.W0 13 /r" , "vl": 0}, + {"inst": "vcvtps2dq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F.W0 5B /r" , "vl": 1}, + {"inst": "vcvtps2dq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F.W0 5B /r" , "vl": 1}, + {"inst": "vcvtps2dq W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.66.0F.W0 5B /r" , "vl": 0}, + {"inst": "vcvtps2pd W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.0F.W0 5A /r" , "vl": 1}, + {"inst": "vcvtps2pd W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.0F.W0 5A /r" , "vl": 1}, + {"inst": "vcvtps2pd W:zmm {kz}, ymm/m256/b32 {er}" , "op": "RM-HV: EVEX.512.0F.W0 5A /r" , "vl": 0}, + {"inst": "vcvtps2ph W:xmm[63:0]/m64 {kz}, xmm, ib/ub" , "op": "MR-HVM: EVEX.128.66.0F3A.W0 1D /r ib" , "vl": 1}, + {"inst": "vcvtps2ph W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-HVM: EVEX.256.66.0F3A.W0 1D /r ib" , "vl": 1}, + {"inst": "vcvtps2ph W:ymm/m256 {kz}, zmm, ib/ub {sae}" , "op": "MR-HVM: EVEX.512.66.0F3A.W0 1D /r ib" , "vl": 0}, + {"inst": "vcvtps2udq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.0F.W0 79 /r" , "vl": 1}, + {"inst": "vcvtps2udq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.0F.W0 79 /r" , "vl": 1}, + {"inst": "vcvtps2udq W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.0F.W0 79 /r" , "vl": 0}, + {"inst": "vcvttpd2dq W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 E6 /r" , "vl": 1}, + {"inst": "vcvttpd2dq W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 E6 /r" , "vl": 1}, + {"inst": "vcvttpd2dq W:ymm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F.W1 E6 /r" , "vl": 0}, + {"inst": "vcvttpd2qq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 7A /r" , "vl": 1}, + {"inst": "vcvttpd2qq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 7A /r" , "vl": 1}, + {"inst": "vcvttpd2qq W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F.W1 7A /r" , "vl": 0}, + {"inst": "vcvttpd2udq W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.0F.W1 78 /r" , "vl": 1}, + {"inst": "vcvttpd2udq W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.0F.W1 78 /r" , "vl": 1}, + {"inst": "vcvttpd2udq W:ymm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.0F.W1 78 /r" , "vl": 0}, + {"inst": "vcvttps2dq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.F3.0F.W0 5B /r" , "vl": 1}, + {"inst": "vcvttps2dq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.F3.0F.W0 5B /r" , "vl": 1}, + {"inst": "vcvttps2dq W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.F3.0F.W0 5B /r" , "vl": 0}, + {"inst": "vcvttps2udq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.0F.W0 78 /r" , "vl": 1}, + {"inst": "vcvttps2udq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.0F.W0 78 /r" , "vl": 1}, + {"inst": "vcvttps2udq W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.0F.W0 78 /r" , "vl": 0}, + {"inst": "vcvtudq2pd W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.F3.0F.W0 7A /r" , "vl": 1}, + {"inst": "vcvtudq2pd W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.F3.0F.W0 7A /r" , "vl": 1}, + {"inst": "vcvtudq2pd W:zmm {kz}, ymm/m256/b32" , "op": "RM-HV: EVEX.512.F3.0F.W0 7A /r" , "vl": 0}, + {"inst": "vcvtudq2ps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.F2.0F.W0 7A /r" , "vl": 1}, + {"inst": "vcvtudq2ps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.F2.0F.W0 7A /r" , "vl": 1}, + {"inst": "vcvtudq2ps W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.F2.0F.W0 7A /r" , "vl": 0}, + {"inst": "vdivpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 5E /r" , "vl": 1}, + {"inst": "vdivpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 5E /r" , "vl": 1}, + {"inst": "vdivpd W:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F.W1 5E /r" , "vl": 0}, + {"inst": "vdivps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 5E /r" , "vl": 1}, + {"inst": "vdivps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 5E /r" , "vl": 1}, + {"inst": "vdivps W:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.0F.W0 5E /r" , "vl": 0}, + {"inst": "vexpandpd W:xmm {kz}, xmm/m128" , "op": "RM-T1S: EVEX.128.66.0F38.W1 88 /r" , "vl": 1}, + {"inst": "vexpandpd W:ymm {kz}, ymm/m256" , "op": "RM-T1S: EVEX.256.66.0F38.W1 88 /r" , "vl": 1}, + {"inst": "vexpandpd W:zmm {kz}, zmm/m512" , "op": "RM-T1S: EVEX.512.66.0F38.W1 88 /r" , "vl": 0}, + {"inst": "vexpandps W:xmm {kz}, xmm/m128" , "op": "RM-T1S: EVEX.128.66.0F38.W0 88 /r" , "vl": 1}, + {"inst": "vexpandps W:ymm {kz}, ymm/m256" , "op": "RM-T1S: EVEX.256.66.0F38.W0 88 /r" , "vl": 1}, + {"inst": "vexpandps W:zmm {kz}, zmm/m512" , "op": "RM-T1S: EVEX.512.66.0F38.W0 88 /r" , "vl": 0}, + {"inst": "vextractf32x4 W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-T4: EVEX.256.66.0F3A.W0 19 /r ib" , "vl": 1}, + {"inst": "vextractf32x4 W:xmm/m128 {kz}, zmm, ib/ub" , "op": "MR-T4: EVEX.512.66.0F3A.W0 19 /r ib" , "vl": 0}, + {"inst": "vextractf64x4 W:ymm/m256 {kz}, zmm, ib/ub" , "op": "MR-T4: EVEX.512.66.0F3A.W1 1B /r ib" , "vl": 0}, + {"inst": "vextracti32x4 W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-T4: EVEX.256.66.0F3A.W0 39 /r ib" , "vl": 1}, + {"inst": "vextracti32x4 W:xmm/m128 {kz}, zmm, ib/ub" , "op": "MR-T4: EVEX.512.66.0F3A.W0 39 /r ib" , "vl": 0}, + {"inst": "vextracti64x4 W:ymm/m256 {kz}, zmm, ib/ub" , "op": "MR-T4: EVEX.512.66.0F3A.W1 3B /r ib" , "vl": 0}, + {"inst": "vextractps W:r32[31:0]/m32, xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.WIG 17 /r ib" , "vl": 0}, + {"inst": "vfixupimmpd X:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 54 /r ib" , "vl": 1}, + {"inst": "vfixupimmpd X:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 54 /r ib" , "vl": 1}, + {"inst": "vfixupimmpd X:zmm {kz}, zmm, zmm/m512/b64, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 54 /r ib" , "vl": 0}, + {"inst": "vfixupimmps X:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 54 /r ib" , "vl": 1}, + {"inst": "vfixupimmps X:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 54 /r ib" , "vl": 1}, + {"inst": "vfixupimmps X:zmm {kz}, zmm, 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{er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 BC /r" , "vl": 0}, + {"inst": "vfnmadd231ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 BC /r" , "vl": 1}, + {"inst": "vfnmadd231ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 BC /r" , "vl": 1}, + {"inst": "vfnmadd231ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 BC /r" , "vl": 0}, + {"inst": "vfnmsub132pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 9E /r" , "vl": 1}, + {"inst": "vfnmsub132pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 9E /r" , "vl": 1}, + {"inst": "vfnmsub132pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 9E /r" , "vl": 0}, + {"inst": "vfnmsub132ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 9E /r" , "vl": 1}, + {"inst": "vfnmsub132ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 9E /r" , "vl": 1}, + {"inst": "vfnmsub132ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 9E /r" , "vl": 0}, + {"inst": "vfnmsub213pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 AE /r" , "vl": 1}, + {"inst": "vfnmsub213pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 AE /r" , "vl": 1}, + {"inst": "vfnmsub213pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 AE /r" , "vl": 0}, + {"inst": "vfnmsub213ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 AE /r" , "vl": 1}, + {"inst": "vfnmsub213ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 AE /r" , "vl": 1}, + {"inst": "vfnmsub213ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 AE /r" , "vl": 0}, + {"inst": "vfnmsub231pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 BE /r" , "vl": 1}, + {"inst": "vfnmsub231pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 BE /r" , "vl": 1}, + {"inst": "vfnmsub231pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 BE /r" , "vl": 0}, + {"inst": "vfnmsub231ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 BE /r" , "vl": 1}, + {"inst": "vfnmsub231ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 BE /r" , "vl": 1}, + {"inst": "vfnmsub231ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 BE /r" , "vl": 0}, + {"inst": "vgatherdpd X:xmm {k}, vm32x" , "op": "RM-T1S: EVEX.128.66.0F38.W1 92 /r" , "vl": 1}, + {"inst": "vgatherdpd X:ymm {k}, vm32x" , "op": "RM-T1S: EVEX.256.66.0F38.W1 92 /r" , "vl": 1}, + {"inst": "vgatherdpd X:zmm {k}, vm32y" , "op": "RM-T1S: EVEX.512.66.0F38.W1 92 /r" , "vl": 0}, + {"inst": "vgatherdps X:xmm {k}, vm32x" , "op": "RM-T1S: EVEX.128.66.0F38.W0 92 /r" , "vl": 1}, + {"inst": "vgatherdps X:ymm {k}, vm32y" , "op": "RM-T1S: EVEX.256.66.0F38.W0 92 /r" , "vl": 1}, + {"inst": "vgatherdps X:zmm {k}, vm32z" , "op": "RM-T1S: EVEX.512.66.0F38.W0 92 /r" , "vl": 0}, + {"inst": "vgatherqpd X:xmm {k}, vm64x" , "op": "RM-T1S: EVEX.128.66.0F38.W1 93 /r" , "vl": 1}, + {"inst": "vgatherqpd X:ymm {k}, vm64y" , "op": "RM-T1S: EVEX.256.66.0F38.W1 93 /r" , "vl": 1}, + {"inst": "vgatherqpd X:zmm {k}, vm64z" , "op": "RM-T1S: EVEX.512.66.0F38.W1 93 /r" , "vl": 0}, + {"inst": "vgatherqps X:xmm {k}, vm64x" , "op": "RM-T1S: EVEX.128.66.0F38.W0 93 /r" , "vl": 1}, + {"inst": "vgatherqps X:xmm {k}, vm64y" , "op": "RM-T1S: EVEX.256.66.0F38.W0 93 /r" , "vl": 1}, + {"inst": "vgatherqps X:ymm {k}, vm64z" , "op": "RM-T1S: EVEX.512.66.0F38.W0 93 /r" , "vl": 0}, + {"inst": "vgetexppd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 42 /r" , "vl": 1}, + {"inst": "vgetexppd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 42 /r" , "vl": 1}, + {"inst": "vgetexppd W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W1 42 /r" , "vl": 0}, + {"inst": "vgetexpps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 42 /r" , "vl": 1}, + {"inst": "vgetexpps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 42 /r" , "vl": 1}, + {"inst": "vgetexpps W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W0 42 /r" , "vl": 0}, + {"inst": "vgetmantpd W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 26 /r ib" , "vl": 1}, + {"inst": "vgetmantpd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 26 /r ib" , "vl": 1}, + {"inst": "vgetmantpd W:zmm {kz}, zmm/m512/b64, ib/ub {sae}" , "op": "RM-FV: EVEX.512.66.0F3A.W1 26 /r ib" , "vl": 0}, + {"inst": "vgetmantps W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 26 /r ib" , "vl": 1}, + {"inst": "vgetmantps W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 26 /r ib" , "vl": 1}, + {"inst": "vgetmantps W:zmm {kz}, zmm/m512/b32, ib/ub {sae}" , "op": "RM-FV: EVEX.512.66.0F3A.W0 26 /r ib" , "vl": 0}, + {"inst": "vinsertf32x4 W:ymm {kz}, ymm, xmm/m128, ib/ub" , "op": "RVM-T4: EVEX.256.66.0F3A.W0 18 /r ib" , "vl": 1}, + {"inst": "vinsertf32x4 W:zmm {kz}, zmm, xmm/m128, ib/ub" , "op": "RVM-T4: EVEX.512.66.0F3A.W0 18 /r ib" , "vl": 0}, + {"inst": "vinsertf64x4 W:zmm {kz}, zmm, ymm/m256, ib/ub" , "op": "RVM-T4: EVEX.512.66.0F3A.W1 1A /r ib" , "vl": 0}, + {"inst": "vinserti32x4 W:ymm {kz}, ymm, xmm/m128, ib/ub" , "op": "RVM-T4: EVEX.256.66.0F3A.W0 38 /r ib" , "vl": 1}, + {"inst": "vinserti32x4 W:zmm {kz}, zmm, xmm/m128, ib/ub" , "op": "RVM-T4: EVEX.512.66.0F3A.W0 38 /r ib" , "vl": 0}, + {"inst": "vinserti64x4 W:zmm {kz}, zmm, ymm/m256, ib/ub" , "op": "RVM-T4: EVEX.512.66.0F3A.W1 3A /r ib" , "vl": 0}, + {"inst": "vinsertps W:xmm, xmm, xmm[31:0]/m32, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F3A.W0 21 /r ib" , "vl": 0}, + {"inst": "vmaxpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 5F /r" , "vl": 1}, + {"inst": "vmaxpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 5F /r" , "vl": 1}, + {"inst": "vmaxpd W:zmm {kz}, zmm, zmm/m512/b64 {sae}" , "op": "RVM-FV: EVEX.512.66.0F.W1 5F /r" , "vl": 0}, + {"inst": "vmaxps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 5F /r" , "vl": 1}, + {"inst": "vmaxps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 5F /r" , "vl": 1}, + {"inst": "vmaxps W:zmm {kz}, zmm, zmm/m512/b32 {sae}" , "op": "RVM-FV: EVEX.512.0F.W0 5F /r" , "vl": 0}, + {"inst": "vminpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 5D /r" , "vl": 1}, + {"inst": "vminpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 5D /r" , "vl": 1}, + {"inst": "vminpd W:zmm {kz}, zmm, zmm/m512/b64 {sae}" , "op": "RVM-FV: EVEX.512.66.0F.W1 5D /r" , "vl": 0}, + {"inst": "vminps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 5D /r" , "vl": 1}, + {"inst": "vminps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 5D /r" , "vl": 1}, + {"inst": "vminps W:zmm {kz}, zmm, zmm/m512/b32 {sae}" , "op": "RVM-FV: EVEX.512.0F.W0 5D /r" , "vl": 0}, + {"inst": "vmovapd W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F.W1 28 /r" , "vl": 1}, + {"inst": "vmovapd W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W1 29 /r" , "vl": 1}, + {"inst": "vmovapd W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F.W1 28 /r" , "vl": 1}, + {"inst": "vmovapd W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W1 29 /r" , "vl": 1}, + {"inst": "vmovapd W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F.W1 28 /r" , "vl": 0}, + {"inst": "vmovapd W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W1 29 /r" , "vl": 0}, + {"inst": "vmovaps W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.0F.W0 28 /r" , "vl": 1}, + {"inst": "vmovaps W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.0F.W0 29 /r" , "vl": 1}, + {"inst": "vmovaps W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.0F.W0 28 /r" , "vl": 1}, + {"inst": "vmovaps W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.0F.W0 29 /r" , "vl": 1}, + {"inst": "vmovaps W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.0F.W0 28 /r" , "vl": 0}, + {"inst": "vmovaps W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.0F.W0 29 /r" , "vl": 0}, + {"inst": "vmovd W:r32/m32, xmm[31:0]" , "op": "MR-T1S: EVEX.128.66.0F.W0 7E /r" , "vl": 0}, + {"inst": "vmovd W:xmm[31:0], r32/m32" , "op": "RM-T1S: EVEX.128.66.0F.W0 6E /r" , "vl": 0}, + {"inst": "vmovddup W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-DUP: EVEX.128.F2.0F.W1 12 /r" , "vl": 1}, + {"inst": "vmovddup W:ymm {kz}, ymm/m256" , "op": "RM-DUP: EVEX.256.F2.0F.W1 12 /r" , "vl": 1}, + {"inst": "vmovddup W:zmm {kz}, zmm/m512" , "op": "RM-DUP: EVEX.512.F2.0F.W1 12 /r" , "vl": 0}, + {"inst": "vmovdqa32 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F.W0 6F /r" , "vl": 1}, + {"inst": "vmovdqa32 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W0 7F /r" , "vl": 1}, + {"inst": "vmovdqa32 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F.W0 6F /r" , "vl": 1}, + {"inst": "vmovdqa32 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W0 7F /r" , "vl": 1}, + {"inst": "vmovdqa32 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F.W0 6F /r" , "vl": 0}, + {"inst": "vmovdqa32 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W0 7F /r" , "vl": 0}, + {"inst": "vmovdqa64 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F.W1 6F /r" , "vl": 1}, + {"inst": "vmovdqa64 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W1 7F /r" , "vl": 1}, + {"inst": "vmovdqa64 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F.W1 6F /r" , "vl": 1}, + {"inst": "vmovdqa64 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W1 7F /r" , "vl": 1}, + {"inst": "vmovdqa64 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F.W1 6F /r" , "vl": 0}, + {"inst": "vmovdqa64 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W1 7F /r" , "vl": 0}, + {"inst": "vmovdqu32 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.F3.0F.W0 6F /r" , "vl": 1}, + {"inst": "vmovdqu32 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.F3.0F.W0 7F /r" , "vl": 1}, + {"inst": "vmovdqu32 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.F3.0F.W0 6F /r" , "vl": 1}, + {"inst": "vmovdqu32 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.F3.0F.W0 7F /r" , "vl": 1}, + {"inst": "vmovdqu32 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.F3.0F.W0 6F /r" , "vl": 0}, + {"inst": "vmovdqu32 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.F3.0F.W0 7F /r" , "vl": 0}, + {"inst": "vmovdqu64 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.F3.0F.W1 6F /r" , "vl": 1}, + {"inst": "vmovdqu64 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.F3.0F.W1 7F /r" , "vl": 1}, + {"inst": "vmovdqu64 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.F3.0F.W1 6F /r" , "vl": 1}, + {"inst": "vmovdqu64 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.F3.0F.W1 7F /r" , "vl": 1}, + {"inst": "vmovdqu64 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.F3.0F.W1 6F /r" , "vl": 0}, + {"inst": "vmovdqu64 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.F3.0F.W1 7F /r" , "vl": 0}, + {"inst": "vmovhlps W:xmm, xmm[127:64], xmm[127:64]" , "op": "RVM: EVEX.128.0F.W0 12 /r" , "vl": 0}, + {"inst": "vmovhpd W:m64, xmm[127:64]" , "op": "MR-T1S: EVEX.128.66.0F.W1 17 /r" , "vl": 0}, + {"inst": "vmovhpd W:xmm, xmm[63:0], m64" , "op": "RVM-T1S: EVEX.128.66.0F.W1 16 /r" , "vl": 0}, + {"inst": "vmovhps W:m64, xmm[127:64]" , "op": "MR-T2: EVEX.128.0F.W0 17 /r" , "vl": 0}, + {"inst": "vmovhps W:xmm, xmm[63:0], m64" , "op": "RVM-T2: EVEX.128.0F.W0 16 /r" , "vl": 0}, + {"inst": "vmovlhps W:xmm, xmm[63:0], xmm[63:0]" , "op": "RVM: EVEX.128.0F.W0 16 /r" , "vl": 0}, + {"inst": "vmovlpd W:m64, xmm[63:0]" , "op": "MR-T1S: EVEX.128.66.0F.W1 13 /r" , "vl": 0}, + {"inst": "vmovlpd W:xmm, xmm[127:64], m64" , "op": "RVM-T1S: EVEX.128.66.0F.W1 12 /r" , "vl": 0}, + {"inst": "vmovlps W:m64, xmm[63:0]" , "op": "MR-T2: EVEX.128.0F.W0 13 /r" , "vl": 0}, + {"inst": "vmovlps W:xmm, xmm[127:64], m64" , "op": "RVM-T2: EVEX.128.0F.W0 12 /r" , "vl": 0}, + {"inst": "vmovntdq W:m128, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W0 E7 /r" , "vl": 1}, + {"inst": "vmovntdq W:m256, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W0 E7 /r" , "vl": 1}, + {"inst": "vmovntdq W:m512, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W0 E7 /r" , "vl": 0}, + {"inst": "vmovntdqa W:xmm, m128" , "op": "RM-FVM: EVEX.128.66.0F38.W0 2A /r" , "vl": 1}, + {"inst": "vmovntdqa W:ymm, m256" , "op": "RM-FVM: EVEX.256.66.0F38.W0 2A /r" , "vl": 1}, + {"inst": "vmovntdqa W:zmm, m512" , "op": "RM-FVM: EVEX.512.66.0F38.W0 2A /r" , "vl": 0}, + {"inst": "vmovntpd W:m128, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W1 2B /r" , "vl": 1}, + {"inst": "vmovntpd W:m256, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W1 2B /r" , "vl": 1}, + {"inst": "vmovntpd W:m512, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W1 2B /r" , "vl": 0}, + {"inst": "vmovntps W:m128, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W0 2B /r" , "vl": 1}, + {"inst": "vmovntps W:m256, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W0 2B /r" , "vl": 1}, + {"inst": "vmovntps W:m512, zmm" , "op": "MR-FVM: EVEX.512.0F.W0 2B /r" , "vl": 0}, + {"inst": "vmovq W:r64/m64, xmm[63:0]" , "op": "MR-T1S: EVEX.128.66.0F.W1 7E /r" , "vl": 0}, + {"inst": "vmovq W:xmm[63:0], r64/m64" , "op": "RM-T1S: EVEX.128.66.0F.W1 6E /r" , "vl": 0}, + {"inst": "vmovq W:xmm[63:0], xmm[63:0]/m64" , "op": "RM-T1S: EVEX.128.F3.0F.W1 7E /r" , "vl": 0}, + {"inst": "vmovq W:xmm[63:0]/m64, xmm[63:0]" , "op": "MR-T1S: EVEX.128.66.0F.W1 D6 /r" , "vl": 0}, + {"inst": "vmovshdup W:xmm {kz}, xmm/m128" , "op": "RVM-FVM: EVEX.128.F3.0F.W0 16 /r" , "vl": 1}, + {"inst": "vmovshdup W:ymm {kz}, ymm/m256" , "op": "RVM-FVM: EVEX.256.F3.0F.W0 16 /r" , "vl": 1}, + {"inst": "vmovshdup W:zmm {kz}, zmm/m512" , "op": "RVM-FVM: EVEX.512.F3.0F.W0 16 /r" , "vl": 0}, + {"inst": "vmovsldup W:xmm {kz}, xmm/m128" , "op": "RVM-FVM: EVEX.128.F3.0F.W0 12 /r" , "vl": 1}, + {"inst": "vmovsldup W:ymm {kz}, ymm/m256" , "op": "RVM-FVM: EVEX.256.F3.0F.W0 12 /r" , "vl": 1}, + {"inst": "vmovsldup W:zmm {kz}, zmm/m512" , "op": "RVM-FVM: EVEX.512.F3.0F.W0 12 /r" , "vl": 0}, + {"inst": "vmovupd W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F.W1 10 /r" , "vl": 1}, + {"inst": "vmovupd W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W1 11 /r" , "vl": 1}, + {"inst": "vmovupd W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F.W1 11 /r" , "vl": 1}, + {"inst": "vmovupd W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W1 10 /r" , "vl": 1}, + {"inst": "vmovupd W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F.W1 10 /r" , "vl": 0}, + {"inst": "vmovupd W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W1 11 /r" , "vl": 0}, + {"inst": "vmovups W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.0F.W0 10 /r" , "vl": 1}, + {"inst": "vmovups W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.0F.W0 11 /r" , "vl": 1}, + {"inst": "vmovups W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.0F.W0 10 /r" , "vl": 1}, + {"inst": "vmovups W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.0F.W0 11 /r" , "vl": 1}, + {"inst": "vmovups W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.0F.W0 10 /r" , "vl": 0}, + {"inst": "vmovups W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.0F.W0 11 /r" , "vl": 0}, + {"inst": "vmulpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 59 /r" , "vl": 1}, + {"inst": "vmulpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 59 /r" , "vl": 1}, + {"inst": "vmulpd W:zmm {kz}, ~zmm, ~zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F.W1 59 /r" , "vl": 0}, + {"inst": "vmulps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 59 /r" , "vl": 1}, + {"inst": "vmulps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 59 /r" , "vl": 1}, + {"inst": "vmulps W:zmm {kz}, ~zmm, ~zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.0F.W0 59 /r" , "vl": 0}, + {"inst": "vpabsd W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 1E /r" , "vl": 1}, + {"inst": "vpabsd W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 1E /r" , "vl": 1}, + {"inst": "vpabsd W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 1E /r" , "vl": 0}, + {"inst": "vpabsq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 1F /r" , "vl": 1}, + {"inst": "vpabsq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 1F /r" , "vl": 1}, + {"inst": "vpabsq W:zmm {kz}, zmm/m512/b64" , "op": "RM-FV: EVEX.512.66.0F38.W1 1F /r" , "vl": 0}, + {"inst": "vpaddd W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 FE /r" , "vl": 1}, + {"inst": "vpaddd W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 FE /r" , "vl": 1}, + {"inst": "vpaddd W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 FE /r" , "vl": 0}, + {"inst": "vpaddq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 D4 /r" , "vl": 1}, + {"inst": "vpaddq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 D4 /r" , "vl": 1}, + {"inst": "vpaddq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 D4 /r" , "vl": 0}, + {"inst": "vpandd W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 DB /r" , "vl": 1}, + {"inst": "vpandd W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 DB /r" , "vl": 1}, + {"inst": "vpandd W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 DB /r" , "vl": 0}, + {"inst": "vpandnd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 DF /r" , "vl": 1}, + {"inst": "vpandnd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 DF /r" , "vl": 1}, + {"inst": "vpandnd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 DF /r" , "vl": 0}, + {"inst": "vpandnq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 DF /r" , "vl": 1}, + {"inst": "vpandnq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 DF /r" , "vl": 1}, + {"inst": "vpandnq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 DF /r" , "vl": 0}, + {"inst": "vpandq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 DB /r" , "vl": 1}, + {"inst": "vpandq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 DB /r" , "vl": 1}, + {"inst": "vpandq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 DB /r" , "vl": 0}, + {"inst": "vpblendmd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 64 /r" , "vl": 1, "k": "blend"}, + {"inst": "vpblendmd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 64 /r" , "vl": 1, "k": "blend"}, + {"inst": "vpblendmd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 64 /r" , "vl": 0, "k": "blend"}, + {"inst": "vpblendmq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 64 /r" , "vl": 1, "k": "blend"}, + {"inst": "vpblendmq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 64 /r" , "vl": 1, "k": "blend"}, + {"inst": "vpblendmq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 64 /r" , "vl": 0, "k": "blend"}, + {"inst": "vpbroadcastd W:xmm {kz}, r32[31:0]" , "op": "RM-T1S: EVEX.128.66.0F38.W0 7C /r" , "vl": 1}, + {"inst": "vpbroadcastd W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.128.66.0F38.W0 58 /r" , "vl": 1}, + {"inst": "vpbroadcastd W:ymm {kz}, r32[31:0]" , "op": "RM-T1S: EVEX.256.66.0F38.W0 7C /r" , "vl": 1}, + {"inst": "vpbroadcastd W:ymm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.256.66.0F38.W0 58 /r" , "vl": 1}, + {"inst": "vpbroadcastd W:zmm {kz}, r32[31:0]" , "op": "RM-T1S: EVEX.512.66.0F38.W0 7C /r" , "vl": 0}, + {"inst": "vpbroadcastd W:zmm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.512.66.0F38.W0 58 /r" , "vl": 0}, + {"inst": "vpbroadcastq W:xmm {kz}, r64" , "op": "RM-T1S: EVEX.128.66.0F38.W1 7C /r" , "vl": 1}, + {"inst": "vpbroadcastq W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.128.66.0F38.W1 59 /r" , "vl": 1}, + {"inst": "vpbroadcastq W:ymm {kz}, r64" , "op": "RM-T1S: EVEX.256.66.0F38.W1 7C /r" , "vl": 1}, + {"inst": "vpbroadcastq W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.256.66.0F38.W1 59 /r" , "vl": 1}, + {"inst": "vpbroadcastq W:zmm {kz}, r64" , "op": "RM-T1S: EVEX.512.66.0F38.W1 7C /r" , "vl": 0}, + {"inst": "vpbroadcastq W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.512.66.0F38.W1 59 /r" , "vl": 0}, + {"inst": "vpcmpd W:k {k}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 1F /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpd W:k {k}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 1F /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpd W:k {k}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 1F /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpeqd W:k {k}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FVM: EVEX.128.66.0F.W0 76 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpeqd W:k {k}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FVM: EVEX.256.66.0F.W0 76 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpeqd W:k {k}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FVM: EVEX.512.66.0F.W0 76 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpeqq W:k {k}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 29 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpeqq W:k {k}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 29 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpeqq W:k {k}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 29 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpgtd W:k {k}, xmm, xmm/m128/b32" , "op": "RVM-FVM: EVEX.128.66.0F.W0 66 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpgtd W:k {k}, ymm, ymm/m256/b32" , "op": "RVM-FVM: EVEX.256.66.0F.W0 66 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpgtd W:k {k}, zmm, zmm/m512/b32" , "op": "RVM-FVM: EVEX.512.66.0F.W0 66 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpgtq W:k {k}, xmm, xmm/m128/b64" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 37 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpgtq W:k {k}, ymm, ymm/m256/b64" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 37 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpgtq W:k {k}, zmm, zmm/m512/b64" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 37 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpq W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 1F /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpq W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 1F /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpq W:k {k}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 1F /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpud W:k {k}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 1E /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpud W:k {k}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 1E /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpud W:k {k}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 1E /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpuq W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 1E /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpuq W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 1E /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpuq W:k {k}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 1E /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcompressd W:xmm/m128 {kz}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 8B /r" , "vl": 1}, + {"inst": "vpcompressd W:ymm/m256 {kz}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 8B /r" , "vl": 1}, + {"inst": "vpcompressd W:zmm/m512 {kz}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 8B /r" , "vl": 0}, + {"inst": "vpcompressq W:xmm/m128 {kz}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 8B /r" , "vl": 1}, + {"inst": "vpcompressq W:ymm/m256 {kz}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 8B /r" , "vl": 1}, + {"inst": "vpcompressq W:zmm/m512 {kz}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 8B /r" , "vl": 0}, + {"inst": "vpermd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 36 /r" , "vl": 1}, + {"inst": "vpermd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 36 /r" , "vl": 0}, + {"inst": "vpermi2d X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 76 /r" , "vl": 1}, + {"inst": "vpermi2d X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 76 /r" , "vl": 1}, + {"inst": "vpermi2d X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 76 /r" , "vl": 0}, + {"inst": "vpermi2pd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 77 /r" , "vl": 1}, + {"inst": "vpermi2pd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 77 /r" , "vl": 1}, + {"inst": "vpermi2pd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 77 /r" , "vl": 0}, + {"inst": "vpermi2ps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 77 /r" , "vl": 1}, + {"inst": "vpermi2ps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 77 /r" , "vl": 1}, + {"inst": "vpermi2ps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 77 /r" , "vl": 0}, + {"inst": "vpermi2q X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 76 /r" , "vl": 1}, + {"inst": "vpermi2q X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 76 /r" , "vl": 1}, + {"inst": "vpermi2q X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 76 /r" , "vl": 0}, + {"inst": "vpermilpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 0D /r" , "vl": 1}, + {"inst": "vpermilpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 0D /r" , "vl": 1}, + {"inst": "vpermilpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 0D /r" , "vl": 0}, + {"inst": "vpermilpd W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 05 /r ib" , "vl": 1}, + {"inst": "vpermilpd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 05 /r ib" , "vl": 1}, + {"inst": "vpermilpd W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 05 /r ib" , "vl": 0}, + {"inst": "vpermilps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 0C /r" , "vl": 1}, + {"inst": "vpermilps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 0C /r" , "vl": 1}, + {"inst": "vpermilps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 0C /r" , "vl": 0}, + {"inst": "vpermilps W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 04 /r ib" , "vl": 1}, + {"inst": "vpermilps W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 04 /r ib" , "vl": 1}, + {"inst": "vpermilps W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W0 04 /r ib" , "vl": 0}, + {"inst": "vpermpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 16 /r" , "vl": 1}, + {"inst": "vpermpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 16 /r" , "vl": 0}, + {"inst": "vpermpd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 01 /r ib" , "vl": 1}, + {"inst": "vpermpd W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 01 /r ib" , "vl": 0}, + {"inst": "vpermps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 16 /r" , "vl": 1}, + {"inst": "vpermps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 16 /r" , "vl": 0}, + {"inst": "vpermq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 36 /r" , "vl": 1}, + {"inst": "vpermq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 36 /r" , "vl": 0}, + {"inst": "vpermq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 00 /r ib" , "vl": 1}, + {"inst": "vpermq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 00 /r ib" , "vl": 0}, + {"inst": "vpermt2d X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 7E /r" , "vl": 1}, + {"inst": "vpermt2d X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 7E /r" , "vl": 1}, + {"inst": "vpermt2d X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 7E /r" , "vl": 0}, + {"inst": "vpermt2pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 7F /r" , "vl": 1}, + {"inst": "vpermt2pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 7F /r" , "vl": 1}, + {"inst": "vpermt2pd X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 7F /r" , "vl": 0}, + {"inst": "vpermt2ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 7F /r" , "vl": 1}, + {"inst": "vpermt2ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 7F /r" , "vl": 1}, + {"inst": "vpermt2ps X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 7F /r" , "vl": 0}, + {"inst": "vpermt2q X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 7E /r" , "vl": 1}, + {"inst": "vpermt2q X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 7E /r" , "vl": 1}, + {"inst": "vpermt2q X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 7E /r" , "vl": 0}, + {"inst": "vpexpandd W:xmm {kz}, xmm/m128" , "op": "RM-T1S: EVEX.128.66.0F38.W0 89 /r" , "vl": 1}, + {"inst": "vpexpandd W:ymm {kz}, ymm/m256" , "op": "RM-T1S: EVEX.256.66.0F38.W0 89 /r" , "vl": 1}, + {"inst": "vpexpandd W:zmm {kz}, zmm/m512" , "op": "RM-T1S: EVEX.512.66.0F38.W0 89 /r" , "vl": 0}, + {"inst": "vpexpandq W:xmm {kz}, xmm/m128" , "op": "RM-T1S: EVEX.128.66.0F38.W1 89 /r" , "vl": 1}, + {"inst": "vpexpandq W:ymm {kz}, ymm/m256" , "op": "RM-T1S: EVEX.256.66.0F38.W1 89 /r" , "vl": 1}, + {"inst": "vpexpandq W:zmm {kz}, zmm/m512" , "op": "RM-T1S: EVEX.512.66.0F38.W1 89 /r" , "vl": 0}, + {"inst": "vpgatherdd X:xmm {k}, vm32x" , "op": "RM-T1S: EVEX.128.66.0F38.W0 90" , "vl": 1}, + {"inst": "vpgatherdd X:ymm {k}, vm32y" , "op": "RM-T1S: EVEX.256.66.0F38.W0 90" , "vl": 1}, + {"inst": "vpgatherdd X:zmm {k}, vm32z" , "op": "RM-T1S: EVEX.512.66.0F38.W0 90" , "vl": 0}, + {"inst": "vpgatherdq X:xmm {k}, vm32x" , "op": "RM-T1S: EVEX.128.66.0F38.W1 90" , "vl": 1}, + {"inst": "vpgatherdq X:ymm {k}, vm32x" , "op": "RM-T1S: EVEX.256.66.0F38.W1 90" , "vl": 1}, + {"inst": "vpgatherdq X:zmm {k}, vm32y" , "op": "RM-T1S: EVEX.512.66.0F38.W1 90" , "vl": 0}, + {"inst": "vpgatherqd X:xmm {k}, vm64x" , "op": "RM-T1S: EVEX.128.66.0F38.W0 91" , "vl": 1}, + {"inst": "vpgatherqd X:xmm {k}, vm64y" , "op": "RM-T1S: EVEX.256.66.0F38.W0 91" , "vl": 1}, + {"inst": "vpgatherqd X:ymm {k}, vm64z" , "op": "RM-T1S: EVEX.512.66.0F38.W0 91" , "vl": 0}, + {"inst": "vpgatherqq X:xmm {k}, vm64x" , "op": "RM-T1S: EVEX.128.66.0F38.W1 91" , "vl": 1}, + {"inst": "vpgatherqq X:ymm {k}, vm64y" , "op": "RM-T1S: EVEX.256.66.0F38.W1 91" , "vl": 1}, + {"inst": "vpgatherqq X:zmm {k}, vm64z" , "op": "RM-T1S: EVEX.512.66.0F38.W1 91" , "vl": 0}, + {"inst": "vpmaxsd W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 3D /r" , "vl": 1}, + {"inst": "vpmaxsd W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 3D /r" , "vl": 1}, + {"inst": "vpmaxsd W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 3D /r" , "vl": 0}, + {"inst": "vpmaxsq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 3D /r" , "vl": 1}, + {"inst": "vpmaxsq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 3D /r" , "vl": 1}, + {"inst": "vpmaxsq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 3D /r" , "vl": 0}, + {"inst": "vpmaxud W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 3F /r" , "vl": 1}, + {"inst": "vpmaxud W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 3F /r" , "vl": 1}, + {"inst": "vpmaxud W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 3F /r" , "vl": 0}, + {"inst": "vpmaxuq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 3F /r" , "vl": 1}, + {"inst": "vpmaxuq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 3F /r" , "vl": 1}, + {"inst": "vpmaxuq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 3F /r" , "vl": 0}, + {"inst": "vpminsd W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 39 /r" , "vl": 1}, + {"inst": "vpminsd W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 39 /r" , "vl": 1}, + {"inst": "vpminsd W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 39 /r" , "vl": 0}, + {"inst": "vpminsq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 39 /r" , "vl": 1}, + {"inst": "vpminsq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 39 /r" , "vl": 1}, + {"inst": "vpminsq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 39 /r" , "vl": 0}, + {"inst": "vpminud W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 3B /r" , "vl": 1}, + {"inst": "vpminud W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 3B /r" , "vl": 1}, + {"inst": "vpminud W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 3B /r" , "vl": 0}, + {"inst": "vpminuq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 3B /r" , "vl": 1}, + {"inst": "vpminuq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 3B /r" , "vl": 1}, + {"inst": "vpminuq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 3B /r" , "vl": 0}, + {"inst": "vpmovdb W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 31 /r" , "vl": 1}, + {"inst": "vpmovdb W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 31 /r" , "vl": 1}, + {"inst": "vpmovdb W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 31 /r" , "vl": 0}, + {"inst": "vpmovdw W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 33 /r" , "vl": 1}, + {"inst": "vpmovdw W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 33 /r" , "vl": 1}, + {"inst": "vpmovdw W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 33 /r" , "vl": 0}, + {"inst": "vpmovqb W:xmm[15:0]/m16 {kz}, xmm" , "op": "MR-OVM: EVEX.128.F3.0F38.W0 32 /r" , "vl": 1}, + {"inst": "vpmovqb W:xmm[31:0]/m32 {kz}, ymm" , "op": "MR-OVM: EVEX.256.F3.0F38.W0 32 /r" , "vl": 1}, + {"inst": "vpmovqb W:xmm[63:0]/m64 {kz}, zmm" , "op": "MR-OVM: EVEX.512.F3.0F38.W0 32 /r" , "vl": 0}, + {"inst": "vpmovqd W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 35 /r" , "vl": 1}, + {"inst": "vpmovqd W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 35 /r" , "vl": 1}, + {"inst": "vpmovqd W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 35 /r" , "vl": 0}, + {"inst": "vpmovqw W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 34 /r" , "vl": 1}, + {"inst": "vpmovqw W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 34 /r" , "vl": 1}, + {"inst": "vpmovqw W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 34 /r" , "vl": 0}, + {"inst": "vpmovsdb W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 21 /r" , "vl": 1}, + {"inst": "vpmovsdb W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 21 /r" , "vl": 1}, + {"inst": "vpmovsdb W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 21 /r" , "vl": 0}, + {"inst": "vpmovsdw W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 23 /r" , "vl": 1}, + {"inst": "vpmovsdw W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 23 /r" , "vl": 1}, + {"inst": "vpmovsdw W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 23 /r" , "vl": 0}, + {"inst": "vpmovsqb W:xmm[15:0]/m16 {kz}, xmm" , "op": "MR-OVM: EVEX.128.F3.0F38.W0 22 /r" , "vl": 1}, + {"inst": "vpmovsqb W:xmm[31:0]/m32 {kz}, ymm" , "op": "MR-OVM: EVEX.256.F3.0F38.W0 22 /r" , "vl": 1}, + {"inst": "vpmovsqb W:xmm[63:0]/m64 {kz}, zmm" , "op": "MR-OVM: EVEX.512.F3.0F38.W0 22 /r" , "vl": 0}, + {"inst": "vpmovsqd W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 25 /r" , "vl": 1}, + {"inst": "vpmovsqd W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 25 /r" , "vl": 1}, + {"inst": "vpmovsqd W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 25 /r" , "vl": 0}, + {"inst": "vpmovsqw W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 24 /r" , "vl": 1}, + {"inst": "vpmovsqw W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 24 /r" , "vl": 1}, + {"inst": "vpmovsqw W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 24 /r" , "vl": 0}, + {"inst": "vpmovsxbd W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-QVM: EVEX.128.66.0F38.WIG 21 /r" , "vl": 1}, + {"inst": "vpmovsxbd W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-QVM: EVEX.256.66.0F38.WIG 21 /r" , "vl": 1}, + {"inst": "vpmovsxbd W:zmm {kz}, xmm/m128" , "op": "RM-QVM: EVEX.512.66.0F38.WIG 21 /r" , "vl": 0}, + {"inst": "vpmovsxbq W:xmm {kz}, xmm[15:0]/m16" , "op": "RM-OVM: EVEX.128.66.0F38.WIG 22 /r" , "vl": 1}, + {"inst": "vpmovsxbq W:ymm {kz}, xmm[31:0]/m32" , "op": "RM-OVM: EVEX.256.66.0F38.WIG 22 /r" , "vl": 1}, + {"inst": "vpmovsxbq W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-OVM: EVEX.512.66.0F38.WIG 22 /r" , "vl": 0}, + {"inst": "vpmovsxdq W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.W0 25 /r" , "vl": 1}, + {"inst": "vpmovsxdq W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.W0 25 /r" , "vl": 1}, + {"inst": "vpmovsxdq W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.W0 25 /r" , "vl": 0}, + {"inst": "vpmovsxwd W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.WIG 23 /r" , "vl": 1}, + {"inst": "vpmovsxwd W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.WIG 23 /r" , "vl": 1}, + {"inst": "vpmovsxwd W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.WIG 23 /r" , "vl": 0}, + {"inst": "vpmovsxwq W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-QVM: EVEX.128.66.0F38.WIG 24 /r" , "vl": 1}, + {"inst": "vpmovsxwq W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-QVM: EVEX.256.66.0F38.WIG 24 /r" , "vl": 1}, + {"inst": "vpmovsxwq W:zmm {kz}, xmm/m128" , "op": "RM-QVM: EVEX.512.66.0F38.WIG 24 /r" , "vl": 0}, + {"inst": "vpmovusdb W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 11 /r" , "vl": 1}, + {"inst": "vpmovusdb W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 11 /r" , "vl": 1}, + {"inst": "vpmovusdb W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 11 /r" , "vl": 0}, + {"inst": "vpmovusdw W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 13 /r" , "vl": 1}, + {"inst": "vpmovusdw W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 13 /r" , "vl": 1}, + {"inst": "vpmovusdw W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 13 /r" , "vl": 0}, + {"inst": "vpmovusqb W:xmm[15:0]/m16 {kz}, xmm" , "op": "MR-OVM: EVEX.128.F3.0F38.W0 12 /r" , "vl": 1}, + {"inst": "vpmovusqb W:xmm[31:0]/m32 {kz}, ymm" , "op": "MR-OVM: EVEX.256.F3.0F38.W0 12 /r" , "vl": 1}, + {"inst": "vpmovusqb W:xmm[63:0]/m64 {kz}, zmm" , "op": "MR-OVM: EVEX.512.F3.0F38.W0 12 /r" , "vl": 0}, + {"inst": "vpmovusqd W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 15 /r" , "vl": 1}, + {"inst": "vpmovusqd W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 15 /r" , "vl": 1}, + {"inst": "vpmovusqd W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 15 /r" , "vl": 0}, + {"inst": "vpmovusqw W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 14 /r" , "vl": 1}, + {"inst": "vpmovusqw W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 14 /r" , "vl": 1}, + {"inst": "vpmovusqw W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 14 /r" , "vl": 0}, + {"inst": "vpmovzxbd W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-QVM: EVEX.128.66.0F38.WIG 31 /r" , "vl": 1}, + {"inst": "vpmovzxbd W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-QVM: EVEX.256.66.0F38.WIG 31 /r" , "vl": 1}, + {"inst": "vpmovzxbd W:zmm {kz}, xmm/m128" , "op": "RM-QVM: EVEX.512.66.0F38.WIG 31 /r" , "vl": 0}, + {"inst": "vpmovzxbq W:xmm {kz}, xmm[15:0]/m16" , "op": "RM-OVM: EVEX.128.66.0F38.WIG 32 /r" , "vl": 1}, + {"inst": "vpmovzxbq W:ymm {kz}, xmm[31:0]/m32" , "op": "RM-OVM: EVEX.256.66.0F38.WIG 32 /r" , "vl": 1}, + {"inst": "vpmovzxbq W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-OVM: EVEX.512.66.0F38.WIG 32 /r" , "vl": 0}, + {"inst": "vpmovzxdq W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.W0 35 /r" , "vl": 1}, + {"inst": "vpmovzxdq W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.W0 35 /r" , "vl": 1}, + {"inst": "vpmovzxdq W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.W0 35 /r" , "vl": 0}, + {"inst": "vpmovzxwd W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.WIG 33 /r" , "vl": 1}, + {"inst": "vpmovzxwd W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.WIG 33 /r" , "vl": 1}, + {"inst": "vpmovzxwd W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.WIG 33 /r" , "vl": 0}, + {"inst": "vpmovzxwq W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-QVM: EVEX.128.66.0F38.WIG 34 /r" , "vl": 1}, + {"inst": "vpmovzxwq W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-QVM: EVEX.256.66.0F38.WIG 34 /r" , "vl": 1}, + {"inst": "vpmovzxwq W:zmm {kz}, xmm/m128" , "op": "RM-QVM: EVEX.512.66.0F38.WIG 34 /r" , "vl": 0}, + {"inst": "vpmuldq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 28 /r" , "vl": 1}, + {"inst": "vpmuldq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 28 /r" , "vl": 1}, + {"inst": "vpmuldq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 28 /r" , "vl": 0}, + {"inst": "vpmulld W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 40 /r" , "vl": 1}, + {"inst": "vpmulld W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 40 /r" , "vl": 1}, + {"inst": "vpmulld W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 40 /r" , "vl": 0}, + {"inst": "vpmuludq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 F4 /r" , "vl": 1}, + {"inst": "vpmuludq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 F4 /r" , "vl": 1}, + {"inst": "vpmuludq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 F4 /r" , "vl": 0}, + {"inst": "vpord W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 EB /r" , "vl": 1}, + {"inst": "vpord W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 EB /r" , "vl": 1}, + {"inst": "vpord W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 EB /r" , "vl": 0}, + {"inst": "vporq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 EB /r" , "vl": 1}, + {"inst": "vporq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 EB /r" , "vl": 1}, + {"inst": "vporq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 EB /r" , "vl": 0}, + {"inst": "vprold W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /1 ib" , "vl": 1}, + {"inst": "vprold W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /1 ib" , "vl": 1}, + {"inst": "vprold W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /1 ib" , "vl": 0}, + {"inst": "vprolq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 72 /1 ib" , "vl": 1}, + {"inst": "vprolq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 72 /1 ib" , "vl": 1}, + {"inst": "vprolq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 72 /1 ib" , "vl": 0}, + {"inst": "vprolvd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 15 /r" , "vl": 1}, + {"inst": "vprolvd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 15 /r" , "vl": 1}, + {"inst": "vprolvd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 15 /r" , "vl": 0}, + {"inst": "vprolvq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 15 /r" , "vl": 1}, + {"inst": "vprolvq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 15 /r" , "vl": 1}, + {"inst": "vprolvq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 15 /r" , "vl": 0}, + {"inst": "vprord W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /0 ib" , "vl": 1}, + {"inst": "vprord W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /0 ib" , "vl": 1}, + {"inst": "vprord W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /0 ib" , "vl": 0}, + {"inst": "vprorq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 72 /0 ib" , "vl": 1}, + {"inst": "vprorq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 72 /0 ib" , "vl": 1}, + {"inst": "vprorq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 72 /0 ib" , "vl": 0}, + {"inst": "vprorvd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 14 /r" , "vl": 1}, + {"inst": "vprorvd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 14 /r" , "vl": 1}, + {"inst": "vprorvd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 14 /r" , "vl": 0}, + {"inst": "vprorvq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 14 /r" , "vl": 1}, + {"inst": "vprorvq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 14 /r" , "vl": 1}, + {"inst": "vprorvq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 14 /r" , "vl": 0}, + {"inst": "vpscatterdd W:vm32x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 A0 /r" , "vl": 1}, + {"inst": "vpscatterdd W:vm32y {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 A0 /r" , "vl": 1}, + {"inst": "vpscatterdd W:vm32z {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 A0 /r" , "vl": 0}, + {"inst": "vpscatterdq W:vm32x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 A0 /r" , "vl": 1}, + {"inst": "vpscatterdq W:vm32x {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 A0 /r" , "vl": 1}, + {"inst": "vpscatterdq W:vm32y {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 A0 /r" , "vl": 0}, + {"inst": "vpscatterqd W:vm64x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 A1 /r" , "vl": 1}, + {"inst": "vpscatterqd W:vm64y {k}, xmm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 A1 /r" , "vl": 1}, + {"inst": "vpscatterqd W:vm64z {k}, ymm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 A1 /r" , "vl": 0}, + {"inst": "vpscatterqq W:vm64x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 A1 /r" , "vl": 1}, + {"inst": "vpscatterqq W:vm64y {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 A1 /r" , "vl": 1}, + {"inst": "vpscatterqq W:vm64z {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 A1 /r" , "vl": 0}, + {"inst": "vpshufd W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F.W0 70 /r ib" , "vl": 1}, + {"inst": "vpshufd W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F.W0 70 /r ib" , "vl": 1}, + {"inst": "vpshufd W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "RM-FV: EVEX.512.66.0F.W0 70 /r ib" , "vl": 0}, + {"inst": "vpslld W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W0 F2 /r" , "vl": 1}, + {"inst": "vpslld W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /6 ib" , "vl": 1}, + {"inst": "vpslld W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W0 F2 /r" , "vl": 1}, + {"inst": "vpslld W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /6 ib" , "vl": 1}, + {"inst": "vpslld W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W0 F2 /r" , "vl": 0}, + {"inst": "vpslld W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /6 ib" , "vl": 0}, + {"inst": "vpsllq W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W1 F3 /r" , "vl": 1}, + {"inst": "vpsllq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 73 /6 ib" , "vl": 1}, + {"inst": "vpsllq W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W1 F3 /r" , "vl": 1}, + {"inst": "vpsllq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 73 /6 ib" , "vl": 1}, + {"inst": "vpsllq W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W1 F3 /r" , "vl": 0}, + {"inst": "vpsllq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 73 /6 ib" , "vl": 0}, + {"inst": "vpsllvd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 47 /r" , "vl": 1}, + {"inst": "vpsllvd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 47 /r" , "vl": 1}, + {"inst": "vpsllvd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 47 /r" , "vl": 0}, + {"inst": "vpsllvq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 47 /r" , "vl": 1}, + {"inst": "vpsllvq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 47 /r" , "vl": 1}, + {"inst": "vpsllvq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 47 /r" , "vl": 0}, + {"inst": "vpsrad W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W0 E2 /r" , "vl": 1}, + {"inst": "vpsrad W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /4 ib" , "vl": 1}, + {"inst": "vpsrad W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W0 E2 /r" , "vl": 1}, + {"inst": "vpsrad W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /4 ib" , "vl": 1}, + {"inst": "vpsrad W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W0 E2 /r" , "vl": 0}, + {"inst": "vpsrad W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /4 ib" , "vl": 0}, + {"inst": "vpsraq W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W1 E2 /r" , "vl": 1}, + {"inst": "vpsraq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 72 /4 ib" , "vl": 1}, + {"inst": "vpsraq W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W1 E2 /r" , "vl": 1}, + {"inst": "vpsraq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 72 /4 ib" , "vl": 1}, + {"inst": "vpsraq W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W1 E2 /r" , "vl": 0}, + {"inst": "vpsraq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 72 /4 ib" , "vl": 0}, + {"inst": "vpsravd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 46 /r" , "vl": 1}, + {"inst": "vpsravd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 46 /r" , "vl": 1}, + {"inst": "vpsravd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 46 /r" , "vl": 0}, + {"inst": "vpsravq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 46 /r" , "vl": 1}, + {"inst": "vpsravq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 46 /r" , "vl": 1}, + {"inst": "vpsravq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 46 /r" , "vl": 0}, + {"inst": "vpsrld W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W0 D2 /r" , "vl": 1}, + {"inst": "vpsrld W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /2 ib" , "vl": 1}, + {"inst": "vpsrld W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W0 D2 /r" , "vl": 1}, + {"inst": "vpsrld W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /2 ib" , "vl": 1}, + {"inst": "vpsrld W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W0 D2 /r" , "vl": 0}, + {"inst": "vpsrld W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /2 ib" , "vl": 0}, + {"inst": "vpsrlq W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W1 D3 /r" , "vl": 1}, + {"inst": "vpsrlq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 73 /2 ib" , "vl": 1}, + {"inst": "vpsrlq W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W1 D3 /r" , "vl": 1}, + {"inst": "vpsrlq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 73 /2 ib" , "vl": 1}, + {"inst": "vpsrlq W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W1 D3 /r" , "vl": 0}, + {"inst": "vpsrlq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 73 /2 ib" , "vl": 0}, + {"inst": "vpsrlvd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 45 /r" , "vl": 1}, + {"inst": "vpsrlvd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 45 /r" , "vl": 1}, + {"inst": "vpsrlvd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 45 /r" , "vl": 0}, + {"inst": "vpsrlvq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 45 /r" , "vl": 1}, + {"inst": "vpsrlvq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 45 /r" , "vl": 1}, + {"inst": "vpsrlvq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 45 /r" , "vl": 0}, + {"inst": "vpsubd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 FA /r" , "vl": 1}, + {"inst": "vpsubd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 FA /r" , "vl": 1}, + {"inst": "vpsubd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 FA /r" , "vl": 0}, + {"inst": "vpsubq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 FB /r" , "vl": 1}, + {"inst": "vpsubq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 FB /r" , "vl": 1}, + {"inst": "vpsubq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 FB /r" , "vl": 0}, + {"inst": "vpternlogd X:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 25 /r ib" , "vl": 1}, + {"inst": "vpternlogd X:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 25 /r ib" , "vl": 1}, + {"inst": "vpternlogd X:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 25 /r ib" , "vl": 0}, + {"inst": "vpternlogq X:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 25 /r ib" , "vl": 1}, + {"inst": "vpternlogq X:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 25 /r ib" , "vl": 1}, + {"inst": "vpternlogq X:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 25 /r ib" , "vl": 0}, + {"inst": "vptestmd W:k {k}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 27 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestmd W:k {k}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 27 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestmd W:k {k}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 27 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vptestmq W:k {k}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 27 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestmq W:k {k}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 27 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestmq W:k {k}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 27 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vptestnmd W:k {k}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F3.0F38.W0 27 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestnmd W:k {k}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F3.0F38.W0 27 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestnmd W:k {k}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.F3.0F38.W0 27 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vptestnmq W:k {k}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.F3.0F38.W1 27 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestnmq W:k {k}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.F3.0F38.W1 27 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestnmq W:k {k}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.F3.0F38.W1 27 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpunpckhdq W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 6A /r" , "vl": 1}, + {"inst": "vpunpckhdq W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 6A /r" , "vl": 1}, + {"inst": "vpunpckhdq W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 6A /r" , "vl": 0}, + {"inst": "vpunpckhqdq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 6D /r" , "vl": 1}, + {"inst": "vpunpckhqdq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 6D /r" , "vl": 1}, + {"inst": "vpunpckhqdq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 6D /r" , "vl": 0}, + {"inst": "vpunpckldq W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 62 /r" , "vl": 1}, + {"inst": "vpunpckldq W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 62 /r" , "vl": 1}, + {"inst": "vpunpckldq W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 62 /r" , "vl": 0}, + {"inst": "vpunpcklqdq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 6C /r" , "vl": 1}, + {"inst": "vpunpcklqdq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 6C /r" , "vl": 1}, + {"inst": "vpunpcklqdq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 6C /r" , "vl": 0}, + {"inst": "vpxord W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 EF /r" , "vl": 1}, + {"inst": "vpxord W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 EF /r" , "vl": 1}, + {"inst": "vpxord W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 EF /r" , "vl": 0}, + {"inst": "vpxorq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 EF /r" , "vl": 1}, + {"inst": "vpxorq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 EF /r" , "vl": 1}, + {"inst": "vpxorq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 EF /r" , "vl": 0}, + {"inst": "vrcp14pd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 4C /r" , "vl": 1}, + {"inst": "vrcp14pd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 4C /r" , "vl": 1}, + {"inst": "vrcp14pd W:zmm {kz}, zmm/m512/b64" , "op": "RM-FV: EVEX.512.66.0F38.W1 4C /r" , "vl": 0}, + {"inst": "vrcp14ps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 4C /r" , "vl": 1}, + {"inst": "vrcp14ps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 4C /r" , "vl": 1}, + {"inst": "vrcp14ps W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 4C /r" , "vl": 0}, + {"inst": "vrndscalepd W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 09 /r ib" , "vl": 1}, + {"inst": "vrndscalepd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 09 /r ib" , "vl": 1}, + {"inst": "vrndscalepd W:zmm {kz}, zmm/m512/b64, ib/ub {sae}" , "op": "RM-FV: EVEX.512.66.0F3A.W1 09 /r ib" , "vl": 0}, + {"inst": "vrndscaleps W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 08 /r ib" , "vl": 1}, + {"inst": "vrndscaleps W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 08 /r ib" , "vl": 1}, + {"inst": "vrndscaleps W:zmm {kz}, zmm/m512/b32, ib/ub {sae}" , "op": "RM-FV: EVEX.512.66.0F3A.W0 08 /r ib" , "vl": 0}, + {"inst": "vrsqrt14pd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 4E /r" , "vl": 1}, + {"inst": "vrsqrt14pd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 4E /r" , "vl": 1}, + {"inst": "vrsqrt14pd W:zmm {kz}, zmm/m512/b64" , "op": "RM-FV: EVEX.512.66.0F38.W1 4E /r" , "vl": 0}, + {"inst": "vrsqrt14ps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 4E /r" , "vl": 1}, + {"inst": "vrsqrt14ps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 4E /r" , "vl": 1}, + {"inst": "vrsqrt14ps W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 4E /r" , "vl": 0}, + {"inst": "vscalefpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 2C /r" , "vl": 1}, + {"inst": "vscalefpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 2C /r" , "vl": 1}, + {"inst": "vscalefpd W:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 2C /r" , "vl": 0}, + {"inst": "vscalefps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 2C /r" , "vl": 1}, + {"inst": "vscalefps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 2C /r" , "vl": 1}, + {"inst": "vscalefps W:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 2C /r" , "vl": 0}, + {"inst": "vscatterdpd W:vm32x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 A2 /r" , "vl": 1}, + {"inst": "vscatterdpd W:vm32x {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 A2 /r" , "vl": 1}, + {"inst": "vscatterdpd W:vm32y {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 A2 /r" , "vl": 0}, + {"inst": "vscatterdps W:vm32x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 A2 /r" , "vl": 1}, + {"inst": "vscatterdps W:vm32y {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 A2 /r" , "vl": 1}, + {"inst": "vscatterdps W:vm32z {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 A2 /r" , "vl": 0}, + {"inst": "vscatterqpd W:vm64x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 A3" , "vl": 1}, + {"inst": "vscatterqpd W:vm64y {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 A3" , "vl": 1}, + {"inst": "vscatterqpd W:vm64z {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 A3" , "vl": 0}, + {"inst": "vscatterqps W:vm64x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 A3" , "vl": 1}, + {"inst": "vscatterqps W:vm64y {k}, xmm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 A3" , "vl": 1}, + {"inst": "vscatterqps W:vm64z {k}, ymm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 A3" , "vl": 0}, + {"inst": "vshuff32x4 W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 23 /r ib" , "vl": 1}, + {"inst": "vshuff32x4 W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 23 /r ib" , "vl": 0}, + {"inst": "vshuff64x2 W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 23 /r ib" , "vl": 1}, + {"inst": "vshuff64x2 W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 23 /r ib" , "vl": 0}, + {"inst": "vshufi32x4 W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 43 /r ib" , "vl": 1}, + {"inst": "vshufi32x4 W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 43 /r ib" , "vl": 0}, + {"inst": "vshufi64x2 W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 43 /r ib" , "vl": 1}, + {"inst": "vshufi64x2 W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 43 /r ib" , "vl": 0}, + {"inst": "vshufpd W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F.W1 C6 /r ib" , "vl": 1}, + {"inst": "vshufpd W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F.W1 C6 /r ib" , "vl": 1}, + {"inst": "vshufpd W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F.W1 C6 /r ib" , "vl": 0}, + {"inst": "vshufps W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.0F.W0 C6 /r ib" , "vl": 1}, + {"inst": "vshufps W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.0F.W0 C6 /r ib" , "vl": 1}, + {"inst": "vshufps W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.0F.W0 C6 /r ib" , "vl": 0}, + {"inst": "vsqrtpd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 51 /r" , "vl": 1}, + {"inst": "vsqrtpd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 51 /r" , "vl": 1}, + {"inst": "vsqrtpd W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.0F.W1 51 /r" , "vl": 0}, + {"inst": "vsqrtps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.0F.W0 51 /r" , "vl": 1}, + {"inst": "vsqrtps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.0F.W0 51 /r" , "vl": 1}, + {"inst": "vsqrtps W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.0F.W0 51 /r" , "vl": 0}, + {"inst": "vsubpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 5C /r" , "vl": 1}, + {"inst": "vsubpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 5C /r" , "vl": 1}, + {"inst": "vsubpd W:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F.W1 5C /r" , "vl": 0}, + {"inst": "vsubps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 5C /r" , "vl": 1}, + {"inst": "vsubps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 5C /r" , "vl": 1}, + {"inst": "vsubps W:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.0F.W0 5C /r" , "vl": 0}, + {"inst": "vunpckhpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 15 /r" , "vl": 1}, + {"inst": "vunpckhpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 15 /r" , "vl": 1}, + {"inst": "vunpckhpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 15 /r" , "vl": 0}, + {"inst": "vunpckhps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 15 /r" , "vl": 1}, + {"inst": "vunpckhps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 15 /r" , "vl": 1}, + {"inst": "vunpckhps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 15 /r" , "vl": 0}, + {"inst": "vunpcklpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 14 /r" , "vl": 1}, + {"inst": "vunpcklpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 14 /r" , "vl": 1}, + {"inst": "vunpcklpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 14 /r" , "vl": 0}, + {"inst": "vunpcklps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 14 /r" , "vl": 1}, + {"inst": "vunpcklps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 14 /r" , "vl": 1}, + {"inst": "vunpcklps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 14 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD CRYPTO_HASH", "ext": "AVX512_F VAES", "data": [ + {"inst": "vaesdec W:xmm, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG DE /r" , "vl": 1}, + {"inst": "vaesdec W:ymm, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG DE /r" , "vl": 1}, + {"inst": "vaesdec W:zmm, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG DE /r" , "vl": 0}, + {"inst": "vaesdeclast W:xmm, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG DF /r" , "vl": 1}, + {"inst": "vaesdeclast W:ymm, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG DF /r" , "vl": 1}, + {"inst": "vaesdeclast W:zmm, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG DF /r" , "vl": 0}, + {"inst": "vaesenc W:xmm, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG DC /r" , "vl": 1}, + {"inst": "vaesenc W:ymm, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG DC /r" , "vl": 1}, + {"inst": "vaesenc W:zmm, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG DC /r" , "vl": 0}, + {"inst": "vaesenclast W:xmm, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG DD /r" , "vl": 1}, + {"inst": "vaesenclast W:ymm, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG DD /r" , "vl": 1}, + {"inst": "vaesenclast W:zmm, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG DD /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_F GFNI", "data": [ + {"inst": "vgf2p8affineinvqb W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 CF /r ib" , "vl": 1}, + {"inst": "vgf2p8affineinvqb W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 CF /r ib" , "vl": 1}, + {"inst": "vgf2p8affineinvqb W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 CF /r ib" , "vl": 0}, + {"inst": "vgf2p8affineqb W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 CE /r ib" , "vl": 1}, + {"inst": "vgf2p8affineqb W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 CE /r ib" , "vl": 1}, + {"inst": "vgf2p8affineqb W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 CE /r ib" , "vl": 0}, + {"inst": "vgf2p8mulb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 CF /r" , "vl": 1}, + {"inst": "vgf2p8mulb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 CF /r" , "vl": 1}, + {"inst": "vgf2p8mulb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 CF /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_F VPCLMULQDQ", "data": [ + {"inst": "vpclmulqdq W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.WIG 44 /r ib" , "vl": 1}, + {"inst": "vpclmulqdq W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.WIG 44 /r ib" , "vl": 1}, + {"inst": "vpclmulqdq W:zmm, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.WIG 44 /r ib" , "vl": 0} + ]}, + + {"category": "AVX512 SCALAR", "ext": "AVX512_DQ", "data": [ + {"inst": "vfpclasssd W:k {k}, xmm[63:0]/m64, ib/ub" , "op": "RM-T1S: EVEX.LIG.66.0F3A.W1 67 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vfpclassss W:k {k}, xmm[31:0]/m32, ib/ub" , "op": "RM-T1S: EVEX.LIG.66.0F3A.W0 67 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vrangesd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64,ib/ub {sae}", "op": "RVM-T1S: EVEX.LIG.66.0F3A.W1 51 /r ib" , "vl": 0}, + {"inst": "vrangess W:xmm {kz}, xmm[127:32], xmm[31:0]/m32,ib/ub {sae}", "op": "RVM-T1S: EVEX.LIG.66.0F3A.W0 51 /r ib" , "vl": 0}, + {"inst": "vreducesd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64, ib/ub" , "op": "RVM-T1S: EVEX.LIG.66.0F3A.W1 57 /r ib" , "vl": 0}, + {"inst": "vreducess W:xmm {kz}, xmm[127:32], xmm[31:0]/m32, ib/ub" , "op": "RVM-T1S: EVEX.LIG.66.0F3A.W0 57 /r ib" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_DQ", "data": [ + {"inst": "vandnpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 55 /r" , "vl": 1}, + {"inst": "vandnpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 55 /r" , "vl": 1}, + {"inst": "vandnpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 55 /r" , "vl": 0}, + {"inst": "vandnps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.W0 55 /r" , "vl": 1}, + {"inst": "vandnps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.W0 55 /r" , "vl": 1}, + {"inst": "vandnps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.W0 55 /r" , "vl": 0}, + {"inst": "vandpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 54 /r" , "vl": 1}, + {"inst": "vandpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 54 /r" , "vl": 1}, + {"inst": "vandpd W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 54 /r" , "vl": 0}, + {"inst": "vandps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 54 /r" , "vl": 1}, + {"inst": "vandps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 54 /r" , "vl": 1}, + {"inst": "vandps W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 54 /r" , "vl": 0}, + {"inst": "vbroadcastf32x2 W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.256.66.0F38.W0 19 /r" , "vl": 1}, + {"inst": "vbroadcastf32x2 W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.512.66.0F38.W0 19 /r" , "vl": 0}, + {"inst": "vbroadcastf32x8 W:zmm {kz}, m256" , "op": "RM-T8: EVEX.512.66.0F38.W0 1B /r" , "vl": 0}, + {"inst": "vbroadcastf64x2 W:ymm {kz}, m128" , "op": "RM-T2: EVEX.256.66.0F38.W1 1A /r" , "vl": 1}, + {"inst": "vbroadcastf64x2 W:zmm {kz}, m128" , "op": "RM-T2: EVEX.512.66.0F38.W1 1A /r" , "vl": 0}, + {"inst": "vbroadcasti32x2 W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.128.66.0F38.W0 59 /r" , "vl": 1}, + {"inst": "vbroadcasti32x2 W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.256.66.0F38.W0 59 /r" , "vl": 1}, + {"inst": "vbroadcasti32x2 W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.512.66.0F38.W0 59 /r" , "vl": 0}, + {"inst": "vbroadcasti32x8 W:zmm {kz}, m256" , "op": "RM-T8: EVEX.512.66.0F38.W0 5B /r" , "vl": 0}, + {"inst": "vbroadcasti64x2 W:ymm {kz}, m128" , "op": "RM-T2: EVEX.256.66.0F38.W1 5A /r" , "vl": 1}, + {"inst": "vbroadcasti64x2 W:zmm {kz}, m128" , "op": "RM-T2: EVEX.512.66.0F38.W1 5A /r" , "vl": 0}, + {"inst": "vcvtpd2qq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 7B /r" , "vl": 1}, + {"inst": "vcvtpd2qq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 7B /r" , "vl": 1}, + {"inst": "vcvtpd2qq W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.0F.W1 7B /r" , "vl": 0}, + {"inst": "vcvtpd2uqq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 79 /r" , "vl": 1}, + {"inst": "vcvtpd2uqq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 79 /r" , "vl": 1}, + {"inst": "vcvtpd2uqq W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.0F.W1 79 /r" , "vl": 0}, + {"inst": "vcvtps2qq W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.66.0F.W0 7B /r" , "vl": 1}, + {"inst": "vcvtps2qq W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.66.0F.W0 7B /r" , "vl": 1}, + {"inst": "vcvtps2qq W:zmm {kz}, ymm/m256/b32 {er}" , "op": "RM-HV: EVEX.512.66.0F.W0 7B /r" , "vl": 0}, + {"inst": "vcvtps2uqq W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.66.0F.W0 79 /r" , "vl": 1}, + {"inst": "vcvtps2uqq W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.66.0F.W0 79 /r" , "vl": 1}, + {"inst": "vcvtps2uqq W:zmm {kz}, ymm/m256/b32 {er}" , "op": "RM-HV: EVEX.512.66.0F.W0 79 /r" , "vl": 0}, + {"inst": "vcvtqq2pd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F3.0F.W1 E6 /r" , "vl": 1}, + {"inst": "vcvtqq2pd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F3.0F.W1 E6 /r" , "vl": 1}, + {"inst": "vcvtqq2pd W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F3.0F.W1 E6 /r" , "vl": 0}, + {"inst": "vcvtqq2ps W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.0F.W1 5B /r" , "vl": 1}, + {"inst": "vcvtqq2ps W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.0F.W1 5B /r" , "vl": 1}, + {"inst": "vcvtqq2ps W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.0F.W1 5B /r" , "vl": 0}, + {"inst": "vcvttpd2uqq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 78 /r" , "vl": 1}, + {"inst": "vcvttpd2uqq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 78 /r" , "vl": 1}, + {"inst": "vcvttpd2uqq W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F.W1 78 /r" , "vl": 0}, + {"inst": "vcvttps2qq W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.66.0F.W0 7A /r" , "vl": 1}, + {"inst": "vcvttps2qq W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.66.0F.W0 7A /r" , "vl": 1}, + {"inst": "vcvttps2qq W:zmm {kz}, ymm/m256/b32 {sae}" , "op": "RM-HV: EVEX.512.66.0F.W0 7A /r" , "vl": 0}, + {"inst": "vcvttps2uqq W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.66.0F.W0 78 /r" , "vl": 1}, + {"inst": "vcvttps2uqq W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.66.0F.W0 78 /r" , "vl": 1}, + {"inst": "vcvttps2uqq W:zmm {kz}, ymm/m256/b32 {sae}" , "op": "RM-HV: EVEX.512.66.0F.W0 78 /r" , "vl": 0}, + {"inst": "vcvtuqq2pd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F3.0F.W1 7A /r" , "vl": 1}, + {"inst": "vcvtuqq2pd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F3.0F.W1 7A /r" , "vl": 1}, + {"inst": "vcvtuqq2pd W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F3.0F.W1 7A /r" , "vl": 0}, + {"inst": "vcvtuqq2ps W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F2.0F.W1 7A /r" , "vl": 1}, + {"inst": "vcvtuqq2ps W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F2.0F.W1 7A /r" , "vl": 1}, + {"inst": "vcvtuqq2ps W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F2.0F.W1 7A /r" , "vl": 0}, + {"inst": "vextractf32x8 W:ymm/m256 {kz}, zmm, ib/ub" , "op": "MR-T8: EVEX.512.66.0F3A.W0 1B /r ib" , "vl": 0}, + {"inst": "vextractf64x2 W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-T2: EVEX.256.66.0F3A.W1 19 /r ib" , "vl": 1}, + {"inst": "vextractf64x2 W:xmm/m128 {kz}, zmm, ib/ub" , "op": "MR-T2: EVEX.512.66.0F3A.W1 19 /r ib" , "vl": 0}, + {"inst": "vextracti32x8 W:ymm/m256 {kz}, zmm, ib/ub" , "op": "MR-T8: EVEX.512.66.0F3A.W0 3B /r ib" , "vl": 0}, + {"inst": "vextracti64x2 W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-T2: EVEX.256.66.0F3A.W1 39 /r ib" , "vl": 1}, + {"inst": "vextracti64x2 W:xmm/m128 {kz}, zmm, ib/ub" , "op": "MR-T2: EVEX.512.66.0F3A.W1 39 /r ib" , "vl": 0}, + {"inst": "vfpclasspd W:k {k}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 66 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vfpclasspd W:k {k}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 66 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vfpclasspd W:k {k}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 66 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vfpclassps W:k {k}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 66 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vfpclassps W:k {k}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 66 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vfpclassps W:k {k}, zmm/m512/b32, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W0 66 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vinsertf32x8 W:zmm {kz}, zmm, ymm/m256, ib/ub" , "op": "RVM-T8: EVEX.512.66.0F3A.W0 1A /r ib" , "vl": 0}, + {"inst": "vinsertf64x2 W:ymm {kz}, ymm, xmm/m128, ib/ub" , "op": "RVM-T2: EVEX.256.66.0F3A.W1 18 /r ib" , "vl": 1}, + {"inst": "vinsertf64x2 W:zmm {kz}, zmm, xmm/m128, ib/ub" , "op": "RVM-T2: EVEX.512.66.0F3A.W1 18 /r ib" , "vl": 0}, + {"inst": "vinserti32x8 W:zmm {kz}, zmm, ymm/m256, ib/ub" , "op": "RVM-T8: EVEX.512.66.0F3A.W0 3A /r ib" , "vl": 0}, + {"inst": "vinserti64x2 W:ymm {kz}, ymm, xmm/m128, ib/ub" , "op": "RVM-T2: EVEX.256.66.0F3A.W1 38 /r ib" , "vl": 1}, + {"inst": "vinserti64x2 W:zmm {kz}, zmm, xmm/m128, ib/ub" , "op": "RVM-T2: EVEX.512.66.0F3A.W1 38 /r ib" , "vl": 0}, + {"inst": "vorpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 56 /r" , "vl": 1}, + {"inst": "vorpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 56 /r" , "vl": 1}, + {"inst": "vorpd W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 56 /r" , "vl": 0}, + {"inst": "vorps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 56 /r" , "vl": 1}, + {"inst": "vorps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 56 /r" , "vl": 1}, + {"inst": "vorps W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 56 /r" , "vl": 0}, + {"inst": "vpextrd W:r32/m32, xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.W0 16 /r ib" , "vl": 0}, + {"inst": "vpextrq W:r64/m64, xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.W1 16 /r ib" , "vl": 0}, + {"inst": "vpinsrd W:xmm {kz}, xmm, r32/m32, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F3A.W0 22 /r ib" , "vl": 0}, + {"inst": "vpinsrq W:xmm {kz}, xmm, r64/m64, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F3A.W1 22 /r ib" , "vl": 0}, + {"inst": "vpmovd2m W:k, xmm" , "op": "RM: EVEX.128.F3.0F38.W0 39 /r" , "vl": 1}, + {"inst": "vpmovd2m W:k, ymm" , "op": "RM: EVEX.256.F3.0F38.W0 39 /r" , "vl": 1}, + {"inst": "vpmovd2m W:k, zmm" , "op": "RM: EVEX.512.F3.0F38.W0 39 /r" , "vl": 0}, + {"inst": "vpmovm2d W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W0 38 /r" , "vl": 1}, + {"inst": "vpmovm2d W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W0 38 /r" , "vl": 1}, + {"inst": "vpmovm2d W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W0 38 /r" , "vl": 0}, + {"inst": "vpmovm2q W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W1 38 /r" , "vl": 1}, + {"inst": "vpmovm2q W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W1 38 /r" , "vl": 1}, + {"inst": "vpmovm2q W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W1 38 /r" , "vl": 0}, + {"inst": "vpmovq2m W:k, xmm" , "op": "RM: EVEX.128.F3.0F38.W1 39 /r" , "vl": 1}, + {"inst": "vpmovq2m W:k, ymm" , "op": "RM: EVEX.256.F3.0F38.W1 39 /r" , "vl": 1}, + {"inst": "vpmovq2m W:k, zmm" , "op": "RM: EVEX.512.F3.0F38.W1 39 /r" , "vl": 0}, + {"inst": "vpmullq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 40 /r" , "vl": 1}, + {"inst": "vpmullq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 40 /r" , "vl": 1}, + {"inst": "vpmullq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 40 /r" , "vl": 0}, + {"inst": "vrangepd W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 50 /r ib" , "vl": 1}, + {"inst": "vrangepd W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 50 /r ib" , "vl": 1}, + {"inst": "vrangepd W:zmm {kz}, zmm, zmm/m512/b64, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 50 /r ib" , "vl": 0}, + {"inst": "vrangeps W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 50 /r ib" , "vl": 1}, + {"inst": "vrangeps W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 50 /r ib" , "vl": 1}, + {"inst": "vrangeps W:zmm {kz}, zmm, zmm/m512/b32, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 50 /r ib" , "vl": 0}, + {"inst": "vreducepd W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 56 /r ib" , "vl": 1}, + {"inst": "vreducepd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 56 /r ib" , "vl": 1}, + {"inst": "vreducepd W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 56 /r ib" , "vl": 0}, + {"inst": "vreduceps W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 56 /r ib" , "vl": 1}, + {"inst": "vreduceps W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 56 /r ib" , "vl": 1}, + {"inst": "vreduceps W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W0 56 /r ib" , "vl": 0}, + {"inst": "vxorpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 57 /r" , "vl": 1}, + {"inst": "vxorpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 57 /r" , "vl": 1}, + {"inst": "vxorpd W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 57 /r" , "vl": 0}, + {"inst": "vxorps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 57 /r" , "vl": 1}, + {"inst": "vxorps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 57 /r" , "vl": 1}, + {"inst": "vxorps W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 57 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_BW", "data": [ + {"inst": "vdbpsadbw W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 42 /r ib" , "vl": 1}, + {"inst": "vdbpsadbw W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 42 /r ib" , "vl": 1}, + {"inst": "vdbpsadbw W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 42 /r ib" , "vl": 0}, + {"inst": "vmovdqu16 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.F2.0F.W1 6F /r" , "vl": 1}, + {"inst": "vmovdqu16 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.F2.0F.W1 7F /r" , "vl": 1}, + {"inst": "vmovdqu16 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.F2.0F.W1 6F /r" , "vl": 1}, + {"inst": "vmovdqu16 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.F2.0F.W1 7F /r" , "vl": 1}, + {"inst": "vmovdqu16 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.F2.0F.W1 6F /r" , "vl": 0}, + {"inst": "vmovdqu16 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.F2.0F.W1 7F /r" , "vl": 0}, + {"inst": "vmovdqu8 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.F2.0F.W0 6F /r" , "vl": 1}, + {"inst": "vmovdqu8 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.F2.0F.W0 7F /r" , "vl": 1}, + {"inst": "vmovdqu8 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.F2.0F.W0 6F /r" , "vl": 1}, + {"inst": "vmovdqu8 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.F2.0F.W0 7F /r" , "vl": 1}, + {"inst": "vmovdqu8 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.F2.0F.W0 6F /r" , "vl": 0}, + {"inst": "vmovdqu8 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.F2.0F.W0 7F /r" , "vl": 0}, + {"inst": "vpabsb W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38 1C /r" , "vl": 1}, + {"inst": "vpabsb W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38 1C /r" , "vl": 1}, + {"inst": "vpabsb W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38 1C /r" , "vl": 0}, + {"inst": "vpabsw W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38 1D /r" , "vl": 1}, + {"inst": "vpabsw W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38 1D /r" , "vl": 1}, + {"inst": "vpabsw W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38 1D /r" , "vl": 0}, + {"inst": "vpackssdw W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 6B /r" , "vl": 1}, + {"inst": "vpackssdw W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 6B /r" , "vl": 1}, + {"inst": "vpackssdw W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 6B /r" , "vl": 0}, + {"inst": "vpacksswb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 63 /r" , "vl": 1}, + {"inst": "vpacksswb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 63 /r" , "vl": 1}, + {"inst": "vpacksswb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 63 /r" , "vl": 0}, + {"inst": "vpackusdw W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 2B /r" , "vl": 1}, + {"inst": "vpackusdw W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 2B /r" , "vl": 1}, + {"inst": "vpackusdw W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 2B /r" , "vl": 0}, + {"inst": "vpackuswb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 67 /r" , "vl": 1}, + {"inst": "vpackuswb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 67 /r" , "vl": 1}, + {"inst": "vpackuswb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 67 /r" , "vl": 0}, + {"inst": "vpaddb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG FC /r" , "vl": 1}, + {"inst": "vpaddb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG FC /r" , "vl": 1}, + {"inst": "vpaddb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG FC /r" , "vl": 0}, + {"inst": "vpaddsb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG EC /r" , "vl": 1}, + {"inst": "vpaddsb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG EC /r" , "vl": 1}, + {"inst": "vpaddsb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG EC /r" , "vl": 0}, + {"inst": "vpaddsw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG ED /r" , "vl": 1}, + {"inst": "vpaddsw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG ED /r" , "vl": 1}, + {"inst": "vpaddsw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG ED /r" , "vl": 0}, + {"inst": "vpaddusb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG DC /r" , "vl": 1}, + {"inst": "vpaddusb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG DC /r" , "vl": 1}, + {"inst": "vpaddusb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG DC /r" , "vl": 0}, + {"inst": "vpaddusw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG DD /r" , "vl": 1}, + {"inst": "vpaddusw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG DD /r" , "vl": 1}, + {"inst": "vpaddusw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG DD /r" , "vl": 0}, + {"inst": "vpaddw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG FD /r" , "vl": 1}, + {"inst": "vpaddw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG FD /r" , "vl": 1}, + {"inst": "vpaddw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG FD /r" , "vl": 0}, + {"inst": "vpalignr W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.WIG 0F /r ib" , "vl": 1}, + {"inst": "vpalignr W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.WIG 0F /r ib" , "vl": 1}, + {"inst": "vpalignr W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.WIG 0F /r ib" , "vl": 0}, + {"inst": "vpavgb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E0 /r" , "vl": 1}, + {"inst": "vpavgb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E0 /r" , "vl": 1}, + {"inst": "vpavgb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E0 /r" , "vl": 0}, + {"inst": "vpavgw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E3 /r" , "vl": 1}, + {"inst": "vpavgw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E3 /r" , "vl": 1}, + {"inst": "vpavgw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E3 /r" , "vl": 0}, + {"inst": "vpblendmb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 66 /r" , "vl": 1, "k": "blend"}, + {"inst": "vpblendmb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 66 /r" , "vl": 1, "k": "blend"}, + {"inst": "vpblendmb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 66 /r" , "vl": 0, "k": "blend"}, + {"inst": "vpblendmw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 66 /r" , "vl": 1, "k": "blend"}, + {"inst": "vpblendmw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 66 /r" , "vl": 1, "k": "blend"}, + {"inst": "vpblendmw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 66 /r" , "vl": 0, "k": "blend"}, + {"inst": "vpbroadcastb W:xmm {kz}, r32[7:0]" , "op": "RM-T1S: EVEX.128.66.0F38.W0 7A /r" , "vl": 1}, + {"inst": "vpbroadcastb W:xmm {kz}, xmm[7:0]/m8" , "op": "RM-T1S: EVEX.128.66.0F38.W0 78 /r" , "vl": 1}, + {"inst": "vpbroadcastb W:ymm {kz}, r32[7:0]" , "op": "RM-T1S: EVEX.256.66.0F38.W0 7A /r" , "vl": 1}, + {"inst": "vpbroadcastb W:ymm {kz}, xmm[7:0]/m8" , "op": "RM-T1S: EVEX.256.66.0F38.W0 78 /r" , "vl": 1}, + {"inst": "vpbroadcastb W:zmm {kz}, r32[7:0]" , "op": "RM-T1S: EVEX.512.66.0F38.W0 7A /r" , "vl": 0}, + {"inst": "vpbroadcastb W:zmm {kz}, xmm[7:0]/m8" , "op": "RM-T1S: EVEX.512.66.0F38.W0 78 /r" , "vl": 0}, + {"inst": "vpbroadcastw W:xmm {kz}, r32[15:0]" , "op": "RM-T1S: EVEX.128.66.0F38.W0 7B /r" , "vl": 1}, + {"inst": "vpbroadcastw W:xmm {kz}, xmm[15:0]/m16" , "op": "RM-T1S: EVEX.128.66.0F38.W0 79 /r" , "vl": 1}, + {"inst": "vpbroadcastw W:ymm {kz}, r32[15:0]" , "op": "RM-T1S: EVEX.256.66.0F38.W0 7B /r" , "vl": 1}, + {"inst": "vpbroadcastw W:ymm {kz}, xmm[15:0]/m16" , "op": "RM-T1S: EVEX.256.66.0F38.W0 79 /r" , "vl": 1}, + {"inst": "vpbroadcastw W:zmm {kz}, r32[15:0]" , "op": "RM-T1S: EVEX.512.66.0F38.W0 7B /r" , "vl": 0}, + {"inst": "vpbroadcastw W:zmm {kz}, xmm[15:0]/m16" , "op": "RM-T1S: EVEX.512.66.0F38.W0 79 /r" , "vl": 0}, + {"inst": "vpcmpb W:k {k}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 3F /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpb W:k {k}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 3F /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpb W:k {k}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 3F /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpeqb W:k {k}, ~xmm, ~xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F.WIG 74 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpeqb W:k {k}, ~ymm, ~ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F.WIG 74 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpeqb W:k {k}, ~zmm, ~zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F.WIG 74 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpeqw W:k {k}, ~xmm, ~xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F.WIG 75 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpeqw W:k {k}, ~ymm, ~ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F.WIG 75 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpeqw W:k {k}, ~zmm, ~zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F.WIG 75 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpgtb W:k {k}, xmm, xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F.WIG 64 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpgtb W:k {k}, ymm, ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F.WIG 64 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpgtb W:k {k}, zmm, zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F.WIG 64 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpgtw W:k {k}, xmm, xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F.WIG 65 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpgtw W:k {k}, ymm, ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F.WIG 65 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpgtw W:k {k}, zmm, zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F.WIG 65 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpub W:k {k}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 3E /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpub W:k {k}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 3E /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpub W:k {k}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 3E /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpuw W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 3E /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpuw W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 3E /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpuw W:k {k}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 3E /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vpcmpw W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 3F /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpw W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 3F /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vpcmpw W:k {k}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 3F /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vpermi2w X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 75 /r" , "vl": 1}, + {"inst": "vpermi2w X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 75 /r" , "vl": 1}, + {"inst": "vpermi2w X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 75 /r" , "vl": 0}, + {"inst": "vpermt2w X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 7D /r" , "vl": 1}, + {"inst": "vpermt2w X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 7D /r" , "vl": 1}, + {"inst": "vpermt2w X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 7D /r" , "vl": 0}, + {"inst": "vpermw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 8D /r" , "vl": 1}, + {"inst": "vpermw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 8D /r" , "vl": 1}, + {"inst": "vpermw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 8D /r" , "vl": 0}, + {"inst": "vpextrb W:r32[7:0]/m8 , xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.WIG 14 /r ib" , "vl": 0}, + {"inst": "vpextrw W:r32[15:0], xmm, ib/ub" , "op": "RM: EVEX.128.66.0F.WIG C5 /r ib" , "vl": 0}, + {"inst": "vpextrw W:r32[15:0]/m16, xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.WIG 15 /r ib" , "vl": 0}, + {"inst": "vpinsrb W:xmm {kz}, xmm, r32[7:0]/m8, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F3A.WIG 20 /r ib" , "vl": 0}, + {"inst": "vpinsrw W:xmm {kz}, xmm, r32[15:0]/m16, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F.WIG C4 /r ib" , "vl": 0}, + {"inst": "vpmaddubsw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 04 /r" , "vl": 1}, + {"inst": "vpmaddubsw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 04 /r" , "vl": 1}, + {"inst": "vpmaddubsw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 04 /r" , "vl": 0}, + {"inst": "vpmaddwd W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG F5 /r" , "vl": 1}, + {"inst": "vpmaddwd W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG F5 /r" , "vl": 1}, + {"inst": "vpmaddwd W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG F5 /r" , "vl": 0}, + {"inst": "vpmaxsb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 3C /r" , "vl": 1}, + {"inst": "vpmaxsb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 3C /r" , "vl": 1}, + {"inst": "vpmaxsb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 3C /r" , "vl": 0}, + {"inst": "vpmaxsw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG EE /r" , "vl": 1}, + {"inst": "vpmaxsw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG EE /r" , "vl": 1}, + {"inst": "vpmaxsw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG EE /r" , "vl": 0}, + {"inst": "vpmaxub W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG DE /r" , "vl": 1}, + {"inst": "vpmaxub W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG DE /r" , "vl": 1}, + {"inst": "vpmaxub W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG DE /r" , "vl": 0}, + {"inst": "vpmaxuw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 3E /r" , "vl": 1}, + {"inst": "vpmaxuw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 3E /r" , "vl": 1}, + {"inst": "vpmaxuw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 3E /r" , "vl": 0}, + {"inst": "vpminsb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 38 /r" , "vl": 1}, + {"inst": "vpminsb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 38 /r" , "vl": 1}, + {"inst": "vpminsb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 38 /r" , "vl": 0}, + {"inst": "vpminsw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG EA /r" , "vl": 1}, + {"inst": "vpminsw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG EA /r" , "vl": 1}, + {"inst": "vpminsw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG EA /r" , "vl": 0}, + {"inst": "vpminub W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F DA /r" , "vl": 1}, + {"inst": "vpminub W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F DA /r" , "vl": 1}, + {"inst": "vpminub W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F DA /r" , "vl": 0}, + {"inst": "vpminuw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38 3A /r" , "vl": 1}, + {"inst": "vpminuw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38 3A /r" , "vl": 1}, + {"inst": "vpminuw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38 3A /r" , "vl": 0}, + {"inst": "vpmovb2m W:k, xmm" , "op": "RM: EVEX.128.F3.0F38.W0 29 /r" , "vl": 1}, + {"inst": "vpmovb2m W:k, ymm" , "op": "RM: EVEX.256.F3.0F38.W0 29 /r" , "vl": 1}, + {"inst": "vpmovb2m W:k, zmm" , "op": "RM: EVEX.512.F3.0F38.W0 29 /r" , "vl": 0}, + {"inst": "vpmovm2b W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W0 28 /r" , "vl": 1}, + {"inst": "vpmovm2b W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W0 28 /r" , "vl": 1}, + {"inst": "vpmovm2b W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W0 28 /r" , "vl": 0}, + {"inst": "vpmovm2w W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W1 28 /r" , "vl": 1}, + {"inst": "vpmovm2w W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W1 28 /r" , "vl": 1}, + {"inst": "vpmovm2w W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W1 28 /r" , "vl": 0}, + {"inst": "vpmovswb W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 20 /r" , "vl": 1}, + {"inst": "vpmovswb W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 20 /r" , "vl": 1}, + {"inst": "vpmovswb W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 20 /r" , "vl": 0}, + {"inst": "vpmovsxbw W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.WIG 20 /r" , "vl": 1}, + {"inst": "vpmovsxbw W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.WIG 20 /r" , "vl": 1}, + {"inst": "vpmovsxbw W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.WIG 20 /r" , "vl": 0}, + {"inst": "vpmovuswb W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 10 /r" , "vl": 1}, + {"inst": "vpmovuswb W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 10 /r" , "vl": 1}, + {"inst": "vpmovuswb W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 10 /r" , "vl": 0}, + {"inst": "vpmovw2m W:k, xmm" , "op": "RM: EVEX.128.F3.0F38.W1 29 /r" , "vl": 1}, + {"inst": "vpmovw2m W:k, ymm" , "op": "RM: EVEX.256.F3.0F38.W1 29 /r" , "vl": 1}, + {"inst": "vpmovw2m W:k, zmm" , "op": "RM: EVEX.512.F3.0F38.W1 29 /r" , "vl": 0}, + {"inst": "vpmovwb W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 30 /r" , "vl": 1}, + {"inst": "vpmovwb W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 30 /r" , "vl": 1}, + {"inst": "vpmovwb W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 30 /r" , "vl": 0}, + {"inst": "vpmovzxbw W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.WIG 30 /r" , "vl": 1}, + {"inst": "vpmovzxbw W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.WIG 30 /r" , "vl": 1}, + {"inst": "vpmovzxbw W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.WIG 30 /r" , "vl": 0}, + {"inst": "vpmulhrsw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 0B /r" , "vl": 1}, + {"inst": "vpmulhrsw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 0B /r" , "vl": 1}, + {"inst": "vpmulhrsw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 0B /r" , "vl": 0}, + {"inst": "vpmulhuw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E4 /r" , "vl": 1}, + {"inst": "vpmulhuw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E4 /r" , "vl": 1}, + {"inst": "vpmulhuw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E4 /r" , "vl": 0}, + {"inst": "vpmulhw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E5 /r" , "vl": 1}, + {"inst": "vpmulhw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E5 /r" , "vl": 1}, + {"inst": "vpmulhw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E5 /r" , "vl": 0}, + {"inst": "vpmullw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG D5 /r" , "vl": 1}, + {"inst": "vpmullw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG D5 /r" , "vl": 1}, + {"inst": "vpmullw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG D5 /r" , "vl": 0}, + {"inst": "vpsadbw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG F6 /r" , "vl": 1}, + {"inst": "vpsadbw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG F6 /r" , "vl": 1}, + {"inst": "vpsadbw W:zmm, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG F6 /r" , "vl": 0}, + {"inst": "vpshufb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 00 /r" , "vl": 1}, + {"inst": "vpshufb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 00 /r" , "vl": 1}, + {"inst": "vpshufb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 00 /r" , "vl": 0}, + {"inst": "vpshufhw W:xmm {kz}, xmm/m128, ib/ub" , "op": "RM-FVM: EVEX.128.F3.0F.WIG 70 /r ib" , "vl": 1}, + {"inst": "vpshufhw W:ymm {kz}, ymm/m256, ib/ub" , "op": "RM-FVM: EVEX.256.F3.0F.WIG 70 /r ib" , "vl": 1}, + {"inst": "vpshufhw W:zmm {kz}, zmm/m512, ib/ub" , "op": "RM-FVM: EVEX.512.F3.0F.WIG 70 /r ib" , "vl": 0}, + {"inst": "vpshuflw W:xmm {kz}, xmm/m128, ib/ub" , "op": "RM-FVM: EVEX.128.F2.0F.WIG 70 /r ib" , "vl": 1}, + {"inst": "vpshuflw W:ymm {kz}, ymm/m256, ib/ub" , "op": "RM-FVM: EVEX.256.F2.0F.WIG 70 /r ib" , "vl": 1}, + {"inst": "vpshuflw W:zmm {kz}, zmm/m512, ib/ub" , "op": "RM-FVM: EVEX.512.F2.0F.WIG 70 /r ib" , "vl": 0}, + {"inst": "vpslldq W:xmm, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 73 /7 ib" , "vl": 1}, + {"inst": "vpslldq W:ymm, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 73 /7 ib" , "vl": 1}, + {"inst": "vpslldq W:zmm, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 73 /7 ib" , "vl": 0}, + {"inst": "vpsllvw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 12 /r" , "vl": 1}, + {"inst": "vpsllvw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 12 /r" , "vl": 1}, + {"inst": "vpsllvw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 12 /r" , "vl": 0}, + {"inst": "vpsllw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.WIG F1 /r" , "vl": 1}, + {"inst": "vpsllw W:xmm {kz}, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 71 /6 ib" , "vl": 1}, + {"inst": "vpsllw W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.WIG F1 /r" , "vl": 1}, + {"inst": "vpsllw W:ymm {kz}, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 71 /6 ib" , "vl": 1}, + {"inst": "vpsllw W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.WIG F1 /r" , "vl": 0}, + {"inst": "vpsllw W:zmm {kz}, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 71 /6 ib" , "vl": 0}, + {"inst": "vpsravw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 11 /r" , "vl": 1}, + {"inst": "vpsravw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 11 /r" , "vl": 1}, + {"inst": "vpsravw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 11 /r" , "vl": 0}, + {"inst": "vpsraw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.WIG E1 /r" , "vl": 1}, + {"inst": "vpsraw W:xmm {kz}, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 71 /4 ib" , "vl": 1}, + {"inst": "vpsraw W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.WIG E1 /r" , "vl": 1}, + {"inst": "vpsraw W:ymm {kz}, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 71 /4 ib" , "vl": 1}, + {"inst": "vpsraw W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.WIG E1 /r" , "vl": 0}, + {"inst": "vpsraw W:zmm {kz}, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 71 /4 ib" , "vl": 0}, + {"inst": "vpsrldq W:xmm, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 73 /3 ib" , "vl": 1}, + {"inst": "vpsrldq W:ymm, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 73 /3 ib" , "vl": 1}, + {"inst": "vpsrldq W:zmm, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 73 /3 ib" , "vl": 0}, + {"inst": "vpsrlvw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 10 /r" , "vl": 1}, + {"inst": "vpsrlvw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 10 /r" , "vl": 1}, + {"inst": "vpsrlvw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 10 /r" , "vl": 0}, + {"inst": "vpsrlw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.WIG D1 /r" , "vl": 1}, + {"inst": "vpsrlw W:xmm {kz}, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 71 /2 ib" , "vl": 1}, + {"inst": "vpsrlw W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.WIG D1 /r" , "vl": 1}, + {"inst": "vpsrlw W:ymm {kz}, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 71 /2 ib" , "vl": 1}, + {"inst": "vpsrlw W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.WIG D1 /r" , "vl": 0}, + {"inst": "vpsrlw W:zmm {kz}, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 71 /2 ib" , "vl": 0}, + {"inst": "vpsubb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG F8 /r" , "vl": 1}, + {"inst": "vpsubb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG F8 /r" , "vl": 1}, + {"inst": "vpsubb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG F8 /r" , "vl": 0}, + {"inst": "vpsubsb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E8 /r" , "vl": 1}, + {"inst": "vpsubsb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E8 /r" , "vl": 1}, + {"inst": "vpsubsb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E8 /r" , "vl": 0}, + {"inst": "vpsubsw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E9 /r" , "vl": 1}, + {"inst": "vpsubsw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E9 /r" , "vl": 1}, + {"inst": "vpsubsw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E9 /r" , "vl": 0}, + {"inst": "vpsubusb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG D8 /r" , "vl": 1}, + {"inst": "vpsubusb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG D8 /r" , "vl": 1}, + {"inst": "vpsubusb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG D8 /r" , "vl": 0}, + {"inst": "vpsubusw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG D9 /r" , "vl": 1}, + {"inst": "vpsubusw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG D9 /r" , "vl": 1}, + {"inst": "vpsubusw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG D9 /r" , "vl": 0}, + {"inst": "vpsubw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG F9 /r" , "vl": 1}, + {"inst": "vpsubw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG F9 /r" , "vl": 1}, + {"inst": "vpsubw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG F9 /r" , "vl": 0}, + {"inst": "vptestmb W:k {k}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 26 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestmb W:k {k}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 26 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestmb W:k {k}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 26 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vptestmw W:k {k}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 26 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestmw W:k {k}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 26 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestmw W:k {k}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 26 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vptestnmb W:k {k}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.F3.0F38.W0 26 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestnmb W:k {k}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.F3.0F38.W0 26 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestnmb W:k {k}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.F3.0F38.W0 26 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vptestnmw W:k {k}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.F3.0F38.W1 26 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestnmw W:k {k}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.F3.0F38.W1 26 /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vptestnmw W:k {k}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.F3.0F38.W1 26 /r" , "vl": 0, "k": "zeroing"}, + {"inst": "vpunpckhbw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 68 /r" , "vl": 1}, + {"inst": "vpunpckhbw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 68 /r" , "vl": 1}, + {"inst": "vpunpckhbw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 68 /r" , "vl": 0}, + {"inst": "vpunpckhwd W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 69 /r" , "vl": 1}, + {"inst": "vpunpckhwd W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 69 /r" , "vl": 1}, + {"inst": "vpunpckhwd W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 69 /r" , "vl": 0}, + {"inst": "vpunpcklbw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 60 /r" , "vl": 1}, + {"inst": "vpunpcklbw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 60 /r" , "vl": 1}, + {"inst": "vpunpcklbw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 60 /r" , "vl": 0}, + {"inst": "vpunpcklwd W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 61 /r" , "vl": 1}, + {"inst": "vpunpcklwd W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 61 /r" , "vl": 1}, + {"inst": "vpunpcklwd W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 61 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_CD", "data": [ + {"inst": "vpbroadcastmb2q W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W1 2A /r" , "vl": 1}, + {"inst": "vpbroadcastmb2q W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W1 2A /r" , "vl": 1}, + {"inst": "vpbroadcastmb2q W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W1 2A /r" , "vl": 0}, + {"inst": "vpbroadcastmw2d W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W0 3A /r" , "vl": 1}, + {"inst": "vpbroadcastmw2d W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W0 3A /r" , "vl": 1}, + {"inst": "vpbroadcastmw2d W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W0 3A /r" , "vl": 0}, + {"inst": "vpconflictd W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 C4 /r" , "vl": 1}, + {"inst": "vpconflictd W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 C4 /r" , "vl": 1}, + {"inst": "vpconflictd W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 C4 /r" , "vl": 0}, + {"inst": "vpconflictq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W1 C4 /r" , "vl": 1}, + {"inst": "vpconflictq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W1 C4 /r" , "vl": 1}, + {"inst": "vpconflictq W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W1 C4 /r" , "vl": 0}, + {"inst": "vplzcntd W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 44 /r" , "vl": 1}, + {"inst": "vplzcntd W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 44 /r" , "vl": 1}, + {"inst": "vplzcntd W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 44 /r" , "vl": 0}, + {"inst": "vplzcntq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 44 /r" , "vl": 1}, + {"inst": "vplzcntq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 44 /r" , "vl": 1}, + {"inst": "vplzcntq W:zmm {kz}, zmm/m512/b64" , "op": "RM-FV: EVEX.512.66.0F38.W1 44 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SCALAR", "ext": "AVX512_ER", "data": [ + {"inst": "vrcp28sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {sae}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 CB /r"}, + {"inst": "vrcp28ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 CB /r"}, + {"inst": "vrsqrt28sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {sae}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 CD /r"}, + {"inst": "vrsqrt28ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 CD /r"} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_ER", "data": [ + {"inst": "vrcp28pd W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W1 CA /r"}, + {"inst": "vrcp28ps W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W0 CA /r"}, + {"inst": "vrsqrt28pd W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W1 CC /r"}, + {"inst": "vrsqrt28ps W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W0 CC /r"}, + {"inst": "vexp2pd W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W1 C8 /r"}, + {"inst": "vexp2ps W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W0 C8 /r"} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_PF", "data": [ + {"inst": "vgatherpf0dpd R:vm32y {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C6 /1"}, + {"inst": "vgatherpf0dps R:vm32z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C6 /1"}, + {"inst": "vgatherpf0qpd R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C7 /1"}, + {"inst": "vgatherpf0qps R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C7 /1"}, + {"inst": "vgatherpf1dpd R:vm32y {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C6 /2"}, + {"inst": "vgatherpf1dps R:vm32z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C6 /2"}, + {"inst": "vgatherpf1qpd R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C7 /2"}, + {"inst": "vgatherpf1qps R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C7 /2"}, + {"inst": "vscatterpf0dpd R:vm32y {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C6 /5"}, + {"inst": "vscatterpf0dps R:vm32z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C6 /5"}, + {"inst": "vscatterpf0qpd R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C7 /5"}, + {"inst": "vscatterpf0qps R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C7 /5"}, + {"inst": "vscatterpf1dpd R:vm32y {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C6 /6"}, + {"inst": "vscatterpf1dps R:vm32z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C6 /6"}, + {"inst": "vscatterpf1qpd R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C7 /6"}, + {"inst": "vscatterpf1qps R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C7 /6"} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_IFMA", "data": [ + {"inst": "vpmadd52luq X:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 B4 /r" , "vl": 1}, + {"inst": "vpmadd52luq X:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 B4 /r" , "vl": 1}, + {"inst": "vpmadd52luq X:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 B4 /r" , "vl": 0}, + {"inst": "vpmadd52huq X:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 B5 /r" , "vl": 1}, + {"inst": "vpmadd52huq X:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 B5 /r" , "vl": 1}, + {"inst": "vpmadd52huq X:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 B5 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_VPOPCNTDQ", "data": [ + {"inst": "vpopcntd W:xmm {kz}, xmm/m128/b32" , "op": "RM-FVM: EVEX.128.66.0F38.W0 55 /r" , "vl": 1}, + {"inst": "vpopcntd W:ymm {kz}, ymm/m256/b32" , "op": "RM-FVM: EVEX.256.66.0F38.W0 55 /r" , "vl": 1}, + {"inst": "vpopcntd W:zmm {kz}, zmm/m512/b32" , "op": "RM-FVM: EVEX.512.66.0F38.W0 55 /r" , "vl": 0}, + {"inst": "vpopcntq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FVM: EVEX.128.66.0F38.W1 55 /r" , "vl": 1}, + {"inst": "vpopcntq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FVM: EVEX.256.66.0F38.W1 55 /r" , "vl": 1}, + {"inst": "vpopcntq W:zmm {kz}, zmm/m512/b64" , "op": "RM-FVM: EVEX.512.66.0F38.W1 55 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_VBMI", "data": [ + {"inst": "vpermb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 8D /r" , "vl": 1}, + {"inst": "vpermb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 8D /r" , "vl": 1}, + {"inst": "vpermb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 8D /r" , "vl": 0}, + {"inst": "vpermi2b W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 75 /r" , "vl": 1}, + {"inst": "vpermi2b W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 75 /r" , "vl": 1}, + {"inst": "vpermi2b W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 75 /r" , "vl": 0}, + {"inst": "vpermt2b W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 7D /r" , "vl": 1}, + {"inst": "vpermt2b W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 7D /r" , "vl": 1}, + {"inst": "vpermt2b W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 7D /r" , "vl": 0}, + {"inst": "vpmultishiftqb W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 83 /r" , "vl": 1}, + {"inst": "vpmultishiftqb W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 83 /r" , "vl": 1}, + {"inst": "vpmultishiftqb W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 83 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_VBMI2", "data": [ + {"inst": "vpcompressb W:xmm/m128 {kz}, xmm" , "op": "RVM-T1S: EVEX.128.66.0F38.W0 63 /r" , "vl": 1}, + {"inst": "vpcompressb W:ymm/m256 {kz}, ymm" , "op": "RVM-T1S: EVEX.256.66.0F38.W0 63 /r" , "vl": 1}, + {"inst": "vpcompressb W:zmm/m512 {kz}, zmm" , "op": "RVM-T1S: EVEX.512.66.0F38.W0 63 /r" , "vl": 0}, + {"inst": "vpcompressw W:xmm/m128 {kz}, xmm" , "op": "RVM-T1S: EVEX.128.66.0F38.W1 63 /r" , "vl": 1}, + {"inst": "vpcompressw W:ymm/m256 {kz}, ymm" , "op": "RVM-T1S: EVEX.256.66.0F38.W1 63 /r" , "vl": 1}, + {"inst": "vpcompressw W:zmm/m512 {kz}, zmm" , "op": "RVM-T1S: EVEX.512.66.0F38.W1 63 /r" , "vl": 0}, + {"inst": "vpexpandb W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W0 62 /r" , "vl": 1}, + {"inst": "vpexpandb W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W0 62 /r" , "vl": 1}, + {"inst": "vpexpandb W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W0 62 /r" , "vl": 0}, + {"inst": "vpexpandw W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W1 62 /r" , "vl": 1}, + {"inst": "vpexpandw W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W1 62 /r" , "vl": 1}, + {"inst": "vpexpandw W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W1 62 /r" , "vl": 0}, + {"inst": "vpshldd W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 71 /r ib" , "vl": 1}, + {"inst": "vpshldd W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 71 /r ib" , "vl": 1}, + {"inst": "vpshldd W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 71 /r ib" , "vl": 0}, + {"inst": "vpshldq W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 71 /r ib" , "vl": 1}, + {"inst": "vpshldq W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 71 /r ib" , "vl": 1}, + {"inst": "vpshldq W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 71 /r ib" , "vl": 0}, + {"inst": "vpshldvd X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 71 /r" , "vl": 1}, + {"inst": "vpshldvd X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 71 /r" , "vl": 1}, + {"inst": "vpshldvd X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 71 /r" , "vl": 0}, + {"inst": "vpshldvq X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 71 /r" , "vl": 1}, + {"inst": "vpshldvq X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 71 /r" , "vl": 1}, + {"inst": "vpshldvq X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 71 /r" , "vl": 0}, + {"inst": "vpshldvw X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F38.W1 70 /r" , "vl": 1}, + {"inst": "vpshldvw X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F38.W1 70 /r" , "vl": 1}, + {"inst": "vpshldvw X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F38.W1 70 /r" , "vl": 0}, + {"inst": "vpshldw W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 70 /r ib" , "vl": 1}, + {"inst": "vpshldw W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 70 /r ib" , "vl": 1}, + {"inst": "vpshldw W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 70 /r ib" , "vl": 0}, + {"inst": "vpshrdd W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 73 /r ib" , "vl": 1}, + {"inst": "vpshrdd W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 73 /r ib" , "vl": 1}, + {"inst": "vpshrdd W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 73 /r ib" , "vl": 0}, + {"inst": "vpshrdq W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 73 /r ib" , "vl": 1}, + {"inst": "vpshrdq W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 73 /r ib" , "vl": 1}, + {"inst": "vpshrdq W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 73 /r ib" , "vl": 0}, + {"inst": "vpshrdvd X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 73 /r" , "vl": 1}, + {"inst": "vpshrdvd X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 73 /r" , "vl": 1}, + {"inst": "vpshrdvd X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 73 /r" , "vl": 0}, + {"inst": "vpshrdvq X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 73 /r" , "vl": 1}, + {"inst": "vpshrdvq X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 73 /r" , "vl": 1}, + {"inst": "vpshrdvq X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 73 /r" , "vl": 0}, + {"inst": "vpshrdvw X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F38.W1 72 /r" , "vl": 1}, + {"inst": "vpshrdvw X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F38.W1 72 /r" , "vl": 1}, + {"inst": "vpshrdvw X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F38.W1 72 /r" , "vl": 0}, + {"inst": "vpshrdw W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 72 /r ib" , "vl": 1}, + {"inst": "vpshrdw W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 72 /r ib" , "vl": 1}, + {"inst": "vpshrdw W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 72 /r ib" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_4FMAPS", "data": [ + {"inst": "v4fmaddps X:zmm {kz}, zmm, zmm+1, zmm+2, zmm+3, m128" , "op": "RM-T1_4X: EVEX.512.F2.0F38.W0 9A /r" , "vl": 0}, + {"inst": "v4fmaddss X:xmm {kz}, xmm, xmm+1, xmm+2, xmm+3, m128" , "op": "RM-T1_4X: EVEX.LIG.F2.0F38.W0 9B /r" , "vl": 0}, + {"inst": "v4fnmaddps X:zmm {kz}, zmm, zmm+1, zmm+2, zmm+3, m128" , "op": "RM-T1_4X: EVEX.512.F2.0F38.W0 AA /r" , "vl": 0}, + {"inst": "v4fnmaddss X:xmm {kz}, xmm, xmm+1, xmm+2, xmm+3, m128" , "op": "RM-T1_4X: EVEX.LIG.F2.0F38.W0 AB /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_4VNNIW", "data": [ + {"inst": "vp4dpwssd W:zmm {kz}, zmm, zmm+1, zmm+2, zmm+3, m128" , "op": "RM-T1_4X: EVEX.512.F2.0F38.W0 52 /r" , "vl": 0}, + {"inst": "vp4dpwssds W:zmm {kz}, zmm, zmm+1, zmm+2, zmm+3, m128" , "op": "RM-T1_4X: EVEX.512.F2.0F38.W0 53 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_VNNI", "data": [ + {"inst": "vpdpbusd X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 50 /r" , "vl": 1}, + {"inst": "vpdpbusd X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 50 /r" , "vl": 1}, + {"inst": "vpdpbusd X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 50 /r" , "vl": 0}, + {"inst": "vpdpbusds X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 51 /r" , "vl": 1}, + {"inst": "vpdpbusds X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 51 /r" , "vl": 1}, + {"inst": "vpdpbusds X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 51 /r" , "vl": 0}, + {"inst": "vpdpwssd X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 52 /r" , "vl": 1}, + {"inst": "vpdpwssd X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 52 /r" , "vl": 1}, + {"inst": "vpdpwssd X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 52 /r" , "vl": 0}, + {"inst": "vpdpwssds X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 53 /r" , "vl": 1}, + {"inst": "vpdpwssds X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 53 /r" , "vl": 1}, + {"inst": "vpdpwssds X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 53 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_BITALG", "data": [ + {"inst": "vpopcntb W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W0 54 /r" , "vl": 1}, + {"inst": "vpopcntb W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W0 54 /r" , "vl": 1}, + {"inst": "vpopcntb W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W0 54 /r" , "vl": 0}, + {"inst": "vpopcntw W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W1 54 /r" , "vl": 1}, + {"inst": "vpopcntw W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W1 54 /r" , "vl": 1}, + {"inst": "vpopcntw W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W1 54 /r" , "vl": 0}, + {"inst": "vpshufbitqmb W:k {k}, xmm, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W0 8F /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpshufbitqmb W:k {k}, ymm, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W0 8F /r" , "vl": 1, "k": "zeroing"}, + {"inst": "vpshufbitqmb W:k {k}, zmm, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W0 8F /r" , "vl": 0, "k": "zeroing"} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_VP2INTERSECT", "data": [ + {"inst": "vp2intersectd W:k, W:k+1, xmm, xmm/m128/b32" , "op": "RVM: EVEX.128.F2.0F38.W0 68 /r" , "vl": 1}, + {"inst": "vp2intersectd W:k, W:k+1, ymm, ymm/m256/b32" , "op": "RVM: EVEX.256.F2.0F38.W0 68 /r" , "vl": 1}, + {"inst": "vp2intersectd W:k, W:k+1, zmm, zmm/m512/b32" , "op": "RVM: EVEX.512.F2.0F38.W0 68 /r" , "vl": 0}, + {"inst": "vp2intersectq W:k, W:k+1, xmm, xmm/m128/b64" , "op": "RVM: EVEX.128.F2.0F38.W1 68 /r" , "vl": 1}, + {"inst": "vp2intersectq W:k, W:k+1, ymm, ymm/m256/b64" , "op": "RVM: EVEX.256.F2.0F38.W1 68 /r" , "vl": 1}, + {"inst": "vp2intersectq W:k, W:k+1, zmm, zmm/m512/b64" , "op": "RVM: EVEX.512.F2.0F38.W1 68 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_BF16", "data": [ + {"inst": "vcvtne2ps2bf16 W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F2.0F38.W0 72 /r" , "vl": 1}, + {"inst": "vcvtne2ps2bf16 W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F2.0F38.W0 72 /r" , "vl": 1}, + {"inst": "vcvtne2ps2bf16 W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.F2.0F38.W0 72 /r" , "vl": 0}, + {"inst": "vcvtneps2bf16 W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.F3.0F38.W0 72 /r" , "vl": 1}, + {"inst": "vcvtneps2bf16 W:xmm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.F3.0F38.W0 72 /r" , "vl": 1}, + {"inst": "vcvtneps2bf16 W:ymm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.F3.0F38.W0 72 /r" , "vl": 0}, + {"inst": "vdpbf16ps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F3.0F38.W0 52 /r" , "vl": 1}, + {"inst": "vdpbf16ps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F3.0F38.W0 52 /r" , "vl": 1}, + {"inst": "vdpbf16ps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.F3.0F38.W0 52 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SCALAR", "ext": "AVX512_FP16", "data": [ + {"inst": "vaddsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 58 /r" , "vl": 0}, + {"inst": "vcmpsh W:k {k}, xmm[15:0], xmm[15:0]/m16, ib/ub {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F3A.W0 C2 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vcomish R:xmm[15:0], xmm[15:0]/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.NP.MAP5.W0 2F /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "vcvtsd2sh W:xmm {kz}, xmm, xmm/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.MAP5.W1 5A /r" , "vl": 0}, + {"inst": "vcvtsh2sd W:xmm {kz}, xmm, xmm/m16 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5A /r" , "vl": 0}, + {"inst": "vcvtsh2si W:r32, xmm/m16 {er}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 2D /r" , "vl": 0}, + {"inst": "vcvtsh2si W:r64, xmm/m16 {er}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W1 2D /r" , "vl": 0}, + {"inst": "vcvtsh2ss W:xmm {kz}, xmm, xmm/m16 {sae}" , "op": "RVM-T1S: EVEX.LIG.NP.MAP6.W0 13 /r" , "vl": 0}, + {"inst": "vcvtsh2usi W:r32, xmm/m16 {er}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 79 /r" , "vl": 0}, + {"inst": "vcvtsh2usi W:r64, xmm/m16 {er}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W1 79 /r" , "vl": 0}, + {"inst": "vcvtsi2sh W:xmm, xmm, r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 2A /r" , "vl": 0}, + {"inst": "vcvtsi2sh W:xmm, xmm, r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W1 2A /r" , "vl": 0}, + {"inst": "vcvtss2sh W:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.NP.MAP5.W0 1D /r" , "vl": 0}, + {"inst": "vcvttsh2si W:r32, xmm/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 2C /r" , "vl": 0}, + {"inst": "vcvttsh2si W:r64, xmm/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W1 2C /r" , "vl": 0}, + {"inst": "vcvttsh2usi W:r32, xmm/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 78 /r" , "vl": 0}, + {"inst": "vcvttsh2usi W:r64, xmm/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W1 78 /r" , "vl": 0}, + {"inst": "vcvtusi2sh W:xmm, xmm, r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 7B /r" , "vl": 0}, + {"inst": "vcvtusi2sh W:xmm, xmm, r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W1 7B /r" , "vl": 0}, + {"inst": "vdivsh W:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5E /r" , "vl": 0}, + {"inst": "vfmadd132sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 99 /r" , "vl": 0}, + {"inst": "vfmadd213sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 A9 /r" , "vl": 0}, + {"inst": "vfmadd231sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 B9 /r" , "vl": 0}, + {"inst": "vfmsub132sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 9B /r" , "vl": 0}, + {"inst": "vfmsub213sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 AB /r" , "vl": 0}, + {"inst": "vfmsub231sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 BB /r" , "vl": 0}, + {"inst": "vfnmadd132sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 9D /r" , "vl": 0}, + {"inst": "vfnmadd213sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 AD /r" , "vl": 0}, + {"inst": "vfnmadd231sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 BD /r" , "vl": 0}, + {"inst": "vfnmsub132sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 9F /r" , "vl": 0}, + {"inst": "vfnmsub213sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 AF /r" , "vl": 0}, + {"inst": "vfnmsub231sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 BF /r" , "vl": 0}, + {"inst": "vfpclasssh W:k {k}, xmm[15:0]/m16, ib/ub" , "op": "RM-T1S: EVEX.LIG.NP.0F3A.W0 67 /r ib" , "vl": 0}, + {"inst": "vgetexpsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.66.MAP6.W0 43 /r" , "vl": 0}, + {"inst": "vgetmantsh W:xmm {kz},xmm[127:16],xmm[15:0]/m16,ib/ub {sae}", "op": "RM-T1S: EVEX.LIG.NP.0F3A.W0 27 /r ib" , "vl": 0}, + {"inst": "vmaxsh W:xmm {kz}, xmm, xmm[15:0]/m16 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5F /r" , "vl": 0}, + {"inst": "vminsh W:xmm {kz}, xmm, xmm[15:0]/m16 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5D /r" , "vl": 0}, + {"inst": "vmovsh W:m16, xmm[15:0]" , "op": "MR-T1S: EVEX.LIG.F3.MAP5.W0 11 /r" , "vl": 0}, + {"inst": "vmovsh W:xmm[15:0] {kz}, m16" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 10 /r" , "vl": 0}, + {"inst": "vmovsh W:xmm {kz}, xmm[127:16], xmm[15:0]" , "op": "MVR: EVEX.LIG.F3.MAP5.W0 11 /r" , "vl": 0}, + {"inst": "vmovsh W:xmm {kz}, xmm[127:16], xmm[15:0]" , "op": "RVM: EVEX.LIG.F3.MAP5.W0 10 /r" , "vl": 0}, + {"inst": "vmulsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 59 /r" , "vl": 0}, + {"inst": "vrcpsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 4D /r" , "vl": 0}, + {"inst": "vreducesh W:xmm {kz},xmm[127:16],xmm[15:0]/m16,ib/ub {sae}" , "op": "RVM-T1S: EVEX.LIG.NP.0F3A.W0 57 /r ib" , "vl": 0}, + {"inst": "vrndscalesh W:xmm {kz},xmm[127:16],xmm[15:0]/m16,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.NP.0F3A.W0 0A /r ib" , "vl": 0}, + {"inst": "vrsqrtsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 4F /r" , "vl": 0}, + {"inst": "vscalefsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 2D /r" , "vl": 0}, + {"inst": "vsqrtsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 51 /r" , "vl": 0}, + {"inst": "vsubsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5C /r" , "vl": 0}, + {"inst": "vucomish R:xmm[15:0], xmm[15:0]/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.NP.MAP5.W0 2E /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}, + {"inst": "vfcmaddcsh X:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.MAP6.W0 57 /r" , "vl": 0}, + {"inst": "vfcmulcsh X:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.MAP6.W0 D7 /r" , "vl": 0}, + {"inst": "vfmaddcsh X:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP6.W0 57 /r" , "vl": 0} + ]}, + + {"category": "AVX512 SIMD", "ext": "AVX512_FP16", "data": [ + {"inst": "vaddph W:xmm {kz}, ~xmm, ~xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 58 /r" , "vl": 1}, + {"inst": "vaddph W:ymm {kz}, ~ymm, ~ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 58 /r" , "vl": 1}, + {"inst": "vaddph W:zmm {kz}, ~zmm, ~zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 58 /r" , "vl": 0}, + {"inst": "vcmpph W:k {k}, xmm, xmm/m128/b16, ib/ub" , "op": "RVM-FV: EVEX.128.NP.0F3A.W0 C2 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vcmpph W:k {k}, ymm, ymm/m256/b16, ib/ub" , "op": "RVM-FV: EVEX.256.NP.0F3A.W0 C2 /r ib" , "vl": 1, "k": "zeroing"}, + {"inst": "vcmpph W:k {k}, zmm, zmm/m512/b16, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.NP.0F3A.W0 C2 /r ib" , "vl": 0, "k": "zeroing"}, + {"inst": "vcvtdq2ph W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.NP.MAP5.W0 5B /r" , "vl": 1}, + {"inst": "vcvtdq2ph W:xmm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.NP.MAP5.W0 5B /r" , "vl": 1}, + {"inst": "vcvtdq2ph W:ymm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.NP.MAP5.W0 5B /r" , "vl": 0}, + {"inst": "vcvtpd2ph W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.MAP5.W1 5A /r" , "vl": 1}, + {"inst": "vcvtpd2ph W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.MAP5.W1 5A /r" , "vl": 1}, + {"inst": "vcvtpd2ph W:xmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.MAP5.W1 5A /r" , "vl": 0}, + {"inst": "vcvtph2dq W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.66.MAP5.W0 5B /r" , "vl": 1}, + {"inst": "vcvtph2dq W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.66.MAP5.W0 5B /r" , "vl": 1}, + {"inst": "vcvtph2dq W:zmm {kz}, ymm/m256/b16 {er}" , "op": "RM-HV: EVEX.512.66.MAP5.W0 5B /r" , "vl": 0}, + {"inst": "vcvtph2pd W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.NP.MAP5.W0 5A /r" , "vl": 1}, + {"inst": "vcvtph2pd W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.NP.MAP5.W0 5A /r" , "vl": 1}, + {"inst": "vcvtph2pd W:zmm {kz}, xmm/m128/b16 {sae}" , "op": "RM-QV: EVEX.512.NP.MAP5.W0 5A /r" , "vl": 0}, + {"inst": "vcvtph2psx W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.66.MAP6.W0 13 /r" , "vl": 1}, + {"inst": "vcvtph2psx W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.66.MAP6.W0 13 /r" , "vl": 1}, + {"inst": "vcvtph2psx W:zmm {kz}, ymm/m256/b16 {sae}" , "op": "RM-HV: EVEX.512.66.MAP6.W0 13 /r" , "vl": 0}, + {"inst": "vcvtph2qq W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.66.MAP5.W0 7B /r" , "vl": 1}, + {"inst": "vcvtph2qq W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.66.MAP5.W0 7B /r" , "vl": 1}, + {"inst": "vcvtph2qq W:zmm {kz}, xmm/m128/b16 {er}" , "op": "RM-QV: EVEX.512.66.MAP5.W0 7B /r" , "vl": 0}, + {"inst": "vcvtph2udq W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.NP.MAP5.W0 79 /r" , "vl": 1}, + {"inst": "vcvtph2udq W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.NP.MAP5.W0 79 /r" , "vl": 1}, + {"inst": "vcvtph2udq W:zmm {kz}, ymm/m256/b16 {er}" , "op": "RM-HV: EVEX.512.NP.MAP5.W0 79 /r" , "vl": 0}, + {"inst": "vcvtph2uqq W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.66.MAP5.W0 79 /r" , "vl": 1}, + {"inst": "vcvtph2uqq W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.66.MAP5.W0 79 /r" , "vl": 1}, + {"inst": "vcvtph2uqq W:zmm {kz}, xmm/m128/b16 {er}" , "op": "RM-QV: EVEX.512.66.MAP5.W0 79 /r" , "vl": 0}, + {"inst": "vcvtph2uw W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.NP.MAP5.W0 7D /r" , "vl": 1}, + {"inst": "vcvtph2uw W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.NP.MAP5.W0 7D /r" , "vl": 1}, + {"inst": "vcvtph2uw W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.NP.MAP5.W0 7D /r" , "vl": 0}, + {"inst": "vcvtph2w W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP5.W0 7D /r" , "vl": 1}, + {"inst": "vcvtph2w W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP5.W0 7D /r" , "vl": 1}, + {"inst": "vcvtph2w W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.66.MAP5.W0 7D /r" , "vl": 0}, + {"inst": "vcvtps2phx W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.MAP5.W0 1D /r" , "vl": 1}, + {"inst": "vcvtps2phx W:xmm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.MAP5.W0 1D /r" , "vl": 1}, + {"inst": "vcvtps2phx W:ymm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.66.MAP5.W0 1D /r" , "vl": 0}, + {"inst": "vcvtqq2ph W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.NP.MAP5.W1 5B /r" , "vl": 1}, + {"inst": "vcvtqq2ph W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.NP.MAP5.W1 5B /r" , "vl": 1}, + {"inst": "vcvtqq2ph W:xmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.NP.MAP5.W1 5B /r" , "vl": 0}, + {"inst": "vcvttph2dq W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.F3.MAP5.W0 5B /r" , "vl": 1}, + {"inst": "vcvttph2dq W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.F3.MAP5.W0 5B /r" , "vl": 1}, + {"inst": "vcvttph2dq W:zmm {kz}, ymm/m256/b16 {sae}" , "op": "RM-HV: EVEX.512.F3.MAP5.W0 5B /r" , "vl": 0}, + {"inst": "vcvttph2qq W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.66.MAP5.W0 7A /r" , "vl": 1}, + {"inst": "vcvttph2qq W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.66.MAP5.W0 7A /r" , "vl": 1}, + {"inst": "vcvttph2qq W:zmm {kz}, xmm/m128/b16 {sae}" , "op": "RM-QV: EVEX.512.66.MAP5.W0 7A /r" , "vl": 0}, + {"inst": "vcvttph2udq W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.NP.MAP5.W0 78 /r" , "vl": 1}, + {"inst": "vcvttph2udq W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.NP.MAP5.W0 78 /r" , "vl": 1}, + {"inst": "vcvttph2udq W:zmm {kz}, ymm/m256/b16 {sae}" , "op": "RM-HV: EVEX.512.NP.MAP5.W0 78 /r" , "vl": 0}, + {"inst": "vcvttph2uqq W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.66.MAP5.W0 78 /r" , "vl": 1}, + {"inst": "vcvttph2uqq W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.66.MAP5.W0 78 /r" , "vl": 1}, + {"inst": "vcvttph2uqq W:zmm {kz}, xmm/m128/b16 {sae}" , "op": "RM-QV: EVEX.512.66.MAP5.W0 78 /r" , "vl": 0}, + {"inst": "vcvttph2uw W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.NP.MAP5.W0 7C /r" , "vl": 1}, + {"inst": "vcvttph2uw W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.NP.MAP5.W0 7C /r" , "vl": 1}, + {"inst": "vcvttph2uw W:zmm {kz}, zmm/m512/b16 {sae}" , "op": "RM-FV: EVEX.512.NP.MAP5.W0 7C /r" , "vl": 0}, + {"inst": "vcvttph2w W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP5.W0 7C /r" , "vl": 1}, + {"inst": "vcvttph2w W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP5.W0 7C /r" , "vl": 1}, + {"inst": "vcvttph2w W:zmm {kz}, zmm/m512/b16 {sae}" , "op": "RM-FV: EVEX.512.66.MAP5.W0 7C /r" , "vl": 0}, + {"inst": "vcvtudq2ph W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.F2.MAP5.W0 7A /r" , "vl": 1}, + {"inst": "vcvtudq2ph W:xmm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.F2.MAP5.W0 7A /r" , "vl": 1}, + {"inst": "vcvtudq2ph W:ymm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.F2.MAP5.W0 7A /r" , "vl": 0}, + {"inst": "vcvtuqq2ph W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F2.MAP5.W1 7A /r" , "vl": 1}, + {"inst": "vcvtuqq2ph W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F2.MAP5.W1 7A /r" , "vl": 1}, + {"inst": "vcvtuqq2ph W:xmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F2.MAP5.W1 7A /r" , "vl": 0}, + {"inst": "vcvtuw2ph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.F2.MAP5.W0 7D /r" , "vl": 1}, + {"inst": "vcvtuw2ph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.F2.MAP5.W0 7D /r" , "vl": 1}, + {"inst": "vcvtuw2ph W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.F2.MAP5.W0 7D /r" , "vl": 0}, + {"inst": "vcvtw2ph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.F3.MAP5.W0 7D /r" , "vl": 1}, + {"inst": "vcvtw2ph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.F3.MAP5.W0 7D /r" , "vl": 1}, + {"inst": "vcvtw2ph W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.F3.MAP5.W0 7D /r" , "vl": 0}, + {"inst": "vdivph W:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 5E /r" , "vl": 1}, + {"inst": "vdivph W:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 5E /r" , "vl": 1}, + {"inst": "vdivph W:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 5E /r" , "vl": 0}, + {"inst": "vfcmaddcph X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F2.MAP6.W0 56 /r" , "vl": 1}, + {"inst": "vfcmaddcph X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F2.MAP6.W0 56 /r" , "vl": 1}, + {"inst": "vfcmaddcph X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.F2.MAP6.W0 56 /r" , "vl": 0}, + {"inst": "vfcmulcph X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F2.MAP6.W0 D6 /r" , "vl": 1}, + {"inst": "vfcmulcph X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F2.MAP6.W0 D6 /r" , "vl": 1}, + {"inst": "vfcmulcph X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.F2.MAP6.W0 D6 /r" , "vl": 0}, + {"inst": "vfmadd132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 98 /r" , "vl": 1}, + {"inst": "vfmadd132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 98 /r" , "vl": 1}, + {"inst": "vfmadd132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 98 /r" , "vl": 0}, + {"inst": "vfmadd213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 A8 /r" , "vl": 1}, + {"inst": "vfmadd213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 A8 /r" , "vl": 1}, + {"inst": "vfmadd213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 A8 /r" , "vl": 0}, + {"inst": "vfmadd231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 B8 /r" , "vl": 1}, + {"inst": "vfmadd231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 B8 /r" , "vl": 1}, + {"inst": "vfmadd231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 B8 /r" , "vl": 0}, + {"inst": "vfmaddcph X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F3.MAP6.W0 56 /r" , "vl": 1}, + {"inst": "vfmaddcph X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F3.MAP6.W0 56 /r" , "vl": 1}, + {"inst": "vfmaddcph X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.F3.MAP6.W0 56 /r" , "vl": 0}, + {"inst": "vfmaddsub132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 96 /r" , "vl": 1}, + {"inst": "vfmaddsub132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 96 /r" , "vl": 1}, + {"inst": "vfmaddsub132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 96 /r" , "vl": 0}, + {"inst": "vfmaddsub213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 A6 /r" , "vl": 1}, + {"inst": "vfmaddsub213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 A6 /r" , "vl": 1}, + {"inst": "vfmaddsub213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 A6 /r" , "vl": 0}, + {"inst": "vfmaddsub231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 B6 /r" , "vl": 1}, + {"inst": "vfmaddsub231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 B6 /r" , "vl": 1}, + {"inst": "vfmaddsub231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 B6 /r" , "vl": 0}, + {"inst": "vfmsub132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 9A /r" , "vl": 1}, + {"inst": "vfmsub132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 9A /r" , "vl": 1}, + {"inst": "vfmsub132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 9A /r" , "vl": 0}, + {"inst": "vfmsub213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 AA /r" , "vl": 1}, + {"inst": "vfmsub213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 AA /r" , "vl": 1}, + {"inst": "vfmsub213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 AA /r" , "vl": 0}, + {"inst": "vfmsub231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 BA /r" , "vl": 1}, + {"inst": "vfmsub231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 BA /r" , "vl": 1}, + {"inst": "vfmsub231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 BA /r" , "vl": 0}, + {"inst": "vfmsubadd132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 97 /r" , "vl": 1}, + {"inst": "vfmsubadd132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 97 /r" , "vl": 1}, + {"inst": "vfmsubadd132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 97 /r" , "vl": 0}, + {"inst": "vfmsubadd213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 A7 /r" , "vl": 1}, + {"inst": "vfmsubadd213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 A7 /r" , "vl": 1}, + {"inst": "vfmsubadd213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 A7 /r" , "vl": 0}, + {"inst": "vfmsubadd231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 B7 /r" , "vl": 1}, + {"inst": "vfmsubadd231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 B7 /r" , "vl": 1}, + {"inst": "vfmsubadd231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 B7 /r" , "vl": 0}, + {"inst": "vfmulcph X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F3.MAP6.W0 D6 /r" , "vl": 1}, + {"inst": "vfmulcph X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F3.MAP6.W0 D6 /r" , "vl": 1}, + {"inst": "vfmulcph X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.F3.MAP6.W0 D6 /r" , "vl": 0}, + {"inst": "vfmulcsh X:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP6.W0 D7 /r" , "vl": 1}, + {"inst": "vfnmadd132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 9C /r" , "vl": 1}, + {"inst": "vfnmadd132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 9C /r" , "vl": 1}, + {"inst": "vfnmadd132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 9C /r" , "vl": 0}, + {"inst": "vfnmadd213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 AC /r" , "vl": 1}, + {"inst": "vfnmadd213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 AC /r" , "vl": 1}, + {"inst": "vfnmadd213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 AC /r" , "vl": 0}, + {"inst": "vfnmadd231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 BC /r" , "vl": 1}, + {"inst": "vfnmadd231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 BC /r" , "vl": 1}, + {"inst": "vfnmadd231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 BC /r" , "vl": 0}, + {"inst": "vfnmsub132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 9E /r" , "vl": 1}, + {"inst": "vfnmsub132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 9E /r" , "vl": 1}, + {"inst": "vfnmsub132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 9E /r" , "vl": 0}, + {"inst": "vfnmsub213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 AE /r" , "vl": 1}, + {"inst": "vfnmsub213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 AE /r" , "vl": 1}, + {"inst": "vfnmsub213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 AE /r" , "vl": 0}, + {"inst": "vfnmsub231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 BE /r" , "vl": 1}, + {"inst": "vfnmsub231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 BE /r" , "vl": 1}, + {"inst": "vfnmsub231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 BE /r" , "vl": 0}, + {"inst": "vfpclassph W:k {k}, xmm/m128/b16, ib/ub" , "op": "RM-FV: EVEX.128.NP.0F3A.W0 66 /r ib" , "vl": 1}, + {"inst": "vfpclassph W:k {k}, ymm/m256/b16, ib/ub" , "op": "RM-FV: EVEX.256.NP.0F3A.W0 66 /r ib" , "vl": 1}, + {"inst": "vfpclassph W:k {k}, zmm/m512/b16, ib/ub" , "op": "RM-FV: EVEX.512.NP.0F3A.W0 66 /r ib" , "vl": 0}, + {"inst": "vgetexpph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP6.W0 42 /r" , "vl": 1}, + {"inst": "vgetexpph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP6.W0 42 /r" , "vl": 1}, + {"inst": "vgetexpph W:zmm {kz}, zmm/m512/b16 {sae}" , "op": "RM-FV: EVEX.512.66.MAP6.W0 42 /r" , "vl": 0}, + {"inst": "vgetmantph W:xmm {kz}, xmm/m128/b16, ib/ub" , "op": "RM-FV: EVEX.128.NP.0F3A.W0 26 /r ib" , "vl": 1}, + {"inst": "vgetmantph W:ymm {kz}, ymm/m256/b16, ib/ub" , "op": "RM-FV: EVEX.256.NP.0F3A.W0 26 /r ib" , "vl": 1}, + {"inst": "vgetmantph W:zmm {kz}, zmm/m512/b16, ib/ub {sae}" , "op": "RM-FV: EVEX.512.NP.0F3A.W0 26 /r ib" , "vl": 0}, + {"inst": "vmaxph W:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 5F /r" , "vl": 1}, + {"inst": "vmaxph W:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 5F /r" , "vl": 1}, + {"inst": "vmaxph W:zmm {kz}, zmm, zmm/m512/b16 {sae}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 5F /r" , "vl": 0}, + {"inst": "vminph W:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 5D /r" , "vl": 1}, + {"inst": "vminph W:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 5D /r" , "vl": 1}, + {"inst": "vminph W:zmm {kz}, zmm, zmm/m512/b16 {sae}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 5D /r" , "vl": 0}, + {"inst": "vmovw W:r32[15:0]/m16, xmm[15:0]" , "op": "MR-T1S: EVEX.128.66.MAP5.WIG 7E /r" , "vl": 0}, + {"inst": "vmovw W:xmm[15:0] {kz}, r32[15:0]/m16" , "op": "RM-T1S: EVEX.128.66.MAP5.WIG 6E /r" , "vl": 0}, + {"inst": "vmulph W:xmm {kz}, ~xmm, ~xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 59 /r" , "vl": 1}, + {"inst": "vmulph W:ymm {kz}, ~ymm, ~ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 59 /r" , "vl": 1}, + {"inst": "vmulph W:zmm {kz}, ~zmm, ~zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 59 /r" , "vl": 0}, + {"inst": "vrcpph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP6.W0 4C /r" , "vl": 0}, + {"inst": "vrcpph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP6.W0 4C /r" , "vl": 0}, + {"inst": "vrcpph W:zmm {kz}, zmm/m512/b16" , "op": "RM-FV: EVEX.512.66.MAP6.W0 4C /r" , "vl": 0}, + {"inst": "vreduceph W:xmm {kz}, xmm/m128/b16, ib/ub" , "op": "RM-FV: EVEX.128.NP.0F3A.W0 56 /r ib" , "vl": 1}, + {"inst": "vreduceph W:ymm {kz}, ymm/m256/b16, ib/ub" , "op": "RM-FV: EVEX.256.NP.0F3A.W0 56 /r ib" , "vl": 1}, + {"inst": "vreduceph W:zmm {kz}, zmm/m512/b16, ib/ub {sae}" , "op": "RM-FV: EVEX.512.NP.0F3A.W0 56 /r ib" , "vl": 0}, + {"inst": "vrndscaleph W:xmm {kz}, xmm/m128/b16, ib/ub" , "op": "RM-FV: EVEX.128.NP.0F3A.W0 08 /r ib" , "vl": 1}, + {"inst": "vrndscaleph W:ymm {kz}, ymm/m256/b16, ib/ub" , "op": "RM-FV: EVEX.256.NP.0F3A.W0 08 /r ib" , "vl": 1}, + {"inst": "vrndscaleph W:zmm {kz}, zmm/m512/b16, ib/ub {sae}" , "op": "RM-FV: EVEX.512.NP.0F3A.W0 08 /r ib" , "vl": 0}, + {"inst": "vrsqrtph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP6.W0 4E /r" , "vl": 1}, + {"inst": "vrsqrtph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP6.W0 4E /r" , "vl": 1}, + {"inst": "vrsqrtph W:zmm {kz}, zmm/m512/b16" , "op": "RM-FV: EVEX.512.66.MAP6.W0 4E /r" , "vl": 0}, + {"inst": "vscalefph W:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 2C /r" , "vl": 1}, + {"inst": "vscalefph W:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 2C /r" , "vl": 1}, + {"inst": "vscalefph W:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 2C /r" , "vl": 0}, + {"inst": "vsqrtph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.NP.MAP5.W0 51 /r" , "vl": 1}, + {"inst": "vsqrtph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.NP.MAP5.W0 51 /r" , "vl": 1}, + {"inst": "vsqrtph W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.NP.MAP5.W0 51 /r" , "vl": 0}, + {"inst": "vsubph W:xmm {kz}, ~xmm, ~xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 5C /r" , "vl": 1}, + {"inst": "vsubph W:ymm {kz}, ~ymm, ~ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 5C /r" , "vl": 1}, + {"inst": "vsubph W:zmm {kz}, ~zmm, ~zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 5C /r" , "vl": 0} + ]}, + + {"category": "AMX", "ext": "AMX_TILE", "arch": "X64", "data": [ + {"inst": "ldtilecfg R:m512" , "op": "VEX.128.0F38.W0 49 /0"}, + {"inst": "sttilecfg W:m512" , "op": "VEX.128.66.0F38.W0 49 /0"}, + {"inst": "tileloadd W:tmm, tmem" , "op": "RM: VEX.128.F2.0F38.W0 4B /r"}, + {"inst": "tileloaddt1 W:tmm, tmem" , "op": "RM: VEX.128.66.0F38.W0 4B /r"}, + {"inst": "tilerelease" , "op": "VEX.128.0F38.W0 49 /0"}, + {"inst": "tilestored W:tmem, tmm" , "op": "MR: VEX.128.F3.0F38.W0 4B /r"}, + {"inst": "tilezero W:tmm" , "op": "R: VEX.128.F2.0F38.W0 49 /r"} + ]}, + + {"category": "AMX", "ext": "AMX_BF16", "arch": "X64", "data": [ + {"inst": "tdpbf16ps X:tmm, tmm, tmm" , "op": "RMV: VEX.128.F3.0F38.W0 5C /r"} + ]}, + + {"category": "AMX", "ext": "AMX_COMPLEX", "arch": "X64", "data": [ + {"inst": "tcmmimfp16ps X:tmm, tmm, tmm" , "op": "RMV: VEX.128.66.0F38.W0 6C /r"}, + {"inst": "tcmmrlfp16ps X:tmm, tmm, tmm" , "op": "RMV: VEX.128.NP.0F38.W0 6C /r"} + ]}, + + {"category": "AMX", "ext": "AMX_FP16", "arch": "X64", "data": [ + {"inst": "tdpfp16ps X:tmm, tmm, tmm" , "op": "RMV: VEX.128.F2.0F38.W0 5C /r"} + ]}, + + {"category": "AMX", "ext": "AMX_INT8", "arch": "X64", "data": [ + {"inst": "tdpbssd X:tmm, tmm, tmm" , "op": "RMV: VEX.128.F2.0F38.W0 5E /r"}, + {"inst": "tdpbsud X:tmm, tmm, tmm" , "op": "RMV: VEX.128.F3.0F38.W0 5E /r"}, + {"inst": "tdpbusd X:tmm, tmm, tmm" , "op": "RMV: VEX.128.66.0F38.W0 5E /r"}, + {"inst": "tdpbuud X:tmm, tmm, tmm" , "op": "RMV: VEX.128.0F38.W0 5E /r"} + ]} + ], + + "postproc": [ + {"group": "Control Flow", "instructions": [ + {"inst": "call lcall", "control": "call"}, + {"inst": "iret iretd iretq", "control": "return"}, + {"inst": "jae jnb jnc jo jno jb jnae jc je jz jne jnz jbe jna ja jnbe js jns jp jpe jnp jpo jl jnge jge jnl jle jng jg jnle jecxz", "control": "branch"}, + {"inst": "jmp ljmp", "control": "jump"}, + {"inst": "loop loope loopne", "control": "branch"}, + {"inst": "ret retf", "control": "return"} + ]}, + + {"group": "Encoding Preference", "instructions": [ + {"inst": "vcvtneps2bf16", "encodingPreference": "EVEX"}, + {"inst": "vpmadd52huq vpmadd52luq", "encodingPreference": "EVEX"}, + {"inst": "vpdpbusd vpdpbusds vpdpwssd vpdpwssds", "encodingPreference": "EVEX"} + ]} + ] +} diff --git a/db/package.json b/db/package.json new file mode 100644 index 0000000..8519aad --- /dev/null +++ b/db/package.json @@ -0,0 +1,29 @@ +{ + "name": "asmdb", + "version": "0.1.0", + "license": "Unlicense", + "engines": { "node": ">=8" }, + + "description": "Instructions database and utilities for X86/X64 and ARM (THUMB/A32/A64) architectures.", + "keywords": [ + "asm", "assembler", "database", "instructions", + "arm", "thumb", "thumb2", "a32", "a64", "aarch32", "aarch64", + "x86", "x86_64", "x64", "amd64" + ], + + "homepage": "https://github.com/asmjit/asmjit/db", + "bugs": { + "url": "https://github.com/asmjit/asmjit/issues" + }, + + "contributors": [ + "Petr Kobalicek (kobalicek.com)" + ], + + "main": "index.js", + + "repository" : { + "type": "git", + "url": "https://github.com/asmjit/asmjit.git" + } +} diff --git a/db/x86.js b/db/x86.js new file mode 100644 index 0000000..c3fef78 --- /dev/null +++ b/db/x86.js @@ -0,0 +1,1005 @@ +// This file is part of AsmJit project +// +// See asmjit.h or LICENSE.md for license and copyright information +// SPDX-License-Identifier: Zlib + +(function($scope, $as) { +"use strict"; + +function FAIL(msg) { throw new Error("[X86] " + msg); } + +// Import. +const base = $scope.base ? $scope.base : require("./base.js"); + +const hasOwn = Object.prototype.hasOwnProperty; +const dict = base.dict; +const NONE = base.NONE; +const Parsing = base.Parsing; +const MapUtils = base.MapUtils; + +// Export. +const x86 = $scope[$as] = {}; + +// Database +// ======== + +x86.dbName = "isa_x86.json"; + +// CpuRegs +// ======= + +// Build an object containing CPU registers as keys mapping them to type, kind, and index. +function buildCpuRegs(defs) { + const map = dict(); + + for (var type in defs) { + const def = defs[type]; + const kind = def.kind; + const names = def.names; + + if (def.any) + map[def.any] = { type: type, kind: kind, index: -1 }; + + for (var i = 0; i < names.length; i++) { + var name = names[i]; + var m = /^([A-Za-z\(\)]+)(\d+)-(\d+)([A-Za-z\(\)]*)$/.exec(name); + + if (m) { + var a = parseInt(m[2], 10); + var b = parseInt(m[3], 10); + + for (var n = a; n <= b; n++) { + const index = m[1] + n + m[4]; + map[index] = { type: type, kind: kind, index: index }; + } + } + else { + map[name] = { type: type, kind: kind, index: i }; + } + } + } + + // HACK: In instruction manuals `r8` denotes low 8-bit register, however, + // that collides with `r8`, which is a 64-bit register. Since the result + // of this function is only used internally we patch it to be compatible + // with what Intel specifies. + map.r8.type = "r8"; + + return map; +} + +const kCpuRegisters = buildCpuRegs({ + "r8" : { "kind": "gp" , "any": "r8" , "names": ["al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", "r8-15b"] }, + "r8hi": { "kind": "gp" , "names": ["ah", "ch", "dh", "bh"] }, + "r16" : { "kind": "gp" , "any": "r16" , "names": ["ax", "cx", "dx", "bx", "sp", "bp", "si", "di", "r8-15w"] }, + "r32" : { "kind": "gp" , "any": "r32" , "names": ["eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", "r8-15d"] }, + "r64" : { "kind": "gp" , "any": "r64" , "names": ["rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", "r8-15"] }, + "rxx" : { "kind": "gp" , "names": ["zax", "zcx", "zdx", "zbx", "zsp", "zbp", "zsi", "zdi"] }, + "sreg": { "kind": "sreg", "any": "sreg" , "names": ["es", "cs", "ss", "ds", "fs", "gs" ] }, + "creg": { "kind": "creg", "any": "creg" , "names": ["cr0-15"] }, + "dreg": { "kind": "dreg", "any": "dreg" , "names": ["dr0-15"] }, + "bnd" : { "kind": "bnd" , "any": "bnd" , "names": ["bnd0-3"] }, + "st" : { "kind": "st" , "any": "st(i)", "names": ["st(0-7)"] }, + "mm" : { "kind": "mm" , "any": "mm" , "names": ["mm0-7"] }, + "k" : { "kind": "k" , "any": "k" , "names": ["k0-7"] }, + "xmm" : { "kind": "vec" , "any": "xmm" , "names": ["xmm0-31"] }, + "ymm" : { "kind": "vec" , "any": "ymm" , "names": ["ymm0-31"] }, + "zmm" : { "kind": "vec" , "any": "zmm" , "names": ["zmm0-31"] }, + "tmm" : { "kind": "tile", "any": "tmm" , "names": ["tmm0-7"] } +}); + +// asmdb.x86.Utils +// =============== + +const RegSize = Object.freeze({ + "r8" : 8, + "r8hi": 8, + "r16" : 16, + "r32" : 32, + "r64" : 64, + "mm" : 64, + "xmm" : 128, + "ymm" : 256, + "zmm" : 512, + "tmm" : 512, // Maximum size (64 bytes). + "bnd" : 128, + "k" : 64, + "st" : 80 +}); + +// X86/X64 utilities. +class Utils { + static splitInstructionSignature(s) { + let prefixes = []; + if (s.startsWith("[")) { + const prefixEnd = Parsing.matchClosingChar(s, 0); + prefixes = s.substring(1, prefixEnd).replace("xacqrel", "xacquire|xrelease").split("|"); + + s = s.substring(prefixEnd + 1).trim(); + } + + const nameEnd = s.indexOf(" "); + const names = s.substring(0, nameEnd === -1 ? s.length : nameEnd).split("|"); + const operands = nameEnd === -1 ? "" : s.substring(nameEnd + 1).trim(); + + return { + names: names, + prefixes: prefixes, + operands: operands + } + } + + // Split the operand(s) string into individual operands as defined by the + // instruction database. + // + // NOTE: X86/X64 doesn't require anything else than separating the commas, + // this function is here for compatibility with other instruction sets. + static splitOperands(s) { + const array = s.split(","); + for (var i = 0; i < array.length; i++) + array[i] = array[i].trim(); + return array; + } + + // Get whether the string `s` describes a register operand. + static isRegOp(s) { return s && hasOwn.call(kCpuRegisters, s); } + // Get whether the string `s` describes a memory operand. + static isMemOp(s) { return s && /^(?:mem|mib|tmem|moff|(?:m(?:off)?\d+(?:dec|bcd|fp|int)?)|(?:m16_\d+)|(?:vm\d+(?:x|y|z)))$/.test(s); } + // Get whether the string `s` describes an immediate operand. + static isImmOp(s) { return s && /^(?:1|i4|u4|ib|ub|iw|uw|id|ud|if|iq|uq|p16_16|p16_32)$/.test(s); } + // Get whether the string `s` describes a relative displacement (label). + static isRelOp(s) { return s && /^rel\d+$/.test(s); } + + // Get a register type of a `s`, returns `null` if the register is unknown. + static regTypeOf(s) { return hasOwn.call(kCpuRegisters, s) ? kCpuRegisters[s].type : null; } + // Get a register kind of a `s`, returns `null` if the register is unknown. + static regKindOf(s) { return hasOwn.call(kCpuRegisters, s) ? kCpuRegisters[s].kind : null; } + // Get a register type of a `s`, returns `null` if the register is unknown and `-1` + // if the given string does only represent a register type, but not a specific reg. + static regIndexOf(s) { return hasOwn.call(kCpuRegisters, s) ? kCpuRegisters[s].index : null; } + + static regSize(s) { + if (s in RegSize) + return RegSize[s]; + + const reg = kCpuRegisters[s]; + if (reg && reg.type in RegSize) + return RegSize[reg.type]; + + return -1; + } + + // Get size of an immediate `s` [in bits]. + // + // Handles "ib", "iw", "id", "if", "iq", and also "/is4". + static immSize(s) { + switch (s) { + case "1" : return 8; + case "i4" : + case "u4" : + case "/is4" : return 4; + case "ib" : + case "ub" : return 8; + case "iw" : + case "uw" : return 16; + case "id" : + case "ud" : return 32; + case "iq" : + case "uq" : return 64; + case "p16_16": return 32; + case "if" : + case "p16_32": return 48; + default : return -1; + } + } + + // Get size of a relative displacement [in bits]. + static relSize(s) { + switch (s) { + case "rel8" : return 8; + case "rel16" : return 16; + case "rel32" : return 32; + default : return -1; + } + } +} +x86.Utils = Utils; + +// asmdb.x86.Operand +// ================= + +// X86/X64 operand. +class Operand extends base.Operand { + constructor(data, defaultAccess) { + super(data); + + this.memSegment = ""; // Segment specified with register that is used to perform a memory IO. + this.memOff = false; // Memory operand is an absolute offset (only a specific version of MOV). + this.memFar = false; // Memory is a far pointer (includes segment in first two bytes). + this.vsibReg = ""; // AVX VSIB register type (xmm/ymm/zmm). + this.vsibSize = -1; // AVX VSIB register size (32/64). + this.bcstSize = -1; // AVX-512 broadcast size. + + const type = []; + var s = data; + + // Handle RWX decorators prefix "[RWwXx]:". + const mAccess = /^([RWwXx])\:/.exec(s); + if (mAccess) { + this.setAccess(mAccess[1]); + s = s.substring(mAccess[0].length); + } + + // Handle commutativity attribute. + if (Parsing.isCommutative(s)) { + this.commutative = true; + s = Parsing.clearCommutative(s); + } + + // Handle AVX-512 broadcast possibility specified as "/bN" suffix. + const mBcst = /\/b(\d+)/.exec(s); + if (mBcst) { + this.bcstSize = parseInt(mBcst[1], 10); + + // Remove the broadcast attribute from the definition; it's not needed anymore. + s = s.substring(0, mBcst.index) + s.substring(mBcst.index + mBcst[0].length); + } + + // Handle attribute. + if (Parsing.isImplicit(s)) { + this.implicit = true; + s = Parsing.clearImplicit(s); + } + + // Support multiple operands separated by "/" (only used by r/m and i/u). + var ops = s.split("/"); + var oArr = []; + + for (var i = 0; i < ops.length; i++) { + var origOp = ops[i].trim(); + var op = origOp; + + // Handle range suffix [A] or [A:B]: + const mRange = /\[(\d+)\s*(?:\:\s*(\d+)\s*)?\]$/.exec(op); + if (mRange) { + var a = parseInt(mRange[1], 10); + var b = parseInt(mRange[2] || String(a), 10); + + if (a < b) + FAIL(`Operand '${origOp}' contains invalid range '[${a}:${b}]'`) + + this.rwxIndex = b; + this.rwxWidth = a - b + 1; + + op = op.substring(0, op.length - mRange[0].length); + } + + // Handle a segment specification if this is an implicit register performing + // memory access. + const memSegRegM = op.match(/\((ds|es)\:\s*([\w]+)\)$/); + if (memSegRegM) { + this.memSegment = memSegRegM[1]; + this.memRegOnly = memSegRegM[2]; + op = op.substring(0, memSegRegM.index).trim(); + } + + oArr.push(op); + + var regIndexRel = 0; + if (op.endsWith("+1") || op.endsWith("+2") || op.endsWith("+3")) { + regIndexRel = parseInt(op.substr(op.length - 1, 1)); + op = op.substring(0, op.length - 2); + } + + if (Utils.isRegOp(op)) { + this.reg = op; + this.regType = Utils.regTypeOf(op); + this.regIndexRel = regIndexRel; + + type.push("reg"); + continue; + } + + if (Utils.isMemOp(op)) { + this.mem = op; + + // Handle memory size. + const mOff = /^m(?:off)?(\d+)/.exec(op); + this.memSize = mOff ? parseInt(mOff[1], 10) : 0; + this.memOff = op.indexOf("moff") === 0; + + const mSeg = /^m16_(\d+)/.exec(op); + if (mSeg) { + this.memFar = true; + this.memSize = parseInt(mSeg[1], 10) + 16; + } + + // Handle vector addressing mode and size "vmXXr". + const mVM = /^vm(\d+)(x|y|z)$/.exec(op); + if (mVM) { + this.vsibReg = mVM[2] + "mm"; + this.vsibSize = parseInt(mVM[1], 10); + } + + type.push("mem"); + continue; + } + + if (Utils.isImmOp(op)) { + const size = Utils.immSize(op); + if (!this.imm) + this.imm = size; + else if (this.imm !== size) + FAIL(`Immediate size mismatch: ${this.imm} != ${size}`); + + // Sign-extend / zero-extend. + const sign = op.startsWith("i") ? "signed" : "unsigned"; + + if (!this.immSign) + this.immSign = sign; + else if (this.immType !== sign) + this.immSign = "any"; + + if (op === "1") { + this.immValue = 1; + this.implicit = true; + } + + if (type.indexOf("imm") !== -1) + type.push("imm"); + continue; + } + + if (Utils.isRelOp(op)) { + this.rel = Utils.relSize(op); + + type.push("rel"); + continue; + } + + FAIL(`Operand '${origOp}' unhandled`); + } + + // In case the data has been modified it's always better to use the stripped off + // version as we have already processed and stored all the possible decorators. + this.data = oArr.join("/"); + this.type = type.join("/"); + + if (this.rwxIndex === -1) { + const opSize = this.isReg() ? this.regSize : + this.isMem() ? this.memSize : -1; + if (opSize !== -1) { + this.rwxIndex = 0; + this.rwxWidth = opSize; + } + } + + if (!mAccess && this.isRegOrMem()) + this.setAccess(defaultAccess); + } + + get regSize() { + return Utils.regSize(this.reg); + } + + setAccess(x) { + const u = x.toUpperCase(); + this.zext = x === "W" || x === "X"; + this.read = u === "R" || u === "X"; + this.write = u === "W" || u === "X"; + return this; + } + + + isFixedReg() { return this.reg && this.reg !== this.regType && this.reg !== "st(i)"; } + isFixedMem() { return this.memSegment && this.isFixedReg(); } + + isPartialOp() { + const maybePartial = this.regType === "r8" || + this.regType === "r8hi" || + this.regType === "r16" || + this.regType === "xmm"; + return maybePartial && !this.zext; + } + + toRegMem() { + if (this.reg && this.mem) + return this.reg + "/m"; + else if (this.mem && (this.vsibReg || /fp$|int$/.test(this.mem))) + return this.mem; + else if (this.mem) + return "m"; + else + return this.toString(); + } + + toString() { return this.data; } +} +x86.Operand = Operand; + +// asmdb.x86.Instruction +// ===================== + +// X86/X64 instruction. +class Instruction extends base.Instruction { + constructor(db, data) { + super(db); + + const semicolon = data.op.indexOf(":"); + + this.name = data.name; // Instruction name. + this.privilege = "L3"; // Privilege level required to execute the instruction. + this.prefix = ""; // Prefix - "", "3DNOW", "EVEX", "VEX", "XOP". + this.opcodeHex = ""; // A single opcode byte as hexadecimal string "00-FF". + + this.l = ""; // Opcode L field (nothing, 128, 256, 512). + this.w = ""; // Opcode W field. + this.pp = ""; // Opcode PP part. + this.mm = ""; // Opcode MM[MMM] part. + this._67h = false; // Instruction requires a size override prefix. + + this.modR = ""; // Instruction specific payload in ModRM byte (R part), specified as "/0..7". + this.modRM = ""; // Instruction specific payload in ModRM byte (RM part), specified as another opcode byte. + this.ri = false; // Instruction opcode is combined with register, "XX+r" or "XX+i". + this.rel = 0; // Displacement ("cb", "cw", and "cd" parts). + + this.fpuTop = 0; // FPU top index manipulation [-1, 0, 1, 2]. + this.fpuStack = ""; // FPU stack manipulation + + this.vsibReg = ""; // AVX VSIB register type (xmm/ymm/zmm). + this.vsibSize = -1; // AVX VSIB register size (32/64). + + this.broadcast = false; // AVX-512 broadcast support. + this.bcstSize = -1; // AVX-512 broadcast size. + + this.k = ""; // AVX-512 K function ("", "blend", "zeroing"). + this.kmask = false; // AVX-512 merging {k}. + this.zmask = false; // AVX-512 zeroing {kz}, implies {k}. + this.er = false; // AVX-512 embedded rounding {er}, implies {sae}. + this.sae = false; // AVX-512 suppress all exceptions {sae} support. + + this.tupleType = ""; // AVX-512 tuple-type. + this.elementSize = -1; // Instruction's element size. + this.encodingPreference = ""; // Encoding preference (either nothing or "EVEX"). + + this.consecutiveLead = 0; // Consecutive register leading N other registers. + this.prefixes = dict(); // Allowed prefixes. + + this._assignOperands(data.operands); + this._assignEncoding(semicolon !== -1 ? data.op.substring(0, semicolon) : "NONE"); + this._assignOpcode(semicolon !== -1 ? data.op.substring(semicolon + 1).trim() : data.op.trim()); + + for (let k in data) { + if (k === "name" || k === "op" || k === "operands") + continue; + this._assignAttribute(k, data[k]); + } + + this._updateOperandsInfo(); + this._postProcess(); + } + + _assignAttribute(key, value) { + switch (key) { + case "vl": + if (value) { + this.ext["AVX512_VL"] = true; + } + return; + + case "prefixes": + this._combineAttribute("prefixes", value); + return; + + case "fpuStack": + this.fpuStack = value; + switch (value) { + case "dec" : this.fpuTop = -1; break; + case "inc" : this.fpuTop = 1; break; + case "pop" : this.fpuTop = 1; break; + case "pop2x": this.fpuTop = 2; break; + case "push" : this.fpuTop = -1; break; + default: + FAIL(`Invalid fpuStack value '${value}'`); + } + return; + + case "kz": + this.zmask = true; + this.kmask = true; + return; + + case "k": + this.kmask = true; + return; + + case "er": + this.er = true; + this.sae = true; // fall: {er} implies {sae}. + return; + + case "sae": + this.sae = true; + return; + + case "broadcast": + this.broadcast = true; + this.elementSize = value; + return; + + default: + super._assignAttribute(key, value); + } + } + + _assignOperands(s) { + if (!s) return; + + // First remove all flags specified as {...}. We put them into `flags` + // map and mix with others. This seems to be the best we can do here. + for (;;) { + var a = s.indexOf("{"); + var b = s.indexOf("}"); + + if (a === -1 || b === -1) + break; + + // Get the `flag` and remove it from `s`. + this._assignAttribute(s.substring(a + 1, b), true); + s = s.substring(0, a) + s.substring(b + 1); + } + + // Split into individual operands and push them to `operands`. + const arr = Utils.splitOperands(s); + for (var i = 0; i < arr.length; i++) { + const operand = new Operand(arr[i].trim(), i === 0 ? "X" : "R"); + if (operand.mem == "tmem") + this.tsib = true; + this.operands.push(operand); + } + } + + _assignEncoding(s) { + // Parse 'TUPLE-TYPE' as defined by AVX-512. + var i = s.indexOf("-"); + if (i !== -1) { + this.tupleType = s.substring(i + 1); + s = s.substring(0, i); + } + + this.encoding = s; + } + + _assignOpcode(s) { + this.opcodeString = s; + + var parts = s.split(" "); + var prefix, comp; + var i; + + if (/^(EVEX|VEX|XOP)\./.test(s)) { + // Parse VEX and EVEX encoded instruction. + prefix = parts[0].split("."); + + for (i = 0; i < prefix.length; i++) { + comp = prefix[i]; + + // Ignore NP, it's just a placeholder. + if (comp == "NP") + continue; + + // Process "EVEX", "VEX", and "XOP" prefixes. + if (/^(?:EVEX|VEX|XOP)$/.test(comp)) { this.prefix = comp; continue; } + + // Process `L` field. + if (/^LIG$/ .test(comp)) { this.l = "LIG"; continue; } + if (/^128|L0|LZ$/.test(comp)) { this.l = "128"; continue; } + if (/^256|L1$/ .test(comp)) { this.l = "256"; continue; } + if (/^512$/ .test(comp)) { this.l = "512"; continue; } + + // Process `PP` field - 66/F2/F3. + if (comp === "P0") { /* ignored, `P` is zero... */ continue; } + if (/^(?:66|F2|F3)$/.test(comp)) { this.pp = comp; continue; } + + // Process `MM` field - 0F/0F3A/0F38/MAP5/MAP6/M8/M9. + if (/^(?:0F|0F3A|0F38|MAP5|MAP6|M08|M09|M0A)$/.test(comp)) { this.mm = comp; continue; } + + // Process `W` field. + if (/^WIG|W0|W1$/.test(comp)) { this.w = comp; continue; } + + // ERROR. + this.report(`'${this.opcodeString}' Unhandled component: ${comp}`); + } + + for (i = 1; i < parts.length; i++) { + comp = parts[i]; + + // Parse opcode. + if (/^[0-9A-Fa-f]{2}$/.test(comp)) { + this.opcodeHex = comp.toUpperCase(); + continue; + } + + // Parse "/r" or "/0-7". + if (/^\/[r0-7]$/.test(comp)) { + this.modR = comp.charAt(1); + continue; + } + + // Parse immediate byte, word, dword, or qword. + if (/^(?:ib|iw|id|iq|\/is4)$/.test(comp)) { + this.imm += Utils.immSize(comp); + continue; + } + + this.report(`'${this.opcodeString}' Unhandled opcode component: ${comp}`); + } + } + else { + // Parse X86/X64 instruction (including legacy MMX/SSE/3DNOW instructions). + for (i = 0; i < parts.length; i++) { + comp = parts[i]; + + // Parse REX.W prefix. + if (comp === "REX.W") { + this.w = "W1"; + // Instructions that force REX.W prefix are always 64-bit instructions. + this.arch = "X64"; + continue; + } + + // Parse `PP` prefixes. + if ((this.mm === "" && ((this.pp === "" && /^(?:66|F2|F3)$/.test(comp)) || + (this.pp === "66" && /^(?:F2|F3)$/ .test(comp))))) { + this.pp += comp; + continue; + } + + // Parse `MM` prefixes. + if ((this.mm === "" && comp === "0F") || + (this.mm === "0F" && /^(?:01|3A|38)$/.test(comp))) { + this.mm += comp; + continue; + } + + // Recognize "0F 0F /r XX" encoding. + if (this.mm === "0F" && comp === "0F") { + this.prefix = "3DNOW"; + continue; + } + + // Parse opcode byte. + if (/^[0-9A-F]{2}(?:\+[ri])?$/.test(comp)) { + // Parse "+r" or "+i" suffix. + if (comp.length > 2) { + this.ri = true; + comp = comp.substring(0, 2); + } + + // FPU instructions are encoded as "PREFIX XX", where prefix is not the same + // as MM prefixes used everywhere else. AsmJit internally extends MM field in + // instruction tables to allow storing this prefix together with other "MM" + // prefixes, currently the unused indexes are used, but if X86 moves forward + // and starts using these we can simply use more bits in the opcode DWORD. + if (!this.pp && this.opcodeHex === "9B") { + this.pp = this.opcodeHex; + this.opcodeHex = comp; + continue; + } + + if (!this.mm && (/^(?:D8|D9|DA|DB|DC|DD|DE|DF)$/.test(this.opcodeHex))) { + this.mm = this.opcodeHex; + this.opcodeHex = comp; + continue; + } + + if (this.opcodeHex) { + if (this.opcodeHex === "67") { + this._67h = true; + } + else { + if (!this.modR && !this.modRM) { + const value = parseInt(comp, 16); + if ((value & 0xC0) == 0xC0) { + this.modR = String((value >> 3) & 0x7); + this.modRM = String((value >> 0) & 0x7); + } + else { + this.report(`'${this.opcodeString}' Unsupported secondary opcode (MOD/RM) '${comp}' value`); + } + } + else { + this.report(`'${this.opcodeString}' Multiple opcodes, have ${this.opcodeHex}, found ${comp}`); + } + } + } + + this.opcodeHex = comp; + continue; + } + + // Parse "/r" or "/0-7". + if (/^\/[r0-7]$/.test(comp) && !this.modR) { + this.modR = comp.charAt(1); + continue; + } + + // Parse immediate byte, word, dword, fword, or qword. + if (/^(?:ib|iw|id|iq|if)$/.test(comp)) { + this.imm += Utils.immSize(comp); + continue; + } + if (comp === "moff") { + this.moff = true; + continue; + } + + // Parse displacement. + if (/^(?:cb|cw|cd)$/.test(comp) && !this.rel) { + this.rel = comp === "cb" ? 1 : + comp === "cw" ? 2 : + comp === "cd" ? 4 : -1; + continue; + } + + // ERROR. + this.report(`'${this.opcodeString}' Unhandled opcode component: ${comp}`); + } + } + + // HACK: Fix instructions having opcode "01". + if (this.opcodeHex === "" && this.mm.indexOf("0F01") === this.mm.length - 4) { + this.opcodeHex = "01"; + this.mm = this.mm.substring(0, this.mm.length - 2); + } + + if (this.opcodeHex) + this.opcodeValue = parseInt(this.opcodeHex, 16); + + if (!this.opcodeHex) + this.report(`Couldn't parse instruction's opcode '${this.opcodeString}'`); + } + + _updateOperandsInfo() { + super._updateOperandsInfo(); + + var consecutiveLead = null; + var consecutiveLastIndex = 0; + + for (var i = 0; i < this.operands.length; i++) { + const op = this.operands[i]; + + // Instructions that use 64-bit GP registers are always 64-bit instructions. + if (op.reg === "r64" || op.reg === "rax" || op.reg === "rbx" || op.reg === "rcx" || op.reg === "rdx" || op.reg === "rsi" || op.reg === "rdi") + this.arch = "X64"; + + // Propagate broadcast. + if (op.bcstSize > 0) + this._assignAttribute("broadcast", op.bcstSize); + + // Propagate VSIB. + if (op.vsibReg) { + if (this.vsibReg) { + this.report("Only one operand can be a vector memory address (vmNNx)"); + } + + this.vsibReg = op.vsibReg; + this.vsibSize = op.vsibSize; + } + + if (op.regIndexRel) { + if (i - op.regIndexRel < 0) { + this.report(`The consecutive register information is invalid, index of the lead (${i - op.regIndexRel}) is out of range`); + } + else { + const lead = this.operands[i - op.regIndexRel]; + if (consecutiveLead && consecutiveLead != lead) { + this.report(`The consecutive register chain is invalid`); + } + else { + consecutiveLead = lead; + consecutiveLastIndex = Math.max(consecutiveLastIndex, op.regIndexRel); + } + } + } + } + + if (consecutiveLead) { + consecutiveLead.consecutiveLeadCount = consecutiveLastIndex + 1; + } + } + + // Validate the instruction's definition. Common mistakes can be checked and + // reported easily, however, if the mistake is just an invalid opcode or + // something else it's impossible to detect. + _postProcess() { + if (this.privilege === "L0") + this.category.SYSTEM = true; + + let isValid = true; + let immCount = this.immCount; + + // Verify that the immediate operand/operands are specified in instruction + // encoding and opcode field. Basically if there is an "ix" in operands, + // the encoding should contain "I". + if (immCount > 0) { + if (immCount === 1 && this.operands[this.operands.length - 1].data === "1") { + // This must be one of rcl|rcr|rol|ror|sar|sal|shr. We won't validate + // these as these have "1" as implicit (encoded within opcode, not after). + } + else { + // Every immediate should have its imm byte ("ib", "iw", "id", or "iq") in the opcode data. + let m = this.opcodeString.match(/(?:^|\s+)(ib|iw|id|if|iq|\/is4)/g); + if (!m || m.length !== immCount) { + isValid = false; + this.report(`Immediate(s) [${immCount}] not found in opcode: ${this.opcodeString}`); + } + } + } + } + + isAVX() { return this.isVEX() || this.isEVEX(); } + isVEX() { return this.prefix === "VEX" || this.prefix === "XOP"; } + isEVEX() { return this.prefix === "EVEX" } + + getWValue() { + switch (this.w) { + case "W0": return 0; + case "W1": return 1; + } + return -1; + } + + // Get signature of the instruction as "ARCH PREFIX ENCODING[:operands]" form. + get signature() { + var operands = this.operands; + var sign = this.arch; + + if (this.prefix) { + sign += " " + this.prefix; + if (this.prefix !== "3DNOW") { + if (this.l === "L1") + sign += ".256"; + else if (this.l === "256" || this.l === "512") + sign += `.${this.l}`; + else + sign += ".128"; + + if (this.w === "W1") + sign += ".W"; + } + } + else if (this.w === "W1") { + sign += " REX.W"; + } + + sign += " " + this.encoding; + + for (var i = 0; i < operands.length; i++) { + sign += (i === 0) ? ":" : ","; + + var operand = operands[i]; + if (operand.implicit) + sign += `[${operand.reg}]`; + else + sign += operand.toRegMem(); + } + + return sign; + } + + get immCount() { + var ops = this.operands; + var n = 0; + for (var i = 0; i < ops.length; i++) + if (ops[i].isImm()) + n++; + return n; + } + + get modRValue() { + if (/^[0-7]$/.test(this.modR)) + return parseInt(this.modR, 10); + else + return 0; + } + + get modRMValue() { + if (/^[0-7]$/.test(this.modRM)) + return parseInt(this.modRM, 10); + else + return 0; + } +} +x86.Instruction = Instruction; + +// asmdb.x86.ISA +// ============= + +function mergeGroupData(data, group) { + for (let k in group) { + switch (k) { + case "group": + case "data": + break; + + case "ext": + data[k] = (data[k] ? data[k] + " " : "") + group[k]; + break; + + default: + if (data[k] === undefined) + data[k] = group[k] + break; + } + } +} + +// X86/X64 instruction database - stores Instruction instances in a map and +// aggregates all instructions with the same name. +class ISA extends base.ISA { + constructor(data) { + super(data); + this.addData(data || NONE); + } + + _addInstructions(groups) { + for (let group of groups) { + for (let inst of group.data) { + const sgn = Utils.splitInstructionSignature(inst.inst); + const data = MapUtils.cloneExcept(inst, { "inst": true }); + + mergeGroupData(data, group) + + for (var j = 0; j < sgn.names.length; j++) { + data.name = sgn.names[j]; + data.prefixes = sgn.prefixes; + data.operands = sgn.operands; + if (j > 0) + data.aliasOf = sgn.names[0]; + this._addInstruction(new Instruction(this, data)); + } + } + } + + return this; + } +} +x86.ISA = ISA; + +// asmdb.x86.X86DataCheck +// ====================== + +class X86DataCheck { + static checkVexEvex(db) { + const map = db.instructionMap; + for (var name in map) { + const insts = map[name]; + for (var i = 0; i < insts.length; i++) { + const instA = insts[i]; + for (var j = i + 1; j < insts.length; j++) { + const instB = insts[j]; + if (instA.operands.join("_") === instB.operands.join("_")) { + const vex = instA.prefix === "VEX" ? instA : instB.prefix === "VEX" ? instB : null; + const evex = instA.prefix === "EVEX" ? instA : instB.prefix === "EVEX" ? instB : null; + + if (vex && evex && vex.opcodeHex === evex.opcodeHex) { + // NOTE: There are some false positives, they will be printed as well. + var ok = vex.w === evex.w && vex.l === evex.l; + + if (!ok) { + console.log(`Instruction ${name} differs:`); + console.log(` ${vex.operands.join(" ")}: ${vex.opcodeString}`); + console.log(` ${evex.operands.join(" ")}: ${evex.opcodeString}`); + } + } + } + } + } + } + } +} +x86.X86DataCheck = X86DataCheck; + +}).apply(this, typeof module === "object" && module && module.exports + ? [module, "exports"] : [this.asmdb || (this.asmdb = {}), "x86"]); diff --git a/src/asmjit/a64.h b/src/asmjit/a64.h index ea4d304..71eff85 100644 --- a/src/asmjit/a64.h +++ b/src/asmjit/a64.h @@ -18,9 +18,8 @@ //! ### Supported Instructions //! //! - Emitters: -//! - \ref a64::EmitterExplicitT - Provides all instructions that use explicit -//! operands, provides also utility functions. The member functions provided -//! are part of all ARM/AArch64 emitters. +//! - \ref a64::EmitterExplicitT - Provides all instructions that use explicit operands, provides also utility +//! functions. The member functions provided are part of all AArch64 emitters. //! //! - Instruction representation: //! - \ref a64::Inst::Id - instruction identifiers. @@ -32,8 +31,8 @@ //! - \ref arm::GpW - 32-bit register. //! - \ref arm::GpX - 64-bit register. //! - \ref arm::Vec - Vector (SIMD) register: -//! - \ref arm::VecB - 8-bit SIMD register (AArch64 only). -//! - \ref arm::VecH - 16-bit SIMD register (AArch64 only). +//! - \ref arm::VecB - 8-bit SIMD register. +//! - \ref arm::VecH - 16-bit SIMD register. //! - \ref arm::VecS - 32-bit SIMD register. //! - \ref arm::VecD - 64-bit SIMD register. //! - \ref arm::VecV - 128-bit SIMD register. @@ -46,7 +45,7 @@ //! ### Other //! //! - \ref arm::Shift - Shift operation and value. -//! - \ref a64::Utils - Utilities that can help during code generation for AArch64. +//! - \ref arm::Utils - Utilities that can help during code generation for AArch32 and AArch64. #include "./arm.h" #include "./arm/a64assembler.h" @@ -56,7 +55,6 @@ #include "./arm/a64globals.h" #include "./arm/a64instdb.h" #include "./arm/a64operand.h" -#include "./arm/a64utils.h" #endif // ASMJIT_A64_H_INCLUDED diff --git a/src/asmjit/arm.h b/src/asmjit/arm.h index 57ffa81..2f2c72b 100644 --- a/src/asmjit/arm.h +++ b/src/asmjit/arm.h @@ -11,19 +11,32 @@ //! ### Namespaces //! //! - \ref arm - arm namespace provides common functionality for both AArch32 and AArch64 backends. +//! - \ref a32 - a32 namespace provides support for AArch32 architecture. In addition it includes +//! \ref arm namespace, so you can only use a single namespace when targeting AArch32 architecture. //! - \ref a64 - a64 namespace provides support for AArch64 architecture. In addition it includes //! \ref arm namespace, so you can only use a single namespace when targeting AArch64 architecture. //! //! ### Emitters //! //! - AArch64 +//! - \ref a32::Assembler - AArch32 assembler (must read, provides examples). //! - \ref a64::Assembler - AArch64 assembler (must read, provides examples). +//! - \ref a32::Builder - AArch32 builder. //! - \ref a64::Builder - AArch64 builder. +//! - \ref a32::Compiler - AArch32 compiler. //! - \ref a64::Compiler - AArch64 compiler. +//! - \ref a32::Emitter - AArch32 emitter (abstract). //! - \ref a64::Emitter - AArch64 emitter (abstract). //! //! ### Supported Instructions //! +//! - AArch32: +//! - Emitters: +//! - \ref a32::EmitterExplicitT - Provides all instructions that use explicit operands, provides also +//! utility functions. The member functions provided are part of all AArch32 emitters. +//! - Instruction representation: +//! - \ref a32::Inst::Id - instruction identifiers. +//! //! - AArch64: //! - Emitters: //! - \ref a64::EmitterExplicitT - Provides all instructions that use explicit operands, provides also @@ -36,7 +49,7 @@ //! - \ref arm::Reg - Base class for any AArch32/AArch64 register. //! - \ref arm::Gp - General purpose register: //! - \ref arm::GpW - 32-bit register. -//! - \ref arm::GpX - 64-bit register. +//! - \ref arm::GpX - 64-bit register (AArch64 only). //! - \ref arm::Vec - Vector (SIMD) register: //! - \ref arm::VecB - 8-bit SIMD register (AArch64 only). //! - \ref arm::VecH - 16-bit SIMD register (AArch64 only). @@ -53,10 +66,11 @@ //! //! - \ref arm::Shift - Shift operation and value (both AArch32 and AArch64). //! - \ref arm::DataType - Data type that is part of an instruction in AArch32 mode. -//! - \ref a64::Utils - Utilities that can help during code generation for AArch64. +//! - \ref arm::Utils - Utilities that can help during code generation for AArch32 and AArch64. #include "./core.h" #include "./arm/armglobals.h" #include "./arm/armoperand.h" +#include "./arm/armutils.h" #endif // ASMJIT_ARM_H_INCLUDED diff --git a/src/asmjit/arm/a64archtraits_p.h b/src/asmjit/arm/a64archtraits_p.h index 87559c7..4b5bde6 100644 --- a/src/asmjit/arm/a64archtraits_p.h +++ b/src/asmjit/arm/a64archtraits_p.h @@ -9,6 +9,7 @@ #include "../core/archtraits.h" #include "../core/misc_p.h" #include "../core/type.h" +#include "../arm/a64globals.h" #include "../arm/a64operand.h" ASMJIT_BEGIN_SUB_NAMESPACE(a64) @@ -24,7 +25,7 @@ static const constexpr ArchTraits a64ArchTraits = { // Reserved. { 0, 0, 0 }, - // HW stack alignment (AArch64 requires stack aligned to 64 bytes). + // HW stack alignment (AArch64 requires stack aligned to 16 bytes at HW level). 16, // Min/max stack offset - byte addressing is the worst, VecQ addressing the best. @@ -39,12 +40,12 @@ static const constexpr ArchTraits a64ArchTraits = { }}, // RegInfo. - #define V(index) OperandSignature{arm::RegTraits::kSignature} + #define V(index) OperandSignature{RegTraits::kSignature} {{ ASMJIT_LOOKUP_TABLE_32(V, 0) }}, #undef V // RegTypeToTypeId. - #define V(index) TypeId(arm::RegTraits::kTypeId) + #define V(index) TypeId(RegTraits::kTypeId) {{ ASMJIT_LOOKUP_TABLE_32(V, 0) }}, #undef V diff --git a/src/asmjit/arm/a64assembler.cpp b/src/asmjit/arm/a64assembler.cpp index ec698de..444bb1f 100644 --- a/src/asmjit/arm/a64assembler.cpp +++ b/src/asmjit/arm/a64assembler.cpp @@ -14,10 +14,10 @@ #include "../core/misc_p.h" #include "../core/support.h" #include "../arm/armformatter_p.h" +#include "../arm/armutils.h" #include "../arm/a64assembler.h" #include "../arm/a64emithelper_p.h" #include "../arm/a64instdb_p.h" -#include "../arm/a64utils.h" ASMJIT_BEGIN_SUB_NAMESPACE(a64) @@ -398,14 +398,6 @@ static inline bool encodeLMH(uint32_t sizeField, uint32_t elementIndex, LMHImm* return elementIndex <= maxElementIndex; } -// [.......A|B.......|.......C|D.......|.......E|F.......|.......G|H.......] -static inline uint32_t encodeImm64ByteMaskToImm8(uint64_t imm) noexcept { - return uint32_t(((imm >> (7 - 0)) & 0b00000011) | // [.......G|H.......] - ((imm >> (23 - 2)) & 0b00001100) | // [.......E|F.......] - ((imm >> (39 - 4)) & 0b00110000) | // [.......C|D.......] - ((imm >> (55 - 6)) & 0b11000000)); // [.......A|B.......] -} - // a64::Assembler - Opcode // ======================= @@ -3753,7 +3745,7 @@ Case_BaseLdurStur: goto InvalidImmediate; } else if (imm) { - shift = Support::ctz(imm) & 0x7u; + shift = Support::ctz(imm) & ~0x7u; imm >>= shift; if (imm > 0xFFu || shift > maxShift) @@ -4056,7 +4048,7 @@ Case_BaseLdurStur: goto InvalidImmediate; if (Utils::isByteMaskImm8(imm64)) { - imm8 = encodeImm64ByteMaskToImm8(imm64); + imm8 = Utils::encodeImm64ByteMaskToImm8(imm64); } else { // Change from D to S and from 64-bit imm to 32-bit imm if this diff --git a/src/asmjit/arm/a64emithelper_p.h b/src/asmjit/arm/a64emithelper_p.h index b1ba1a9..51efe2d 100644 --- a/src/asmjit/arm/a64emithelper_p.h +++ b/src/asmjit/arm/a64emithelper_p.h @@ -3,8 +3,8 @@ // See asmjit.h or LICENSE.md for license and copyright information // SPDX-License-Identifier: Zlib -#ifndef ASMJIT_ARM_ARMEMITHELPER_P_H_INCLUDED -#define ASMJIT_ARM_ARMEMITHELPER_P_H_INCLUDED +#ifndef ASMJIT_ARM_A64EMITHELPER_P_H_INCLUDED +#define ASMJIT_ARM_A64EMITHELPER_P_H_INCLUDED #include "../core/api-config.h" @@ -47,4 +47,4 @@ void assignEmitterFuncs(BaseEmitter* emitter); ASMJIT_END_SUB_NAMESPACE -#endif // ASMJIT_ARM_ARMEMITHELPER_P_H_INCLUDED +#endif // ASMJIT_ARM_A64EMITHELPER_P_H_INCLUDED diff --git a/src/asmjit/arm/a64emitter.h b/src/asmjit/arm/a64emitter.h index d68df29..22717d3 100644 --- a/src/asmjit/arm/a64emitter.h +++ b/src/asmjit/arm/a64emitter.h @@ -84,17 +84,6 @@ struct EmitterExplicitT { //! \endcond - // -------------------------------------------------------------------------- - // [Options] - // -------------------------------------------------------------------------- - -protected: - inline This& _addInstOptions(InstOptions options) noexcept { - static_cast(this)->addInstOptions(options); - return *static_cast(this); - } - -public: //! \name General Purpose Instructions //! \{ @@ -1119,14 +1108,14 @@ public: //! \} - //! \name FJCVTZS Instruction (ARMv8.3-A) + //! \name JSCVT Instruction (ARMv8.3-A) //! \{ ASMJIT_INST_2x(fjcvtzs, Fjcvtzs_v, Gp, Vec); //! \} - //! \name FP16FML Instructions (ARMv8.4-A, optional in ARMv8.2-A) + //! \name FHM Instructions //! \{ ASMJIT_INST_3x(fmlal, Fmlal_v, Vec, Vec, Vec); diff --git a/src/asmjit/arm/a64formatter.cpp b/src/asmjit/arm/a64formatter.cpp index d6738ca..8cd4a06 100644 --- a/src/asmjit/arm/a64formatter.cpp +++ b/src/asmjit/arm/a64formatter.cpp @@ -19,243 +19,6 @@ ASMJIT_BEGIN_SUB_NAMESPACE(a64) -// a64::FormatterInternal - Format Register -// ======================================== - -ASMJIT_FAVOR_SIZE Error FormatterInternal::formatRegister( - String& sb, - FormatFlags flags, - const BaseEmitter* emitter, - Arch arch, - RegType regType, - uint32_t rId, - uint32_t elementType, - uint32_t elementIndex) noexcept { - - DebugUtils::unused(flags); - DebugUtils::unused(arch); - - static const char bhsdq[] = "bhsdq"; - - bool virtRegFormatted = false; - -#ifndef ASMJIT_NO_COMPILER - if (Operand::isVirtId(rId)) { - if (emitter && emitter->isCompiler()) { - const BaseCompiler* cc = static_cast(emitter); - if (cc->isVirtIdValid(rId)) { - VirtReg* vReg = cc->virtRegById(rId); - ASMJIT_ASSERT(vReg != nullptr); - - const char* name = vReg->name(); - if (name && name[0] != '\0') - ASMJIT_PROPAGATE(sb.append(name)); - else - ASMJIT_PROPAGATE(sb.appendFormat("%%%u", unsigned(Operand::virtIdToIndex(rId)))); - - virtRegFormatted = true; - } - } - } -#else - DebugUtils::unused(emitter, flags); -#endif - - if (!virtRegFormatted) { - char letter = '\0'; - switch (regType) { - case RegType::kARM_GpW: - if (rId == Gp::kIdZr) - return sb.append("wzr"); - if (rId == Gp::kIdSp) - return sb.append("wsp"); - - letter = 'w'; - break; - - case RegType::kARM_GpX: - if (rId == Gp::kIdZr) - return sb.append("xzr"); - if (rId == Gp::kIdSp) - return sb.append("sp"); - - letter = 'x'; - break; - - case RegType::kARM_VecB: - case RegType::kARM_VecH: - case RegType::kARM_VecS: - case RegType::kARM_VecD: - case RegType::kARM_VecV: - letter = bhsdq[uint32_t(regType) - uint32_t(RegType::kARM_VecB)]; - if (elementType) - letter = 'v'; - break; - - default: - ASMJIT_PROPAGATE(sb.appendFormat("?$u", uint32_t(regType), rId)); - break; - } - - if (letter) - ASMJIT_PROPAGATE(sb.appendFormat("%c%u", letter, rId)); - } - - if (elementType) { - char elementLetter = '\0'; - uint32_t elementCount = 0; - - switch (elementType) { - case Vec::kElementTypeB: - elementLetter = 'b'; - elementCount = 16; - break; - - case Vec::kElementTypeH: - elementLetter = 'h'; - elementCount = 8; - break; - - case Vec::kElementTypeS: - elementLetter = 's'; - elementCount = 4; - break; - - case Vec::kElementTypeD: - elementLetter = 'd'; - elementCount = 2; - break; - - default: - return sb.append("."); - } - - if (elementLetter) { - if (elementIndex == 0xFFFFFFFFu) { - if (regType == RegType::kARM_VecD) - elementCount /= 2u; - ASMJIT_PROPAGATE(sb.appendFormat(".%u%c", elementCount, elementLetter)); - } - else { - ASMJIT_PROPAGATE(sb.appendFormat(".%c[%u]", elementLetter, elementIndex)); - } - } - } - - return kErrorOk; -} - -// a64::FormatterInternal - Format Operand -// ======================================= - -ASMJIT_FAVOR_SIZE Error FormatterInternal::formatOperand( - String& sb, - FormatFlags flags, - const BaseEmitter* emitter, - Arch arch, - const Operand_& op) noexcept { - - if (op.isReg()) { - const BaseReg& reg = op.as(); - - uint32_t elementType = op.as().elementType(); - uint32_t elementIndex = op.as().elementIndex(); - - if (!op.as().hasElementIndex()) - elementIndex = 0xFFFFFFFFu; - - return formatRegister(sb, flags, emitter, arch, reg.type(), reg.id(), elementType, elementIndex); - } - - if (op.isMem()) { - const Mem& m = op.as(); - ASMJIT_PROPAGATE(sb.append('[')); - - if (m.hasBase()) { - if (m.hasBaseLabel()) { - ASMJIT_PROPAGATE(Formatter::formatLabel(sb, flags, emitter, m.baseId())); - } - else { - FormatFlags modifiedFlags = flags; - if (m.isRegHome()) { - ASMJIT_PROPAGATE(sb.append('&')); - modifiedFlags &= ~FormatFlags::kRegCasts; - } - ASMJIT_PROPAGATE(formatRegister(sb, modifiedFlags, emitter, arch, m.baseType(), m.baseId())); - } - } - else { - // ARM really requires base. - if (m.hasIndex() || m.hasOffset()) { - ASMJIT_PROPAGATE(sb.append("")); - } - } - - // The post index makes it look like there was another operand, but it's - // still the part of AsmJit's `arm::Mem` operand so it's consistent with - // other architectures. - if (m.isPostIndex()) - ASMJIT_PROPAGATE(sb.append(']')); - - if (m.hasIndex()) { - ASMJIT_PROPAGATE(sb.append(", ")); - ASMJIT_PROPAGATE(formatRegister(sb, flags, emitter, arch, m.indexType(), m.indexId())); - } - - if (m.hasOffset()) { - ASMJIT_PROPAGATE(sb.append(", ")); - - int64_t off = int64_t(m.offset()); - uint32_t base = 10; - - if (Support::test(flags, FormatFlags::kHexOffsets) && uint64_t(off) > 9) - base = 16; - - if (base == 10) { - ASMJIT_PROPAGATE(sb.appendInt(off, base)); - } - else { - ASMJIT_PROPAGATE(sb.append("0x")); - ASMJIT_PROPAGATE(sb.appendUInt(uint64_t(off), base)); - } - } - - if (m.hasShift()) { - ASMJIT_PROPAGATE(sb.append(' ')); - if (!m.isPreOrPost()) - ASMJIT_PROPAGATE(formatShiftOp(sb, (ShiftOp)m.predicate())); - ASMJIT_PROPAGATE(sb.appendFormat(" %u", m.shift())); - } - - if (!m.isPostIndex()) - ASMJIT_PROPAGATE(sb.append(']')); - - if (m.isPreIndex()) - ASMJIT_PROPAGATE(sb.append('!')); - - return kErrorOk; - } - - if (op.isImm()) { - const Imm& i = op.as(); - int64_t val = i.value(); - - if (Support::test(flags, FormatFlags::kHexImms) && uint64_t(val) > 9) { - ASMJIT_PROPAGATE(sb.append("0x")); - return sb.appendUInt(uint64_t(val), 16); - } - else { - return sb.appendInt(val, 10); - } - } - - if (op.isLabel()) { - return Formatter::formatLabel(sb, flags, emitter, op.id()); - } - - return sb.append(""); -} - // a64::FormatterInternal - Format Instruction // =========================================== diff --git a/src/asmjit/arm/a64formatter_p.h b/src/asmjit/arm/a64formatter_p.h index bd7a144..d0adde3 100644 --- a/src/asmjit/arm/a64formatter_p.h +++ b/src/asmjit/arm/a64formatter_p.h @@ -24,23 +24,6 @@ namespace FormatterInternal { using namespace arm::FormatterInternal; -Error ASMJIT_CDECL formatRegister( - String& sb, - FormatFlags flags, - const BaseEmitter* emitter, - Arch arch, - RegType regType, - uint32_t regId, - uint32_t elementType = 0, - uint32_t elementIndex = 0xFFFFFFFFu) noexcept; - -Error ASMJIT_CDECL formatOperand( - String& sb, - FormatFlags flags, - const BaseEmitter* emitter, - Arch arch, - const Operand_& op) noexcept; - Error ASMJIT_CDECL formatInstruction( String& sb, FormatFlags flags, diff --git a/src/asmjit/arm/a64globals.h b/src/asmjit/arm/a64globals.h index 2b6b6f0..efe9872 100644 --- a/src/asmjit/arm/a64globals.h +++ b/src/asmjit/arm/a64globals.h @@ -1417,9 +1417,12 @@ namespace SysReg { kID_AA64DFR1_EL1 = encode(0b11, 0b000, 0b0000, 0b0101, 0b001), // RO kID_AA64ISAR0_EL1 = encode(0b11, 0b000, 0b0000, 0b0110, 0b000), // RO kID_AA64ISAR1_EL1 = encode(0b11, 0b000, 0b0000, 0b0110, 0b001), // RO + kID_AA64ISAR2_EL1 = encode(0b11, 0b000, 0b0000, 0b0110, 0b010), // RO kID_AA64MMFR0_EL1 = encode(0b11, 0b000, 0b0000, 0b0111, 0b000), // RO kID_AA64MMFR1_EL1 = encode(0b11, 0b000, 0b0000, 0b0111, 0b001), // RO kID_AA64MMFR2_EL1 = encode(0b11, 0b000, 0b0000, 0b0111, 0b010), // RO + kID_AA64MMFR3_EL1 = encode(0b11, 0b000, 0b0000, 0b0111, 0b011), // RO + kID_AA64MMFR4_EL1 = encode(0b11, 0b000, 0b0000, 0b0111, 0b100), // RO kID_AA64PFR0_EL1 = encode(0b11, 0b000, 0b0000, 0b0100, 0b000), // RO kID_AA64PFR1_EL1 = encode(0b11, 0b000, 0b0000, 0b0100, 0b001), // RO kID_AA64ZFR0_EL1 = encode(0b11, 0b000, 0b0000, 0b0100, 0b100), // RO diff --git a/src/asmjit/arm/armformatter.cpp b/src/asmjit/arm/armformatter.cpp index 0432043..86eb24b 100644 --- a/src/asmjit/arm/armformatter.cpp +++ b/src/asmjit/arm/armformatter.cpp @@ -26,78 +26,145 @@ Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept // @EnumStringBegin{"enum": "CpuFeatures::ARM", "output": "sFeature", "strip": "k"}@ static const char sFeatureString[] = "None\0" - "THUMB\0" - "THUMBv2\0" "ARMv6\0" "ARMv7\0" "ARMv8a\0" - "ARMv8_1a\0" - "ARMv8_2a\0" - "ARMv8_3a\0" - "ARMv8_4a\0" - "ARMv8_5a\0" - "ARMv8_6a\0" - "ARMv8_7a\0" - "VFPv2\0" - "VFPv3\0" - "VFPv4\0" - "VFP_D32\0" + "THUMB\0" + "THUMBv2\0" "AES\0" - "ALTNZCV\0" + "AFP\0" "ASIMD\0" "BF16\0" "BTI\0" + "CCIDX\0" + "CHK\0" + "CLRBHB\0" "CPUID\0" "CRC32\0" + "CSSC\0" + "D128\0" "DGH\0" "DIT\0" "DOTPROD\0" + "DPB\0" + "DPB2\0" + "EBF16\0" + "ECV\0" "EDSP\0" "FCMA\0" - "FJCVTZS\0" + "FGT\0" + "FGT2\0" + "FHM\0" "FLAGM\0" + "FLAGM2\0" + "FMAC\0" + "FP\0" + "FP16\0" "FP16CONV\0" - "FP16FML\0" - "FP16FULL\0" - "FRINT\0" + "FRINTTS\0" + "GCS\0" + "HBC\0" + "HCX\0" "I8MM\0" "IDIVA\0" "IDIVT\0" + "JSCVT\0" + "LOR\0" + "LRCPC\0" + "LRCPC2\0" + "LRCPC3\0" + "LS64\0" + "LS64_ACCDATA\0" + "LS64_V\0" "LSE\0" + "LSE128\0" + "LSE2\0" + "MOPS\0" + "MPAM\0" "MTE\0" - "RCPC_IMMO\0" - "RDM\0" + "MTE2\0" + "MTE3\0" + "MTE4\0" + "NMI\0" + "NV\0" + "NV2\0" + "PAN\0" + "PAN2\0" + "PAN3\0" + "PAUTH\0" "PMU\0" "PMULL\0" + "PRFMSLC\0" + "RAS\0" + "RAS1_1\0" + "RAS2\0" + "RDM\0" + "RME\0" "RNG\0" + "RNG_TRAP\0" + "RPRES\0" + "RPRFM\0" "SB\0" "SHA1\0" - "SHA2\0" + "SHA256\0" "SHA3\0" "SHA512\0" "SM3\0" "SM4\0" + "SME\0" + "SME2\0" + "SME2_1\0" + "SME_B16B16\0" + "SME_B16F32\0" + "SME_BI32I32\0" + "SME_F16F16\0" + "SME_F16F32\0" + "SME_F32F32\0" + "SME_F64F64\0" + "SME_FA64\0" + "SME_I16I32\0" + "SME_I16I64\0" + "SME_I8I32\0" + "SPECRES\0" + "SPECRES2\0" "SSBS\0" + "SSBS2\0" "SVE\0" + "SVE2\0" + "SVE2_1\0" + "SVE_AES\0" + "SVE_B16B16\0" "SVE_BF16\0" + "SVE_BITPERM\0" + "SVE_EBF16\0" "SVE_F32MM\0" "SVE_F64MM\0" "SVE_I8MM\0" - "SVE_PMULL\0" - "SVE2\0" - "SVE2_AES\0" - "SVE2_BITPERM\0" - "SVE2_SHA3\0" - "SVE2_SM4\0" + "SVE_PMULL128\0" + "SVE_SHA3\0" + "SVE_SM4\0" + "SYSINSTR128\0" + "SYSREG128\0" + "THE\0" "TME\0" + "TRF\0" + "UAO\0" + "VFP_D32\0" + "VHE\0" + "WFXT\0" + "XS\0" "\0"; static const uint16_t sFeatureIndex[] = { - 0, 5, 11, 19, 25, 31, 38, 47, 56, 65, 74, 83, 92, 101, 107, 113, 119, 127, - 131, 139, 145, 150, 154, 160, 166, 170, 174, 182, 187, 192, 200, 206, 215, - 223, 232, 238, 243, 249, 255, 259, 263, 273, 277, 281, 287, 291, 294, 299, - 304, 309, 316, 320, 324, 329, 333, 342, 352, 362, 371, 381, 386, 395, 408, - 418, 427, 431 + 0, 5, 11, 17, 24, 30, 38, 42, 46, 52, 57, 61, 67, 71, 78, 84, 90, 95, 100, + 104, 108, 116, 120, 125, 131, 135, 140, 145, 149, 154, 158, 164, 171, 176, + 179, 184, 193, 201, 205, 209, 213, 218, 224, 230, 236, 240, 246, 253, 260, + 265, 278, 285, 289, 296, 301, 306, 311, 315, 320, 325, 330, 334, 337, 341, + 345, 350, 355, 361, 365, 371, 379, 383, 390, 395, 399, 403, 407, 416, 422, + 428, 431, 436, 443, 448, 455, 459, 463, 467, 472, 479, 490, 501, 513, 524, + 535, 546, 557, 566, 577, 588, 598, 606, 615, 620, 626, 630, 635, 642, 650, + 661, 670, 682, 692, 702, 712, 721, 734, 743, 751, 763, 773, 777, 781, 785, + 789, 797, 801, 806, 809 }; // @EnumStringEnd@ @@ -138,6 +205,267 @@ ASMJIT_FAVOR_SIZE Error FormatterInternal::formatShiftOp(String& sb, ShiftOp shi return sb.append(str); } +// arm::FormatterInternal - Format Register +// ======================================== + +ASMJIT_FAVOR_SIZE Error FormatterInternal::formatRegister( + String& sb, + FormatFlags flags, + const BaseEmitter* emitter, + Arch arch, + RegType regType, + uint32_t rId, + uint32_t elementType, + uint32_t elementIndex) noexcept { + + DebugUtils::unused(flags); + DebugUtils::unused(arch); + + static const char bhsdq[] = "bhsdq"; + + bool virtRegFormatted = false; + +#ifndef ASMJIT_NO_COMPILER + if (Operand::isVirtId(rId)) { + if (emitter && emitter->isCompiler()) { + const BaseCompiler* cc = static_cast(emitter); + if (cc->isVirtIdValid(rId)) { + VirtReg* vReg = cc->virtRegById(rId); + ASMJIT_ASSERT(vReg != nullptr); + + const char* name = vReg->name(); + if (name && name[0] != '\0') + ASMJIT_PROPAGATE(sb.append(name)); + else + ASMJIT_PROPAGATE(sb.appendFormat("%%%u", unsigned(Operand::virtIdToIndex(rId)))); + + virtRegFormatted = true; + } + } + } +#else + DebugUtils::unused(emitter, flags); +#endif + + if (!virtRegFormatted) { + char letter = '\0'; + switch (regType) { + case RegType::kARM_VecB: + case RegType::kARM_VecH: + case RegType::kARM_VecS: + case RegType::kARM_VecD: + case RegType::kARM_VecV: + letter = bhsdq[uint32_t(regType) - uint32_t(RegType::kARM_VecB)]; + if (elementType) + letter = 'v'; + break; + + case RegType::kARM_GpW: + if (Environment::is64Bit(arch)) { + letter = 'w'; + + if (rId == Gp::kIdZr) + return sb.append("wzr", 3); + + if (rId == Gp::kIdSp) + return sb.append("wsp", 3); + } + else { + letter = 'r'; + + if (rId == 13) + return sb.append("sp", 2); + + if (rId == 14) + return sb.append("lr", 2); + + if (rId == 15) + return sb.append("pc", 2); + } + break; + + case RegType::kARM_GpX: + if (Environment::is64Bit(arch)) { + if (rId == Gp::kIdZr) + return sb.append("xzr", 3); + if (rId == Gp::kIdSp) + return sb.append("sp", 2); + + letter = 'x'; + break; + } + + // X registers are undefined in 32-bit mode. + ASMJIT_FALLTHROUGH; + + default: + ASMJIT_PROPAGATE(sb.appendFormat("?$u", uint32_t(regType), rId)); + break; + } + + if (letter) + ASMJIT_PROPAGATE(sb.appendFormat("%c%u", letter, rId)); + } + + if (elementType) { + char elementLetter = '\0'; + uint32_t elementCount = 0; + + switch (elementType) { + case Vec::kElementTypeB: + elementLetter = 'b'; + elementCount = 16; + break; + + case Vec::kElementTypeH: + elementLetter = 'h'; + elementCount = 8; + break; + + case Vec::kElementTypeS: + elementLetter = 's'; + elementCount = 4; + break; + + case Vec::kElementTypeD: + elementLetter = 'd'; + elementCount = 2; + break; + + default: + return sb.append("."); + } + + if (elementLetter) { + if (elementIndex == 0xFFFFFFFFu) { + if (regType == RegType::kARM_VecD) + elementCount /= 2u; + ASMJIT_PROPAGATE(sb.appendFormat(".%u%c", elementCount, elementLetter)); + } + else { + ASMJIT_PROPAGATE(sb.appendFormat(".%c[%u]", elementLetter, elementIndex)); + } + } + } + else if (elementIndex != 0xFFFFFFFFu) { + // This should only be used by AArch32 - AArch64 requires an additional elementType in index[]. + ASMJIT_PROPAGATE(sb.appendFormat("[%u]", elementIndex)); + } + + return kErrorOk; +} + +// a64::FormatterInternal - Format Operand +// ======================================= + +ASMJIT_FAVOR_SIZE Error FormatterInternal::formatOperand( + String& sb, + FormatFlags flags, + const BaseEmitter* emitter, + Arch arch, + const Operand_& op) noexcept { + + if (op.isReg()) { + const BaseReg& reg = op.as(); + + uint32_t elementType = op.as().elementType(); + uint32_t elementIndex = op.as().elementIndex(); + + if (!op.as().hasElementIndex()) + elementIndex = 0xFFFFFFFFu; + + return formatRegister(sb, flags, emitter, arch, reg.type(), reg.id(), elementType, elementIndex); + } + + if (op.isMem()) { + const Mem& m = op.as(); + ASMJIT_PROPAGATE(sb.append('[')); + + if (m.hasBase()) { + if (m.hasBaseLabel()) { + ASMJIT_PROPAGATE(Formatter::formatLabel(sb, flags, emitter, m.baseId())); + } + else { + FormatFlags modifiedFlags = flags; + if (m.isRegHome()) { + ASMJIT_PROPAGATE(sb.append('&')); + modifiedFlags &= ~FormatFlags::kRegCasts; + } + ASMJIT_PROPAGATE(formatRegister(sb, modifiedFlags, emitter, arch, m.baseType(), m.baseId())); + } + } + else { + // ARM really requires base. + if (m.hasIndex() || m.hasOffset()) { + ASMJIT_PROPAGATE(sb.append("")); + } + } + + // The post index makes it look like there was another operand, but it's + // still the part of AsmJit's `arm::Mem` operand so it's consistent with + // other architectures. + if (m.isPostIndex()) + ASMJIT_PROPAGATE(sb.append(']')); + + if (m.hasIndex()) { + ASMJIT_PROPAGATE(sb.append(", ")); + ASMJIT_PROPAGATE(formatRegister(sb, flags, emitter, arch, m.indexType(), m.indexId())); + } + + if (m.hasOffset()) { + ASMJIT_PROPAGATE(sb.append(", ")); + + int64_t off = int64_t(m.offset()); + uint32_t base = 10; + + if (Support::test(flags, FormatFlags::kHexOffsets) && uint64_t(off) > 9) + base = 16; + + if (base == 10) { + ASMJIT_PROPAGATE(sb.appendInt(off, base)); + } + else { + ASMJIT_PROPAGATE(sb.append("0x")); + ASMJIT_PROPAGATE(sb.appendUInt(uint64_t(off), base)); + } + } + + if (m.hasShift()) { + ASMJIT_PROPAGATE(sb.append(' ')); + if (!m.isPreOrPost()) + ASMJIT_PROPAGATE(formatShiftOp(sb, (ShiftOp)m.predicate())); + ASMJIT_PROPAGATE(sb.appendFormat(" %u", m.shift())); + } + + if (!m.isPostIndex()) + ASMJIT_PROPAGATE(sb.append(']')); + + if (m.isPreIndex()) + ASMJIT_PROPAGATE(sb.append('!')); + + return kErrorOk; + } + + if (op.isImm()) { + const Imm& i = op.as(); + int64_t val = i.value(); + + if (Support::test(flags, FormatFlags::kHexImms) && uint64_t(val) > 9) { + ASMJIT_PROPAGATE(sb.append("0x")); + return sb.appendUInt(uint64_t(val), 16); + } + else { + return sb.appendInt(val, 10); + } + } + + if (op.isLabel()) { + return Formatter::formatLabel(sb, flags, emitter, op.id()); + } + + return sb.append(""); +} + ASMJIT_END_SUB_NAMESPACE #endif // !ASMJIT_NO_LOGGING diff --git a/src/asmjit/arm/armformatter_p.h b/src/asmjit/arm/armformatter_p.h index 5821730..ccd2bd6 100644 --- a/src/asmjit/arm/armformatter_p.h +++ b/src/asmjit/arm/armformatter_p.h @@ -33,6 +33,23 @@ Error ASMJIT_CDECL formatShiftOp( String& sb, ShiftOp shiftOp) noexcept; +Error ASMJIT_CDECL formatRegister( + String& sb, + FormatFlags flags, + const BaseEmitter* emitter, + Arch arch, + RegType regType, + uint32_t rId, + uint32_t elementType = 0, + uint32_t elementIndex = 0xFFFFFFFF) noexcept; + +Error ASMJIT_CDECL formatOperand( + String& sb, + FormatFlags flags, + const BaseEmitter* emitter, + Arch arch, + const Operand_& op) noexcept; + } // {FormatterInternal} //! \} diff --git a/src/asmjit/arm/armoperand.h b/src/asmjit/arm/armoperand.h index a6322a0..94ffe9c 100644 --- a/src/asmjit/arm/armoperand.h +++ b/src/asmjit/arm/armoperand.h @@ -178,7 +178,7 @@ public: kSignatureRegElementIndexMask = 0x0F << kSignatureRegElementIndexShift }; - //! Element type. + //! Element type (AArch64 only). enum ElementType : uint32_t { //! No element type specified. kElementTypeNone = 0, @@ -258,15 +258,15 @@ public: return Vec((signature() & ~kSignatureRegElementIndexMask) | (elementIndex << kSignatureRegElementIndexShift) | kSignatureRegElementFlagMask, id()); } - //! Cast this register to an 8-bit B register (scalar). + //! Cast this register to an 8-bit B register (AArch64 only). inline VecB b() const noexcept; - //! Cast this register to a 16-bit H register (scalar). + //! Cast this register to a 16-bit H register (AArch64 only). inline VecH h() const noexcept; - //! Cast this register to a 32-bit S register (scalar). + //! Cast this register to a 32-bit S register. inline VecS s() const noexcept; - //! Cast this register to a 64-bit D register (scalar). + //! Cast this register to a 64-bit D register. inline VecD d() const noexcept; - //! Cast this register to a 128-bit Q register (scalar). + //! Cast this register to a 128-bit Q register. inline VecV q() const noexcept; //! Cast this register to a 128-bit V register. inline VecV v() const noexcept; @@ -553,37 +553,42 @@ public: //! \} }; -//! Creates `[base.reg, offset]` memory operand (offset mode). +//! Creates `[base, offset]` memory operand (offset mode). static inline constexpr Mem ptr(const Gp& base, int32_t offset = 0) noexcept { return Mem(base, offset); } -//! Creates `[base.reg, offset]!` memory operand (pre-index mode). +//! Creates `[base, offset]!` memory operand (pre-index mode). static inline constexpr Mem ptr_pre(const Gp& base, int32_t offset = 0) noexcept { return Mem(base, offset, OperandSignature::fromValue(Mem::kOffsetPreIndex)); } -//! Creates `[base.reg], offset` memory operand (post-index mode). +//! Creates `[base], offset` memory operand (post-index mode). static inline constexpr Mem ptr_post(const Gp& base, int32_t offset = 0) noexcept { return Mem(base, offset, OperandSignature::fromValue(Mem::kOffsetPostIndex)); } -//! Creates `[base.reg, index]` memory operand. +//! Creates `[base, index]` memory operand. static inline constexpr Mem ptr(const Gp& base, const Gp& index) noexcept { return Mem(base, index); } -//! Creates `[base.reg], index` memory operand (post-index mode). +//! Creates `[base, index]!` memory operand (pre-index mode). +static inline constexpr Mem ptr_pre(const Gp& base, const Gp& index) noexcept { + return Mem(base, index, OperandSignature::fromValue(Mem::kOffsetPreIndex)); +} + +//! Creates `[base], index` memory operand (post-index mode). static inline constexpr Mem ptr_post(const Gp& base, const Gp& index) noexcept { return Mem(base, index, OperandSignature::fromValue(Mem::kOffsetPostIndex)); } -//! Creates `[base.reg, index, SHIFT_OP #shift]` memory operand. +//! Creates `[base, index, SHIFT_OP #shift]` memory operand. static inline constexpr Mem ptr(const Gp& base, const Gp& index, const Shift& shift) noexcept { return Mem(base, index, shift); } -//! Creates `[base + offset]` memory operand. +//! Creates `[base, offset]` memory operand. static inline constexpr Mem ptr(const Label& base, int32_t offset = 0) noexcept { return Mem(base, offset); } @@ -600,8 +605,8 @@ static inline constexpr Mem ptr(const PC& pc, int32_t offset = 0) noexcept { //! //! \note The concept of absolute memory operands doesn't exist on ARM, the ISA only provides PC relative addressing. //! Absolute memory operands can only be used if it's known that the PC relative offset is encodable and that it -//! would be within the limits. Absolute address is also often output from disassemblers, so AsmJit support it so it -//! can assemble it back. +//! would be within the limits. Absolute address is also often output from disassemblers, so AsmJit supports it to +//! make it possible to assemble such output back. static inline constexpr Mem ptr(uint64_t base) noexcept { return Mem(base); } //! \} diff --git a/src/asmjit/arm/a64utils.h b/src/asmjit/arm/armutils.h similarity index 72% rename from src/asmjit/arm/a64utils.h rename to src/asmjit/arm/armutils.h index 4a88ca5..3c2e8db 100644 --- a/src/asmjit/arm/a64utils.h +++ b/src/asmjit/arm/armutils.h @@ -3,20 +3,20 @@ // See asmjit.h or LICENSE.md for license and copyright information // SPDX-License-Identifier: Zlib -#ifndef ASMJIT_ARM_A64UTILS_H_INCLUDED -#define ASMJIT_ARM_A64UTILS_H_INCLUDED +#ifndef ASMJIT_ARM_ARMUTILS_H_INCLUDED +#define ASMJIT_ARM_ARMUTILS_H_INCLUDED -#include "../arm/a64globals.h" +#include "../arm/armglobals.h" -ASMJIT_BEGIN_SUB_NAMESPACE(a64) +ASMJIT_BEGIN_SUB_NAMESPACE(arm) -//! \addtogroup asmjit_a64 +//! \addtogroup asmjit_arm //! \{ -//! Public utilities and helpers for targeting AArch64 architecture. +//! Public utilities and helpers for targeting AArch32 and AArch64 architectures. namespace Utils { -//! Decomposed fields of a logical immediate value (AArch64). +//! Decomposed fields of a logical immediate value. struct LogicalImm { uint32_t n; uint32_t s; @@ -41,7 +41,7 @@ struct LogicalImm { //! +---+--------+--------+------+ //! ``` ASMJIT_MAYBE_UNUSED -static bool encodeLogicalImm(uint64_t imm, uint32_t width, a64::Utils::LogicalImm* out) noexcept { +static bool encodeLogicalImm(uint64_t imm, uint32_t width, LogicalImm* out) noexcept { // Determine the element width, which must be 2, 4, 8, 16, 32, or 64 bits. do { width /= 2; @@ -89,7 +89,7 @@ static bool encodeLogicalImm(uint64_t imm, uint32_t width, a64::Utils::LogicalIm //! width of the operation, and must be either 32 or 64. This function can be used to test whether an immediate //! value can be used with AND, ANDS, BIC, BICS, EON, EOR, ORN, and ORR instruction. ASMJIT_MAYBE_UNUSED -static inline bool isLogicalImm(uint64_t imm, uint32_t width) noexcept { +static ASMJIT_FORCE_INLINE bool isLogicalImm(uint64_t imm, uint32_t width) noexcept { LogicalImm dummy; return encodeLogicalImm(imm, width, &dummy); } @@ -98,15 +98,22 @@ static inline bool isLogicalImm(uint64_t imm, uint32_t width) noexcept { //! 0x00 or 0xFF. Some ARM instructions accept immediates that form a byte-mask and this function can be used to //! verify that the immediate is encodable before using the value. template -static inline bool isByteMaskImm8(const T& imm) noexcept { +static ASMJIT_FORCE_INLINE bool isByteMaskImm8(const T& imm) noexcept { constexpr T kMask = T(0x0101010101010101 & Support::allOnes()); return imm == (imm & kMask) * T(255); } +// [.......A|B.......|.......C|D.......|.......E|F.......|.......G|H.......] +static ASMJIT_FORCE_INLINE uint32_t encodeImm64ByteMaskToImm8(uint64_t imm) noexcept { + return uint32_t(((imm >> (7 - 0)) & 0b00000011) | // [.......G|H.......] + ((imm >> (23 - 2)) & 0b00001100) | // [.......E|F.......] + ((imm >> (39 - 4)) & 0b00110000) | // [.......C|D.......] + ((imm >> (55 - 6)) & 0b11000000)); // [.......A|B.......] +} //! \cond //! A generic implementation that checjs whether a floating point value can be converted to ARM Imm8. template -static inline bool isFPImm8Generic(T val) noexcept { +static ASMJIT_FORCE_INLINE bool isFPImm8Generic(T val) noexcept { constexpr uint32_t kAllBsMask = Support::lsbMask(kNumBBits); constexpr uint32_t kB0Pattern = Support::bitMask(kNumBBits - 1); constexpr uint32_t kB1Pattern = kAllBsMask ^ kB0Pattern; @@ -127,7 +134,7 @@ static inline bool isFPImm8Generic(T val) noexcept { //! ``` //! [aBbbcdef|gh000000] //! ``` -static inline bool isFP16Imm8(uint32_t val) noexcept { return isFPImm8Generic(val); } +static ASMJIT_FORCE_INLINE bool isFP16Imm8(uint32_t val) noexcept { return isFPImm8Generic(val); } //! Returns true if the given single precision floating point `val` can be encoded as ARM IMM8 value, which represents //! a limited set of floating point immediate values, which can be used with FMOV instruction. @@ -137,9 +144,9 @@ static inline bool isFP16Imm8(uint32_t val) noexcept { return isFPImm8Generic(val); } +static ASMJIT_FORCE_INLINE bool isFP32Imm8(uint32_t val) noexcept { return isFPImm8Generic(val); } //! \overload -static inline bool isFP32Imm8(float val) noexcept { return isFP32Imm8(Support::bitCast(val)); } +static ASMJIT_FORCE_INLINE bool isFP32Imm8(float val) noexcept { return isFP32Imm8(Support::bitCast(val)); } //! Returns true if the given double precision floating point `val` can be encoded as ARM IMM8 value, which represents //! a limited set of floating point immediate values, which can be used with FMOV instruction. @@ -149,13 +156,13 @@ static inline bool isFP32Imm8(float val) noexcept { return isFP32Imm8(Support::b //! ``` //! [aBbbbbbb|bbcdefgh|00000000|00000000|00000000|00000000|00000000|00000000] //! ``` -static inline bool isFP64Imm8(uint64_t val) noexcept { return isFPImm8Generic(val); } +static ASMJIT_FORCE_INLINE bool isFP64Imm8(uint64_t val) noexcept { return isFPImm8Generic(val); } //! \overload -static inline bool isFP64Imm8(double val) noexcept { return isFP64Imm8(Support::bitCast(val)); } +static ASMJIT_FORCE_INLINE bool isFP64Imm8(double val) noexcept { return isFP64Imm8(Support::bitCast(val)); } //! \cond template -static inline uint32_t encodeFPToImm8Generic(T val) noexcept { +static ASMJIT_FORCE_INLINE uint32_t encodeFPToImm8Generic(T val) noexcept { uint32_t bits = uint32_t(val >> kNumZeroBits); return ((bits >> (kNumBBits + kNumCDEFGHBits - 7)) & 0x80u) | (bits & 0x7F); } @@ -165,9 +172,9 @@ static inline uint32_t encodeFPToImm8Generic(T val) noexcept { //! //! \note This function expects that `isFP64Imm8(val) == true` so it doesn't perform any checks of the value and just //! rearranges some bits into Imm8 order. -static inline uint32_t encodeFP64ToImm8(uint64_t val) noexcept { return encodeFPToImm8Generic(val); } +static ASMJIT_FORCE_INLINE uint32_t encodeFP64ToImm8(uint64_t val) noexcept { return encodeFPToImm8Generic(val); } //! \overload -static inline uint32_t encodeFP64ToImm8(double val) noexcept { return encodeFP64ToImm8(Support::bitCast(val)); } +static ASMJIT_FORCE_INLINE uint32_t encodeFP64ToImm8(double val) noexcept { return encodeFP64ToImm8(Support::bitCast(val)); } } // {Utils} @@ -175,5 +182,5 @@ static inline uint32_t encodeFP64ToImm8(double val) noexcept { return encodeFP64 ASMJIT_END_SUB_NAMESPACE -#endif // ASMJIT_ARM_A64UTILS_H_INCLUDED +#endif // ASMJIT_ARM_ARMUTILS_H_INCLUDED diff --git a/src/asmjit/core/api-config.h b/src/asmjit/core/api-config.h index 67d8a7c..a5bc936 100644 --- a/src/asmjit/core/api-config.h +++ b/src/asmjit/core/api-config.h @@ -82,9 +82,6 @@ namespace asmjit { //! Disables X86/X64 backends. #define ASMJIT_NO_X86 -//! Disables AArch32 backends (both ARM and Thumb). -#define ASMJIT_NO_AARCH32 - //! Disables AArch64 backend. #define ASMJIT_NO_AARCH64 diff --git a/src/asmjit/core/archcommons.h b/src/asmjit/core/archcommons.h index e9d2c84..7b52d5e 100644 --- a/src/asmjit/core/archcommons.h +++ b/src/asmjit/core/archcommons.h @@ -103,6 +103,8 @@ enum class DataType : uint32_t { kF64 = 12, //! 8-bit polynomial. kP8 = 13, + //! 16-bit BF16 floating point. + kBF16 = 14, //! 64-bit polynomial. kP64 = 15, diff --git a/src/asmjit/core/cpuinfo.cpp b/src/asmjit/core/cpuinfo.cpp index 9f33112..41eb3db 100644 --- a/src/asmjit/core/cpuinfo.cpp +++ b/src/asmjit/core/cpuinfo.cpp @@ -7,31 +7,81 @@ #include "../core/cpuinfo.h" #include "../core/support.h" -#if !defined(_WIN32) - #include - #include - #include -#endif - -// Required by `getauxval()` on Linux. -#if defined(__linux__) - #include -#endif - -//! Required to detect CPU and features on Apple platforms. -#if defined(__APPLE__) - #include - #include - #include -#endif - // Required by `__cpuidex()` and `_xgetbv()`. -#if defined(_MSC_VER) - #include -#endif +#if ASMJIT_ARCH_X86 + #if defined(_MSC_VER) + #include + #endif +#endif // ASMJIT_ARCH_X86 + +#if ASMJIT_ARCH_ARM + // Required by various utilities that are required by features detection. + #if !defined(_WIN32) + #include + #include + #include + #endif + + //! Required to detect CPU and features on Apple platforms. + #if defined(__APPLE__) + #include + #include + #include + #endif + + #if (defined(__linux__) || defined(__FreeBSD__)) + // Required by `getauxval()` on Linux and FreeBSD. + #include + #define ASMJIT_ARM_DETECT_VIA_HWCAPS + #endif + + #if ASMJIT_ARCH_ARM >= 64 && defined(__GNUC__) && defined(__linux__) && 0 + // This feature is disabled at the moment - it works, but it seems linux supports ARM features + // via HWCAPS pretty well and the most recent features need to access more registers that were + // not originally accessible, which would break on some systems. + #define ASMJIT_ARM_DETECT_VIA_CPUID + #endif + + #if ASMJIT_ARCH_ARM >= 64 && defined(__OpenBSD__) + #include + #include + #endif +#endif // ASMJIT_ARCH_ARM ASMJIT_BEGIN_NAMESPACE +// CpuInfo - Detect - Compatibility +// ================================ + +// CPU features detection is a minefield on non-X86 platforms. The following list describes which +// operating systems and architectures are supported and the status of the implementation: +// +// * X86, X86_64: +// - All OSes supported +// - Detection is based on using a CPUID instruction, which is a user-space instruction, so there +// is no need to use any OS specific APIs or syscalls to detect all features provided by the CPU. +// +// * ARM32: +// - Linux - HWCAPS based detection. +// - FreeBSD - HWCAPS based detection (shared with Linux code). +// - NetBSD - NOT IMPLEMENTED! +// - OpenBSD - NOT IMPLEMENTED! +// - Apple - sysctlbyname() based detection (this architecture is deprecated on Apple HW). +// - Windows - IsProcessorFeaturePresent() based detection (only detects a subset of features). +// - Others - NOT IMPLEMENTED! +// +// * ARM64: +// - Linux - HWCAPS and CPUID based detection. +// - FreeBSD - HWCAPS and CPUID based detection (shared with Linux code). +// - NetBSD - NOT IMPLEMENTED! +// - OpenBSD - CPUID based detection (reading CPUID via sysctl's CTL_MACHDEP). +// - Apple - sysctlbyname() based detection with FamilyId matrix (record for each family id). +// - Windows - IsProcessorFeaturePresent() based detection (only detects a subset of features). +// - Others - NOT IMPLEMENTED! +// +// * Others +// - NOT IMPLEMENTED! + // CpuInfo - Detect - HW-Thread Count // ================================== @@ -55,8 +105,14 @@ static inline uint32_t detectHWThreadCount() noexcept { // CpuInfo - Detect - X86 // ====================== +// X86 and X86_64 detection is based on CPUID. + #if ASMJIT_ARCH_X86 +namespace x86 { + +typedef CpuFeatures::X86 Ext; + struct cpuid_t { uint32_t eax, ebx, ecx, edx; }; struct xgetbv_t { uint32_t eax, edx; }; @@ -160,7 +216,7 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { cpu._maxLogicalProcessors = 1; // We are gonna execute CPUID, which was introduced by I486, so it's the requirement. - features.add(CpuFeatures::X86::kI486); + features.add(Ext::kI486); // CPUID EAX=0 // ----------- @@ -191,40 +247,40 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { if (familyId == 0x0Fu) familyId += ((regs.eax >> 20) & 0xFFu); - cpu._modelId = modelId; - cpu._familyId = familyId; - cpu._brandId = ((regs.ebx ) & 0xFF); - cpu._processorType = ((regs.eax >> 12) & 0x03); - cpu._maxLogicalProcessors = ((regs.ebx >> 16) & 0xFF); - cpu._stepping = ((regs.eax ) & 0x0F); - cpu._cacheLineSize = ((regs.ebx >> 8) & 0xFF) * 8; + cpu._modelId = modelId; + cpu._familyId = familyId; + cpu._brandId = (regs.ebx) & 0xFF; + cpu._processorType = (regs.eax >> 12) & 0x03; + cpu._maxLogicalProcessors = (regs.ebx >> 16) & 0xFF; + cpu._stepping = (regs.eax) & 0x0F; + cpu._cacheLineSize = ((regs.ebx >> 8) & 0xFF) * 8; - features.addIf(bitTest(regs.ecx, 0), CpuFeatures::X86::kSSE3); - features.addIf(bitTest(regs.ecx, 1), CpuFeatures::X86::kPCLMULQDQ); - features.addIf(bitTest(regs.ecx, 3), CpuFeatures::X86::kMONITOR); - features.addIf(bitTest(regs.ecx, 5), CpuFeatures::X86::kVMX); - features.addIf(bitTest(regs.ecx, 6), CpuFeatures::X86::kSMX); - features.addIf(bitTest(regs.ecx, 9), CpuFeatures::X86::kSSSE3); - features.addIf(bitTest(regs.ecx, 13), CpuFeatures::X86::kCMPXCHG16B); - features.addIf(bitTest(regs.ecx, 19), CpuFeatures::X86::kSSE4_1); - features.addIf(bitTest(regs.ecx, 20), CpuFeatures::X86::kSSE4_2); - features.addIf(bitTest(regs.ecx, 22), CpuFeatures::X86::kMOVBE); - features.addIf(bitTest(regs.ecx, 23), CpuFeatures::X86::kPOPCNT); - features.addIf(bitTest(regs.ecx, 25), CpuFeatures::X86::kAESNI); - features.addIf(bitTest(regs.ecx, 26), CpuFeatures::X86::kXSAVE); - features.addIf(bitTest(regs.ecx, 27), CpuFeatures::X86::kOSXSAVE); - features.addIf(bitTest(regs.ecx, 30), CpuFeatures::X86::kRDRAND); - features.addIf(bitTest(regs.edx, 0), CpuFeatures::X86::kFPU); - features.addIf(bitTest(regs.edx, 4), CpuFeatures::X86::kRDTSC); - features.addIf(bitTest(regs.edx, 5), CpuFeatures::X86::kMSR); - features.addIf(bitTest(regs.edx, 8), CpuFeatures::X86::kCMPXCHG8B); - features.addIf(bitTest(regs.edx, 15), CpuFeatures::X86::kCMOV); - features.addIf(bitTest(regs.edx, 19), CpuFeatures::X86::kCLFLUSH); - features.addIf(bitTest(regs.edx, 23), CpuFeatures::X86::kMMX); - features.addIf(bitTest(regs.edx, 24), CpuFeatures::X86::kFXSR); - features.addIf(bitTest(regs.edx, 25), CpuFeatures::X86::kSSE, CpuFeatures::X86::kMMX2); - features.addIf(bitTest(regs.edx, 25), CpuFeatures::X86::kSSE2, CpuFeatures::X86::kSSE); - features.addIf(bitTest(regs.edx, 28), CpuFeatures::X86::kMT); + features.addIf(bitTest(regs.ecx, 0), Ext::kSSE3); + features.addIf(bitTest(regs.ecx, 1), Ext::kPCLMULQDQ); + features.addIf(bitTest(regs.ecx, 3), Ext::kMONITOR); + features.addIf(bitTest(regs.ecx, 5), Ext::kVMX); + features.addIf(bitTest(regs.ecx, 6), Ext::kSMX); + features.addIf(bitTest(regs.ecx, 9), Ext::kSSSE3); + features.addIf(bitTest(regs.ecx, 13), Ext::kCMPXCHG16B); + features.addIf(bitTest(regs.ecx, 19), Ext::kSSE4_1); + features.addIf(bitTest(regs.ecx, 20), Ext::kSSE4_2); + features.addIf(bitTest(regs.ecx, 22), Ext::kMOVBE); + features.addIf(bitTest(regs.ecx, 23), Ext::kPOPCNT); + features.addIf(bitTest(regs.ecx, 25), Ext::kAESNI); + features.addIf(bitTest(regs.ecx, 26), Ext::kXSAVE); + features.addIf(bitTest(regs.ecx, 27), Ext::kOSXSAVE); + features.addIf(bitTest(regs.ecx, 30), Ext::kRDRAND); + features.addIf(bitTest(regs.edx, 0), Ext::kFPU); + features.addIf(bitTest(regs.edx, 4), Ext::kRDTSC); + features.addIf(bitTest(regs.edx, 5), Ext::kMSR); + features.addIf(bitTest(regs.edx, 8), Ext::kCMPXCHG8B); + features.addIf(bitTest(regs.edx, 15), Ext::kCMOV); + features.addIf(bitTest(regs.edx, 19), Ext::kCLFLUSH); + features.addIf(bitTest(regs.edx, 23), Ext::kMMX); + features.addIf(bitTest(regs.edx, 24), Ext::kFXSR); + features.addIf(bitTest(regs.edx, 25), Ext::kSSE, Ext::kMMX2); + features.addIf(bitTest(regs.edx, 26), Ext::kSSE2, Ext::kSSE); + features.addIf(bitTest(regs.edx, 28), Ext::kMT); // Get the content of XCR0 if supported by the CPU and enabled by the OS. if (features.hasXSAVE() && features.hasOSXSAVE()) { @@ -236,9 +292,9 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { // - XCR0[2:1] == 11b // XMM & YMM states need to be enabled by OS. if ((xcr0.eax & 0x00000006u) == 0x00000006u) { - features.add(CpuFeatures::X86::kAVX); - features.addIf(bitTest(regs.ecx, 12), CpuFeatures::X86::kFMA); - features.addIf(bitTest(regs.ecx, 29), CpuFeatures::X86::kF16C); + features.add(Ext::kAVX); + features.addIf(bitTest(regs.ecx, 12), Ext::kFMA); + features.addIf(bitTest(regs.ecx, 29), Ext::kF16C); } } } @@ -270,72 +326,72 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { maybeMPX = bitTest(regs.ebx, 14); maxSubLeafId_0x7 = regs.eax; - features.addIf(bitTest(regs.ebx, 0), CpuFeatures::X86::kFSGSBASE); - features.addIf(bitTest(regs.ebx, 3), CpuFeatures::X86::kBMI); - features.addIf(bitTest(regs.ebx, 4), CpuFeatures::X86::kHLE); - features.addIf(bitTest(regs.ebx, 7), CpuFeatures::X86::kSMEP); - features.addIf(bitTest(regs.ebx, 8), CpuFeatures::X86::kBMI2); - features.addIf(bitTest(regs.ebx, 9), CpuFeatures::X86::kERMS); - features.addIf(bitTest(regs.ebx, 11), CpuFeatures::X86::kRTM); - features.addIf(bitTest(regs.ebx, 18), CpuFeatures::X86::kRDSEED); - features.addIf(bitTest(regs.ebx, 19), CpuFeatures::X86::kADX); - features.addIf(bitTest(regs.ebx, 20), CpuFeatures::X86::kSMAP); - features.addIf(bitTest(regs.ebx, 23), CpuFeatures::X86::kCLFLUSHOPT); - features.addIf(bitTest(regs.ebx, 24), CpuFeatures::X86::kCLWB); - features.addIf(bitTest(regs.ebx, 29), CpuFeatures::X86::kSHA); - features.addIf(bitTest(regs.ecx, 0), CpuFeatures::X86::kPREFETCHWT1); - features.addIf(bitTest(regs.ecx, 4), CpuFeatures::X86::kOSPKE); - features.addIf(bitTest(regs.ecx, 5), CpuFeatures::X86::kWAITPKG); - features.addIf(bitTest(regs.ecx, 7), CpuFeatures::X86::kCET_SS); - features.addIf(bitTest(regs.ecx, 8), CpuFeatures::X86::kGFNI); - features.addIf(bitTest(regs.ecx, 9), CpuFeatures::X86::kVAES); - features.addIf(bitTest(regs.ecx, 10), CpuFeatures::X86::kVPCLMULQDQ); - features.addIf(bitTest(regs.ecx, 22), CpuFeatures::X86::kRDPID); - features.addIf(bitTest(regs.ecx, 25), CpuFeatures::X86::kCLDEMOTE); - features.addIf(bitTest(regs.ecx, 27), CpuFeatures::X86::kMOVDIRI); - features.addIf(bitTest(regs.ecx, 28), CpuFeatures::X86::kMOVDIR64B); - features.addIf(bitTest(regs.ecx, 29), CpuFeatures::X86::kENQCMD); - features.addIf(bitTest(regs.edx, 4), CpuFeatures::X86::kFSRM); - features.addIf(bitTest(regs.edx, 5), CpuFeatures::X86::kUINTR); - features.addIf(bitTest(regs.edx, 14), CpuFeatures::X86::kSERIALIZE); - features.addIf(bitTest(regs.edx, 16), CpuFeatures::X86::kTSXLDTRK); - features.addIf(bitTest(regs.edx, 18), CpuFeatures::X86::kPCONFIG); - features.addIf(bitTest(regs.edx, 20), CpuFeatures::X86::kCET_IBT); + features.addIf(bitTest(regs.ebx, 0), Ext::kFSGSBASE); + features.addIf(bitTest(regs.ebx, 3), Ext::kBMI); + features.addIf(bitTest(regs.ebx, 4), Ext::kHLE); + features.addIf(bitTest(regs.ebx, 7), Ext::kSMEP); + features.addIf(bitTest(regs.ebx, 8), Ext::kBMI2); + features.addIf(bitTest(regs.ebx, 9), Ext::kERMS); + features.addIf(bitTest(regs.ebx, 11), Ext::kRTM); + features.addIf(bitTest(regs.ebx, 18), Ext::kRDSEED); + features.addIf(bitTest(regs.ebx, 19), Ext::kADX); + features.addIf(bitTest(regs.ebx, 20), Ext::kSMAP); + features.addIf(bitTest(regs.ebx, 23), Ext::kCLFLUSHOPT); + features.addIf(bitTest(regs.ebx, 24), Ext::kCLWB); + features.addIf(bitTest(regs.ebx, 29), Ext::kSHA); + features.addIf(bitTest(regs.ecx, 0), Ext::kPREFETCHWT1); + features.addIf(bitTest(regs.ecx, 4), Ext::kOSPKE); + features.addIf(bitTest(regs.ecx, 5), Ext::kWAITPKG); + features.addIf(bitTest(regs.ecx, 7), Ext::kCET_SS); + features.addIf(bitTest(regs.ecx, 8), Ext::kGFNI); + features.addIf(bitTest(regs.ecx, 9), Ext::kVAES); + features.addIf(bitTest(regs.ecx, 10), Ext::kVPCLMULQDQ); + features.addIf(bitTest(regs.ecx, 22), Ext::kRDPID); + features.addIf(bitTest(regs.ecx, 25), Ext::kCLDEMOTE); + features.addIf(bitTest(regs.ecx, 27), Ext::kMOVDIRI); + features.addIf(bitTest(regs.ecx, 28), Ext::kMOVDIR64B); + features.addIf(bitTest(regs.ecx, 29), Ext::kENQCMD); + features.addIf(bitTest(regs.edx, 4), Ext::kFSRM); + features.addIf(bitTest(regs.edx, 5), Ext::kUINTR); + features.addIf(bitTest(regs.edx, 14), Ext::kSERIALIZE); + features.addIf(bitTest(regs.edx, 16), Ext::kTSXLDTRK); + features.addIf(bitTest(regs.edx, 18), Ext::kPCONFIG); + features.addIf(bitTest(regs.edx, 20), Ext::kCET_IBT); // Detect 'TSX' - Requires at least one of `HLE` and `RTM` features. if (features.hasHLE() || features.hasRTM()) { - features.add(CpuFeatures::X86::kTSX); + features.add(Ext::kTSX); } if (bitTest(regs.ebx, 5) && features.hasAVX()) { - features.add(CpuFeatures::X86::kAVX2); + features.add(Ext::kAVX2); } if (avx512EnabledByOS && bitTest(regs.ebx, 16)) { - features.add(CpuFeatures::X86::kAVX512_F); + features.add(Ext::kAVX512_F); - features.addIf(bitTest(regs.ebx, 17), CpuFeatures::X86::kAVX512_DQ); - features.addIf(bitTest(regs.ebx, 21), CpuFeatures::X86::kAVX512_IFMA); - features.addIf(bitTest(regs.ebx, 26), CpuFeatures::X86::kAVX512_PFI); - features.addIf(bitTest(regs.ebx, 27), CpuFeatures::X86::kAVX512_ERI); - features.addIf(bitTest(regs.ebx, 28), CpuFeatures::X86::kAVX512_CDI); - features.addIf(bitTest(regs.ebx, 30), CpuFeatures::X86::kAVX512_BW); - features.addIf(bitTest(regs.ebx, 31), CpuFeatures::X86::kAVX512_VL); - features.addIf(bitTest(regs.ecx, 1), CpuFeatures::X86::kAVX512_VBMI); - features.addIf(bitTest(regs.ecx, 6), CpuFeatures::X86::kAVX512_VBMI2); - features.addIf(bitTest(regs.ecx, 11), CpuFeatures::X86::kAVX512_VNNI); - features.addIf(bitTest(regs.ecx, 12), CpuFeatures::X86::kAVX512_BITALG); - features.addIf(bitTest(regs.ecx, 14), CpuFeatures::X86::kAVX512_VPOPCNTDQ); - features.addIf(bitTest(regs.edx, 2), CpuFeatures::X86::kAVX512_4VNNIW); - features.addIf(bitTest(regs.edx, 3), CpuFeatures::X86::kAVX512_4FMAPS); - features.addIf(bitTest(regs.edx, 8), CpuFeatures::X86::kAVX512_VP2INTERSECT); - features.addIf(bitTest(regs.edx, 23), CpuFeatures::X86::kAVX512_FP16); + features.addIf(bitTest(regs.ebx, 17), Ext::kAVX512_DQ); + features.addIf(bitTest(regs.ebx, 21), Ext::kAVX512_IFMA); + features.addIf(bitTest(regs.ebx, 26), Ext::kAVX512_PF); + features.addIf(bitTest(regs.ebx, 27), Ext::kAVX512_ER); + features.addIf(bitTest(regs.ebx, 28), Ext::kAVX512_CD); + features.addIf(bitTest(regs.ebx, 30), Ext::kAVX512_BW); + features.addIf(bitTest(regs.ebx, 31), Ext::kAVX512_VL); + features.addIf(bitTest(regs.ecx, 1), Ext::kAVX512_VBMI); + features.addIf(bitTest(regs.ecx, 6), Ext::kAVX512_VBMI2); + features.addIf(bitTest(regs.ecx, 11), Ext::kAVX512_VNNI); + features.addIf(bitTest(regs.ecx, 12), Ext::kAVX512_BITALG); + features.addIf(bitTest(regs.ecx, 14), Ext::kAVX512_VPOPCNTDQ); + features.addIf(bitTest(regs.edx, 2), Ext::kAVX512_4VNNIW); + features.addIf(bitTest(regs.edx, 3), Ext::kAVX512_4FMAPS); + features.addIf(bitTest(regs.edx, 8), Ext::kAVX512_VP2INTERSECT); + features.addIf(bitTest(regs.edx, 23), Ext::kAVX512_FP16); } if (amxEnabledByOS) { - features.addIf(bitTest(regs.edx, 22), CpuFeatures::X86::kAMX_BF16); - features.addIf(bitTest(regs.edx, 24), CpuFeatures::X86::kAMX_TILE); - features.addIf(bitTest(regs.edx, 25), CpuFeatures::X86::kAMX_INT8); + features.addIf(bitTest(regs.edx, 22), Ext::kAMX_BF16); + features.addIf(bitTest(regs.edx, 24), Ext::kAMX_TILE); + features.addIf(bitTest(regs.edx, 25), Ext::kAMX_INT8); } } @@ -345,31 +401,38 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { if (maxSubLeafId_0x7 >= 1) { cpuidQuery(®s, 0x7, 1); - features.addIf(bitTest(regs.eax, 3), CpuFeatures::X86::kRAO_INT); - features.addIf(bitTest(regs.eax, 7), CpuFeatures::X86::kCMPCCXADD); - features.addIf(bitTest(regs.eax, 10), CpuFeatures::X86::kFZRM); - features.addIf(bitTest(regs.eax, 11), CpuFeatures::X86::kFSRS); - features.addIf(bitTest(regs.eax, 12), CpuFeatures::X86::kFSRC); - features.addIf(bitTest(regs.eax, 19), CpuFeatures::X86::kWRMSRNS); - features.addIf(bitTest(regs.eax, 22), CpuFeatures::X86::kHRESET); - features.addIf(bitTest(regs.eax, 26), CpuFeatures::X86::kLAM); - features.addIf(bitTest(regs.eax, 27), CpuFeatures::X86::kMSRLIST); - features.addIf(bitTest(regs.edx, 14), CpuFeatures::X86::kPREFETCHI); - features.addIf(bitTest(regs.edx, 18), CpuFeatures::X86::kCET_SSS); + features.addIf(bitTest(regs.eax, 0), Ext::kSHA512); + features.addIf(bitTest(regs.eax, 1), Ext::kSM3); + features.addIf(bitTest(regs.eax, 2), Ext::kSM4); + features.addIf(bitTest(regs.eax, 3), Ext::kRAO_INT); + features.addIf(bitTest(regs.eax, 7), Ext::kCMPCCXADD); + features.addIf(bitTest(regs.eax, 10), Ext::kFZRM); + features.addIf(bitTest(regs.eax, 11), Ext::kFSRS); + features.addIf(bitTest(regs.eax, 12), Ext::kFSRC); + features.addIf(bitTest(regs.eax, 19), Ext::kWRMSRNS); + features.addIf(bitTest(regs.eax, 22), Ext::kHRESET); + features.addIf(bitTest(regs.eax, 26), Ext::kLAM); + features.addIf(bitTest(regs.eax, 27), Ext::kMSRLIST); + features.addIf(bitTest(regs.ebx, 1), Ext::kTSE); + features.addIf(bitTest(regs.edx, 14), Ext::kPREFETCHI); + features.addIf(bitTest(regs.edx, 18), Ext::kCET_SSS); + features.addIf(bitTest(regs.edx, 21), Ext::kAPX_F); if (features.hasAVX2()) { - features.addIf(bitTest(regs.eax, 4), CpuFeatures::X86::kAVX_VNNI); - features.addIf(bitTest(regs.eax, 23), CpuFeatures::X86::kAVX_IFMA); - features.addIf(bitTest(regs.edx, 4), CpuFeatures::X86::kAVX_VNNI_INT8); - features.addIf(bitTest(regs.edx, 5), CpuFeatures::X86::kAVX_NE_CONVERT); + features.addIf(bitTest(regs.eax, 4), Ext::kAVX_VNNI); + features.addIf(bitTest(regs.eax, 23), Ext::kAVX_IFMA); + features.addIf(bitTest(regs.edx, 4), Ext::kAVX_VNNI_INT8); + features.addIf(bitTest(regs.edx, 5), Ext::kAVX_NE_CONVERT); + features.addIf(bitTest(regs.edx, 10), Ext::kAVX_VNNI_INT16); } if (features.hasAVX512_F()) { - features.addIf(bitTest(regs.eax, 5), CpuFeatures::X86::kAVX512_BF16); + features.addIf(bitTest(regs.eax, 5), Ext::kAVX512_BF16); } if (amxEnabledByOS) { - features.addIf(bitTest(regs.eax, 21), CpuFeatures::X86::kAMX_FP16); + features.addIf(bitTest(regs.eax, 21), Ext::kAMX_FP16); + features.addIf(bitTest(regs.edx, 8), Ext::kAMX_COMPLEX); } } @@ -381,13 +444,13 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { // Both CPUID result and XCR0 has to be enabled to have support for MPX. if (((regs.eax & xcr0.eax) & 0x00000018u) == 0x00000018u && maybeMPX) - features.add(CpuFeatures::X86::kMPX); + features.add(Ext::kMPX); cpuidQuery(®s, 0xD, 1); - features.addIf(bitTest(regs.eax, 0), CpuFeatures::X86::kXSAVEOPT); - features.addIf(bitTest(regs.eax, 1), CpuFeatures::X86::kXSAVEC); - features.addIf(bitTest(regs.eax, 3), CpuFeatures::X86::kXSAVES); + features.addIf(bitTest(regs.eax, 0), Ext::kXSAVEOPT); + features.addIf(bitTest(regs.eax, 1), Ext::kXSAVEC); + features.addIf(bitTest(regs.eax, 3), Ext::kXSAVES); } // CPUID EAX=14 ECX=0 @@ -396,7 +459,7 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { if (maxId >= 0xE) { cpuidQuery(®s, 0xE, 0); - features.addIf(bitTest(regs.ebx, 4), CpuFeatures::X86::kPTWRITE); + features.addIf(bitTest(regs.ebx, 4), Ext::kPTWRITE); } // CPUID EAX=0x80000000...maxId @@ -419,32 +482,32 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { break; case 0x80000001u: - features.addIf(bitTest(regs.ecx, 0), CpuFeatures::X86::kLAHFSAHF); - features.addIf(bitTest(regs.ecx, 2), CpuFeatures::X86::kSVM); - features.addIf(bitTest(regs.ecx, 5), CpuFeatures::X86::kLZCNT); - features.addIf(bitTest(regs.ecx, 6), CpuFeatures::X86::kSSE4A); - features.addIf(bitTest(regs.ecx, 7), CpuFeatures::X86::kMSSE); - features.addIf(bitTest(regs.ecx, 8), CpuFeatures::X86::kPREFETCHW); - features.addIf(bitTest(regs.ecx, 12), CpuFeatures::X86::kSKINIT); - features.addIf(bitTest(regs.ecx, 15), CpuFeatures::X86::kLWP); - features.addIf(bitTest(regs.ecx, 21), CpuFeatures::X86::kTBM); - features.addIf(bitTest(regs.ecx, 29), CpuFeatures::X86::kMONITORX); - features.addIf(bitTest(regs.edx, 20), CpuFeatures::X86::kNX); - features.addIf(bitTest(regs.edx, 21), CpuFeatures::X86::kFXSROPT); - features.addIf(bitTest(regs.edx, 22), CpuFeatures::X86::kMMX2); - features.addIf(bitTest(regs.edx, 27), CpuFeatures::X86::kRDTSCP); - features.addIf(bitTest(regs.edx, 29), CpuFeatures::X86::kPREFETCHW); - features.addIf(bitTest(regs.edx, 30), CpuFeatures::X86::k3DNOW2, CpuFeatures::X86::kMMX2); - features.addIf(bitTest(regs.edx, 31), CpuFeatures::X86::kPREFETCHW); + features.addIf(bitTest(regs.ecx, 0), Ext::kLAHFSAHF); + features.addIf(bitTest(regs.ecx, 2), Ext::kSVM); + features.addIf(bitTest(regs.ecx, 5), Ext::kLZCNT); + features.addIf(bitTest(regs.ecx, 6), Ext::kSSE4A); + features.addIf(bitTest(regs.ecx, 7), Ext::kMSSE); + features.addIf(bitTest(regs.ecx, 8), Ext::kPREFETCHW); + features.addIf(bitTest(regs.ecx, 12), Ext::kSKINIT); + features.addIf(bitTest(regs.ecx, 15), Ext::kLWP); + features.addIf(bitTest(regs.ecx, 21), Ext::kTBM); + features.addIf(bitTest(regs.ecx, 29), Ext::kMONITORX); + features.addIf(bitTest(regs.edx, 20), Ext::kNX); + features.addIf(bitTest(regs.edx, 21), Ext::kFXSROPT); + features.addIf(bitTest(regs.edx, 22), Ext::kMMX2); + features.addIf(bitTest(regs.edx, 27), Ext::kRDTSCP); + features.addIf(bitTest(regs.edx, 29), Ext::kPREFETCHW); + features.addIf(bitTest(regs.edx, 30), Ext::k3DNOW2, Ext::kMMX2); + features.addIf(bitTest(regs.edx, 31), Ext::kPREFETCHW); if (features.hasAVX()) { - features.addIf(bitTest(regs.ecx, 11), CpuFeatures::X86::kXOP); - features.addIf(bitTest(regs.ecx, 16), CpuFeatures::X86::kFMA4); + features.addIf(bitTest(regs.ecx, 11), Ext::kXOP); + features.addIf(bitTest(regs.ecx, 16), Ext::kFMA4); } // This feature seems to be only supported by AMD. if (cpu.isVendor("AMD")) { - features.addIf(bitTest(regs.ecx, 4), CpuFeatures::X86::kALTMOVCR8); + features.addIf(bitTest(regs.ecx, 4), Ext::kALTMOVCR8); } break; @@ -462,17 +525,21 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { break; case 0x80000008u: - features.addIf(bitTest(regs.ebx, 0), CpuFeatures::X86::kCLZERO); - features.addIf(bitTest(regs.ebx, 0), CpuFeatures::X86::kRDPRU); - features.addIf(bitTest(regs.ebx, 8), CpuFeatures::X86::kMCOMMIT); - features.addIf(bitTest(regs.ebx, 9), CpuFeatures::X86::kWBNOINVD); + features.addIf(bitTest(regs.ebx, 0), Ext::kCLZERO); + features.addIf(bitTest(regs.ebx, 0), Ext::kRDPRU); + features.addIf(bitTest(regs.ebx, 8), Ext::kMCOMMIT); + features.addIf(bitTest(regs.ebx, 9), Ext::kWBNOINVD); // Go directly to the next one we are interested in. i = 0x8000001Fu - 1; break; case 0x8000001Fu: - features.addIf(bitTest(regs.eax, 4), CpuFeatures::X86::kSNP); + features.addIf(bitTest(regs.eax, 0), Ext::kSME); + features.addIf(bitTest(regs.eax, 1), Ext::kSEV); + features.addIf(bitTest(regs.eax, 3), Ext::kSEV_ES); + features.addIf(bitTest(regs.eax, 4), Ext::kSEV_SNP); + features.addIf(bitTest(regs.eax, 6), Ext::kRMPQUERY); break; } } while (++i <= maxId); @@ -481,11 +548,17 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { simplifyCpuBrand(cpu._brand.str); } +} // {x86} + #endif // ASMJIT_ARCH_X86 // CpuInfo - Detect - ARM // ====================== +// Implement the most code outside the platform specific #ifdefs to minimize breaking the detection on +// platforms that don't run on our CI infrastructure. The problem with the detection is that every OS +// requires a specific implementation as ARM features cannot be detected in user-mode without OS enablement. + // The most relevant and accurate information can be found here: // https://github.com/llvm-project/llvm/blob/master/lib/Target/AArch64/AArch64.td // https://github.com/apple/llvm-project/blob/apple/main/llvm/lib/Target/AArch64/AArch64.td (Apple fork) @@ -497,273 +570,861 @@ static ASMJIT_FAVOR_SIZE void detectX86Cpu(CpuInfo& cpu) noexcept { #if ASMJIT_ARCH_ARM -static inline void populateBaseARMFeatures(CpuInfo& cpu) noexcept { -#if ASMJIT_ARCH_ARM == 32 +namespace arm { + +// ARM commonly refers to CPU features using FEAT_ prefix, we use Ext:: to make it compatible with other parts. +typedef CpuFeatures::ARM Ext; + +// CpuInfo - Detect - ARM - OS Kernel Version +// ========================================== + +#if defined(__linux__) +struct UNameKernelVersion { + int parts[3]; + + inline bool atLeast(int major, int minor, int patch = 0) const noexcept { + if (parts[0] >= major) { + if (parts[0] > major) + return true; + + if (parts[1] >= minor) { + if (parts[1] > minor) + return true; + + return parts[2] >= patch; + } + } + + return false; + } +}; + +ASMJIT_MAYBE_UNUSED +static UNameKernelVersion getUNameKernelVersion() noexcept { + UNameKernelVersion ver{}; + ver.parts[0] = -1; + + utsname buffer; + if (uname(&buffer) != 0) + return ver; + + size_t count = 0; + char* p = buffer.release; + while (*p) { + uint32_t c = uint8_t(*p); + if (c >= uint32_t('0') && c <= uint32_t('9')) { + ver.parts[count] = int(strtol(p, &p, 10)); + if (++count == 3) + break; + } + else if (c == '.' || c == '-') { + p++; + } + else { + break; + } + } + + return ver; +} +#endif // __linux__ + +// CpuInfo - Detect - ARM - Baseline Features of ARM Architectures +// =============================================================== + +ASMJIT_MAYBE_UNUSED +static inline void populateBaseAArch32Features(CpuFeatures::ARM& features) noexcept { // No baseline flags at the moment. - DebugUtils::unused(cpu); -#else - // AArch64 is based on ARMv8-A and later. - cpu.addFeature(CpuFeatures::ARM::kARMv6); - cpu.addFeature(CpuFeatures::ARM::kARMv7); - cpu.addFeature(CpuFeatures::ARM::kARMv8a); + DebugUtils::unused(features); +} + +ASMJIT_MAYBE_UNUSED +static inline void populateBaseAArch64Features(CpuFeatures::ARM& features) noexcept { + // AArch64 is based on ARMv8.0 and later. + features.add(Ext::kARMv6); + features.add(Ext::kARMv7); + features.add(Ext::kARMv8a); // AArch64 comes with these features by default. - cpu.addFeature(CpuFeatures::ARM::kVFPv2); - cpu.addFeature(CpuFeatures::ARM::kVFPv3); - cpu.addFeature(CpuFeatures::ARM::kVFPv4); - cpu.addFeature(CpuFeatures::ARM::kASIMD); - cpu.addFeature(CpuFeatures::ARM::kIDIVA); + features.add(Ext::kASIMD); + features.add(Ext::kFP); + features.add(Ext::kIDIVA); +} + +static inline void populateBaseARMFeatures(CpuInfo& cpu) noexcept { +#if ASMJIT_ARCH_ARM == 32 + populateBaseAArch32Features(cpu.features().arm()); +#else + populateBaseAArch64Features(cpu.features().arm()); #endif } +// CpuInfo - Detect - ARM - Madatory Features of ARM Architectures +// =============================================================== + +// Populates mandatory ARMv8.[v]A features. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void populateARMv8AFeatures(CpuFeatures::ARM& features, uint32_t v) noexcept { + switch (v) { + default: + ASMJIT_FALLTHROUGH; + case 9: // ARMv8.9 + features.add(Ext::kCLRBHB, Ext::kCSSC, Ext::kPRFMSLC, Ext::kSPECRES2, Ext::kRAS2); + ASMJIT_FALLTHROUGH; + case 8: // ARMv8.8 + features.add(Ext::kHBC, Ext::kMOPS, Ext::kNMI); + ASMJIT_FALLTHROUGH; + case 7: // ARMv8.7 + features.add(Ext::kHCX, Ext::kPAN3, Ext::kWFXT, Ext::kXS); + ASMJIT_FALLTHROUGH; + case 6: // ARMv8.6 + // Missing: AMUv1p1. + features.add(Ext::kBF16, Ext::kECV, Ext::kFGT, Ext::kI8MM); + ASMJIT_FALLTHROUGH; + case 5: // ARMv8.5 + // Missing: CSV2_2. + features.add(Ext::kBTI, Ext::kDPB2, Ext::kFLAGM2, Ext::kFRINTTS, Ext::kSB, Ext::kSPECRES, Ext::kSSBS); + ASMJIT_FALLTHROUGH; + case 4: // ARMv8.4 + // Missing: AMUv1, SEL2, TLBIOS, TLBIRANGE. + features.add(Ext::kDIT, Ext::kDOTPROD, Ext::kFLAGM, Ext::kLRCPC2, Ext::kLSE2, Ext::kMPAM, Ext::kNV, Ext::kTRF); + ASMJIT_FALLTHROUGH; + case 3: // ARMv8.3 + features.add(Ext::kCCIDX, Ext::kFCMA, Ext::kJSCVT, Ext::kLRCPC, Ext::kPAUTH); + ASMJIT_FALLTHROUGH; + case 2: // ARMv8.2 + features.add(Ext::kCRC32, Ext::kDPB, Ext::kPAN2, Ext::kRAS, Ext::kUAO); + ASMJIT_FALLTHROUGH; + case 1: // ARMv8.1 + features.add(Ext::kCRC32, Ext::kLOR, Ext::kLSE, Ext::kPAN, Ext::kRDM, Ext::kVHE); + ASMJIT_FALLTHROUGH; + case 0: // ARMv8.0 + features.add(Ext::kASIMD, Ext::kFP, Ext::kIDIVA, Ext::kVFP_D32); + break; + } +} + +// Populates mandatory ARMv9.[v] features. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void populateARMv9AFeatures(CpuFeatures::ARM& features, uint32_t v) noexcept { + populateARMv8AFeatures(features, v <= 4u ? 5u + v : 9u); + + switch (v) { + default: + ASMJIT_FALLTHROUGH; + case 4: // ARMv9.4 - based on ARMv8.9. + ASMJIT_FALLTHROUGH; + case 3: // ARMv9.3 - based on ARMv8.8. + ASMJIT_FALLTHROUGH; + case 2: // ARMv9.2 - based on ARMv8.7. + ASMJIT_FALLTHROUGH; + case 1: // ARMv9.1 - based on ARMv8.6. + ASMJIT_FALLTHROUGH; + case 0: // ARMv9.0 - based on ARMv8.5. + features.add(Ext::kRME, Ext::kSVE, Ext::kSVE2); + break; + } +} + +// CpuInfo - Detect - ARM - CPUID Based Features +// ============================================= + +// This implements detection based on the content of CPUID registers. The following code doesn't actually read any +// of the registers so it's an implementation that can theoretically be tested / used in mocks. + +// Merges a feature that contains 0b1111 when it doesn't exist and starts at 0b0000 when it does. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FORCE_INLINE void mergeAArch64CPUIDFeatureNA(CpuFeatures::ARM& features, uint64_t regBits, uint32_t offset, + Ext::Id f0, + Ext::Id f1 = Ext::kNone, + Ext::Id f2 = Ext::kNone, + Ext::Id f3 = Ext::kNone) noexcept { + + uint32_t val = uint32_t((regBits >> offset) & 0xFu); + + // If val == 0b1111 then the feature is not implemented in this case (some early extensions). + if (val == 0xFu) + return; + + if (f0 != Ext::kNone) features.add(f0); + if (f1 != Ext::kNone) features.addIf(val >= 1, f1); + if (f2 != Ext::kNone) features.addIf(val >= 2, f2); + if (f3 != Ext::kNone) features.addIf(val >= 3, f3); +} + +// Merges a feature that contains 0b0000 when it doesn't exist and starts at 0b0001 when it does. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FORCE_INLINE void mergeAArch64CPUIDFeatureExt(CpuFeatures::ARM& features, uint64_t regBits, uint32_t offset, + Ext::Id f1, + Ext::Id f2 = Ext::kNone, + Ext::Id f3 = Ext::kNone, + Ext::Id f4 = Ext::kNone) noexcept { + + uint32_t val = uint32_t((regBits >> offset) & 0xFu); + + // if val == 0 it means that this feature is not supported. + + if (f1 != Ext::kNone) features.addIf(val >= 1, f1); + if (f2 != Ext::kNone) features.addIf(val >= 2, f2); + if (f3 != Ext::kNone) features.addIf(val >= 3, f3); + if (f4 != Ext::kNone) features.addIf(val >= 4, f4); +} + +#define MERGE_FEATURE_N_A(identifier, reg, offset, ...) mergeAArch64CPUIDFeatureNA(cpu.features().arm(), reg, offset, __VA_ARGS__) +#define MERGE_FEATURE_EXT(identifier, reg, offset, ...) mergeAArch64CPUIDFeatureExt(cpu.features().arm(), reg, offset, __VA_ARGS__) + +// Detects features based on the content of ID_AA64PFR0_EL1 and ID_AA64PFR1_EL1 registers. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch64FeaturesViaCPUID_AA64PFR0_AA64PFR1(CpuInfo& cpu, uint64_t fpr0, uint64_t fpr1) noexcept { + // ID_AA64PFR0_EL1 + // =============== + + // FP and AdvSIMD bits should match (i.e. if FP features FP16, ASIMD must feature it too). + MERGE_FEATURE_N_A("FP bits [19:16]" , fpr0, 16, Ext::kFP, Ext::kFP16); + MERGE_FEATURE_N_A("AdvSIMD bits [23:20]" , fpr0, 20, Ext::kASIMD, Ext::kFP16); + /* + MERGE_FEATURE_EXT("GIC bits [27:24]" , fpr0, 24, ...); + */ + MERGE_FEATURE_EXT("RAS bits [31:28]" , fpr0, 28, Ext::kRAS, Ext::kRAS1_1, Ext::kRAS2); + MERGE_FEATURE_EXT("SVE bits [35:32]" , fpr0, 32, Ext::kSVE); + /* + MERGE_FEATURE_EXT("SEL2 bits [39:36]" , fpr0, 36, ...); + MERGE_FEATURE_EXT("MPAM bits [43:40]" , fpr0, 40, ...); + MERGE_FEATURE_EXT("AMU bits [47:44]" , fpr0, 44, ...); + */ + MERGE_FEATURE_EXT("DIT bits [51:48]" , fpr0, 48, Ext::kDIT); + MERGE_FEATURE_EXT("RME bits [55:52]" , fpr0, 52, Ext::kRME); + /* + MERGE_FEATURE_EXT("CSV2 bits [59:56]" , fpr0, 56, ...); + MERGE_FEATURE_EXT("CSV3 bits [63:60]" , fpr0, 60, ...); + */ + + // ID_AA64PFR1_EL1 + // =============== + + MERGE_FEATURE_EXT("BT bits [3:0]" , fpr1, 0, Ext::kBTI); + MERGE_FEATURE_EXT("SSBS bits [7:4]" , fpr1, 4, Ext::kSSBS, Ext::kSSBS2); + MERGE_FEATURE_EXT("MTE bits [11:8]" , fpr1, 8, Ext::kMTE, Ext::kMTE2, Ext::kMTE3); + /* + MERGE_FEATURE_EXT("RAS_frac bits [15:12]" , fpr1, 12, ...); + MERGE_FEATURE_EXT("MPAM_frac bits [19:16]" , fpr1, 16, ...); + */ + MERGE_FEATURE_EXT("SME bits [27:24]" , fpr1, 24, Ext::kSME, Ext::kSME2); + MERGE_FEATURE_EXT("RNDR_trap bits [31:28]" , fpr1, 28, Ext::kRNG_TRAP); + /* + MERGE_FEATURE_EXT("CSV2_frac bits [35:32]" , fpr1, 32, ...); + */ + MERGE_FEATURE_EXT("NMI bits [39:36]" , fpr1, 36, Ext::kNMI); + /* + MERGE_FEATURE_EXT("MTE_frac bits [43:40]" , fpr1, 40, ...); + MERGE_FEATURE_EXT("GCS bits [47:44]" , fpr1, 44, ...); + */ + MERGE_FEATURE_EXT("THE bits [51:48]" , fpr1, 48, Ext::kTHE); + + // MTEX extensions are only available when MTE3 is available. + if (cpu.features().arm().hasMTE3()) + MERGE_FEATURE_EXT("MTEX bits [55:52]" , fpr1, 52, Ext::kMTE4); + + /* + MERGE_FEATURE_EXT("DF2 bits [59:56]" , fpr1, 56, ...); + MERGE_FEATURE_EXT("PFAR bits [63:60]" , fpr1, 60, ...); + */ + + // ID_AA64PFR0_EL1 + ID_AA64PFR1_EL1 + // ================================= + + uint32_t rasMain = uint32_t((fpr0 >> 28) & 0xFu); + uint32_t rasFrac = uint32_t((fpr1 >> 12) & 0xFu); + + if (rasMain == 1 && rasFrac == 1) { + cpu.features().arm().add(Ext::kRAS1_1); + } + + uint32_t mpamMain = uint32_t((fpr0 >> 40) & 0xFu); + uint32_t mpamFrac = uint32_t((fpr1 >> 16) & 0xFu); + + if (mpamMain || mpamFrac) + cpu.features().arm().add(Ext::kMPAM); +} + +// Detects features based on the content of ID_AA64ISAR0_EL1 and ID_AA64ISAR1_EL1 registers. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch64FeaturesViaCPUID_AA64ISAR0_AA64ISAR1(CpuInfo& cpu, uint64_t isar0, uint64_t isar1) noexcept { + // ID_AA64ISAR0_EL1 + // ================ + + MERGE_FEATURE_EXT("AES bits [7:4]" , isar0, 4, Ext::kAES, Ext::kPMULL); + MERGE_FEATURE_EXT("SHA1 bits [11:8]" , isar0, 8, Ext::kSHA1); + MERGE_FEATURE_EXT("SHA2 bits [15:12]" , isar0, 12, Ext::kSHA256, Ext::kSHA512); + MERGE_FEATURE_EXT("CRC32 bits [19:16]" , isar0, 16, Ext::kCRC32); + MERGE_FEATURE_EXT("Atomic bits [23:20]" , isar0, 20, Ext::kNone, Ext::kLSE, Ext::kLSE128); + MERGE_FEATURE_EXT("TME bits [27:24]" , isar0, 24, Ext::kTME); + MERGE_FEATURE_EXT("RDM bits [31:28]" , isar0, 28, Ext::kRDM); + MERGE_FEATURE_EXT("SHA3 bits [35:32]" , isar0, 32, Ext::kSHA3); + MERGE_FEATURE_EXT("SM3 bits [39:36]" , isar0, 36, Ext::kSM3); + MERGE_FEATURE_EXT("SM4 bits [43:40]" , isar0, 40, Ext::kSM4); + MERGE_FEATURE_EXT("DP bits [47:44]" , isar0, 44, Ext::kDOTPROD); + MERGE_FEATURE_EXT("FHM bits [51:48]" , isar0, 48, Ext::kFHM); + MERGE_FEATURE_EXT("TS bits [55:52]" , isar0, 52, Ext::kFLAGM, Ext::kFLAGM2); + /* + MERGE_FEATURE_EXT("TLB bits [59:56]" , isar0, 56, ...); + */ + MERGE_FEATURE_EXT("RNDR bits [63:60]" , isar0, 60, Ext::kFLAGM, Ext::kRNG); + + // ID_AA64ISAR1_EL1 + // ================ + + MERGE_FEATURE_EXT("DPB bits [3:0]" , isar1, 0, Ext::kDPB, Ext::kDPB2); + /* + MERGE_FEATURE_EXT("APA bits [7:4]" , isar1, 4, ...); + MERGE_FEATURE_EXT("API bits [11:8]" , isar1, 8, ...); + */ + MERGE_FEATURE_EXT("JSCVT bits [15:12]" , isar1, 12, Ext::kJSCVT); + MERGE_FEATURE_EXT("FCMA bits [19:16]" , isar1, 16, Ext::kFCMA); + MERGE_FEATURE_EXT("LRCPC bits [23:20]" , isar1, 20, Ext::kLRCPC, Ext::kLRCPC2, Ext::kLRCPC3); + /* + MERGE_FEATURE_EXT("GPA bits [27:24]" , isar1, 24, ...); + MERGE_FEATURE_EXT("GPI bits [31:28]" , isar1, 28, ...); + */ + MERGE_FEATURE_EXT("FRINTTS bits [35:32]" , isar1, 32, Ext::kFRINTTS); + MERGE_FEATURE_EXT("SB bits [39:36]" , isar1, 36, Ext::kSB); + MERGE_FEATURE_EXT("SPECRES bits [43:40]" , isar1, 40, Ext::kSPECRES, Ext::kSPECRES2); + MERGE_FEATURE_EXT("BF16 bits [47:44]" , isar1, 44, Ext::kBF16, Ext::kEBF16); + MERGE_FEATURE_EXT("DGH bits [51:48]" , isar1, 48, Ext::kDGH); + MERGE_FEATURE_EXT("I8MM bits [55:52]" , isar1, 52, Ext::kI8MM); + MERGE_FEATURE_EXT("XS bits [59:56]" , isar1, 56, Ext::kXS); + MERGE_FEATURE_EXT("LS64 bits [63:60]" , isar1, 60, Ext::kLS64, Ext::kLS64_V, Ext::kLS64_ACCDATA); +} + +// Detects features based on the content of ID_AA64ISAR2_EL1 register. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch64FeaturesViaCPUID_AA64ISAR2(CpuInfo& cpu, uint64_t isar2) noexcept { + MERGE_FEATURE_EXT("WFxT bits [3:0]" , isar2, 0, Ext::kNone, Ext::kWFXT); + MERGE_FEATURE_EXT("RPRES bits [7:4]" , isar2, 4, Ext::kRPRES); + /* + MERGE_FEATURE_EXT("GPA3 bits [11:8]" , isar2, 8, ...); + MERGE_FEATURE_EXT("APA3 bits [15:12]" , isar2, 12, ...); + */ + MERGE_FEATURE_EXT("MOPS bits [19:16]" , isar2, 16, Ext::kMOPS); + MERGE_FEATURE_EXT("BC bits [23:20]" , isar2, 20, Ext::kHBC); + /* + MERGE_FEATURE_EXT("PAC_frac bits [27:24]" , isar2, 24, ...); + */ + MERGE_FEATURE_EXT("CLRBHB bits [31:28]" , isar2, 28, Ext::kCLRBHB); + MERGE_FEATURE_EXT("SYSREG128 bits [35:32]" , isar2, 32, Ext::kSYSREG128); + MERGE_FEATURE_EXT("SYSINSTR128 bits [39:36]" , isar2, 36, Ext::kSYSINSTR128); + MERGE_FEATURE_EXT("PRFMSLC bits [43:40]" , isar2, 40, Ext::kPRFMSLC); + MERGE_FEATURE_EXT("RPRFM bits [51:48]" , isar2, 48, Ext::kRPRFM); + MERGE_FEATURE_EXT("CSSC bits [55:52]" , isar2, 52, Ext::kCSSC); +} + +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch64FeaturesViaCPUID_AA64MMFR0(CpuInfo& cpu, uint64_t mmfr0) noexcept { + // ID_AA64MMFR0_EL1 + // ================ + + /* + MERGE_FEATURE_EXT("PARange bits [3:0]" , mmfr0, 0, ...); + MERGE_FEATURE_EXT("ASIDBits bits [7:4]" , mmfr0, 4, ...); + MERGE_FEATURE_EXT("BigEnd bits [11:8]" , mmfr0, 8, ...); + MERGE_FEATURE_EXT("SNSMem bits [15:12]" , mmfr0, 12, ...); + MERGE_FEATURE_EXT("BigEndEL0 bits [19:16]" , mmfr0, 16, ...); + MERGE_FEATURE_EXT("TGran16 bits [23:20]" , mmfr0, 20, ...); + MERGE_FEATURE_EXT("TGran64 bits [27:24]" , mmfr0, 24, ...); + MERGE_FEATURE_EXT("TGran4 bits [31:28]" , mmfr0, 28, ...); + MERGE_FEATURE_EXT("TGran16_2 bits [35:32]" , mmfr0, 32, ...); + MERGE_FEATURE_EXT("TGran64_2 bits [39:36]" , mmfr0, 36, ...); + MERGE_FEATURE_EXT("TGran4_2 bits [43:40]" , mmfr0, 40, ...); + MERGE_FEATURE_EXT("ExS bits [47:44]" , mmfr0, 44, ...); + */ + MERGE_FEATURE_EXT("FGT bits [59:56]" , mmfr0, 56, Ext::kFGT, Ext::kFGT2); + MERGE_FEATURE_EXT("ECV bits [63:60]" , mmfr0, 60, Ext::kECV); +} + +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch64FeaturesViaCPUID_AA64MMFR1(CpuInfo& cpu, uint64_t mmfr1) noexcept { + // ID_AA64MMFR1_EL1 + // ================ + + /* + MERGE_FEATURE_EXT("HAFDBS bits [3:0]" , mmfr1, 0, ...); + MERGE_FEATURE_EXT("VMIDBits bits [7:4]" , mmfr1, 4, ...); + */ + MERGE_FEATURE_EXT("VH bits [11:8]" , mmfr1, 8, Ext::kVHE); + /* + MERGE_FEATURE_EXT("HPDS bits [15:12]" , mmfr1, 12, ...); + */ + MERGE_FEATURE_EXT("LO bits [19:16]" , mmfr1, 16, Ext::kLOR); + MERGE_FEATURE_EXT("PAN bits [23:20]" , mmfr1, 20, Ext::kPAN, Ext::kPAN2, Ext::kPAN3); + /* + MERGE_FEATURE_EXT("SpecSEI bits [27:24]" , mmfr1, 24, ...); + MERGE_FEATURE_EXT("XNX bits [31:28]" , mmfr1, 28, ...); + MERGE_FEATURE_EXT("TWED bits [35:32]" , mmfr1, 32, ...); + MERGE_FEATURE_EXT("ETS bits [39:36]" , mmfr1, 36, ...); + */ + MERGE_FEATURE_EXT("HCX bits [43:40]" , mmfr1, 40, Ext::kHCX); + MERGE_FEATURE_EXT("AFP bits [47:44]" , mmfr1, 44, Ext::kAFP); + /* + MERGE_FEATURE_EXT("nTLBPA bits [51:48]" , mmfr1, 48, ...); + MERGE_FEATURE_EXT("TIDCP1 bits [55:52]" , mmfr1, 52, ...); + MERGE_FEATURE_EXT("CMOW bits [59:56]" , mmfr1, 56, ...); + MERGE_FEATURE_EXT("ECBHB bits [63:60]" , mmfr1, 60, ...); + */ +} + +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch64FeaturesViaCPUID_AA64MMFR2(CpuInfo& cpu, uint64_t mmfr2) noexcept { + // ID_AA64MMFR2_EL1 + // ================ + + /* + MERGE_FEATURE_EXT("CnP bits [3:0]" , mmfr2, 0, ...); + */ + MERGE_FEATURE_EXT("UAO bits [7:4]" , mmfr2, 4, Ext::kUAO); + /* + MERGE_FEATURE_EXT("LSM bits [11:8]" , mmfr2, 8, ...); + MERGE_FEATURE_EXT("IESB bits [15:12]" , mmfr2, 12, ...); + MERGE_FEATURE_EXT("VARange bits [19:16]" , mmfr2, 16, ...); + */ + MERGE_FEATURE_EXT("CCIDX bits [23:20]" , mmfr2, 20, Ext::kCCIDX); + MERGE_FEATURE_EXT("NV bits [27:24]" , mmfr2, 24, Ext::kNV, Ext::kNV2); + /* + MERGE_FEATURE_EXT("ST bits [31:28]" , mmfr2, 28, ...); + */ + MERGE_FEATURE_EXT("AT bits [35:32]" , mmfr2, 32, Ext::kLSE2); + /* + MERGE_FEATURE_EXT("IDS bits [39:36]" , mmfr2, 36, ...); + MERGE_FEATURE_EXT("FWB bits [43:40]" , mmfr2, 40, ...); + MERGE_FEATURE_EXT("TTL bits [51:48]" , mmfr2, 48, ...); + MERGE_FEATURE_EXT("BBM bits [55:52]" , mmfr2, 52, ...); + MERGE_FEATURE_EXT("EVT bits [59:56]" , mmfr2, 56, ...); + MERGE_FEATURE_EXT("E0PD bits [63:60]" , mmfr2, 60, ...); + */ +} + +// Detects features based on the content of ID_AA64ZFR0_EL1 register. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch64FeaturesViaCPUID_AA64ZFR0(CpuInfo& cpu, uint64_t zfr0) noexcept { + MERGE_FEATURE_EXT("SVEver bits [3:0]" , zfr0, 0, Ext::kSVE2, Ext::kSVE2_1); + MERGE_FEATURE_EXT("AES bits [7:4]" , zfr0, 4, Ext::kSVE_AES, Ext::kSVE_PMULL128); + MERGE_FEATURE_EXT("BitPerm bits [19:16]" , zfr0, 16, Ext::kSVE_BITPERM); + MERGE_FEATURE_EXT("BF16 bits [23:20]" , zfr0, 20, Ext::kSVE_BF16, Ext::kSVE_EBF16); + MERGE_FEATURE_EXT("B16B16 bits [27:24]" , zfr0, 24, Ext::kSVE_B16B16); + MERGE_FEATURE_EXT("SHA3 bits [35:32]" , zfr0, 32, Ext::kSVE_SHA3); + MERGE_FEATURE_EXT("SM4 bits [43:40]" , zfr0, 40, Ext::kSVE_SM4); + MERGE_FEATURE_EXT("I8MM bits [47:44]" , zfr0, 44, Ext::kSVE_I8MM); + MERGE_FEATURE_EXT("F32MM bits [55:52]" , zfr0, 52, Ext::kSVE_F32MM); + MERGE_FEATURE_EXT("F64MM bits [59:56]" , zfr0, 56, Ext::kSVE_F64MM); +} + +#undef MERGE_FEATURE_EXT +#undef MERGE_FEATURE_N_A + +// CpuInfo - Detect - ARM - CPU Vendor Features +// ============================================ + +// CPU features detection based on Apple family ID. +enum class AppleFamilyId : uint32_t { + // Apple design. + kSWIFT = 0x1E2D6381u, // Apple A6/A6X (ARMv7s). + kCYCLONE = 0x37A09642u, // Apple A7 (ARMv8.0-A). + kTYPHOON = 0x2C91A47Eu, // Apple A8 (ARMv8.0-A). + kTWISTER = 0x92FB37C8u, // Apple A9 (ARMv8.0-A). + kHURRICANE = 0x67CEEE93u, // Apple A10 (ARMv8.1-A). + kMONSOON_MISTRAL = 0xE81E7EF6u, // Apple A11 (ARMv8.2-A). + kVORTEX_TEMPEST = 0x07D34B9Fu, // Apple A12 (ARMv8.3-A). + kLIGHTNING_THUNDER = 0x462504D2u, // Apple A13 (ARMv8.4-A). + kFIRESTORM_ICESTORM = 0x1B588BB3u, // Apple A14/M1 (ARMv8.5-A). + kAVALANCHE_BLIZZARD = 0XDA33D83Du, // Apple A15/M2. + kEVEREST_SAWTOOTH = 0X8765EDEAu // Apple A16. +}; + +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE bool detectARMFeaturesViaAppleFamilyId(CpuInfo& cpu) noexcept { + typedef AppleFamilyId Id; + CpuFeatures::ARM& features = cpu.features().arm(); + + switch (cpu.familyId()) { + // Apple A7-A9 (ARMv8.0-A). + case uint32_t(Id::kCYCLONE): + case uint32_t(Id::kTYPHOON): + case uint32_t(Id::kTWISTER): + populateARMv8AFeatures(features, 0); + features.add(Ext::kAES, Ext::kPMU, Ext::kPMULL, Ext::kSHA1, Ext::kSHA256); + return true; + + // Apple A10 (ARMv8.0-A). + case uint32_t(Id::kHURRICANE): + populateARMv8AFeatures(features, 0); + features.add(Ext::kAES, Ext::kCRC32, Ext::kLOR, Ext::kPAN, Ext::kPMU, Ext::kPMULL, Ext::kRDM, Ext::kSHA1, + Ext::kSHA256, Ext::kVHE); + return true; + + // Apple A11 (ARMv8.2-A). + case uint32_t(Id::kMONSOON_MISTRAL): + populateARMv8AFeatures(features, 2); + features.add(Ext::kAES, Ext::kFP16, Ext::kFP16CONV, Ext::kPMU, Ext::kPMULL, Ext::kSHA1, Ext::kSHA256); + return true; + + // Apple A12 (ARMv8.3-A). + case uint32_t(Id::kVORTEX_TEMPEST): + populateARMv8AFeatures(features, 3); + features.add(Ext::kAES, Ext::kFP16, Ext::kFP16CONV, Ext::kPMU, Ext::kPMULL, Ext::kSHA1, Ext::kSHA256); + return true; + + // Apple A13 (ARMv8.4-A). + case uint32_t(Id::kLIGHTNING_THUNDER): + populateARMv8AFeatures(features, 4); + features.add(Ext::kAES, Ext::kFHM, Ext::kFP16, Ext::kFP16CONV, Ext::kPMU, Ext::kPMULL, Ext::kSHA1, + Ext::kSHA256, Ext::kSHA3, Ext::kSHA512); + return true; + + // Apple A14/M1 (ARMv8.5-A). + case uint32_t(Id::kFIRESTORM_ICESTORM): + // Missing: CSV2, CSV3. + populateARMv8AFeatures(features, 4); + features.add(Ext::kAES, Ext::kDPB2, Ext::kECV, Ext::kFHM, Ext::kFLAGM2, Ext::kFP16, Ext::kFP16CONV, + Ext::kFRINTTS, Ext::kPMU, Ext::kPMULL, Ext::kSB, Ext::kSHA1, Ext::kSHA256, Ext::kSHA3, + Ext::kSHA512, Ext::kSSBS); + return true; + + // Apple A15/M2. + case uint32_t(Id::kAVALANCHE_BLIZZARD): + populateARMv8AFeatures(features, 6); + features.add(Ext::kAES, Ext::kFHM, Ext::kFP16, Ext::kFP16CONV, Ext::kPMU, Ext::kPMULL, Ext::kSHA1, + Ext::kSHA256, Ext::kSHA3, Ext::kSHA512); + return true; + + // Apple A16. + case uint32_t(Id::kEVEREST_SAWTOOTH): + populateARMv8AFeatures(features, 6); + features.add(Ext::kAES, Ext::kFHM, Ext::kFP16, Ext::kFP16CONV, Ext::kHCX, Ext::kPMU, Ext::kPMULL, + Ext::kSHA1, Ext::kSHA256, Ext::kSHA3, Ext::kSHA512); + return true; + + default: + return false; + } +} + +// CpuInfo - Detect - ARM - Compile Flags Features +// =============================================== + // Detects ARM version by macros defined at compile time. This means that AsmJit will report features forced at // compile time that should always be provided by the target CPU. This also means that if we don't provide any // means to detect CPU features the features reported by AsmJit will at least not report less features than the // target it was compiled to. -ASMJIT_MAYBE_UNUSED -static ASMJIT_FAVOR_SIZE void detectARMFeaturesViaCompilerFlags(CpuInfo& cpu) noexcept { - DebugUtils::unused(cpu); #if ASMJIT_ARCH_ARM == 32 +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch32FeaturesViaCompilerFlags(CpuInfo& cpu) noexcept { + DebugUtils::unused(cpu); // ARM targets have no baseline at the moment. -# if defined(__ARM_ARCH_7A__) +#if defined(__ARM_ARCH_7A__) cpu.addFeature(CpuFeatures::ARM::kARMv7); -# endif -# if defined(__ARM_ARCH_8A__) +#endif + +#if defined(__ARM_ARCH_8A__) cpu.addFeature(CpuFeatures::ARM::kARMv8a); -# endif +#endif -# if defined(__TARGET_ARCH_THUMB) +#if defined(__TARGET_ARCH_THUMB) cpu.addFeature(CpuFeatures::ARM::kTHUMB); -# if __TARGET_ARCH_THUMB >= 4 +#if __TARGET_ARCH_THUMB >= 4 cpu.addFeature(CpuFeatures::ARM::kTHUMBv2); -# endif -# endif - -# if defined(__ARM_FEATURE_FMA) - cpu.addFeature(CpuFeatures::ARM::kVFPv3); - cpu.addFeature(CpuFeatures::ARM::kVFPv4); -# endif - -# if defined(__ARM_NEON) - cpu.addFeature(CpuFeatures::ARM::kASIMD); -# endif - -# if defined(__ARM_FEATURE_IDIV) && defined(__TARGET_ARCH_THUMB) - cpu.addFeature(CpuFeatures::ARM::kIDIVT); #endif -# if defined(__ARM_FEATURE_IDIV) && !defined(__TARGET_ARCH_THUMB) - cpu.addFeature(CpuFeatures::ARM::kIDIVA); -# endif - #endif -#if defined(__ARM_ARCH_8_1A__) - cpu.addFeature(CpuFeatures::ARM::kARMv8_1a); +#if defined(__ARM_FEATURE_FMA) + cpu.addFeature(Ext::kFP); #endif -#if defined(__ARM_ARCH_8_2A__) - cpu.addFeature(CpuFeatures::ARM::kARMv8_2a); + +#if defined(__ARM_NEON) + cpu.addFeature(Ext::kASIMD); #endif -#if defined(__ARM_ARCH_8_3A__) - cpu.addFeature(CpuFeatures::ARM::kARMv8_3a); + +#if defined(__ARM_FEATURE_IDIV) && defined(__TARGET_ARCH_THUMB) + cpu.addFeature(Ext::kIDIVT); #endif -#if defined(__ARM_ARCH_8_4A__) - cpu.addFeature(CpuFeatures::ARM::kARMv8_4a); +#if defined(__ARM_FEATURE_IDIV) && !defined(__TARGET_ARCH_THUMB) + cpu.addFeature(Ext::kIDIVA); #endif -#if defined(__ARM_ARCH_8_5A__) - cpu.addFeature(CpuFeatures::ARM::kARMv8_5a); -#endif -#if defined(__ARM_ARCH_8_6A__) - cpu.addFeature(CpuFeatures::ARM::kARMv8_6a); -#endif -#if defined(__ARM_ARCH_8_7A__) - cpu.addFeature(CpuFeatures::ARM::kARMv8_7a); +} +#endif // ASMJIT_ARCH_ARM == 32 + +#if ASMJIT_ARCH_ARM == 64 +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch64FeaturesViaCompilerFlags(CpuInfo& cpu) noexcept { + DebugUtils::unused(cpu); + +#if defined(__ARM_ARCH_9_5A__) + populateARMv9AFeatures(cpu.features().arm(), 5); +#elif defined(__ARM_ARCH_9_4A__) + populateARMv9AFeatures(cpu.features().arm(), 4); +#elif defined(__ARM_ARCH_9_3A__) + populateARMv9AFeatures(cpu.features().arm(), 3); +#elif defined(__ARM_ARCH_9_2A__) + populateARMv9AFeatures(cpu.features().arm(), 2); +#elif defined(__ARM_ARCH_9_1A__) + populateARMv9AFeatures(cpu.features().arm(), 1); +#elif defined(__ARM_ARCH_9A__) + populateARMv9AFeatures(cpu.features().arm(), 0); +#elif defined(__ARM_ARCH_8_9A__) + populateARMv8AFeatures(cpu.features().arm(), 9); +#elif defined(__ARM_ARCH_8_8A__) + populateARMv8AFeatures(cpu.features().arm(), 8); +#elif defined(__ARM_ARCH_8_7A__) + populateARMv8AFeatures(cpu.features().arm(), 7); +#elif defined(__ARM_ARCH_8_6A__) + populateARMv8AFeatures(cpu.features().arm(), 6); +#elif defined(__ARM_ARCH_8_5A__) + populateARMv8AFeatures(cpu.features().arm(), 5); +#elif defined(__ARM_ARCH_8_4A__) + populateARMv8AFeatures(cpu.features().arm(), 4); +#elif defined(__ARM_ARCH_8_3A__) + populateARMv8AFeatures(cpu.features().arm(), 3); +#elif defined(__ARM_ARCH_8_2A__) + populateARMv8AFeatures(cpu.features().arm(), 2); +#elif defined(__ARM_ARCH_8_1A__) + populateARMv8AFeatures(cpu.features().arm(), 1); +#else + populateARMv8AFeatures(cpu.features().arm(), 0); #endif #if defined(__ARM_FEATURE_AES) - cpu.addFeature(CpuFeatures::ARM::kAES); + cpu.addFeature(Ext::kAES); #endif #if defined(__ARM_FEATURE_BF16_SCALAR_ARITHMETIC) && defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC) - cpu.addFeature(CpuFeatures::ARM::kBF16); + cpu.addFeature(Ext::kBF16); #endif #if defined(__ARM_FEATURE_CRC32) - cpu.addFeature(CpuFeatures::ARM::kCRC32); + cpu.addFeature(Ext::kCRC32); #endif #if defined(__ARM_FEATURE_CRYPTO) - cpu.addFeature(CpuFeatures::ARM::kAES, - CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2); + cpu.addFeature(Ext::kAES, Ext::kSHA1, Ext::kSHA256); #endif #if defined(__ARM_FEATURE_DOTPROD) - cpu.addFeature(CpuFeatures::ARM::kDOTPROD); + cpu.addFeature(Ext::kDOTPROD); #endif #if defined(__ARM_FEATURE_FP16FML) || defined(__ARM_FEATURE_FP16_FML) - cpu.addFeature(CpuFeatures::ARM::kFP16FML); + cpu.addFeature(Ext::kFHM); #endif #if defined(__ARM_FEATURE_FP16_SCALAR_ARITHMETIC) - cpu.addFeature(CpuFeatures::ARM::kFP16FULL); + cpu.addFeature(Ext::kFP16); #endif #if defined(__ARM_FEATURE_FRINT) - cpu.addFeature(CpuFeatures::ARM::kFRINT); + cpu.addFeature(Ext::kFRINTTS); #endif #if defined(__ARM_FEATURE_JCVT) - cpu.addFeature(CpuFeatures::ARM::kFJCVTZS); + cpu.addFeature(Ext::kJSCVT); #endif #if defined(__ARM_FEATURE_MATMUL_INT8) - cpu.addFeature(CpuFeatures::ARM::kI8MM); + cpu.addFeature(Ext::kI8MM); #endif #if defined(__ARM_FEATURE_ATOMICS) - cpu.addFeature(CpuFeatures::ARM::kLSE); + cpu.addFeature(Ext::kLSE); #endif #if defined(__ARM_FEATURE_MEMORY_TAGGING) - cpu.addFeature(CpuFeatures::ARM::kMTE); + cpu.addFeature(Ext::kMTE); #endif #if defined(__ARM_FEATURE_QRDMX) - cpu.addFeature(CpuFeatures::ARM::kRDM); + cpu.addFeature(Ext::kRDM); #endif #if defined(__ARM_FEATURE_RNG) - cpu.addFeature(CpuFeatures::ARM::kRNG); + cpu.addFeature(Ext::kRNG); #endif #if defined(__ARM_FEATURE_SHA2) - cpu.addFeature(CpuFeatures::ARM::kSHA2); + cpu.addFeature(Ext::kSHA256); #endif #if defined(__ARM_FEATURE_SHA3) - cpu.addFeature(CpuFeatures::ARM::kSHA3); + cpu.addFeature(Ext::kSHA3); #endif #if defined(__ARM_FEATURE_SHA512) - cpu.addFeature(CpuFeatures::ARM::kSHA512); + cpu.addFeature(Ext::kSHA512); #endif #if defined(__ARM_FEATURE_SM3) - cpu.addFeature(CpuFeatures::ARM::kSM3); + cpu.addFeature(Ext::kSM3); #endif #if defined(__ARM_FEATURE_SM4) - cpu.addFeature(CpuFeatures::ARM::kSM4); + cpu.addFeature(Ext::kSM4); #endif #if defined(__ARM_FEATURE_SVE) || defined(__ARM_FEATURE_SVE_VECTOR_OPERATORS) - cpu.addFeature(CpuFeatures::ARM::kSVE); + cpu.addFeature(Ext::kSVE); #endif #if defined(__ARM_FEATURE_SVE_MATMUL_INT8) - cpu.addFeature(CpuFeatures::ARM::kSVE_I8MM); + cpu.addFeature(Ext::kSVE_I8MM); #endif #if defined(__ARM_FEATURE_SVE_MATMUL_FP32) - cpu.addFeature(CpuFeatures::ARM::kSVE_F32MM); + cpu.addFeature(Ext::kSVE_F32MM); #endif #if defined(__ARM_FEATURE_SVE_MATMUL_FP64) - cpu.addFeature(CpuFeatures::ARM::kSVE_F64MM); + cpu.addFeature(Ext::kSVE_F64MM); #endif #if defined(__ARM_FEATURE_SVE2) - cpu.addFeature(CpuFeatures::ARM::kSVE2); + cpu.addFeature(Ext::kSVE2); #endif #if defined(__ARM_FEATURE_SVE2_AES) - cpu.addFeature(CpuFeatures::ARM::kSVE2_AES); + cpu.addFeature(Ext::kSVE_AES); #endif #if defined(__ARM_FEATURE_SVE2_BITPERM) - cpu.addFeature(CpuFeatures::ARM::kSVE2_BITPERM); + cpu.addFeature(Ext::kSVE_BITPERM); #endif #if defined(__ARM_FEATURE_SVE2_SHA3) - cpu.addFeature(CpuFeatures::ARM::kSVE2_SHA3); + cpu.addFeature(Ext::kSVE_SHA3); #endif #if defined(__ARM_FEATURE_SVE2_SM4) - cpu.addFeature(CpuFeatures::ARM::kSVE2_SM4); + cpu.addFeature(Ext::kSVE_SM4); #endif #if defined(__ARM_FEATURE_TME) - cpu.addFeature(CpuFeatures::ARM::kTME); + cpu.addFeature(Ext::kTME); #endif } +#endif // ASMJIT_ARCH_ARM == 64 + +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectARMFeaturesViaCompilerFlags(CpuInfo& cpu) noexcept { +#if ASMJIT_ARCH_ARM == 32 + detectAArch32FeaturesViaCompilerFlags(cpu); +#else + detectAArch64FeaturesViaCompilerFlags(cpu); +#endif // ASMJIT_ARCH_ARM +} + +// CpuInfo - Detect - ARM - Post Processing ARM Features +// ===================================================== + +// Postprocesses AArch32 features. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void postProcessAArch32Features(CpuFeatures::ARM& features) noexcept { + DebugUtils::unused(features); +} + +// Postprocesses AArch64 features. +// +// The only reason to use this function is to deduce some flags from others. +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void postProcessAArch64Features(CpuFeatures::ARM& features) noexcept { + if (features.hasFP16()) + features.add(Ext::kFP16CONV); + + if (features.hasMTE3()) + features.add(Ext::kMTE2); + + if (features.hasMTE2()) + features.add(Ext::kMTE); + + if (features.hasSSBS2()) + features.add(Ext::kSSBS); +} ASMJIT_MAYBE_UNUSED -static ASMJIT_FAVOR_SIZE void expandARMFeaturesByVersion(CpuInfo& cpu) noexcept { - CpuFeatures::ARM& features = cpu.features().arm(); - - if (features.hasARMv8_7a()) { - features.add(CpuFeatures::ARM::kARMv8_6a); - } - - if (features.hasARMv8_6a()) { - features.add(CpuFeatures::ARM::kARMv8_5a, - CpuFeatures::ARM::kBF16); - - if (features.hasSVE()) - features.add(CpuFeatures::ARM::kSVE_I8MM); - } - - if (features.hasARMv8_5a()) { - features.add(CpuFeatures::ARM::kARMv8_4a, - CpuFeatures::ARM::kALTNZCV, - CpuFeatures::ARM::kBTI, - CpuFeatures::ARM::kFRINT, - CpuFeatures::ARM::kSB, - CpuFeatures::ARM::kSSBS); - } - - if (features.hasARMv8_4a()) { - features.add(CpuFeatures::ARM::kARMv8_3a, - CpuFeatures::ARM::kDIT, - CpuFeatures::ARM::kDOTPROD, - CpuFeatures::ARM::kFLAGM, - CpuFeatures::ARM::kPMU, - CpuFeatures::ARM::kRCPC_IMMO); - } - - if (features.hasARMv8_3a()) { - features.add(CpuFeatures::ARM::kARMv8_2a, - CpuFeatures::ARM::kFCMA, - CpuFeatures::ARM::kFJCVTZS); - } - - if (features.hasARMv8_2a()) { - features.add(CpuFeatures::ARM::kARMv8_1a); - } - - if (features.hasARMv8_1a()) { - features.add(CpuFeatures::ARM::kARMv8a, - CpuFeatures::ARM::kCRC32, - CpuFeatures::ARM::kLSE, - CpuFeatures::ARM::kRDM); - } - - if (features.hasARMv8a()) { - features.add(CpuFeatures::ARM::kARMv7, - CpuFeatures::ARM::kVFPv2, - CpuFeatures::ARM::kVFPv3, - CpuFeatures::ARM::kVFPv4, - CpuFeatures::ARM::kVFP_D32, - CpuFeatures::ARM::kASIMD, - CpuFeatures::ARM::kIDIVA); - } +static ASMJIT_FAVOR_SIZE void postProcessARMCpuInfo(CpuInfo& cpu) noexcept { +#if ASMJIT_ARCH_ARM == 32 + postProcessAArch32Features(cpu.features().arm()); +#else + postProcessAArch64Features(cpu.features().arm()); +#endif // ASMJIT_ARCH_ARM } -// CpuInfo - Detect - ARM [Windows] -// ================================ +// CpuInfo - Detect - ARM - Detect by Reading CPUID Registers +// ========================================================== + +// Support CPUID-based detection on AArch64. +#if defined(ASMJIT_ARM_DETECT_VIA_CPUID) + +// Since the register ID is encoded with the instruction we have to create a function for each register ID to read. +#define ASMJIT_AARCH64_DEFINE_CPUID_READ_FN(func, regId) \ +ASMJIT_MAYBE_UNUSED \ +static inline uint64_t func() noexcept { \ + uint64_t output; \ + __asm__ __volatile__("mrs %0, " #regId : "=r"(output)); \ + return output; \ +} + +// NOTE: Older tools don't know the IDs. For example Ubuntu on RPI (GCC 9) won't compile ID_AA64ISAR2_EL1 in 2023. +ASMJIT_AARCH64_DEFINE_CPUID_READ_FN(aarch64ReadPFR0, ID_AA64PFR0_EL1) +ASMJIT_AARCH64_DEFINE_CPUID_READ_FN(aarch64ReadPFR1, ID_AA64PFR1_EL1) +ASMJIT_AARCH64_DEFINE_CPUID_READ_FN(aarch64ReadISAR0, ID_AA64ISAR0_EL1) +ASMJIT_AARCH64_DEFINE_CPUID_READ_FN(aarch64ReadISAR1, ID_AA64ISAR1_EL1) +ASMJIT_AARCH64_DEFINE_CPUID_READ_FN(aarch64ReadISAR2, S3_0_C0_C6_2) // ID_AA64ISAR2_EL1 +ASMJIT_AARCH64_DEFINE_CPUID_READ_FN(aarch64ReadZFR0, S3_0_C0_C4_4) // ID_AA64ZFR0_EL1 + +#undef ASMJIT_AARCH64_DEFINE_CPUID_READ_FN + +// Detects AArch64 features by reading CPUID bits directly from CPUID registers. This is the most reliable method +// as the OS doesn't have to know all supported extensions this way (if there is something missing in HWCAPS then +// there is no way to detect such feature without reading CPUID bits). +// +// This function uses MSR instructions, which means that it reads registers that cannot be read in user-mode. The +// OS typically implements this feature by handling SIGILL internally and providing a filtered content of these +// registers back to the user - at least this is what Linux documentation states - everything implementation +// dependent is zeroed, only the bits that are used for CPU feature identification would be present. +// +// References: +// - https://docs.kernel.org/arm64/cpu-feature-registers.html +ASMJIT_MAYBE_UNUSED +static ASMJIT_FAVOR_SIZE void detectAArch64FeaturesViaCPUID(CpuInfo& cpu) noexcept { + populateBaseARMFeatures(cpu); + + detectAArch64FeaturesViaCPUID_AA64PFR0_AA64PFR1(cpu, + aarch64ReadPFR0(), + aarch64ReadPFR1()); + + detectAArch64FeaturesViaCPUID_AA64ISAR0_AA64ISAR1(cpu, + aarch64ReadISAR0(), + aarch64ReadISAR1()); + + // TODO: Fix this on FreeBSD - I don't know what kernel version allows to access the registers below... + +#if defined(__linux__) + UNameKernelVersion kVer = getUNameKernelVersion(); + + // Introduced in Linux 4.19 by "arm64: add ID_AA64ISAR2_EL1 sys register"), so we want at least 4.20. + if (kVer.atLeast(4, 20)) { + detectAArch64FeaturesViaCPUID_AA64ISAR2(cpu, aarch64ReadISAR2()); + } + + // Introduced in Linux 5.10 by "arm64: Expose SVE2 features for userspace", so we want at least 5.11. + if (kVer.atLeast(5, 11) && cpu.features().arm().hasAny(Ext::kSVE, Ext::kSME)) { + // Only read CPU_ID_AA64ZFR0 when either SVE or SME is available. + detectAArch64FeaturesViaCPUID_AA64ZFR0(cpu, aarch64ReadZFR0()); + } +#endif +} + +#endif // ASMJIT_ARM_DETECT_VIA_CPUID + +// CpuInfo - Detect - ARM - Detect by Windows API +// ============================================== #if defined(_WIN32) struct WinPFPMapping { @@ -772,9 +1433,11 @@ struct WinPFPMapping { }; static ASMJIT_FAVOR_SIZE void detectPFPFeatures(CpuInfo& cpu, const WinPFPMapping* mapping, size_t size) noexcept { - for (size_t i = 0; i < size; i++) - if (::IsProcessorFeaturePresent(mapping[i].pfpFeatureId)) + for (size_t i = 0; i < size; i++) { + if (::IsProcessorFeaturePresent(mapping[i].pfpFeatureId)) { cpu.addFeature(mapping[i].featureId); + } + } } //! Detect ARM CPU features on Windows. @@ -786,369 +1449,454 @@ static ASMJIT_FAVOR_SIZE void detectARMCpu(CpuInfo& cpu) noexcept { CpuFeatures::ARM& features = cpu.features().arm(); - // Win32 for ARM requires ARMv7 with DSP extensions, VFPv3, and uses THUMBv2 by default. + // Win32 for ARM requires ARMv7 with DSP extensions, VFPv3 (FP), and uses THUMBv2 by default. #if ASMJIT_ARCH_ARM == 32 - features.add(CpuFeatures::ARM::kTHUMB); - features.add(CpuFeatures::ARM::kTHUMBv2); - features.add(CpuFeatures::ARM::kARMv6); - features.add(CpuFeatures::ARM::kARMv7); - features.add(CpuFeatures::ARM::kEDSP); - features.add(CpuFeatures::ARM::kVFPv2); - features.add(CpuFeatures::ARM::kVFPv3); + features.add(Ext::kTHUMB); + features.add(Ext::kTHUMBv2); + features.add(Ext::kARMv6); + features.add(Ext::kARMv7); + features.add(Ext::kEDSP); #endif - // Windows for ARM requires ASIMD. - features.add(CpuFeatures::ARM::kASIMD); + // Windows for ARM requires FP and ASIMD. + features.add(Ext::kFP); + features.add(Ext::kASIMD); // Detect additional CPU features by calling `IsProcessorFeaturePresent()`. static const WinPFPMapping mapping[] = { #if ASMJIT_ARCH_ARM == 32 - { uint8_t(CpuFeatures::ARM::kVFP_D32) , 18 }, // PF_ARM_VFP_32_REGISTERS_AVAILABLE - { uint8_t(CpuFeatures::ARM::kIDIVT) , 24 }, // PF_ARM_DIVIDE_INSTRUCTION_AVAILABLE - { uint8_t(CpuFeatures::ARM::kVFPv4) , 27 }, // PF_ARM_FMAC_INSTRUCTIONS_AVAILABLE - { uint8_t(CpuFeatures::ARM::kARMv8a) , 29 }, // PF_ARM_V8_INSTRUCTIONS_AVAILABLE + { uint8_t(Ext::kVFP_D32) , 18 }, // PF_ARM_VFP_32_REGISTERS_AVAILABLE + { uint8_t(Ext::kIDIVT) , 24 }, // PF_ARM_DIVIDE_INSTRUCTION_AVAILABLE + { uint8_t(Ext::kFMAC) , 27 }, // PF_ARM_FMAC_INSTRUCTIONS_AVAILABLE + { uint8_t(Ext::kARMv8a) , 29 }, // PF_ARM_V8_INSTRUCTIONS_AVAILABLE #endif - { uint8_t(CpuFeatures::ARM::kAES) , 30 }, // PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE - { uint8_t(CpuFeatures::ARM::kCRC32) , 31 }, // PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE - { uint8_t(CpuFeatures::ARM::kLSE) , 34 } // PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE - + { uint8_t(Ext::kAES) , 30 }, // PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE + { uint8_t(Ext::kCRC32) , 31 }, // PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE + { uint8_t(Ext::kLSE) , 34 }, // PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE + { uint8_t(Ext::kDOTPROD) , 43 }, // PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE + { uint8_t(Ext::kJSCVT) , 44 }, // PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE + { uint8_t(Ext::kLRCPC) , 45 } // PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE }; detectPFPFeatures(cpu, mapping, ASMJIT_ARRAY_SIZE(mapping)); - // Windows provides several instructions under a single flag: - if (features.hasAES()) { - features.add(CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2); + // Windows can only report ARMv8A at the moment. + if (features.hasARMv8a()) { + populateARMv8AFeatures(cpu.features().arm(), 0); } - expandARMFeaturesByVersion(cpu); + // Windows provides several instructions under a single flag: + if (features.hasAES()) { + features.add(Ext::kPMULL, Ext::kSHA1, Ext::kSHA256); + } + + postProcessARMCpuInfo(cpu); } -// CpuInfo - Detect - ARM [Linux] -// ============================== +// CpuInfo - Detect - ARM - Detect by Reading HWCAPS +// ================================================= -#elif defined(__linux__) +#elif defined(ASMJIT_ARM_DETECT_VIA_HWCAPS) -struct LinuxHWCapMapping { +#ifndef AT_HWCAP + #define AT_HWCAP 16 +#endif // AT_HWCAP + +#ifndef AT_HWCAP2 + #define AT_HWCAP2 26 +#endif // !AT_HWCAP2 + +#if defined(__linux__) +static void getAuxValues(unsigned long* vals, const unsigned long* tags, size_t count) noexcept { + for (size_t i = 0; i < count; i++) { + vals[i] = getauxval(tags[i]); + } +} +#elif defined(__FreeBSD__) +static void getAuxValues(unsigned long* vals, const unsigned long* tags, size_t count) noexcept { + for (size_t i = 0; i < count; i++) { + unsigned long result = 0; + if (elf_aux_info(int(tags[i]), &result, int(sizeof(unsigned long))) != 0) + result = 0; + vals[i] = result; + } +} +#else +#error "[asmjit] getAuxValues() - Unsupported OS." +#endif + +struct HWCapMapping { uint8_t featureId; uint8_t hwCapBit; }; -static ASMJIT_FAVOR_SIZE void detectHWCaps(CpuInfo& cpu, unsigned long type, const LinuxHWCapMapping* mapping, size_t size) noexcept { - unsigned long mask = getauxval(type); - for (size_t i = 0; i < size; i++) +static const unsigned long hwCapTags[2] = { AT_HWCAP, AT_HWCAP2 }; + +static ASMJIT_FAVOR_SIZE void mergeHWCaps(CpuInfo& cpu, unsigned long mask, const HWCapMapping* mapping, size_t size) noexcept { + for (size_t i = 0; i < size; i++) { cpu.features().addIf(Support::bitTest(mask, mapping[i].hwCapBit), mapping[i].featureId); + } } #if ASMJIT_ARCH_ARM == 32 -// `AT_HWCAP` provides ARMv7 (and less) related flags. -static const LinuxHWCapMapping hwCapMapping[] = { - { uint8_t(CpuFeatures::ARM::kVFPv2) , 6 }, // HWCAP_VFP - { uint8_t(CpuFeatures::ARM::kEDSP) , 7 }, // HWCAP_EDSP - { uint8_t(CpuFeatures::ARM::kASIMD) , 12 }, // HWCAP_NEON - { uint8_t(CpuFeatures::ARM::kVFPv3) , 13 }, // HWCAP_VFPv3 - { uint8_t(CpuFeatures::ARM::kVFPv4) , 16 }, // HWCAP_VFPv4 - { uint8_t(CpuFeatures::ARM::kIDIVA) , 17 }, // HWCAP_IDIVA - { uint8_t(CpuFeatures::ARM::kIDIVT) , 18 }, // HWCAP_IDIVT - { uint8_t(CpuFeatures::ARM::kVFP_D32) , 19 } // HWCAP_VFPD32 +// Reference: +// - https://github.com/torvalds/linux/blob/master/arch/arm/include/uapi/asm/hwcap.h +static const HWCapMapping hwCapMapping[] = { + { uint8_t(Ext::kEDSP) , 7 }, // HWCAP_EDSP + { uint8_t(Ext::kASIMD) , 12 }, // HWCAP_NEON + { uint8_t(Ext::kFP) , 13 }, // HWCAP_VFPv3 + { uint8_t(Ext::kFMAC) , 16 }, // HWCAP_VFPv4 + { uint8_t(Ext::kIDIVA) , 17 }, // HWCAP_IDIVA + { uint8_t(Ext::kIDIVT) , 18 }, // HWCAP_IDIVT + { uint8_t(Ext::kVFP_D32) , 19 }, // HWCAP_VFPD32 + { uint8_t(Ext::kFP16CONV) , 22 }, // HWCAP_FPHP + { uint8_t(Ext::kFP16) , 23 }, // HWCAP_ASIMDHP + { uint8_t(Ext::kDOTPROD) , 24 }, // HWCAP_ASIMDDP + { uint8_t(Ext::kFHM) , 25 }, // HWCAP_ASIMDFHM + { uint8_t(Ext::kBF16) , 26 }, // HWCAP_ASIMDBF16 + { uint8_t(Ext::kI8MM) , 27 } // HWCAP_I8MM }; -// `AT_HWCAP2` provides ARMv8+ related flags. -static const LinuxHWCapMapping hwCap2Mapping[] = { - { uint8_t(CpuFeatures::ARM::kAES) , 0 }, // HWCAP2_AES - { uint8_t(CpuFeatures::ARM::kPMULL) , 1 }, // HWCAP2_PMULL - { uint8_t(CpuFeatures::ARM::kSHA1) , 2 }, // HWCAP2_SHA1 - { uint8_t(CpuFeatures::ARM::kSHA2) , 3 }, // HWCAP2_SHA2 - { uint8_t(CpuFeatures::ARM::kCRC32) , 4 } // HWCAP2_CRC32 +static const HWCapMapping hwCap2Mapping[] = { + { uint8_t(Ext::kAES) , 0 }, // HWCAP2_AES + { uint8_t(Ext::kPMULL) , 1 }, // HWCAP2_PMULL + { uint8_t(Ext::kSHA1) , 2 }, // HWCAP2_SHA1 + { uint8_t(Ext::kSHA256) , 3 }, // HWCAP2_SHA2 + { uint8_t(Ext::kCRC32) , 4 }, // HWCAP2_CRC32 + { uint8_t(Ext::kSB) , 5 }, // HWCAP2_SB + { uint8_t(Ext::kSSBS) , 6 } // HWCAP2_SSBS }; static ASMJIT_FAVOR_SIZE void detectARMCpu(CpuInfo& cpu) noexcept { cpu._wasDetected = true; - populateBaseARMFeatures(cpu); + unsigned long hwCapMasks[2] {}; + getAuxValues(hwCapMasks, hwCapTags, 2u); + + mergeHWCaps(cpu, hwCapMasks[0], hwCapMapping, ASMJIT_ARRAY_SIZE(hwCapMapping)); + mergeHWCaps(cpu, hwCap2Masks[0], hwCap2Mapping, ASMJIT_ARRAY_SIZE(hwCap2Mapping)); + CpuFeatures::ARM& features = cpu.features().arm(); - detectHWCaps(cpu, AT_HWCAP, hwCapMapping, ASMJIT_ARRAY_SIZE(hwCapMapping)); - detectHWCaps(cpu, AT_HWCAP2, hwCap2Mapping, ASMJIT_ARRAY_SIZE(hwCap2Mapping)); - - // VFPv3 implies VFPv2. - if (features.hasVFPv3()) - features.add(CpuFeatures::ARM::kVFPv2); - - // VFPv2 implies ARMv6. - if (features.hasVFPv2()) - features.add(CpuFeatures::ARM::kARMv6); - - // ARMv7 provides VFPv3|ASIMD. - if (features.hasVFPv3() || features.hasASIMD()) + // ARMv7 provides FP|ASIMD. + if (features.hasFP() || features.hasASIMD()) features.add(CpuFeatures::ARM::kARMv7); - // ARMv8 provives AES, CRC32, PMULL, SHA1, and SHA2. - if (features.hasAES() || features.hasCRC32() || features.hasPMULL() || features.hasSHA1() || features.hasSHA2()) + // ARMv8 provives AES, CRC32, PMULL, SHA1, and SHA256. + if (features.hasAES() || features.hasCRC32() || features.hasPMULL() || features.hasSHA1() || features.hasSHA256()) features.add(CpuFeatures::ARM::kARMv8a); + + postProcessARMCpuInfo(cpu); } #else -// `AT_HWCAP` provides ARMv8+ related flags. -static const LinuxHWCapMapping hwCapMapping[] = { +// Reference: +// - https://docs.kernel.org/arm64/elf_hwcaps.html +// - https://github.com/torvalds/linux/blob/master/arch/arm64/include/uapi/asm/hwcap.h +static const HWCapMapping hwCapMapping[] = { + { uint8_t(Ext::kFP) , 0 }, // HWCAP_FP + { uint8_t(Ext::kASIMD) , 1 }, // HWCAP_ASIMD /* - { uint8_t(CpuFeatures::ARM::k) , 0 }, // HWCAP_FP + { uint8_t(Ext::k) , 2 }, // HWCAP_EVTSTRM */ - { uint8_t(CpuFeatures::ARM::kASIMD) , 1 }, // HWCAP_ASIMD + { uint8_t(Ext::kAES) , 3 }, // HWCAP_AES + { uint8_t(Ext::kPMULL) , 4 }, // HWCAP_PMULL + { uint8_t(Ext::kSHA1) , 5 }, // HWCAP_SHA1 + { uint8_t(Ext::kSHA256) , 6 }, // HWCAP_SHA2 + { uint8_t(Ext::kCRC32) , 7 }, // HWCAP_CRC32 + { uint8_t(Ext::kLSE) , 8 }, // HWCAP_ATOMICS + { uint8_t(Ext::kFP16CONV) , 9 }, // HWCAP_FPHP + { uint8_t(Ext::kFP16) , 10 }, // HWCAP_ASIMDHP + { uint8_t(Ext::kCPUID) , 11 }, // HWCAP_CPUID + { uint8_t(Ext::kRDM) , 12 }, // HWCAP_ASIMDRDM + { uint8_t(Ext::kJSCVT) , 13 }, // HWCAP_JSCVT + { uint8_t(Ext::kFCMA) , 14 }, // HWCAP_FCMA + { uint8_t(Ext::kLRCPC) , 15 }, // HWCAP_LRCPC + { uint8_t(Ext::kDPB) , 16 }, // HWCAP_DCPOP + { uint8_t(Ext::kSHA3) , 17 }, // HWCAP_SHA3 + { uint8_t(Ext::kSM3) , 18 }, // HWCAP_SM3 + { uint8_t(Ext::kSM4) , 19 }, // HWCAP_SM4 + { uint8_t(Ext::kDOTPROD) , 20 }, // HWCAP_ASIMDDP + { uint8_t(Ext::kSHA512) , 21 }, // HWCAP_SHA512 + { uint8_t(Ext::kSVE) , 22 }, // HWCAP_SVE + { uint8_t(Ext::kFHM) , 23 }, // HWCAP_ASIMDFHM + { uint8_t(Ext::kDIT) , 24 }, // HWCAP_DIT + { uint8_t(Ext::kLSE2) , 25 }, // HWCAP_USCAT + { uint8_t(Ext::kLRCPC2) , 26 }, // HWCAP_ILRCPC + { uint8_t(Ext::kFLAGM) , 27 }, // HWCAP_FLAGM + { uint8_t(Ext::kSSBS) , 28 }, // HWCAP_SSBS + { uint8_t(Ext::kSB) , 29 } // HWCAP_SB /* - { uint8_t(CpuFeatures::ARM::k) , 2 }, // HWCAP_EVTSTRM - */ - { uint8_t(CpuFeatures::ARM::kAES) , 3 }, // HWCAP_AES - { uint8_t(CpuFeatures::ARM::kPMULL) , 4 }, // HWCAP_PMULL - { uint8_t(CpuFeatures::ARM::kSHA1) , 5 }, // HWCAP_SHA1 - { uint8_t(CpuFeatures::ARM::kSHA2) , 6 }, // HWCAP_SHA2 - { uint8_t(CpuFeatures::ARM::kCRC32) , 7 }, // HWCAP_CRC32 - { uint8_t(CpuFeatures::ARM::kLSE) , 8 }, // HWCAP_ATOMICS - { uint8_t(CpuFeatures::ARM::kFP16CONV) , 9 }, // HWCAP_FPHP - { uint8_t(CpuFeatures::ARM::kFP16FULL) , 10 }, // HWCAP_ASIMDHP - { uint8_t(CpuFeatures::ARM::kCPUID) , 11 }, // HWCAP_CPUID - { uint8_t(CpuFeatures::ARM::kRDM) , 12 }, // HWCAP_ASIMDRDM - { uint8_t(CpuFeatures::ARM::kFJCVTZS) , 13 }, // HWCAP_JSCVT - { uint8_t(CpuFeatures::ARM::kFCMA) , 14 }, // HWCAP_FCMA - /* - { uint8_t(CpuFeatures::ARM::k) , 15 }, // HWCAP_LRCPC - { uint8_t(CpuFeatures::ARM::k) , 16 }, // HWCAP_DCPOP - */ - { uint8_t(CpuFeatures::ARM::kSHA3) , 17 }, // HWCAP_SHA3 - { uint8_t(CpuFeatures::ARM::kSM3) , 18 }, // HWCAP_SM3 - { uint8_t(CpuFeatures::ARM::kSM4) , 19 }, // HWCAP_SM4 - { uint8_t(CpuFeatures::ARM::kDOTPROD) , 20 }, // HWCAP_ASIMDDP - { uint8_t(CpuFeatures::ARM::kSHA512) , 21 }, // HWCAP_SHA512 - { uint8_t(CpuFeatures::ARM::kSVE) , 22 }, // HWCAP_SVE - { uint8_t(CpuFeatures::ARM::kFP16FML) , 23 }, // HWCAP_ASIMDFHM - { uint8_t(CpuFeatures::ARM::kDIT) , 24 }, // HWCAP_DIT - /* - { uint8_t(CpuFeatures::ARM::k) , 25 }, // HWCAP_USCAT - { uint8_t(CpuFeatures::ARM::k) , 26 }, // HWCAP_ILRCPC - */ - { uint8_t(CpuFeatures::ARM::kFLAGM) , 27 }, // HWCAP_FLAGM - { uint8_t(CpuFeatures::ARM::kSSBS) , 28 }, // HWCAP_SSBS - { uint8_t(CpuFeatures::ARM::kSB) , 29 } // HWCAP_SB - /* - { uint8_t(CpuFeatures::ARM::k) , 30 }, // HWCAP_PACA - { uint8_t(CpuFeatures::ARM::k) , 31 } // HWCAP_PACG + { uint8_t(Ext::k) , 30 }, // HWCAP_PACA + { uint8_t(Ext::k) , 31 } // HWCAP_PACG */ }; -// `AT_HWCAP2` provides ARMv8+ related flags. -static const LinuxHWCapMapping hwCapMapping2[] = { - /* - { uint8_t(CpuFeatures::ARM::k) , 0 }, // HWCAP2_DCPODP - */ - { uint8_t(CpuFeatures::ARM::kSVE2) , 1 }, // HWCAP2_SVE2 - { uint8_t(CpuFeatures::ARM::kSVE2_AES) , 2 }, // HWCAP2_SVEAES - { uint8_t(CpuFeatures::ARM::kSVE_PMULL) , 3 }, // HWCAP2_SVEPMULL - { uint8_t(CpuFeatures::ARM::kSVE2_BITPERM), 4 }, // HWCAP2_SVEBITPERM - { uint8_t(CpuFeatures::ARM::kSVE2_SHA3) , 5 }, // HWCAP2_SVESHA3 - { uint8_t(CpuFeatures::ARM::kSVE2_SM4) , 6 }, // HWCAP2_SVESM4 - { uint8_t(CpuFeatures::ARM::kALTNZCV) , 7 }, // HWCAP2_FLAGM2 - { uint8_t(CpuFeatures::ARM::kFRINT) , 8 }, // HWCAP2_FRINT - { uint8_t(CpuFeatures::ARM::kSVE_I8MM) , 9 }, // HWCAP2_SVEI8MM - { uint8_t(CpuFeatures::ARM::kSVE_F32MM) , 10 }, // HWCAP2_SVEF32MM - { uint8_t(CpuFeatures::ARM::kSVE_F64MM) , 11 }, // HWCAP2_SVEF64MM - { uint8_t(CpuFeatures::ARM::kSVE_BF16) , 12 }, // HWCAP2_SVEBF16 - { uint8_t(CpuFeatures::ARM::kI8MM) , 13 }, // HWCAP2_I8MM - { uint8_t(CpuFeatures::ARM::kBF16) , 14 }, // HWCAP2_BF16 - { uint8_t(CpuFeatures::ARM::kDGH) , 15 }, // HWCAP2_DGH - { uint8_t(CpuFeatures::ARM::kRNG) , 16 }, // HWCAP2_RNG - { uint8_t(CpuFeatures::ARM::kBTI) , 17 }, // HWCAP2_BTI - { uint8_t(CpuFeatures::ARM::kMTE) , 18 } // HWCAP2_MTE +static const HWCapMapping hwCap2Mapping[] = { + { uint8_t(Ext::kDPB2) , 0 }, // HWCAP2_DCPODP + { uint8_t(Ext::kSVE2) , 1 }, // HWCAP2_SVE2 + { uint8_t(Ext::kSVE_AES) , 2 }, // HWCAP2_SVEAES + { uint8_t(Ext::kSVE_PMULL128) , 3 }, // HWCAP2_SVEPMULL + { uint8_t(Ext::kSVE_BITPERM) , 4 }, // HWCAP2_SVEBITPERM + { uint8_t(Ext::kSVE_SHA3) , 5 }, // HWCAP2_SVESHA3 + { uint8_t(Ext::kSVE_SM4) , 6 }, // HWCAP2_SVESM4 + { uint8_t(Ext::kFLAGM2) , 7 }, // HWCAP2_FLAGM2 + { uint8_t(Ext::kFRINTTS) , 8 }, // HWCAP2_FRINT + { uint8_t(Ext::kSVE_I8MM) , 9 }, // HWCAP2_SVEI8MM + { uint8_t(Ext::kSVE_F32MM) , 10 }, // HWCAP2_SVEF32MM + { uint8_t(Ext::kSVE_F64MM) , 11 }, // HWCAP2_SVEF64MM + { uint8_t(Ext::kSVE_BF16) , 12 }, // HWCAP2_SVEBF16 + { uint8_t(Ext::kI8MM) , 13 }, // HWCAP2_I8MM + { uint8_t(Ext::kBF16) , 14 }, // HWCAP2_BF16 + { uint8_t(Ext::kDGH) , 15 }, // HWCAP2_DGH + { uint8_t(Ext::kRNG) , 16 }, // HWCAP2_RNG + { uint8_t(Ext::kBTI) , 17 }, // HWCAP2_BTI + { uint8_t(Ext::kMTE) , 18 }, // HWCAP2_MTE + { uint8_t(Ext::kECV) , 19 }, // HWCAP2_ECV + { uint8_t(Ext::kAFP) , 20 }, // HWCAP2_AFP + { uint8_t(Ext::kRPRES) , 21 }, // HWCAP2_RPRES + { uint8_t(Ext::kMTE3) , 22 }, // HWCAP2_MTE3 + { uint8_t(Ext::kSME) , 23 }, // HWCAP2_SME + { uint8_t(Ext::kSME_I16I64) , 24 }, // HWCAP2_SME_I16I64 + { uint8_t(Ext::kSME_F64F64) , 25 }, // HWCAP2_SME_F64F64 + { uint8_t(Ext::kSME_I8I32) , 26 }, // HWCAP2_SME_I8I32 + { uint8_t(Ext::kSME_F16F32) , 27 }, // HWCAP2_SME_F16F32 + { uint8_t(Ext::kSME_B16F32) , 28 }, // HWCAP2_SME_B16F32 + { uint8_t(Ext::kSME_F32F32) , 29 }, // HWCAP2_SME_F32F32 + { uint8_t(Ext::kSME_FA64) , 30 }, // HWCAP2_SME_FA64 + { uint8_t(Ext::kWFXT) , 31 }, // HWCAP2_WFXT + { uint8_t(Ext::kEBF16) , 32 }, // HWCAP2_EBF16 + { uint8_t(Ext::kSVE_EBF16) , 33 }, // HWCAP2_SVE_EBF16 + { uint8_t(Ext::kCSSC) , 34 }, // HWCAP2_CSSC + { uint8_t(Ext::kRPRFM) , 35 }, // HWCAP2_RPRFM + { uint8_t(Ext::kSVE2_1) , 36 }, // HWCAP2_SVE2P1 + { uint8_t(Ext::kSME2) , 37 }, // HWCAP2_SME2 + { uint8_t(Ext::kSME2_1) , 38 }, // HWCAP2_SME2P1 + { uint8_t(Ext::kSME_I16I32) , 39 }, // HWCAP2_SME_I16I32 + { uint8_t(Ext::kSME_BI32I32) , 40 }, // HWCAP2_SME_BI32I32 + { uint8_t(Ext::kSME_B16B16) , 41 }, // HWCAP2_SME_B16B16 + { uint8_t(Ext::kSME_F16F16) , 42 } // HWCAP2_SME_F16F16 }; static ASMJIT_FAVOR_SIZE void detectARMCpu(CpuInfo& cpu) noexcept { cpu._wasDetected = true; populateBaseARMFeatures(cpu); - detectHWCaps(cpu, AT_HWCAP, hwCapMapping, ASMJIT_ARRAY_SIZE(hwCapMapping)); - detectHWCaps(cpu, AT_HWCAP2, hwCapMapping2, ASMJIT_ARRAY_SIZE(hwCapMapping2)); + unsigned long hwCapMasks[2] {}; + getAuxValues(hwCapMasks, hwCapTags, 2u); + + mergeHWCaps(cpu, hwCapMasks[0], hwCapMapping, ASMJIT_ARRAY_SIZE(hwCapMapping)); + mergeHWCaps(cpu, hwCapMasks[1], hwCap2Mapping, ASMJIT_ARRAY_SIZE(hwCap2Mapping)); + +#if defined(ASMJIT_ARM_DETECT_VIA_CPUID) + if (cpu.features().arm().hasCPUID()) { + detectAArch64FeaturesViaCPUID(cpu); + return; + } +#endif // ASMJIT_ARM_DETECT_VIA_CPUID + + postProcessARMCpuInfo(cpu); } -#endif +#endif // ASMJIT_ARCH_ARM -// CpuInfo - Detect - ARM [Apple] -// ============================== +// CpuInfo - Detect - ARM - Detect by OpenBSD API That Reads CPUID +// =============================================================== + +#elif defined(__OpenBSD__) && ASMJIT_ARCH_ARM >= 64 + +// Supported CPUID registers on OpenBSD (CTL_MACHDEP definitions): +// - https://github.com/openbsd/src/blob/master/sys/arch/arm64/include/cpu.h +enum class OpenBSDAArch64CPUID { + kAA64ISAR0 = 2, + kAA64ISAR1 = 3, + kAA64ISAR2 = 4, + kAA64MMFR0 = 5, + kAA64MMFR1 = 6, + kAA64MMFR2 = 7, + kAA64PFR0 = 8, + kAA64PFR1 = 9, + kAA64SMFR0 = 10, + kAA64ZFR0 = 11 +}; + +static uint64_t openbsdReadAArch64CPUID(OpenBSDAArch64CPUID id) noexcept { + uint64_t bits = 0; + size_t size = sizeof(bits); + int name[2] = { CTL_MACHDEP, int(id) }; + + return (sysctl(name, 2, &bits, &size, NULL, 0) < 0) ? uint64_t(0) : bits; +} + +static ASMJIT_FAVOR_SIZE void detectARMCpu(CpuInfo& cpu) noexcept { + typedef OpenBSDAArch64CPUID ID; + + populateBaseARMFeatures(cpu); + + detectAArch64FeaturesViaCPUID_AA64PFR0_AA64PFR1(cpu, + openbsdReadAArch64CPUID(ID::kAA64PFR0), + openbsdReadAArch64CPUID(ID::kAA64PFR1)); + + detectAArch64FeaturesViaCPUID_AA64ISAR0_AA64ISAR1(cpu, + openbsdReadAArch64CPUID(ID::kAA64ISAR0), + openbsdReadAArch64CPUID(ID::kAA64ISAR1)); + + detectAArch64FeaturesViaCPUID_AA64ISAR2(cpu, openbsdReadAArch64CPUID(ID::kAA64ISAR2)); + detectAArch64FeaturesViaCPUID_AA64MMFR0(cpu, openbsdReadAArch64CPUID(ID::kAA64MMFR0)); + detectAArch64FeaturesViaCPUID_AA64MMFR1(cpu, openbsdReadAArch64CPUID(ID::kAA64MMFR1)); + detectAArch64FeaturesViaCPUID_AA64MMFR2(cpu, openbsdReadAArch64CPUID(ID::kAA64MMFR2)); + + // Only read CPU_ID_AA64ZFR0 when either SVE or SME is available. + if (cpu.features().arm().hasAny(Ext::kSVE, Ext::kSME)) { + detectAArch64FeaturesViaCPUID_AA64ZFR0(cpu, openbsdReadAArch64CPUID(ID::kAA64ZFR0)); + } + + postProcessARMCpuInfo(cpu); +} + +// CpuInfo - Detect - ARM - Detect by Apple API (sysctlbyname) +// =========================================================== #elif defined(__APPLE__) -namespace AppleHWId { - enum CpuFamily : uint32_t { - // Generic ARM. - kCpuFamily_ARM_9 = 0xE73283AEu, - kCpuFamily_ARM_11 = 0x8FF620D8u, - kCpuFamily_ARM_12 = 0xBD1B0AE9u, - kCpuFamily_ARM_13 = 0x0CC90E64u, - kCpuFamily_ARM_14 = 0x96077EF1u, - kCpuFamily_ARM_15 = 0xA8511BCAu, - - // Apple design. - kCpuFamily_SWIFT = 0x1E2D6381u, - kCpuFamily_CYCLONE = 0x37A09642u, - kCpuFamily_TYPHOON = 0x2C91A47Eu, - kCpuFamily_TWISTER = 0x92FB37C8u, - kCpuFamily_HURRICANE = 0x67CEEE93u, - kCpuFamily_MONSOON_MISTRAL = 0xE81E7EF6u, - kCpuFamily_VORTEX_TEMPEST = 0x07D34B9Fu, - kCpuFamily_LIGHTNING_THUNDER = 0x462504D2u, - kCpuFamily_FIRESTORM_ICESTORM = 0x1B588BB3u - }; +enum class AppleFeatureType : uint8_t { + kHWOptional, + kHWOptionalArmFEAT }; -static ASMJIT_FAVOR_SIZE uint32_t queryARMCpuFamilyId() noexcept { - uint32_t result = 0; - size_t size = sizeof(result); +struct AppleFeatureMapping { + AppleFeatureType type; + char name[18]; + uint8_t featureId; +}; - int res = sysctlbyname("hw.cpufamily", &result, &size, nullptr, 0); - if (res != 0) - return 0; - else - return result; +template +static inline bool appleSysctlByName(const char* sysctlName, T* dst, size_t size = sizeof(T)) noexcept { + return sysctlbyname(sysctlName, dst, &size, nullptr, 0) == 0; +} + +static ASMJIT_FAVOR_SIZE long appleDetectARMFeatureViaSysctl(AppleFeatureType type, const char* featureName) noexcept { + static const char hwOptionalPrefix[] = "hw.optional."; + static const char hwOptionalArmFeatPrefix[] = "hw.optional.arm.FEAT_"; + + char sysctlName[128]; + + const char* prefix = type == AppleFeatureType::kHWOptional ? hwOptionalPrefix : hwOptionalArmFeatPrefix; + size_t prefixSize = (type == AppleFeatureType::kHWOptional ? sizeof(hwOptionalPrefix) : sizeof(hwOptionalArmFeatPrefix)) - 1u; + size_t featureNameSize = strlen(featureName); + + if (featureNameSize < 128 - prefixSize) { + memcpy(sysctlName, prefix, prefixSize); + memcpy(sysctlName + prefixSize, featureName, featureNameSize + 1u); // Include NULL terminator. + + long val = 0; + if (appleSysctlByName(sysctlName, &val)) + return val; + } + + return 0; +} + +static ASMJIT_FAVOR_SIZE void appleDetectARMFeaturesViaSysctl(CpuInfo& cpu) noexcept { + typedef AppleFeatureType FT; + + // Based on: + // - https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_instruction_set_characteristics + static const AppleFeatureMapping mappings[] = { + // Determine Advanced SIMD and Floating Point Capabilities: + { FT::kHWOptional , "AdvSIMD_HPFPCvt", uint8_t(Ext::kFP16CONV) }, + { FT::kHWOptional , "neon_hpfp" , uint8_t(Ext::kFP16CONV) }, + { FT::kHWOptionalArmFEAT, "BF16" , uint8_t(Ext::kBF16) }, + { FT::kHWOptionalArmFEAT, "DotProd" , uint8_t(Ext::kDOTPROD) }, + { FT::kHWOptionalArmFEAT, "FCMA" , uint8_t(Ext::kFCMA) }, + { FT::kHWOptional , "armv8_3_compnum", uint8_t(Ext::kFCMA) }, + { FT::kHWOptionalArmFEAT, "FHM" , uint8_t(Ext::kFHM) }, + { FT::kHWOptional , "armv8_2_fhm" , uint8_t(Ext::kFHM) }, + { FT::kHWOptionalArmFEAT, "FP16" , uint8_t(Ext::kFP16) }, + { FT::kHWOptional , "neon_fp16" , uint8_t(Ext::kFP16) }, + { FT::kHWOptionalArmFEAT, "FRINTTS" , uint8_t(Ext::kFRINTTS) }, + { FT::kHWOptionalArmFEAT, "I8MM" , uint8_t(Ext::kI8MM) }, + { FT::kHWOptionalArmFEAT, "JSCVT" , uint8_t(Ext::kJSCVT) }, + { FT::kHWOptionalArmFEAT, "RDM" , uint8_t(Ext::kRDM) }, + + // Determine Integer Capabilities: + { FT::kHWOptional , "armv8_crc32" , uint8_t(Ext::kCRC32) }, + { FT::kHWOptionalArmFEAT, "FlagM" , uint8_t(Ext::kFLAGM) }, + { FT::kHWOptionalArmFEAT, "FlagM2" , uint8_t(Ext::kFLAGM2) }, + + // Determine Atomic and Memory Ordering Instruction Capabilities: + { FT::kHWOptionalArmFEAT, "LRCPC" , uint8_t(Ext::kLRCPC) }, + { FT::kHWOptionalArmFEAT, "LRCPC2" , uint8_t(Ext::kLRCPC2) }, + { FT::kHWOptional , "armv8_1_atomics", uint8_t(Ext::kLSE) }, + { FT::kHWOptionalArmFEAT, "LSE" , uint8_t(Ext::kLSE) }, + { FT::kHWOptionalArmFEAT, "LSE2" , uint8_t(Ext::kLSE2) }, + + // Determine Encryption Capabilities: + { FT::kHWOptionalArmFEAT, "AES" , uint8_t(Ext::kAES) }, + { FT::kHWOptionalArmFEAT, "PMULL" , uint8_t(Ext::kPMULL) }, + { FT::kHWOptionalArmFEAT, "SHA1" , uint8_t(Ext::kSHA1) }, + { FT::kHWOptionalArmFEAT, "SHA256" , uint8_t(Ext::kSHA256) }, + { FT::kHWOptionalArmFEAT, "SHA512" , uint8_t(Ext::kSHA512) }, + { FT::kHWOptional , "armv8_2_sha512" , uint8_t(Ext::kSHA512) }, + { FT::kHWOptionalArmFEAT, "SHA3" , uint8_t(Ext::kSHA3) }, + { FT::kHWOptional , "armv8_2_sha3" , uint8_t(Ext::kSHA3) }, + + // Determine General Capabilities: + { FT::kHWOptionalArmFEAT, "BTI" , uint8_t(Ext::kBTI) }, + { FT::kHWOptionalArmFEAT, "DPB" , uint8_t(Ext::kDPB) }, + { FT::kHWOptionalArmFEAT, "DPB2" , uint8_t(Ext::kDPB2) }, + { FT::kHWOptionalArmFEAT, "ECV" , uint8_t(Ext::kECV) }, + { FT::kHWOptionalArmFEAT, "SB" , uint8_t(Ext::kSB) }, + { FT::kHWOptionalArmFEAT, "SSBS" , uint8_t(Ext::kSSBS) } + }; + + for (size_t i = 0; i < ASMJIT_ARRAY_SIZE(mappings); i++) { + const AppleFeatureMapping& mapping = mappings[i]; + if (!cpu.features().arm().has(mapping.featureId) && appleDetectARMFeatureViaSysctl(mapping.type, mapping.name)) { + cpu.features().arm().add(mapping.featureId); + } + } } static ASMJIT_FAVOR_SIZE void detectARMCpu(CpuInfo& cpu) noexcept { cpu._wasDetected = true; populateBaseARMFeatures(cpu); - uint32_t cpuFamilyId = queryARMCpuFamilyId(); - CpuFeatures::ARM& features = cpu.features().arm(); + appleSysctlByName("hw.cpufamily", &cpu._familyId); + appleSysctlByName("hw.cachelinesize", &cpu._cacheLineSize); + appleSysctlByName("machdep.cpu.logical_per_package", &cpu._maxLogicalProcessors); + appleSysctlByName("machdep.cpu.brand_string", cpu._brand.str, sizeof(cpu._brand.str)); - switch (cpuFamilyId) { - case AppleHWId::kCpuFamily_ARM_9: - case AppleHWId::kCpuFamily_ARM_11: - case AppleHWId::kCpuFamily_ARM_12: - break; + memcpy(cpu._vendor.str, "APPLE", 6); - // ARM Cortex A8. - case AppleHWId::kCpuFamily_ARM_13: - break; - - // ARM Cortex A9. - case AppleHWId::kCpuFamily_ARM_14: - break; - - // ARM Cortex A7 - ARMv7k. - case AppleHWId::kCpuFamily_ARM_15: - features.add(CpuFeatures::ARM::kARMv7); - break; - - // Apple A6/A6X - ARMv7s. - case AppleHWId::kCpuFamily_SWIFT: - features.add(CpuFeatures::ARM::kARMv7); - break; - - // Apple A7 - ARMv8.0-A. - case AppleHWId::kCpuFamily_CYCLONE: - features.add(CpuFeatures::ARM::kARMv8a, - CpuFeatures::ARM::kAES, - CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2); - break; - - // Apple A8 - ARMv8.0-A. - case AppleHWId::kCpuFamily_TYPHOON: - features.add(CpuFeatures::ARM::kARMv8a, - CpuFeatures::ARM::kAES, - CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2); - break; - - // Apple A9 - ARMv8.0-A. - case AppleHWId::kCpuFamily_TWISTER: - features.add(CpuFeatures::ARM::kARMv8a, - CpuFeatures::ARM::kAES, - CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2); - break; - - // Apple A10 - ARMv8.1-A. - case AppleHWId::kCpuFamily_HURRICANE: - features.add(CpuFeatures::ARM::kARMv8_1a, - CpuFeatures::ARM::kAES, - CpuFeatures::ARM::kRDM, - CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2); - - break; - - // Apple A11 - ARMv8.2-A. - case AppleHWId::kCpuFamily_MONSOON_MISTRAL: - features.add(CpuFeatures::ARM::kARMv8_2a, - CpuFeatures::ARM::kAES, - CpuFeatures::ARM::kFP16FULL, - CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2); - break; - - // Apple A12 - ARMv8.3-A. - case AppleHWId::kCpuFamily_VORTEX_TEMPEST: - features.add(CpuFeatures::ARM::kARMv8_3a, - CpuFeatures::ARM::kAES, - CpuFeatures::ARM::kFP16FULL, - CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2); - break; - - // Apple A13 - ARMv8.4-A. - case AppleHWId::kCpuFamily_LIGHTNING_THUNDER: - features.add(CpuFeatures::ARM::kARMv8_4a, - CpuFeatures::ARM::kAES, - CpuFeatures::ARM::kFP16FML, - CpuFeatures::ARM::kFP16FULL, - CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2, - CpuFeatures::ARM::kSHA3, - CpuFeatures::ARM::kSHA512); - break; - - // Apple A14/M1 - ARMv8.5-A. - case AppleHWId::kCpuFamily_FIRESTORM_ICESTORM: - features.add(CpuFeatures::ARM::kARMv8_4a, - CpuFeatures::ARM::kAES, - CpuFeatures::ARM::kALTNZCV, - CpuFeatures::ARM::kFP16FML, - CpuFeatures::ARM::kFP16FULL, - CpuFeatures::ARM::kFRINT, - CpuFeatures::ARM::kSB, - CpuFeatures::ARM::kSHA1, - CpuFeatures::ARM::kSHA2, - CpuFeatures::ARM::kSHA3, - CpuFeatures::ARM::kSHA512, - CpuFeatures::ARM::kSSBS); - break; - - default: - cpu._wasDetected = false; - break; - } - - expandARMFeaturesByVersion(cpu); + bool cpuFeaturesPopulated = detectARMFeaturesViaAppleFamilyId(cpu); + if (!cpuFeaturesPopulated) + appleDetectARMFeaturesViaSysctl(cpu); + postProcessARMCpuInfo(cpu); } -// CpuInfo - Detect - ARM [Unknown] -// ================================ +// CpuInfo - Detect - ARM - Detect by Fallback (Using Compiler Flags) +// ================================================================== #else -#if ASMJIT_ARCH_ARM == 64 - #pragma message("[asmjit] Disabling runtime CPU detection - unsupported OS/CPU combination (Unknown OS with AArch64 CPU)") -#else +#if ASMJIT_ARCH_ARM == 32 #pragma message("[asmjit] Disabling runtime CPU detection - unsupported OS/CPU combination (Unknown OS with ARM CPU)") +#else + #pragma message("[asmjit] Disabling runtime CPU detection - unsupported OS/CPU combination (Unknown OS with AArch64 CPU)") #endif static ASMJIT_FAVOR_SIZE void detectARMCpu(CpuInfo& cpu) noexcept { populateBaseARMFeatures(cpu); detectARMFeaturesViaCompilerFlags(cpu); - expandARMFeaturesByVersion(cpu); + postProcessARMCpuInfo(cpu); } #endif +} // {arm} + #endif // CpuInfo - Detect - Host @@ -1158,8 +1906,8 @@ static uint32_t cpuInfoInitialized; static CpuInfo cpuInfoGlobal(Globals::NoInit); const CpuInfo& CpuInfo::host() noexcept { - // This should never cause a problem as the resulting information should always be the same. In the worst case we - // would just overwrite it non-atomically. + // This should never cause a problem as the resulting information should always be the same. + // In the worst case it would just be overwritten non-atomically. if (!cpuInfoInitialized) { CpuInfo cpuInfoLocal; @@ -1167,9 +1915,9 @@ const CpuInfo& CpuInfo::host() noexcept { cpuInfoLocal._subArch = SubArch::kHost; #if ASMJIT_ARCH_X86 - detectX86Cpu(cpuInfoLocal); + x86::detectX86Cpu(cpuInfoLocal); #elif ASMJIT_ARCH_ARM - detectARMCpu(cpuInfoLocal); + arm::detectARMCpu(cpuInfoLocal); #else #pragma message("[asmjit] Disabling runtime CPU detection - unsupported OS/CPU combination (Unknown CPU)") #endif diff --git a/src/asmjit/core/cpuinfo.h b/src/asmjit/core/cpuinfo.h index f5437d4..f596b5f 100644 --- a/src/asmjit/core/cpuinfo.h +++ b/src/asmjit/core/cpuinfo.h @@ -88,12 +88,22 @@ public: return bool((_bits[idx] >> bit) & 0x1); } + template + ASMJIT_FORCE_INLINE bool hasAny(const FeatureId& featureId) const noexcept { + return has(featureId); + } + + template + ASMJIT_FORCE_INLINE bool hasAny(const FeatureId& featureId, Args&&... otherFeatureIds) const noexcept { + return bool(unsigned(has(featureId)) | unsigned(hasAny(std::forward(otherFeatureIds)...))); + } + //! Tests whether all features as defined by `other` are present. ASMJIT_FORCE_INLINE bool hasAll(const Data& other) const noexcept { + uint32_t result = 1; for (uint32_t i = 0; i < kNumBitWords; i++) - if ((_bits[i] & other._bits[i]) != other._bits[i]) - return false; - return true; + result &= uint32_t((_bits[i] & other._bits[i]) == other._bits[i]); + return bool(result); } //! \} @@ -169,38 +179,41 @@ public: kMT, //!< CPU has multi-threading capabilities. kNX, //!< CPU has Not-Execute-Bit aka DEP (data-execution prevention). - k3DNOW, //!< CPU has 3DNOW (3DNOW base instructions) [AMD]. - k3DNOW2, //!< CPU has 3DNOW2 (enhanced 3DNOW) [AMD]. + k3DNOW, //!< CPU has 3DNOW (3DNOW base instructions) {AMD} (deprecated). + k3DNOW2, //!< CPU has 3DNOW2 (enhanced 3DNOW) {AMD} (deprecated). kADX, //!< CPU has ADX (multi-precision add-carry instruction extensions). kAESNI, //!< CPU has AESNI (AES encode/decode instructions). - kALTMOVCR8, //!< CPU has LOCK MOV R<->CR0 (supports `MOV R<->CR8` via `LOCK MOV R<->CR0` in 32-bit mode) [AMD]. - kAMX_BF16, //!< CPU has AMX_BF16 (advanced matrix extensions - BF16 instructions). - kAMX_FP16, //!< CPU has AMX_FP16 (advanced matrix extensions - FP16 instructions). - kAMX_INT8, //!< CPU has AMX_INT8 (advanced matrix extensions - INT8 instructions). + kALTMOVCR8, //!< CPU has LOCK MOV R<->CR0 (supports `MOV R<->CR8` via `LOCK MOV R<->CR0` in 32-bit mode) {AMD}. + kAMX_BF16, //!< CPU has AMX_BF16 (AMX-BF16 instructions). + kAMX_COMPLEX, //!< CPU has AMX_COMPLEX (AMX-COMPLEX instructions). + kAMX_FP16, //!< CPU has AMX_FP16 (AMX-FP16 instructions). + kAMX_INT8, //!< CPU has AMX_INT8 (AMX-INT8 instructions). kAMX_TILE, //!< CPU has AMX_TILE (advanced matrix extensions). + kAPX_F, //!< CPU has APX_F (advanced performance extensions - 32 GP registers, REX2 prefix, ...) {X86_64}. kAVX, //!< CPU has AVX (advanced vector extensions). kAVX2, //!< CPU has AVX2 (advanced vector extensions 2). kAVX512_4FMAPS, //!< CPU has AVX512_FMAPS (FMA packed single). kAVX512_4VNNIW, //!< CPU has AVX512_VNNIW (vector NN instructions word variable precision). - kAVX512_BF16, //!< CPU has AVX512_BF16 (BFLOAT16 support instruction). - kAVX512_BITALG, //!< CPU has AVX512_BITALG (VPOPCNT[B|W], VPSHUFBITQMB). - kAVX512_BW, //!< CPU has AVX512_BW (packed BYTE|WORD). - kAVX512_CDI, //!< CPU has AVX512_CDI (conflict detection). - kAVX512_DQ, //!< CPU has AVX512_DQ (packed DWORD|QWORD). - kAVX512_ERI, //!< CPU has AVX512_ERI (exponential and reciprocal). + kAVX512_BF16, //!< CPU has AVX512_BF16 (AVX512 BFLOAT16 support instructions). + kAVX512_BITALG, //!< CPU has AVX512_BITALG (AVX512 VPOPCNT[B|W] and VPSHUFBITQMB instructions). + kAVX512_BW, //!< CPU has AVX512_BW (AVX512 integer BYTE|WORD instructions). + kAVX512_CD, //!< CPU has AVX512_CD (AVX512 conflict detection DWORD|QWORD instructions). + kAVX512_DQ, //!< CPU has AVX512_DQ (AVX512 integer DWORD|QWORD instructions). + kAVX512_ER, //!< CPU has AVX512_ER (AVX512 exponential and reciprocal instructions). kAVX512_F, //!< CPU has AVX512_F (AVX512 foundation). - kAVX512_FP16, //!< CPU has AVX512_FP16 (FP16 extensions). - kAVX512_IFMA, //!< CPU has AVX512_IFMA (integer fused-multiply-add using 52-bit precision). - kAVX512_PFI, //!< CPU has AVX512_PFI (prefetch instructions). - kAVX512_VBMI, //!< CPU has AVX512_VBMI (vector byte manipulation). - kAVX512_VBMI2, //!< CPU has AVX512_VBMI2 (vector byte manipulation 2). - kAVX512_VL, //!< CPU has AVX512_VL (vector length extensions). - kAVX512_VNNI, //!< CPU has AVX512_VNNI (vector neural network instructions). + kAVX512_FP16, //!< CPU has AVX512_FP16 (AVX512 FP16 instructions). + kAVX512_IFMA, //!< CPU has AVX512_IFMA (AVX512 integer fused-multiply-add using 52-bit precision). + kAVX512_PF, //!< CPU has AVX512_PF (AVX512 prefetch instructions). + kAVX512_VBMI, //!< CPU has AVX512_VBMI (AVX152 vector byte manipulation instructions). + kAVX512_VBMI2, //!< CPU has AVX512_VBMI2 (AVX512 vector byte manipulation instructions v2). + kAVX512_VL, //!< CPU has AVX512_VL (AVX512 vector length extensions). + kAVX512_VNNI, //!< CPU has AVX512_VNNI (AVX512 vector neural network instructions). kAVX512_VP2INTERSECT, //!< CPU has AVX512_VP2INTERSECT - kAVX512_VPOPCNTDQ, //!< CPU has AVX512_VPOPCNTDQ (VPOPCNT[D|Q] instructions). - kAVX_IFMA, //!< CPU has AVX_IFMA (VEX encoding of vpmadd52huq/vpmadd52luq). + kAVX512_VPOPCNTDQ, //!< CPU has AVX512_VPOPCNTDQ (AVX512 VPOPCNT[D|Q] instructions). + kAVX_IFMA, //!< CPU has AVX_IFMA (AVX/VEX encoding of vpmadd52huq/vpmadd52luq). kAVX_NE_CONVERT, //!< CPU has AVX_NE_CONVERT. - kAVX_VNNI, //!< CPU has AVX_VNNI (VEX encoding of vpdpbusd/vpdpbusds/vpdpwssd/vpdpwssds). + kAVX_VNNI, //!< CPU has AVX_VNNI (AVX/VEX encoding of vpdpbusd/vpdpbusds/vpdpwssd/vpdpwssds). + kAVX_VNNI_INT16, //!< CPU has AVX_VNNI_INT16. kAVX_VNNI_INT8, //!< CPU has AVX_VNNI_INT8. kBMI, //!< CPU has BMI (bit manipulation instructions #1). kBMI2, //!< CPU has BMI2 (bit manipulation instructions #2). @@ -208,20 +221,20 @@ public: kCET_SS, //!< CPU has CET-SS. kCET_SSS, //!< CPU has CET-SSS. kCLDEMOTE, //!< CPU has CLDEMOTE (cache line demote). - kCLFLUSH, //!< CPU has CLFUSH (Cache Line flush). - kCLFLUSHOPT, //!< CPU has CLFUSHOPT (Cache Line flush - optimized). + kCLFLUSH, //!< CPU has CLFUSH (cache Line flush). + kCLFLUSHOPT, //!< CPU has CLFUSHOPT (cache Line flush - optimized). kCLWB, //!< CPU has CLWB. kCLZERO, //!< CPU has CLZERO. kCMOV, //!< CPU has CMOV (CMOV and FCMOV instructions). kCMPCCXADD, //!< CPU has CMPCCXADD. - kCMPXCHG16B, //!< CPU has CMPXCHG16B (compare-exchange 16 bytes) [X86_64]. + kCMPXCHG16B, //!< CPU has CMPXCHG16B (compare-exchange 16 bytes) {X86_64}. kCMPXCHG8B, //!< CPU has CMPXCHG8B (compare-exchange 8 bytes). kENCLV, //!< CPU has ENCLV. kENQCMD, //!< CPU has ENQCMD (enqueue stores). kERMS, //!< CPU has ERMS (enhanced REP MOVSB/STOSB). - kF16C, //!< CPU has F16C. - kFMA, //!< CPU has FMA (fused-multiply-add 3 operand form). - kFMA4, //!< CPU has FMA4 (fused-multiply-add 4 operand form). + kF16C, //!< CPU has F16C (AVX FP16 conversion instructions). + kFMA, //!< CPU has FMA (AVX fused-multiply-add - 3 operand form). + kFMA4, //!< CPU has FMA4 (AVX fused-multiply-add - 4 operand form) (deprecated). kFPU, //!< CPU has FPU (FPU support). kFSGSBASE, //!< CPU has FSGSBASE. kFSRM, //!< CPU has FSRM (fast short REP MOVSB). @@ -230,18 +243,19 @@ public: kFXSR, //!< CPU has FXSR (FXSAVE/FXRSTOR instructions). kFXSROPT, //!< CPU has FXSROTP (FXSAVE/FXRSTOR is optimized). kFZRM, //!< CPU has FZRM (fast zero-length REP MOVSB). - kGEODE, //!< CPU has GEODE extensions (3DNOW additions). - kGFNI, //!< CPU has GFNI (Galois field instructions). + kGEODE, //!< CPU has GEODE extensions (GEODE 3DNOW additions) (deprecated). + kGFNI, //!< CPU has GFNI (galois field instructions). kHLE, //!< CPU has HLE. kHRESET, //!< CPU has HRESET. kI486, //!< CPU has I486 features (I486+ support). - kLAHFSAHF, //!< CPU has LAHF/SAHF (LAHF/SAHF in 64-bit mode) [X86_64]. - kLAM, //!< CPU has LAM (linear address masking) [X86_64]. - kLWP, //!< CPU has LWP (lightweight profiling) [AMD]. + kINVLPGB, //!< CPU has INVLPGB. + kLAHFSAHF, //!< CPU has LAHF/SAHF (LAHF/SAHF in 64-bit mode) {X86_64}. + kLAM, //!< CPU has LAM (linear address masking) {X86_64}. + kLWP, //!< CPU has LWP (lightweight profiling) {AMD}. kLZCNT, //!< CPU has LZCNT (LZCNT instruction). kMCOMMIT, //!< CPU has MCOMMIT (MCOMMIT instruction). - kMMX, //!< CPU has MMX (MMX base instructions). - kMMX2, //!< CPU has MMX2 (MMX extensions or MMX2). + kMMX, //!< CPU has MMX (MMX base instructions) (deprecated). + kMMX2, //!< CPU has MMX2 (MMX2 extensions or initial SSE extensions) (deprecated). kMONITOR, //!< CPU has MONITOR (MONITOR/MWAIT instructions). kMONITORX, //!< CPU has MONITORX (MONITORX/MWAITX instructions). kMOVBE, //!< CPU has MOVBE (move with byte-order swap). @@ -260,40 +274,49 @@ public: kPREFETCHW, //!< CPU has PREFETCHW. kPREFETCHWT1, //!< CPU has PREFETCHWT1. kPTWRITE, //!< CPU has PTWRITE. - kRAO_INT, //!< CPU has RAO_INT. - kRDPID, //!< CPU has RDPID. - kRDPRU, //!< CPU has RDPRU. - kRDRAND, //!< CPU has RDRAND. - kRDSEED, //!< CPU has RDSEED. + kRAO_INT, //!< CPU has RAO_INT (AADD, AAND, AOR, AXOR instructions). + kRMPQUERY, //!< CPU has RMPQUERY (RMPQUERY instruction). + kRDPID, //!< CPU has RDPID (RDPID instruction). + kRDPRU, //!< CPU has RDPRU (RDPRU instruction). + kRDRAND, //!< CPU has RDRAND (RDRAND instruction). + kRDSEED, //!< CPU has RDSEED (RDSEED instruction). kRDTSC, //!< CPU has RDTSC. kRDTSCP, //!< CPU has RDTSCP. kRTM, //!< CPU has RTM. + kSEAM, //!< CPU has SEAM. kSERIALIZE, //!< CPU has SERIALIZE. + kSEV, //!< CPU has SEV (secure encrypted virtualization). + kSEV_ES, //!< CPU has SEV_ES (SEV encrypted state). + kSEV_SNP, //!< CPU has SEV_SNP (SEV secure nested paging). kSHA, //!< CPU has SHA (SHA-1 and SHA-256 instructions). - kSKINIT, //!< CPU has SKINIT (SKINIT/STGI instructions) [AMD]. + kSHA512, //!< CPU has SHA512 (SHA-512 instructions). + kSKINIT, //!< CPU has SKINIT (SKINIT/STGI instructions) {AMD}. + kSM3, //!< CPU has SM3 (SM3 hash extensions). + kSM4, //!< CPU has SM4 (SM4 cipher extensions). kSMAP, //!< CPU has SMAP (supervisor-mode access prevention). + kSME , //!< CPU has SME (secure memory encryption). kSMEP, //!< CPU has SMEP (supervisor-mode execution prevention). kSMX, //!< CPU has SMX (safer mode extensions). - kSNP, //!< CPU has SNP. - kSSE, //!< CPU has SSE. - kSSE2, //!< CPU has SSE2. - kSSE3, //!< CPU has SSE3. - kSSE4_1, //!< CPU has SSE4.1. - kSSE4_2, //!< CPU has SSE4.2. - kSSE4A, //!< CPU has SSE4A [AMD]. - kSSSE3, //!< CPU has SSSE3. - kSVM, //!< CPU has SVM (virtualization) [AMD]. - kTBM, //!< CPU has TBM (trailing bit manipulation) [AMD]. + kSSE, //!< CPU has SSE (SSE instructions). + kSSE2, //!< CPU has SSE2 (SSE2 instructions). + kSSE3, //!< CPU has SSE3 (SSE3 instructions). + kSSE4_1, //!< CPU has SSE4.1 (SSE4.1 instructions). + kSSE4_2, //!< CPU has SSE4.2 (SSE4.2 instructions). + kSSE4A, //!< CPU has SSE4A (SSE4.A instructions) {AMD} (deprecated). + kSSSE3, //!< CPU has SSSE3 (SSSE3 instructions). + kSVM, //!< CPU has SVM (virtualization) {AMD}. + kTBM, //!< CPU has TBM (trailing bit manipulation) {AMD}. + kTSE, //!< CPU has TSE. kTSX, //!< CPU has TSX. kTSXLDTRK, //!< CPU has TSXLDTRK. kUINTR, //!< CPU has UINTR (user interrupts). kVAES, //!< CPU has VAES (vector AES 256|512 bit support). - kVMX, //!< CPU has VMX (virtualization) [INTEL]. + kVMX, //!< CPU has VMX (virtualization) {INTEL}. kVPCLMULQDQ, //!< CPU has VPCLMULQDQ (vector PCLMULQDQ 256|512-bit support). kWAITPKG, //!< CPU has WAITPKG (UMONITOR, UMWAIT, TPAUSE). kWBNOINVD, //!< CPU has WBNOINVD. kWRMSRNS, //!< CPU has WRMSRNS. - kXOP, //!< CPU has XOP (XOP instructions) [AMD]. + kXOP, //!< CPU has XOP (XOP instructions) {AMD} (deprecated). kXSAVE, //!< CPU has XSAVE. kXSAVEC, //!< CPU has XSAVEC. kXSAVEOPT, //!< CPU has XSAVEOPT. @@ -314,9 +337,11 @@ public: ASMJIT_X86_FEATURE(AESNI) ASMJIT_X86_FEATURE(ALTMOVCR8) ASMJIT_X86_FEATURE(AMX_BF16) + ASMJIT_X86_FEATURE(AMX_COMPLEX) ASMJIT_X86_FEATURE(AMX_FP16) ASMJIT_X86_FEATURE(AMX_INT8) ASMJIT_X86_FEATURE(AMX_TILE) + ASMJIT_X86_FEATURE(APX_F) ASMJIT_X86_FEATURE(AVX) ASMJIT_X86_FEATURE(AVX2) ASMJIT_X86_FEATURE(AVX512_4FMAPS) @@ -324,13 +349,13 @@ public: ASMJIT_X86_FEATURE(AVX512_BF16) ASMJIT_X86_FEATURE(AVX512_BITALG) ASMJIT_X86_FEATURE(AVX512_BW) - ASMJIT_X86_FEATURE(AVX512_CDI) + ASMJIT_X86_FEATURE(AVX512_CD) ASMJIT_X86_FEATURE(AVX512_DQ) - ASMJIT_X86_FEATURE(AVX512_ERI) + ASMJIT_X86_FEATURE(AVX512_ER) ASMJIT_X86_FEATURE(AVX512_F) ASMJIT_X86_FEATURE(AVX512_FP16) ASMJIT_X86_FEATURE(AVX512_IFMA) - ASMJIT_X86_FEATURE(AVX512_PFI) + ASMJIT_X86_FEATURE(AVX512_PF) ASMJIT_X86_FEATURE(AVX512_VBMI) ASMJIT_X86_FEATURE(AVX512_VBMI2) ASMJIT_X86_FEATURE(AVX512_VL) @@ -340,6 +365,7 @@ public: ASMJIT_X86_FEATURE(AVX_IFMA) ASMJIT_X86_FEATURE(AVX_NE_CONVERT) ASMJIT_X86_FEATURE(AVX_VNNI) + ASMJIT_X86_FEATURE(AVX_VNNI_INT16) ASMJIT_X86_FEATURE(AVX_VNNI_INT8) ASMJIT_X86_FEATURE(BMI) ASMJIT_X86_FEATURE(BMI2) @@ -373,6 +399,7 @@ public: ASMJIT_X86_FEATURE(HLE) ASMJIT_X86_FEATURE(HRESET) ASMJIT_X86_FEATURE(I486) + ASMJIT_X86_FEATURE(INVLPGB) ASMJIT_X86_FEATURE(LAHFSAHF) ASMJIT_X86_FEATURE(LAM) ASMJIT_X86_FEATURE(LWP) @@ -399,6 +426,7 @@ public: ASMJIT_X86_FEATURE(PREFETCHWT1) ASMJIT_X86_FEATURE(PTWRITE) ASMJIT_X86_FEATURE(RAO_INT) + ASMJIT_X86_FEATURE(RMPQUERY) ASMJIT_X86_FEATURE(RDPID) ASMJIT_X86_FEATURE(RDPRU) ASMJIT_X86_FEATURE(RDRAND) @@ -406,13 +434,16 @@ public: ASMJIT_X86_FEATURE(RDTSC) ASMJIT_X86_FEATURE(RDTSCP) ASMJIT_X86_FEATURE(RTM) + ASMJIT_X86_FEATURE(SEAM) ASMJIT_X86_FEATURE(SERIALIZE) + ASMJIT_X86_FEATURE(SEV) + ASMJIT_X86_FEATURE(SEV_ES) + ASMJIT_X86_FEATURE(SEV_SNP) ASMJIT_X86_FEATURE(SHA) ASMJIT_X86_FEATURE(SKINIT) ASMJIT_X86_FEATURE(SMAP) ASMJIT_X86_FEATURE(SMEP) ASMJIT_X86_FEATURE(SMX) - ASMJIT_X86_FEATURE(SNP) ASMJIT_X86_FEATURE(SSE) ASMJIT_X86_FEATURE(SSE2) ASMJIT_X86_FEATURE(SSE3) @@ -422,6 +453,7 @@ public: ASMJIT_X86_FEATURE(SSSE3) ASMJIT_X86_FEATURE(SVM) ASMJIT_X86_FEATURE(TBM) + ASMJIT_X86_FEATURE(TSE) ASMJIT_X86_FEATURE(TSX) ASMJIT_X86_FEATURE(TSXLDTRK) ASMJIT_X86_FEATURE(UINTR) @@ -441,81 +473,146 @@ public: }; //! ARM specific features data. + //! + //! Naming reference: + //! - https://developer.arm.com/downloads/-/exploration-tools/feature-names-for-a-profile struct ARM : public Data { //! ARM CPU feature identifiers. enum Id : uint8_t { // @EnumValuesBegin{"enum": "CpuFeatures::ARM"}@ kNone = 0, //!< No feature (never set, used internally). - kTHUMB, //!< THUMB v1 ISA. - kTHUMBv2, //!< THUMB v2 ISA. - kARMv6, //!< ARMv6 ISA. - kARMv7, //!< ARMv7 ISA. - kARMv8a, //!< ARMv8-A ISA. - kARMv8_1a, //!< ARMv8.1-A ISA. - kARMv8_2a, //!< ARMv8.2-A ISA. - kARMv8_3a, //!< ARMv8.3-A ISA. - kARMv8_4a, //!< ARMv8.4-A ISA. - kARMv8_5a, //!< ARMv8.5-A ISA. - kARMv8_6a, //!< ARMv8.6-A ISA. - kARMv8_7a, //!< ARMv8.7-A ISA. + kARMv6, //!< CPU is at least ARMv6 {A32}. + kARMv7, //!< CPU is at least ARMv7 {A32}. + kARMv8a, //!< CPU is at least ARMv8A. + kTHUMB, //!< CPU has THUMB (16-bit THUMB encoding) {A32}. + kTHUMBv2, //!< CPU has THUMBv2 (32-bit THUMB encoding) {A32}. - kVFPv2, //!< CPU has VFPv2 instruction set. - kVFPv3, //!< CPU has VFPv3 instruction set. - kVFPv4, //!< CPU has VFPv4 instruction set. - kVFP_D32, //!< CPU has 32 VFP-D (64-bit) registers. - - kAES, //!< CPU has AES (AArch64 only). - kALTNZCV, //!< CPU has ALTNZCV (AArch64 only). - kASIMD, //!< CPU has Advanced SIMD (NEON on ARM/THUMB). - kBF16, //!< CPU has BF16 (AArch64 only). - kBTI, //!< CPU has BTI (branch target identification). - kCPUID, //!< CPU has accessible CPUID register (ID_AA64ZFR0_EL1). - kCRC32, //!< CPU has CRC32 . - kDGH, //!< CPU has DGH (AArch64 only). - kDIT, //!< CPU has data independent timing instructions (DIT). - kDOTPROD, //!< CPU has DOTPROD (SDOT/UDOT). - kEDSP, //!< CPU has EDSP (ARM/THUMB only). - kFCMA, //!< CPU has FCMA (FCADD/FCMLA). - kFJCVTZS, //!< CPU has FJCVTZS (AArch64 only). - kFLAGM, //!< CPU has FLAGM (AArch64 only). - kFP16CONV, //!< CPU has FP16 (half-float) conversion. - kFP16FML, //!< CPU has FMLAL{2}/FMLSL{2} - kFP16FULL, //!< CPU has full support for FP16. - kFRINT, //!< CPU has FRINT[32|64][X|Z] (AArch64 only). - kI8MM, //!< CPU has I8MM (AArch64 only). - kIDIVA, //!< CPU has hardware SDIV and UDIV (ARM mode). - kIDIVT, //!< CPU has hardware SDIV and UDIV (THUMB mode). - kLSE, //!< CPU has large system extensions (LSE) (AArch64 only). - kMTE, //!< CPU has MTE (AArch64 only). - kRCPC_IMMO, //!< CPU has RCPC_IMMO (AArch64 only). - kRDM, //!< CPU has RDM (AArch64 only). - kPMU, //!< CPU has PMU (AArch64 only). - kPMULL, //!< CPU has PMULL (AArch64 only). - kRNG, //!< CPU has random number generation (RNG). - kSB, //!< CPU has speculative barrier SB (AArch64 only). - kSHA1, //!< CPU has SHA1. - kSHA2, //!< CPU has SHA2. - kSHA3, //!< CPU has SHA3. - kSHA512, //!< CPU has SHA512. - kSM3, //!< CPU has SM3. - kSM4, //!< CPU has SM4. - kSSBS, //!< CPU has SSBS. - kSVE, //!< CPU has SVE (AArch64 only). - kSVE_BF16, //!< CPU has SVE-BF16 (AArch64 only). - kSVE_F32MM, //!< CPU has SVE-F32MM (AArch64 only). - kSVE_F64MM, //!< CPU has SVE-F64MM (AArch64 only). - kSVE_I8MM, //!< CPU has SVE-I8MM (AArch64 only). - kSVE_PMULL, //!< CPU has SVE-PMULL (AArch64 only). - kSVE2, //!< CPU has SVE2 (AArch64 only). - kSVE2_AES, //!< CPU has SVE2-AES (AArch64 only). - kSVE2_BITPERM, //!< CPU has SVE2-BITPERM (AArch64 only). - kSVE2_SHA3, //!< CPU has SVE2-SHA3 (AArch64 only). - kSVE2_SM4, //!< CPU has SVE2-SM4 (AArch64 only). - kTME, //!< CPU has transactional memory extensions (TME). + kAES, //!< CPU has AES (ASIMD AES instructions). + kAFP, //!< CPU has AFP (alternate floating-point behavior) {A64}. + kASIMD, //!< CPU has ASIMD (NEON on ARM/THUMB). + kBF16, //!< CPU has BF16 (BFloat16 instructions) {A64}. + kBTI, //!< CPU has BTI (branch target identification). + kCCIDX, //!< CPU has CCIDX (extend of the CCSIDR number of sets). + kCHK, //!< CPU has CHK (CHKFEAT instruction) {A64}. + kCLRBHB, //!< CPU has CLRBHB (clear BHB instruction). + kCPUID, //!< CPU has CPUID (CPUID registers accessible in user-space). + kCRC32, //!< CPU has CRC32 (CRC32 instructions). + kCSSC, //!< CPU has CSSC (common short sequence compression) {A64}. + kD128, //!< CPU has D128 (128-bit translation tables, 56 bit PA) {A64}. + kDGH, //!< CPU has DGH (data gathering hint) {A64}. + kDIT, //!< CPU has DIT (data independent timing of instructions). + kDOTPROD, //!< CPU has DOTPROD (ASIMD Int8 dot product instructions). + kDPB, //!< CPU has DPB (DC CVAP instruction) {A64}. + kDPB2, //!< CPU has DPB2 (DC CVADP instruction) {A64}. + kEBF16, //!< CPU has EBF16 (extended BFloat16 mode) {A64}. + kECV, //!< CPU has ECV (enhanced counter virtualization). + kEDSP, //!< CPU has EDSP (ARM/THUMB only). + kFCMA, //!< CPU has FCMA (FCADD/FCMLA). + kFGT, //!< CPU has FGT (fine-grained traps). + kFGT2, //!< CPU has FGT2 (fine-grained traps 2). + kFHM, //!< CPU has FHM (half-precision floating-point FMLAL instructions). + kFLAGM, //!< CPU has FLAGM (condition flag manipulation) {A64}. + kFLAGM2, //!< CPU has FLAGM2 (condition flag manipulation version v2) {A64}. + kFMAC, //!< CPU has FMAC (ARM/THUMB only). + kFP, //!< CPU has FP (floating-point) (on 32-bit ARM this means VFPv3). + kFP16, //!< CPU has FP16 (half-precision floating-point data processing). + kFP16CONV, //!< CPU has FP16CONV (half-precision float conversion). + kFRINTTS, //!< CPU has FRINTTS (FRINT[32|64][X|Z] instructions) {A64}. + kGCS, //!< CPU has GCS (guarded control stack extension) {A64}. + kHBC, //!< CPU has HBC (hinted conditional branches) {A64} + kHCX, //!< CPU has HCX (support for the HCRX_EL2 register) {A64}. + kI8MM, //!< CPU has I8MM (int8 matrix multiplication) {A64}. + kIDIVA, //!< CPU has IDIV (hardware SDIV and UDIV in ARM mode). + kIDIVT, //!< CPU has IDIV (hardware SDIV and UDIV in THUMB mode). + kJSCVT, //!< CPU has JSCVT (JavaScript FJCVTS conversion instruction) {A64}. + kLOR, //!< CPU has LOR (limited ordering regions extension). + kLRCPC, //!< CPU has LRCPC (load-acquire RCpc instructions) {A64}. + kLRCPC2, //!< CPU has LRCPC2 (load-acquire RCpc instructions v2) {A64}. + kLRCPC3, //!< CPU has LRCPC3 (load-Acquire RCpc instructions v3) {A64}. + kLS64, //!< CPU has LS64 (64 byte loads/stores without return) {A64}. + kLS64_ACCDATA, //!< CPU has LS64_ACCDATA (64-byte EL0 stores with return) {A64}. + kLS64_V, //!< CPU has LS64_V (64-byte stores with return) {A64}. + kLSE, //!< CPU has LSE (large system extensions) {A64}. + kLSE128, //!< CPU has LSE128 (128-bit atomics) {A64}. + kLSE2, //!< CPU has LSE2 (large system extensions v2) {A64}. + kMOPS, //!< CPU has MOPS (memcpy and memset acceleration instructions) {A64}. + kMPAM, //!< CPU has MPAM (memory system partitioning and monitoring extension) {A64}. + kMTE, //!< CPU has MTE (instruction-only memory tagging extension) {A64}. + kMTE2, //!< CPU has MTE2 (full memory tagging extension) {A64}. + kMTE3, //!< CPU has MTE3 (MTE asymmetric fault handling) {A64}. + kMTE4, //!< CPU has MTE4 (MTE v4) {A64}. + kNMI, //!< CPU has NMI (non-maskable Interrupt) {A64}. + kNV, //!< CPU has NV (nested virtualization enchancement) {A64}. + kNV2, //!< CPU has NV2 (enhanced support for nested virtualization) {A64}. + kPAN, //!< CPU has PAN (privileged access-never extension) {A64}. + kPAN2, //!< CPU has PAN2 (PAN s1e1R and s1e1W variants) {A64}. + kPAN3, //!< CPU has PAN3 (support for SCTLR_ELx.EPAN) {A64}. + kPAUTH, //!< CPU has PAUTH (pointer authentication extension) {A64}. + kPMU, //!< CPU has PMU {A64}. + kPMULL, //!< CPU has PMULL {A64}. + kPRFMSLC, //!< CPU has PRFMSLC (PRFM instructions support the SLC target) {A64} + kRAS, //!< CPU has RAS (reliability, availability and serviceability extensions). + kRAS1_1, //!< CPU has RASv1p1 (RAS v1.1). + kRAS2, //!< CPU has RASv2 (RAS v2). + kRDM, //!< CPU has RDM (rounding double multiply accumulate) {A64}. + kRME, //!< CPU has RME (memory encryption contexts extension) {A64}. + kRNG, //!< CPU has RNG (random number generation). + kRNG_TRAP, //!< CPU has RNG_TRAP (random number trap to EL3 field) {A64}. + kRPRES, //!< CPU has RPRES (increased precision of reciprocal estimate and RSQRT estimate) {A64}. + kRPRFM, //!! CPU has RPRFM (range prefetch hint instruction). + kSB, //!< CPU has SB (speculative barrier). + kSHA1, //!< CPU has SHA1 (ASIMD SHA1 instructions). + kSHA256, //!< CPU has SHA256 (ASIMD SHA256 instructions). + kSHA3, //!< CPU has SHA3 (ASIMD EOR3, RAX1, XAR, and BCAX instructions). + kSHA512, //!< CPU has SHA512 (ASIMD SHA512 instructions). + kSM3, //!< CPU has SM3 (ASIMD SM3 instructions). + kSM4, //!< CPU has SM4 (ASIMD SM4 instructions). + kSME, //!< CPU has SME (SME v1 - scalable matrix extension) {A64}. + kSME2, //!< CPU has SME2 (SME v2) {A64}. + kSME2_1, //!< CPU has SME2p1 (SME v2.1) {A64}. + kSME_B16B16, //!< CPU has SME_B16B16 (SME non-widening BFloat16 to BFloat16 arithmetic) {A64}. + kSME_B16F32, //!< CPU has SME_B16F32 {A64}. + kSME_BI32I32, //!< CPU has SME_BI32I32 {A64}. + kSME_F16F16, //!< CPU has SME_F16F16 (SME2.1 non-widening half-precision FP16 to FP16 arithmetic) {A64}. + kSME_F16F32, //!< CPU has SME_F16F32 {A64}. + kSME_F32F32, //!< CPU has SME_F32F32 {A64}. + kSME_F64F64, //!< CPU has SME_F64F64 {A64}. + kSME_FA64, //!< CPU has SME_FA64 {A64}. + kSME_I16I32, //!< CPU has SME_I16I32 {A64}. + kSME_I16I64, //!< CPU has SME_I16I64 {A64}. + kSME_I8I32, //!< CPU has SME_I8I32 {A64}. + kSPECRES, //!< CPU has SPECRES (speculation restriction instructions). + kSPECRES2, //!< CPU has SPECRES2 (clear other speculative predictions). + kSSBS, //!< CPU has SSBS (speculative store bypass safe instruction). + kSSBS2, //!< CPU has SSBS2 (MRS and MSR instructions for SSBS). + kSVE, //!< CPU has SVE (SVE v1 - scalable vector extension) {A64}. + kSVE2, //!< CPU has SVE2 (SVE v2) {A64}. + kSVE2_1, //!< CPU has SVE2p1 (SVE v2.1) {A64}. + kSVE_AES, //!< CPU has SVE_AES (SVE AES instructions) {A64}. + kSVE_B16B16, //!< CPU has SVE_B16B16 (SVE non-widening BFloat16 to BFloat16 arithmetic) {A64}. + kSVE_BF16, //!< CPU has SVE_BF16 (SVE BF16 instructions) {A64}. + kSVE_BITPERM, //!< CPU has SVE_BITPERM (SVE bit permute) {A64}. + kSVE_EBF16, //!< CPU has SVE_EBF16 (SVE extended BFloat16 mode) {A64}. + kSVE_F32MM, //!< CPU has SVE_F32MM (SVE single-precision floating-point matrix multiply instruction) {A64}. + kSVE_F64MM, //!< CPU has SVE_F64MM (SVE double-precision floating-point matrix multiply instruction) {A64}. + kSVE_I8MM, //!< CPU has SVE_I8MM (SVE int8 matrix multiplication) {A64}. + kSVE_PMULL128, //!< CPU has SVE_PMULL128 (SVE PMULL instructions) {A64}. + kSVE_SHA3, //!< CPU has SVE_SHA3 (SVE SHA-3 instructions) {A64}. + kSVE_SM4, //!< CPU has SVE_SM4 (SVE SM4 instructions {A64}. + kSYSINSTR128, //!< CPU has SYSINSTR128 (128-bit system instructions) {A64}. + kSYSREG128, //!< CPU has SYSREG128 (128-bit system registers) {A64}. + kTHE, //!< CPU has THE (translation hardening extension). + kTME, //!< CPU has TME (transactional memory extensions). + kTRF, //!< CPU has TRF (trace extension). + kUAO, //!< CPU has UAO (AArch64 v8.2 UAO PState) {A64}. + kVFP_D32, //!< CPU has VFP_D32 (32 VFP-D registers) (ARM/THUMB only). + kVHE, //!< CPU has VHE (virtual host extension). + kWFXT, //!< CPU has WFxT (WFE and WFI instructions with timeout) {A64}. + kXS, //!< CPU has XS (XS attribute in TLBI and DSB instructions) {A64}. // @EnumValuesEnd@ - kMaxValue = kTME + kMaxValue = kXS }; #define ASMJIT_ARM_FEATURE(FEATURE) \ @@ -527,67 +624,129 @@ public: ASMJIT_ARM_FEATURE(ARMv6) ASMJIT_ARM_FEATURE(ARMv7) ASMJIT_ARM_FEATURE(ARMv8a) - ASMJIT_ARM_FEATURE(ARMv8_1a) - ASMJIT_ARM_FEATURE(ARMv8_2a) - ASMJIT_ARM_FEATURE(ARMv8_3a) - ASMJIT_ARM_FEATURE(ARMv8_4a) - ASMJIT_ARM_FEATURE(ARMv8_5a) - ASMJIT_ARM_FEATURE(ARMv8_6a) - ASMJIT_ARM_FEATURE(ARMv8_7a) - - ASMJIT_ARM_FEATURE(VFPv2) - ASMJIT_ARM_FEATURE(VFPv3) - ASMJIT_ARM_FEATURE(VFPv4) - ASMJIT_ARM_FEATURE(VFP_D32) ASMJIT_ARM_FEATURE(AES) - ASMJIT_ARM_FEATURE(ALTNZCV) + ASMJIT_ARM_FEATURE(AFP) ASMJIT_ARM_FEATURE(ASIMD) ASMJIT_ARM_FEATURE(BF16) ASMJIT_ARM_FEATURE(BTI) + ASMJIT_ARM_FEATURE(CCIDX) + ASMJIT_ARM_FEATURE(CHK) + ASMJIT_ARM_FEATURE(CLRBHB) ASMJIT_ARM_FEATURE(CPUID) ASMJIT_ARM_FEATURE(CRC32) + ASMJIT_ARM_FEATURE(CSSC) + ASMJIT_ARM_FEATURE(D128) ASMJIT_ARM_FEATURE(DGH) ASMJIT_ARM_FEATURE(DIT) ASMJIT_ARM_FEATURE(DOTPROD) + ASMJIT_ARM_FEATURE(DPB) + ASMJIT_ARM_FEATURE(DPB2) + ASMJIT_ARM_FEATURE(EBF16) + ASMJIT_ARM_FEATURE(ECV) ASMJIT_ARM_FEATURE(EDSP) ASMJIT_ARM_FEATURE(FCMA) + ASMJIT_ARM_FEATURE(FGT) + ASMJIT_ARM_FEATURE(FGT2) + ASMJIT_ARM_FEATURE(FHM) ASMJIT_ARM_FEATURE(FLAGM) + ASMJIT_ARM_FEATURE(FLAGM2) + ASMJIT_ARM_FEATURE(FMAC) + ASMJIT_ARM_FEATURE(FP) + ASMJIT_ARM_FEATURE(FP16) ASMJIT_ARM_FEATURE(FP16CONV) - ASMJIT_ARM_FEATURE(FP16FML) - ASMJIT_ARM_FEATURE(FP16FULL) - ASMJIT_ARM_FEATURE(FRINT) + ASMJIT_ARM_FEATURE(FRINTTS) + ASMJIT_ARM_FEATURE(GCS) + ASMJIT_ARM_FEATURE(HBC) + ASMJIT_ARM_FEATURE(HCX) + ASMJIT_ARM_FEATURE(I8MM) ASMJIT_ARM_FEATURE(IDIVA) ASMJIT_ARM_FEATURE(IDIVT) + ASMJIT_ARM_FEATURE(JSCVT) + ASMJIT_ARM_FEATURE(LOR) + ASMJIT_ARM_FEATURE(LRCPC) + ASMJIT_ARM_FEATURE(LRCPC2) + ASMJIT_ARM_FEATURE(LRCPC3) + ASMJIT_ARM_FEATURE(LS64) + ASMJIT_ARM_FEATURE(LS64_ACCDATA) + ASMJIT_ARM_FEATURE(LS64_V) ASMJIT_ARM_FEATURE(LSE) + ASMJIT_ARM_FEATURE(LSE128) + ASMJIT_ARM_FEATURE(LSE2) + ASMJIT_ARM_FEATURE(MOPS) + ASMJIT_ARM_FEATURE(MPAM) ASMJIT_ARM_FEATURE(MTE) - ASMJIT_ARM_FEATURE(FJCVTZS) - ASMJIT_ARM_FEATURE(I8MM) - ASMJIT_ARM_FEATURE(RCPC_IMMO) - ASMJIT_ARM_FEATURE(RDM) + ASMJIT_ARM_FEATURE(MTE2) + ASMJIT_ARM_FEATURE(MTE3) + ASMJIT_ARM_FEATURE(MTE4) + ASMJIT_ARM_FEATURE(NMI) + ASMJIT_ARM_FEATURE(NV) + ASMJIT_ARM_FEATURE(NV2) + ASMJIT_ARM_FEATURE(PAN) + ASMJIT_ARM_FEATURE(PAN2) + ASMJIT_ARM_FEATURE(PAN3) + ASMJIT_ARM_FEATURE(PAUTH) ASMJIT_ARM_FEATURE(PMU) ASMJIT_ARM_FEATURE(PMULL) + ASMJIT_ARM_FEATURE(PRFMSLC) + ASMJIT_ARM_FEATURE(RAS) + ASMJIT_ARM_FEATURE(RAS1_1) + ASMJIT_ARM_FEATURE(RAS2) + ASMJIT_ARM_FEATURE(RDM) + ASMJIT_ARM_FEATURE(RME) ASMJIT_ARM_FEATURE(RNG) + ASMJIT_ARM_FEATURE(RNG_TRAP) + ASMJIT_ARM_FEATURE(RPRES) + ASMJIT_ARM_FEATURE(RPRFM) ASMJIT_ARM_FEATURE(SB) ASMJIT_ARM_FEATURE(SHA1) - ASMJIT_ARM_FEATURE(SHA2) + ASMJIT_ARM_FEATURE(SHA256) ASMJIT_ARM_FEATURE(SHA3) ASMJIT_ARM_FEATURE(SHA512) ASMJIT_ARM_FEATURE(SM3) ASMJIT_ARM_FEATURE(SM4) + ASMJIT_ARM_FEATURE(SME) + ASMJIT_ARM_FEATURE(SME2) + ASMJIT_ARM_FEATURE(SME2_1) + ASMJIT_ARM_FEATURE(SME_B16B16) + ASMJIT_ARM_FEATURE(SME_B16F32) + ASMJIT_ARM_FEATURE(SME_BI32I32) + ASMJIT_ARM_FEATURE(SME_F16F16) + ASMJIT_ARM_FEATURE(SME_F16F32) + ASMJIT_ARM_FEATURE(SME_F32F32) + ASMJIT_ARM_FEATURE(SME_F64F64) + ASMJIT_ARM_FEATURE(SME_FA64) + ASMJIT_ARM_FEATURE(SME_I16I32) + ASMJIT_ARM_FEATURE(SME_I16I64) + ASMJIT_ARM_FEATURE(SME_I8I32) + ASMJIT_ARM_FEATURE(SPECRES) + ASMJIT_ARM_FEATURE(SPECRES2) ASMJIT_ARM_FEATURE(SSBS) + ASMJIT_ARM_FEATURE(SSBS2) ASMJIT_ARM_FEATURE(SVE) + ASMJIT_ARM_FEATURE(SVE2) + ASMJIT_ARM_FEATURE(SVE2_1) + ASMJIT_ARM_FEATURE(SVE_AES) + ASMJIT_ARM_FEATURE(SVE_B16B16) ASMJIT_ARM_FEATURE(SVE_BF16) + ASMJIT_ARM_FEATURE(SVE_BITPERM) + ASMJIT_ARM_FEATURE(SVE_EBF16) ASMJIT_ARM_FEATURE(SVE_F32MM) ASMJIT_ARM_FEATURE(SVE_F64MM) ASMJIT_ARM_FEATURE(SVE_I8MM) - ASMJIT_ARM_FEATURE(SVE_PMULL) - ASMJIT_ARM_FEATURE(SVE2) - ASMJIT_ARM_FEATURE(SVE2_AES) - ASMJIT_ARM_FEATURE(SVE2_BITPERM) - ASMJIT_ARM_FEATURE(SVE2_SHA3) - ASMJIT_ARM_FEATURE(SVE2_SM4) + ASMJIT_ARM_FEATURE(SVE_PMULL128) + ASMJIT_ARM_FEATURE(SVE_SHA3) + ASMJIT_ARM_FEATURE(SVE_SM4) + ASMJIT_ARM_FEATURE(SYSINSTR128) + ASMJIT_ARM_FEATURE(SYSREG128) + ASMJIT_ARM_FEATURE(THE) ASMJIT_ARM_FEATURE(TME) + ASMJIT_ARM_FEATURE(TRF) + ASMJIT_ARM_FEATURE(UAO) + ASMJIT_ARM_FEATURE(VFP_D32) + ASMJIT_ARM_FEATURE(VHE) + ASMJIT_ARM_FEATURE(WFXT) + ASMJIT_ARM_FEATURE(XS) #undef ASMJIT_ARM_FEATURE }; @@ -661,6 +820,10 @@ public: template inline bool has(const FeatureId& featureId) const noexcept { return _data.has(featureId); } + //! Tests whether any of the features is present. + template + inline bool hasAny(Args&&... args) const noexcept { return _data.hasAny(std::forward(args)...); } + //! Tests whether all features as defined by `other` are present. inline bool hasAll(const CpuFeatures& other) const noexcept { return _data.hasAll(other._data); } @@ -775,33 +938,47 @@ public: //! Returns the CPU family ID. //! - //! Family identifier matches the FamilyId read by using CPUID on X86 architecture. + //! The information provided depends on architecture and OS: + //! - X86: + //! - Family identifier matches the FamilyId read by using CPUID. + //! - ARM: + //! - Apple - returns Apple Family identifier returned by sysctlbyname("hw.cpufamily"). inline uint32_t familyId() const noexcept { return _familyId; } //! Returns the CPU model ID. //! - //! Family identifier matches the ModelId read by using CPUID on X86 architecture. - + //! The information provided depends on architecture and OS: + //! - X86: + //! - Model identifier matches the ModelId read by using CPUID. inline uint32_t modelId() const noexcept { return _modelId; } + //! Returns the CPU brand id. //! - //! Family identifier matches the BrandId read by using CPUID on X86 architecture. + //! The information provided depends on architecture and OS: + //! - X86: + //! - Brand identifier matches the BrandId read by using CPUID. inline uint32_t brandId() const noexcept { return _brandId; } //! Returns the CPU stepping. //! - //! Family identifier matches the Stepping information read by using CPUID on X86 architecture. + //! The information provided depends on architecture and OS: + //! - X86: + //! - Stepping identifier matches the Stepping information read by using CPUID. inline uint32_t stepping() const noexcept { return _stepping; } //! Returns the processor type. //! - //! Family identifier matches the ProcessorType read by using CPUID on X86 architecture. + //! The information provided depends on architecture and OS: + //! - X86: + //! - Processor type identifier matches the ProcessorType read by using CPUID. inline uint32_t processorType() const noexcept { return _processorType; } //! Returns the maximum number of logical processors. inline uint32_t maxLogicalProcessors() const noexcept { return _maxLogicalProcessors; } - //! Returns the size of a cache line flush. + //! Returns the size of a CPU cache line. + //! + //! On a multi-architecture system this should return the smallest cache line of all CPUs. inline uint32_t cacheLineSize() const noexcept { return _cacheLineSize; } //! Returns number of hardware threads available. diff --git a/src/asmjit/core/formatter.cpp b/src/asmjit/core/formatter.cpp index 5ed858f..3fd5137 100644 --- a/src/asmjit/core/formatter.cpp +++ b/src/asmjit/core/formatter.cpp @@ -107,7 +107,7 @@ Error formatFeature( return x86::FormatterInternal::formatFeature(sb, featureId); #endif -#if !defined(ASMJIT_NO_AARCH32) && !defined(ASMJIT_NO_AARCH64) +#if !defined(ASMJIT_NO_AARCH64) if (Environment::isFamilyARM(arch)) return arm::FormatterInternal::formatFeature(sb, featureId); #endif diff --git a/src/asmjit/core/inst.h b/src/asmjit/core/inst.h index 06302b9..17f53dc 100644 --- a/src/asmjit/core/inst.h +++ b/src/asmjit/core/inst.h @@ -312,6 +312,17 @@ public: return id | (uint32_t(cc) << Support::ConstCTZ::value); } + static inline constexpr InstId composeARMInstId(uint32_t id, arm::DataType dt, arm::CondCode cc = arm::CondCode::kAL) noexcept { + return id | (uint32_t(dt) << Support::ConstCTZ::value) + | (uint32_t(cc) << Support::ConstCTZ::value); + } + + static inline constexpr InstId composeARMInstId(uint32_t id, arm::DataType dt, arm::DataType dt2, arm::CondCode cc = arm::CondCode::kAL) noexcept { + return id | (uint32_t(dt) << Support::ConstCTZ::value) + | (uint32_t(dt2) << Support::ConstCTZ::value) + | (uint32_t(cc) << Support::ConstCTZ::value); + } + static inline constexpr InstId extractRealId(uint32_t id) noexcept { return id & uint32_t(InstIdParts::kRealId); } diff --git a/src/asmjit/core/operand.h b/src/asmjit/core/operand.h index 634acec..3f0f855 100644 --- a/src/asmjit/core/operand.h +++ b/src/asmjit/core/operand.h @@ -354,6 +354,9 @@ struct OperandSignature { inline constexpr OperandSignature subset(uint32_t mask) const noexcept { return OperandSignature{_bits & mask}; } + template::value> + inline constexpr OperandSignature replacedValue(uint32_t value) const noexcept { return OperandSignature{(_bits & ~kFieldMask) | (value << kFieldShift)}; } + template inline constexpr bool matchesSignature(const OperandSignature& signature) const noexcept { return (_bits & kFieldMask) == signature._bits; diff --git a/src/asmjit/core/support.h b/src/asmjit/core/support.h index b155cdf..2313696 100644 --- a/src/asmjit/core/support.h +++ b/src/asmjit/core/support.h @@ -179,7 +179,7 @@ static constexpr X sar(const X& x, const Y& y) noexcept { template static constexpr X ror(const X& x, const Y& y) noexcept { typedef typename std::make_unsigned::type U; - return X((U(x) >> y) | (U(x) << (bitSizeOf() - y))); + return X((U(x) >> y) | (U(x) << (bitSizeOf() - U(y)))); } //! Returns `x | (x >> y)` - helper used by some bit manipulation helpers. diff --git a/src/asmjit/core/virtmem.cpp b/src/asmjit/core/virtmem.cpp index 9aead9c..f03ae5d 100644 --- a/src/asmjit/core/virtmem.cpp +++ b/src/asmjit/core/virtmem.cpp @@ -381,7 +381,7 @@ static int getOSXVersion() noexcept { if (!ver) { struct utsname osname {}; uname(&osname); - ver = atoi(osname.release); + ver = strtol(osname.release, nullptr, 10); globalVersion.store(ver); } diff --git a/src/asmjit/x86/x86assembler.cpp b/src/asmjit/x86/x86assembler.cpp index 6a4d512..6eabd2e 100644 --- a/src/asmjit/x86/x86assembler.cpp +++ b/src/asmjit/x86/x86assembler.cpp @@ -954,7 +954,7 @@ CaseX86M_GPB_MulDiv: break; case InstDB::kEncodingX86Mr: - opcode.addPrefixBySize(o0.size()); + opcode.addPrefixBySize(o1.size()); ASMJIT_FALLTHROUGH; case InstDB::kEncodingX86Mr_NoSize: @@ -3010,6 +3010,14 @@ CaseExtRm: goto CaseVexMri; + case InstDB::kEncodingVexMvr_Wx: + if (isign3 == ENC_OPS3(Mem, Reg, Reg)) { + opcode.addWIf(unsigned(Reg::isGpq(o1))); + opReg = x86PackRegAndVvvvv(o1.id(), o2.id()); + rmRel = &o0; + goto EmitVexEvexM; + } + case InstDB::kEncodingVexMri_Lx: opcode |= x86OpcodeLBySize(o0.size() | o1.size()); ASMJIT_FALLTHROUGH; diff --git a/src/asmjit/x86/x86emitter.h b/src/asmjit/x86/x86emitter.h index 1f85dec..5ce198e 100644 --- a/src/asmjit/x86/x86emitter.h +++ b/src/asmjit/x86/x86emitter.h @@ -471,7 +471,6 @@ public: ASMJIT_INST_3x(idiv, Idiv, Gp, Gp, Mem) // ANY [EXPLICIT] xDX[Rem]:xAX[Quot] <- xDX:xAX / m16|m32|m64 ASMJIT_INST_2x(imul, Imul, Gp, Gp) // ANY [EXPLICIT] AX <- AL * r8 | ra <- ra * rb ASMJIT_INST_2x(imul, Imul, Gp, Mem) // ANY [EXPLICIT] AX <- AL * m8 | ra <- ra * m16|m32|m64 - ASMJIT_INST_2x(imul, Imul, Gp, Imm) // ANY ASMJIT_INST_3x(imul, Imul, Gp, Gp, Imm) // ANY ASMJIT_INST_3x(imul, Imul, Gp, Mem, Imm) // ANY ASMJIT_INST_3x(imul, Imul, Gp, Gp, Gp) // ANY [EXPLICIT] xDX:xAX <- xAX * r16|r32|r64 @@ -633,6 +632,14 @@ public: //! \} + //! \name Core Instructions (Aliases) + //! \{ + + //! The `imul(Gp, Imm)` instruction is an alias of `imul(Gp, Gp, Imm)` instruction. + inline Error imul(const Gp& o0, const Imm& o1) { return _emitter()->_emitI(Inst::kIdImul, o0, o0, o1); } + + //! \} + //! \name Deprecated 32-bit Instructions //! \{ @@ -679,14 +686,6 @@ public: //! \} - //! \name LAHF/SAHF Instructions - //! \{ - - ASMJIT_INST_1x(lahf, Lahf, Gp_AH) // LAHFSAHF [EXPLICIT] AH <- EFL - ASMJIT_INST_1x(sahf, Sahf, Gp_AH) // LAHFSAHF [EXPLICIT] EFL <- AH - - //! \} - //! \name ADX Instructions //! \{ @@ -697,13 +696,18 @@ public: //! \} - //! \name LZCNT/POPCNT Instructions + //! \name CPUID Instruction //! \{ - ASMJIT_INST_2x(lzcnt, Lzcnt, Gp, Gp) // LZCNT - ASMJIT_INST_2x(lzcnt, Lzcnt, Gp, Mem) // LZCNT - ASMJIT_INST_2x(popcnt, Popcnt, Gp, Gp) // POPCNT - ASMJIT_INST_2x(popcnt, Popcnt, Gp, Mem) // POPCNT + ASMJIT_INST_4x(cpuid, Cpuid, Gp_EAX, Gp_EBX, Gp_ECX, Gp_EDX) // I486 [EXPLICIT] EAX:EBX:ECX:EDX <- CPUID[EAX:ECX] + + //! \} + + //! \name LAHF/SAHF Instructions + //! \{ + + ASMJIT_INST_1x(lahf, Lahf, Gp_AH) // LAHFSAHF [EXPLICIT] AH <- EFL + ASMJIT_INST_1x(sahf, Sahf, Gp_AH) // LAHFSAHF [EXPLICIT] EFL <- AH //! \} @@ -747,27 +751,36 @@ public: //! \} - //! \name TBM Instructions + //! \name CMPCCXADD Instructions //! \{ - ASMJIT_INST_2x(blcfill, Blcfill, Gp, Gp) // TBM - ASMJIT_INST_2x(blcfill, Blcfill, Gp, Mem) // TBM - ASMJIT_INST_2x(blci, Blci, Gp, Gp) // TBM - ASMJIT_INST_2x(blci, Blci, Gp, Mem) // TBM - ASMJIT_INST_2x(blcic, Blcic, Gp, Gp) // TBM - ASMJIT_INST_2x(blcic, Blcic, Gp, Mem) // TBM - ASMJIT_INST_2x(blcmsk, Blcmsk, Gp, Gp) // TBM - ASMJIT_INST_2x(blcmsk, Blcmsk, Gp, Mem) // TBM - ASMJIT_INST_2x(blcs, Blcs, Gp, Gp) // TBM - ASMJIT_INST_2x(blcs, Blcs, Gp, Mem) // TBM - ASMJIT_INST_2x(blsfill, Blsfill, Gp, Gp) // TBM - ASMJIT_INST_2x(blsfill, Blsfill, Gp, Mem) // TBM - ASMJIT_INST_2x(blsic, Blsic, Gp, Gp) // TBM - ASMJIT_INST_2x(blsic, Blsic, Gp, Mem) // TBM - ASMJIT_INST_2x(t1mskc, T1mskc, Gp, Gp) // TBM - ASMJIT_INST_2x(t1mskc, T1mskc, Gp, Mem) // TBM - ASMJIT_INST_2x(tzmsk, Tzmsk, Gp, Gp) // TBM - ASMJIT_INST_2x(tzmsk, Tzmsk, Gp, Mem) // TBM + ASMJIT_INST_3x(cmpbexadd, Cmpbexadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpbxadd, Cmpbxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmplexadd, Cmplexadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmplxadd, Cmplxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpnbexadd, Cmpnbexadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpnbxadd, Cmpnbxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpnlexadd, Cmpnlexadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpnlxadd, Cmpnlxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpnoxadd, Cmpnoxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpnpxadd, Cmpnpxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpnsxadd, Cmpnsxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpnzxadd, Cmpnzxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpoxadd, Cmpoxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmppxadd, Cmppxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpsxadd, Cmpsxadd, Mem, Gp, Gp) + ASMJIT_INST_3x(cmpzxadd, Cmpzxadd, Mem, Gp, Gp) + + //! \} + + //! \name CacheLine Instructions + //! \{ + + ASMJIT_INST_1x(cldemote, Cldemote, Mem) // CLDEMOTE + ASMJIT_INST_1x(clflush, Clflush, Mem) // CLFLUSH + ASMJIT_INST_1x(clflushopt, Clflushopt, Mem) // CLFLUSH_OPT + ASMJIT_INST_1x(clwb, Clwb, Mem) // CLWB + ASMJIT_INST_1x(clzero, Clzero, DS_ZAX) // CLZERO [EXPLICIT] //! \} @@ -779,6 +792,23 @@ public: //! \} + //! \name FENCE Instructions (SSE and SSE2) + //! \{ + + ASMJIT_INST_0x(lfence, Lfence) // SSE2 + ASMJIT_INST_0x(mfence, Mfence) // SSE2 + ASMJIT_INST_0x(sfence, Sfence) // SSE + + //! \} + + //! \name LZCNT Instructions + //! \{ + + ASMJIT_INST_2x(lzcnt, Lzcnt, Gp, Gp) // LZCNT + ASMJIT_INST_2x(lzcnt, Lzcnt, Gp, Mem) // LZCNT + + //! \} + //! \name MOVBE Instructions //! \{ @@ -803,12 +833,11 @@ public: //! \} - //! \name FENCE Instructions (SSE and SSE2) + //! \name POPCNT Instructions //! \{ - ASMJIT_INST_0x(lfence, Lfence) // SSE2 - ASMJIT_INST_0x(mfence, Mfence) // SSE2 - ASMJIT_INST_0x(sfence, Sfence) // SSE + ASMJIT_INST_2x(popcnt, Popcnt, Gp, Gp) // POPCNT + ASMJIT_INST_2x(popcnt, Popcnt, Gp, Mem) // POPCNT //! \} @@ -825,28 +854,21 @@ public: //! \} - //! \name CPUID Instruction + //! \name PREFETCHI Instructions //! \{ - ASMJIT_INST_4x(cpuid, Cpuid, Gp_EAX, Gp_EBX, Gp_ECX, Gp_EDX) // I486 [EXPLICIT] EAX:EBX:ECX:EDX <- CPUID[EAX:ECX] + ASMJIT_INST_1x(prefetchit0, Prefetchit0, Mem) + ASMJIT_INST_1x(prefetchit1, Prefetchit1, Mem) //! \} - //! \name CacheLine Instructions + //! \name RAO_INT Instructions //! \{ - ASMJIT_INST_1x(cldemote, Cldemote, Mem) // CLDEMOTE - ASMJIT_INST_1x(clflush, Clflush, Mem) // CLFLUSH - ASMJIT_INST_1x(clflushopt, Clflushopt, Mem) // CLFLUSH_OPT - ASMJIT_INST_1x(clwb, Clwb, Mem) // CLWB - ASMJIT_INST_1x(clzero, Clzero, DS_ZAX) // CLZERO [EXPLICIT] - - //! \} - - //! \name SERIALIZE Instruction - //! \{ - - ASMJIT_INST_0x(serialize, Serialize) // SERIALIZE + ASMJIT_INST_2x(aadd, Aadd, Mem, Gp) + ASMJIT_INST_2x(aand, Aand, Mem, Gp) + ASMJIT_INST_2x(aor, Aor, Mem, Gp) + ASMJIT_INST_2x(axor, Axor, Mem, Gp) //! \} @@ -873,6 +895,37 @@ public: //! \} + //! \name SERIALIZE Instruction + //! \{ + + ASMJIT_INST_0x(serialize, Serialize) // SERIALIZE + + //! \} + + //! \name TBM Instructions + //! \{ + + ASMJIT_INST_2x(blcfill, Blcfill, Gp, Gp) // TBM + ASMJIT_INST_2x(blcfill, Blcfill, Gp, Mem) // TBM + ASMJIT_INST_2x(blci, Blci, Gp, Gp) // TBM + ASMJIT_INST_2x(blci, Blci, Gp, Mem) // TBM + ASMJIT_INST_2x(blcic, Blcic, Gp, Gp) // TBM + ASMJIT_INST_2x(blcic, Blcic, Gp, Mem) // TBM + ASMJIT_INST_2x(blcmsk, Blcmsk, Gp, Gp) // TBM + ASMJIT_INST_2x(blcmsk, Blcmsk, Gp, Mem) // TBM + ASMJIT_INST_2x(blcs, Blcs, Gp, Gp) // TBM + ASMJIT_INST_2x(blcs, Blcs, Gp, Mem) // TBM + ASMJIT_INST_2x(blsfill, Blsfill, Gp, Gp) // TBM + ASMJIT_INST_2x(blsfill, Blsfill, Gp, Mem) // TBM + ASMJIT_INST_2x(blsic, Blsic, Gp, Gp) // TBM + ASMJIT_INST_2x(blsic, Blsic, Gp, Mem) // TBM + ASMJIT_INST_2x(t1mskc, T1mskc, Gp, Gp) // TBM + ASMJIT_INST_2x(t1mskc, T1mskc, Gp, Mem) // TBM + ASMJIT_INST_2x(tzmsk, Tzmsk, Gp, Gp) // TBM + ASMJIT_INST_2x(tzmsk, Tzmsk, Gp, Mem) // TBM + + //! \} + //! \name Other User-Mode Instructions //! \{ @@ -1122,6 +1175,14 @@ public: //! \} + //! \name INVLPGB Instructions + //! \{ + + ASMJIT_INST_3x(invlpgb, Invlpgb, Gp_EAX, Gp_EDX, Gp_ECX) + ASMJIT_INST_0x(tlbsync, Tlbsync) + + //! \} + //! \name MONITOR Instructions (Privileged) //! \{ @@ -1172,6 +1233,7 @@ public: ASMJIT_INST_0x(vmresume, Vmresume) // VMX ASMJIT_INST_2x(vmwrite, Vmwrite, Gp, Mem) // VMX ASMJIT_INST_2x(vmwrite, Vmwrite, Gp, Gp) // VMX + ASMJIT_INST_0x(vmxoff, Vmxoff) // VMX ASMJIT_INST_1x(vmxon, Vmxon, Mem) // VMX //! \} @@ -1188,6 +1250,13 @@ public: //! \} + //! \name SEV_ES Instructions + //! \{ + + ASMJIT_INST_0x(vmgexit, Vmgexit) + + //! \} + //! \name FPU Instructions //! \{ @@ -3659,6 +3728,83 @@ public: //! \} + //! \name AVX_NE_CONVERT Instructions + //! \{ + + ASMJIT_INST_2x(vbcstnebf162ps, Vbcstnebf162ps, Vec, Mem) + ASMJIT_INST_2x(vbcstnesh2ps, Vbcstnesh2ps, Vec, Mem) + ASMJIT_INST_2x(vcvtneebf162ps, Vcvtneebf162ps, Vec, Mem) + ASMJIT_INST_2x(vcvtneeph2ps, Vcvtneeph2ps, Vec, Mem) + ASMJIT_INST_2x(vcvtneobf162ps, Vcvtneobf162ps, Vec, Mem) + ASMJIT_INST_2x(vcvtneoph2ps, Vcvtneoph2ps, Vec, Mem) + + //! \} + + //! \name AVX_VNNI_INT8 Instructions + //! \{ + + ASMJIT_INST_3x(vpdpbssd, Vpdpbssd, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpbssd, Vpdpbssd, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpbssds, Vpdpbssds, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpbssds, Vpdpbssds, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpbsud, Vpdpbsud, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpbsud, Vpdpbsud, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpbsuds, Vpdpbsuds, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpbsuds, Vpdpbsuds, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpbuud, Vpdpbuud, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpbuud, Vpdpbuud, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpbuuds, Vpdpbuuds, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpbuuds, Vpdpbuuds, Vec, Vec, Mem) + + //! \} + + //! \name AVX_VNNI_INT16 Instructions + //! \{ + + ASMJIT_INST_3x(vpdpwsud, Vpdpwsud, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpwsud, Vpdpwsud, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpwsuds, Vpdpwsuds, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpwsuds, Vpdpwsuds, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpwusd, Vpdpwusd, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpwusd, Vpdpwusd, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpwusds, Vpdpwusds, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpwusds, Vpdpwusds, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpwuud, Vpdpwuud, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpwuud, Vpdpwuud, Vec, Vec, Mem) + ASMJIT_INST_3x(vpdpwuuds, Vpdpwuuds, Vec, Vec, Vec) + ASMJIT_INST_3x(vpdpwuuds, Vpdpwuuds, Vec, Vec, Mem) + + //! \} + + //! \name AVX+SHA512 Instructions + //! \{ + ASMJIT_INST_2x(vsha512msg1, Vsha512msg1, Vec, Vec) + ASMJIT_INST_2x(vsha512msg2, Vsha512msg2, Vec, Vec) + ASMJIT_INST_3x(vsha512rnds2, Vsha512rnds2, Vec, Vec, Vec) + //! \} + + //! \name AVX+SM3 Instructions + //! \{ + + ASMJIT_INST_3x(vsm3msg1, Vsm3msg1, Vec, Vec, Vec) + ASMJIT_INST_3x(vsm3msg1, Vsm3msg1, Vec, Vec, Mem) + ASMJIT_INST_3x(vsm3msg2, Vsm3msg2, Vec, Vec, Vec) + ASMJIT_INST_3x(vsm3msg2, Vsm3msg2, Vec, Vec, Mem) + ASMJIT_INST_4x(vsm3rnds2, Vsm3rnds2, Vec, Vec, Vec, Imm) + ASMJIT_INST_4x(vsm3rnds2, Vsm3rnds2, Vec, Vec, Mem, Imm) + + //! \} + + //! \name AVX+SM4 Instructions + //! \{ + + ASMJIT_INST_3x(vsm4key4, Vsm4key4, Vec, Vec, Vec) + ASMJIT_INST_3x(vsm4key4, Vsm4key4, Vec, Vec, Mem) + ASMJIT_INST_3x(vsm4rnds4, Vsm4rnds4, Vec, Vec, Vec) + ASMJIT_INST_3x(vsm4rnds4, Vsm4rnds4, Vec, Vec, Mem) + + //! \} + //! \name AVX512_FP16 Instructions //! \{ @@ -3880,22 +4026,48 @@ public: //! \} - //! \name AMX Instructions + //! \name AMX_TILE Instructions //! \{ - ASMJIT_INST_1x(ldtilecfg, Ldtilecfg, Mem) // AMX_TILE - ASMJIT_INST_1x(sttilecfg, Sttilecfg, Mem) // AMX_TILE - ASMJIT_INST_2x(tileloadd, Tileloadd, Tmm, Mem) // AMX_TILE - ASMJIT_INST_2x(tileloaddt1, Tileloaddt1, Tmm, Mem) // AMX_TILE - ASMJIT_INST_0x(tilerelease, Tilerelease) // AMX_TILE - ASMJIT_INST_2x(tilestored, Tilestored, Mem, Tmm) // AMX_TILE - ASMJIT_INST_1x(tilezero, Tilezero, Tmm) // AMX_TILE + ASMJIT_INST_1x(ldtilecfg, Ldtilecfg, Mem) + ASMJIT_INST_1x(sttilecfg, Sttilecfg, Mem) + ASMJIT_INST_2x(tileloadd, Tileloadd, Tmm, Mem) + ASMJIT_INST_2x(tileloaddt1, Tileloaddt1, Tmm, Mem) + ASMJIT_INST_0x(tilerelease, Tilerelease) + ASMJIT_INST_2x(tilestored, Tilestored, Mem, Tmm) + ASMJIT_INST_1x(tilezero, Tilezero, Tmm) - ASMJIT_INST_3x(tdpbf16ps, Tdpbf16ps, Tmm, Tmm, Tmm) // AMX_BF16 - ASMJIT_INST_3x(tdpbssd, Tdpbssd, Tmm, Tmm, Tmm) // AMX_INT8 - ASMJIT_INST_3x(tdpbsud, Tdpbsud, Tmm, Tmm, Tmm) // AMX_INT8 - ASMJIT_INST_3x(tdpbusd, Tdpbusd, Tmm, Tmm, Tmm) // AMX_INT8 - ASMJIT_INST_3x(tdpbuud, Tdpbuud, Tmm, Tmm, Tmm) // AMX_INT8 + //! \} + + //! \name AMX_BF16 Instructions + //! \{ + + ASMJIT_INST_3x(tdpbf16ps, Tdpbf16ps, Tmm, Tmm, Tmm) + + //! \} + + //! \name AMX_COMPLEX Instructions + //! \{ + + ASMJIT_INST_3x(tcmmimfp16ps, Tcmmimfp16ps, Tmm, Tmm, Tmm) + ASMJIT_INST_3x(tcmmrlfp16ps, Tcmmrlfp16ps, Tmm, Tmm, Tmm) + + //! \} + + //! \name AMX_FP16 Instructions + //! \{ + + ASMJIT_INST_3x(tdpfp16ps, Tdpfp16ps, Tmm, Tmm, Tmm) + + //! \} + + //! \name AMX_INT8 Instructions + //! \{ + + ASMJIT_INST_3x(tdpbssd, Tdpbssd, Tmm, Tmm, Tmm) + ASMJIT_INST_3x(tdpbsud, Tdpbsud, Tmm, Tmm, Tmm) + ASMJIT_INST_3x(tdpbusd, Tdpbusd, Tmm, Tmm, Tmm) + ASMJIT_INST_3x(tdpbuud, Tdpbuud, Tmm, Tmm, Tmm) //! \} }; @@ -4167,6 +4339,16 @@ struct EmitterImplicitT : public EmitterExplicitT { //! \} + //! \name SEAM Instructions + //! \{ + + ASMJIT_INST_0x(seamcall, Seamcall) + ASMJIT_INST_0x(seamops, Seamops) + ASMJIT_INST_0x(seamret, Seamret) + ASMJIT_INST_0x(tdcall, Tdcall) + + //! \} + //! \name Privileged Instructions //! \{ diff --git a/src/asmjit/x86/x86formatter.cpp b/src/asmjit/x86/x86formatter.cpp index 715432e..a2004c2 100644 --- a/src/asmjit/x86/x86formatter.cpp +++ b/src/asmjit/x86/x86formatter.cpp @@ -198,9 +198,11 @@ Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept "AESNI\0" "ALTMOVCR8\0" "AMX_BF16\0" + "AMX_COMPLEX\0" "AMX_FP16\0" "AMX_INT8\0" "AMX_TILE\0" + "APX_F\0" "AVX\0" "AVX2\0" "AVX512_4FMAPS\0" @@ -208,13 +210,13 @@ Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept "AVX512_BF16\0" "AVX512_BITALG\0" "AVX512_BW\0" - "AVX512_CDI\0" + "AVX512_CD\0" "AVX512_DQ\0" - "AVX512_ERI\0" + "AVX512_ER\0" "AVX512_F\0" "AVX512_FP16\0" "AVX512_IFMA\0" - "AVX512_PFI\0" + "AVX512_PF\0" "AVX512_VBMI\0" "AVX512_VBMI2\0" "AVX512_VL\0" @@ -224,6 +226,7 @@ Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept "AVX_IFMA\0" "AVX_NE_CONVERT\0" "AVX_VNNI\0" + "AVX_VNNI_INT16\0" "AVX_VNNI_INT8\0" "BMI\0" "BMI2\0" @@ -258,6 +261,7 @@ Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept "HLE\0" "HRESET\0" "I486\0" + "INVLPGB\0" "LAHFSAHF\0" "LAM\0" "LWP\0" @@ -284,6 +288,7 @@ Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept "PREFETCHWT1\0" "PTWRITE\0" "RAO_INT\0" + "RMPQUERY\0" "RDPID\0" "RDPRU\0" "RDRAND\0" @@ -291,13 +296,20 @@ Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept "RDTSC\0" "RDTSCP\0" "RTM\0" + "SEAM\0" "SERIALIZE\0" + "SEV\0" + "SEV_ES\0" + "SEV_SNP\0" "SHA\0" + "SHA512\0" "SKINIT\0" + "SM3\0" + "SM4\0" "SMAP\0" + "SME\0" "SMEP\0" "SMX\0" - "SNP\0" "SSE\0" "SSE2\0" "SSE3\0" @@ -307,6 +319,7 @@ Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept "SSSE3\0" "SVM\0" "TBM\0" + "TSE\0" "TSX\0" "TSXLDTRK\0" "UINTR\0" @@ -324,15 +337,16 @@ Error FormatterInternal::formatFeature(String& sb, uint32_t featureId) noexcept "\0"; static const uint16_t sFeatureIndex[] = { - 0, 5, 8, 11, 17, 24, 28, 34, 44, 53, 62, 71, 80, 84, 89, 103, 117, 129, 143, - 153, 164, 174, 185, 194, 206, 218, 229, 241, 254, 264, 276, 296, 313, 322, - 337, 346, 360, 364, 369, 377, 384, 392, 401, 409, 420, 425, 432, 437, 447, - 458, 468, 474, 481, 486, 491, 495, 500, 504, 513, 518, 523, 528, 533, 541, - 546, 552, 557, 561, 568, 573, 582, 586, 590, 596, 604, 608, 613, 621, 630, - 636, 646, 654, 658, 662, 670, 675, 683, 689, 699, 707, 714, 724, 734, 746, - 754, 762, 768, 774, 781, 788, 794, 801, 805, 815, 819, 826, 831, 836, 840, - 844, 848, 853, 858, 865, 872, 878, 884, 888, 892, 896, 905, 911, 916, 920, - 931, 939, 948, 956, 960, 966, 973, 982, 989 + 0, 5, 8, 11, 17, 24, 28, 34, 44, 53, 65, 74, 83, 92, 98, 102, 107, 121, 135, + 147, 161, 171, 181, 191, 201, 210, 222, 234, 244, 256, 269, 279, 291, 311, + 328, 337, 352, 361, 376, 390, 394, 399, 407, 414, 422, 431, 439, 450, 455, + 462, 467, 477, 488, 498, 504, 511, 516, 521, 525, 530, 534, 543, 548, 553, + 558, 563, 571, 576, 582, 587, 591, 598, 603, 611, 620, 624, 628, 634, 642, + 646, 651, 659, 668, 674, 684, 692, 696, 700, 708, 713, 721, 727, 737, 745, + 752, 762, 772, 784, 792, 800, 809, 815, 821, 828, 835, 841, 848, 852, 857, + 867, 871, 878, 886, 890, 897, 904, 908, 912, 917, 921, 926, 930, 934, 939, + 944, 951, 958, 964, 970, 974, 978, 982, 986, 995, 1001, 1006, 1010, 1021, + 1029, 1038, 1046, 1050, 1056, 1063, 1072, 1079 }; // @EnumStringEnd@ diff --git a/src/asmjit/x86/x86globals.h b/src/asmjit/x86/x86globals.h index 7f1566d..863d8f5 100644 --- a/src/asmjit/x86/x86globals.h +++ b/src/asmjit/x86/x86globals.h @@ -119,7 +119,9 @@ namespace Inst { kIdNone = 0, //!< Invalid instruction id. kIdAaa, //!< Instruction 'aaa' (X86). kIdAad, //!< Instruction 'aad' (X86). + kIdAadd, //!< Instruction 'aadd' {RAO_INT}. kIdAam, //!< Instruction 'aam' (X86). + kIdAand, //!< Instruction 'aand' {RAO_INT}. kIdAas, //!< Instruction 'aas' (X86). kIdAdc, //!< Instruction 'adc'. kIdAdcx, //!< Instruction 'adcx' {ADX}. @@ -143,7 +145,9 @@ namespace Inst { kIdAndnps, //!< Instruction 'andnps' {SSE}. kIdAndpd, //!< Instruction 'andpd' {SSE2}. kIdAndps, //!< Instruction 'andps' {SSE}. + kIdAor, //!< Instruction 'aor' {RAO_INT}. kIdArpl, //!< Instruction 'arpl' (X86). + kIdAxor, //!< Instruction 'axor' {RAO_INT}. kIdBextr, //!< Instruction 'bextr' {BMI}. kIdBlcfill, //!< Instruction 'blcfill' {TBM}. kIdBlci, //!< Instruction 'blci' {TBM}. @@ -224,14 +228,30 @@ namespace Inst { kIdCmovs, //!< Instruction 'cmovs' {CMOV}. kIdCmovz, //!< Instruction 'cmovz' {CMOV}. kIdCmp, //!< Instruction 'cmp'. + kIdCmpbexadd, //!< Instruction 'cmpbexadd' {CMPCCXADD}. + kIdCmpbxadd, //!< Instruction 'cmpbxadd' {CMPCCXADD}. + kIdCmplexadd, //!< Instruction 'cmplexadd' {CMPCCXADD}. + kIdCmplxadd, //!< Instruction 'cmplxadd' {CMPCCXADD}. + kIdCmpnbexadd, //!< Instruction 'cmpnbexadd' {CMPCCXADD}. + kIdCmpnbxadd, //!< Instruction 'cmpnbxadd' {CMPCCXADD}. + kIdCmpnlexadd, //!< Instruction 'cmpnlexadd' {CMPCCXADD}. + kIdCmpnlxadd, //!< Instruction 'cmpnlxadd' {CMPCCXADD}. + kIdCmpnoxadd, //!< Instruction 'cmpnoxadd' {CMPCCXADD}. + kIdCmpnpxadd, //!< Instruction 'cmpnpxadd' {CMPCCXADD}. + kIdCmpnsxadd, //!< Instruction 'cmpnsxadd' {CMPCCXADD}. + kIdCmpnzxadd, //!< Instruction 'cmpnzxadd' {CMPCCXADD}. + kIdCmpoxadd, //!< Instruction 'cmpoxadd' {CMPCCXADD}. kIdCmppd, //!< Instruction 'cmppd' {SSE2}. kIdCmpps, //!< Instruction 'cmpps' {SSE}. + kIdCmppxadd, //!< Instruction 'cmppxadd' {CMPCCXADD}. kIdCmps, //!< Instruction 'cmps'. kIdCmpsd, //!< Instruction 'cmpsd' {SSE2}. kIdCmpss, //!< Instruction 'cmpss' {SSE}. + kIdCmpsxadd, //!< Instruction 'cmpsxadd' {CMPCCXADD}. kIdCmpxchg, //!< Instruction 'cmpxchg' {I486}. kIdCmpxchg16b, //!< Instruction 'cmpxchg16b' {CMPXCHG16B} (X64). kIdCmpxchg8b, //!< Instruction 'cmpxchg8b' {CMPXCHG8B}. + kIdCmpzxadd, //!< Instruction 'cmpzxadd' {CMPCCXADD}. kIdComisd, //!< Instruction 'comisd' {SSE2}. kIdComiss, //!< Instruction 'comiss' {SSE}. kIdCpuid, //!< Instruction 'cpuid' {I486}. @@ -279,104 +299,104 @@ namespace Inst { kIdEnter, //!< Instruction 'enter'. kIdExtractps, //!< Instruction 'extractps' {SSE4_1}. kIdExtrq, //!< Instruction 'extrq' {SSE4A}. - kIdF2xm1, //!< Instruction 'f2xm1'. - kIdFabs, //!< Instruction 'fabs'. - kIdFadd, //!< Instruction 'fadd'. - kIdFaddp, //!< Instruction 'faddp'. - kIdFbld, //!< Instruction 'fbld'. - kIdFbstp, //!< Instruction 'fbstp'. - kIdFchs, //!< Instruction 'fchs'. - kIdFclex, //!< Instruction 'fclex'. - kIdFcmovb, //!< Instruction 'fcmovb' {CMOV}. - kIdFcmovbe, //!< Instruction 'fcmovbe' {CMOV}. - kIdFcmove, //!< Instruction 'fcmove' {CMOV}. - kIdFcmovnb, //!< Instruction 'fcmovnb' {CMOV}. - kIdFcmovnbe, //!< Instruction 'fcmovnbe' {CMOV}. - kIdFcmovne, //!< Instruction 'fcmovne' {CMOV}. - kIdFcmovnu, //!< Instruction 'fcmovnu' {CMOV}. - kIdFcmovu, //!< Instruction 'fcmovu' {CMOV}. - kIdFcom, //!< Instruction 'fcom'. - kIdFcomi, //!< Instruction 'fcomi'. - kIdFcomip, //!< Instruction 'fcomip'. - kIdFcomp, //!< Instruction 'fcomp'. - kIdFcompp, //!< Instruction 'fcompp'. - kIdFcos, //!< Instruction 'fcos'. - kIdFdecstp, //!< Instruction 'fdecstp'. - kIdFdiv, //!< Instruction 'fdiv'. - kIdFdivp, //!< Instruction 'fdivp'. - kIdFdivr, //!< Instruction 'fdivr'. - kIdFdivrp, //!< Instruction 'fdivrp'. + kIdF2xm1, //!< Instruction 'f2xm1' {FPU}. + kIdFabs, //!< Instruction 'fabs' {FPU}. + kIdFadd, //!< Instruction 'fadd' {FPU}. + kIdFaddp, //!< Instruction 'faddp' {FPU}. + kIdFbld, //!< Instruction 'fbld' {FPU}. + kIdFbstp, //!< Instruction 'fbstp' {FPU}. + kIdFchs, //!< Instruction 'fchs' {FPU}. + kIdFclex, //!< Instruction 'fclex' {FPU}. + kIdFcmovb, //!< Instruction 'fcmovb' {CMOV|FPU}. + kIdFcmovbe, //!< Instruction 'fcmovbe' {CMOV|FPU}. + kIdFcmove, //!< Instruction 'fcmove' {CMOV|FPU}. + kIdFcmovnb, //!< Instruction 'fcmovnb' {CMOV|FPU}. + kIdFcmovnbe, //!< Instruction 'fcmovnbe' {CMOV|FPU}. + kIdFcmovne, //!< Instruction 'fcmovne' {CMOV|FPU}. + kIdFcmovnu, //!< Instruction 'fcmovnu' {CMOV|FPU}. + kIdFcmovu, //!< Instruction 'fcmovu' {CMOV|FPU}. + kIdFcom, //!< Instruction 'fcom' {FPU}. + kIdFcomi, //!< Instruction 'fcomi' {FPU}. + kIdFcomip, //!< Instruction 'fcomip' {FPU}. + kIdFcomp, //!< Instruction 'fcomp' {FPU}. + kIdFcompp, //!< Instruction 'fcompp' {FPU}. + kIdFcos, //!< Instruction 'fcos' {FPU}. + kIdFdecstp, //!< Instruction 'fdecstp' {FPU}. + kIdFdiv, //!< Instruction 'fdiv' {FPU}. + kIdFdivp, //!< Instruction 'fdivp' {FPU}. + kIdFdivr, //!< Instruction 'fdivr' {FPU}. + kIdFdivrp, //!< Instruction 'fdivrp' {FPU}. kIdFemms, //!< Instruction 'femms' {3DNOW}. - kIdFfree, //!< Instruction 'ffree'. - kIdFiadd, //!< Instruction 'fiadd'. - kIdFicom, //!< Instruction 'ficom'. - kIdFicomp, //!< Instruction 'ficomp'. - kIdFidiv, //!< Instruction 'fidiv'. - kIdFidivr, //!< Instruction 'fidivr'. - kIdFild, //!< Instruction 'fild'. - kIdFimul, //!< Instruction 'fimul'. - kIdFincstp, //!< Instruction 'fincstp'. - kIdFinit, //!< Instruction 'finit'. - kIdFist, //!< Instruction 'fist'. - kIdFistp, //!< Instruction 'fistp'. - kIdFisttp, //!< Instruction 'fisttp' {SSE3}. - kIdFisub, //!< Instruction 'fisub'. - kIdFisubr, //!< Instruction 'fisubr'. - kIdFld, //!< Instruction 'fld'. - kIdFld1, //!< Instruction 'fld1'. - kIdFldcw, //!< Instruction 'fldcw'. - kIdFldenv, //!< Instruction 'fldenv'. - kIdFldl2e, //!< Instruction 'fldl2e'. - kIdFldl2t, //!< Instruction 'fldl2t'. - kIdFldlg2, //!< Instruction 'fldlg2'. - kIdFldln2, //!< Instruction 'fldln2'. - kIdFldpi, //!< Instruction 'fldpi'. - kIdFldz, //!< Instruction 'fldz'. - kIdFmul, //!< Instruction 'fmul'. - kIdFmulp, //!< Instruction 'fmulp'. - kIdFnclex, //!< Instruction 'fnclex'. - kIdFninit, //!< Instruction 'fninit'. - kIdFnop, //!< Instruction 'fnop'. - kIdFnsave, //!< Instruction 'fnsave'. - kIdFnstcw, //!< Instruction 'fnstcw'. - kIdFnstenv, //!< Instruction 'fnstenv'. - kIdFnstsw, //!< Instruction 'fnstsw'. - kIdFpatan, //!< Instruction 'fpatan'. - kIdFprem, //!< Instruction 'fprem'. - kIdFprem1, //!< Instruction 'fprem1'. - kIdFptan, //!< Instruction 'fptan'. - kIdFrndint, //!< Instruction 'frndint'. - kIdFrstor, //!< Instruction 'frstor'. - kIdFsave, //!< Instruction 'fsave'. - kIdFscale, //!< Instruction 'fscale'. - kIdFsin, //!< Instruction 'fsin'. - kIdFsincos, //!< Instruction 'fsincos'. - kIdFsqrt, //!< Instruction 'fsqrt'. - kIdFst, //!< Instruction 'fst'. - kIdFstcw, //!< Instruction 'fstcw'. - kIdFstenv, //!< Instruction 'fstenv'. - kIdFstp, //!< Instruction 'fstp'. - kIdFstsw, //!< Instruction 'fstsw'. - kIdFsub, //!< Instruction 'fsub'. - kIdFsubp, //!< Instruction 'fsubp'. - kIdFsubr, //!< Instruction 'fsubr'. - kIdFsubrp, //!< Instruction 'fsubrp'. - kIdFtst, //!< Instruction 'ftst'. - kIdFucom, //!< Instruction 'fucom'. - kIdFucomi, //!< Instruction 'fucomi'. - kIdFucomip, //!< Instruction 'fucomip'. - kIdFucomp, //!< Instruction 'fucomp'. - kIdFucompp, //!< Instruction 'fucompp'. - kIdFwait, //!< Instruction 'fwait'. - kIdFxam, //!< Instruction 'fxam'. - kIdFxch, //!< Instruction 'fxch'. + kIdFfree, //!< Instruction 'ffree' {FPU}. + kIdFiadd, //!< Instruction 'fiadd' {FPU}. + kIdFicom, //!< Instruction 'ficom' {FPU}. + kIdFicomp, //!< Instruction 'ficomp' {FPU}. + kIdFidiv, //!< Instruction 'fidiv' {FPU}. + kIdFidivr, //!< Instruction 'fidivr' {FPU}. + kIdFild, //!< Instruction 'fild' {FPU}. + kIdFimul, //!< Instruction 'fimul' {FPU}. + kIdFincstp, //!< Instruction 'fincstp' {FPU}. + kIdFinit, //!< Instruction 'finit' {FPU}. + kIdFist, //!< Instruction 'fist' {FPU}. + kIdFistp, //!< Instruction 'fistp' {FPU}. + kIdFisttp, //!< Instruction 'fisttp' {SSE3|FPU}. + kIdFisub, //!< Instruction 'fisub' {FPU}. + kIdFisubr, //!< Instruction 'fisubr' {FPU}. + kIdFld, //!< Instruction 'fld' {FPU}. + kIdFld1, //!< Instruction 'fld1' {FPU}. + kIdFldcw, //!< Instruction 'fldcw' {FPU}. + kIdFldenv, //!< Instruction 'fldenv' {FPU}. + kIdFldl2e, //!< Instruction 'fldl2e' {FPU}. + kIdFldl2t, //!< Instruction 'fldl2t' {FPU}. + kIdFldlg2, //!< Instruction 'fldlg2' {FPU}. + kIdFldln2, //!< Instruction 'fldln2' {FPU}. + kIdFldpi, //!< Instruction 'fldpi' {FPU}. + kIdFldz, //!< Instruction 'fldz' {FPU}. + kIdFmul, //!< Instruction 'fmul' {FPU}. + kIdFmulp, //!< Instruction 'fmulp' {FPU}. + kIdFnclex, //!< Instruction 'fnclex' {FPU}. + kIdFninit, //!< Instruction 'fninit' {FPU}. + kIdFnop, //!< Instruction 'fnop' {FPU}. + kIdFnsave, //!< Instruction 'fnsave' {FPU}. + kIdFnstcw, //!< Instruction 'fnstcw' {FPU}. + kIdFnstenv, //!< Instruction 'fnstenv' {FPU}. + kIdFnstsw, //!< Instruction 'fnstsw' {FPU}. + kIdFpatan, //!< Instruction 'fpatan' {FPU}. + kIdFprem, //!< Instruction 'fprem' {FPU}. + kIdFprem1, //!< Instruction 'fprem1' {FPU}. + kIdFptan, //!< Instruction 'fptan' {FPU}. + kIdFrndint, //!< Instruction 'frndint' {FPU}. + kIdFrstor, //!< Instruction 'frstor' {FPU}. + kIdFsave, //!< Instruction 'fsave' {FPU}. + kIdFscale, //!< Instruction 'fscale' {FPU}. + kIdFsin, //!< Instruction 'fsin' {FPU}. + kIdFsincos, //!< Instruction 'fsincos' {FPU}. + kIdFsqrt, //!< Instruction 'fsqrt' {FPU}. + kIdFst, //!< Instruction 'fst' {FPU}. + kIdFstcw, //!< Instruction 'fstcw' {FPU}. + kIdFstenv, //!< Instruction 'fstenv' {FPU}. + kIdFstp, //!< Instruction 'fstp' {FPU}. + kIdFstsw, //!< Instruction 'fstsw' {FPU}. + kIdFsub, //!< Instruction 'fsub' {FPU}. + kIdFsubp, //!< Instruction 'fsubp' {FPU}. + kIdFsubr, //!< Instruction 'fsubr' {FPU}. + kIdFsubrp, //!< Instruction 'fsubrp' {FPU}. + kIdFtst, //!< Instruction 'ftst' {FPU}. + kIdFucom, //!< Instruction 'fucom' {FPU}. + kIdFucomi, //!< Instruction 'fucomi' {FPU}. + kIdFucomip, //!< Instruction 'fucomip' {FPU}. + kIdFucomp, //!< Instruction 'fucomp' {FPU}. + kIdFucompp, //!< Instruction 'fucompp' {FPU}. + kIdFwait, //!< Instruction 'fwait' {FPU}. + kIdFxam, //!< Instruction 'fxam' {FPU}. + kIdFxch, //!< Instruction 'fxch' {FPU}. kIdFxrstor, //!< Instruction 'fxrstor' {FXSR}. kIdFxrstor64, //!< Instruction 'fxrstor64' {FXSR} (X64). kIdFxsave, //!< Instruction 'fxsave' {FXSR}. kIdFxsave64, //!< Instruction 'fxsave64' {FXSR} (X64). - kIdFxtract, //!< Instruction 'fxtract'. - kIdFyl2x, //!< Instruction 'fyl2x'. - kIdFyl2xp1, //!< Instruction 'fyl2xp1'. + kIdFxtract, //!< Instruction 'fxtract' {FPU}. + kIdFyl2x, //!< Instruction 'fyl2x' {FPU}. + kIdFyl2xp1, //!< Instruction 'fyl2xp1' {FPU}. kIdGetsec, //!< Instruction 'getsec' {SMX}. kIdGf2p8affineinvqb, //!< Instruction 'gf2p8affineinvqb' {GFNI}. kIdGf2p8affineqb, //!< Instruction 'gf2p8affineqb' {GFNI}. @@ -403,6 +423,7 @@ namespace Inst { kIdInvept, //!< Instruction 'invept' {VMX}. kIdInvlpg, //!< Instruction 'invlpg' {I486}. kIdInvlpga, //!< Instruction 'invlpga' {SVM}. + kIdInvlpgb, //!< Instruction 'invlpgb' {INVLPGB}. kIdInvpcid, //!< Instruction 'invpcid' {I486}. kIdInvvpid, //!< Instruction 'invvpid' {VMX}. kIdIret, //!< Instruction 'iret'. @@ -535,7 +556,7 @@ namespace Inst { kIdMonitor, //!< Instruction 'monitor' {MONITOR}. kIdMonitorx, //!< Instruction 'monitorx' {MONITORX}. kIdMov, //!< Instruction 'mov'. - kIdMovabs, //!< Instruction 'movabs' (X64). + kIdMovabs, //!< Instruction 'movabs'. kIdMovapd, //!< Instruction 'movapd' {SSE2}. kIdMovaps, //!< Instruction 'movaps' {SSE}. kIdMovbe, //!< Instruction 'movbe' {MOVBE}. @@ -606,7 +627,7 @@ namespace Inst { kIdPaddusb, //!< Instruction 'paddusb' {MMX|SSE2}. kIdPaddusw, //!< Instruction 'paddusw' {MMX|SSE2}. kIdPaddw, //!< Instruction 'paddw' {MMX|SSE2}. - kIdPalignr, //!< Instruction 'palignr' {SSE3}. + kIdPalignr, //!< Instruction 'palignr' {SSSE3}. kIdPand, //!< Instruction 'pand' {MMX|SSE2}. kIdPandn, //!< Instruction 'pandn' {MMX|SSE2}. kIdPause, //!< Instruction 'pause'. @@ -713,10 +734,12 @@ namespace Inst { kIdPopfq, //!< Instruction 'popfq' (X64). kIdPor, //!< Instruction 'por' {MMX|SSE2}. kIdPrefetch, //!< Instruction 'prefetch' {3DNOW}. - kIdPrefetchnta, //!< Instruction 'prefetchnta' {MMX2}. - kIdPrefetcht0, //!< Instruction 'prefetcht0' {MMX2}. - kIdPrefetcht1, //!< Instruction 'prefetcht1' {MMX2}. - kIdPrefetcht2, //!< Instruction 'prefetcht2' {MMX2}. + kIdPrefetchit0, //!< Instruction 'prefetchit0' {PREFETCHI} (X64). + kIdPrefetchit1, //!< Instruction 'prefetchit1' {PREFETCHI} (X64). + kIdPrefetchnta, //!< Instruction 'prefetchnta' {SSE}. + kIdPrefetcht0, //!< Instruction 'prefetcht0' {SSE}. + kIdPrefetcht1, //!< Instruction 'prefetcht1' {SSE}. + kIdPrefetcht2, //!< Instruction 'prefetcht2' {SSE}. kIdPrefetchw, //!< Instruction 'prefetchw' {PREFETCHW}. kIdPrefetchwt1, //!< Instruction 'prefetchwt1' {PREFETCHWT1}. kIdPsadbw, //!< Instruction 'psadbw' {MMX2|SSE2}. @@ -732,7 +755,7 @@ namespace Inst { kIdPslldq, //!< Instruction 'pslldq' {SSE2}. kIdPsllq, //!< Instruction 'psllq' {MMX|SSE2}. kIdPsllw, //!< Instruction 'psllw' {MMX|SSE2}. - kIdPsmash, //!< Instruction 'psmash' {SNP} (X64). + kIdPsmash, //!< Instruction 'psmash' {SEV_SNP} (X64). kIdPsrad, //!< Instruction 'psrad' {MMX|SSE2}. kIdPsraw, //!< Instruction 'psraw' {MMX|SSE2}. kIdPsrld, //!< Instruction 'psrld' {MMX|SSE2}. @@ -764,7 +787,7 @@ namespace Inst { kIdPushf, //!< Instruction 'pushf'. kIdPushfd, //!< Instruction 'pushfd' (X86). kIdPushfq, //!< Instruction 'pushfq' (X64). - kIdPvalidate, //!< Instruction 'pvalidate' {SNP}. + kIdPvalidate, //!< Instruction 'pvalidate' {SEV_SNP}. kIdPxor, //!< Instruction 'pxor' {MMX|SSE2}. kIdRcl, //!< Instruction 'rcl'. kIdRcpps, //!< Instruction 'rcpps' {SSE}. @@ -785,8 +808,8 @@ namespace Inst { kIdRdtscp, //!< Instruction 'rdtscp' {RDTSCP}. kIdRet, //!< Instruction 'ret'. kIdRetf, //!< Instruction 'retf'. - kIdRmpadjust, //!< Instruction 'rmpadjust' {SNP} (X64). - kIdRmpupdate, //!< Instruction 'rmpupdate' {SNP} (X64). + kIdRmpadjust, //!< Instruction 'rmpadjust' {SEV_SNP} (X64). + kIdRmpupdate, //!< Instruction 'rmpupdate' {SEV_SNP} (X64). kIdRol, //!< Instruction 'rol'. kIdRor, //!< Instruction 'ror'. kIdRorx, //!< Instruction 'rorx' {BMI2}. @@ -805,6 +828,9 @@ namespace Inst { kIdSaveprevssp, //!< Instruction 'saveprevssp' {CET_SS}. kIdSbb, //!< Instruction 'sbb'. kIdScas, //!< Instruction 'scas'. + kIdSeamcall, //!< Instruction 'seamcall' {SEAM}. + kIdSeamops, //!< Instruction 'seamops' {SEAM}. + kIdSeamret, //!< Instruction 'seamret' {SEAM}. kIdSenduipi, //!< Instruction 'senduipi' {UINTR} (X64). kIdSerialize, //!< Instruction 'serialize' {SERIALIZE}. kIdSeta, //!< Instruction 'seta'. @@ -838,7 +864,7 @@ namespace Inst { kIdSets, //!< Instruction 'sets'. kIdSetssbsy, //!< Instruction 'setssbsy' {CET_SS}. kIdSetz, //!< Instruction 'setz'. - kIdSfence, //!< Instruction 'sfence' {MMX2}. + kIdSfence, //!< Instruction 'sfence' {SSE}. kIdSgdt, //!< Instruction 'sgdt'. kIdSha1msg1, //!< Instruction 'sha1msg1' {SHA}. kIdSha1msg2, //!< Instruction 'sha1msg2' {SHA}. @@ -883,15 +909,19 @@ namespace Inst { kIdSyscall, //!< Instruction 'syscall' (X64). kIdSysenter, //!< Instruction 'sysenter'. kIdSysexit, //!< Instruction 'sysexit'. - kIdSysexitq, //!< Instruction 'sysexitq'. + kIdSysexitq, //!< Instruction 'sysexitq' (X64). kIdSysret, //!< Instruction 'sysret' (X64). kIdSysretq, //!< Instruction 'sysretq' (X64). kIdT1mskc, //!< Instruction 't1mskc' {TBM}. + kIdTcmmimfp16ps, //!< Instruction 'tcmmimfp16ps' {AMX_COMPLEX} (X64). + kIdTcmmrlfp16ps, //!< Instruction 'tcmmrlfp16ps' {AMX_COMPLEX} (X64). + kIdTdcall, //!< Instruction 'tdcall' {SEAM}. kIdTdpbf16ps, //!< Instruction 'tdpbf16ps' {AMX_BF16} (X64). kIdTdpbssd, //!< Instruction 'tdpbssd' {AMX_INT8} (X64). kIdTdpbsud, //!< Instruction 'tdpbsud' {AMX_INT8} (X64). kIdTdpbusd, //!< Instruction 'tdpbusd' {AMX_INT8} (X64). kIdTdpbuud, //!< Instruction 'tdpbuud' {AMX_INT8} (X64). + kIdTdpfp16ps, //!< Instruction 'tdpfp16ps' {AMX_FP16} (X64). kIdTest, //!< Instruction 'test'. kIdTestui, //!< Instruction 'testui' {UINTR} (X64). kIdTileloadd, //!< Instruction 'tileloadd' {AMX_TILE} (X64). @@ -899,6 +929,7 @@ namespace Inst { kIdTilerelease, //!< Instruction 'tilerelease' {AMX_TILE} (X64). kIdTilestored, //!< Instruction 'tilestored' {AMX_TILE} (X64). kIdTilezero, //!< Instruction 'tilezero' {AMX_TILE} (X64). + kIdTlbsync, //!< Instruction 'tlbsync' {INVLPGB}. kIdTpause, //!< Instruction 'tpause' {WAITPKG}. kIdTzcnt, //!< Instruction 'tzcnt' {BMI}. kIdTzmsk, //!< Instruction 'tzmsk' {TBM}. @@ -938,6 +969,8 @@ namespace Inst { kIdVandnps, //!< Instruction 'vandnps' {AVX|AVX512_DQ+VL}. kIdVandpd, //!< Instruction 'vandpd' {AVX|AVX512_DQ+VL}. kIdVandps, //!< Instruction 'vandps' {AVX|AVX512_DQ+VL}. + kIdVbcstnebf162ps, //!< Instruction 'vbcstnebf162ps' {AVX_NE_CONVERT}. + kIdVbcstnesh2ps, //!< Instruction 'vbcstnesh2ps' {AVX_NE_CONVERT}. kIdVblendmpd, //!< Instruction 'vblendmpd' {AVX512_F+VL}. kIdVblendmps, //!< Instruction 'vblendmps' {AVX512_F+VL}. kIdVblendpd, //!< Instruction 'vblendpd' {AVX}. @@ -973,7 +1006,11 @@ namespace Inst { kIdVcvtdq2ph, //!< Instruction 'vcvtdq2ph' {AVX512_FP16+VL}. kIdVcvtdq2ps, //!< Instruction 'vcvtdq2ps' {AVX|AVX512_F+VL}. kIdVcvtne2ps2bf16, //!< Instruction 'vcvtne2ps2bf16' {AVX512_BF16+VL}. - kIdVcvtneps2bf16, //!< Instruction 'vcvtneps2bf16' {AVX512_BF16+VL}. + kIdVcvtneebf162ps, //!< Instruction 'vcvtneebf162ps' {AVX_NE_CONVERT}. + kIdVcvtneeph2ps, //!< Instruction 'vcvtneeph2ps' {AVX_NE_CONVERT}. + kIdVcvtneobf162ps, //!< Instruction 'vcvtneobf162ps' {AVX_NE_CONVERT}. + kIdVcvtneoph2ps, //!< Instruction 'vcvtneoph2ps' {AVX_NE_CONVERT}. + kIdVcvtneps2bf16, //!< Instruction 'vcvtneps2bf16' {AVX_NE_CONVERT|AVX512_BF16+VL}. kIdVcvtpd2dq, //!< Instruction 'vcvtpd2dq' {AVX|AVX512_F+VL}. kIdVcvtpd2ph, //!< Instruction 'vcvtpd2ph' {AVX512_FP16+VL}. kIdVcvtpd2ps, //!< Instruction 'vcvtpd2ps' {AVX|AVX512_F+VL}. @@ -1057,8 +1094,8 @@ namespace Inst { kIdVdpps, //!< Instruction 'vdpps' {AVX}. kIdVerr, //!< Instruction 'verr'. kIdVerw, //!< Instruction 'verw'. - kIdVexp2pd, //!< Instruction 'vexp2pd' {AVX512_ERI}. - kIdVexp2ps, //!< Instruction 'vexp2ps' {AVX512_ERI}. + kIdVexp2pd, //!< Instruction 'vexp2pd' {AVX512_ER}. + kIdVexp2ps, //!< Instruction 'vexp2ps' {AVX512_ER}. kIdVexpandpd, //!< Instruction 'vexpandpd' {AVX512_F+VL}. kIdVexpandps, //!< Instruction 'vexpandps' {AVX512_F+VL}. kIdVextractf128, //!< Instruction 'vextractf128' {AVX}. @@ -1073,9 +1110,9 @@ namespace Inst { kIdVextracti64x4, //!< Instruction 'vextracti64x4' {AVX512_F}. kIdVextractps, //!< Instruction 'vextractps' {AVX|AVX512_F}. kIdVfcmaddcph, //!< Instruction 'vfcmaddcph' {AVX512_FP16+VL}. - kIdVfcmaddcsh, //!< Instruction 'vfcmaddcsh' {AVX512_FP16+VL}. + kIdVfcmaddcsh, //!< Instruction 'vfcmaddcsh' {AVX512_FP16}. kIdVfcmulcph, //!< Instruction 'vfcmulcph' {AVX512_FP16+VL}. - kIdVfcmulcsh, //!< Instruction 'vfcmulcsh' {AVX512_FP16+VL}. + kIdVfcmulcsh, //!< Instruction 'vfcmulcsh' {AVX512_FP16}. kIdVfixupimmpd, //!< Instruction 'vfixupimmpd' {AVX512_F+VL}. kIdVfixupimmps, //!< Instruction 'vfixupimmps' {AVX512_F+VL}. kIdVfixupimmsd, //!< Instruction 'vfixupimmsd' {AVX512_F}. @@ -1099,7 +1136,7 @@ namespace Inst { kIdVfmadd231sh, //!< Instruction 'vfmadd231sh' {AVX512_FP16}. kIdVfmadd231ss, //!< Instruction 'vfmadd231ss' {FMA|AVX512_F}. kIdVfmaddcph, //!< Instruction 'vfmaddcph' {AVX512_FP16+VL}. - kIdVfmaddcsh, //!< Instruction 'vfmaddcsh' {AVX512_FP16+VL}. + kIdVfmaddcsh, //!< Instruction 'vfmaddcsh' {AVX512_FP16}. kIdVfmaddpd, //!< Instruction 'vfmaddpd' {FMA4}. kIdVfmaddps, //!< Instruction 'vfmaddps' {FMA4}. kIdVfmaddsd, //!< Instruction 'vfmaddsd' {FMA4}. @@ -1206,14 +1243,14 @@ namespace Inst { kIdVfrczss, //!< Instruction 'vfrczss' {XOP}. kIdVgatherdpd, //!< Instruction 'vgatherdpd' {AVX2|AVX512_F+VL}. kIdVgatherdps, //!< Instruction 'vgatherdps' {AVX2|AVX512_F+VL}. - kIdVgatherpf0dpd, //!< Instruction 'vgatherpf0dpd' {AVX512_PFI}. - kIdVgatherpf0dps, //!< Instruction 'vgatherpf0dps' {AVX512_PFI}. - kIdVgatherpf0qpd, //!< Instruction 'vgatherpf0qpd' {AVX512_PFI}. - kIdVgatherpf0qps, //!< Instruction 'vgatherpf0qps' {AVX512_PFI}. - kIdVgatherpf1dpd, //!< Instruction 'vgatherpf1dpd' {AVX512_PFI}. - kIdVgatherpf1dps, //!< Instruction 'vgatherpf1dps' {AVX512_PFI}. - kIdVgatherpf1qpd, //!< Instruction 'vgatherpf1qpd' {AVX512_PFI}. - kIdVgatherpf1qps, //!< Instruction 'vgatherpf1qps' {AVX512_PFI}. + kIdVgatherpf0dpd, //!< Instruction 'vgatherpf0dpd' {AVX512_PF}. + kIdVgatherpf0dps, //!< Instruction 'vgatherpf0dps' {AVX512_PF}. + kIdVgatherpf0qpd, //!< Instruction 'vgatherpf0qpd' {AVX512_PF}. + kIdVgatherpf0qps, //!< Instruction 'vgatherpf0qps' {AVX512_PF}. + kIdVgatherpf1dpd, //!< Instruction 'vgatherpf1dpd' {AVX512_PF}. + kIdVgatherpf1dps, //!< Instruction 'vgatherpf1dps' {AVX512_PF}. + kIdVgatherpf1qpd, //!< Instruction 'vgatherpf1qpd' {AVX512_PF}. + kIdVgatherpf1qps, //!< Instruction 'vgatherpf1qps' {AVX512_PF}. kIdVgatherqpd, //!< Instruction 'vgatherqpd' {AVX2|AVX512_F+VL}. kIdVgatherqps, //!< Instruction 'vgatherqps' {AVX2|AVX512_F+VL}. kIdVgetexppd, //!< Instruction 'vgetexppd' {AVX512_F+VL}. @@ -1254,18 +1291,19 @@ namespace Inst { kIdVmaxpd, //!< Instruction 'vmaxpd' {AVX|AVX512_F+VL}. kIdVmaxph, //!< Instruction 'vmaxph' {AVX512_FP16+VL}. kIdVmaxps, //!< Instruction 'vmaxps' {AVX|AVX512_F+VL}. - kIdVmaxsd, //!< Instruction 'vmaxsd' {AVX|AVX512_F+VL}. + kIdVmaxsd, //!< Instruction 'vmaxsd' {AVX|AVX512_F}. kIdVmaxsh, //!< Instruction 'vmaxsh' {AVX512_FP16}. - kIdVmaxss, //!< Instruction 'vmaxss' {AVX|AVX512_F+VL}. + kIdVmaxss, //!< Instruction 'vmaxss' {AVX|AVX512_F}. kIdVmcall, //!< Instruction 'vmcall' {VMX}. kIdVmclear, //!< Instruction 'vmclear' {VMX}. kIdVmfunc, //!< Instruction 'vmfunc' {VMX}. + kIdVmgexit, //!< Instruction 'vmgexit' {SEV_ES}. kIdVminpd, //!< Instruction 'vminpd' {AVX|AVX512_F+VL}. kIdVminph, //!< Instruction 'vminph' {AVX512_FP16+VL}. kIdVminps, //!< Instruction 'vminps' {AVX|AVX512_F+VL}. - kIdVminsd, //!< Instruction 'vminsd' {AVX|AVX512_F+VL}. + kIdVminsd, //!< Instruction 'vminsd' {AVX|AVX512_F}. kIdVminsh, //!< Instruction 'vminsh' {AVX512_FP16}. - kIdVminss, //!< Instruction 'vminss' {AVX|AVX512_F+VL}. + kIdVminss, //!< Instruction 'vminss' {AVX|AVX512_F}. kIdVmlaunch, //!< Instruction 'vmlaunch' {VMX}. kIdVmload, //!< Instruction 'vmload' {SVM}. kIdVmmcall, //!< Instruction 'vmmcall' {SVM}. @@ -1316,11 +1354,12 @@ namespace Inst { kIdVmulsh, //!< Instruction 'vmulsh' {AVX512_FP16}. kIdVmulss, //!< Instruction 'vmulss' {AVX|AVX512_F}. kIdVmwrite, //!< Instruction 'vmwrite' {VMX}. + kIdVmxoff, //!< Instruction 'vmxoff' {VMX}. kIdVmxon, //!< Instruction 'vmxon' {VMX}. kIdVorpd, //!< Instruction 'vorpd' {AVX|AVX512_DQ+VL}. kIdVorps, //!< Instruction 'vorps' {AVX|AVX512_DQ+VL}. - kIdVp2intersectd, //!< Instruction 'vp2intersectd' {AVX512_VP2INTERSECT}. - kIdVp2intersectq, //!< Instruction 'vp2intersectq' {AVX512_VP2INTERSECT}. + kIdVp2intersectd, //!< Instruction 'vp2intersectd' {AVX512_VP2INTERSECT+VL}. + kIdVp2intersectq, //!< Instruction 'vp2intersectq' {AVX512_VP2INTERSECT+VL}. kIdVp4dpwssd, //!< Instruction 'vp4dpwssd' {AVX512_4VNNIW}. kIdVp4dpwssds, //!< Instruction 'vp4dpwssds' {AVX512_4VNNIW}. kIdVpabsb, //!< Instruction 'vpabsb' {AVX|AVX2|AVX512_BW+VL}. @@ -1357,8 +1396,8 @@ namespace Inst { kIdVpblendw, //!< Instruction 'vpblendw' {AVX|AVX2}. kIdVpbroadcastb, //!< Instruction 'vpbroadcastb' {AVX2|AVX512_BW+VL}. kIdVpbroadcastd, //!< Instruction 'vpbroadcastd' {AVX2|AVX512_F+VL}. - kIdVpbroadcastmb2q, //!< Instruction 'vpbroadcastmb2q' {AVX512_CDI+VL}. - kIdVpbroadcastmw2d, //!< Instruction 'vpbroadcastmw2d' {AVX512_CDI+VL}. + kIdVpbroadcastmb2q, //!< Instruction 'vpbroadcastmb2q' {AVX512_CD+VL}. + kIdVpbroadcastmw2d, //!< Instruction 'vpbroadcastmw2d' {AVX512_CD+VL}. kIdVpbroadcastq, //!< Instruction 'vpbroadcastq' {AVX2|AVX512_F+VL}. kIdVpbroadcastw, //!< Instruction 'vpbroadcastw' {AVX2|AVX512_BW+VL}. kIdVpclmulqdq, //!< Instruction 'vpclmulqdq' {AVX|AVX512_F+VL & PCLMULQDQ|VPCLMULQDQ}. @@ -1395,12 +1434,24 @@ namespace Inst { kIdVpcomuq, //!< Instruction 'vpcomuq' {XOP}. kIdVpcomuw, //!< Instruction 'vpcomuw' {XOP}. kIdVpcomw, //!< Instruction 'vpcomw' {XOP}. - kIdVpconflictd, //!< Instruction 'vpconflictd' {AVX512_CDI+VL}. - kIdVpconflictq, //!< Instruction 'vpconflictq' {AVX512_CDI+VL}. + kIdVpconflictd, //!< Instruction 'vpconflictd' {AVX512_CD+VL}. + kIdVpconflictq, //!< Instruction 'vpconflictq' {AVX512_CD+VL}. + kIdVpdpbssd, //!< Instruction 'vpdpbssd' {AVX_VNNI_INT8}. + kIdVpdpbssds, //!< Instruction 'vpdpbssds' {AVX_VNNI_INT8}. + kIdVpdpbsud, //!< Instruction 'vpdpbsud' {AVX_VNNI_INT8}. + kIdVpdpbsuds, //!< Instruction 'vpdpbsuds' {AVX_VNNI_INT8}. kIdVpdpbusd, //!< Instruction 'vpdpbusd' {AVX_VNNI|AVX512_VNNI+VL}. kIdVpdpbusds, //!< Instruction 'vpdpbusds' {AVX_VNNI|AVX512_VNNI+VL}. + kIdVpdpbuud, //!< Instruction 'vpdpbuud' {AVX_VNNI_INT8}. + kIdVpdpbuuds, //!< Instruction 'vpdpbuuds' {AVX_VNNI_INT8}. kIdVpdpwssd, //!< Instruction 'vpdpwssd' {AVX_VNNI|AVX512_VNNI+VL}. kIdVpdpwssds, //!< Instruction 'vpdpwssds' {AVX_VNNI|AVX512_VNNI+VL}. + kIdVpdpwsud, //!< Instruction 'vpdpwsud' {AVX_VNNI_INT16}. + kIdVpdpwsuds, //!< Instruction 'vpdpwsuds' {AVX_VNNI_INT16}. + kIdVpdpwusd, //!< Instruction 'vpdpwusd' {AVX_VNNI_INT16}. + kIdVpdpwusds, //!< Instruction 'vpdpwusds' {AVX_VNNI_INT16}. + kIdVpdpwuud, //!< Instruction 'vpdpwuud' {AVX_VNNI_INT16}. + kIdVpdpwuuds, //!< Instruction 'vpdpwuuds' {AVX_VNNI_INT16}. kIdVperm2f128, //!< Instruction 'vperm2f128' {AVX}. kIdVperm2i128, //!< Instruction 'vperm2i128' {AVX2}. kIdVpermb, //!< Instruction 'vpermb' {AVX512_VBMI+VL}. @@ -1463,8 +1514,8 @@ namespace Inst { kIdVpinsrd, //!< Instruction 'vpinsrd' {AVX|AVX512_DQ}. kIdVpinsrq, //!< Instruction 'vpinsrq' {AVX|AVX512_DQ} (X64). kIdVpinsrw, //!< Instruction 'vpinsrw' {AVX|AVX512_BW}. - kIdVplzcntd, //!< Instruction 'vplzcntd' {AVX512_CDI+VL}. - kIdVplzcntq, //!< Instruction 'vplzcntq' {AVX512_CDI+VL}. + kIdVplzcntd, //!< Instruction 'vplzcntd' {AVX512_CD+VL}. + kIdVplzcntq, //!< Instruction 'vplzcntq' {AVX512_CD+VL}. kIdVpmacsdd, //!< Instruction 'vpmacsdd' {XOP}. kIdVpmacsdqh, //!< Instruction 'vpmacsdqh' {XOP}. kIdVpmacsdql, //!< Instruction 'vpmacsdql' {XOP}. @@ -1477,8 +1528,8 @@ namespace Inst { kIdVpmacsww, //!< Instruction 'vpmacsww' {XOP}. kIdVpmadcsswd, //!< Instruction 'vpmadcsswd' {XOP}. kIdVpmadcswd, //!< Instruction 'vpmadcswd' {XOP}. - kIdVpmadd52huq, //!< Instruction 'vpmadd52huq' {AVX512_IFMA+VL}. - kIdVpmadd52luq, //!< Instruction 'vpmadd52luq' {AVX512_IFMA+VL}. + kIdVpmadd52huq, //!< Instruction 'vpmadd52huq' {AVX_IFMA|AVX512_IFMA+VL}. + kIdVpmadd52luq, //!< Instruction 'vpmadd52luq' {AVX_IFMA|AVX512_IFMA+VL}. kIdVpmaddubsw, //!< Instruction 'vpmaddubsw' {AVX|AVX2|AVX512_BW+VL}. kIdVpmaddwd, //!< Instruction 'vpmaddwd' {AVX|AVX2|AVX512_BW+VL}. kIdVpmaskmovd, //!< Instruction 'vpmaskmovd' {AVX2}. @@ -1658,10 +1709,10 @@ namespace Inst { kIdVrcp14ps, //!< Instruction 'vrcp14ps' {AVX512_F+VL}. kIdVrcp14sd, //!< Instruction 'vrcp14sd' {AVX512_F}. kIdVrcp14ss, //!< Instruction 'vrcp14ss' {AVX512_F}. - kIdVrcp28pd, //!< Instruction 'vrcp28pd' {AVX512_ERI}. - kIdVrcp28ps, //!< Instruction 'vrcp28ps' {AVX512_ERI}. - kIdVrcp28sd, //!< Instruction 'vrcp28sd' {AVX512_ERI}. - kIdVrcp28ss, //!< Instruction 'vrcp28ss' {AVX512_ERI}. + kIdVrcp28pd, //!< Instruction 'vrcp28pd' {AVX512_ER}. + kIdVrcp28ps, //!< Instruction 'vrcp28ps' {AVX512_ER}. + kIdVrcp28sd, //!< Instruction 'vrcp28sd' {AVX512_ER}. + kIdVrcp28ss, //!< Instruction 'vrcp28ss' {AVX512_ER}. kIdVrcpph, //!< Instruction 'vrcpph' {AVX512_FP16}. kIdVrcpps, //!< Instruction 'vrcpps' {AVX}. kIdVrcpsh, //!< Instruction 'vrcpsh' {AVX512_FP16}. @@ -1686,10 +1737,10 @@ namespace Inst { kIdVrsqrt14ps, //!< Instruction 'vrsqrt14ps' {AVX512_F+VL}. kIdVrsqrt14sd, //!< Instruction 'vrsqrt14sd' {AVX512_F}. kIdVrsqrt14ss, //!< Instruction 'vrsqrt14ss' {AVX512_F}. - kIdVrsqrt28pd, //!< Instruction 'vrsqrt28pd' {AVX512_ERI}. - kIdVrsqrt28ps, //!< Instruction 'vrsqrt28ps' {AVX512_ERI}. - kIdVrsqrt28sd, //!< Instruction 'vrsqrt28sd' {AVX512_ERI}. - kIdVrsqrt28ss, //!< Instruction 'vrsqrt28ss' {AVX512_ERI}. + kIdVrsqrt28pd, //!< Instruction 'vrsqrt28pd' {AVX512_ER}. + kIdVrsqrt28ps, //!< Instruction 'vrsqrt28ps' {AVX512_ER}. + kIdVrsqrt28sd, //!< Instruction 'vrsqrt28sd' {AVX512_ER}. + kIdVrsqrt28ss, //!< Instruction 'vrsqrt28ss' {AVX512_ER}. kIdVrsqrtph, //!< Instruction 'vrsqrtph' {AVX512_FP16+VL}. kIdVrsqrtps, //!< Instruction 'vrsqrtps' {AVX}. kIdVrsqrtsh, //!< Instruction 'vrsqrtsh' {AVX512_FP16}. @@ -1702,22 +1753,30 @@ namespace Inst { kIdVscalefss, //!< Instruction 'vscalefss' {AVX512_F}. kIdVscatterdpd, //!< Instruction 'vscatterdpd' {AVX512_F+VL}. kIdVscatterdps, //!< Instruction 'vscatterdps' {AVX512_F+VL}. - kIdVscatterpf0dpd, //!< Instruction 'vscatterpf0dpd' {AVX512_PFI}. - kIdVscatterpf0dps, //!< Instruction 'vscatterpf0dps' {AVX512_PFI}. - kIdVscatterpf0qpd, //!< Instruction 'vscatterpf0qpd' {AVX512_PFI}. - kIdVscatterpf0qps, //!< Instruction 'vscatterpf0qps' {AVX512_PFI}. - kIdVscatterpf1dpd, //!< Instruction 'vscatterpf1dpd' {AVX512_PFI}. - kIdVscatterpf1dps, //!< Instruction 'vscatterpf1dps' {AVX512_PFI}. - kIdVscatterpf1qpd, //!< Instruction 'vscatterpf1qpd' {AVX512_PFI}. - kIdVscatterpf1qps, //!< Instruction 'vscatterpf1qps' {AVX512_PFI}. + kIdVscatterpf0dpd, //!< Instruction 'vscatterpf0dpd' {AVX512_PF}. + kIdVscatterpf0dps, //!< Instruction 'vscatterpf0dps' {AVX512_PF}. + kIdVscatterpf0qpd, //!< Instruction 'vscatterpf0qpd' {AVX512_PF}. + kIdVscatterpf0qps, //!< Instruction 'vscatterpf0qps' {AVX512_PF}. + kIdVscatterpf1dpd, //!< Instruction 'vscatterpf1dpd' {AVX512_PF}. + kIdVscatterpf1dps, //!< Instruction 'vscatterpf1dps' {AVX512_PF}. + kIdVscatterpf1qpd, //!< Instruction 'vscatterpf1qpd' {AVX512_PF}. + kIdVscatterpf1qps, //!< Instruction 'vscatterpf1qps' {AVX512_PF}. kIdVscatterqpd, //!< Instruction 'vscatterqpd' {AVX512_F+VL}. kIdVscatterqps, //!< Instruction 'vscatterqps' {AVX512_F+VL}. + kIdVsha512msg1, //!< Instruction 'vsha512msg1' {AVX & SHA512}. + kIdVsha512msg2, //!< Instruction 'vsha512msg2' {AVX & SHA512}. + kIdVsha512rnds2, //!< Instruction 'vsha512rnds2' {AVX & SHA512}. kIdVshuff32x4, //!< Instruction 'vshuff32x4' {AVX512_F+VL}. kIdVshuff64x2, //!< Instruction 'vshuff64x2' {AVX512_F+VL}. kIdVshufi32x4, //!< Instruction 'vshufi32x4' {AVX512_F+VL}. kIdVshufi64x2, //!< Instruction 'vshufi64x2' {AVX512_F+VL}. kIdVshufpd, //!< Instruction 'vshufpd' {AVX|AVX512_F+VL}. kIdVshufps, //!< Instruction 'vshufps' {AVX|AVX512_F+VL}. + kIdVsm3msg1, //!< Instruction 'vsm3msg1' {AVX & SM3}. + kIdVsm3msg2, //!< Instruction 'vsm3msg2' {AVX & SM3}. + kIdVsm3rnds2, //!< Instruction 'vsm3rnds2' {AVX & SM3}. + kIdVsm4key4, //!< Instruction 'vsm4key4' {AVX & SM4}. + kIdVsm4rnds4, //!< Instruction 'vsm4rnds4' {AVX & SM4}. kIdVsqrtpd, //!< Instruction 'vsqrtpd' {AVX|AVX512_F+VL}. kIdVsqrtph, //!< Instruction 'vsqrtph' {AVX512_FP16+VL}. kIdVsqrtps, //!< Instruction 'vsqrtps' {AVX|AVX512_F+VL}. @@ -1744,7 +1803,7 @@ namespace Inst { kIdVxorps, //!< Instruction 'vxorps' {AVX|AVX512_DQ+VL}. kIdVzeroall, //!< Instruction 'vzeroall' {AVX}. kIdVzeroupper, //!< Instruction 'vzeroupper' {AVX}. - kIdWbinvd, //!< Instruction 'wbinvd'. + kIdWbinvd, //!< Instruction 'wbinvd' {I486}. kIdWbnoinvd, //!< Instruction 'wbnoinvd' {WBNOINVD}. kIdWrfsbase, //!< Instruction 'wrfsbase' {FSGSBASE} (X64). kIdWrgsbase, //!< Instruction 'wrgsbase' {FSGSBASE} (X64). diff --git a/src/asmjit/x86/x86instapi.cpp b/src/asmjit/x86/x86instapi.cpp index 5594474..3d8e3ad 100644 --- a/src/asmjit/x86/x86instapi.cpp +++ b/src/asmjit/x86/x86instapi.cpp @@ -1501,6 +1501,8 @@ static inline uint32_t InstInternal_usesAvx512(InstOptions instOptions, const Re } Error InstInternal::queryFeatures(Arch arch, const BaseInst& inst, const Operand_* operands, size_t opCount, CpuFeatures* out) noexcept { + typedef CpuFeatures::X86 Ext; + // Only called when `arch` matches X86 family. DebugUtils::unused(arch); ASMJIT_ASSERT(Environment::isFamilyX86(arch)); @@ -1533,19 +1535,19 @@ Error InstInternal::queryFeatures(Arch arch, const BaseInst& inst, const Operand RegAnalysis regAnalysis = InstInternal_regAnalysis(operands, opCount); // Handle MMX vs SSE overlap. - if (out->has(CpuFeatures::X86::kMMX) || out->has(CpuFeatures::X86::kMMX2)) { + if (out->has(Ext::kMMX) || out->has(Ext::kMMX2)) { // Only instructions defined by SSE and SSE2 overlap. Instructions introduced by newer instruction sets like // SSE3+ don't state MMX as they require SSE3+. - if (out->has(CpuFeatures::X86::kSSE) || out->has(CpuFeatures::X86::kSSE2)) { + if (out->has(Ext::kSSE) || out->has(Ext::kSSE2)) { if (!regAnalysis.hasRegType(RegType::kX86_Xmm)) { // The instruction doesn't use XMM register(s), thus it's MMX/MMX2 only. - out->remove(CpuFeatures::X86::kSSE); - out->remove(CpuFeatures::X86::kSSE2); - out->remove(CpuFeatures::X86::kSSE4_1); + out->remove(Ext::kSSE); + out->remove(Ext::kSSE2); + out->remove(Ext::kSSE4_1); } else { - out->remove(CpuFeatures::X86::kMMX); - out->remove(CpuFeatures::X86::kMMX2); + out->remove(Ext::kMMX); + out->remove(Ext::kMMX2); } // Special case: PEXTRW instruction is MMX/SSE2 instruction. However, MMX/SSE version cannot access memory @@ -1554,30 +1556,30 @@ Error InstInternal::queryFeatures(Arch arch, const BaseInst& inst, const Operand // is, of course, not compatible with MMX/SSE2 and would #UD if SSE4.1 is not supported. if (instId == Inst::kIdPextrw) { if (opCount >= 1 && operands[0].isMem()) - out->remove(CpuFeatures::X86::kSSE2); + out->remove(Ext::kSSE2); else - out->remove(CpuFeatures::X86::kSSE4_1); + out->remove(Ext::kSSE4_1); } } } // Handle PCLMULQDQ vs VPCLMULQDQ. - if (out->has(CpuFeatures::X86::kVPCLMULQDQ)) { + if (out->has(Ext::kVPCLMULQDQ)) { if (regAnalysis.hasRegType(RegType::kX86_Zmm) || Support::test(options, InstOptions::kX86_Evex)) { // AVX512_F & VPCLMULQDQ. - out->remove(CpuFeatures::X86::kAVX, CpuFeatures::X86::kPCLMULQDQ); + out->remove(Ext::kAVX, Ext::kPCLMULQDQ); } else if (regAnalysis.hasRegType(RegType::kX86_Ymm)) { - out->remove(CpuFeatures::X86::kAVX512_F, CpuFeatures::X86::kAVX512_VL); + out->remove(Ext::kAVX512_F, Ext::kAVX512_VL); } else { // AVX & PCLMULQDQ. - out->remove(CpuFeatures::X86::kAVX512_F, CpuFeatures::X86::kAVX512_VL, CpuFeatures::X86::kVPCLMULQDQ); + out->remove(Ext::kAVX512_F, Ext::kAVX512_VL, Ext::kVPCLMULQDQ); } } // Handle AVX vs AVX2 overlap. - if (out->has(CpuFeatures::X86::kAVX) && out->has(CpuFeatures::X86::kAVX2)) { + if (out->has(Ext::kAVX) && out->has(Ext::kAVX2)) { bool isAVX2 = true; // Special case: VBROADCASTSS and VBROADCASTSD were introduced in AVX, but only version that uses memory as a // source operand. AVX2 then added support for register source operand. @@ -1594,95 +1596,111 @@ Error InstInternal::queryFeatures(Arch arch, const BaseInst& inst, const Operand } if (isAVX2) - out->remove(CpuFeatures::X86::kAVX); + out->remove(Ext::kAVX); else - out->remove(CpuFeatures::X86::kAVX2); + out->remove(Ext::kAVX2); } - // Handle AVX|AVX2|FMA|F16C vs AVX512 overlap. - if (out->has(CpuFeatures::X86::kAVX) || out->has(CpuFeatures::X86::kAVX2) || out->has(CpuFeatures::X86::kFMA) || out->has(CpuFeatures::X86::kF16C)) { - // Only AVX512-F|BW|DQ allow to encode AVX/AVX2/FMA/F16C instructions - if (out->has(CpuFeatures::X86::kAVX512_F) || out->has(CpuFeatures::X86::kAVX512_BW) || out->has(CpuFeatures::X86::kAVX512_DQ)) { - uint32_t usesAvx512 = InstInternal_usesAvx512(options, inst.extraReg(), regAnalysis); - uint32_t mustUseEvex = 0; + // Handle AVX vs AVX512 overlap. + // + // In general, non-AVX encoding is preferred, however, AVX encoded instructions that were initially provided + // as AVX-512 instructions must naturally prefer AVX-512 encoding, as that was the first one provided. + if (out->hasAny(Ext::kAVX, + Ext::kAVX_IFMA, + Ext::kAVX_NE_CONVERT, + Ext::kAVX_VNNI, + Ext::kAVX2, + Ext::kF16C, + Ext::kFMA) + && + out->hasAny(Ext::kAVX512_BF16, + Ext::kAVX512_BW, + Ext::kAVX512_DQ, + Ext::kAVX512_F, + Ext::kAVX512_IFMA, + Ext::kAVX512_VNNI)) { - switch (instId) { - // Special case: VPBROADCAST[B|D|Q|W] only supports r32/r64 with EVEX prefix. - case Inst::kIdVpbroadcastb: - case Inst::kIdVpbroadcastd: - case Inst::kIdVpbroadcastq: - case Inst::kIdVpbroadcastw: - mustUseEvex = opCount >= 2 && x86::Reg::isGp(operands[1]); - break; + uint32_t useEvex = InstInternal_usesAvx512(options, inst.extraReg(), regAnalysis) | regAnalysis.highVecUsed; + switch (instId) { + // Special case: VPBROADCAST[B|D|Q|W] only supports r32/r64 with EVEX prefix. + case Inst::kIdVpbroadcastb: + case Inst::kIdVpbroadcastd: + case Inst::kIdVpbroadcastq: + case Inst::kIdVpbroadcastw: + useEvex |= uint32_t(opCount >= 2 && x86::Reg::isGp(operands[1])); + break; - case Inst::kIdVcvtpd2dq: - case Inst::kIdVcvtpd2ps: - case Inst::kIdVcvttpd2dq: - mustUseEvex = opCount >= 2 && Reg::isYmm(operands[0]); - break; + case Inst::kIdVcvtpd2dq: + case Inst::kIdVcvtpd2ps: + case Inst::kIdVcvttpd2dq: + useEvex |= uint32_t(opCount >= 2 && Reg::isYmm(operands[0])); + break; - case Inst::kIdVgatherdpd: - case Inst::kIdVgatherdps: - case Inst::kIdVgatherqpd: - case Inst::kIdVgatherqps: - case Inst::kIdVpgatherdd: - case Inst::kIdVpgatherdq: - case Inst::kIdVpgatherqd: - case Inst::kIdVpgatherqq: - if (opCount == 2) - mustUseEvex = true; - break; + case Inst::kIdVgatherdpd: + case Inst::kIdVgatherdps: + case Inst::kIdVgatherqpd: + case Inst::kIdVgatherqps: + case Inst::kIdVpgatherdd: + case Inst::kIdVpgatherdq: + case Inst::kIdVpgatherqd: + case Inst::kIdVpgatherqq: + useEvex |= uint32_t(opCount == 2); + break; - // Special case: These instructions only allow `reg, reg. imm` combination in AVX|AVX2 mode, then - // AVX-512 introduced `reg, reg/mem, imm` combination that uses EVEX prefix. This means that if - // the second operand is memory then this is AVX-512_BW instruction and not AVX/AVX2 instruction. - case Inst::kIdVpslldq: - case Inst::kIdVpslld: - case Inst::kIdVpsllq: - case Inst::kIdVpsllw: - case Inst::kIdVpsrad: - case Inst::kIdVpsraq: - case Inst::kIdVpsraw: - case Inst::kIdVpsrld: - case Inst::kIdVpsrldq: - case Inst::kIdVpsrlq: - case Inst::kIdVpsrlw: - mustUseEvex = opCount >= 2 && operands[1].isMem(); - break; + // Special case: These instructions only allow `reg, reg. imm` combination in AVX|AVX2 mode, then + // AVX-512 introduced `reg, reg/mem, imm` combination that uses EVEX prefix. This means that if + // the second operand is memory then this is AVX-512_BW instruction and not AVX/AVX2 instruction. + case Inst::kIdVpslldq: + case Inst::kIdVpslld: + case Inst::kIdVpsllq: + case Inst::kIdVpsllw: + case Inst::kIdVpsrad: + case Inst::kIdVpsraq: + case Inst::kIdVpsraw: + case Inst::kIdVpsrld: + case Inst::kIdVpsrldq: + case Inst::kIdVpsrlq: + case Inst::kIdVpsrlw: + useEvex |= uint32_t(opCount >= 2 && operands[1].isMem()); + break; - // Special case: VPERMPD - AVX2 vs AVX512-F case. - case Inst::kIdVpermpd: - mustUseEvex = opCount >= 3 && !operands[2].isImm(); - break; + // Special case: VPERMPD - AVX2 vs AVX512-F case. + case Inst::kIdVpermpd: + useEvex |= uint32_t(opCount >= 3 && !operands[2].isImm()); + break; - // Special case: VPERMQ - AVX2 vs AVX512-F case. - case Inst::kIdVpermq: - mustUseEvex = opCount >= 3 && (operands[1].isMem() || !operands[2].isImm()); - break; - } - - if (!(usesAvx512 | mustUseEvex | regAnalysis.highVecUsed)) - out->remove(CpuFeatures::X86::kAVX512_F, CpuFeatures::X86::kAVX512_BW, CpuFeatures::X86::kAVX512_DQ, CpuFeatures::X86::kAVX512_VL); - else - out->remove(CpuFeatures::X86::kAVX, CpuFeatures::X86::kAVX2, CpuFeatures::X86::kFMA, CpuFeatures::X86::kF16C); + // Special case: VPERMQ - AVX2 vs AVX512-F case. + case Inst::kIdVpermq: + useEvex |= uint32_t(opCount >= 3 && (operands[1].isMem() || !operands[2].isImm())); + break; } - } - // Handle AVX_VNNI vs AVX512_VNNI overlap. - if (out->has(CpuFeatures::X86::kAVX512_VNNI)) { - // By default the AVX512_VNNI instruction should be used, because it was introduced first. However, VEX|VEX3 - // prefix can be used to force AVX_VNNI instead. - uint32_t usesAvx512 = InstInternal_usesAvx512(options, inst.extraReg(), regAnalysis); + if (instInfo.commonInfo().preferEvex() && !Support::test(options, InstOptions::kX86_Vex | InstOptions::kX86_Vex3)) + useEvex = 1; - if (!usesAvx512 && Support::test(options, InstOptions::kX86_Vex | InstOptions::kX86_Vex3)) - out->remove(CpuFeatures::X86::kAVX512_VNNI, CpuFeatures::X86::kAVX512_VL); - else - out->remove(CpuFeatures::X86::kAVX_VNNI); + if (useEvex) { + out->remove(Ext::kAVX, + Ext::kAVX_IFMA, + Ext::kAVX_NE_CONVERT, + Ext::kAVX_VNNI, + Ext::kAVX2, + Ext::kF16C, + Ext::kFMA); + } + else { + out->remove(Ext::kAVX512_BF16, + Ext::kAVX512_BW, + Ext::kAVX512_DQ, + Ext::kAVX512_F, + Ext::kAVX512_IFMA, + Ext::kAVX512_VL, + Ext::kAVX512_VNNI); + } } // Clear AVX512_VL if ZMM register is used. if (regAnalysis.hasRegType(RegType::kX86_Zmm)) - out->remove(CpuFeatures::X86::kAVX512_VL); + out->remove(Ext::kAVX512_VL); } return kErrorOk; diff --git a/src/asmjit/x86/x86instdb.cpp b/src/asmjit/x86/x86instdb.cpp index c5d9e45..635936f 100644 --- a/src/asmjit/x86/x86instdb.cpp +++ b/src/asmjit/x86/x86instdb.cpp @@ -67,1666 +67,1725 @@ const InstDB::InstInfo InstDB::_instInfoTable[] = { INST(None , None , 0 , 0 , 0 , 0 , 0 , 0 ), // #0 INST(Aaa , X86Op_xAX , O(000000,37,_,_,_,_,_,_ ), 0 , 0 , 0 , 1 , 1 ), // #1 INST(Aad , X86I_xAX , O(000000,D5,_,_,_,_,_,_ ), 0 , 0 , 0 , 2 , 1 ), // #2 - INST(Aam , X86I_xAX , O(000000,D4,_,_,_,_,_,_ ), 0 , 0 , 0 , 2 , 1 ), // #3 - INST(Aas , X86Op_xAX , O(000000,3F,_,_,_,_,_,_ ), 0 , 0 , 0 , 1 , 1 ), // #4 - INST(Adc , X86Arith , O(000000,10,2,_,x,_,_,_ ), 0 , 1 , 0 , 3 , 2 ), // #5 - INST(Adcx , X86Rm , O(660F38,F6,_,_,x,_,_,_ ), 0 , 2 , 0 , 4 , 3 ), // #6 - INST(Add , X86Arith , O(000000,00,0,_,x,_,_,_ ), 0 , 0 , 0 , 3 , 1 ), // #7 - INST(Addpd , ExtRm , O(660F00,58,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #8 - INST(Addps , ExtRm , O(000F00,58,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #9 - INST(Addsd , ExtRm , O(F20F00,58,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 4 ), // #10 - INST(Addss , ExtRm , O(F30F00,58,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #11 - INST(Addsubpd , ExtRm , O(660F00,D0,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 6 ), // #12 - INST(Addsubps , ExtRm , O(F20F00,D0,_,_,_,_,_,_ ), 0 , 5 , 0 , 5 , 6 ), // #13 - INST(Adox , X86Rm , O(F30F38,F6,_,_,x,_,_,_ ), 0 , 7 , 0 , 4 , 7 ), // #14 - INST(Aesdec , ExtRm , O(660F38,DE,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 8 ), // #15 - INST(Aesdeclast , ExtRm , O(660F38,DF,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 8 ), // #16 - INST(Aesenc , ExtRm , O(660F38,DC,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 8 ), // #17 - INST(Aesenclast , ExtRm , O(660F38,DD,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 8 ), // #18 - INST(Aesimc , ExtRm , O(660F38,DB,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 8 ), // #19 - INST(Aeskeygenassist , ExtRmi , O(660F3A,DF,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 8 ), // #20 - INST(And , X86Arith , O(000000,20,4,_,x,_,_,_ ), 0 , 9 , 0 , 9 , 1 ), // #21 - INST(Andn , VexRvm_Wx , V(000F38,F2,_,0,x,_,_,_ ), 0 , 10 , 0 , 10 , 9 ), // #22 - INST(Andnpd , ExtRm , O(660F00,55,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #23 - INST(Andnps , ExtRm , O(000F00,55,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #24 - INST(Andpd , ExtRm , O(660F00,54,_,_,_,_,_,_ ), 0 , 3 , 0 , 11 , 4 ), // #25 - INST(Andps , ExtRm , O(000F00,54,_,_,_,_,_,_ ), 0 , 4 , 0 , 11 , 5 ), // #26 - INST(Arpl , X86Mr_NoSize , O(000000,63,_,_,_,_,_,_ ), 0 , 0 , 0 , 12 , 10 ), // #27 - INST(Bextr , VexRmv_Wx , V(000F38,F7,_,0,x,_,_,_ ), 0 , 10 , 0 , 13 , 9 ), // #28 - INST(Blcfill , VexVm_Wx , V(XOP_M9,01,1,0,x,_,_,_ ), 0 , 11 , 0 , 14 , 11 ), // #29 - INST(Blci , VexVm_Wx , V(XOP_M9,02,6,0,x,_,_,_ ), 0 , 12 , 0 , 14 , 11 ), // #30 - INST(Blcic , VexVm_Wx , V(XOP_M9,01,5,0,x,_,_,_ ), 0 , 13 , 0 , 14 , 11 ), // #31 - INST(Blcmsk , VexVm_Wx , V(XOP_M9,02,1,0,x,_,_,_ ), 0 , 11 , 0 , 14 , 11 ), // #32 - INST(Blcs , VexVm_Wx , V(XOP_M9,01,3,0,x,_,_,_ ), 0 , 14 , 0 , 14 , 11 ), // #33 - INST(Blendpd , ExtRmi , O(660F3A,0D,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 12 ), // #34 - INST(Blendps , ExtRmi , O(660F3A,0C,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 12 ), // #35 - INST(Blendvpd , ExtRm_XMM0 , O(660F38,15,_,_,_,_,_,_ ), 0 , 2 , 0 , 15 , 12 ), // #36 - INST(Blendvps , ExtRm_XMM0 , O(660F38,14,_,_,_,_,_,_ ), 0 , 2 , 0 , 15 , 12 ), // #37 - INST(Blsfill , VexVm_Wx , V(XOP_M9,01,2,0,x,_,_,_ ), 0 , 15 , 0 , 14 , 11 ), // #38 - INST(Blsi , VexVm_Wx , V(000F38,F3,3,0,x,_,_,_ ), 0 , 16 , 0 , 14 , 9 ), // #39 - INST(Blsic , VexVm_Wx , V(XOP_M9,01,6,0,x,_,_,_ ), 0 , 12 , 0 , 14 , 11 ), // #40 - INST(Blsmsk , VexVm_Wx , V(000F38,F3,2,0,x,_,_,_ ), 0 , 17 , 0 , 14 , 9 ), // #41 - INST(Blsr , VexVm_Wx , V(000F38,F3,1,0,x,_,_,_ ), 0 , 18 , 0 , 14 , 9 ), // #42 - INST(Bndcl , X86Rm , O(F30F00,1A,_,_,_,_,_,_ ), 0 , 6 , 0 , 16 , 13 ), // #43 - INST(Bndcn , X86Rm , O(F20F00,1B,_,_,_,_,_,_ ), 0 , 5 , 0 , 16 , 13 ), // #44 - INST(Bndcu , X86Rm , O(F20F00,1A,_,_,_,_,_,_ ), 0 , 5 , 0 , 16 , 13 ), // #45 - INST(Bndldx , X86Rm , O(000F00,1A,_,_,_,_,_,_ ), 0 , 4 , 0 , 17 , 13 ), // #46 - INST(Bndmk , X86Rm , O(F30F00,1B,_,_,_,_,_,_ ), 0 , 6 , 0 , 18 , 13 ), // #47 - INST(Bndmov , X86Bndmov , O(660F00,1A,_,_,_,_,_,_ ), O(660F00,1B,_,_,_,_,_,_ ), 3 , 1 , 19 , 13 ), // #48 - INST(Bndstx , X86Mr , O(000F00,1B,_,_,_,_,_,_ ), 0 , 4 , 0 , 20 , 13 ), // #49 - INST(Bound , X86Rm , O(000000,62,_,_,_,_,_,_ ), 0 , 0 , 0 , 21 , 0 ), // #50 - INST(Bsf , X86Rm , O(000F00,BC,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 1 ), // #51 - INST(Bsr , X86Rm , O(000F00,BD,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 1 ), // #52 - INST(Bswap , X86Bswap , O(000F00,C8,_,_,x,_,_,_ ), 0 , 4 , 0 , 23 , 0 ), // #53 - INST(Bt , X86Bt , O(000F00,A3,_,_,x,_,_,_ ), O(000F00,BA,4,_,x,_,_,_ ), 4 , 2 , 24 , 14 ), // #54 - INST(Btc , X86Bt , O(000F00,BB,_,_,x,_,_,_ ), O(000F00,BA,7,_,x,_,_,_ ), 4 , 3 , 25 , 14 ), // #55 - INST(Btr , X86Bt , O(000F00,B3,_,_,x,_,_,_ ), O(000F00,BA,6,_,x,_,_,_ ), 4 , 4 , 25 , 14 ), // #56 - INST(Bts , X86Bt , O(000F00,AB,_,_,x,_,_,_ ), O(000F00,BA,5,_,x,_,_,_ ), 4 , 5 , 25 , 14 ), // #57 - INST(Bzhi , VexRmv_Wx , V(000F38,F5,_,0,x,_,_,_ ), 0 , 10 , 0 , 13 , 15 ), // #58 - INST(Call , X86Call , O(000000,FF,2,_,_,_,_,_ ), 0 , 1 , 0 , 26 , 1 ), // #59 - INST(Cbw , X86Op_xAX , O(660000,98,_,_,_,_,_,_ ), 0 , 19 , 0 , 27 , 0 ), // #60 - INST(Cdq , X86Op_xDX_xAX , O(000000,99,_,_,_,_,_,_ ), 0 , 0 , 0 , 28 , 0 ), // #61 - INST(Cdqe , X86Op_xAX , O(000000,98,_,_,1,_,_,_ ), 0 , 20 , 0 , 29 , 0 ), // #62 - INST(Clac , X86Op , O(000F01,CA,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 16 ), // #63 - INST(Clc , X86Op , O(000000,F8,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 17 ), // #64 - INST(Cld , X86Op , O(000000,FC,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 18 ), // #65 - INST(Cldemote , X86M_Only , O(000F00,1C,0,_,_,_,_,_ ), 0 , 4 , 0 , 31 , 19 ), // #66 - INST(Clflush , X86M_Only , O(000F00,AE,7,_,_,_,_,_ ), 0 , 22 , 0 , 31 , 20 ), // #67 - INST(Clflushopt , X86M_Only , O(660F00,AE,7,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 21 ), // #68 - INST(Clgi , X86Op , O(000F01,DD,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 22 ), // #69 - INST(Cli , X86Op , O(000000,FA,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 23 ), // #70 - INST(Clrssbsy , X86M_Only , O(F30F00,AE,6,_,_,_,_,_ ), 0 , 24 , 0 , 32 , 24 ), // #71 - INST(Clts , X86Op , O(000F00,06,_,_,_,_,_,_ ), 0 , 4 , 0 , 30 , 0 ), // #72 - INST(Clui , X86Op , O(F30F01,EE,_,_,_,_,_,_ ), 0 , 25 , 0 , 33 , 25 ), // #73 - INST(Clwb , X86M_Only , O(660F00,AE,6,_,_,_,_,_ ), 0 , 26 , 0 , 31 , 26 ), // #74 - INST(Clzero , X86Op_MemZAX , O(000F01,FC,_,_,_,_,_,_ ), 0 , 21 , 0 , 34 , 27 ), // #75 - INST(Cmc , X86Op , O(000000,F5,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 28 ), // #76 - INST(Cmova , X86Rm , O(000F00,47,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 29 ), // #77 - INST(Cmovae , X86Rm , O(000F00,43,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 30 ), // #78 - INST(Cmovb , X86Rm , O(000F00,42,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 30 ), // #79 - INST(Cmovbe , X86Rm , O(000F00,46,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 29 ), // #80 - INST(Cmovc , X86Rm , O(000F00,42,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 30 ), // #81 - INST(Cmove , X86Rm , O(000F00,44,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 31 ), // #82 - INST(Cmovg , X86Rm , O(000F00,4F,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 32 ), // #83 - INST(Cmovge , X86Rm , O(000F00,4D,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 33 ), // #84 - INST(Cmovl , X86Rm , O(000F00,4C,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 33 ), // #85 - INST(Cmovle , X86Rm , O(000F00,4E,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 32 ), // #86 - INST(Cmovna , X86Rm , O(000F00,46,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 29 ), // #87 - INST(Cmovnae , X86Rm , O(000F00,42,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 30 ), // #88 - INST(Cmovnb , X86Rm , O(000F00,43,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 30 ), // #89 - INST(Cmovnbe , X86Rm , O(000F00,47,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 29 ), // #90 - INST(Cmovnc , X86Rm , O(000F00,43,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 30 ), // #91 - INST(Cmovne , X86Rm , O(000F00,45,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 31 ), // #92 - INST(Cmovng , X86Rm , O(000F00,4E,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 32 ), // #93 - INST(Cmovnge , X86Rm , O(000F00,4C,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 33 ), // #94 - INST(Cmovnl , X86Rm , O(000F00,4D,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 33 ), // #95 - INST(Cmovnle , X86Rm , O(000F00,4F,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 32 ), // #96 - INST(Cmovno , X86Rm , O(000F00,41,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 34 ), // #97 - INST(Cmovnp , X86Rm , O(000F00,4B,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 35 ), // #98 - INST(Cmovns , X86Rm , O(000F00,49,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 36 ), // #99 - INST(Cmovnz , X86Rm , O(000F00,45,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 31 ), // #100 - INST(Cmovo , X86Rm , O(000F00,40,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 34 ), // #101 - INST(Cmovp , X86Rm , O(000F00,4A,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 35 ), // #102 - INST(Cmovpe , X86Rm , O(000F00,4A,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 35 ), // #103 - INST(Cmovpo , X86Rm , O(000F00,4B,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 35 ), // #104 - INST(Cmovs , X86Rm , O(000F00,48,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 36 ), // #105 - INST(Cmovz , X86Rm , O(000F00,44,_,_,x,_,_,_ ), 0 , 4 , 0 , 22 , 31 ), // #106 - INST(Cmp , X86Arith , O(000000,38,7,_,x,_,_,_ ), 0 , 27 , 0 , 35 , 1 ), // #107 - INST(Cmppd , ExtRmi , O(660F00,C2,_,_,_,_,_,_ ), 0 , 3 , 0 , 8 , 4 ), // #108 - INST(Cmpps , ExtRmi , O(000F00,C2,_,_,_,_,_,_ ), 0 , 4 , 0 , 8 , 5 ), // #109 - INST(Cmps , X86StrMm , O(000000,A6,_,_,_,_,_,_ ), 0 , 0 , 0 , 36 , 37 ), // #110 - INST(Cmpsd , ExtRmi , O(F20F00,C2,_,_,_,_,_,_ ), 0 , 5 , 0 , 37 , 4 ), // #111 - INST(Cmpss , ExtRmi , O(F30F00,C2,_,_,_,_,_,_ ), 0 , 6 , 0 , 38 , 5 ), // #112 - INST(Cmpxchg , X86Cmpxchg , O(000F00,B0,_,_,x,_,_,_ ), 0 , 4 , 0 , 39 , 38 ), // #113 - INST(Cmpxchg16b , X86Cmpxchg8b_16b , O(000F00,C7,1,_,1,_,_,_ ), 0 , 28 , 0 , 40 , 39 ), // #114 - INST(Cmpxchg8b , X86Cmpxchg8b_16b , O(000F00,C7,1,_,_,_,_,_ ), 0 , 29 , 0 , 41 , 40 ), // #115 - INST(Comisd , ExtRm , O(660F00,2F,_,_,_,_,_,_ ), 0 , 3 , 0 , 6 , 41 ), // #116 - INST(Comiss , ExtRm , O(000F00,2F,_,_,_,_,_,_ ), 0 , 4 , 0 , 7 , 42 ), // #117 - INST(Cpuid , X86Op , O(000F00,A2,_,_,_,_,_,_ ), 0 , 4 , 0 , 42 , 43 ), // #118 - INST(Cqo , X86Op_xDX_xAX , O(000000,99,_,_,1,_,_,_ ), 0 , 20 , 0 , 43 , 0 ), // #119 - INST(Crc32 , X86Crc , O(F20F38,F0,_,_,x,_,_,_ ), 0 , 30 , 0 , 44 , 44 ), // #120 - INST(Cvtdq2pd , ExtRm , O(F30F00,E6,_,_,_,_,_,_ ), 0 , 6 , 0 , 6 , 4 ), // #121 - INST(Cvtdq2ps , ExtRm , O(000F00,5B,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 4 ), // #122 - INST(Cvtpd2dq , ExtRm , O(F20F00,E6,_,_,_,_,_,_ ), 0 , 5 , 0 , 5 , 4 ), // #123 - INST(Cvtpd2pi , ExtRm , O(660F00,2D,_,_,_,_,_,_ ), 0 , 3 , 0 , 45 , 4 ), // #124 - INST(Cvtpd2ps , ExtRm , O(660F00,5A,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #125 - INST(Cvtpi2pd , ExtRm , O(660F00,2A,_,_,_,_,_,_ ), 0 , 3 , 0 , 46 , 4 ), // #126 - INST(Cvtpi2ps , ExtRm , O(000F00,2A,_,_,_,_,_,_ ), 0 , 4 , 0 , 46 , 5 ), // #127 - INST(Cvtps2dq , ExtRm , O(660F00,5B,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #128 - INST(Cvtps2pd , ExtRm , O(000F00,5A,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 4 ), // #129 - INST(Cvtps2pi , ExtRm , O(000F00,2D,_,_,_,_,_,_ ), 0 , 4 , 0 , 47 , 5 ), // #130 - INST(Cvtsd2si , ExtRm_Wx_GpqOnly , O(F20F00,2D,_,_,x,_,_,_ ), 0 , 5 , 0 , 48 , 4 ), // #131 - INST(Cvtsd2ss , ExtRm , O(F20F00,5A,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 4 ), // #132 - INST(Cvtsi2sd , ExtRm_Wx , O(F20F00,2A,_,_,x,_,_,_ ), 0 , 5 , 0 , 49 , 4 ), // #133 - INST(Cvtsi2ss , ExtRm_Wx , O(F30F00,2A,_,_,x,_,_,_ ), 0 , 6 , 0 , 49 , 5 ), // #134 - INST(Cvtss2sd , ExtRm , O(F30F00,5A,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 4 ), // #135 - INST(Cvtss2si , ExtRm_Wx_GpqOnly , O(F30F00,2D,_,_,x,_,_,_ ), 0 , 6 , 0 , 50 , 5 ), // #136 - INST(Cvttpd2dq , ExtRm , O(660F00,E6,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #137 - INST(Cvttpd2pi , ExtRm , O(660F00,2C,_,_,_,_,_,_ ), 0 , 3 , 0 , 45 , 4 ), // #138 - INST(Cvttps2dq , ExtRm , O(F30F00,5B,_,_,_,_,_,_ ), 0 , 6 , 0 , 5 , 4 ), // #139 - INST(Cvttps2pi , ExtRm , O(000F00,2C,_,_,_,_,_,_ ), 0 , 4 , 0 , 47 , 5 ), // #140 - INST(Cvttsd2si , ExtRm_Wx_GpqOnly , O(F20F00,2C,_,_,x,_,_,_ ), 0 , 5 , 0 , 48 , 4 ), // #141 - INST(Cvttss2si , ExtRm_Wx_GpqOnly , O(F30F00,2C,_,_,x,_,_,_ ), 0 , 6 , 0 , 50 , 5 ), // #142 - INST(Cwd , X86Op_xDX_xAX , O(660000,99,_,_,_,_,_,_ ), 0 , 19 , 0 , 51 , 0 ), // #143 - INST(Cwde , X86Op_xAX , O(000000,98,_,_,_,_,_,_ ), 0 , 0 , 0 , 52 , 0 ), // #144 - INST(Daa , X86Op , O(000000,27,_,_,_,_,_,_ ), 0 , 0 , 0 , 1 , 1 ), // #145 - INST(Das , X86Op , O(000000,2F,_,_,_,_,_,_ ), 0 , 0 , 0 , 1 , 1 ), // #146 - INST(Dec , X86IncDec , O(000000,FE,1,_,x,_,_,_ ), O(000000,48,_,_,x,_,_,_ ), 31 , 6 , 53 , 45 ), // #147 - INST(Div , X86M_GPB_MulDiv , O(000000,F6,6,_,x,_,_,_ ), 0 , 32 , 0 , 54 , 1 ), // #148 - INST(Divpd , ExtRm , O(660F00,5E,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #149 - INST(Divps , ExtRm , O(000F00,5E,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #150 - INST(Divsd , ExtRm , O(F20F00,5E,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 4 ), // #151 - INST(Divss , ExtRm , O(F30F00,5E,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #152 - INST(Dppd , ExtRmi , O(660F3A,41,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 12 ), // #153 - INST(Dpps , ExtRmi , O(660F3A,40,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 12 ), // #154 - INST(Emms , X86Op , O(000F00,77,_,_,_,_,_,_ ), 0 , 4 , 0 , 55 , 46 ), // #155 - INST(Endbr32 , X86Op_Mod11RM , O(F30F00,1E,7,_,_,_,_,3 ), 0 , 33 , 0 , 30 , 47 ), // #156 - INST(Endbr64 , X86Op_Mod11RM , O(F30F00,1E,7,_,_,_,_,2 ), 0 , 34 , 0 , 30 , 47 ), // #157 - INST(Enqcmd , X86EnqcmdMovdir64b , O(F20F38,F8,_,_,_,_,_,_ ), 0 , 30 , 0 , 56 , 48 ), // #158 - INST(Enqcmds , X86EnqcmdMovdir64b , O(F30F38,F8,_,_,_,_,_,_ ), 0 , 7 , 0 , 56 , 48 ), // #159 - INST(Enter , X86Enter , O(000000,C8,_,_,_,_,_,_ ), 0 , 0 , 0 , 57 , 0 ), // #160 - INST(Extractps , ExtExtract , O(660F3A,17,_,_,_,_,_,_ ), 0 , 8 , 0 , 58 , 12 ), // #161 - INST(Extrq , ExtExtrq , O(660F00,79,_,_,_,_,_,_ ), O(660F00,78,0,_,_,_,_,_ ), 3 , 7 , 59 , 49 ), // #162 - INST(F2xm1 , FpuOp , O_FPU(00,D9F0,_) , 0 , 35 , 0 , 30 , 0 ), // #163 - INST(Fabs , FpuOp , O_FPU(00,D9E1,_) , 0 , 35 , 0 , 30 , 0 ), // #164 - INST(Fadd , FpuArith , O_FPU(00,C0C0,0) , 0 , 36 , 0 , 60 , 0 ), // #165 - INST(Faddp , FpuRDef , O_FPU(00,DEC0,_) , 0 , 37 , 0 , 61 , 0 ), // #166 - INST(Fbld , X86M_Only , O_FPU(00,00DF,4) , 0 , 38 , 0 , 62 , 0 ), // #167 - INST(Fbstp , X86M_Only , O_FPU(00,00DF,6) , 0 , 39 , 0 , 62 , 0 ), // #168 - INST(Fchs , FpuOp , O_FPU(00,D9E0,_) , 0 , 35 , 0 , 30 , 0 ), // #169 - INST(Fclex , FpuOp , O_FPU(9B,DBE2,_) , 0 , 40 , 0 , 30 , 0 ), // #170 - INST(Fcmovb , FpuR , O_FPU(00,DAC0,_) , 0 , 41 , 0 , 63 , 30 ), // #171 - INST(Fcmovbe , FpuR , O_FPU(00,DAD0,_) , 0 , 41 , 0 , 63 , 29 ), // #172 - INST(Fcmove , FpuR , O_FPU(00,DAC8,_) , 0 , 41 , 0 , 63 , 31 ), // #173 - INST(Fcmovnb , FpuR , O_FPU(00,DBC0,_) , 0 , 42 , 0 , 63 , 30 ), // #174 - INST(Fcmovnbe , FpuR , O_FPU(00,DBD0,_) , 0 , 42 , 0 , 63 , 29 ), // #175 - INST(Fcmovne , FpuR , O_FPU(00,DBC8,_) , 0 , 42 , 0 , 63 , 31 ), // #176 - INST(Fcmovnu , FpuR , O_FPU(00,DBD8,_) , 0 , 42 , 0 , 63 , 35 ), // #177 - INST(Fcmovu , FpuR , O_FPU(00,DAD8,_) , 0 , 41 , 0 , 63 , 35 ), // #178 - INST(Fcom , FpuCom , O_FPU(00,D0D0,2) , 0 , 43 , 0 , 64 , 0 ), // #179 - INST(Fcomi , FpuR , O_FPU(00,DBF0,_) , 0 , 42 , 0 , 63 , 50 ), // #180 - INST(Fcomip , FpuR , O_FPU(00,DFF0,_) , 0 , 44 , 0 , 63 , 50 ), // #181 - INST(Fcomp , FpuCom , O_FPU(00,D8D8,3) , 0 , 45 , 0 , 64 , 0 ), // #182 - INST(Fcompp , FpuOp , O_FPU(00,DED9,_) , 0 , 37 , 0 , 30 , 0 ), // #183 - INST(Fcos , FpuOp , O_FPU(00,D9FF,_) , 0 , 35 , 0 , 30 , 0 ), // #184 - INST(Fdecstp , FpuOp , O_FPU(00,D9F6,_) , 0 , 35 , 0 , 30 , 0 ), // #185 - INST(Fdiv , FpuArith , O_FPU(00,F0F8,6) , 0 , 46 , 0 , 60 , 0 ), // #186 - INST(Fdivp , FpuRDef , O_FPU(00,DEF8,_) , 0 , 37 , 0 , 61 , 0 ), // #187 - INST(Fdivr , FpuArith , O_FPU(00,F8F0,7) , 0 , 47 , 0 , 60 , 0 ), // #188 - INST(Fdivrp , FpuRDef , O_FPU(00,DEF0,_) , 0 , 37 , 0 , 61 , 0 ), // #189 - INST(Femms , X86Op , O(000F00,0E,_,_,_,_,_,_ ), 0 , 4 , 0 , 30 , 51 ), // #190 - INST(Ffree , FpuR , O_FPU(00,DDC0,_) , 0 , 48 , 0 , 63 , 0 ), // #191 - INST(Fiadd , FpuM , O_FPU(00,00DA,0) , 0 , 49 , 0 , 65 , 0 ), // #192 - INST(Ficom , FpuM , O_FPU(00,00DA,2) , 0 , 50 , 0 , 65 , 0 ), // #193 - INST(Ficomp , FpuM , O_FPU(00,00DA,3) , 0 , 51 , 0 , 65 , 0 ), // #194 - INST(Fidiv , FpuM , O_FPU(00,00DA,6) , 0 , 39 , 0 , 65 , 0 ), // #195 - INST(Fidivr , FpuM , O_FPU(00,00DA,7) , 0 , 52 , 0 , 65 , 0 ), // #196 - INST(Fild , FpuM , O_FPU(00,00DB,0) , O_FPU(00,00DF,5) , 49 , 8 , 66 , 0 ), // #197 - INST(Fimul , FpuM , O_FPU(00,00DA,1) , 0 , 53 , 0 , 65 , 0 ), // #198 - INST(Fincstp , FpuOp , O_FPU(00,D9F7,_) , 0 , 35 , 0 , 30 , 0 ), // #199 - INST(Finit , FpuOp , O_FPU(9B,DBE3,_) , 0 , 40 , 0 , 30 , 0 ), // #200 - INST(Fist , FpuM , O_FPU(00,00DB,2) , 0 , 50 , 0 , 65 , 0 ), // #201 - INST(Fistp , FpuM , O_FPU(00,00DB,3) , O_FPU(00,00DF,7) , 51 , 9 , 66 , 0 ), // #202 - INST(Fisttp , FpuM , O_FPU(00,00DB,1) , O_FPU(00,00DD,1) , 53 , 10 , 66 , 6 ), // #203 - INST(Fisub , FpuM , O_FPU(00,00DA,4) , 0 , 38 , 0 , 65 , 0 ), // #204 - INST(Fisubr , FpuM , O_FPU(00,00DA,5) , 0 , 54 , 0 , 65 , 0 ), // #205 - INST(Fld , FpuFldFst , O_FPU(00,00D9,0) , O_FPU(00,00DB,5) , 49 , 11 , 67 , 0 ), // #206 - INST(Fld1 , FpuOp , O_FPU(00,D9E8,_) , 0 , 35 , 0 , 30 , 0 ), // #207 - INST(Fldcw , X86M_Only , O_FPU(00,00D9,5) , 0 , 54 , 0 , 68 , 0 ), // #208 - INST(Fldenv , X86M_Only , O_FPU(00,00D9,4) , 0 , 38 , 0 , 69 , 0 ), // #209 - INST(Fldl2e , FpuOp , O_FPU(00,D9EA,_) , 0 , 35 , 0 , 30 , 0 ), // #210 - INST(Fldl2t , FpuOp , O_FPU(00,D9E9,_) , 0 , 35 , 0 , 30 , 0 ), // #211 - INST(Fldlg2 , FpuOp , O_FPU(00,D9EC,_) , 0 , 35 , 0 , 30 , 0 ), // #212 - INST(Fldln2 , FpuOp , O_FPU(00,D9ED,_) , 0 , 35 , 0 , 30 , 0 ), // #213 - INST(Fldpi , FpuOp , O_FPU(00,D9EB,_) , 0 , 35 , 0 , 30 , 0 ), // #214 - INST(Fldz , FpuOp , O_FPU(00,D9EE,_) , 0 , 35 , 0 , 30 , 0 ), // #215 - INST(Fmul , FpuArith , O_FPU(00,C8C8,1) , 0 , 55 , 0 , 60 , 0 ), // #216 - INST(Fmulp , FpuRDef , O_FPU(00,DEC8,_) , 0 , 37 , 0 , 61 , 0 ), // #217 - INST(Fnclex , FpuOp , O_FPU(00,DBE2,_) , 0 , 42 , 0 , 30 , 0 ), // #218 - INST(Fninit , FpuOp , O_FPU(00,DBE3,_) , 0 , 42 , 0 , 30 , 0 ), // #219 - INST(Fnop , FpuOp , O_FPU(00,D9D0,_) , 0 , 35 , 0 , 30 , 0 ), // #220 - INST(Fnsave , X86M_Only , O_FPU(00,00DD,6) , 0 , 39 , 0 , 69 , 0 ), // #221 - INST(Fnstcw , X86M_Only , O_FPU(00,00D9,7) , 0 , 52 , 0 , 68 , 0 ), // #222 - INST(Fnstenv , X86M_Only , O_FPU(00,00D9,6) , 0 , 39 , 0 , 69 , 0 ), // #223 - INST(Fnstsw , FpuStsw , O_FPU(00,00DD,7) , O_FPU(00,DFE0,_) , 52 , 12 , 70 , 0 ), // #224 - INST(Fpatan , FpuOp , O_FPU(00,D9F3,_) , 0 , 35 , 0 , 30 , 0 ), // #225 - INST(Fprem , FpuOp , O_FPU(00,D9F8,_) , 0 , 35 , 0 , 30 , 0 ), // #226 - INST(Fprem1 , FpuOp , O_FPU(00,D9F5,_) , 0 , 35 , 0 , 30 , 0 ), // #227 - INST(Fptan , FpuOp , O_FPU(00,D9F2,_) , 0 , 35 , 0 , 30 , 0 ), // #228 - INST(Frndint , FpuOp , O_FPU(00,D9FC,_) , 0 , 35 , 0 , 30 , 0 ), // #229 - INST(Frstor , X86M_Only , O_FPU(00,00DD,4) , 0 , 38 , 0 , 69 , 0 ), // #230 - INST(Fsave , X86M_Only , O_FPU(9B,00DD,6) , 0 , 56 , 0 , 69 , 0 ), // #231 - INST(Fscale , FpuOp , O_FPU(00,D9FD,_) , 0 , 35 , 0 , 30 , 0 ), // #232 - INST(Fsin , FpuOp , O_FPU(00,D9FE,_) , 0 , 35 , 0 , 30 , 0 ), // #233 - INST(Fsincos , FpuOp , O_FPU(00,D9FB,_) , 0 , 35 , 0 , 30 , 0 ), // #234 - INST(Fsqrt , FpuOp , O_FPU(00,D9FA,_) , 0 , 35 , 0 , 30 , 0 ), // #235 - INST(Fst , FpuFldFst , O_FPU(00,00D9,2) , 0 , 50 , 0 , 71 , 0 ), // #236 - INST(Fstcw , X86M_Only , O_FPU(9B,00D9,7) , 0 , 57 , 0 , 68 , 0 ), // #237 - INST(Fstenv , X86M_Only , O_FPU(9B,00D9,6) , 0 , 56 , 0 , 69 , 0 ), // #238 - INST(Fstp , FpuFldFst , O_FPU(00,00D9,3) , O(000000,DB,7,_,_,_,_,_ ), 51 , 13 , 67 , 0 ), // #239 - INST(Fstsw , FpuStsw , O_FPU(9B,00DD,7) , O_FPU(9B,DFE0,_) , 57 , 14 , 70 , 0 ), // #240 - INST(Fsub , FpuArith , O_FPU(00,E0E8,4) , 0 , 58 , 0 , 60 , 0 ), // #241 - INST(Fsubp , FpuRDef , O_FPU(00,DEE8,_) , 0 , 37 , 0 , 61 , 0 ), // #242 - INST(Fsubr , FpuArith , O_FPU(00,E8E0,5) , 0 , 59 , 0 , 60 , 0 ), // #243 - INST(Fsubrp , FpuRDef , O_FPU(00,DEE0,_) , 0 , 37 , 0 , 61 , 0 ), // #244 - INST(Ftst , FpuOp , O_FPU(00,D9E4,_) , 0 , 35 , 0 , 30 , 0 ), // #245 - INST(Fucom , FpuRDef , O_FPU(00,DDE0,_) , 0 , 48 , 0 , 61 , 0 ), // #246 - INST(Fucomi , FpuR , O_FPU(00,DBE8,_) , 0 , 42 , 0 , 63 , 50 ), // #247 - INST(Fucomip , FpuR , O_FPU(00,DFE8,_) , 0 , 44 , 0 , 63 , 50 ), // #248 - INST(Fucomp , FpuRDef , O_FPU(00,DDE8,_) , 0 , 48 , 0 , 61 , 0 ), // #249 - INST(Fucompp , FpuOp , O_FPU(00,DAE9,_) , 0 , 41 , 0 , 30 , 0 ), // #250 - INST(Fwait , X86Op , O_FPU(00,009B,_) , 0 , 49 , 0 , 30 , 0 ), // #251 - INST(Fxam , FpuOp , O_FPU(00,D9E5,_) , 0 , 35 , 0 , 30 , 0 ), // #252 - INST(Fxch , FpuR , O_FPU(00,D9C8,_) , 0 , 35 , 0 , 61 , 0 ), // #253 - INST(Fxrstor , X86M_Only , O(000F00,AE,1,_,_,_,_,_ ), 0 , 29 , 0 , 69 , 52 ), // #254 - INST(Fxrstor64 , X86M_Only , O(000F00,AE,1,_,1,_,_,_ ), 0 , 28 , 0 , 72 , 52 ), // #255 - INST(Fxsave , X86M_Only , O(000F00,AE,0,_,_,_,_,_ ), 0 , 4 , 0 , 69 , 52 ), // #256 - INST(Fxsave64 , X86M_Only , O(000F00,AE,0,_,1,_,_,_ ), 0 , 60 , 0 , 72 , 52 ), // #257 - INST(Fxtract , FpuOp , O_FPU(00,D9F4,_) , 0 , 35 , 0 , 30 , 0 ), // #258 - INST(Fyl2x , FpuOp , O_FPU(00,D9F1,_) , 0 , 35 , 0 , 30 , 0 ), // #259 - INST(Fyl2xp1 , FpuOp , O_FPU(00,D9F9,_) , 0 , 35 , 0 , 30 , 0 ), // #260 - INST(Getsec , X86Op , O(000F00,37,_,_,_,_,_,_ ), 0 , 4 , 0 , 30 , 53 ), // #261 - INST(Gf2p8affineinvqb , ExtRmi , O(660F3A,CF,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 54 ), // #262 - INST(Gf2p8affineqb , ExtRmi , O(660F3A,CE,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 54 ), // #263 - INST(Gf2p8mulb , ExtRm , O(660F38,CF,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 54 ), // #264 - INST(Haddpd , ExtRm , O(660F00,7C,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 6 ), // #265 - INST(Haddps , ExtRm , O(F20F00,7C,_,_,_,_,_,_ ), 0 , 5 , 0 , 5 , 6 ), // #266 - INST(Hlt , X86Op , O(000000,F4,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 0 ), // #267 - INST(Hreset , X86Op_Mod11RM_I8 , O(F30F3A,F0,0,_,_,_,_,_ ), 0 , 61 , 0 , 73 , 55 ), // #268 - INST(Hsubpd , ExtRm , O(660F00,7D,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 6 ), // #269 - INST(Hsubps , ExtRm , O(F20F00,7D,_,_,_,_,_,_ ), 0 , 5 , 0 , 5 , 6 ), // #270 - INST(Idiv , X86M_GPB_MulDiv , O(000000,F6,7,_,x,_,_,_ ), 0 , 27 , 0 , 54 , 1 ), // #271 - INST(Imul , X86Imul , O(000000,F6,5,_,x,_,_,_ ), 0 , 62 , 0 , 74 , 1 ), // #272 - INST(In , X86In , O(000000,EC,_,_,_,_,_,_ ), O(000000,E4,_,_,_,_,_,_ ), 0 , 15 , 75 , 0 ), // #273 - INST(Inc , X86IncDec , O(000000,FE,0,_,x,_,_,_ ), O(000000,40,_,_,x,_,_,_ ), 0 , 16 , 53 , 45 ), // #274 - INST(Incsspd , X86M , O(F30F00,AE,5,_,0,_,_,_ ), 0 , 63 , 0 , 76 , 56 ), // #275 - INST(Incsspq , X86M , O(F30F00,AE,5,_,1,_,_,_ ), 0 , 64 , 0 , 77 , 56 ), // #276 - INST(Ins , X86Ins , O(000000,6C,_,_,_,_,_,_ ), 0 , 0 , 0 , 78 , 0 ), // #277 - INST(Insertps , ExtRmi , O(660F3A,21,_,_,_,_,_,_ ), 0 , 8 , 0 , 38 , 12 ), // #278 - INST(Insertq , ExtInsertq , O(F20F00,79,_,_,_,_,_,_ ), O(F20F00,78,_,_,_,_,_,_ ), 5 , 17 , 79 , 49 ), // #279 - INST(Int , X86Int , O(000000,CD,_,_,_,_,_,_ ), 0 , 0 , 0 , 80 , 0 ), // #280 - INST(Int3 , X86Op , O(000000,CC,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 0 ), // #281 - INST(Into , X86Op , O(000000,CE,_,_,_,_,_,_ ), 0 , 0 , 0 , 81 , 57 ), // #282 - INST(Invd , X86Op , O(000F00,08,_,_,_,_,_,_ ), 0 , 4 , 0 , 30 , 43 ), // #283 - INST(Invept , X86Rm_NoSize , O(660F38,80,_,_,_,_,_,_ ), 0 , 2 , 0 , 82 , 58 ), // #284 - INST(Invlpg , X86M_Only , O(000F00,01,7,_,_,_,_,_ ), 0 , 22 , 0 , 69 , 43 ), // #285 - INST(Invlpga , X86Op_xAddr , O(000F01,DF,_,_,_,_,_,_ ), 0 , 21 , 0 , 83 , 22 ), // #286 - INST(Invpcid , X86Rm_NoSize , O(660F38,82,_,_,_,_,_,_ ), 0 , 2 , 0 , 82 , 43 ), // #287 - INST(Invvpid , X86Rm_NoSize , O(660F38,81,_,_,_,_,_,_ ), 0 , 2 , 0 , 82 , 58 ), // #288 - INST(Iret , X86Op , O(660000,CF,_,_,_,_,_,_ ), 0 , 19 , 0 , 84 , 1 ), // #289 - INST(Iretd , X86Op , O(000000,CF,_,_,_,_,_,_ ), 0 , 0 , 0 , 84 , 1 ), // #290 - INST(Iretq , X86Op , O(000000,CF,_,_,1,_,_,_ ), 0 , 20 , 0 , 85 , 1 ), // #291 - INST(Ja , X86Jcc , O(000F00,87,_,_,_,_,_,_ ), O(000000,77,_,_,_,_,_,_ ), 4 , 18 , 86 , 59 ), // #292 - INST(Jae , X86Jcc , O(000F00,83,_,_,_,_,_,_ ), O(000000,73,_,_,_,_,_,_ ), 4 , 19 , 86 , 60 ), // #293 - INST(Jb , X86Jcc , O(000F00,82,_,_,_,_,_,_ ), O(000000,72,_,_,_,_,_,_ ), 4 , 20 , 86 , 60 ), // #294 - INST(Jbe , X86Jcc , O(000F00,86,_,_,_,_,_,_ ), O(000000,76,_,_,_,_,_,_ ), 4 , 21 , 86 , 59 ), // #295 - INST(Jc , X86Jcc , O(000F00,82,_,_,_,_,_,_ ), O(000000,72,_,_,_,_,_,_ ), 4 , 20 , 86 , 60 ), // #296 - INST(Je , X86Jcc , O(000F00,84,_,_,_,_,_,_ ), O(000000,74,_,_,_,_,_,_ ), 4 , 22 , 86 , 61 ), // #297 - INST(Jecxz , X86JecxzLoop , 0 , O(000000,E3,_,_,_,_,_,_ ), 0 , 23 , 87 , 0 ), // #298 - INST(Jg , X86Jcc , O(000F00,8F,_,_,_,_,_,_ ), O(000000,7F,_,_,_,_,_,_ ), 4 , 24 , 86 , 62 ), // #299 - INST(Jge , X86Jcc , O(000F00,8D,_,_,_,_,_,_ ), O(000000,7D,_,_,_,_,_,_ ), 4 , 25 , 86 , 63 ), // #300 - INST(Jl , X86Jcc , O(000F00,8C,_,_,_,_,_,_ ), O(000000,7C,_,_,_,_,_,_ ), 4 , 26 , 86 , 63 ), // #301 - INST(Jle , X86Jcc , O(000F00,8E,_,_,_,_,_,_ ), O(000000,7E,_,_,_,_,_,_ ), 4 , 27 , 86 , 62 ), // #302 - INST(Jmp , X86Jmp , O(000000,FF,4,_,_,_,_,_ ), O(000000,EB,_,_,_,_,_,_ ), 9 , 28 , 88 , 0 ), // #303 - INST(Jna , X86Jcc , O(000F00,86,_,_,_,_,_,_ ), O(000000,76,_,_,_,_,_,_ ), 4 , 21 , 86 , 59 ), // #304 - INST(Jnae , X86Jcc , O(000F00,82,_,_,_,_,_,_ ), O(000000,72,_,_,_,_,_,_ ), 4 , 20 , 86 , 60 ), // #305 - INST(Jnb , X86Jcc , O(000F00,83,_,_,_,_,_,_ ), O(000000,73,_,_,_,_,_,_ ), 4 , 19 , 86 , 60 ), // #306 - INST(Jnbe , X86Jcc , O(000F00,87,_,_,_,_,_,_ ), O(000000,77,_,_,_,_,_,_ ), 4 , 18 , 86 , 59 ), // #307 - INST(Jnc , X86Jcc , O(000F00,83,_,_,_,_,_,_ ), O(000000,73,_,_,_,_,_,_ ), 4 , 19 , 86 , 60 ), // #308 - INST(Jne , X86Jcc , O(000F00,85,_,_,_,_,_,_ ), O(000000,75,_,_,_,_,_,_ ), 4 , 29 , 86 , 61 ), // #309 - INST(Jng , X86Jcc , O(000F00,8E,_,_,_,_,_,_ ), O(000000,7E,_,_,_,_,_,_ ), 4 , 27 , 86 , 62 ), // #310 - INST(Jnge , X86Jcc , O(000F00,8C,_,_,_,_,_,_ ), O(000000,7C,_,_,_,_,_,_ ), 4 , 26 , 86 , 63 ), // #311 - INST(Jnl , X86Jcc , O(000F00,8D,_,_,_,_,_,_ ), O(000000,7D,_,_,_,_,_,_ ), 4 , 25 , 86 , 63 ), // #312 - INST(Jnle , X86Jcc , O(000F00,8F,_,_,_,_,_,_ ), O(000000,7F,_,_,_,_,_,_ ), 4 , 24 , 86 , 62 ), // #313 - INST(Jno , X86Jcc , O(000F00,81,_,_,_,_,_,_ ), O(000000,71,_,_,_,_,_,_ ), 4 , 30 , 86 , 57 ), // #314 - INST(Jnp , X86Jcc , O(000F00,8B,_,_,_,_,_,_ ), O(000000,7B,_,_,_,_,_,_ ), 4 , 31 , 86 , 64 ), // #315 - INST(Jns , X86Jcc , O(000F00,89,_,_,_,_,_,_ ), O(000000,79,_,_,_,_,_,_ ), 4 , 32 , 86 , 65 ), // #316 - INST(Jnz , X86Jcc , O(000F00,85,_,_,_,_,_,_ ), O(000000,75,_,_,_,_,_,_ ), 4 , 29 , 86 , 61 ), // #317 - INST(Jo , X86Jcc , O(000F00,80,_,_,_,_,_,_ ), O(000000,70,_,_,_,_,_,_ ), 4 , 33 , 86 , 57 ), // #318 - INST(Jp , X86Jcc , O(000F00,8A,_,_,_,_,_,_ ), O(000000,7A,_,_,_,_,_,_ ), 4 , 34 , 86 , 64 ), // #319 - INST(Jpe , X86Jcc , O(000F00,8A,_,_,_,_,_,_ ), O(000000,7A,_,_,_,_,_,_ ), 4 , 34 , 86 , 64 ), // #320 - INST(Jpo , X86Jcc , O(000F00,8B,_,_,_,_,_,_ ), O(000000,7B,_,_,_,_,_,_ ), 4 , 31 , 86 , 64 ), // #321 - INST(Js , X86Jcc , O(000F00,88,_,_,_,_,_,_ ), O(000000,78,_,_,_,_,_,_ ), 4 , 35 , 86 , 65 ), // #322 - INST(Jz , X86Jcc , O(000F00,84,_,_,_,_,_,_ ), O(000000,74,_,_,_,_,_,_ ), 4 , 22 , 86 , 61 ), // #323 - INST(Kaddb , VexRvm , V(660F00,4A,_,1,0,_,_,_ ), 0 , 65 , 0 , 89 , 66 ), // #324 - INST(Kaddd , VexRvm , V(660F00,4A,_,1,1,_,_,_ ), 0 , 66 , 0 , 89 , 67 ), // #325 - INST(Kaddq , VexRvm , V(000F00,4A,_,1,1,_,_,_ ), 0 , 67 , 0 , 89 , 67 ), // #326 - INST(Kaddw , VexRvm , V(000F00,4A,_,1,0,_,_,_ ), 0 , 68 , 0 , 89 , 66 ), // #327 - INST(Kandb , VexRvm , V(660F00,41,_,1,0,_,_,_ ), 0 , 65 , 0 , 89 , 66 ), // #328 - INST(Kandd , VexRvm , V(660F00,41,_,1,1,_,_,_ ), 0 , 66 , 0 , 89 , 67 ), // #329 - INST(Kandnb , VexRvm , V(660F00,42,_,1,0,_,_,_ ), 0 , 65 , 0 , 89 , 66 ), // #330 - INST(Kandnd , VexRvm , V(660F00,42,_,1,1,_,_,_ ), 0 , 66 , 0 , 89 , 67 ), // #331 - INST(Kandnq , VexRvm , V(000F00,42,_,1,1,_,_,_ ), 0 , 67 , 0 , 89 , 67 ), // #332 - INST(Kandnw , VexRvm , V(000F00,42,_,1,0,_,_,_ ), 0 , 68 , 0 , 89 , 68 ), // #333 - INST(Kandq , VexRvm , V(000F00,41,_,1,1,_,_,_ ), 0 , 67 , 0 , 89 , 67 ), // #334 - INST(Kandw , VexRvm , V(000F00,41,_,1,0,_,_,_ ), 0 , 68 , 0 , 89 , 68 ), // #335 - INST(Kmovb , VexKmov , V(660F00,90,_,0,0,_,_,_ ), V(660F00,92,_,0,0,_,_,_ ), 69 , 36 , 90 , 69 ), // #336 - INST(Kmovd , VexKmov , V(660F00,90,_,0,1,_,_,_ ), V(F20F00,92,_,0,0,_,_,_ ), 70 , 37 , 91 , 70 ), // #337 - INST(Kmovq , VexKmov , V(000F00,90,_,0,1,_,_,_ ), V(F20F00,92,_,0,1,_,_,_ ), 71 , 38 , 92 , 70 ), // #338 - INST(Kmovw , VexKmov , V(000F00,90,_,0,0,_,_,_ ), V(000F00,92,_,0,0,_,_,_ ), 72 , 39 , 93 , 71 ), // #339 - INST(Knotb , VexRm , V(660F00,44,_,0,0,_,_,_ ), 0 , 69 , 0 , 94 , 66 ), // #340 - INST(Knotd , VexRm , V(660F00,44,_,0,1,_,_,_ ), 0 , 70 , 0 , 94 , 67 ), // #341 - INST(Knotq , VexRm , V(000F00,44,_,0,1,_,_,_ ), 0 , 71 , 0 , 94 , 67 ), // #342 - INST(Knotw , VexRm , V(000F00,44,_,0,0,_,_,_ ), 0 , 72 , 0 , 94 , 68 ), // #343 - INST(Korb , VexRvm , V(660F00,45,_,1,0,_,_,_ ), 0 , 65 , 0 , 89 , 66 ), // #344 - INST(Kord , VexRvm , V(660F00,45,_,1,1,_,_,_ ), 0 , 66 , 0 , 89 , 67 ), // #345 - INST(Korq , VexRvm , V(000F00,45,_,1,1,_,_,_ ), 0 , 67 , 0 , 89 , 67 ), // #346 - INST(Kortestb , VexRm , V(660F00,98,_,0,0,_,_,_ ), 0 , 69 , 0 , 94 , 72 ), // #347 - INST(Kortestd , VexRm , V(660F00,98,_,0,1,_,_,_ ), 0 , 70 , 0 , 94 , 73 ), // #348 - INST(Kortestq , VexRm , V(000F00,98,_,0,1,_,_,_ ), 0 , 71 , 0 , 94 , 73 ), // #349 - INST(Kortestw , VexRm , V(000F00,98,_,0,0,_,_,_ ), 0 , 72 , 0 , 94 , 74 ), // #350 - INST(Korw , VexRvm , V(000F00,45,_,1,0,_,_,_ ), 0 , 68 , 0 , 89 , 68 ), // #351 - INST(Kshiftlb , VexRmi , V(660F3A,32,_,0,0,_,_,_ ), 0 , 73 , 0 , 95 , 66 ), // #352 - INST(Kshiftld , VexRmi , V(660F3A,33,_,0,0,_,_,_ ), 0 , 73 , 0 , 95 , 67 ), // #353 - INST(Kshiftlq , VexRmi , V(660F3A,33,_,0,1,_,_,_ ), 0 , 74 , 0 , 95 , 67 ), // #354 - INST(Kshiftlw , VexRmi , V(660F3A,32,_,0,1,_,_,_ ), 0 , 74 , 0 , 95 , 68 ), // #355 - INST(Kshiftrb , VexRmi , V(660F3A,30,_,0,0,_,_,_ ), 0 , 73 , 0 , 95 , 66 ), // #356 - INST(Kshiftrd , VexRmi , V(660F3A,31,_,0,0,_,_,_ ), 0 , 73 , 0 , 95 , 67 ), // #357 - INST(Kshiftrq , VexRmi , V(660F3A,31,_,0,1,_,_,_ ), 0 , 74 , 0 , 95 , 67 ), // #358 - INST(Kshiftrw , VexRmi , V(660F3A,30,_,0,1,_,_,_ ), 0 , 74 , 0 , 95 , 68 ), // #359 - INST(Ktestb , VexRm , V(660F00,99,_,0,0,_,_,_ ), 0 , 69 , 0 , 94 , 72 ), // #360 - INST(Ktestd , VexRm , V(660F00,99,_,0,1,_,_,_ ), 0 , 70 , 0 , 94 , 73 ), // #361 - INST(Ktestq , VexRm , V(000F00,99,_,0,1,_,_,_ ), 0 , 71 , 0 , 94 , 73 ), // #362 - INST(Ktestw , VexRm , V(000F00,99,_,0,0,_,_,_ ), 0 , 72 , 0 , 94 , 72 ), // #363 - INST(Kunpckbw , VexRvm , V(660F00,4B,_,1,0,_,_,_ ), 0 , 65 , 0 , 89 , 68 ), // #364 - INST(Kunpckdq , VexRvm , V(000F00,4B,_,1,1,_,_,_ ), 0 , 67 , 0 , 89 , 67 ), // #365 - INST(Kunpckwd , VexRvm , V(000F00,4B,_,1,0,_,_,_ ), 0 , 68 , 0 , 89 , 67 ), // #366 - INST(Kxnorb , VexRvm , V(660F00,46,_,1,0,_,_,_ ), 0 , 65 , 0 , 96 , 66 ), // #367 - INST(Kxnord , VexRvm , V(660F00,46,_,1,1,_,_,_ ), 0 , 66 , 0 , 96 , 67 ), // #368 - INST(Kxnorq , VexRvm , V(000F00,46,_,1,1,_,_,_ ), 0 , 67 , 0 , 96 , 67 ), // #369 - INST(Kxnorw , VexRvm , V(000F00,46,_,1,0,_,_,_ ), 0 , 68 , 0 , 96 , 68 ), // #370 - INST(Kxorb , VexRvm , V(660F00,47,_,1,0,_,_,_ ), 0 , 65 , 0 , 96 , 66 ), // #371 - INST(Kxord , VexRvm , V(660F00,47,_,1,1,_,_,_ ), 0 , 66 , 0 , 96 , 67 ), // #372 - INST(Kxorq , VexRvm , V(000F00,47,_,1,1,_,_,_ ), 0 , 67 , 0 , 96 , 67 ), // #373 - INST(Kxorw , VexRvm , V(000F00,47,_,1,0,_,_,_ ), 0 , 68 , 0 , 96 , 68 ), // #374 - INST(Lahf , X86Op , O(000000,9F,_,_,_,_,_,_ ), 0 , 0 , 0 , 97 , 75 ), // #375 - INST(Lar , X86Rm , O(000F00,02,_,_,_,_,_,_ ), 0 , 4 , 0 , 98 , 10 ), // #376 - INST(Lcall , X86LcallLjmp , O(000000,FF,3,_,_,_,_,_ ), O(000000,9A,_,_,_,_,_,_ ), 75 , 40 , 99 , 1 ), // #377 - INST(Lddqu , ExtRm , O(F20F00,F0,_,_,_,_,_,_ ), 0 , 5 , 0 , 100, 6 ), // #378 - INST(Ldmxcsr , X86M_Only , O(000F00,AE,2,_,_,_,_,_ ), 0 , 76 , 0 , 101, 5 ), // #379 - INST(Lds , X86Rm , O(000000,C5,_,_,_,_,_,_ ), 0 , 0 , 0 , 102, 0 ), // #380 - INST(Ldtilecfg , AmxCfg , V(000F38,49,_,0,0,_,_,_ ), 0 , 10 , 0 , 103, 76 ), // #381 - INST(Lea , X86Lea , O(000000,8D,_,_,x,_,_,_ ), 0 , 0 , 0 , 104, 0 ), // #382 - INST(Leave , X86Op , O(000000,C9,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 0 ), // #383 - INST(Les , X86Rm , O(000000,C4,_,_,_,_,_,_ ), 0 , 0 , 0 , 102, 0 ), // #384 - INST(Lfence , X86Fence , O(000F00,AE,5,_,_,_,_,_ ), 0 , 77 , 0 , 30 , 4 ), // #385 - INST(Lfs , X86Rm , O(000F00,B4,_,_,_,_,_,_ ), 0 , 4 , 0 , 105, 0 ), // #386 - INST(Lgdt , X86M_Only , O(000F00,01,2,_,_,_,_,_ ), 0 , 76 , 0 , 69 , 0 ), // #387 - INST(Lgs , X86Rm , O(000F00,B5,_,_,_,_,_,_ ), 0 , 4 , 0 , 105, 0 ), // #388 - INST(Lidt , X86M_Only , O(000F00,01,3,_,_,_,_,_ ), 0 , 78 , 0 , 69 , 0 ), // #389 - INST(Ljmp , X86LcallLjmp , O(000000,FF,5,_,_,_,_,_ ), O(000000,EA,_,_,_,_,_,_ ), 62 , 41 , 106, 0 ), // #390 - INST(Lldt , X86M_NoSize , O(000F00,00,2,_,_,_,_,_ ), 0 , 76 , 0 , 107, 0 ), // #391 - INST(Llwpcb , VexR_Wx , V(XOP_M9,12,0,0,x,_,_,_ ), 0 , 79 , 0 , 108, 77 ), // #392 - INST(Lmsw , X86M_NoSize , O(000F00,01,6,_,_,_,_,_ ), 0 , 80 , 0 , 107, 0 ), // #393 - INST(Lods , X86StrRm , O(000000,AC,_,_,_,_,_,_ ), 0 , 0 , 0 , 109, 78 ), // #394 - INST(Loop , X86JecxzLoop , 0 , O(000000,E2,_,_,_,_,_,_ ), 0 , 42 , 110, 0 ), // #395 - INST(Loope , X86JecxzLoop , 0 , O(000000,E1,_,_,_,_,_,_ ), 0 , 43 , 110, 61 ), // #396 - INST(Loopne , X86JecxzLoop , 0 , O(000000,E0,_,_,_,_,_,_ ), 0 , 44 , 110, 61 ), // #397 - INST(Lsl , X86Rm , O(000F00,03,_,_,_,_,_,_ ), 0 , 4 , 0 , 111, 10 ), // #398 - INST(Lss , X86Rm , O(000F00,B2,_,_,_,_,_,_ ), 0 , 4 , 0 , 105, 0 ), // #399 - INST(Ltr , X86M_NoSize , O(000F00,00,3,_,_,_,_,_ ), 0 , 78 , 0 , 107, 0 ), // #400 - INST(Lwpins , VexVmi4_Wx , V(XOP_MA,12,0,0,x,_,_,_ ), 0 , 81 , 0 , 112, 77 ), // #401 - INST(Lwpval , VexVmi4_Wx , V(XOP_MA,12,1,0,x,_,_,_ ), 0 , 82 , 0 , 112, 77 ), // #402 - INST(Lzcnt , X86Rm_Raw66H , O(F30F00,BD,_,_,x,_,_,_ ), 0 , 6 , 0 , 22 , 79 ), // #403 - INST(Maskmovdqu , ExtRm_ZDI , O(660F00,F7,_,_,_,_,_,_ ), 0 , 3 , 0 , 113, 4 ), // #404 - INST(Maskmovq , ExtRm_ZDI , O(000F00,F7,_,_,_,_,_,_ ), 0 , 4 , 0 , 114, 80 ), // #405 - INST(Maxpd , ExtRm , O(660F00,5F,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #406 - INST(Maxps , ExtRm , O(000F00,5F,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #407 - INST(Maxsd , ExtRm , O(F20F00,5F,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 4 ), // #408 - INST(Maxss , ExtRm , O(F30F00,5F,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #409 - INST(Mcommit , X86Op , O(F30F01,FA,_,_,_,_,_,_ ), 0 , 25 , 0 , 30 , 81 ), // #410 - INST(Mfence , X86Fence , O(000F00,AE,6,_,_,_,_,_ ), 0 , 80 , 0 , 30 , 4 ), // #411 - INST(Minpd , ExtRm , O(660F00,5D,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #412 - INST(Minps , ExtRm , O(000F00,5D,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #413 - INST(Minsd , ExtRm , O(F20F00,5D,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 4 ), // #414 - INST(Minss , ExtRm , O(F30F00,5D,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #415 - INST(Monitor , X86Op , O(000F01,C8,_,_,_,_,_,_ ), 0 , 21 , 0 , 115, 82 ), // #416 - INST(Monitorx , X86Op , O(000F01,FA,_,_,_,_,_,_ ), 0 , 21 , 0 , 115, 83 ), // #417 - INST(Mov , X86Mov , 0 , 0 , 0 , 0 , 116, 84 ), // #418 - INST(Movabs , X86Movabs , 0 , 0 , 0 , 0 , 117, 0 ), // #419 - INST(Movapd , ExtMov , O(660F00,28,_,_,_,_,_,_ ), O(660F00,29,_,_,_,_,_,_ ), 3 , 45 , 118, 85 ), // #420 - INST(Movaps , ExtMov , O(000F00,28,_,_,_,_,_,_ ), O(000F00,29,_,_,_,_,_,_ ), 4 , 46 , 118, 86 ), // #421 - INST(Movbe , ExtMovbe , O(000F38,F0,_,_,x,_,_,_ ), O(000F38,F1,_,_,x,_,_,_ ), 83 , 47 , 119, 87 ), // #422 - INST(Movd , ExtMovd , O(000F00,6E,_,_,_,_,_,_ ), O(000F00,7E,_,_,_,_,_,_ ), 4 , 48 , 120, 88 ), // #423 - INST(Movddup , ExtMov , O(F20F00,12,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #424 - INST(Movdir64b , X86EnqcmdMovdir64b , O(660F38,F8,_,_,_,_,_,_ ), 0 , 2 , 0 , 121, 89 ), // #425 - INST(Movdiri , X86MovntiMovdiri , O(000F38,F9,_,_,_,_,_,_ ), 0 , 83 , 0 , 122, 90 ), // #426 - INST(Movdq2q , ExtMov , O(F20F00,D6,_,_,_,_,_,_ ), 0 , 5 , 0 , 123, 4 ), // #427 - INST(Movdqa , ExtMov , O(660F00,6F,_,_,_,_,_,_ ), O(660F00,7F,_,_,_,_,_,_ ), 3 , 49 , 118, 85 ), // #428 - INST(Movdqu , ExtMov , O(F30F00,6F,_,_,_,_,_,_ ), O(F30F00,7F,_,_,_,_,_,_ ), 6 , 50 , 118, 85 ), // #429 - INST(Movhlps , ExtMov , O(000F00,12,_,_,_,_,_,_ ), 0 , 4 , 0 , 124, 5 ), // #430 - INST(Movhpd , ExtMov , O(660F00,16,_,_,_,_,_,_ ), O(660F00,17,_,_,_,_,_,_ ), 3 , 51 , 125, 4 ), // #431 - INST(Movhps , ExtMov , O(000F00,16,_,_,_,_,_,_ ), O(000F00,17,_,_,_,_,_,_ ), 4 , 52 , 125, 5 ), // #432 - INST(Movlhps , ExtMov , O(000F00,16,_,_,_,_,_,_ ), 0 , 4 , 0 , 124, 5 ), // #433 - INST(Movlpd , ExtMov , O(660F00,12,_,_,_,_,_,_ ), O(660F00,13,_,_,_,_,_,_ ), 3 , 53 , 125, 4 ), // #434 - INST(Movlps , ExtMov , O(000F00,12,_,_,_,_,_,_ ), O(000F00,13,_,_,_,_,_,_ ), 4 , 54 , 125, 5 ), // #435 - INST(Movmskpd , ExtMov , O(660F00,50,_,_,_,_,_,_ ), 0 , 3 , 0 , 126, 4 ), // #436 - INST(Movmskps , ExtMov , O(000F00,50,_,_,_,_,_,_ ), 0 , 4 , 0 , 126, 5 ), // #437 - INST(Movntdq , ExtMov , 0 , O(660F00,E7,_,_,_,_,_,_ ), 0 , 55 , 127, 4 ), // #438 - INST(Movntdqa , ExtMov , O(660F38,2A,_,_,_,_,_,_ ), 0 , 2 , 0 , 100, 12 ), // #439 - INST(Movnti , X86MovntiMovdiri , O(000F00,C3,_,_,x,_,_,_ ), 0 , 4 , 0 , 122, 4 ), // #440 - INST(Movntpd , ExtMov , 0 , O(660F00,2B,_,_,_,_,_,_ ), 0 , 56 , 127, 4 ), // #441 - INST(Movntps , ExtMov , 0 , O(000F00,2B,_,_,_,_,_,_ ), 0 , 57 , 127, 5 ), // #442 - INST(Movntq , ExtMov , 0 , O(000F00,E7,_,_,_,_,_,_ ), 0 , 58 , 128, 80 ), // #443 - INST(Movntsd , ExtMov , 0 , O(F20F00,2B,_,_,_,_,_,_ ), 0 , 59 , 129, 49 ), // #444 - INST(Movntss , ExtMov , 0 , O(F30F00,2B,_,_,_,_,_,_ ), 0 , 60 , 130, 49 ), // #445 - INST(Movq , ExtMovq , O(000F00,6E,_,_,x,_,_,_ ), O(000F00,7E,_,_,x,_,_,_ ), 4 , 48 , 131, 91 ), // #446 - INST(Movq2dq , ExtRm , O(F30F00,D6,_,_,_,_,_,_ ), 0 , 6 , 0 , 132, 4 ), // #447 - INST(Movs , X86StrMm , O(000000,A4,_,_,_,_,_,_ ), 0 , 0 , 0 , 133, 78 ), // #448 - INST(Movsd , ExtMov , O(F20F00,10,_,_,_,_,_,_ ), O(F20F00,11,_,_,_,_,_,_ ), 5 , 61 , 134, 85 ), // #449 - INST(Movshdup , ExtRm , O(F30F00,16,_,_,_,_,_,_ ), 0 , 6 , 0 , 5 , 6 ), // #450 - INST(Movsldup , ExtRm , O(F30F00,12,_,_,_,_,_,_ ), 0 , 6 , 0 , 5 , 6 ), // #451 - INST(Movss , ExtMov , O(F30F00,10,_,_,_,_,_,_ ), O(F30F00,11,_,_,_,_,_,_ ), 6 , 62 , 135, 86 ), // #452 - INST(Movsx , X86MovsxMovzx , O(000F00,BE,_,_,x,_,_,_ ), 0 , 4 , 0 , 136, 0 ), // #453 - INST(Movsxd , X86Rm , O(000000,63,_,_,x,_,_,_ ), 0 , 0 , 0 , 137, 0 ), // #454 - INST(Movupd , ExtMov , O(660F00,10,_,_,_,_,_,_ ), O(660F00,11,_,_,_,_,_,_ ), 3 , 63 , 118, 85 ), // #455 - INST(Movups , ExtMov , O(000F00,10,_,_,_,_,_,_ ), O(000F00,11,_,_,_,_,_,_ ), 4 , 64 , 118, 86 ), // #456 - INST(Movzx , X86MovsxMovzx , O(000F00,B6,_,_,x,_,_,_ ), 0 , 4 , 0 , 136, 0 ), // #457 - INST(Mpsadbw , ExtRmi , O(660F3A,42,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 12 ), // #458 - INST(Mul , X86M_GPB_MulDiv , O(000000,F6,4,_,x,_,_,_ ), 0 , 9 , 0 , 54 , 1 ), // #459 - INST(Mulpd , ExtRm , O(660F00,59,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #460 - INST(Mulps , ExtRm , O(000F00,59,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #461 - INST(Mulsd , ExtRm , O(F20F00,59,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 4 ), // #462 - INST(Mulss , ExtRm , O(F30F00,59,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #463 - INST(Mulx , VexRvm_ZDX_Wx , V(F20F38,F6,_,0,x,_,_,_ ), 0 , 84 , 0 , 138, 92 ), // #464 - INST(Mwait , X86Op , O(000F01,C9,_,_,_,_,_,_ ), 0 , 21 , 0 , 139, 82 ), // #465 - INST(Mwaitx , X86Op , O(000F01,FB,_,_,_,_,_,_ ), 0 , 21 , 0 , 140, 83 ), // #466 - INST(Neg , X86M_GPB , O(000000,F6,3,_,x,_,_,_ ), 0 , 75 , 0 , 141, 1 ), // #467 - INST(Nop , X86M_Nop , O(000000,90,_,_,_,_,_,_ ), 0 , 0 , 0 , 142, 0 ), // #468 - INST(Not , X86M_GPB , O(000000,F6,2,_,x,_,_,_ ), 0 , 1 , 0 , 141, 0 ), // #469 - INST(Or , X86Arith , O(000000,08,1,_,x,_,_,_ ), 0 , 31 , 0 , 143, 1 ), // #470 - INST(Orpd , ExtRm , O(660F00,56,_,_,_,_,_,_ ), 0 , 3 , 0 , 11 , 4 ), // #471 - INST(Orps , ExtRm , O(000F00,56,_,_,_,_,_,_ ), 0 , 4 , 0 , 11 , 5 ), // #472 - INST(Out , X86Out , O(000000,EE,_,_,_,_,_,_ ), O(000000,E6,_,_,_,_,_,_ ), 0 , 65 , 144, 0 ), // #473 - INST(Outs , X86Outs , O(000000,6E,_,_,_,_,_,_ ), 0 , 0 , 0 , 145, 0 ), // #474 - INST(Pabsb , ExtRm_P , O(000F38,1C,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #475 - INST(Pabsd , ExtRm_P , O(000F38,1E,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #476 - INST(Pabsw , ExtRm_P , O(000F38,1D,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #477 - INST(Packssdw , ExtRm_P , O(000F00,6B,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #478 - INST(Packsswb , ExtRm_P , O(000F00,63,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #479 - INST(Packusdw , ExtRm , O(660F38,2B,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 12 ), // #480 - INST(Packuswb , ExtRm_P , O(000F00,67,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #481 - INST(Paddb , ExtRm_P , O(000F00,FC,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #482 - INST(Paddd , ExtRm_P , O(000F00,FE,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #483 - INST(Paddq , ExtRm_P , O(000F00,D4,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 4 ), // #484 - INST(Paddsb , ExtRm_P , O(000F00,EC,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #485 - INST(Paddsw , ExtRm_P , O(000F00,ED,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #486 - INST(Paddusb , ExtRm_P , O(000F00,DC,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #487 - INST(Paddusw , ExtRm_P , O(000F00,DD,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #488 - INST(Paddw , ExtRm_P , O(000F00,FD,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #489 - INST(Palignr , ExtRmi_P , O(000F3A,0F,_,_,_,_,_,_ ), 0 , 85 , 0 , 147, 6 ), // #490 - INST(Pand , ExtRm_P , O(000F00,DB,_,_,_,_,_,_ ), 0 , 4 , 0 , 148, 88 ), // #491 - INST(Pandn , ExtRm_P , O(000F00,DF,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #492 - INST(Pause , X86Op , O(F30000,90,_,_,_,_,_,_ ), 0 , 86 , 0 , 30 , 0 ), // #493 - INST(Pavgb , ExtRm_P , O(000F00,E0,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 94 ), // #494 - INST(Pavgusb , Ext3dNow , O(000F0F,BF,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #495 - INST(Pavgw , ExtRm_P , O(000F00,E3,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 94 ), // #496 - INST(Pblendvb , ExtRm_XMM0 , O(660F38,10,_,_,_,_,_,_ ), 0 , 2 , 0 , 15 , 12 ), // #497 - INST(Pblendw , ExtRmi , O(660F3A,0E,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 12 ), // #498 - INST(Pclmulqdq , ExtRmi , O(660F3A,44,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 95 ), // #499 - INST(Pcmpeqb , ExtRm_P , O(000F00,74,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #500 - INST(Pcmpeqd , ExtRm_P , O(000F00,76,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #501 - INST(Pcmpeqq , ExtRm , O(660F38,29,_,_,_,_,_,_ ), 0 , 2 , 0 , 151, 12 ), // #502 - INST(Pcmpeqw , ExtRm_P , O(000F00,75,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #503 - INST(Pcmpestri , ExtRmi , O(660F3A,61,_,_,_,_,_,_ ), 0 , 8 , 0 , 152, 96 ), // #504 - INST(Pcmpestrm , ExtRmi , O(660F3A,60,_,_,_,_,_,_ ), 0 , 8 , 0 , 153, 96 ), // #505 - INST(Pcmpgtb , ExtRm_P , O(000F00,64,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #506 - INST(Pcmpgtd , ExtRm_P , O(000F00,66,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #507 - INST(Pcmpgtq , ExtRm , O(660F38,37,_,_,_,_,_,_ ), 0 , 2 , 0 , 151, 44 ), // #508 - INST(Pcmpgtw , ExtRm_P , O(000F00,65,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #509 - INST(Pcmpistri , ExtRmi , O(660F3A,63,_,_,_,_,_,_ ), 0 , 8 , 0 , 154, 96 ), // #510 - INST(Pcmpistrm , ExtRmi , O(660F3A,62,_,_,_,_,_,_ ), 0 , 8 , 0 , 155, 96 ), // #511 - INST(Pconfig , X86Op , O(000F01,C5,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 97 ), // #512 - INST(Pdep , VexRvm_Wx , V(F20F38,F5,_,0,x,_,_,_ ), 0 , 84 , 0 , 10 , 92 ), // #513 - INST(Pext , VexRvm_Wx , V(F30F38,F5,_,0,x,_,_,_ ), 0 , 88 , 0 , 10 , 92 ), // #514 - INST(Pextrb , ExtExtract , O(000F3A,14,_,_,_,_,_,_ ), 0 , 85 , 0 , 156, 12 ), // #515 - INST(Pextrd , ExtExtract , O(000F3A,16,_,_,_,_,_,_ ), 0 , 85 , 0 , 58 , 12 ), // #516 - INST(Pextrq , ExtExtract , O(000F3A,16,_,_,1,_,_,_ ), 0 , 89 , 0 , 157, 12 ), // #517 - INST(Pextrw , ExtPextrw , O(000F00,C5,_,_,_,_,_,_ ), O(000F3A,15,_,_,_,_,_,_ ), 4 , 66 , 158, 98 ), // #518 - INST(Pf2id , Ext3dNow , O(000F0F,1D,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #519 - INST(Pf2iw , Ext3dNow , O(000F0F,1C,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 99 ), // #520 - INST(Pfacc , Ext3dNow , O(000F0F,AE,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #521 - INST(Pfadd , Ext3dNow , O(000F0F,9E,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #522 - INST(Pfcmpeq , Ext3dNow , O(000F0F,B0,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #523 - INST(Pfcmpge , Ext3dNow , O(000F0F,90,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #524 - INST(Pfcmpgt , Ext3dNow , O(000F0F,A0,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #525 - INST(Pfmax , Ext3dNow , O(000F0F,A4,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #526 - INST(Pfmin , Ext3dNow , O(000F0F,94,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #527 - INST(Pfmul , Ext3dNow , O(000F0F,B4,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #528 - INST(Pfnacc , Ext3dNow , O(000F0F,8A,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 99 ), // #529 - INST(Pfpnacc , Ext3dNow , O(000F0F,8E,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 99 ), // #530 - INST(Pfrcp , Ext3dNow , O(000F0F,96,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #531 - INST(Pfrcpit1 , Ext3dNow , O(000F0F,A6,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #532 - INST(Pfrcpit2 , Ext3dNow , O(000F0F,B6,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #533 - INST(Pfrcpv , Ext3dNow , O(000F0F,86,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 100), // #534 - INST(Pfrsqit1 , Ext3dNow , O(000F0F,A7,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #535 - INST(Pfrsqrt , Ext3dNow , O(000F0F,97,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #536 - INST(Pfrsqrtv , Ext3dNow , O(000F0F,87,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 100), // #537 - INST(Pfsub , Ext3dNow , O(000F0F,9A,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #538 - INST(Pfsubr , Ext3dNow , O(000F0F,AA,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #539 - INST(Phaddd , ExtRm_P , O(000F38,02,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #540 - INST(Phaddsw , ExtRm_P , O(000F38,03,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #541 - INST(Phaddw , ExtRm_P , O(000F38,01,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #542 - INST(Phminposuw , ExtRm , O(660F38,41,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 12 ), // #543 - INST(Phsubd , ExtRm_P , O(000F38,06,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #544 - INST(Phsubsw , ExtRm_P , O(000F38,07,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #545 - INST(Phsubw , ExtRm_P , O(000F38,05,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #546 - INST(Pi2fd , Ext3dNow , O(000F0F,0D,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #547 - INST(Pi2fw , Ext3dNow , O(000F0F,0C,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 99 ), // #548 - INST(Pinsrb , ExtRmi , O(660F3A,20,_,_,_,_,_,_ ), 0 , 8 , 0 , 159, 12 ), // #549 - INST(Pinsrd , ExtRmi , O(660F3A,22,_,_,_,_,_,_ ), 0 , 8 , 0 , 160, 12 ), // #550 - INST(Pinsrq , ExtRmi , O(660F3A,22,_,_,1,_,_,_ ), 0 , 90 , 0 , 161, 12 ), // #551 - INST(Pinsrw , ExtRmi_P , O(000F00,C4,_,_,_,_,_,_ ), 0 , 4 , 0 , 162, 94 ), // #552 - INST(Pmaddubsw , ExtRm_P , O(000F38,04,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #553 - INST(Pmaddwd , ExtRm_P , O(000F00,F5,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #554 - INST(Pmaxsb , ExtRm , O(660F38,3C,_,_,_,_,_,_ ), 0 , 2 , 0 , 11 , 12 ), // #555 - INST(Pmaxsd , ExtRm , O(660F38,3D,_,_,_,_,_,_ ), 0 , 2 , 0 , 11 , 12 ), // #556 - INST(Pmaxsw , ExtRm_P , O(000F00,EE,_,_,_,_,_,_ ), 0 , 4 , 0 , 148, 94 ), // #557 - INST(Pmaxub , ExtRm_P , O(000F00,DE,_,_,_,_,_,_ ), 0 , 4 , 0 , 148, 94 ), // #558 - INST(Pmaxud , ExtRm , O(660F38,3F,_,_,_,_,_,_ ), 0 , 2 , 0 , 11 , 12 ), // #559 - INST(Pmaxuw , ExtRm , O(660F38,3E,_,_,_,_,_,_ ), 0 , 2 , 0 , 11 , 12 ), // #560 - INST(Pminsb , ExtRm , O(660F38,38,_,_,_,_,_,_ ), 0 , 2 , 0 , 11 , 12 ), // #561 - INST(Pminsd , ExtRm , O(660F38,39,_,_,_,_,_,_ ), 0 , 2 , 0 , 11 , 12 ), // #562 - INST(Pminsw , ExtRm_P , O(000F00,EA,_,_,_,_,_,_ ), 0 , 4 , 0 , 148, 94 ), // #563 - INST(Pminub , ExtRm_P , O(000F00,DA,_,_,_,_,_,_ ), 0 , 4 , 0 , 148, 94 ), // #564 - INST(Pminud , ExtRm , O(660F38,3B,_,_,_,_,_,_ ), 0 , 2 , 0 , 11 , 12 ), // #565 - INST(Pminuw , ExtRm , O(660F38,3A,_,_,_,_,_,_ ), 0 , 2 , 0 , 11 , 12 ), // #566 - INST(Pmovmskb , ExtRm_P , O(000F00,D7,_,_,_,_,_,_ ), 0 , 4 , 0 , 163, 94 ), // #567 - INST(Pmovsxbd , ExtRm , O(660F38,21,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 12 ), // #568 - INST(Pmovsxbq , ExtRm , O(660F38,22,_,_,_,_,_,_ ), 0 , 2 , 0 , 164, 12 ), // #569 - INST(Pmovsxbw , ExtRm , O(660F38,20,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 12 ), // #570 - INST(Pmovsxdq , ExtRm , O(660F38,25,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 12 ), // #571 - INST(Pmovsxwd , ExtRm , O(660F38,23,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 12 ), // #572 - INST(Pmovsxwq , ExtRm , O(660F38,24,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 12 ), // #573 - INST(Pmovzxbd , ExtRm , O(660F38,31,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 12 ), // #574 - INST(Pmovzxbq , ExtRm , O(660F38,32,_,_,_,_,_,_ ), 0 , 2 , 0 , 164, 12 ), // #575 - INST(Pmovzxbw , ExtRm , O(660F38,30,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 12 ), // #576 - INST(Pmovzxdq , ExtRm , O(660F38,35,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 12 ), // #577 - INST(Pmovzxwd , ExtRm , O(660F38,33,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 12 ), // #578 - INST(Pmovzxwq , ExtRm , O(660F38,34,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 12 ), // #579 - INST(Pmuldq , ExtRm , O(660F38,28,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 12 ), // #580 - INST(Pmulhrsw , ExtRm_P , O(000F38,0B,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #581 - INST(Pmulhrw , Ext3dNow , O(000F0F,B7,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 51 ), // #582 - INST(Pmulhuw , ExtRm_P , O(000F00,E4,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 94 ), // #583 - INST(Pmulhw , ExtRm_P , O(000F00,E5,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #584 - INST(Pmulld , ExtRm , O(660F38,40,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 12 ), // #585 - INST(Pmullw , ExtRm_P , O(000F00,D5,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #586 - INST(Pmuludq , ExtRm_P , O(000F00,F4,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 4 ), // #587 - INST(Pop , X86Pop , O(000000,8F,0,_,_,_,_,_ ), O(000000,58,_,_,_,_,_,_ ), 0 , 67 , 165, 0 ), // #588 - INST(Popa , X86Op , O(660000,61,_,_,_,_,_,_ ), 0 , 19 , 0 , 81 , 0 ), // #589 - INST(Popad , X86Op , O(000000,61,_,_,_,_,_,_ ), 0 , 0 , 0 , 81 , 0 ), // #590 - INST(Popcnt , X86Rm_Raw66H , O(F30F00,B8,_,_,x,_,_,_ ), 0 , 6 , 0 , 22 , 101), // #591 - INST(Popf , X86Op , O(660000,9D,_,_,_,_,_,_ ), 0 , 19 , 0 , 30 , 102), // #592 - INST(Popfd , X86Op , O(000000,9D,_,_,_,_,_,_ ), 0 , 0 , 0 , 81 , 102), // #593 - INST(Popfq , X86Op , O(000000,9D,_,_,_,_,_,_ ), 0 , 0 , 0 , 33 , 102), // #594 - INST(Por , ExtRm_P , O(000F00,EB,_,_,_,_,_,_ ), 0 , 4 , 0 , 148, 88 ), // #595 - INST(Prefetch , X86M_Only , O(000F00,0D,0,_,_,_,_,_ ), 0 , 4 , 0 , 31 , 51 ), // #596 - INST(Prefetchnta , X86M_Only , O(000F00,18,0,_,_,_,_,_ ), 0 , 4 , 0 , 31 , 80 ), // #597 - INST(Prefetcht0 , X86M_Only , O(000F00,18,1,_,_,_,_,_ ), 0 , 29 , 0 , 31 , 80 ), // #598 - INST(Prefetcht1 , X86M_Only , O(000F00,18,2,_,_,_,_,_ ), 0 , 76 , 0 , 31 , 80 ), // #599 - INST(Prefetcht2 , X86M_Only , O(000F00,18,3,_,_,_,_,_ ), 0 , 78 , 0 , 31 , 80 ), // #600 - INST(Prefetchw , X86M_Only , O(000F00,0D,1,_,_,_,_,_ ), 0 , 29 , 0 , 31 , 103), // #601 - INST(Prefetchwt1 , X86M_Only , O(000F00,0D,2,_,_,_,_,_ ), 0 , 76 , 0 , 31 , 104), // #602 - INST(Psadbw , ExtRm_P , O(000F00,F6,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 94 ), // #603 - INST(Pshufb , ExtRm_P , O(000F38,00,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #604 - INST(Pshufd , ExtRmi , O(660F00,70,_,_,_,_,_,_ ), 0 , 3 , 0 , 8 , 4 ), // #605 - INST(Pshufhw , ExtRmi , O(F30F00,70,_,_,_,_,_,_ ), 0 , 6 , 0 , 8 , 4 ), // #606 - INST(Pshuflw , ExtRmi , O(F20F00,70,_,_,_,_,_,_ ), 0 , 5 , 0 , 8 , 4 ), // #607 - INST(Pshufw , ExtRmi_P , O(000F00,70,_,_,_,_,_,_ ), 0 , 4 , 0 , 166, 80 ), // #608 - INST(Psignb , ExtRm_P , O(000F38,08,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #609 - INST(Psignd , ExtRm_P , O(000F38,0A,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #610 - INST(Psignw , ExtRm_P , O(000F38,09,_,_,_,_,_,_ ), 0 , 83 , 0 , 146, 93 ), // #611 - INST(Pslld , ExtRmRi_P , O(000F00,F2,_,_,_,_,_,_ ), O(000F00,72,6,_,_,_,_,_ ), 4 , 68 , 167, 88 ), // #612 - INST(Pslldq , ExtRmRi , 0 , O(660F00,73,7,_,_,_,_,_ ), 0 , 69 , 168, 4 ), // #613 - INST(Psllq , ExtRmRi_P , O(000F00,F3,_,_,_,_,_,_ ), O(000F00,73,6,_,_,_,_,_ ), 4 , 70 , 167, 88 ), // #614 - INST(Psllw , ExtRmRi_P , O(000F00,F1,_,_,_,_,_,_ ), O(000F00,71,6,_,_,_,_,_ ), 4 , 71 , 167, 88 ), // #615 - INST(Psmash , X86Op , O(F30F01,FF,_,_,_,_,_,_ ), 0 , 25 , 0 , 33 , 105), // #616 - INST(Psrad , ExtRmRi_P , O(000F00,E2,_,_,_,_,_,_ ), O(000F00,72,4,_,_,_,_,_ ), 4 , 72 , 167, 88 ), // #617 - INST(Psraw , ExtRmRi_P , O(000F00,E1,_,_,_,_,_,_ ), O(000F00,71,4,_,_,_,_,_ ), 4 , 73 , 167, 88 ), // #618 - INST(Psrld , ExtRmRi_P , O(000F00,D2,_,_,_,_,_,_ ), O(000F00,72,2,_,_,_,_,_ ), 4 , 74 , 167, 88 ), // #619 - INST(Psrldq , ExtRmRi , 0 , O(660F00,73,3,_,_,_,_,_ ), 0 , 75 , 168, 4 ), // #620 - INST(Psrlq , ExtRmRi_P , O(000F00,D3,_,_,_,_,_,_ ), O(000F00,73,2,_,_,_,_,_ ), 4 , 76 , 167, 88 ), // #621 - INST(Psrlw , ExtRmRi_P , O(000F00,D1,_,_,_,_,_,_ ), O(000F00,71,2,_,_,_,_,_ ), 4 , 77 , 167, 88 ), // #622 - INST(Psubb , ExtRm_P , O(000F00,F8,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #623 - INST(Psubd , ExtRm_P , O(000F00,FA,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #624 - INST(Psubq , ExtRm_P , O(000F00,FB,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 4 ), // #625 - INST(Psubsb , ExtRm_P , O(000F00,E8,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #626 - INST(Psubsw , ExtRm_P , O(000F00,E9,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #627 - INST(Psubusb , ExtRm_P , O(000F00,D8,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #628 - INST(Psubusw , ExtRm_P , O(000F00,D9,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #629 - INST(Psubw , ExtRm_P , O(000F00,F9,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #630 - INST(Pswapd , Ext3dNow , O(000F0F,BB,_,_,_,_,_,_ ), 0 , 87 , 0 , 150, 99 ), // #631 - INST(Ptest , ExtRm , O(660F38,17,_,_,_,_,_,_ ), 0 , 2 , 0 , 5 , 106), // #632 - INST(Ptwrite , X86M , O(F30F00,AE,4,_,_,_,_,_ ), 0 , 91 , 0 , 169, 107), // #633 - INST(Punpckhbw , ExtRm_P , O(000F00,68,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #634 - INST(Punpckhdq , ExtRm_P , O(000F00,6A,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #635 - INST(Punpckhqdq , ExtRm , O(660F00,6D,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #636 - INST(Punpckhwd , ExtRm_P , O(000F00,69,_,_,_,_,_,_ ), 0 , 4 , 0 , 146, 88 ), // #637 - INST(Punpcklbw , ExtRm_P , O(000F00,60,_,_,_,_,_,_ ), 0 , 4 , 0 , 170, 88 ), // #638 - INST(Punpckldq , ExtRm_P , O(000F00,62,_,_,_,_,_,_ ), 0 , 4 , 0 , 170, 88 ), // #639 - INST(Punpcklqdq , ExtRm , O(660F00,6C,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #640 - INST(Punpcklwd , ExtRm_P , O(000F00,61,_,_,_,_,_,_ ), 0 , 4 , 0 , 170, 88 ), // #641 - INST(Push , X86Push , O(000000,FF,6,_,_,_,_,_ ), O(000000,50,_,_,_,_,_,_ ), 32 , 78 , 171, 0 ), // #642 - INST(Pusha , X86Op , O(660000,60,_,_,_,_,_,_ ), 0 , 19 , 0 , 81 , 0 ), // #643 - INST(Pushad , X86Op , O(000000,60,_,_,_,_,_,_ ), 0 , 0 , 0 , 81 , 0 ), // #644 - INST(Pushf , X86Op , O(660000,9C,_,_,_,_,_,_ ), 0 , 19 , 0 , 30 , 108), // #645 - INST(Pushfd , X86Op , O(000000,9C,_,_,_,_,_,_ ), 0 , 0 , 0 , 81 , 108), // #646 - INST(Pushfq , X86Op , O(000000,9C,_,_,_,_,_,_ ), 0 , 0 , 0 , 33 , 108), // #647 - INST(Pvalidate , X86Op , O(F20F01,FF,_,_,_,_,_,_ ), 0 , 92 , 0 , 30 , 109), // #648 - INST(Pxor , ExtRm_P , O(000F00,EF,_,_,_,_,_,_ ), 0 , 4 , 0 , 149, 88 ), // #649 - INST(Rcl , X86Rot , O(000000,D0,2,_,x,_,_,_ ), 0 , 1 , 0 , 172, 110), // #650 - INST(Rcpps , ExtRm , O(000F00,53,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #651 - INST(Rcpss , ExtRm , O(F30F00,53,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #652 - INST(Rcr , X86Rot , O(000000,D0,3,_,x,_,_,_ ), 0 , 75 , 0 , 172, 110), // #653 - INST(Rdfsbase , X86M , O(F30F00,AE,0,_,x,_,_,_ ), 0 , 6 , 0 , 173, 111), // #654 - INST(Rdgsbase , X86M , O(F30F00,AE,1,_,x,_,_,_ ), 0 , 93 , 0 , 173, 111), // #655 - INST(Rdmsr , X86Op , O(000F00,32,_,_,_,_,_,_ ), 0 , 4 , 0 , 174, 112), // #656 - INST(Rdpid , X86R_Native , O(F30F00,C7,7,_,_,_,_,_ ), 0 , 94 , 0 , 175, 113), // #657 - INST(Rdpkru , X86Op , O(000F01,EE,_,_,_,_,_,_ ), 0 , 21 , 0 , 174, 114), // #658 - INST(Rdpmc , X86Op , O(000F00,33,_,_,_,_,_,_ ), 0 , 4 , 0 , 174, 0 ), // #659 - INST(Rdpru , X86Op , O(000F01,FD,_,_,_,_,_,_ ), 0 , 21 , 0 , 174, 115), // #660 - INST(Rdrand , X86M , O(000F00,C7,6,_,x,_,_,_ ), 0 , 80 , 0 , 23 , 116), // #661 - INST(Rdseed , X86M , O(000F00,C7,7,_,x,_,_,_ ), 0 , 22 , 0 , 23 , 117), // #662 - INST(Rdsspd , X86M , O(F30F00,1E,1,_,_,_,_,_ ), 0 , 93 , 0 , 76 , 56 ), // #663 - INST(Rdsspq , X86M , O(F30F00,1E,1,_,_,_,_,_ ), 0 , 93 , 0 , 77 , 56 ), // #664 - INST(Rdtsc , X86Op , O(000F00,31,_,_,_,_,_,_ ), 0 , 4 , 0 , 28 , 118), // #665 - INST(Rdtscp , X86Op , O(000F01,F9,_,_,_,_,_,_ ), 0 , 21 , 0 , 174, 119), // #666 - INST(Ret , X86Ret , O(000000,C2,_,_,_,_,_,_ ), 0 , 0 , 0 , 176, 0 ), // #667 - INST(Retf , X86Ret , O(000000,CA,_,_,x,_,_,_ ), 0 , 0 , 0 , 177, 0 ), // #668 - INST(Rmpadjust , X86Op , O(F30F01,FE,_,_,_,_,_,_ ), 0 , 25 , 0 , 33 , 105), // #669 - INST(Rmpupdate , X86Op , O(F20F01,FE,_,_,_,_,_,_ ), 0 , 92 , 0 , 33 , 105), // #670 - INST(Rol , X86Rot , O(000000,D0,0,_,x,_,_,_ ), 0 , 0 , 0 , 172, 120), // #671 - INST(Ror , X86Rot , O(000000,D0,1,_,x,_,_,_ ), 0 , 31 , 0 , 172, 120), // #672 - INST(Rorx , VexRmi_Wx , V(F20F3A,F0,_,0,x,_,_,_ ), 0 , 95 , 0 , 178, 92 ), // #673 - INST(Roundpd , ExtRmi , O(660F3A,09,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 12 ), // #674 - INST(Roundps , ExtRmi , O(660F3A,08,_,_,_,_,_,_ ), 0 , 8 , 0 , 8 , 12 ), // #675 - INST(Roundsd , ExtRmi , O(660F3A,0B,_,_,_,_,_,_ ), 0 , 8 , 0 , 37 , 12 ), // #676 - INST(Roundss , ExtRmi , O(660F3A,0A,_,_,_,_,_,_ ), 0 , 8 , 0 , 38 , 12 ), // #677 - INST(Rsm , X86Op , O(000F00,AA,_,_,_,_,_,_ ), 0 , 4 , 0 , 81 , 1 ), // #678 - INST(Rsqrtps , ExtRm , O(000F00,52,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #679 - INST(Rsqrtss , ExtRm , O(F30F00,52,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #680 - INST(Rstorssp , X86M_Only , O(F30F00,01,5,_,_,_,_,_ ), 0 , 63 , 0 , 32 , 24 ), // #681 - INST(Sahf , X86Op , O(000000,9E,_,_,_,_,_,_ ), 0 , 0 , 0 , 97 , 121), // #682 - INST(Sal , X86Rot , O(000000,D0,4,_,x,_,_,_ ), 0 , 9 , 0 , 172, 1 ), // #683 - INST(Sar , X86Rot , O(000000,D0,7,_,x,_,_,_ ), 0 , 27 , 0 , 172, 1 ), // #684 - INST(Sarx , VexRmv_Wx , V(F30F38,F7,_,0,x,_,_,_ ), 0 , 88 , 0 , 13 , 92 ), // #685 - INST(Saveprevssp , X86Op , O(F30F01,EA,_,_,_,_,_,_ ), 0 , 25 , 0 , 30 , 24 ), // #686 - INST(Sbb , X86Arith , O(000000,18,3,_,x,_,_,_ ), 0 , 75 , 0 , 179, 2 ), // #687 - INST(Scas , X86StrRm , O(000000,AE,_,_,_,_,_,_ ), 0 , 0 , 0 , 180, 37 ), // #688 - INST(Senduipi , X86M_NoSize , O(F30F00,C7,6,_,_,_,_,_ ), 0 , 24 , 0 , 77 , 25 ), // #689 - INST(Serialize , X86Op , O(000F01,E8,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 122), // #690 - INST(Seta , X86Set , O(000F00,97,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 59 ), // #691 - INST(Setae , X86Set , O(000F00,93,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 60 ), // #692 - INST(Setb , X86Set , O(000F00,92,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 60 ), // #693 - INST(Setbe , X86Set , O(000F00,96,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 59 ), // #694 - INST(Setc , X86Set , O(000F00,92,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 60 ), // #695 - INST(Sete , X86Set , O(000F00,94,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 61 ), // #696 - INST(Setg , X86Set , O(000F00,9F,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 62 ), // #697 - INST(Setge , X86Set , O(000F00,9D,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 63 ), // #698 - INST(Setl , X86Set , O(000F00,9C,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 63 ), // #699 - INST(Setle , X86Set , O(000F00,9E,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 62 ), // #700 - INST(Setna , X86Set , O(000F00,96,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 59 ), // #701 - INST(Setnae , X86Set , O(000F00,92,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 60 ), // #702 - INST(Setnb , X86Set , O(000F00,93,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 60 ), // #703 - INST(Setnbe , X86Set , O(000F00,97,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 59 ), // #704 - INST(Setnc , X86Set , O(000F00,93,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 60 ), // #705 - INST(Setne , X86Set , O(000F00,95,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 61 ), // #706 - INST(Setng , X86Set , O(000F00,9E,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 62 ), // #707 - INST(Setnge , X86Set , O(000F00,9C,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 63 ), // #708 - INST(Setnl , X86Set , O(000F00,9D,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 63 ), // #709 - INST(Setnle , X86Set , O(000F00,9F,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 62 ), // #710 - INST(Setno , X86Set , O(000F00,91,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 57 ), // #711 - INST(Setnp , X86Set , O(000F00,9B,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 64 ), // #712 - INST(Setns , X86Set , O(000F00,99,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 65 ), // #713 - INST(Setnz , X86Set , O(000F00,95,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 61 ), // #714 - INST(Seto , X86Set , O(000F00,90,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 57 ), // #715 - INST(Setp , X86Set , O(000F00,9A,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 64 ), // #716 - INST(Setpe , X86Set , O(000F00,9A,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 64 ), // #717 - INST(Setpo , X86Set , O(000F00,9B,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 64 ), // #718 - INST(Sets , X86Set , O(000F00,98,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 65 ), // #719 - INST(Setssbsy , X86Op , O(F30F01,E8,_,_,_,_,_,_ ), 0 , 25 , 0 , 30 , 56 ), // #720 - INST(Setz , X86Set , O(000F00,94,_,_,_,_,_,_ ), 0 , 4 , 0 , 181, 61 ), // #721 - INST(Sfence , X86Fence , O(000F00,AE,7,_,_,_,_,_ ), 0 , 22 , 0 , 30 , 80 ), // #722 - INST(Sgdt , X86M_Only , O(000F00,01,0,_,_,_,_,_ ), 0 , 4 , 0 , 69 , 0 ), // #723 - INST(Sha1msg1 , ExtRm , O(000F38,C9,_,_,_,_,_,_ ), 0 , 83 , 0 , 5 , 123), // #724 - INST(Sha1msg2 , ExtRm , O(000F38,CA,_,_,_,_,_,_ ), 0 , 83 , 0 , 5 , 123), // #725 - INST(Sha1nexte , ExtRm , O(000F38,C8,_,_,_,_,_,_ ), 0 , 83 , 0 , 5 , 123), // #726 - INST(Sha1rnds4 , ExtRmi , O(000F3A,CC,_,_,_,_,_,_ ), 0 , 85 , 0 , 8 , 123), // #727 - INST(Sha256msg1 , ExtRm , O(000F38,CC,_,_,_,_,_,_ ), 0 , 83 , 0 , 5 , 123), // #728 - INST(Sha256msg2 , ExtRm , O(000F38,CD,_,_,_,_,_,_ ), 0 , 83 , 0 , 5 , 123), // #729 - INST(Sha256rnds2 , ExtRm_XMM0 , O(000F38,CB,_,_,_,_,_,_ ), 0 , 83 , 0 , 15 , 123), // #730 - INST(Shl , X86Rot , O(000000,D0,4,_,x,_,_,_ ), 0 , 9 , 0 , 172, 1 ), // #731 - INST(Shld , X86ShldShrd , O(000F00,A4,_,_,x,_,_,_ ), 0 , 4 , 0 , 182, 1 ), // #732 - INST(Shlx , VexRmv_Wx , V(660F38,F7,_,0,x,_,_,_ ), 0 , 96 , 0 , 13 , 92 ), // #733 - INST(Shr , X86Rot , O(000000,D0,5,_,x,_,_,_ ), 0 , 62 , 0 , 172, 1 ), // #734 - INST(Shrd , X86ShldShrd , O(000F00,AC,_,_,x,_,_,_ ), 0 , 4 , 0 , 182, 1 ), // #735 - INST(Shrx , VexRmv_Wx , V(F20F38,F7,_,0,x,_,_,_ ), 0 , 84 , 0 , 13 , 92 ), // #736 - INST(Shufpd , ExtRmi , O(660F00,C6,_,_,_,_,_,_ ), 0 , 3 , 0 , 8 , 4 ), // #737 - INST(Shufps , ExtRmi , O(000F00,C6,_,_,_,_,_,_ ), 0 , 4 , 0 , 8 , 5 ), // #738 - INST(Sidt , X86M_Only , O(000F00,01,1,_,_,_,_,_ ), 0 , 29 , 0 , 69 , 0 ), // #739 - INST(Skinit , X86Op_xAX , O(000F01,DE,_,_,_,_,_,_ ), 0 , 21 , 0 , 52 , 124), // #740 - INST(Sldt , X86M_NoMemSize , O(000F00,00,0,_,_,_,_,_ ), 0 , 4 , 0 , 183, 0 ), // #741 - INST(Slwpcb , VexR_Wx , V(XOP_M9,12,1,0,x,_,_,_ ), 0 , 11 , 0 , 108, 77 ), // #742 - INST(Smsw , X86M_NoMemSize , O(000F00,01,4,_,_,_,_,_ ), 0 , 97 , 0 , 183, 0 ), // #743 - INST(Sqrtpd , ExtRm , O(660F00,51,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #744 - INST(Sqrtps , ExtRm , O(000F00,51,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #745 - INST(Sqrtsd , ExtRm , O(F20F00,51,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 4 ), // #746 - INST(Sqrtss , ExtRm , O(F30F00,51,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #747 - INST(Stac , X86Op , O(000F01,CB,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 16 ), // #748 - INST(Stc , X86Op , O(000000,F9,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 17 ), // #749 - INST(Std , X86Op , O(000000,FD,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 18 ), // #750 - INST(Stgi , X86Op , O(000F01,DC,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 124), // #751 - INST(Sti , X86Op , O(000000,FB,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 23 ), // #752 - INST(Stmxcsr , X86M_Only , O(000F00,AE,3,_,_,_,_,_ ), 0 , 78 , 0 , 101, 5 ), // #753 - INST(Stos , X86StrMr , O(000000,AA,_,_,_,_,_,_ ), 0 , 0 , 0 , 184, 78 ), // #754 - INST(Str , X86M_NoMemSize , O(000F00,00,1,_,_,_,_,_ ), 0 , 29 , 0 , 183, 0 ), // #755 - INST(Sttilecfg , AmxCfg , V(660F38,49,_,0,0,_,_,_ ), 0 , 96 , 0 , 103, 76 ), // #756 - INST(Stui , X86Op , O(F30F01,EF,_,_,_,_,_,_ ), 0 , 25 , 0 , 33 , 25 ), // #757 - INST(Sub , X86Arith , O(000000,28,5,_,x,_,_,_ ), 0 , 62 , 0 , 179, 1 ), // #758 - INST(Subpd , ExtRm , O(660F00,5C,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #759 - INST(Subps , ExtRm , O(000F00,5C,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #760 - INST(Subsd , ExtRm , O(F20F00,5C,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 4 ), // #761 - INST(Subss , ExtRm , O(F30F00,5C,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #762 - INST(Swapgs , X86Op , O(000F01,F8,_,_,_,_,_,_ ), 0 , 21 , 0 , 33 , 0 ), // #763 - INST(Syscall , X86Op , O(000F00,05,_,_,_,_,_,_ ), 0 , 4 , 0 , 33 , 0 ), // #764 - INST(Sysenter , X86Op , O(000F00,34,_,_,_,_,_,_ ), 0 , 4 , 0 , 30 , 0 ), // #765 - INST(Sysexit , X86Op , O(000F00,35,_,_,_,_,_,_ ), 0 , 4 , 0 , 30 , 0 ), // #766 - INST(Sysexitq , X86Op , O(000F00,35,_,_,1,_,_,_ ), 0 , 60 , 0 , 30 , 0 ), // #767 - INST(Sysret , X86Op , O(000F00,07,_,_,_,_,_,_ ), 0 , 4 , 0 , 33 , 0 ), // #768 - INST(Sysretq , X86Op , O(000F00,07,_,_,1,_,_,_ ), 0 , 60 , 0 , 33 , 0 ), // #769 - INST(T1mskc , VexVm_Wx , V(XOP_M9,01,7,0,x,_,_,_ ), 0 , 98 , 0 , 14 , 11 ), // #770 - INST(Tdpbf16ps , AmxRmv , V(F30F38,5C,_,0,0,_,_,_ ), 0 , 88 , 0 , 185, 125), // #771 - INST(Tdpbssd , AmxRmv , V(F20F38,5E,_,0,0,_,_,_ ), 0 , 84 , 0 , 185, 126), // #772 - INST(Tdpbsud , AmxRmv , V(F30F38,5E,_,0,0,_,_,_ ), 0 , 88 , 0 , 185, 126), // #773 - INST(Tdpbusd , AmxRmv , V(660F38,5E,_,0,0,_,_,_ ), 0 , 96 , 0 , 185, 126), // #774 - INST(Tdpbuud , AmxRmv , V(000F38,5E,_,0,0,_,_,_ ), 0 , 10 , 0 , 185, 126), // #775 - INST(Test , X86Test , O(000000,84,_,_,x,_,_,_ ), O(000000,F6,_,_,x,_,_,_ ), 0 , 79 , 186, 1 ), // #776 - INST(Testui , X86Op , O(F30F01,ED,_,_,_,_,_,_ ), 0 , 25 , 0 , 33 , 127), // #777 - INST(Tileloadd , AmxRm , V(F20F38,4B,_,0,0,_,_,_ ), 0 , 84 , 0 , 187, 76 ), // #778 - INST(Tileloaddt1 , AmxRm , V(660F38,4B,_,0,0,_,_,_ ), 0 , 96 , 0 , 187, 76 ), // #779 - INST(Tilerelease , VexOpMod , V(000F38,49,0,0,0,_,_,_ ), 0 , 10 , 0 , 188, 76 ), // #780 - INST(Tilestored , AmxMr , V(F30F38,4B,_,0,0,_,_,_ ), 0 , 88 , 0 , 189, 76 ), // #781 - INST(Tilezero , AmxR , V(F20F38,49,_,0,0,_,_,_ ), 0 , 84 , 0 , 190, 76 ), // #782 - INST(Tpause , X86R32_EDX_EAX , O(660F00,AE,6,_,_,_,_,_ ), 0 , 26 , 0 , 191, 128), // #783 - INST(Tzcnt , X86Rm_Raw66H , O(F30F00,BC,_,_,x,_,_,_ ), 0 , 6 , 0 , 22 , 9 ), // #784 - INST(Tzmsk , VexVm_Wx , V(XOP_M9,01,4,0,x,_,_,_ ), 0 , 99 , 0 , 14 , 11 ), // #785 - INST(Ucomisd , ExtRm , O(660F00,2E,_,_,_,_,_,_ ), 0 , 3 , 0 , 6 , 41 ), // #786 - INST(Ucomiss , ExtRm , O(000F00,2E,_,_,_,_,_,_ ), 0 , 4 , 0 , 7 , 42 ), // #787 - INST(Ud0 , X86Rm , O(000F00,FF,_,_,_,_,_,_ ), 0 , 4 , 0 , 192, 0 ), // #788 - INST(Ud1 , X86Rm , O(000F00,B9,_,_,_,_,_,_ ), 0 , 4 , 0 , 192, 0 ), // #789 - INST(Ud2 , X86Op , O(000F00,0B,_,_,_,_,_,_ ), 0 , 4 , 0 , 30 , 0 ), // #790 - INST(Uiret , X86Op , O(F30F01,EC,_,_,_,_,_,_ ), 0 , 25 , 0 , 33 , 25 ), // #791 - INST(Umonitor , X86R_FromM , O(F30F00,AE,6,_,_,_,_,_ ), 0 , 24 , 0 , 193, 129), // #792 - INST(Umwait , X86R32_EDX_EAX , O(F20F00,AE,6,_,_,_,_,_ ), 0 , 100, 0 , 191, 128), // #793 - INST(Unpckhpd , ExtRm , O(660F00,15,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #794 - INST(Unpckhps , ExtRm , O(000F00,15,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #795 - INST(Unpcklpd , ExtRm , O(660F00,14,_,_,_,_,_,_ ), 0 , 3 , 0 , 5 , 4 ), // #796 - INST(Unpcklps , ExtRm , O(000F00,14,_,_,_,_,_,_ ), 0 , 4 , 0 , 5 , 5 ), // #797 - INST(V4fmaddps , VexRm_T1_4X , E(F20F38,9A,_,2,_,0,4,T4X), 0 , 101, 0 , 194, 130), // #798 - INST(V4fmaddss , VexRm_T1_4X , E(F20F38,9B,_,0,_,0,4,T4X), 0 , 102, 0 , 195, 130), // #799 - INST(V4fnmaddps , VexRm_T1_4X , E(F20F38,AA,_,2,_,0,4,T4X), 0 , 101, 0 , 194, 130), // #800 - INST(V4fnmaddss , VexRm_T1_4X , E(F20F38,AB,_,0,_,0,4,T4X), 0 , 102, 0 , 195, 130), // #801 - INST(Vaddpd , VexRvm_Lx , V(660F00,58,_,x,I,1,4,FV ), 0 , 103, 0 , 196, 131), // #802 - INST(Vaddph , VexRvm_Lx , E(00MAP5,58,_,_,_,0,4,FV ), 0 , 104, 0 , 197, 132), // #803 - INST(Vaddps , VexRvm_Lx , V(000F00,58,_,x,I,0,4,FV ), 0 , 105, 0 , 198, 131), // #804 - INST(Vaddsd , VexRvm , V(F20F00,58,_,I,I,1,3,T1S), 0 , 106, 0 , 199, 133), // #805 - INST(Vaddsh , VexRvm , E(F3MAP5,58,_,_,_,0,1,T1S), 0 , 107, 0 , 200, 134), // #806 - INST(Vaddss , VexRvm , V(F30F00,58,_,I,I,0,2,T1S), 0 , 108, 0 , 201, 133), // #807 - INST(Vaddsubpd , VexRvm_Lx , V(660F00,D0,_,x,I,_,_,_ ), 0 , 69 , 0 , 202, 135), // #808 - INST(Vaddsubps , VexRvm_Lx , V(F20F00,D0,_,x,I,_,_,_ ), 0 , 109, 0 , 202, 135), // #809 - INST(Vaesdec , VexRvm_Lx , V(660F38,DE,_,x,I,_,4,FVM), 0 , 110, 0 , 203, 136), // #810 - INST(Vaesdeclast , VexRvm_Lx , V(660F38,DF,_,x,I,_,4,FVM), 0 , 110, 0 , 203, 136), // #811 - INST(Vaesenc , VexRvm_Lx , V(660F38,DC,_,x,I,_,4,FVM), 0 , 110, 0 , 203, 136), // #812 - INST(Vaesenclast , VexRvm_Lx , V(660F38,DD,_,x,I,_,4,FVM), 0 , 110, 0 , 203, 136), // #813 - INST(Vaesimc , VexRm , V(660F38,DB,_,0,I,_,_,_ ), 0 , 96 , 0 , 204, 137), // #814 - INST(Vaeskeygenassist , VexRmi , V(660F3A,DF,_,0,I,_,_,_ ), 0 , 73 , 0 , 205, 137), // #815 - INST(Valignd , VexRvmi_Lx , E(660F3A,03,_,x,_,0,4,FV ), 0 , 111, 0 , 206, 138), // #816 - INST(Valignq , VexRvmi_Lx , E(660F3A,03,_,x,_,1,4,FV ), 0 , 112, 0 , 207, 138), // #817 - INST(Vandnpd , VexRvm_Lx , V(660F00,55,_,x,I,1,4,FV ), 0 , 103, 0 , 208, 139), // #818 - INST(Vandnps , VexRvm_Lx , V(000F00,55,_,x,I,0,4,FV ), 0 , 105, 0 , 209, 139), // #819 - INST(Vandpd , VexRvm_Lx , V(660F00,54,_,x,I,1,4,FV ), 0 , 103, 0 , 210, 139), // #820 - INST(Vandps , VexRvm_Lx , V(000F00,54,_,x,I,0,4,FV ), 0 , 105, 0 , 211, 139), // #821 - INST(Vblendmpd , VexRvm_Lx , E(660F38,65,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #822 - INST(Vblendmps , VexRvm_Lx , E(660F38,65,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 138), // #823 - INST(Vblendpd , VexRvmi_Lx , V(660F3A,0D,_,x,I,_,_,_ ), 0 , 73 , 0 , 214, 135), // #824 - INST(Vblendps , VexRvmi_Lx , V(660F3A,0C,_,x,I,_,_,_ ), 0 , 73 , 0 , 214, 135), // #825 - INST(Vblendvpd , VexRvmr_Lx , V(660F3A,4B,_,x,0,_,_,_ ), 0 , 73 , 0 , 215, 135), // #826 - INST(Vblendvps , VexRvmr_Lx , V(660F3A,4A,_,x,0,_,_,_ ), 0 , 73 , 0 , 215, 135), // #827 - INST(Vbroadcastf128 , VexRm , V(660F38,1A,_,1,0,_,_,_ ), 0 , 115, 0 , 216, 135), // #828 - INST(Vbroadcastf32x2 , VexRm_Lx , E(660F38,19,_,x,_,0,3,T2 ), 0 , 116, 0 , 217, 140), // #829 - INST(Vbroadcastf32x4 , VexRm_Lx , E(660F38,1A,_,x,_,0,4,T4 ), 0 , 117, 0 , 218, 68 ), // #830 - INST(Vbroadcastf32x8 , VexRm , E(660F38,1B,_,2,_,0,5,T8 ), 0 , 118, 0 , 219, 66 ), // #831 - INST(Vbroadcastf64x2 , VexRm_Lx , E(660F38,1A,_,x,_,1,4,T2 ), 0 , 119, 0 , 218, 140), // #832 - INST(Vbroadcastf64x4 , VexRm , E(660F38,1B,_,2,_,1,5,T4 ), 0 , 120, 0 , 219, 68 ), // #833 - INST(Vbroadcasti128 , VexRm , V(660F38,5A,_,1,0,_,_,_ ), 0 , 115, 0 , 216, 141), // #834 - INST(Vbroadcasti32x2 , VexRm_Lx , E(660F38,59,_,x,_,0,3,T2 ), 0 , 116, 0 , 220, 140), // #835 - INST(Vbroadcasti32x4 , VexRm_Lx , E(660F38,5A,_,x,_,0,4,T4 ), 0 , 117, 0 , 218, 138), // #836 - INST(Vbroadcasti32x8 , VexRm , E(660F38,5B,_,2,_,0,5,T8 ), 0 , 118, 0 , 219, 66 ), // #837 - INST(Vbroadcasti64x2 , VexRm_Lx , E(660F38,5A,_,x,_,1,4,T2 ), 0 , 119, 0 , 218, 140), // #838 - INST(Vbroadcasti64x4 , VexRm , E(660F38,5B,_,2,_,1,5,T4 ), 0 , 120, 0 , 219, 68 ), // #839 - INST(Vbroadcastsd , VexRm_Lx , V(660F38,19,_,x,0,1,3,T1S), 0 , 121, 0 , 221, 142), // #840 - INST(Vbroadcastss , VexRm_Lx , V(660F38,18,_,x,0,0,2,T1S), 0 , 122, 0 , 222, 142), // #841 - INST(Vcmppd , VexRvmi_Lx_KEvex , V(660F00,C2,_,x,I,1,4,FV ), 0 , 103, 0 , 223, 131), // #842 - INST(Vcmpph , VexRvmi_Lx_KEvex , E(000F3A,C2,_,_,_,0,4,FV ), 0 , 123, 0 , 224, 132), // #843 - INST(Vcmpps , VexRvmi_Lx_KEvex , V(000F00,C2,_,x,I,0,4,FV ), 0 , 105, 0 , 225, 131), // #844 - INST(Vcmpsd , VexRvmi_KEvex , V(F20F00,C2,_,I,I,1,3,T1S), 0 , 106, 0 , 226, 133), // #845 - INST(Vcmpsh , VexRvmi_KEvex , E(F30F3A,C2,_,_,_,0,1,T1S), 0 , 124, 0 , 227, 134), // #846 - INST(Vcmpss , VexRvmi_KEvex , V(F30F00,C2,_,I,I,0,2,T1S), 0 , 108, 0 , 228, 133), // #847 - INST(Vcomisd , VexRm , V(660F00,2F,_,I,I,1,3,T1S), 0 , 125, 0 , 229, 143), // #848 - INST(Vcomish , VexRm , E(00MAP5,2F,_,_,_,0,1,T1S), 0 , 126, 0 , 230, 134), // #849 - INST(Vcomiss , VexRm , V(000F00,2F,_,I,I,0,2,T1S), 0 , 127, 0 , 231, 143), // #850 - INST(Vcompresspd , VexMr_Lx , E(660F38,8A,_,x,_,1,3,T1S), 0 , 128, 0 , 232, 138), // #851 - INST(Vcompressps , VexMr_Lx , E(660F38,8A,_,x,_,0,2,T1S), 0 , 129, 0 , 232, 138), // #852 - INST(Vcvtdq2pd , VexRm_Lx , V(F30F00,E6,_,x,I,0,3,HV ), 0 , 130, 0 , 233, 131), // #853 - INST(Vcvtdq2ph , VexRm_Lx , E(00MAP5,5B,_,_,_,0,4,FV ), 0 , 104, 0 , 234, 132), // #854 - INST(Vcvtdq2ps , VexRm_Lx , V(000F00,5B,_,x,I,0,4,FV ), 0 , 105, 0 , 235, 131), // #855 - INST(Vcvtne2ps2bf16 , VexRvm_Lx , E(F20F38,72,_,_,_,0,4,FV ), 0 , 131, 0 , 213, 144), // #856 - INST(Vcvtneps2bf16 , VexRm_Lx_Narrow , E(F30F38,72,_,_,_,0,4,FV ), 0 , 132, 0 , 236, 144), // #857 - INST(Vcvtpd2dq , VexRm_Lx_Narrow , V(F20F00,E6,_,x,I,1,4,FV ), 0 , 133, 0 , 237, 131), // #858 - INST(Vcvtpd2ph , VexRm_Lx , E(66MAP5,5A,_,_,_,1,4,FV ), 0 , 134, 0 , 238, 132), // #859 - INST(Vcvtpd2ps , VexRm_Lx_Narrow , V(660F00,5A,_,x,I,1,4,FV ), 0 , 103, 0 , 237, 131), // #860 - INST(Vcvtpd2qq , VexRm_Lx , E(660F00,7B,_,x,_,1,4,FV ), 0 , 135, 0 , 239, 140), // #861 - INST(Vcvtpd2udq , VexRm_Lx_Narrow , E(000F00,79,_,x,_,1,4,FV ), 0 , 136, 0 , 240, 138), // #862 - INST(Vcvtpd2uqq , VexRm_Lx , E(660F00,79,_,x,_,1,4,FV ), 0 , 135, 0 , 239, 140), // #863 - INST(Vcvtph2dq , VexRm_Lx , E(66MAP5,5B,_,_,_,0,3,HV ), 0 , 137, 0 , 241, 132), // #864 - INST(Vcvtph2pd , VexRm_Lx , E(00MAP5,5A,_,_,_,0,2,QV ), 0 , 138, 0 , 242, 132), // #865 - INST(Vcvtph2ps , VexRm_Lx , V(660F38,13,_,x,0,0,3,HVM), 0 , 139, 0 , 243, 145), // #866 - INST(Vcvtph2psx , VexRm_Lx , E(66MAP6,13,_,_,_,0,3,HV ), 0 , 140, 0 , 244, 132), // #867 - INST(Vcvtph2qq , VexRm_Lx , E(66MAP5,7B,_,_,_,0,2,QV ), 0 , 141, 0 , 245, 132), // #868 - INST(Vcvtph2udq , VexRm_Lx , E(00MAP5,79,_,_,_,0,3,HV ), 0 , 142, 0 , 241, 132), // #869 - INST(Vcvtph2uqq , VexRm_Lx , E(66MAP5,79,_,_,_,0,2,QV ), 0 , 141, 0 , 245, 132), // #870 - INST(Vcvtph2uw , VexRm_Lx , E(00MAP5,7D,_,_,_,0,4,FV ), 0 , 104, 0 , 246, 132), // #871 - INST(Vcvtph2w , VexRm_Lx , E(66MAP5,7D,_,_,_,0,4,FV ), 0 , 143, 0 , 246, 132), // #872 - INST(Vcvtps2dq , VexRm_Lx , V(660F00,5B,_,x,I,0,4,FV ), 0 , 144, 0 , 235, 131), // #873 - INST(Vcvtps2pd , VexRm_Lx , V(000F00,5A,_,x,I,0,3,HV ), 0 , 145, 0 , 247, 131), // #874 - INST(Vcvtps2ph , VexMri_Lx , V(660F3A,1D,_,x,0,0,3,HVM), 0 , 146, 0 , 248, 145), // #875 - INST(Vcvtps2phx , VexRm_Lx , E(66MAP5,1D,_,_,_,0,4,FV ), 0 , 143, 0 , 234, 132), // #876 - INST(Vcvtps2qq , VexRm_Lx , E(660F00,7B,_,x,_,0,3,HV ), 0 , 147, 0 , 249, 140), // #877 - INST(Vcvtps2udq , VexRm_Lx , E(000F00,79,_,x,_,0,4,FV ), 0 , 148, 0 , 250, 138), // #878 - INST(Vcvtps2uqq , VexRm_Lx , E(660F00,79,_,x,_,0,3,HV ), 0 , 147, 0 , 249, 140), // #879 - INST(Vcvtqq2pd , VexRm_Lx , E(F30F00,E6,_,x,_,1,4,FV ), 0 , 149, 0 , 239, 140), // #880 - INST(Vcvtqq2ph , VexRm_Lx , E(00MAP5,5B,_,_,_,1,4,FV ), 0 , 150, 0 , 238, 132), // #881 - INST(Vcvtqq2ps , VexRm_Lx_Narrow , E(000F00,5B,_,x,_,1,4,FV ), 0 , 136, 0 , 240, 140), // #882 - INST(Vcvtsd2sh , VexRvm , E(F2MAP5,5A,_,_,_,1,3,T1S), 0 , 151, 0 , 251, 134), // #883 - INST(Vcvtsd2si , VexRm_Wx , V(F20F00,2D,_,I,x,x,3,T1F), 0 , 152, 0 , 252, 133), // #884 - INST(Vcvtsd2ss , VexRvm , V(F20F00,5A,_,I,I,1,3,T1S), 0 , 106, 0 , 199, 133), // #885 - INST(Vcvtsd2usi , VexRm_Wx , E(F20F00,79,_,I,_,x,3,T1F), 0 , 153, 0 , 253, 68 ), // #886 - INST(Vcvtsh2sd , VexRvm , E(F3MAP5,5A,_,_,_,0,1,T1S), 0 , 107, 0 , 254, 134), // #887 - INST(Vcvtsh2si , VexRm_Wx , E(F3MAP5,2D,_,_,_,x,1,T1S), 0 , 107, 0 , 255, 134), // #888 - INST(Vcvtsh2ss , VexRvm , E(00MAP6,13,_,_,_,0,1,T1S), 0 , 154, 0 , 254, 134), // #889 - INST(Vcvtsh2usi , VexRm_Wx , E(F3MAP5,79,_,_,_,x,1,T1S), 0 , 107, 0 , 255, 134), // #890 - INST(Vcvtsi2sd , VexRvm_Wx , V(F20F00,2A,_,I,x,x,2,T1W), 0 , 155, 0 , 256, 133), // #891 - INST(Vcvtsi2sh , VexRvm_Wx , E(F3MAP5,2A,_,_,_,x,2,T1W), 0 , 156, 0 , 257, 134), // #892 - INST(Vcvtsi2ss , VexRvm_Wx , V(F30F00,2A,_,I,x,x,2,T1W), 0 , 157, 0 , 256, 133), // #893 - INST(Vcvtss2sd , VexRvm , V(F30F00,5A,_,I,I,0,2,T1S), 0 , 108, 0 , 258, 133), // #894 - INST(Vcvtss2sh , VexRvm , E(00MAP5,1D,_,_,_,0,2,T1S), 0 , 158, 0 , 259, 134), // #895 - INST(Vcvtss2si , VexRm_Wx , V(F30F00,2D,_,I,x,x,2,T1F), 0 , 108, 0 , 260, 133), // #896 - INST(Vcvtss2usi , VexRm_Wx , E(F30F00,79,_,I,_,x,2,T1F), 0 , 159, 0 , 261, 68 ), // #897 - INST(Vcvttpd2dq , VexRm_Lx_Narrow , V(660F00,E6,_,x,I,1,4,FV ), 0 , 103, 0 , 262, 131), // #898 - INST(Vcvttpd2qq , VexRm_Lx , E(660F00,7A,_,x,_,1,4,FV ), 0 , 135, 0 , 263, 138), // #899 - INST(Vcvttpd2udq , VexRm_Lx_Narrow , E(000F00,78,_,x,_,1,4,FV ), 0 , 136, 0 , 264, 138), // #900 - INST(Vcvttpd2uqq , VexRm_Lx , E(660F00,78,_,x,_,1,4,FV ), 0 , 135, 0 , 263, 140), // #901 - INST(Vcvttph2dq , VexRm_Lx , E(F3MAP5,5B,_,_,_,0,3,HV ), 0 , 160, 0 , 244, 132), // #902 - INST(Vcvttph2qq , VexRm_Lx , E(66MAP5,7A,_,_,_,0,2,QV ), 0 , 141, 0 , 242, 132), // #903 - INST(Vcvttph2udq , VexRm_Lx , E(00MAP5,78,_,_,_,0,3,HV ), 0 , 142, 0 , 244, 132), // #904 - INST(Vcvttph2uqq , VexRm_Lx , E(66MAP5,78,_,_,_,0,2,QV ), 0 , 141, 0 , 242, 132), // #905 - INST(Vcvttph2uw , VexRm_Lx , E(00MAP5,7C,_,_,_,0,4,FV ), 0 , 104, 0 , 265, 132), // #906 - INST(Vcvttph2w , VexRm_Lx , E(66MAP5,7C,_,_,_,0,4,FV ), 0 , 143, 0 , 265, 132), // #907 - INST(Vcvttps2dq , VexRm_Lx , V(F30F00,5B,_,x,I,0,4,FV ), 0 , 161, 0 , 266, 131), // #908 - INST(Vcvttps2qq , VexRm_Lx , E(660F00,7A,_,x,_,0,3,HV ), 0 , 147, 0 , 267, 140), // #909 - INST(Vcvttps2udq , VexRm_Lx , E(000F00,78,_,x,_,0,4,FV ), 0 , 148, 0 , 268, 138), // #910 - INST(Vcvttps2uqq , VexRm_Lx , E(660F00,78,_,x,_,0,3,HV ), 0 , 147, 0 , 267, 140), // #911 - INST(Vcvttsd2si , VexRm_Wx , V(F20F00,2C,_,I,x,x,3,T1F), 0 , 152, 0 , 269, 133), // #912 - INST(Vcvttsd2usi , VexRm_Wx , E(F20F00,78,_,I,_,x,3,T1F), 0 , 153, 0 , 270, 68 ), // #913 - INST(Vcvttsh2si , VexRm_Wx , E(F3MAP5,2C,_,_,_,x,1,T1S), 0 , 107, 0 , 271, 134), // #914 - INST(Vcvttsh2usi , VexRm_Wx , E(F3MAP5,78,_,_,_,x,1,T1S), 0 , 107, 0 , 271, 134), // #915 - INST(Vcvttss2si , VexRm_Wx , V(F30F00,2C,_,I,x,x,2,T1F), 0 , 108, 0 , 272, 133), // #916 - INST(Vcvttss2usi , VexRm_Wx , E(F30F00,78,_,I,_,x,2,T1F), 0 , 159, 0 , 273, 68 ), // #917 - INST(Vcvtudq2pd , VexRm_Lx , E(F30F00,7A,_,x,_,0,3,HV ), 0 , 162, 0 , 274, 138), // #918 - INST(Vcvtudq2ph , VexRm_Lx , E(F2MAP5,7A,_,_,_,0,4,FV ), 0 , 163, 0 , 234, 132), // #919 - INST(Vcvtudq2ps , VexRm_Lx , E(F20F00,7A,_,x,_,0,4,FV ), 0 , 164, 0 , 250, 138), // #920 - INST(Vcvtuqq2pd , VexRm_Lx , E(F30F00,7A,_,x,_,1,4,FV ), 0 , 149, 0 , 239, 140), // #921 - INST(Vcvtuqq2ph , VexRm_Lx , E(F2MAP5,7A,_,_,_,1,4,FV ), 0 , 165, 0 , 238, 132), // #922 - INST(Vcvtuqq2ps , VexRm_Lx_Narrow , E(F20F00,7A,_,x,_,1,4,FV ), 0 , 166, 0 , 240, 140), // #923 - INST(Vcvtusi2sd , VexRvm_Wx , E(F20F00,7B,_,I,_,x,2,T1W), 0 , 167, 0 , 257, 68 ), // #924 - INST(Vcvtusi2sh , VexRvm_Wx , E(F3MAP5,7B,_,_,_,x,2,T1W), 0 , 156, 0 , 257, 134), // #925 - INST(Vcvtusi2ss , VexRvm_Wx , E(F30F00,7B,_,I,_,x,2,T1W), 0 , 168, 0 , 257, 68 ), // #926 - INST(Vcvtuw2ph , VexRm_Lx , E(F2MAP5,7D,_,_,_,0,4,FV ), 0 , 163, 0 , 246, 132), // #927 - INST(Vcvtw2ph , VexRm_Lx , E(F3MAP5,7D,_,_,_,0,4,FV ), 0 , 169, 0 , 246, 132), // #928 - INST(Vdbpsadbw , VexRvmi_Lx , E(660F3A,42,_,x,_,0,4,FVM), 0 , 111, 0 , 275, 146), // #929 - INST(Vdivpd , VexRvm_Lx , V(660F00,5E,_,x,I,1,4,FV ), 0 , 103, 0 , 196, 131), // #930 - INST(Vdivph , VexRvm_Lx , E(00MAP5,5E,_,_,_,0,4,FV ), 0 , 104, 0 , 197, 132), // #931 - INST(Vdivps , VexRvm_Lx , V(000F00,5E,_,x,I,0,4,FV ), 0 , 105, 0 , 198, 131), // #932 - INST(Vdivsd , VexRvm , V(F20F00,5E,_,I,I,1,3,T1S), 0 , 106, 0 , 199, 133), // #933 - INST(Vdivsh , VexRvm , E(F3MAP5,5E,_,_,_,0,1,T1S), 0 , 107, 0 , 200, 134), // #934 - INST(Vdivss , VexRvm , V(F30F00,5E,_,I,I,0,2,T1S), 0 , 108, 0 , 201, 133), // #935 - INST(Vdpbf16ps , VexRvm_Lx , E(F30F38,52,_,_,_,0,4,FV ), 0 , 132, 0 , 213, 144), // #936 - INST(Vdppd , VexRvmi_Lx , V(660F3A,41,_,x,I,_,_,_ ), 0 , 73 , 0 , 276, 135), // #937 - INST(Vdpps , VexRvmi_Lx , V(660F3A,40,_,x,I,_,_,_ ), 0 , 73 , 0 , 214, 135), // #938 - INST(Verr , X86M_NoSize , O(000F00,00,4,_,_,_,_,_ ), 0 , 97 , 0 , 107, 10 ), // #939 - INST(Verw , X86M_NoSize , O(000F00,00,5,_,_,_,_,_ ), 0 , 77 , 0 , 107, 10 ), // #940 - INST(Vexp2pd , VexRm , E(660F38,C8,_,2,_,1,4,FV ), 0 , 170, 0 , 277, 147), // #941 - INST(Vexp2ps , VexRm , E(660F38,C8,_,2,_,0,4,FV ), 0 , 171, 0 , 278, 147), // #942 - INST(Vexpandpd , VexRm_Lx , E(660F38,88,_,x,_,1,3,T1S), 0 , 128, 0 , 279, 138), // #943 - INST(Vexpandps , VexRm_Lx , E(660F38,88,_,x,_,0,2,T1S), 0 , 129, 0 , 279, 138), // #944 - INST(Vextractf128 , VexMri , V(660F3A,19,_,1,0,_,_,_ ), 0 , 172, 0 , 280, 135), // #945 - INST(Vextractf32x4 , VexMri_Lx , E(660F3A,19,_,x,_,0,4,T4 ), 0 , 173, 0 , 281, 138), // #946 - INST(Vextractf32x8 , VexMri , E(660F3A,1B,_,2,_,0,5,T8 ), 0 , 174, 0 , 282, 66 ), // #947 - INST(Vextractf64x2 , VexMri_Lx , E(660F3A,19,_,x,_,1,4,T2 ), 0 , 175, 0 , 281, 140), // #948 - INST(Vextractf64x4 , VexMri , E(660F3A,1B,_,2,_,1,5,T4 ), 0 , 176, 0 , 282, 68 ), // #949 - INST(Vextracti128 , VexMri , V(660F3A,39,_,1,0,_,_,_ ), 0 , 172, 0 , 280, 141), // #950 - INST(Vextracti32x4 , VexMri_Lx , E(660F3A,39,_,x,_,0,4,T4 ), 0 , 173, 0 , 281, 138), // #951 - INST(Vextracti32x8 , VexMri , E(660F3A,3B,_,2,_,0,5,T8 ), 0 , 174, 0 , 282, 66 ), // #952 - INST(Vextracti64x2 , VexMri_Lx , E(660F3A,39,_,x,_,1,4,T2 ), 0 , 175, 0 , 281, 140), // #953 - INST(Vextracti64x4 , VexMri , E(660F3A,3B,_,2,_,1,5,T4 ), 0 , 176, 0 , 282, 68 ), // #954 - INST(Vextractps , VexMri , V(660F3A,17,_,0,I,I,2,T1S), 0 , 177, 0 , 283, 133), // #955 - INST(Vfcmaddcph , VexRvm_Lx , E(F2MAP6,56,_,_,_,0,4,FV ), 0 , 178, 0 , 284, 132), // #956 - INST(Vfcmaddcsh , VexRvm , E(F2MAP6,57,_,_,_,0,2,T1S), 0 , 179, 0 , 259, 132), // #957 - INST(Vfcmulcph , VexRvm_Lx , E(F2MAP6,D6,_,_,_,0,4,FV ), 0 , 178, 0 , 284, 132), // #958 - INST(Vfcmulcsh , VexRvm , E(F2MAP6,D7,_,_,_,0,2,T1S), 0 , 179, 0 , 259, 132), // #959 - INST(Vfixupimmpd , VexRvmi_Lx , E(660F3A,54,_,x,_,1,4,FV ), 0 , 112, 0 , 285, 138), // #960 - INST(Vfixupimmps , VexRvmi_Lx , E(660F3A,54,_,x,_,0,4,FV ), 0 , 111, 0 , 286, 138), // #961 - INST(Vfixupimmsd , VexRvmi , E(660F3A,55,_,I,_,1,3,T1S), 0 , 180, 0 , 287, 68 ), // #962 - INST(Vfixupimmss , VexRvmi , E(660F3A,55,_,I,_,0,2,T1S), 0 , 181, 0 , 288, 68 ), // #963 - INST(Vfmadd132pd , VexRvm_Lx , V(660F38,98,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #964 - INST(Vfmadd132ph , VexRvm_Lx , E(66MAP6,98,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #965 - INST(Vfmadd132ps , VexRvm_Lx , V(660F38,98,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #966 - INST(Vfmadd132sd , VexRvm , V(660F38,99,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #967 - INST(Vfmadd132sh , VexRvm , E(66MAP6,99,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #968 - INST(Vfmadd132ss , VexRvm , V(660F38,99,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #969 - INST(Vfmadd213pd , VexRvm_Lx , V(660F38,A8,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #970 - INST(Vfmadd213ph , VexRvm_Lx , E(66MAP6,A8,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #971 - INST(Vfmadd213ps , VexRvm_Lx , V(660F38,A8,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #972 - INST(Vfmadd213sd , VexRvm , V(660F38,A9,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #973 - INST(Vfmadd213sh , VexRvm , E(66MAP6,A9,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #974 - INST(Vfmadd213ss , VexRvm , V(660F38,A9,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #975 - INST(Vfmadd231pd , VexRvm_Lx , V(660F38,B8,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #976 - INST(Vfmadd231ph , VexRvm_Lx , E(66MAP6,B8,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #977 - INST(Vfmadd231ps , VexRvm_Lx , V(660F38,B8,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #978 - INST(Vfmadd231sd , VexRvm , V(660F38,B9,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #979 - INST(Vfmadd231sh , VexRvm , E(66MAP6,B9,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #980 - INST(Vfmadd231ss , VexRvm , V(660F38,B9,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #981 - INST(Vfmaddcph , VexRvm_Lx , E(F3MAP6,56,_,_,_,0,4,FV ), 0 , 186, 0 , 284, 132), // #982 - INST(Vfmaddcsh , VexRvm , E(F3MAP6,57,_,_,_,0,2,T1S), 0 , 187, 0 , 259, 132), // #983 - INST(Vfmaddpd , Fma4_Lx , V(660F3A,69,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #984 - INST(Vfmaddps , Fma4_Lx , V(660F3A,68,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #985 - INST(Vfmaddsd , Fma4 , V(660F3A,6B,_,0,x,_,_,_ ), 0 , 73 , 0 , 290, 150), // #986 - INST(Vfmaddss , Fma4 , V(660F3A,6A,_,0,x,_,_,_ ), 0 , 73 , 0 , 291, 150), // #987 - INST(Vfmaddsub132pd , VexRvm_Lx , V(660F38,96,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #988 - INST(Vfmaddsub132ph , VexRvm_Lx , E(66MAP6,96,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #989 - INST(Vfmaddsub132ps , VexRvm_Lx , V(660F38,96,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #990 - INST(Vfmaddsub213pd , VexRvm_Lx , V(660F38,A6,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #991 - INST(Vfmaddsub213ph , VexRvm_Lx , E(66MAP6,A6,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #992 - INST(Vfmaddsub213ps , VexRvm_Lx , V(660F38,A6,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #993 - INST(Vfmaddsub231pd , VexRvm_Lx , V(660F38,B6,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #994 - INST(Vfmaddsub231ph , VexRvm_Lx , E(66MAP6,B6,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #995 - INST(Vfmaddsub231ps , VexRvm_Lx , V(660F38,B6,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #996 - INST(Vfmaddsubpd , Fma4_Lx , V(660F3A,5D,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #997 - INST(Vfmaddsubps , Fma4_Lx , V(660F3A,5C,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #998 - INST(Vfmsub132pd , VexRvm_Lx , V(660F38,9A,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #999 - INST(Vfmsub132ph , VexRvm_Lx , E(66MAP6,9A,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1000 - INST(Vfmsub132ps , VexRvm_Lx , V(660F38,9A,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1001 - INST(Vfmsub132sd , VexRvm , V(660F38,9B,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #1002 - INST(Vfmsub132sh , VexRvm , E(66MAP6,9B,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1003 - INST(Vfmsub132ss , VexRvm , V(660F38,9B,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #1004 - INST(Vfmsub213pd , VexRvm_Lx , V(660F38,AA,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1005 - INST(Vfmsub213ph , VexRvm_Lx , E(66MAP6,AA,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1006 - INST(Vfmsub213ps , VexRvm_Lx , V(660F38,AA,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1007 - INST(Vfmsub213sd , VexRvm , V(660F38,AB,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #1008 - INST(Vfmsub213sh , VexRvm , E(66MAP6,AB,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1009 - INST(Vfmsub213ss , VexRvm , V(660F38,AB,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #1010 - INST(Vfmsub231pd , VexRvm_Lx , V(660F38,BA,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1011 - INST(Vfmsub231ph , VexRvm_Lx , E(66MAP6,BA,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1012 - INST(Vfmsub231ps , VexRvm_Lx , V(660F38,BA,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1013 - INST(Vfmsub231sd , VexRvm , V(660F38,BB,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #1014 - INST(Vfmsub231sh , VexRvm , E(66MAP6,BB,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1015 - INST(Vfmsub231ss , VexRvm , V(660F38,BB,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #1016 - INST(Vfmsubadd132pd , VexRvm_Lx , V(660F38,97,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1017 - INST(Vfmsubadd132ph , VexRvm_Lx , E(66MAP6,97,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1018 - INST(Vfmsubadd132ps , VexRvm_Lx , V(660F38,97,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1019 - INST(Vfmsubadd213pd , VexRvm_Lx , V(660F38,A7,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1020 - INST(Vfmsubadd213ph , VexRvm_Lx , E(66MAP6,A7,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1021 - INST(Vfmsubadd213ps , VexRvm_Lx , V(660F38,A7,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1022 - INST(Vfmsubadd231pd , VexRvm_Lx , V(660F38,B7,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1023 - INST(Vfmsubadd231ph , VexRvm_Lx , E(66MAP6,B7,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1024 - INST(Vfmsubadd231ps , VexRvm_Lx , V(660F38,B7,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1025 - INST(Vfmsubaddpd , Fma4_Lx , V(660F3A,5F,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #1026 - INST(Vfmsubaddps , Fma4_Lx , V(660F3A,5E,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #1027 - INST(Vfmsubpd , Fma4_Lx , V(660F3A,6D,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #1028 - INST(Vfmsubps , Fma4_Lx , V(660F3A,6C,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #1029 - INST(Vfmsubsd , Fma4 , V(660F3A,6F,_,0,x,_,_,_ ), 0 , 73 , 0 , 290, 150), // #1030 - INST(Vfmsubss , Fma4 , V(660F3A,6E,_,0,x,_,_,_ ), 0 , 73 , 0 , 291, 150), // #1031 - INST(Vfmulcph , VexRvm_Lx , E(F3MAP6,D6,_,_,_,0,4,FV ), 0 , 186, 0 , 284, 132), // #1032 - INST(Vfmulcsh , VexRvm , E(F3MAP6,D7,_,_,_,0,2,T1S), 0 , 187, 0 , 259, 132), // #1033 - INST(Vfnmadd132pd , VexRvm_Lx , V(660F38,9C,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1034 - INST(Vfnmadd132ph , VexRvm_Lx , E(66MAP6,9C,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1035 - INST(Vfnmadd132ps , VexRvm_Lx , V(660F38,9C,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1036 - INST(Vfnmadd132sd , VexRvm , V(660F38,9D,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #1037 - INST(Vfnmadd132sh , VexRvm , E(66MAP6,9D,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1038 - INST(Vfnmadd132ss , VexRvm , V(660F38,9D,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #1039 - INST(Vfnmadd213pd , VexRvm_Lx , V(660F38,AC,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1040 - INST(Vfnmadd213ph , VexRvm_Lx , E(66MAP6,AC,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1041 - INST(Vfnmadd213ps , VexRvm_Lx , V(660F38,AC,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1042 - INST(Vfnmadd213sd , VexRvm , V(660F38,AD,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #1043 - INST(Vfnmadd213sh , VexRvm , E(66MAP6,AD,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1044 - INST(Vfnmadd213ss , VexRvm , V(660F38,AD,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #1045 - INST(Vfnmadd231pd , VexRvm_Lx , V(660F38,BC,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1046 - INST(Vfnmadd231ph , VexRvm_Lx , E(66MAP6,BC,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1047 - INST(Vfnmadd231ps , VexRvm_Lx , V(660F38,BC,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1048 - INST(Vfnmadd231sd , VexRvm , V(660F38,BD,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #1049 - INST(Vfnmadd231sh , VexRvm , E(66MAP6,BD,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1050 - INST(Vfnmadd231ss , VexRvm , V(660F38,BD,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #1051 - INST(Vfnmaddpd , Fma4_Lx , V(660F3A,79,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #1052 - INST(Vfnmaddps , Fma4_Lx , V(660F3A,78,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #1053 - INST(Vfnmaddsd , Fma4 , V(660F3A,7B,_,0,x,_,_,_ ), 0 , 73 , 0 , 290, 150), // #1054 - INST(Vfnmaddss , Fma4 , V(660F3A,7A,_,0,x,_,_,_ ), 0 , 73 , 0 , 291, 150), // #1055 - INST(Vfnmsub132pd , VexRvm_Lx , V(660F38,9E,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1056 - INST(Vfnmsub132ph , VexRvm_Lx , E(66MAP6,9E,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1057 - INST(Vfnmsub132ps , VexRvm_Lx , V(660F38,9E,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1058 - INST(Vfnmsub132sd , VexRvm , V(660F38,9F,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #1059 - INST(Vfnmsub132sh , VexRvm , E(66MAP6,9F,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1060 - INST(Vfnmsub132ss , VexRvm , V(660F38,9F,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #1061 - INST(Vfnmsub213pd , VexRvm_Lx , V(660F38,AE,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1062 - INST(Vfnmsub213ph , VexRvm_Lx , E(66MAP6,AE,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1063 - INST(Vfnmsub213ps , VexRvm_Lx , V(660F38,AE,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1064 - INST(Vfnmsub213sd , VexRvm , V(660F38,AF,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #1065 - INST(Vfnmsub213sh , VexRvm , E(66MAP6,AF,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1066 - INST(Vfnmsub213ss , VexRvm , V(660F38,AF,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #1067 - INST(Vfnmsub231pd , VexRvm_Lx , V(660F38,BE,_,x,1,1,4,FV ), 0 , 182, 0 , 196, 148), // #1068 - INST(Vfnmsub231ph , VexRvm_Lx , E(66MAP6,BE,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1069 - INST(Vfnmsub231ps , VexRvm_Lx , V(660F38,BE,_,x,0,0,4,FV ), 0 , 110, 0 , 198, 148), // #1070 - INST(Vfnmsub231sd , VexRvm , V(660F38,BF,_,I,1,1,3,T1S), 0 , 184, 0 , 199, 149), // #1071 - INST(Vfnmsub231sh , VexRvm , E(66MAP6,BF,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1072 - INST(Vfnmsub231ss , VexRvm , V(660F38,BF,_,I,0,0,2,T1S), 0 , 122, 0 , 201, 149), // #1073 - INST(Vfnmsubpd , Fma4_Lx , V(660F3A,7D,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #1074 - INST(Vfnmsubps , Fma4_Lx , V(660F3A,7C,_,x,x,_,_,_ ), 0 , 73 , 0 , 289, 150), // #1075 - INST(Vfnmsubsd , Fma4 , V(660F3A,7F,_,0,x,_,_,_ ), 0 , 73 , 0 , 290, 150), // #1076 - INST(Vfnmsubss , Fma4 , V(660F3A,7E,_,0,x,_,_,_ ), 0 , 73 , 0 , 291, 150), // #1077 - INST(Vfpclasspd , VexRmi_Lx , E(660F3A,66,_,x,_,1,4,FV ), 0 , 112, 0 , 292, 140), // #1078 - INST(Vfpclassph , VexRmi_Lx , E(000F3A,66,_,_,_,0,4,FV ), 0 , 123, 0 , 293, 132), // #1079 - INST(Vfpclassps , VexRmi_Lx , E(660F3A,66,_,x,_,0,4,FV ), 0 , 111, 0 , 294, 140), // #1080 - INST(Vfpclasssd , VexRmi , E(660F3A,67,_,I,_,1,3,T1S), 0 , 180, 0 , 295, 66 ), // #1081 - INST(Vfpclasssh , VexRmi , E(000F3A,67,_,_,_,0,1,T1S), 0 , 188, 0 , 296, 134), // #1082 - INST(Vfpclassss , VexRmi , E(660F3A,67,_,I,_,0,2,T1S), 0 , 181, 0 , 297, 66 ), // #1083 - INST(Vfrczpd , VexRm_Lx , V(XOP_M9,81,_,x,0,_,_,_ ), 0 , 79 , 0 , 298, 151), // #1084 - INST(Vfrczps , VexRm_Lx , V(XOP_M9,80,_,x,0,_,_,_ ), 0 , 79 , 0 , 298, 151), // #1085 - INST(Vfrczsd , VexRm , V(XOP_M9,83,_,0,0,_,_,_ ), 0 , 79 , 0 , 299, 151), // #1086 - INST(Vfrczss , VexRm , V(XOP_M9,82,_,0,0,_,_,_ ), 0 , 79 , 0 , 300, 151), // #1087 - INST(Vgatherdpd , VexRmvRm_VM , V(660F38,92,_,x,1,_,_,_ ), E(660F38,92,_,x,_,1,3,T1S), 189, 80 , 301, 152), // #1088 - INST(Vgatherdps , VexRmvRm_VM , V(660F38,92,_,x,0,_,_,_ ), E(660F38,92,_,x,_,0,2,T1S), 96 , 81 , 302, 152), // #1089 - INST(Vgatherpf0dpd , VexM_VM , E(660F38,C6,1,2,_,1,3,T1S), 0 , 190, 0 , 303, 153), // #1090 - INST(Vgatherpf0dps , VexM_VM , E(660F38,C6,1,2,_,0,2,T1S), 0 , 191, 0 , 304, 153), // #1091 - INST(Vgatherpf0qpd , VexM_VM , E(660F38,C7,1,2,_,1,3,T1S), 0 , 190, 0 , 305, 153), // #1092 - INST(Vgatherpf0qps , VexM_VM , E(660F38,C7,1,2,_,0,2,T1S), 0 , 191, 0 , 305, 153), // #1093 - INST(Vgatherpf1dpd , VexM_VM , E(660F38,C6,2,2,_,1,3,T1S), 0 , 192, 0 , 303, 153), // #1094 - INST(Vgatherpf1dps , VexM_VM , E(660F38,C6,2,2,_,0,2,T1S), 0 , 193, 0 , 304, 153), // #1095 - INST(Vgatherpf1qpd , VexM_VM , E(660F38,C7,2,2,_,1,3,T1S), 0 , 192, 0 , 305, 153), // #1096 - INST(Vgatherpf1qps , VexM_VM , E(660F38,C7,2,2,_,0,2,T1S), 0 , 193, 0 , 305, 153), // #1097 - INST(Vgatherqpd , VexRmvRm_VM , V(660F38,93,_,x,1,_,_,_ ), E(660F38,93,_,x,_,1,3,T1S), 189, 82 , 306, 152), // #1098 - INST(Vgatherqps , VexRmvRm_VM , V(660F38,93,_,x,0,_,_,_ ), E(660F38,93,_,x,_,0,2,T1S), 96 , 83 , 307, 152), // #1099 - INST(Vgetexppd , VexRm_Lx , E(660F38,42,_,x,_,1,4,FV ), 0 , 113, 0 , 263, 138), // #1100 - INST(Vgetexpph , VexRm_Lx , E(66MAP6,42,_,_,_,0,4,FV ), 0 , 183, 0 , 265, 132), // #1101 - INST(Vgetexpps , VexRm_Lx , E(660F38,42,_,x,_,0,4,FV ), 0 , 114, 0 , 268, 138), // #1102 - INST(Vgetexpsd , VexRvm , E(660F38,43,_,I,_,1,3,T1S), 0 , 128, 0 , 308, 68 ), // #1103 - INST(Vgetexpsh , VexRvm , E(66MAP6,43,_,_,_,0,1,T1S), 0 , 185, 0 , 254, 134), // #1104 - INST(Vgetexpss , VexRvm , E(660F38,43,_,I,_,0,2,T1S), 0 , 129, 0 , 309, 68 ), // #1105 - INST(Vgetmantpd , VexRmi_Lx , E(660F3A,26,_,x,_,1,4,FV ), 0 , 112, 0 , 310, 138), // #1106 - INST(Vgetmantph , VexRmi_Lx , E(000F3A,26,_,_,_,0,4,FV ), 0 , 123, 0 , 311, 132), // #1107 - INST(Vgetmantps , VexRmi_Lx , E(660F3A,26,_,x,_,0,4,FV ), 0 , 111, 0 , 312, 138), // #1108 - INST(Vgetmantsd , VexRvmi , E(660F3A,27,_,I,_,1,3,T1S), 0 , 180, 0 , 287, 68 ), // #1109 - INST(Vgetmantsh , VexRvmi , E(000F3A,27,_,_,_,0,1,T1S), 0 , 188, 0 , 313, 134), // #1110 - INST(Vgetmantss , VexRvmi , E(660F3A,27,_,I,_,0,2,T1S), 0 , 181, 0 , 288, 68 ), // #1111 - INST(Vgf2p8affineinvqb, VexRvmi_Lx , V(660F3A,CF,_,x,1,1,4,FV ), 0 , 194, 0 , 314, 154), // #1112 - INST(Vgf2p8affineqb , VexRvmi_Lx , V(660F3A,CE,_,x,1,1,4,FV ), 0 , 194, 0 , 314, 154), // #1113 - INST(Vgf2p8mulb , VexRvm_Lx , V(660F38,CF,_,x,0,0,4,FV ), 0 , 110, 0 , 315, 154), // #1114 - INST(Vhaddpd , VexRvm_Lx , V(660F00,7C,_,x,I,_,_,_ ), 0 , 69 , 0 , 202, 135), // #1115 - INST(Vhaddps , VexRvm_Lx , V(F20F00,7C,_,x,I,_,_,_ ), 0 , 109, 0 , 202, 135), // #1116 - INST(Vhsubpd , VexRvm_Lx , V(660F00,7D,_,x,I,_,_,_ ), 0 , 69 , 0 , 202, 135), // #1117 - INST(Vhsubps , VexRvm_Lx , V(F20F00,7D,_,x,I,_,_,_ ), 0 , 109, 0 , 202, 135), // #1118 - INST(Vinsertf128 , VexRvmi , V(660F3A,18,_,1,0,_,_,_ ), 0 , 172, 0 , 316, 135), // #1119 - INST(Vinsertf32x4 , VexRvmi_Lx , E(660F3A,18,_,x,_,0,4,T4 ), 0 , 173, 0 , 317, 138), // #1120 - INST(Vinsertf32x8 , VexRvmi , E(660F3A,1A,_,2,_,0,5,T8 ), 0 , 174, 0 , 318, 66 ), // #1121 - INST(Vinsertf64x2 , VexRvmi_Lx , E(660F3A,18,_,x,_,1,4,T2 ), 0 , 175, 0 , 317, 140), // #1122 - INST(Vinsertf64x4 , VexRvmi , E(660F3A,1A,_,2,_,1,5,T4 ), 0 , 176, 0 , 318, 68 ), // #1123 - INST(Vinserti128 , VexRvmi , V(660F3A,38,_,1,0,_,_,_ ), 0 , 172, 0 , 316, 141), // #1124 - INST(Vinserti32x4 , VexRvmi_Lx , E(660F3A,38,_,x,_,0,4,T4 ), 0 , 173, 0 , 317, 138), // #1125 - INST(Vinserti32x8 , VexRvmi , E(660F3A,3A,_,2,_,0,5,T8 ), 0 , 174, 0 , 318, 66 ), // #1126 - INST(Vinserti64x2 , VexRvmi_Lx , E(660F3A,38,_,x,_,1,4,T2 ), 0 , 175, 0 , 317, 140), // #1127 - INST(Vinserti64x4 , VexRvmi , E(660F3A,3A,_,2,_,1,5,T4 ), 0 , 176, 0 , 318, 68 ), // #1128 - INST(Vinsertps , VexRvmi , V(660F3A,21,_,0,I,0,2,T1S), 0 , 177, 0 , 319, 133), // #1129 - INST(Vlddqu , VexRm_Lx , V(F20F00,F0,_,x,I,_,_,_ ), 0 , 109, 0 , 320, 135), // #1130 - INST(Vldmxcsr , VexM , V(000F00,AE,2,0,I,_,_,_ ), 0 , 195, 0 , 321, 135), // #1131 - INST(Vmaskmovdqu , VexRm_ZDI , V(660F00,F7,_,0,I,_,_,_ ), 0 , 69 , 0 , 322, 135), // #1132 - INST(Vmaskmovpd , VexRvmMvr_Lx , V(660F38,2D,_,x,0,_,_,_ ), V(660F38,2F,_,x,0,_,_,_ ), 96 , 84 , 323, 135), // #1133 - INST(Vmaskmovps , VexRvmMvr_Lx , V(660F38,2C,_,x,0,_,_,_ ), V(660F38,2E,_,x,0,_,_,_ ), 96 , 85 , 323, 135), // #1134 - INST(Vmaxpd , VexRvm_Lx , V(660F00,5F,_,x,I,1,4,FV ), 0 , 103, 0 , 324, 131), // #1135 - INST(Vmaxph , VexRvm_Lx , E(00MAP5,5F,_,_,_,0,4,FV ), 0 , 104, 0 , 325, 132), // #1136 - INST(Vmaxps , VexRvm_Lx , V(000F00,5F,_,x,I,0,4,FV ), 0 , 105, 0 , 326, 131), // #1137 - INST(Vmaxsd , VexRvm , V(F20F00,5F,_,I,I,1,3,T1S), 0 , 106, 0 , 327, 131), // #1138 - INST(Vmaxsh , VexRvm , E(F3MAP5,5F,_,_,_,0,1,T1S), 0 , 107, 0 , 254, 134), // #1139 - INST(Vmaxss , VexRvm , V(F30F00,5F,_,I,I,0,2,T1S), 0 , 108, 0 , 258, 131), // #1140 - INST(Vmcall , X86Op , O(000F01,C1,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 58 ), // #1141 - INST(Vmclear , X86M_Only , O(660F00,C7,6,_,_,_,_,_ ), 0 , 26 , 0 , 32 , 58 ), // #1142 - INST(Vmfunc , X86Op , O(000F01,D4,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 58 ), // #1143 - INST(Vminpd , VexRvm_Lx , V(660F00,5D,_,x,I,1,4,FV ), 0 , 103, 0 , 324, 131), // #1144 - INST(Vminph , VexRvm_Lx , E(00MAP5,5D,_,_,_,0,4,FV ), 0 , 104, 0 , 325, 132), // #1145 - INST(Vminps , VexRvm_Lx , V(000F00,5D,_,x,I,0,4,FV ), 0 , 105, 0 , 326, 131), // #1146 - INST(Vminsd , VexRvm , V(F20F00,5D,_,I,I,1,3,T1S), 0 , 106, 0 , 327, 131), // #1147 - INST(Vminsh , VexRvm , E(F3MAP5,5D,_,_,_,0,1,T1S), 0 , 107, 0 , 254, 134), // #1148 - INST(Vminss , VexRvm , V(F30F00,5D,_,I,I,0,2,T1S), 0 , 108, 0 , 258, 131), // #1149 - INST(Vmlaunch , X86Op , O(000F01,C2,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 58 ), // #1150 - INST(Vmload , X86Op_xAX , O(000F01,DA,_,_,_,_,_,_ ), 0 , 21 , 0 , 328, 22 ), // #1151 - INST(Vmmcall , X86Op , O(000F01,D9,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 22 ), // #1152 - INST(Vmovapd , VexRmMr_Lx , V(660F00,28,_,x,I,1,4,FVM), V(660F00,29,_,x,I,1,4,FVM), 103, 86 , 329, 155), // #1153 - INST(Vmovaps , VexRmMr_Lx , V(000F00,28,_,x,I,0,4,FVM), V(000F00,29,_,x,I,0,4,FVM), 105, 87 , 329, 155), // #1154 - INST(Vmovd , VexMovdMovq , V(660F00,6E,_,0,0,0,2,T1S), V(660F00,7E,_,0,0,0,2,T1S), 196, 88 , 330, 133), // #1155 - INST(Vmovddup , VexRm_Lx , V(F20F00,12,_,x,I,1,3,DUP), 0 , 197, 0 , 331, 131), // #1156 - INST(Vmovdqa , VexRmMr_Lx , V(660F00,6F,_,x,I,_,_,_ ), V(660F00,7F,_,x,I,_,_,_ ), 69 , 89 , 332, 156), // #1157 - INST(Vmovdqa32 , VexRmMr_Lx , E(660F00,6F,_,x,_,0,4,FVM), E(660F00,7F,_,x,_,0,4,FVM), 198, 90 , 333, 157), // #1158 - INST(Vmovdqa64 , VexRmMr_Lx , E(660F00,6F,_,x,_,1,4,FVM), E(660F00,7F,_,x,_,1,4,FVM), 135, 91 , 333, 157), // #1159 - INST(Vmovdqu , VexRmMr_Lx , V(F30F00,6F,_,x,I,_,_,_ ), V(F30F00,7F,_,x,I,_,_,_ ), 199, 92 , 332, 156), // #1160 - INST(Vmovdqu16 , VexRmMr_Lx , E(F20F00,6F,_,x,_,1,4,FVM), E(F20F00,7F,_,x,_,1,4,FVM), 166, 93 , 333, 158), // #1161 - INST(Vmovdqu32 , VexRmMr_Lx , E(F30F00,6F,_,x,_,0,4,FVM), E(F30F00,7F,_,x,_,0,4,FVM), 200, 94 , 333, 157), // #1162 - INST(Vmovdqu64 , VexRmMr_Lx , E(F30F00,6F,_,x,_,1,4,FVM), E(F30F00,7F,_,x,_,1,4,FVM), 149, 95 , 333, 157), // #1163 - INST(Vmovdqu8 , VexRmMr_Lx , E(F20F00,6F,_,x,_,0,4,FVM), E(F20F00,7F,_,x,_,0,4,FVM), 164, 96 , 333, 158), // #1164 - INST(Vmovhlps , VexRvm , V(000F00,12,_,0,I,0,_,_ ), 0 , 72 , 0 , 334, 133), // #1165 - INST(Vmovhpd , VexRvmMr , V(660F00,16,_,0,I,1,3,T1S), V(660F00,17,_,0,I,1,3,T1S), 125, 97 , 335, 133), // #1166 - INST(Vmovhps , VexRvmMr , V(000F00,16,_,0,I,0,3,T2 ), V(000F00,17,_,0,I,0,3,T2 ), 201, 98 , 335, 133), // #1167 - INST(Vmovlhps , VexRvm , V(000F00,16,_,0,I,0,_,_ ), 0 , 72 , 0 , 334, 133), // #1168 - INST(Vmovlpd , VexRvmMr , V(660F00,12,_,0,I,1,3,T1S), V(660F00,13,_,0,I,1,3,T1S), 125, 99 , 335, 133), // #1169 - INST(Vmovlps , VexRvmMr , V(000F00,12,_,0,I,0,3,T2 ), V(000F00,13,_,0,I,0,3,T2 ), 201, 100, 335, 133), // #1170 - INST(Vmovmskpd , VexRm_Lx , V(660F00,50,_,x,I,_,_,_ ), 0 , 69 , 0 , 336, 135), // #1171 - INST(Vmovmskps , VexRm_Lx , V(000F00,50,_,x,I,_,_,_ ), 0 , 72 , 0 , 336, 135), // #1172 - INST(Vmovntdq , VexMr_Lx , V(660F00,E7,_,x,I,0,4,FVM), 0 , 144, 0 , 337, 131), // #1173 - INST(Vmovntdqa , VexRm_Lx , V(660F38,2A,_,x,I,0,4,FVM), 0 , 110, 0 , 338, 142), // #1174 - INST(Vmovntpd , VexMr_Lx , V(660F00,2B,_,x,I,1,4,FVM), 0 , 103, 0 , 337, 131), // #1175 - INST(Vmovntps , VexMr_Lx , V(000F00,2B,_,x,I,0,4,FVM), 0 , 105, 0 , 337, 131), // #1176 - INST(Vmovq , VexMovdMovq , V(660F00,6E,_,0,I,1,3,T1S), V(660F00,7E,_,0,I,1,3,T1S), 125, 101, 339, 159), // #1177 - INST(Vmovsd , VexMovssMovsd , V(F20F00,10,_,I,I,1,3,T1S), V(F20F00,11,_,I,I,1,3,T1S), 106, 102, 340, 159), // #1178 - INST(Vmovsh , VexMovssMovsd , E(F3MAP5,10,_,I,_,0,1,T1S), E(F3MAP5,11,_,I,_,0,1,T1S), 107, 103, 341, 134), // #1179 - INST(Vmovshdup , VexRm_Lx , V(F30F00,16,_,x,I,0,4,FVM), 0 , 161, 0 , 342, 131), // #1180 - INST(Vmovsldup , VexRm_Lx , V(F30F00,12,_,x,I,0,4,FVM), 0 , 161, 0 , 342, 131), // #1181 - INST(Vmovss , VexMovssMovsd , V(F30F00,10,_,I,I,0,2,T1S), V(F30F00,11,_,I,I,0,2,T1S), 108, 104, 343, 159), // #1182 - INST(Vmovupd , VexRmMr_Lx , V(660F00,10,_,x,I,1,4,FVM), V(660F00,11,_,x,I,1,4,FVM), 103, 105, 329, 155), // #1183 - INST(Vmovups , VexRmMr_Lx , V(000F00,10,_,x,I,0,4,FVM), V(000F00,11,_,x,I,0,4,FVM), 105, 106, 329, 155), // #1184 - INST(Vmovw , VexMovdMovq , E(66MAP5,6E,_,0,_,I,1,T1S), E(66MAP5,7E,_,0,_,I,1,T1S), 202, 107, 344, 134), // #1185 - INST(Vmpsadbw , VexRvmi_Lx , V(660F3A,42,_,x,I,_,_,_ ), 0 , 73 , 0 , 214, 160), // #1186 - INST(Vmptrld , X86M_Only , O(000F00,C7,6,_,_,_,_,_ ), 0 , 80 , 0 , 32 , 58 ), // #1187 - INST(Vmptrst , X86M_Only , O(000F00,C7,7,_,_,_,_,_ ), 0 , 22 , 0 , 32 , 58 ), // #1188 - INST(Vmread , X86Mr_NoSize , O(000F00,78,_,_,_,_,_,_ ), 0 , 4 , 0 , 345, 58 ), // #1189 - INST(Vmresume , X86Op , O(000F01,C3,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 58 ), // #1190 - INST(Vmrun , X86Op_xAX , O(000F01,D8,_,_,_,_,_,_ ), 0 , 21 , 0 , 328, 22 ), // #1191 - INST(Vmsave , X86Op_xAX , O(000F01,DB,_,_,_,_,_,_ ), 0 , 21 , 0 , 328, 22 ), // #1192 - INST(Vmulpd , VexRvm_Lx , V(660F00,59,_,x,I,1,4,FV ), 0 , 103, 0 , 196, 131), // #1193 - INST(Vmulph , VexRvm_Lx , E(00MAP5,59,_,_,_,0,4,FV ), 0 , 104, 0 , 197, 132), // #1194 - INST(Vmulps , VexRvm_Lx , V(000F00,59,_,x,I,0,4,FV ), 0 , 105, 0 , 198, 131), // #1195 - INST(Vmulsd , VexRvm , V(F20F00,59,_,I,I,1,3,T1S), 0 , 106, 0 , 199, 133), // #1196 - INST(Vmulsh , VexRvm , E(F3MAP5,59,_,_,_,0,1,T1S), 0 , 107, 0 , 200, 134), // #1197 - INST(Vmulss , VexRvm , V(F30F00,59,_,I,I,0,2,T1S), 0 , 108, 0 , 201, 133), // #1198 - INST(Vmwrite , X86Rm_NoSize , O(000F00,79,_,_,_,_,_,_ ), 0 , 4 , 0 , 346, 58 ), // #1199 - INST(Vmxon , X86M_Only , O(F30F00,C7,6,_,_,_,_,_ ), 0 , 24 , 0 , 32 , 58 ), // #1200 - INST(Vorpd , VexRvm_Lx , V(660F00,56,_,x,I,1,4,FV ), 0 , 103, 0 , 210, 139), // #1201 - INST(Vorps , VexRvm_Lx , V(000F00,56,_,x,I,0,4,FV ), 0 , 105, 0 , 211, 139), // #1202 - INST(Vp2intersectd , VexRvm_Lx_2xK , E(F20F38,68,_,_,_,0,4,FV ), 0 , 131, 0 , 347, 161), // #1203 - INST(Vp2intersectq , VexRvm_Lx_2xK , E(F20F38,68,_,_,_,1,4,FV ), 0 , 203, 0 , 348, 161), // #1204 - INST(Vp4dpwssd , VexRm_T1_4X , E(F20F38,52,_,2,_,0,4,T4X), 0 , 101, 0 , 194, 162), // #1205 - INST(Vp4dpwssds , VexRm_T1_4X , E(F20F38,53,_,2,_,0,4,T4X), 0 , 101, 0 , 194, 162), // #1206 - INST(Vpabsb , VexRm_Lx , V(660F38,1C,_,x,I,_,4,FVM), 0 , 110, 0 , 342, 163), // #1207 - INST(Vpabsd , VexRm_Lx , V(660F38,1E,_,x,I,0,4,FV ), 0 , 110, 0 , 349, 142), // #1208 - INST(Vpabsq , VexRm_Lx , E(660F38,1F,_,x,_,1,4,FV ), 0 , 113, 0 , 350, 138), // #1209 - INST(Vpabsw , VexRm_Lx , V(660F38,1D,_,x,I,_,4,FVM), 0 , 110, 0 , 342, 163), // #1210 - INST(Vpackssdw , VexRvm_Lx , V(660F00,6B,_,x,I,0,4,FV ), 0 , 144, 0 , 209, 163), // #1211 - INST(Vpacksswb , VexRvm_Lx , V(660F00,63,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1212 - INST(Vpackusdw , VexRvm_Lx , V(660F38,2B,_,x,I,0,4,FV ), 0 , 110, 0 , 209, 163), // #1213 - INST(Vpackuswb , VexRvm_Lx , V(660F00,67,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1214 - INST(Vpaddb , VexRvm_Lx , V(660F00,FC,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1215 - INST(Vpaddd , VexRvm_Lx , V(660F00,FE,_,x,I,0,4,FV ), 0 , 144, 0 , 209, 142), // #1216 - INST(Vpaddq , VexRvm_Lx , V(660F00,D4,_,x,I,1,4,FV ), 0 , 103, 0 , 208, 142), // #1217 - INST(Vpaddsb , VexRvm_Lx , V(660F00,EC,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1218 - INST(Vpaddsw , VexRvm_Lx , V(660F00,ED,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1219 - INST(Vpaddusb , VexRvm_Lx , V(660F00,DC,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1220 - INST(Vpaddusw , VexRvm_Lx , V(660F00,DD,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1221 - INST(Vpaddw , VexRvm_Lx , V(660F00,FD,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1222 - INST(Vpalignr , VexRvmi_Lx , V(660F3A,0F,_,x,I,I,4,FVM), 0 , 204, 0 , 314, 163), // #1223 - INST(Vpand , VexRvm_Lx , V(660F00,DB,_,x,I,_,_,_ ), 0 , 69 , 0 , 351, 160), // #1224 - INST(Vpandd , VexRvm_Lx , E(660F00,DB,_,x,_,0,4,FV ), 0 , 198, 0 , 352, 138), // #1225 - INST(Vpandn , VexRvm_Lx , V(660F00,DF,_,x,I,_,_,_ ), 0 , 69 , 0 , 353, 160), // #1226 - INST(Vpandnd , VexRvm_Lx , E(660F00,DF,_,x,_,0,4,FV ), 0 , 198, 0 , 354, 138), // #1227 - INST(Vpandnq , VexRvm_Lx , E(660F00,DF,_,x,_,1,4,FV ), 0 , 135, 0 , 355, 138), // #1228 - INST(Vpandq , VexRvm_Lx , E(660F00,DB,_,x,_,1,4,FV ), 0 , 135, 0 , 356, 138), // #1229 - INST(Vpavgb , VexRvm_Lx , V(660F00,E0,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1230 - INST(Vpavgw , VexRvm_Lx , V(660F00,E3,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1231 - INST(Vpblendd , VexRvmi_Lx , V(660F3A,02,_,x,0,_,_,_ ), 0 , 73 , 0 , 214, 141), // #1232 - INST(Vpblendmb , VexRvm_Lx , E(660F38,66,_,x,_,0,4,FVM), 0 , 114, 0 , 357, 146), // #1233 - INST(Vpblendmd , VexRvm_Lx , E(660F38,64,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 138), // #1234 - INST(Vpblendmq , VexRvm_Lx , E(660F38,64,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1235 - INST(Vpblendmw , VexRvm_Lx , E(660F38,66,_,x,_,1,4,FVM), 0 , 113, 0 , 357, 146), // #1236 - INST(Vpblendvb , VexRvmr_Lx , V(660F3A,4C,_,x,0,_,_,_ ), 0 , 73 , 0 , 215, 160), // #1237 - INST(Vpblendw , VexRvmi_Lx , V(660F3A,0E,_,x,I,_,_,_ ), 0 , 73 , 0 , 214, 160), // #1238 - INST(Vpbroadcastb , VexRm_Lx_Bcst , V(660F38,78,_,x,0,0,0,T1S), E(660F38,7A,_,x,0,0,0,T1S), 96 , 108, 358, 164), // #1239 - INST(Vpbroadcastd , VexRm_Lx_Bcst , V(660F38,58,_,x,0,0,2,T1S), E(660F38,7C,_,x,0,0,0,T1S), 122, 109, 359, 152), // #1240 - INST(Vpbroadcastmb2q , VexRm_Lx , E(F30F38,2A,_,x,_,1,_,_ ), 0 , 205, 0 , 360, 165), // #1241 - INST(Vpbroadcastmw2d , VexRm_Lx , E(F30F38,3A,_,x,_,0,_,_ ), 0 , 206, 0 , 360, 165), // #1242 - INST(Vpbroadcastq , VexRm_Lx_Bcst , V(660F38,59,_,x,0,1,3,T1S), E(660F38,7C,_,x,0,1,0,T1S), 121, 110, 361, 152), // #1243 - INST(Vpbroadcastw , VexRm_Lx_Bcst , V(660F38,79,_,x,0,0,1,T1S), E(660F38,7B,_,x,0,0,0,T1S), 207, 111, 362, 164), // #1244 - INST(Vpclmulqdq , VexRvmi_Lx , V(660F3A,44,_,x,I,_,4,FVM), 0 , 204, 0 , 363, 166), // #1245 - INST(Vpcmov , VexRvrmRvmr_Lx , V(XOP_M8,A2,_,x,x,_,_,_ ), 0 , 208, 0 , 289, 151), // #1246 - INST(Vpcmpb , VexRvmi_Lx , E(660F3A,3F,_,x,_,0,4,FVM), 0 , 111, 0 , 364, 146), // #1247 - INST(Vpcmpd , VexRvmi_Lx , E(660F3A,1F,_,x,_,0,4,FV ), 0 , 111, 0 , 365, 138), // #1248 - INST(Vpcmpeqb , VexRvm_Lx_KEvex , V(660F00,74,_,x,I,I,4,FV ), 0 , 144, 0 , 366, 163), // #1249 - INST(Vpcmpeqd , VexRvm_Lx_KEvex , V(660F00,76,_,x,I,0,4,FVM), 0 , 144, 0 , 367, 142), // #1250 - INST(Vpcmpeqq , VexRvm_Lx_KEvex , V(660F38,29,_,x,I,1,4,FVM), 0 , 209, 0 , 368, 142), // #1251 - INST(Vpcmpeqw , VexRvm_Lx_KEvex , V(660F00,75,_,x,I,I,4,FV ), 0 , 144, 0 , 366, 163), // #1252 - INST(Vpcmpestri , VexRmi , V(660F3A,61,_,0,I,_,_,_ ), 0 , 73 , 0 , 369, 167), // #1253 - INST(Vpcmpestrm , VexRmi , V(660F3A,60,_,0,I,_,_,_ ), 0 , 73 , 0 , 370, 167), // #1254 - INST(Vpcmpgtb , VexRvm_Lx_KEvex , V(660F00,64,_,x,I,I,4,FV ), 0 , 144, 0 , 366, 163), // #1255 - INST(Vpcmpgtd , VexRvm_Lx_KEvex , V(660F00,66,_,x,I,0,4,FVM), 0 , 144, 0 , 367, 142), // #1256 - INST(Vpcmpgtq , VexRvm_Lx_KEvex , V(660F38,37,_,x,I,1,4,FVM), 0 , 209, 0 , 368, 142), // #1257 - INST(Vpcmpgtw , VexRvm_Lx_KEvex , V(660F00,65,_,x,I,I,4,FV ), 0 , 144, 0 , 366, 163), // #1258 - INST(Vpcmpistri , VexRmi , V(660F3A,63,_,0,I,_,_,_ ), 0 , 73 , 0 , 371, 167), // #1259 - INST(Vpcmpistrm , VexRmi , V(660F3A,62,_,0,I,_,_,_ ), 0 , 73 , 0 , 372, 167), // #1260 - INST(Vpcmpq , VexRvmi_Lx , E(660F3A,1F,_,x,_,1,4,FV ), 0 , 112, 0 , 373, 138), // #1261 - INST(Vpcmpub , VexRvmi_Lx , E(660F3A,3E,_,x,_,0,4,FVM), 0 , 111, 0 , 364, 146), // #1262 - INST(Vpcmpud , VexRvmi_Lx , E(660F3A,1E,_,x,_,0,4,FV ), 0 , 111, 0 , 365, 138), // #1263 - INST(Vpcmpuq , VexRvmi_Lx , E(660F3A,1E,_,x,_,1,4,FV ), 0 , 112, 0 , 373, 138), // #1264 - INST(Vpcmpuw , VexRvmi_Lx , E(660F3A,3E,_,x,_,1,4,FVM), 0 , 112, 0 , 373, 146), // #1265 - INST(Vpcmpw , VexRvmi_Lx , E(660F3A,3F,_,x,_,1,4,FVM), 0 , 112, 0 , 373, 146), // #1266 - INST(Vpcomb , VexRvmi , V(XOP_M8,CC,_,0,0,_,_,_ ), 0 , 208, 0 , 276, 151), // #1267 - INST(Vpcomd , VexRvmi , V(XOP_M8,CE,_,0,0,_,_,_ ), 0 , 208, 0 , 276, 151), // #1268 - INST(Vpcompressb , VexMr_Lx , E(660F38,63,_,x,_,0,0,T1S), 0 , 210, 0 , 232, 168), // #1269 - INST(Vpcompressd , VexMr_Lx , E(660F38,8B,_,x,_,0,2,T1S), 0 , 129, 0 , 232, 138), // #1270 - INST(Vpcompressq , VexMr_Lx , E(660F38,8B,_,x,_,1,3,T1S), 0 , 128, 0 , 232, 138), // #1271 - INST(Vpcompressw , VexMr_Lx , E(660F38,63,_,x,_,1,1,T1S), 0 , 211, 0 , 232, 168), // #1272 - INST(Vpcomq , VexRvmi , V(XOP_M8,CF,_,0,0,_,_,_ ), 0 , 208, 0 , 276, 151), // #1273 - INST(Vpcomub , VexRvmi , V(XOP_M8,EC,_,0,0,_,_,_ ), 0 , 208, 0 , 276, 151), // #1274 - INST(Vpcomud , VexRvmi , V(XOP_M8,EE,_,0,0,_,_,_ ), 0 , 208, 0 , 276, 151), // #1275 - INST(Vpcomuq , VexRvmi , V(XOP_M8,EF,_,0,0,_,_,_ ), 0 , 208, 0 , 276, 151), // #1276 - INST(Vpcomuw , VexRvmi , V(XOP_M8,ED,_,0,0,_,_,_ ), 0 , 208, 0 , 276, 151), // #1277 - INST(Vpcomw , VexRvmi , V(XOP_M8,CD,_,0,0,_,_,_ ), 0 , 208, 0 , 276, 151), // #1278 - INST(Vpconflictd , VexRm_Lx , E(660F38,C4,_,x,_,0,4,FV ), 0 , 114, 0 , 374, 165), // #1279 - INST(Vpconflictq , VexRm_Lx , E(660F38,C4,_,x,_,1,4,FV ), 0 , 113, 0 , 374, 165), // #1280 - INST(Vpdpbusd , VexRvm_Lx , V(660F38,50,_,x,_,0,4,FV ), 0 , 110, 0 , 375, 169), // #1281 - INST(Vpdpbusds , VexRvm_Lx , V(660F38,51,_,x,_,0,4,FV ), 0 , 110, 0 , 375, 169), // #1282 - INST(Vpdpwssd , VexRvm_Lx , V(660F38,52,_,x,_,0,4,FV ), 0 , 110, 0 , 375, 169), // #1283 - INST(Vpdpwssds , VexRvm_Lx , V(660F38,53,_,x,_,0,4,FV ), 0 , 110, 0 , 375, 169), // #1284 - INST(Vperm2f128 , VexRvmi , V(660F3A,06,_,1,0,_,_,_ ), 0 , 172, 0 , 376, 135), // #1285 - INST(Vperm2i128 , VexRvmi , V(660F3A,46,_,1,0,_,_,_ ), 0 , 172, 0 , 376, 141), // #1286 - INST(Vpermb , VexRvm_Lx , E(660F38,8D,_,x,_,0,4,FVM), 0 , 114, 0 , 357, 170), // #1287 - INST(Vpermd , VexRvm_Lx , V(660F38,36,_,x,0,0,4,FV ), 0 , 110, 0 , 377, 152), // #1288 - INST(Vpermi2b , VexRvm_Lx , E(660F38,75,_,x,_,0,4,FVM), 0 , 114, 0 , 357, 170), // #1289 - INST(Vpermi2d , VexRvm_Lx , E(660F38,76,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 138), // #1290 - INST(Vpermi2pd , VexRvm_Lx , E(660F38,77,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1291 - INST(Vpermi2ps , VexRvm_Lx , E(660F38,77,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 138), // #1292 - INST(Vpermi2q , VexRvm_Lx , E(660F38,76,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1293 - INST(Vpermi2w , VexRvm_Lx , E(660F38,75,_,x,_,1,4,FVM), 0 , 113, 0 , 357, 146), // #1294 - INST(Vpermil2pd , VexRvrmiRvmri_Lx , V(660F3A,49,_,x,x,_,_,_ ), 0 , 73 , 0 , 378, 151), // #1295 - INST(Vpermil2ps , VexRvrmiRvmri_Lx , V(660F3A,48,_,x,x,_,_,_ ), 0 , 73 , 0 , 378, 151), // #1296 - INST(Vpermilpd , VexRvmRmi_Lx , V(660F38,0D,_,x,0,1,4,FV ), V(660F3A,05,_,x,0,1,4,FV ), 209, 112, 379, 131), // #1297 - INST(Vpermilps , VexRvmRmi_Lx , V(660F38,0C,_,x,0,0,4,FV ), V(660F3A,04,_,x,0,0,4,FV ), 110, 113, 380, 131), // #1298 - INST(Vpermpd , VexRvmRmi_Lx , E(660F38,16,_,x,1,1,4,FV ), V(660F3A,01,_,x,1,1,4,FV ), 212, 114, 381, 152), // #1299 - INST(Vpermps , VexRvm_Lx , V(660F38,16,_,x,0,0,4,FV ), 0 , 110, 0 , 377, 152), // #1300 - INST(Vpermq , VexRvmRmi_Lx , E(660F38,36,_,x,_,1,4,FV ), V(660F3A,00,_,x,1,1,4,FV ), 113, 115, 381, 152), // #1301 - INST(Vpermt2b , VexRvm_Lx , E(660F38,7D,_,x,_,0,4,FVM), 0 , 114, 0 , 357, 170), // #1302 - INST(Vpermt2d , VexRvm_Lx , E(660F38,7E,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 138), // #1303 - INST(Vpermt2pd , VexRvm_Lx , E(660F38,7F,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1304 - INST(Vpermt2ps , VexRvm_Lx , E(660F38,7F,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 138), // #1305 - INST(Vpermt2q , VexRvm_Lx , E(660F38,7E,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1306 - INST(Vpermt2w , VexRvm_Lx , E(660F38,7D,_,x,_,1,4,FVM), 0 , 113, 0 , 357, 146), // #1307 - INST(Vpermw , VexRvm_Lx , E(660F38,8D,_,x,_,1,4,FVM), 0 , 113, 0 , 357, 146), // #1308 - INST(Vpexpandb , VexRm_Lx , E(660F38,62,_,x,_,0,0,T1S), 0 , 210, 0 , 279, 168), // #1309 - INST(Vpexpandd , VexRm_Lx , E(660F38,89,_,x,_,0,2,T1S), 0 , 129, 0 , 279, 138), // #1310 - INST(Vpexpandq , VexRm_Lx , E(660F38,89,_,x,_,1,3,T1S), 0 , 128, 0 , 279, 138), // #1311 - INST(Vpexpandw , VexRm_Lx , E(660F38,62,_,x,_,1,1,T1S), 0 , 211, 0 , 279, 168), // #1312 - INST(Vpextrb , VexMri , V(660F3A,14,_,0,0,I,0,T1S), 0 , 73 , 0 , 382, 171), // #1313 - INST(Vpextrd , VexMri , V(660F3A,16,_,0,0,0,2,T1S), 0 , 177, 0 , 283, 172), // #1314 - INST(Vpextrq , VexMri , V(660F3A,16,_,0,1,1,3,T1S), 0 , 213, 0 , 383, 172), // #1315 - INST(Vpextrw , VexMri_Vpextrw , V(660F3A,15,_,0,0,I,1,T1S), 0 , 214, 0 , 384, 171), // #1316 - INST(Vpgatherdd , VexRmvRm_VM , V(660F38,90,_,x,0,_,_,_ ), E(660F38,90,_,x,_,0,2,T1S), 96 , 116, 302, 152), // #1317 - INST(Vpgatherdq , VexRmvRm_VM , V(660F38,90,_,x,1,_,_,_ ), E(660F38,90,_,x,_,1,3,T1S), 189, 117, 301, 152), // #1318 - INST(Vpgatherqd , VexRmvRm_VM , V(660F38,91,_,x,0,_,_,_ ), E(660F38,91,_,x,_,0,2,T1S), 96 , 118, 307, 152), // #1319 - INST(Vpgatherqq , VexRmvRm_VM , V(660F38,91,_,x,1,_,_,_ ), E(660F38,91,_,x,_,1,3,T1S), 189, 119, 306, 152), // #1320 - INST(Vphaddbd , VexRm , V(XOP_M9,C2,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1321 - INST(Vphaddbq , VexRm , V(XOP_M9,C3,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1322 - INST(Vphaddbw , VexRm , V(XOP_M9,C1,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1323 - INST(Vphaddd , VexRvm_Lx , V(660F38,02,_,x,I,_,_,_ ), 0 , 96 , 0 , 202, 160), // #1324 - INST(Vphadddq , VexRm , V(XOP_M9,CB,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1325 - INST(Vphaddsw , VexRvm_Lx , V(660F38,03,_,x,I,_,_,_ ), 0 , 96 , 0 , 202, 160), // #1326 - INST(Vphaddubd , VexRm , V(XOP_M9,D2,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1327 - INST(Vphaddubq , VexRm , V(XOP_M9,D3,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1328 - INST(Vphaddubw , VexRm , V(XOP_M9,D1,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1329 - INST(Vphaddudq , VexRm , V(XOP_M9,DB,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1330 - INST(Vphadduwd , VexRm , V(XOP_M9,D6,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1331 - INST(Vphadduwq , VexRm , V(XOP_M9,D7,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1332 - INST(Vphaddw , VexRvm_Lx , V(660F38,01,_,x,I,_,_,_ ), 0 , 96 , 0 , 202, 160), // #1333 - INST(Vphaddwd , VexRm , V(XOP_M9,C6,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1334 - INST(Vphaddwq , VexRm , V(XOP_M9,C7,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1335 - INST(Vphminposuw , VexRm , V(660F38,41,_,0,I,_,_,_ ), 0 , 96 , 0 , 204, 135), // #1336 - INST(Vphsubbw , VexRm , V(XOP_M9,E1,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1337 - INST(Vphsubd , VexRvm_Lx , V(660F38,06,_,x,I,_,_,_ ), 0 , 96 , 0 , 202, 160), // #1338 - INST(Vphsubdq , VexRm , V(XOP_M9,E3,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1339 - INST(Vphsubsw , VexRvm_Lx , V(660F38,07,_,x,I,_,_,_ ), 0 , 96 , 0 , 202, 160), // #1340 - INST(Vphsubw , VexRvm_Lx , V(660F38,05,_,x,I,_,_,_ ), 0 , 96 , 0 , 202, 160), // #1341 - INST(Vphsubwd , VexRm , V(XOP_M9,E2,_,0,0,_,_,_ ), 0 , 79 , 0 , 204, 151), // #1342 - INST(Vpinsrb , VexRvmi , V(660F3A,20,_,0,0,I,0,T1S), 0 , 73 , 0 , 385, 171), // #1343 - INST(Vpinsrd , VexRvmi , V(660F3A,22,_,0,0,0,2,T1S), 0 , 177, 0 , 386, 172), // #1344 - INST(Vpinsrq , VexRvmi , V(660F3A,22,_,0,1,1,3,T1S), 0 , 213, 0 , 387, 172), // #1345 - INST(Vpinsrw , VexRvmi , V(660F00,C4,_,0,0,I,1,T1S), 0 , 215, 0 , 388, 171), // #1346 - INST(Vplzcntd , VexRm_Lx , E(660F38,44,_,x,_,0,4,FV ), 0 , 114, 0 , 374, 165), // #1347 - INST(Vplzcntq , VexRm_Lx , E(660F38,44,_,x,_,1,4,FV ), 0 , 113, 0 , 350, 165), // #1348 - INST(Vpmacsdd , VexRvmr , V(XOP_M8,9E,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1349 - INST(Vpmacsdqh , VexRvmr , V(XOP_M8,9F,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1350 - INST(Vpmacsdql , VexRvmr , V(XOP_M8,97,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1351 - INST(Vpmacssdd , VexRvmr , V(XOP_M8,8E,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1352 - INST(Vpmacssdqh , VexRvmr , V(XOP_M8,8F,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1353 - INST(Vpmacssdql , VexRvmr , V(XOP_M8,87,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1354 - INST(Vpmacsswd , VexRvmr , V(XOP_M8,86,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1355 - INST(Vpmacssww , VexRvmr , V(XOP_M8,85,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1356 - INST(Vpmacswd , VexRvmr , V(XOP_M8,96,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1357 - INST(Vpmacsww , VexRvmr , V(XOP_M8,95,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1358 - INST(Vpmadcsswd , VexRvmr , V(XOP_M8,A6,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1359 - INST(Vpmadcswd , VexRvmr , V(XOP_M8,B6,_,0,0,_,_,_ ), 0 , 208, 0 , 389, 151), // #1360 - INST(Vpmadd52huq , VexRvm_Lx , E(660F38,B5,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 173), // #1361 - INST(Vpmadd52luq , VexRvm_Lx , E(660F38,B4,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 173), // #1362 - INST(Vpmaddubsw , VexRvm_Lx , V(660F38,04,_,x,I,I,4,FVM), 0 , 110, 0 , 315, 163), // #1363 - INST(Vpmaddwd , VexRvm_Lx , V(660F00,F5,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1364 - INST(Vpmaskmovd , VexRvmMvr_Lx , V(660F38,8C,_,x,0,_,_,_ ), V(660F38,8E,_,x,0,_,_,_ ), 96 , 120, 323, 141), // #1365 - INST(Vpmaskmovq , VexRvmMvr_Lx , V(660F38,8C,_,x,1,_,_,_ ), V(660F38,8E,_,x,1,_,_,_ ), 189, 121, 323, 141), // #1366 - INST(Vpmaxsb , VexRvm_Lx , V(660F38,3C,_,x,I,I,4,FVM), 0 , 110, 0 , 390, 163), // #1367 - INST(Vpmaxsd , VexRvm_Lx , V(660F38,3D,_,x,I,0,4,FV ), 0 , 110, 0 , 211, 142), // #1368 - INST(Vpmaxsq , VexRvm_Lx , E(660F38,3D,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1369 - INST(Vpmaxsw , VexRvm_Lx , V(660F00,EE,_,x,I,I,4,FVM), 0 , 144, 0 , 390, 163), // #1370 - INST(Vpmaxub , VexRvm_Lx , V(660F00,DE,_,x,I,I,4,FVM), 0 , 144, 0 , 390, 163), // #1371 - INST(Vpmaxud , VexRvm_Lx , V(660F38,3F,_,x,I,0,4,FV ), 0 , 110, 0 , 211, 142), // #1372 - INST(Vpmaxuq , VexRvm_Lx , E(660F38,3F,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1373 - INST(Vpmaxuw , VexRvm_Lx , V(660F38,3E,_,x,I,I,4,FVM), 0 , 110, 0 , 390, 163), // #1374 - INST(Vpminsb , VexRvm_Lx , V(660F38,38,_,x,I,I,4,FVM), 0 , 110, 0 , 390, 163), // #1375 - INST(Vpminsd , VexRvm_Lx , V(660F38,39,_,x,I,0,4,FV ), 0 , 110, 0 , 211, 142), // #1376 - INST(Vpminsq , VexRvm_Lx , E(660F38,39,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1377 - INST(Vpminsw , VexRvm_Lx , V(660F00,EA,_,x,I,I,4,FVM), 0 , 144, 0 , 390, 163), // #1378 - INST(Vpminub , VexRvm_Lx , V(660F00,DA,_,x,I,_,4,FVM), 0 , 144, 0 , 390, 163), // #1379 - INST(Vpminud , VexRvm_Lx , V(660F38,3B,_,x,I,0,4,FV ), 0 , 110, 0 , 211, 142), // #1380 - INST(Vpminuq , VexRvm_Lx , E(660F38,3B,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1381 - INST(Vpminuw , VexRvm_Lx , V(660F38,3A,_,x,I,_,4,FVM), 0 , 110, 0 , 390, 163), // #1382 - INST(Vpmovb2m , VexRm_Lx , E(F30F38,29,_,x,_,0,_,_ ), 0 , 206, 0 , 391, 146), // #1383 - INST(Vpmovd2m , VexRm_Lx , E(F30F38,39,_,x,_,0,_,_ ), 0 , 206, 0 , 391, 140), // #1384 - INST(Vpmovdb , VexMr_Lx , E(F30F38,31,_,x,_,0,2,QVM), 0 , 216, 0 , 392, 138), // #1385 - INST(Vpmovdw , VexMr_Lx , E(F30F38,33,_,x,_,0,3,HVM), 0 , 217, 0 , 393, 138), // #1386 - INST(Vpmovm2b , VexRm_Lx , E(F30F38,28,_,x,_,0,_,_ ), 0 , 206, 0 , 360, 146), // #1387 - INST(Vpmovm2d , VexRm_Lx , E(F30F38,38,_,x,_,0,_,_ ), 0 , 206, 0 , 360, 140), // #1388 - INST(Vpmovm2q , VexRm_Lx , E(F30F38,38,_,x,_,1,_,_ ), 0 , 205, 0 , 360, 140), // #1389 - INST(Vpmovm2w , VexRm_Lx , E(F30F38,28,_,x,_,1,_,_ ), 0 , 205, 0 , 360, 146), // #1390 - INST(Vpmovmskb , VexRm_Lx , V(660F00,D7,_,x,I,_,_,_ ), 0 , 69 , 0 , 336, 160), // #1391 - INST(Vpmovq2m , VexRm_Lx , E(F30F38,39,_,x,_,1,_,_ ), 0 , 205, 0 , 391, 140), // #1392 - INST(Vpmovqb , VexMr_Lx , E(F30F38,32,_,x,_,0,1,OVM), 0 , 218, 0 , 394, 138), // #1393 - INST(Vpmovqd , VexMr_Lx , E(F30F38,35,_,x,_,0,3,HVM), 0 , 217, 0 , 393, 138), // #1394 - INST(Vpmovqw , VexMr_Lx , E(F30F38,34,_,x,_,0,2,QVM), 0 , 216, 0 , 392, 138), // #1395 - INST(Vpmovsdb , VexMr_Lx , E(F30F38,21,_,x,_,0,2,QVM), 0 , 216, 0 , 392, 138), // #1396 - INST(Vpmovsdw , VexMr_Lx , E(F30F38,23,_,x,_,0,3,HVM), 0 , 217, 0 , 393, 138), // #1397 - INST(Vpmovsqb , VexMr_Lx , E(F30F38,22,_,x,_,0,1,OVM), 0 , 218, 0 , 394, 138), // #1398 - INST(Vpmovsqd , VexMr_Lx , E(F30F38,25,_,x,_,0,3,HVM), 0 , 217, 0 , 393, 138), // #1399 - INST(Vpmovsqw , VexMr_Lx , E(F30F38,24,_,x,_,0,2,QVM), 0 , 216, 0 , 392, 138), // #1400 - INST(Vpmovswb , VexMr_Lx , E(F30F38,20,_,x,_,0,3,HVM), 0 , 217, 0 , 393, 146), // #1401 - INST(Vpmovsxbd , VexRm_Lx , V(660F38,21,_,x,I,I,2,QVM), 0 , 219, 0 , 395, 142), // #1402 - INST(Vpmovsxbq , VexRm_Lx , V(660F38,22,_,x,I,I,1,OVM), 0 , 220, 0 , 396, 142), // #1403 - INST(Vpmovsxbw , VexRm_Lx , V(660F38,20,_,x,I,I,3,HVM), 0 , 139, 0 , 397, 163), // #1404 - INST(Vpmovsxdq , VexRm_Lx , V(660F38,25,_,x,I,0,3,HVM), 0 , 139, 0 , 397, 142), // #1405 - INST(Vpmovsxwd , VexRm_Lx , V(660F38,23,_,x,I,I,3,HVM), 0 , 139, 0 , 397, 142), // #1406 - INST(Vpmovsxwq , VexRm_Lx , V(660F38,24,_,x,I,I,2,QVM), 0 , 219, 0 , 395, 142), // #1407 - INST(Vpmovusdb , VexMr_Lx , E(F30F38,11,_,x,_,0,2,QVM), 0 , 216, 0 , 392, 138), // #1408 - INST(Vpmovusdw , VexMr_Lx , E(F30F38,13,_,x,_,0,3,HVM), 0 , 217, 0 , 393, 138), // #1409 - INST(Vpmovusqb , VexMr_Lx , E(F30F38,12,_,x,_,0,1,OVM), 0 , 218, 0 , 394, 138), // #1410 - INST(Vpmovusqd , VexMr_Lx , E(F30F38,15,_,x,_,0,3,HVM), 0 , 217, 0 , 393, 138), // #1411 - INST(Vpmovusqw , VexMr_Lx , E(F30F38,14,_,x,_,0,2,QVM), 0 , 216, 0 , 392, 138), // #1412 - INST(Vpmovuswb , VexMr_Lx , E(F30F38,10,_,x,_,0,3,HVM), 0 , 217, 0 , 393, 146), // #1413 - INST(Vpmovw2m , VexRm_Lx , E(F30F38,29,_,x,_,1,_,_ ), 0 , 205, 0 , 391, 146), // #1414 - INST(Vpmovwb , VexMr_Lx , E(F30F38,30,_,x,_,0,3,HVM), 0 , 217, 0 , 393, 146), // #1415 - INST(Vpmovzxbd , VexRm_Lx , V(660F38,31,_,x,I,I,2,QVM), 0 , 219, 0 , 395, 142), // #1416 - INST(Vpmovzxbq , VexRm_Lx , V(660F38,32,_,x,I,I,1,OVM), 0 , 220, 0 , 396, 142), // #1417 - INST(Vpmovzxbw , VexRm_Lx , V(660F38,30,_,x,I,I,3,HVM), 0 , 139, 0 , 397, 163), // #1418 - INST(Vpmovzxdq , VexRm_Lx , V(660F38,35,_,x,I,0,3,HVM), 0 , 139, 0 , 397, 142), // #1419 - INST(Vpmovzxwd , VexRm_Lx , V(660F38,33,_,x,I,I,3,HVM), 0 , 139, 0 , 397, 142), // #1420 - INST(Vpmovzxwq , VexRm_Lx , V(660F38,34,_,x,I,I,2,QVM), 0 , 219, 0 , 395, 142), // #1421 - INST(Vpmuldq , VexRvm_Lx , V(660F38,28,_,x,I,1,4,FV ), 0 , 209, 0 , 208, 142), // #1422 - INST(Vpmulhrsw , VexRvm_Lx , V(660F38,0B,_,x,I,I,4,FVM), 0 , 110, 0 , 315, 163), // #1423 - INST(Vpmulhuw , VexRvm_Lx , V(660F00,E4,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1424 - INST(Vpmulhw , VexRvm_Lx , V(660F00,E5,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1425 - INST(Vpmulld , VexRvm_Lx , V(660F38,40,_,x,I,0,4,FV ), 0 , 110, 0 , 209, 142), // #1426 - INST(Vpmullq , VexRvm_Lx , E(660F38,40,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 140), // #1427 - INST(Vpmullw , VexRvm_Lx , V(660F00,D5,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1428 - INST(Vpmultishiftqb , VexRvm_Lx , E(660F38,83,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 170), // #1429 - INST(Vpmuludq , VexRvm_Lx , V(660F00,F4,_,x,I,1,4,FV ), 0 , 103, 0 , 208, 142), // #1430 - INST(Vpopcntb , VexRm_Lx , E(660F38,54,_,x,_,0,4,FV ), 0 , 114, 0 , 279, 174), // #1431 - INST(Vpopcntd , VexRm_Lx , E(660F38,55,_,x,_,0,4,FVM), 0 , 114, 0 , 374, 175), // #1432 - INST(Vpopcntq , VexRm_Lx , E(660F38,55,_,x,_,1,4,FVM), 0 , 113, 0 , 350, 175), // #1433 - INST(Vpopcntw , VexRm_Lx , E(660F38,54,_,x,_,1,4,FV ), 0 , 113, 0 , 279, 174), // #1434 - INST(Vpor , VexRvm_Lx , V(660F00,EB,_,x,I,_,_,_ ), 0 , 69 , 0 , 351, 160), // #1435 - INST(Vpord , VexRvm_Lx , E(660F00,EB,_,x,_,0,4,FV ), 0 , 198, 0 , 352, 138), // #1436 - INST(Vporq , VexRvm_Lx , E(660F00,EB,_,x,_,1,4,FV ), 0 , 135, 0 , 356, 138), // #1437 - INST(Vpperm , VexRvrmRvmr , V(XOP_M8,A3,_,0,x,_,_,_ ), 0 , 208, 0 , 398, 151), // #1438 - INST(Vprold , VexVmi_Lx , E(660F00,72,1,x,_,0,4,FV ), 0 , 221, 0 , 399, 138), // #1439 - INST(Vprolq , VexVmi_Lx , E(660F00,72,1,x,_,1,4,FV ), 0 , 222, 0 , 400, 138), // #1440 - INST(Vprolvd , VexRvm_Lx , E(660F38,15,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 138), // #1441 - INST(Vprolvq , VexRvm_Lx , E(660F38,15,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1442 - INST(Vprord , VexVmi_Lx , E(660F00,72,0,x,_,0,4,FV ), 0 , 198, 0 , 399, 138), // #1443 - INST(Vprorq , VexVmi_Lx , E(660F00,72,0,x,_,1,4,FV ), 0 , 135, 0 , 400, 138), // #1444 - INST(Vprorvd , VexRvm_Lx , E(660F38,14,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 138), // #1445 - INST(Vprorvq , VexRvm_Lx , E(660F38,14,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1446 - INST(Vprotb , VexRvmRmvRmi , V(XOP_M9,90,_,0,x,_,_,_ ), V(XOP_M8,C0,_,0,x,_,_,_ ), 79 , 122, 401, 151), // #1447 - INST(Vprotd , VexRvmRmvRmi , V(XOP_M9,92,_,0,x,_,_,_ ), V(XOP_M8,C2,_,0,x,_,_,_ ), 79 , 123, 401, 151), // #1448 - INST(Vprotq , VexRvmRmvRmi , V(XOP_M9,93,_,0,x,_,_,_ ), V(XOP_M8,C3,_,0,x,_,_,_ ), 79 , 124, 401, 151), // #1449 - INST(Vprotw , VexRvmRmvRmi , V(XOP_M9,91,_,0,x,_,_,_ ), V(XOP_M8,C1,_,0,x,_,_,_ ), 79 , 125, 401, 151), // #1450 - INST(Vpsadbw , VexRvm_Lx , V(660F00,F6,_,x,I,I,4,FVM), 0 , 144, 0 , 203, 163), // #1451 - INST(Vpscatterdd , VexMr_VM , E(660F38,A0,_,x,_,0,2,T1S), 0 , 129, 0 , 402, 138), // #1452 - INST(Vpscatterdq , VexMr_VM , E(660F38,A0,_,x,_,1,3,T1S), 0 , 128, 0 , 403, 138), // #1453 - INST(Vpscatterqd , VexMr_VM , E(660F38,A1,_,x,_,0,2,T1S), 0 , 129, 0 , 404, 138), // #1454 - INST(Vpscatterqq , VexMr_VM , E(660F38,A1,_,x,_,1,3,T1S), 0 , 128, 0 , 405, 138), // #1455 - INST(Vpshab , VexRvmRmv , V(XOP_M9,98,_,0,x,_,_,_ ), 0 , 79 , 0 , 406, 151), // #1456 - INST(Vpshad , VexRvmRmv , V(XOP_M9,9A,_,0,x,_,_,_ ), 0 , 79 , 0 , 406, 151), // #1457 - INST(Vpshaq , VexRvmRmv , V(XOP_M9,9B,_,0,x,_,_,_ ), 0 , 79 , 0 , 406, 151), // #1458 - INST(Vpshaw , VexRvmRmv , V(XOP_M9,99,_,0,x,_,_,_ ), 0 , 79 , 0 , 406, 151), // #1459 - INST(Vpshlb , VexRvmRmv , V(XOP_M9,94,_,0,x,_,_,_ ), 0 , 79 , 0 , 406, 151), // #1460 - INST(Vpshld , VexRvmRmv , V(XOP_M9,96,_,0,x,_,_,_ ), 0 , 79 , 0 , 406, 151), // #1461 - INST(Vpshldd , VexRvmi_Lx , E(660F3A,71,_,x,_,0,4,FV ), 0 , 111, 0 , 206, 168), // #1462 - INST(Vpshldq , VexRvmi_Lx , E(660F3A,71,_,x,_,1,4,FV ), 0 , 112, 0 , 207, 168), // #1463 - INST(Vpshldvd , VexRvm_Lx , E(660F38,71,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 168), // #1464 - INST(Vpshldvq , VexRvm_Lx , E(660F38,71,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 168), // #1465 - INST(Vpshldvw , VexRvm_Lx , E(660F38,70,_,x,_,1,4,FVM), 0 , 113, 0 , 357, 168), // #1466 - INST(Vpshldw , VexRvmi_Lx , E(660F3A,70,_,x,_,1,4,FVM), 0 , 112, 0 , 275, 168), // #1467 - INST(Vpshlq , VexRvmRmv , V(XOP_M9,97,_,0,x,_,_,_ ), 0 , 79 , 0 , 406, 151), // #1468 - INST(Vpshlw , VexRvmRmv , V(XOP_M9,95,_,0,x,_,_,_ ), 0 , 79 , 0 , 406, 151), // #1469 - INST(Vpshrdd , VexRvmi_Lx , E(660F3A,73,_,x,_,0,4,FV ), 0 , 111, 0 , 206, 168), // #1470 - INST(Vpshrdq , VexRvmi_Lx , E(660F3A,73,_,x,_,1,4,FV ), 0 , 112, 0 , 207, 168), // #1471 - INST(Vpshrdvd , VexRvm_Lx , E(660F38,73,_,x,_,0,4,FV ), 0 , 114, 0 , 213, 168), // #1472 - INST(Vpshrdvq , VexRvm_Lx , E(660F38,73,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 168), // #1473 - INST(Vpshrdvw , VexRvm_Lx , E(660F38,72,_,x,_,1,4,FVM), 0 , 113, 0 , 357, 168), // #1474 - INST(Vpshrdw , VexRvmi_Lx , E(660F3A,72,_,x,_,1,4,FVM), 0 , 112, 0 , 275, 168), // #1475 - INST(Vpshufb , VexRvm_Lx , V(660F38,00,_,x,I,I,4,FVM), 0 , 110, 0 , 315, 163), // #1476 - INST(Vpshufbitqmb , VexRvm_Lx , E(660F38,8F,_,x,0,0,4,FVM), 0 , 114, 0 , 407, 174), // #1477 - INST(Vpshufd , VexRmi_Lx , V(660F00,70,_,x,I,0,4,FV ), 0 , 144, 0 , 408, 142), // #1478 - INST(Vpshufhw , VexRmi_Lx , V(F30F00,70,_,x,I,I,4,FVM), 0 , 161, 0 , 409, 163), // #1479 - INST(Vpshuflw , VexRmi_Lx , V(F20F00,70,_,x,I,I,4,FVM), 0 , 223, 0 , 409, 163), // #1480 - INST(Vpsignb , VexRvm_Lx , V(660F38,08,_,x,I,_,_,_ ), 0 , 96 , 0 , 202, 160), // #1481 - INST(Vpsignd , VexRvm_Lx , V(660F38,0A,_,x,I,_,_,_ ), 0 , 96 , 0 , 202, 160), // #1482 - INST(Vpsignw , VexRvm_Lx , V(660F38,09,_,x,I,_,_,_ ), 0 , 96 , 0 , 202, 160), // #1483 - INST(Vpslld , VexRvmVmi_Lx_MEvex , V(660F00,F2,_,x,I,0,4,128), V(660F00,72,6,x,I,0,4,FV ), 224, 126, 410, 142), // #1484 - INST(Vpslldq , VexVmi_Lx_MEvex , V(660F00,73,7,x,I,I,4,FVM), 0 , 225, 0 , 411, 163), // #1485 - INST(Vpsllq , VexRvmVmi_Lx_MEvex , V(660F00,F3,_,x,I,1,4,128), V(660F00,73,6,x,I,1,4,FV ), 226, 127, 412, 142), // #1486 - INST(Vpsllvd , VexRvm_Lx , V(660F38,47,_,x,0,0,4,FV ), 0 , 110, 0 , 209, 152), // #1487 - INST(Vpsllvq , VexRvm_Lx , V(660F38,47,_,x,1,1,4,FV ), 0 , 182, 0 , 208, 152), // #1488 - INST(Vpsllvw , VexRvm_Lx , E(660F38,12,_,x,_,1,4,FVM), 0 , 113, 0 , 357, 146), // #1489 - INST(Vpsllw , VexRvmVmi_Lx_MEvex , V(660F00,F1,_,x,I,I,4,128), V(660F00,71,6,x,I,I,4,FVM), 224, 128, 413, 163), // #1490 - INST(Vpsrad , VexRvmVmi_Lx_MEvex , V(660F00,E2,_,x,I,0,4,128), V(660F00,72,4,x,I,0,4,FV ), 224, 129, 410, 142), // #1491 - INST(Vpsraq , VexRvmVmi_Lx_MEvex , E(660F00,E2,_,x,_,1,4,128), E(660F00,72,4,x,_,1,4,FV ), 227, 130, 414, 138), // #1492 - INST(Vpsravd , VexRvm_Lx , V(660F38,46,_,x,0,0,4,FV ), 0 , 110, 0 , 209, 152), // #1493 - INST(Vpsravq , VexRvm_Lx , E(660F38,46,_,x,_,1,4,FV ), 0 , 113, 0 , 212, 138), // #1494 - INST(Vpsravw , VexRvm_Lx , E(660F38,11,_,x,_,1,4,FVM), 0 , 113, 0 , 357, 146), // #1495 - INST(Vpsraw , VexRvmVmi_Lx_MEvex , V(660F00,E1,_,x,I,I,4,128), V(660F00,71,4,x,I,I,4,FVM), 224, 131, 413, 163), // #1496 - INST(Vpsrld , VexRvmVmi_Lx_MEvex , V(660F00,D2,_,x,I,0,4,128), V(660F00,72,2,x,I,0,4,FV ), 224, 132, 410, 142), // #1497 - INST(Vpsrldq , VexVmi_Lx_MEvex , V(660F00,73,3,x,I,I,4,FVM), 0 , 228, 0 , 411, 163), // #1498 - INST(Vpsrlq , VexRvmVmi_Lx_MEvex , V(660F00,D3,_,x,I,1,4,128), V(660F00,73,2,x,I,1,4,FV ), 226, 133, 412, 142), // #1499 - INST(Vpsrlvd , VexRvm_Lx , V(660F38,45,_,x,0,0,4,FV ), 0 , 110, 0 , 209, 152), // #1500 - INST(Vpsrlvq , VexRvm_Lx , V(660F38,45,_,x,1,1,4,FV ), 0 , 182, 0 , 208, 152), // #1501 - INST(Vpsrlvw , VexRvm_Lx , E(660F38,10,_,x,_,1,4,FVM), 0 , 113, 0 , 357, 146), // #1502 - INST(Vpsrlw , VexRvmVmi_Lx_MEvex , V(660F00,D1,_,x,I,I,4,128), V(660F00,71,2,x,I,I,4,FVM), 224, 134, 413, 163), // #1503 - INST(Vpsubb , VexRvm_Lx , V(660F00,F8,_,x,I,I,4,FVM), 0 , 144, 0 , 415, 163), // #1504 - INST(Vpsubd , VexRvm_Lx , V(660F00,FA,_,x,I,0,4,FV ), 0 , 144, 0 , 416, 142), // #1505 - INST(Vpsubq , VexRvm_Lx , V(660F00,FB,_,x,I,1,4,FV ), 0 , 103, 0 , 417, 142), // #1506 - INST(Vpsubsb , VexRvm_Lx , V(660F00,E8,_,x,I,I,4,FVM), 0 , 144, 0 , 415, 163), // #1507 - INST(Vpsubsw , VexRvm_Lx , V(660F00,E9,_,x,I,I,4,FVM), 0 , 144, 0 , 415, 163), // #1508 - INST(Vpsubusb , VexRvm_Lx , V(660F00,D8,_,x,I,I,4,FVM), 0 , 144, 0 , 415, 163), // #1509 - INST(Vpsubusw , VexRvm_Lx , V(660F00,D9,_,x,I,I,4,FVM), 0 , 144, 0 , 415, 163), // #1510 - INST(Vpsubw , VexRvm_Lx , V(660F00,F9,_,x,I,I,4,FVM), 0 , 144, 0 , 415, 163), // #1511 - INST(Vpternlogd , VexRvmi_Lx , E(660F3A,25,_,x,_,0,4,FV ), 0 , 111, 0 , 206, 138), // #1512 - INST(Vpternlogq , VexRvmi_Lx , E(660F3A,25,_,x,_,1,4,FV ), 0 , 112, 0 , 207, 138), // #1513 - INST(Vptest , VexRm_Lx , V(660F38,17,_,x,I,_,_,_ ), 0 , 96 , 0 , 298, 167), // #1514 - INST(Vptestmb , VexRvm_Lx , E(660F38,26,_,x,_,0,4,FVM), 0 , 114, 0 , 407, 146), // #1515 - INST(Vptestmd , VexRvm_Lx , E(660F38,27,_,x,_,0,4,FV ), 0 , 114, 0 , 418, 138), // #1516 - INST(Vptestmq , VexRvm_Lx , E(660F38,27,_,x,_,1,4,FV ), 0 , 113, 0 , 419, 138), // #1517 - INST(Vptestmw , VexRvm_Lx , E(660F38,26,_,x,_,1,4,FVM), 0 , 113, 0 , 407, 146), // #1518 - INST(Vptestnmb , VexRvm_Lx , E(F30F38,26,_,x,_,0,4,FVM), 0 , 132, 0 , 407, 146), // #1519 - INST(Vptestnmd , VexRvm_Lx , E(F30F38,27,_,x,_,0,4,FV ), 0 , 132, 0 , 418, 138), // #1520 - INST(Vptestnmq , VexRvm_Lx , E(F30F38,27,_,x,_,1,4,FV ), 0 , 229, 0 , 419, 138), // #1521 - INST(Vptestnmw , VexRvm_Lx , E(F30F38,26,_,x,_,1,4,FVM), 0 , 229, 0 , 407, 146), // #1522 - INST(Vpunpckhbw , VexRvm_Lx , V(660F00,68,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1523 - INST(Vpunpckhdq , VexRvm_Lx , V(660F00,6A,_,x,I,0,4,FV ), 0 , 144, 0 , 209, 142), // #1524 - INST(Vpunpckhqdq , VexRvm_Lx , V(660F00,6D,_,x,I,1,4,FV ), 0 , 103, 0 , 208, 142), // #1525 - INST(Vpunpckhwd , VexRvm_Lx , V(660F00,69,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1526 - INST(Vpunpcklbw , VexRvm_Lx , V(660F00,60,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1527 - INST(Vpunpckldq , VexRvm_Lx , V(660F00,62,_,x,I,0,4,FV ), 0 , 144, 0 , 209, 142), // #1528 - INST(Vpunpcklqdq , VexRvm_Lx , V(660F00,6C,_,x,I,1,4,FV ), 0 , 103, 0 , 208, 142), // #1529 - INST(Vpunpcklwd , VexRvm_Lx , V(660F00,61,_,x,I,I,4,FVM), 0 , 144, 0 , 315, 163), // #1530 - INST(Vpxor , VexRvm_Lx , V(660F00,EF,_,x,I,_,_,_ ), 0 , 69 , 0 , 353, 160), // #1531 - INST(Vpxord , VexRvm_Lx , E(660F00,EF,_,x,_,0,4,FV ), 0 , 198, 0 , 354, 138), // #1532 - INST(Vpxorq , VexRvm_Lx , E(660F00,EF,_,x,_,1,4,FV ), 0 , 135, 0 , 355, 138), // #1533 - INST(Vrangepd , VexRvmi_Lx , E(660F3A,50,_,x,_,1,4,FV ), 0 , 112, 0 , 285, 140), // #1534 - INST(Vrangeps , VexRvmi_Lx , E(660F3A,50,_,x,_,0,4,FV ), 0 , 111, 0 , 286, 140), // #1535 - INST(Vrangesd , VexRvmi , E(660F3A,51,_,I,_,1,3,T1S), 0 , 180, 0 , 287, 66 ), // #1536 - INST(Vrangess , VexRvmi , E(660F3A,51,_,I,_,0,2,T1S), 0 , 181, 0 , 288, 66 ), // #1537 - INST(Vrcp14pd , VexRm_Lx , E(660F38,4C,_,x,_,1,4,FV ), 0 , 113, 0 , 350, 138), // #1538 - INST(Vrcp14ps , VexRm_Lx , E(660F38,4C,_,x,_,0,4,FV ), 0 , 114, 0 , 374, 138), // #1539 - INST(Vrcp14sd , VexRvm , E(660F38,4D,_,I,_,1,3,T1S), 0 , 128, 0 , 420, 68 ), // #1540 - INST(Vrcp14ss , VexRvm , E(660F38,4D,_,I,_,0,2,T1S), 0 , 129, 0 , 421, 68 ), // #1541 - INST(Vrcp28pd , VexRm , E(660F38,CA,_,2,_,1,4,FV ), 0 , 170, 0 , 277, 147), // #1542 - INST(Vrcp28ps , VexRm , E(660F38,CA,_,2,_,0,4,FV ), 0 , 171, 0 , 278, 147), // #1543 - INST(Vrcp28sd , VexRvm , E(660F38,CB,_,I,_,1,3,T1S), 0 , 128, 0 , 308, 147), // #1544 - INST(Vrcp28ss , VexRvm , E(660F38,CB,_,I,_,0,2,T1S), 0 , 129, 0 , 309, 147), // #1545 - INST(Vrcpph , VexRm_Lx , E(66MAP6,4C,_,_,_,0,4,FV ), 0 , 183, 0 , 422, 134), // #1546 - INST(Vrcpps , VexRm_Lx , V(000F00,53,_,x,I,_,_,_ ), 0 , 72 , 0 , 298, 135), // #1547 - INST(Vrcpsh , VexRvm , E(66MAP6,4D,_,_,_,0,1,T1S), 0 , 185, 0 , 423, 134), // #1548 - INST(Vrcpss , VexRvm , V(F30F00,53,_,I,I,_,_,_ ), 0 , 199, 0 , 424, 135), // #1549 - INST(Vreducepd , VexRmi_Lx , E(660F3A,56,_,x,_,1,4,FV ), 0 , 112, 0 , 400, 140), // #1550 - INST(Vreduceph , VexRmi_Lx , E(000F3A,56,_,_,_,0,4,FV ), 0 , 123, 0 , 311, 132), // #1551 - INST(Vreduceps , VexRmi_Lx , E(660F3A,56,_,x,_,0,4,FV ), 0 , 111, 0 , 399, 140), // #1552 - INST(Vreducesd , VexRvmi , E(660F3A,57,_,I,_,1,3,T1S), 0 , 180, 0 , 425, 66 ), // #1553 - INST(Vreducesh , VexRvmi , E(000F3A,57,_,_,_,0,1,T1S), 0 , 188, 0 , 313, 134), // #1554 - INST(Vreducess , VexRvmi , E(660F3A,57,_,I,_,0,2,T1S), 0 , 181, 0 , 426, 66 ), // #1555 - INST(Vrndscalepd , VexRmi_Lx , E(660F3A,09,_,x,_,1,4,FV ), 0 , 112, 0 , 310, 138), // #1556 - INST(Vrndscaleph , VexRmi_Lx , E(000F3A,08,_,_,_,0,4,FV ), 0 , 123, 0 , 311, 132), // #1557 - INST(Vrndscaleps , VexRmi_Lx , E(660F3A,08,_,x,_,0,4,FV ), 0 , 111, 0 , 312, 138), // #1558 - INST(Vrndscalesd , VexRvmi , E(660F3A,0B,_,I,_,1,3,T1S), 0 , 180, 0 , 287, 68 ), // #1559 - INST(Vrndscalesh , VexRvmi , E(000F3A,0A,_,_,_,0,1,T1S), 0 , 188, 0 , 313, 134), // #1560 - INST(Vrndscaless , VexRvmi , E(660F3A,0A,_,I,_,0,2,T1S), 0 , 181, 0 , 288, 68 ), // #1561 - INST(Vroundpd , VexRmi_Lx , V(660F3A,09,_,x,I,_,_,_ ), 0 , 73 , 0 , 427, 135), // #1562 - INST(Vroundps , VexRmi_Lx , V(660F3A,08,_,x,I,_,_,_ ), 0 , 73 , 0 , 427, 135), // #1563 - INST(Vroundsd , VexRvmi , V(660F3A,0B,_,I,I,_,_,_ ), 0 , 73 , 0 , 428, 135), // #1564 - INST(Vroundss , VexRvmi , V(660F3A,0A,_,I,I,_,_,_ ), 0 , 73 , 0 , 429, 135), // #1565 - INST(Vrsqrt14pd , VexRm_Lx , E(660F38,4E,_,x,_,1,4,FV ), 0 , 113, 0 , 350, 138), // #1566 - INST(Vrsqrt14ps , VexRm_Lx , E(660F38,4E,_,x,_,0,4,FV ), 0 , 114, 0 , 374, 138), // #1567 - INST(Vrsqrt14sd , VexRvm , E(660F38,4F,_,I,_,1,3,T1S), 0 , 128, 0 , 420, 68 ), // #1568 - INST(Vrsqrt14ss , VexRvm , E(660F38,4F,_,I,_,0,2,T1S), 0 , 129, 0 , 421, 68 ), // #1569 - INST(Vrsqrt28pd , VexRm , E(660F38,CC,_,2,_,1,4,FV ), 0 , 170, 0 , 277, 147), // #1570 - INST(Vrsqrt28ps , VexRm , E(660F38,CC,_,2,_,0,4,FV ), 0 , 171, 0 , 278, 147), // #1571 - INST(Vrsqrt28sd , VexRvm , E(660F38,CD,_,I,_,1,3,T1S), 0 , 128, 0 , 308, 147), // #1572 - INST(Vrsqrt28ss , VexRvm , E(660F38,CD,_,I,_,0,2,T1S), 0 , 129, 0 , 309, 147), // #1573 - INST(Vrsqrtph , VexRm_Lx , E(66MAP6,4E,_,_,_,0,4,FV ), 0 , 183, 0 , 422, 132), // #1574 - INST(Vrsqrtps , VexRm_Lx , V(000F00,52,_,x,I,_,_,_ ), 0 , 72 , 0 , 298, 135), // #1575 - INST(Vrsqrtsh , VexRvm , E(66MAP6,4F,_,_,_,0,1,T1S), 0 , 185, 0 , 423, 134), // #1576 - INST(Vrsqrtss , VexRvm , V(F30F00,52,_,I,I,_,_,_ ), 0 , 199, 0 , 424, 135), // #1577 - INST(Vscalefpd , VexRvm_Lx , E(660F38,2C,_,x,_,1,4,FV ), 0 , 113, 0 , 430, 138), // #1578 - INST(Vscalefph , VexRvm_Lx , E(66MAP6,2C,_,_,_,0,4,FV ), 0 , 183, 0 , 197, 132), // #1579 - INST(Vscalefps , VexRvm_Lx , E(660F38,2C,_,x,_,0,4,FV ), 0 , 114, 0 , 284, 138), // #1580 - INST(Vscalefsd , VexRvm , E(660F38,2D,_,I,_,1,3,T1S), 0 , 128, 0 , 251, 68 ), // #1581 - INST(Vscalefsh , VexRvm , E(66MAP6,2D,_,_,_,0,1,T1S), 0 , 185, 0 , 200, 134), // #1582 - INST(Vscalefss , VexRvm , E(660F38,2D,_,I,_,0,2,T1S), 0 , 129, 0 , 259, 68 ), // #1583 - INST(Vscatterdpd , VexMr_VM , E(660F38,A2,_,x,_,1,3,T1S), 0 , 128, 0 , 403, 138), // #1584 - INST(Vscatterdps , VexMr_VM , E(660F38,A2,_,x,_,0,2,T1S), 0 , 129, 0 , 402, 138), // #1585 - INST(Vscatterpf0dpd , VexM_VM , E(660F38,C6,5,2,_,1,3,T1S), 0 , 230, 0 , 303, 153), // #1586 - INST(Vscatterpf0dps , VexM_VM , E(660F38,C6,5,2,_,0,2,T1S), 0 , 231, 0 , 304, 153), // #1587 - INST(Vscatterpf0qpd , VexM_VM , E(660F38,C7,5,2,_,1,3,T1S), 0 , 230, 0 , 305, 153), // #1588 - INST(Vscatterpf0qps , VexM_VM , E(660F38,C7,5,2,_,0,2,T1S), 0 , 231, 0 , 305, 153), // #1589 - INST(Vscatterpf1dpd , VexM_VM , E(660F38,C6,6,2,_,1,3,T1S), 0 , 232, 0 , 303, 153), // #1590 - INST(Vscatterpf1dps , VexM_VM , E(660F38,C6,6,2,_,0,2,T1S), 0 , 233, 0 , 304, 153), // #1591 - INST(Vscatterpf1qpd , VexM_VM , E(660F38,C7,6,2,_,1,3,T1S), 0 , 232, 0 , 305, 153), // #1592 - INST(Vscatterpf1qps , VexM_VM , E(660F38,C7,6,2,_,0,2,T1S), 0 , 233, 0 , 305, 153), // #1593 - INST(Vscatterqpd , VexMr_VM , E(660F38,A3,_,x,_,1,3,T1S), 0 , 128, 0 , 405, 138), // #1594 - INST(Vscatterqps , VexMr_VM , E(660F38,A3,_,x,_,0,2,T1S), 0 , 129, 0 , 404, 138), // #1595 - INST(Vshuff32x4 , VexRvmi_Lx , E(660F3A,23,_,x,_,0,4,FV ), 0 , 111, 0 , 431, 138), // #1596 - INST(Vshuff64x2 , VexRvmi_Lx , E(660F3A,23,_,x,_,1,4,FV ), 0 , 112, 0 , 432, 138), // #1597 - INST(Vshufi32x4 , VexRvmi_Lx , E(660F3A,43,_,x,_,0,4,FV ), 0 , 111, 0 , 431, 138), // #1598 - INST(Vshufi64x2 , VexRvmi_Lx , E(660F3A,43,_,x,_,1,4,FV ), 0 , 112, 0 , 432, 138), // #1599 - INST(Vshufpd , VexRvmi_Lx , V(660F00,C6,_,x,I,1,4,FV ), 0 , 103, 0 , 433, 131), // #1600 - INST(Vshufps , VexRvmi_Lx , V(000F00,C6,_,x,I,0,4,FV ), 0 , 105, 0 , 434, 131), // #1601 - INST(Vsqrtpd , VexRm_Lx , V(660F00,51,_,x,I,1,4,FV ), 0 , 103, 0 , 435, 131), // #1602 - INST(Vsqrtph , VexRm_Lx , E(00MAP5,51,_,_,_,0,4,FV ), 0 , 104, 0 , 246, 132), // #1603 - INST(Vsqrtps , VexRm_Lx , V(000F00,51,_,x,I,0,4,FV ), 0 , 105, 0 , 235, 131), // #1604 - INST(Vsqrtsd , VexRvm , V(F20F00,51,_,I,I,1,3,T1S), 0 , 106, 0 , 199, 133), // #1605 - INST(Vsqrtsh , VexRvm , E(F3MAP5,51,_,_,_,0,1,T1S), 0 , 107, 0 , 200, 134), // #1606 - INST(Vsqrtss , VexRvm , V(F30F00,51,_,I,I,0,2,T1S), 0 , 108, 0 , 201, 133), // #1607 - INST(Vstmxcsr , VexM , V(000F00,AE,3,0,I,_,_,_ ), 0 , 234, 0 , 321, 135), // #1608 - INST(Vsubpd , VexRvm_Lx , V(660F00,5C,_,x,I,1,4,FV ), 0 , 103, 0 , 196, 131), // #1609 - INST(Vsubph , VexRvm_Lx , E(00MAP5,5C,_,_,_,0,4,FV ), 0 , 104, 0 , 197, 132), // #1610 - INST(Vsubps , VexRvm_Lx , V(000F00,5C,_,x,I,0,4,FV ), 0 , 105, 0 , 198, 131), // #1611 - INST(Vsubsd , VexRvm , V(F20F00,5C,_,I,I,1,3,T1S), 0 , 106, 0 , 199, 133), // #1612 - INST(Vsubsh , VexRvm , E(F3MAP5,5C,_,_,_,0,1,T1S), 0 , 107, 0 , 200, 134), // #1613 - INST(Vsubss , VexRvm , V(F30F00,5C,_,I,I,0,2,T1S), 0 , 108, 0 , 201, 133), // #1614 - INST(Vtestpd , VexRm_Lx , V(660F38,0F,_,x,0,_,_,_ ), 0 , 96 , 0 , 298, 167), // #1615 - INST(Vtestps , VexRm_Lx , V(660F38,0E,_,x,0,_,_,_ ), 0 , 96 , 0 , 298, 167), // #1616 - INST(Vucomisd , VexRm , V(660F00,2E,_,I,I,1,3,T1S), 0 , 125, 0 , 229, 143), // #1617 - INST(Vucomish , VexRm , E(00MAP5,2E,_,_,_,0,1,T1S), 0 , 126, 0 , 230, 134), // #1618 - INST(Vucomiss , VexRm , V(000F00,2E,_,I,I,0,2,T1S), 0 , 127, 0 , 231, 143), // #1619 - INST(Vunpckhpd , VexRvm_Lx , V(660F00,15,_,x,I,1,4,FV ), 0 , 103, 0 , 208, 131), // #1620 - INST(Vunpckhps , VexRvm_Lx , V(000F00,15,_,x,I,0,4,FV ), 0 , 105, 0 , 209, 131), // #1621 - INST(Vunpcklpd , VexRvm_Lx , V(660F00,14,_,x,I,1,4,FV ), 0 , 103, 0 , 208, 131), // #1622 - INST(Vunpcklps , VexRvm_Lx , V(000F00,14,_,x,I,0,4,FV ), 0 , 105, 0 , 209, 131), // #1623 - INST(Vxorpd , VexRvm_Lx , V(660F00,57,_,x,I,1,4,FV ), 0 , 103, 0 , 417, 139), // #1624 - INST(Vxorps , VexRvm_Lx , V(000F00,57,_,x,I,0,4,FV ), 0 , 105, 0 , 416, 139), // #1625 - INST(Vzeroall , VexOp , V(000F00,77,_,1,I,_,_,_ ), 0 , 68 , 0 , 436, 135), // #1626 - INST(Vzeroupper , VexOp , V(000F00,77,_,0,I,_,_,_ ), 0 , 72 , 0 , 436, 135), // #1627 - INST(Wbinvd , X86Op , O(000F00,09,_,_,_,_,_,_ ), 0 , 4 , 0 , 30 , 0 ), // #1628 - INST(Wbnoinvd , X86Op , O(F30F00,09,_,_,_,_,_,_ ), 0 , 6 , 0 , 30 , 176), // #1629 - INST(Wrfsbase , X86M , O(F30F00,AE,2,_,x,_,_,_ ), 0 , 235, 0 , 173, 111), // #1630 - INST(Wrgsbase , X86M , O(F30F00,AE,3,_,x,_,_,_ ), 0 , 236, 0 , 173, 111), // #1631 - INST(Wrmsr , X86Op , O(000F00,30,_,_,_,_,_,_ ), 0 , 4 , 0 , 174, 112), // #1632 - INST(Wrssd , X86Mr , O(000F38,F6,_,_,_,_,_,_ ), 0 , 83 , 0 , 437, 56 ), // #1633 - INST(Wrssq , X86Mr , O(000F38,F6,_,_,1,_,_,_ ), 0 , 237, 0 , 438, 56 ), // #1634 - INST(Wrussd , X86Mr , O(660F38,F5,_,_,_,_,_,_ ), 0 , 2 , 0 , 437, 56 ), // #1635 - INST(Wrussq , X86Mr , O(660F38,F5,_,_,1,_,_,_ ), 0 , 238, 0 , 438, 56 ), // #1636 - INST(Xabort , X86Op_Mod11RM_I8 , O(000000,C6,7,_,_,_,_,_ ), 0 , 27 , 0 , 80 , 177), // #1637 - INST(Xadd , X86Xadd , O(000F00,C0,_,_,x,_,_,_ ), 0 , 4 , 0 , 439, 38 ), // #1638 - INST(Xbegin , X86JmpRel , O(000000,C7,7,_,_,_,_,_ ), 0 , 27 , 0 , 440, 177), // #1639 - INST(Xchg , X86Xchg , O(000000,86,_,_,x,_,_,_ ), 0 , 0 , 0 , 441, 0 ), // #1640 - INST(Xend , X86Op , O(000F01,D5,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 177), // #1641 - INST(Xgetbv , X86Op , O(000F01,D0,_,_,_,_,_,_ ), 0 , 21 , 0 , 174, 178), // #1642 - INST(Xlatb , X86Op , O(000000,D7,_,_,_,_,_,_ ), 0 , 0 , 0 , 30 , 0 ), // #1643 - INST(Xor , X86Arith , O(000000,30,6,_,x,_,_,_ ), 0 , 32 , 0 , 179, 1 ), // #1644 - INST(Xorpd , ExtRm , O(660F00,57,_,_,_,_,_,_ ), 0 , 3 , 0 , 151, 4 ), // #1645 - INST(Xorps , ExtRm , O(000F00,57,_,_,_,_,_,_ ), 0 , 4 , 0 , 151, 5 ), // #1646 - INST(Xresldtrk , X86Op , O(F20F01,E9,_,_,_,_,_,_ ), 0 , 92 , 0 , 30 , 179), // #1647 - INST(Xrstor , X86M_Only_EDX_EAX , O(000F00,AE,5,_,_,_,_,_ ), 0 , 77 , 0 , 442, 178), // #1648 - INST(Xrstor64 , X86M_Only_EDX_EAX , O(000F00,AE,5,_,1,_,_,_ ), 0 , 239, 0 , 443, 178), // #1649 - INST(Xrstors , X86M_Only_EDX_EAX , O(000F00,C7,3,_,_,_,_,_ ), 0 , 78 , 0 , 442, 180), // #1650 - INST(Xrstors64 , X86M_Only_EDX_EAX , O(000F00,C7,3,_,1,_,_,_ ), 0 , 240, 0 , 443, 180), // #1651 - INST(Xsave , X86M_Only_EDX_EAX , O(000F00,AE,4,_,_,_,_,_ ), 0 , 97 , 0 , 442, 178), // #1652 - INST(Xsave64 , X86M_Only_EDX_EAX , O(000F00,AE,4,_,1,_,_,_ ), 0 , 241, 0 , 443, 178), // #1653 - INST(Xsavec , X86M_Only_EDX_EAX , O(000F00,C7,4,_,_,_,_,_ ), 0 , 97 , 0 , 442, 181), // #1654 - INST(Xsavec64 , X86M_Only_EDX_EAX , O(000F00,C7,4,_,1,_,_,_ ), 0 , 241, 0 , 443, 181), // #1655 - INST(Xsaveopt , X86M_Only_EDX_EAX , O(000F00,AE,6,_,_,_,_,_ ), 0 , 80 , 0 , 442, 182), // #1656 - INST(Xsaveopt64 , X86M_Only_EDX_EAX , O(000F00,AE,6,_,1,_,_,_ ), 0 , 242, 0 , 443, 182), // #1657 - INST(Xsaves , X86M_Only_EDX_EAX , O(000F00,C7,5,_,_,_,_,_ ), 0 , 77 , 0 , 442, 180), // #1658 - INST(Xsaves64 , X86M_Only_EDX_EAX , O(000F00,C7,5,_,1,_,_,_ ), 0 , 239, 0 , 443, 180), // #1659 - INST(Xsetbv , X86Op , O(000F01,D1,_,_,_,_,_,_ ), 0 , 21 , 0 , 174, 178), // #1660 - INST(Xsusldtrk , X86Op , O(F20F01,E8,_,_,_,_,_,_ ), 0 , 92 , 0 , 30 , 179), // #1661 - INST(Xtest , X86Op , O(000F01,D6,_,_,_,_,_,_ ), 0 , 21 , 0 , 30 , 183) // #1662 + INST(Aadd , X86Mr , O(000F38,FC,_,_,_,_,_,_ ), 0 , 1 , 0 , 3 , 2 ), // #3 + INST(Aam , X86I_xAX , O(000000,D4,_,_,_,_,_,_ ), 0 , 0 , 0 , 2 , 1 ), // #4 + INST(Aand , X86Mr , O(660F38,FC,_,_,_,_,_,_ ), 0 , 2 , 0 , 3 , 2 ), // #5 + INST(Aas , X86Op_xAX , O(000000,3F,_,_,_,_,_,_ ), 0 , 0 , 0 , 1 , 1 ), // #6 + INST(Adc , X86Arith , O(000000,10,2,_,x,_,_,_ ), 0 , 3 , 0 , 4 , 3 ), // #7 + INST(Adcx , X86Rm , O(660F38,F6,_,_,x,_,_,_ ), 0 , 2 , 0 , 5 , 4 ), // #8 + INST(Add , X86Arith , O(000000,00,0,_,x,_,_,_ ), 0 , 0 , 0 , 4 , 1 ), // #9 + INST(Addpd , ExtRm , O(660F00,58,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #10 + INST(Addps , ExtRm , O(000F00,58,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #11 + INST(Addsd , ExtRm , O(F20F00,58,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #12 + INST(Addss , ExtRm , O(F30F00,58,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 6 ), // #13 + INST(Addsubpd , ExtRm , O(660F00,D0,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 7 ), // #14 + INST(Addsubps , ExtRm , O(F20F00,D0,_,_,_,_,_,_ ), 0 , 6 , 0 , 6 , 7 ), // #15 + INST(Adox , X86Rm , O(F30F38,F6,_,_,x,_,_,_ ), 0 , 8 , 0 , 5 , 8 ), // #16 + INST(Aesdec , ExtRm , O(660F38,DE,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 9 ), // #17 + INST(Aesdeclast , ExtRm , O(660F38,DF,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 9 ), // #18 + INST(Aesenc , ExtRm , O(660F38,DC,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 9 ), // #19 + INST(Aesenclast , ExtRm , O(660F38,DD,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 9 ), // #20 + INST(Aesimc , ExtRm , O(660F38,DB,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 9 ), // #21 + INST(Aeskeygenassist , ExtRmi , O(660F3A,DF,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 9 ), // #22 + INST(And , X86Arith , O(000000,20,4,_,x,_,_,_ ), 0 , 10 , 0 , 10 , 1 ), // #23 + INST(Andn , VexRvm_Wx , V(000F38,F2,_,0,x,_,_,_ ), 0 , 11 , 0 , 11 , 10 ), // #24 + INST(Andnpd , ExtRm , O(660F00,55,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #25 + INST(Andnps , ExtRm , O(000F00,55,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #26 + INST(Andpd , ExtRm , O(660F00,54,_,_,_,_,_,_ ), 0 , 4 , 0 , 12 , 5 ), // #27 + INST(Andps , ExtRm , O(000F00,54,_,_,_,_,_,_ ), 0 , 5 , 0 , 12 , 6 ), // #28 + INST(Aor , X86Mr , O(F20F38,FC,_,_,_,_,_,_ ), 0 , 12 , 0 , 3 , 2 ), // #29 + INST(Arpl , X86Mr_NoSize , O(000000,63,_,_,_,_,_,_ ), 0 , 0 , 0 , 13 , 11 ), // #30 + INST(Axor , X86Mr , O(F30F38,FC,_,_,_,_,_,_ ), 0 , 8 , 0 , 3 , 2 ), // #31 + INST(Bextr , VexRmv_Wx , V(000F38,F7,_,0,x,_,_,_ ), 0 , 11 , 0 , 14 , 10 ), // #32 + INST(Blcfill , VexVm_Wx , V(XOP_M9,01,1,0,x,_,_,_ ), 0 , 13 , 0 , 15 , 12 ), // #33 + INST(Blci , VexVm_Wx , V(XOP_M9,02,6,0,x,_,_,_ ), 0 , 14 , 0 , 15 , 12 ), // #34 + INST(Blcic , VexVm_Wx , V(XOP_M9,01,5,0,x,_,_,_ ), 0 , 15 , 0 , 15 , 12 ), // #35 + INST(Blcmsk , VexVm_Wx , V(XOP_M9,02,1,0,x,_,_,_ ), 0 , 13 , 0 , 15 , 12 ), // #36 + INST(Blcs , VexVm_Wx , V(XOP_M9,01,3,0,x,_,_,_ ), 0 , 16 , 0 , 15 , 12 ), // #37 + INST(Blendpd , ExtRmi , O(660F3A,0D,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 13 ), // #38 + INST(Blendps , ExtRmi , O(660F3A,0C,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 13 ), // #39 + INST(Blendvpd , ExtRm_XMM0 , O(660F38,15,_,_,_,_,_,_ ), 0 , 2 , 0 , 16 , 13 ), // #40 + INST(Blendvps , ExtRm_XMM0 , O(660F38,14,_,_,_,_,_,_ ), 0 , 2 , 0 , 16 , 13 ), // #41 + INST(Blsfill , VexVm_Wx , V(XOP_M9,01,2,0,x,_,_,_ ), 0 , 17 , 0 , 15 , 12 ), // #42 + INST(Blsi , VexVm_Wx , V(000F38,F3,3,0,x,_,_,_ ), 0 , 18 , 0 , 15 , 10 ), // #43 + INST(Blsic , VexVm_Wx , V(XOP_M9,01,6,0,x,_,_,_ ), 0 , 14 , 0 , 15 , 12 ), // #44 + INST(Blsmsk , VexVm_Wx , V(000F38,F3,2,0,x,_,_,_ ), 0 , 19 , 0 , 15 , 10 ), // #45 + INST(Blsr , VexVm_Wx , V(000F38,F3,1,0,x,_,_,_ ), 0 , 20 , 0 , 15 , 10 ), // #46 + INST(Bndcl , X86Rm , O(F30F00,1A,_,_,_,_,_,_ ), 0 , 7 , 0 , 17 , 14 ), // #47 + INST(Bndcn , X86Rm , O(F20F00,1B,_,_,_,_,_,_ ), 0 , 6 , 0 , 17 , 14 ), // #48 + INST(Bndcu , X86Rm , O(F20F00,1A,_,_,_,_,_,_ ), 0 , 6 , 0 , 17 , 14 ), // #49 + INST(Bndldx , X86Rm , O(000F00,1A,_,_,_,_,_,_ ), 0 , 5 , 0 , 18 , 14 ), // #50 + INST(Bndmk , X86Rm , O(F30F00,1B,_,_,_,_,_,_ ), 0 , 7 , 0 , 19 , 14 ), // #51 + INST(Bndmov , X86Bndmov , O(660F00,1A,_,_,_,_,_,_ ), O(660F00,1B,_,_,_,_,_,_ ), 4 , 1 , 20 , 14 ), // #52 + INST(Bndstx , X86Mr , O(000F00,1B,_,_,_,_,_,_ ), 0 , 5 , 0 , 21 , 14 ), // #53 + INST(Bound , X86Rm , O(000000,62,_,_,_,_,_,_ ), 0 , 0 , 0 , 22 , 0 ), // #54 + INST(Bsf , X86Rm , O(000F00,BC,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 1 ), // #55 + INST(Bsr , X86Rm , O(000F00,BD,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 1 ), // #56 + INST(Bswap , X86Bswap , O(000F00,C8,_,_,x,_,_,_ ), 0 , 5 , 0 , 24 , 0 ), // #57 + INST(Bt , X86Bt , O(000F00,A3,_,_,x,_,_,_ ), O(000F00,BA,4,_,x,_,_,_ ), 5 , 2 , 25 , 15 ), // #58 + INST(Btc , X86Bt , O(000F00,BB,_,_,x,_,_,_ ), O(000F00,BA,7,_,x,_,_,_ ), 5 , 3 , 26 , 15 ), // #59 + INST(Btr , X86Bt , O(000F00,B3,_,_,x,_,_,_ ), O(000F00,BA,6,_,x,_,_,_ ), 5 , 4 , 26 , 15 ), // #60 + INST(Bts , X86Bt , O(000F00,AB,_,_,x,_,_,_ ), O(000F00,BA,5,_,x,_,_,_ ), 5 , 5 , 26 , 15 ), // #61 + INST(Bzhi , VexRmv_Wx , V(000F38,F5,_,0,x,_,_,_ ), 0 , 11 , 0 , 14 , 16 ), // #62 + INST(Call , X86Call , O(000000,FF,2,_,_,_,_,_ ), 0 , 3 , 0 , 27 , 1 ), // #63 + INST(Cbw , X86Op_xAX , O(660000,98,_,_,_,_,_,_ ), 0 , 21 , 0 , 28 , 0 ), // #64 + INST(Cdq , X86Op_xDX_xAX , O(000000,99,_,_,_,_,_,_ ), 0 , 0 , 0 , 29 , 0 ), // #65 + INST(Cdqe , X86Op_xAX , O(000000,98,_,_,1,_,_,_ ), 0 , 22 , 0 , 30 , 0 ), // #66 + INST(Clac , X86Op , O(000F01,CA,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 17 ), // #67 + INST(Clc , X86Op , O(000000,F8,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 18 ), // #68 + INST(Cld , X86Op , O(000000,FC,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 19 ), // #69 + INST(Cldemote , X86M_Only , O(000F00,1C,0,_,_,_,_,_ ), 0 , 5 , 0 , 32 , 20 ), // #70 + INST(Clflush , X86M_Only , O(000F00,AE,7,_,_,_,_,_ ), 0 , 24 , 0 , 32 , 21 ), // #71 + INST(Clflushopt , X86M_Only , O(660F00,AE,7,_,_,_,_,_ ), 0 , 25 , 0 , 32 , 22 ), // #72 + INST(Clgi , X86Op , O(000F01,DD,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 23 ), // #73 + INST(Cli , X86Op , O(000000,FA,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 24 ), // #74 + INST(Clrssbsy , X86M_Only , O(F30F00,AE,6,_,_,_,_,_ ), 0 , 26 , 0 , 33 , 25 ), // #75 + INST(Clts , X86Op , O(000F00,06,_,_,_,_,_,_ ), 0 , 5 , 0 , 31 , 0 ), // #76 + INST(Clui , X86Op , O(F30F01,EE,_,_,_,_,_,_ ), 0 , 27 , 0 , 34 , 26 ), // #77 + INST(Clwb , X86M_Only , O(660F00,AE,6,_,_,_,_,_ ), 0 , 28 , 0 , 32 , 27 ), // #78 + INST(Clzero , X86Op_MemZAX , O(000F01,FC,_,_,_,_,_,_ ), 0 , 23 , 0 , 35 , 28 ), // #79 + INST(Cmc , X86Op , O(000000,F5,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 29 ), // #80 + INST(Cmova , X86Rm , O(000F00,47,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 30 ), // #81 + INST(Cmovae , X86Rm , O(000F00,43,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 31 ), // #82 + INST(Cmovb , X86Rm , O(000F00,42,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 31 ), // #83 + INST(Cmovbe , X86Rm , O(000F00,46,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 30 ), // #84 + INST(Cmovc , X86Rm , O(000F00,42,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 31 ), // #85 + INST(Cmove , X86Rm , O(000F00,44,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 32 ), // #86 + INST(Cmovg , X86Rm , O(000F00,4F,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 33 ), // #87 + INST(Cmovge , X86Rm , O(000F00,4D,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 34 ), // #88 + INST(Cmovl , X86Rm , O(000F00,4C,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 34 ), // #89 + INST(Cmovle , X86Rm , O(000F00,4E,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 33 ), // #90 + INST(Cmovna , X86Rm , O(000F00,46,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 30 ), // #91 + INST(Cmovnae , X86Rm , O(000F00,42,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 31 ), // #92 + INST(Cmovnb , X86Rm , O(000F00,43,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 31 ), // #93 + INST(Cmovnbe , X86Rm , O(000F00,47,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 30 ), // #94 + INST(Cmovnc , X86Rm , O(000F00,43,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 31 ), // #95 + INST(Cmovne , X86Rm , O(000F00,45,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 32 ), // #96 + INST(Cmovng , X86Rm , O(000F00,4E,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 33 ), // #97 + INST(Cmovnge , X86Rm , O(000F00,4C,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 34 ), // #98 + INST(Cmovnl , X86Rm , O(000F00,4D,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 34 ), // #99 + INST(Cmovnle , X86Rm , O(000F00,4F,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 33 ), // #100 + INST(Cmovno , X86Rm , O(000F00,41,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 35 ), // #101 + INST(Cmovnp , X86Rm , O(000F00,4B,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 36 ), // #102 + INST(Cmovns , X86Rm , O(000F00,49,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 37 ), // #103 + INST(Cmovnz , X86Rm , O(000F00,45,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 32 ), // #104 + INST(Cmovo , X86Rm , O(000F00,40,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 35 ), // #105 + INST(Cmovp , X86Rm , O(000F00,4A,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 36 ), // #106 + INST(Cmovpe , X86Rm , O(000F00,4A,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 36 ), // #107 + INST(Cmovpo , X86Rm , O(000F00,4B,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 36 ), // #108 + INST(Cmovs , X86Rm , O(000F00,48,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 37 ), // #109 + INST(Cmovz , X86Rm , O(000F00,44,_,_,x,_,_,_ ), 0 , 5 , 0 , 23 , 32 ), // #110 + INST(Cmp , X86Arith , O(000000,38,7,_,x,_,_,_ ), 0 , 29 , 0 , 36 , 1 ), // #111 + INST(Cmpbexadd , VexMvr_Wx , V(660F38,E6,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #112 + INST(Cmpbxadd , VexMvr_Wx , V(660F38,E2,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #113 + INST(Cmplexadd , VexMvr_Wx , V(660F38,EE,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #114 + INST(Cmplxadd , VexMvr_Wx , V(660F38,EC,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #115 + INST(Cmpnbexadd , VexMvr_Wx , V(660F38,E7,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #116 + INST(Cmpnbxadd , VexMvr_Wx , V(660F38,E3,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #117 + INST(Cmpnlexadd , VexMvr_Wx , V(660F38,EF,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #118 + INST(Cmpnlxadd , VexMvr_Wx , V(660F38,ED,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #119 + INST(Cmpnoxadd , VexMvr_Wx , V(660F38,E1,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #120 + INST(Cmpnpxadd , VexMvr_Wx , V(660F38,EB,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #121 + INST(Cmpnsxadd , VexMvr_Wx , V(660F38,E9,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #122 + INST(Cmpnzxadd , VexMvr_Wx , V(660F38,E5,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #123 + INST(Cmpoxadd , VexMvr_Wx , V(660F38,E0,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #124 + INST(Cmppd , ExtRmi , O(660F00,C2,_,_,_,_,_,_ ), 0 , 4 , 0 , 9 , 5 ), // #125 + INST(Cmpps , ExtRmi , O(000F00,C2,_,_,_,_,_,_ ), 0 , 5 , 0 , 9 , 6 ), // #126 + INST(Cmppxadd , VexMvr_Wx , V(660F38,EA,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #127 + INST(Cmps , X86StrMm , O(000000,A6,_,_,_,_,_,_ ), 0 , 0 , 0 , 38 , 39 ), // #128 + INST(Cmpsd , ExtRmi , O(F20F00,C2,_,_,_,_,_,_ ), 0 , 6 , 0 , 39 , 5 ), // #129 + INST(Cmpss , ExtRmi , O(F30F00,C2,_,_,_,_,_,_ ), 0 , 7 , 0 , 40 , 6 ), // #130 + INST(Cmpsxadd , VexMvr_Wx , V(660F38,E8,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #131 + INST(Cmpxchg , X86Cmpxchg , O(000F00,B0,_,_,x,_,_,_ ), 0 , 5 , 0 , 41 , 40 ), // #132 + INST(Cmpxchg16b , X86Cmpxchg8b_16b , O(000F00,C7,1,_,1,_,_,_ ), 0 , 31 , 0 , 42 , 41 ), // #133 + INST(Cmpxchg8b , X86Cmpxchg8b_16b , O(000F00,C7,1,_,_,_,_,_ ), 0 , 32 , 0 , 43 , 42 ), // #134 + INST(Cmpzxadd , VexMvr_Wx , V(660F38,E4,_,0,x,_,_,_ ), 0 , 30 , 0 , 37 , 38 ), // #135 + INST(Comisd , ExtRm , O(660F00,2F,_,_,_,_,_,_ ), 0 , 4 , 0 , 7 , 43 ), // #136 + INST(Comiss , ExtRm , O(000F00,2F,_,_,_,_,_,_ ), 0 , 5 , 0 , 8 , 44 ), // #137 + INST(Cpuid , X86Op , O(000F00,A2,_,_,_,_,_,_ ), 0 , 5 , 0 , 44 , 45 ), // #138 + INST(Cqo , X86Op_xDX_xAX , O(000000,99,_,_,1,_,_,_ ), 0 , 22 , 0 , 45 , 0 ), // #139 + INST(Crc32 , X86Crc , O(F20F38,F0,_,_,x,_,_,_ ), 0 , 12 , 0 , 46 , 46 ), // #140 + INST(Cvtdq2pd , ExtRm , O(F30F00,E6,_,_,_,_,_,_ ), 0 , 7 , 0 , 7 , 5 ), // #141 + INST(Cvtdq2ps , ExtRm , O(000F00,5B,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 5 ), // #142 + INST(Cvtpd2dq , ExtRm , O(F20F00,E6,_,_,_,_,_,_ ), 0 , 6 , 0 , 6 , 5 ), // #143 + INST(Cvtpd2pi , ExtRm , O(660F00,2D,_,_,_,_,_,_ ), 0 , 4 , 0 , 47 , 5 ), // #144 + INST(Cvtpd2ps , ExtRm , O(660F00,5A,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #145 + INST(Cvtpi2pd , ExtRm , O(660F00,2A,_,_,_,_,_,_ ), 0 , 4 , 0 , 48 , 5 ), // #146 + INST(Cvtpi2ps , ExtRm , O(000F00,2A,_,_,_,_,_,_ ), 0 , 5 , 0 , 48 , 6 ), // #147 + INST(Cvtps2dq , ExtRm , O(660F00,5B,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #148 + INST(Cvtps2pd , ExtRm , O(000F00,5A,_,_,_,_,_,_ ), 0 , 5 , 0 , 7 , 5 ), // #149 + INST(Cvtps2pi , ExtRm , O(000F00,2D,_,_,_,_,_,_ ), 0 , 5 , 0 , 49 , 6 ), // #150 + INST(Cvtsd2si , ExtRm_Wx_GpqOnly , O(F20F00,2D,_,_,x,_,_,_ ), 0 , 6 , 0 , 50 , 5 ), // #151 + INST(Cvtsd2ss , ExtRm , O(F20F00,5A,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #152 + INST(Cvtsi2sd , ExtRm_Wx , O(F20F00,2A,_,_,x,_,_,_ ), 0 , 6 , 0 , 51 , 5 ), // #153 + INST(Cvtsi2ss , ExtRm_Wx , O(F30F00,2A,_,_,x,_,_,_ ), 0 , 7 , 0 , 52 , 6 ), // #154 + INST(Cvtss2sd , ExtRm , O(F30F00,5A,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 5 ), // #155 + INST(Cvtss2si , ExtRm_Wx_GpqOnly , O(F30F00,2D,_,_,x,_,_,_ ), 0 , 7 , 0 , 53 , 6 ), // #156 + INST(Cvttpd2dq , ExtRm , O(660F00,E6,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #157 + INST(Cvttpd2pi , ExtRm , O(660F00,2C,_,_,_,_,_,_ ), 0 , 4 , 0 , 47 , 5 ), // #158 + INST(Cvttps2dq , ExtRm , O(F30F00,5B,_,_,_,_,_,_ ), 0 , 7 , 0 , 6 , 5 ), // #159 + INST(Cvttps2pi , ExtRm , O(000F00,2C,_,_,_,_,_,_ ), 0 , 5 , 0 , 49 , 6 ), // #160 + INST(Cvttsd2si , ExtRm_Wx_GpqOnly , O(F20F00,2C,_,_,x,_,_,_ ), 0 , 6 , 0 , 50 , 5 ), // #161 + INST(Cvttss2si , ExtRm_Wx_GpqOnly , O(F30F00,2C,_,_,x,_,_,_ ), 0 , 7 , 0 , 54 , 6 ), // #162 + INST(Cwd , X86Op_xDX_xAX , O(660000,99,_,_,_,_,_,_ ), 0 , 21 , 0 , 55 , 0 ), // #163 + INST(Cwde , X86Op_xAX , O(000000,98,_,_,_,_,_,_ ), 0 , 0 , 0 , 56 , 0 ), // #164 + INST(Daa , X86Op , O(000000,27,_,_,_,_,_,_ ), 0 , 0 , 0 , 1 , 1 ), // #165 + INST(Das , X86Op , O(000000,2F,_,_,_,_,_,_ ), 0 , 0 , 0 , 1 , 1 ), // #166 + INST(Dec , X86IncDec , O(000000,FE,1,_,x,_,_,_ ), O(000000,48,_,_,x,_,_,_ ), 33 , 6 , 57 , 47 ), // #167 + INST(Div , X86M_GPB_MulDiv , O(000000,F6,6,_,x,_,_,_ ), 0 , 34 , 0 , 58 , 1 ), // #168 + INST(Divpd , ExtRm , O(660F00,5E,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #169 + INST(Divps , ExtRm , O(000F00,5E,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #170 + INST(Divsd , ExtRm , O(F20F00,5E,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #171 + INST(Divss , ExtRm , O(F30F00,5E,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 6 ), // #172 + INST(Dppd , ExtRmi , O(660F3A,41,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 13 ), // #173 + INST(Dpps , ExtRmi , O(660F3A,40,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 13 ), // #174 + INST(Emms , X86Op , O(000F00,77,_,_,_,_,_,_ ), 0 , 5 , 0 , 59 , 48 ), // #175 + INST(Endbr32 , X86Op_Mod11RM , O(F30F00,1E,7,_,_,_,_,3 ), 0 , 35 , 0 , 31 , 49 ), // #176 + INST(Endbr64 , X86Op_Mod11RM , O(F30F00,1E,7,_,_,_,_,2 ), 0 , 36 , 0 , 31 , 49 ), // #177 + INST(Enqcmd , X86EnqcmdMovdir64b , O(F20F38,F8,_,_,_,_,_,_ ), 0 , 12 , 0 , 60 , 50 ), // #178 + INST(Enqcmds , X86EnqcmdMovdir64b , O(F30F38,F8,_,_,_,_,_,_ ), 0 , 8 , 0 , 60 , 50 ), // #179 + INST(Enter , X86Enter , O(000000,C8,_,_,_,_,_,_ ), 0 , 0 , 0 , 61 , 0 ), // #180 + INST(Extractps , ExtExtract , O(660F3A,17,_,_,_,_,_,_ ), 0 , 9 , 0 , 62 , 13 ), // #181 + INST(Extrq , ExtExtrq , O(660F00,79,_,_,_,_,_,_ ), O(660F00,78,0,_,_,_,_,_ ), 4 , 7 , 63 , 51 ), // #182 + INST(F2xm1 , FpuOp , O_FPU(00,D9F0,_) , 0 , 37 , 0 , 31 , 52 ), // #183 + INST(Fabs , FpuOp , O_FPU(00,D9E1,_) , 0 , 37 , 0 , 31 , 52 ), // #184 + INST(Fadd , FpuArith , O_FPU(00,C0C0,0) , 0 , 38 , 0 , 64 , 52 ), // #185 + INST(Faddp , FpuRDef , O_FPU(00,DEC0,_) , 0 , 39 , 0 , 65 , 52 ), // #186 + INST(Fbld , X86M_Only , O_FPU(00,00DF,4) , 0 , 40 , 0 , 66 , 52 ), // #187 + INST(Fbstp , X86M_Only , O_FPU(00,00DF,6) , 0 , 41 , 0 , 66 , 52 ), // #188 + INST(Fchs , FpuOp , O_FPU(00,D9E0,_) , 0 , 37 , 0 , 31 , 52 ), // #189 + INST(Fclex , FpuOp , O_FPU(9B,DBE2,_) , 0 , 42 , 0 , 31 , 52 ), // #190 + INST(Fcmovb , FpuR , O_FPU(00,DAC0,_) , 0 , 43 , 0 , 67 , 53 ), // #191 + INST(Fcmovbe , FpuR , O_FPU(00,DAD0,_) , 0 , 43 , 0 , 67 , 54 ), // #192 + INST(Fcmove , FpuR , O_FPU(00,DAC8,_) , 0 , 43 , 0 , 67 , 55 ), // #193 + INST(Fcmovnb , FpuR , O_FPU(00,DBC0,_) , 0 , 44 , 0 , 67 , 53 ), // #194 + INST(Fcmovnbe , FpuR , O_FPU(00,DBD0,_) , 0 , 44 , 0 , 67 , 54 ), // #195 + INST(Fcmovne , FpuR , O_FPU(00,DBC8,_) , 0 , 44 , 0 , 67 , 55 ), // #196 + INST(Fcmovnu , FpuR , O_FPU(00,DBD8,_) , 0 , 44 , 0 , 67 , 56 ), // #197 + INST(Fcmovu , FpuR , O_FPU(00,DAD8,_) , 0 , 43 , 0 , 67 , 56 ), // #198 + INST(Fcom , FpuCom , O_FPU(00,D0D0,2) , 0 , 45 , 0 , 68 , 52 ), // #199 + INST(Fcomi , FpuR , O_FPU(00,DBF0,_) , 0 , 44 , 0 , 67 , 57 ), // #200 + INST(Fcomip , FpuR , O_FPU(00,DFF0,_) , 0 , 46 , 0 , 67 , 57 ), // #201 + INST(Fcomp , FpuCom , O_FPU(00,D8D8,3) , 0 , 47 , 0 , 68 , 52 ), // #202 + INST(Fcompp , FpuOp , O_FPU(00,DED9,_) , 0 , 39 , 0 , 31 , 52 ), // #203 + INST(Fcos , FpuOp , O_FPU(00,D9FF,_) , 0 , 37 , 0 , 31 , 52 ), // #204 + INST(Fdecstp , FpuOp , O_FPU(00,D9F6,_) , 0 , 37 , 0 , 31 , 52 ), // #205 + INST(Fdiv , FpuArith , O_FPU(00,F0F8,6) , 0 , 48 , 0 , 64 , 52 ), // #206 + INST(Fdivp , FpuRDef , O_FPU(00,DEF8,_) , 0 , 39 , 0 , 65 , 52 ), // #207 + INST(Fdivr , FpuArith , O_FPU(00,F8F0,7) , 0 , 49 , 0 , 64 , 52 ), // #208 + INST(Fdivrp , FpuRDef , O_FPU(00,DEF0,_) , 0 , 39 , 0 , 65 , 52 ), // #209 + INST(Femms , X86Op , O(000F00,0E,_,_,_,_,_,_ ), 0 , 5 , 0 , 31 , 58 ), // #210 + INST(Ffree , FpuR , O_FPU(00,DDC0,_) , 0 , 50 , 0 , 67 , 52 ), // #211 + INST(Fiadd , FpuM , O_FPU(00,00DA,0) , 0 , 51 , 0 , 69 , 52 ), // #212 + INST(Ficom , FpuM , O_FPU(00,00DA,2) , 0 , 52 , 0 , 69 , 52 ), // #213 + INST(Ficomp , FpuM , O_FPU(00,00DA,3) , 0 , 53 , 0 , 69 , 52 ), // #214 + INST(Fidiv , FpuM , O_FPU(00,00DA,6) , 0 , 41 , 0 , 69 , 52 ), // #215 + INST(Fidivr , FpuM , O_FPU(00,00DA,7) , 0 , 54 , 0 , 69 , 52 ), // #216 + INST(Fild , FpuM , O_FPU(00,00DB,0) , O_FPU(00,00DF,5) , 51 , 8 , 70 , 52 ), // #217 + INST(Fimul , FpuM , O_FPU(00,00DA,1) , 0 , 55 , 0 , 69 , 52 ), // #218 + INST(Fincstp , FpuOp , O_FPU(00,D9F7,_) , 0 , 37 , 0 , 31 , 52 ), // #219 + INST(Finit , FpuOp , O_FPU(9B,DBE3,_) , 0 , 42 , 0 , 31 , 52 ), // #220 + INST(Fist , FpuM , O_FPU(00,00DB,2) , 0 , 52 , 0 , 69 , 52 ), // #221 + INST(Fistp , FpuM , O_FPU(00,00DB,3) , O_FPU(00,00DF,7) , 53 , 9 , 70 , 52 ), // #222 + INST(Fisttp , FpuM , O_FPU(00,00DB,1) , O_FPU(00,00DD,1) , 55 , 10 , 70 , 59 ), // #223 + INST(Fisub , FpuM , O_FPU(00,00DA,4) , 0 , 40 , 0 , 69 , 52 ), // #224 + INST(Fisubr , FpuM , O_FPU(00,00DA,5) , 0 , 56 , 0 , 69 , 52 ), // #225 + INST(Fld , FpuFldFst , O_FPU(00,00D9,0) , O_FPU(00,00DB,5) , 51 , 11 , 71 , 52 ), // #226 + INST(Fld1 , FpuOp , O_FPU(00,D9E8,_) , 0 , 37 , 0 , 31 , 52 ), // #227 + INST(Fldcw , X86M_Only , O_FPU(00,00D9,5) , 0 , 56 , 0 , 72 , 52 ), // #228 + INST(Fldenv , X86M_Only , O_FPU(00,00D9,4) , 0 , 40 , 0 , 32 , 52 ), // #229 + INST(Fldl2e , FpuOp , O_FPU(00,D9EA,_) , 0 , 37 , 0 , 31 , 52 ), // #230 + INST(Fldl2t , FpuOp , O_FPU(00,D9E9,_) , 0 , 37 , 0 , 31 , 52 ), // #231 + INST(Fldlg2 , FpuOp , O_FPU(00,D9EC,_) , 0 , 37 , 0 , 31 , 52 ), // #232 + INST(Fldln2 , FpuOp , O_FPU(00,D9ED,_) , 0 , 37 , 0 , 31 , 52 ), // #233 + INST(Fldpi , FpuOp , O_FPU(00,D9EB,_) , 0 , 37 , 0 , 31 , 52 ), // #234 + INST(Fldz , FpuOp , O_FPU(00,D9EE,_) , 0 , 37 , 0 , 31 , 52 ), // #235 + INST(Fmul , FpuArith , O_FPU(00,C8C8,1) , 0 , 57 , 0 , 64 , 52 ), // #236 + INST(Fmulp , FpuRDef , O_FPU(00,DEC8,_) , 0 , 39 , 0 , 65 , 52 ), // #237 + INST(Fnclex , FpuOp , O_FPU(00,DBE2,_) , 0 , 44 , 0 , 31 , 52 ), // #238 + INST(Fninit , FpuOp , O_FPU(00,DBE3,_) , 0 , 44 , 0 , 31 , 52 ), // #239 + INST(Fnop , FpuOp , O_FPU(00,D9D0,_) , 0 , 37 , 0 , 31 , 52 ), // #240 + INST(Fnsave , X86M_Only , O_FPU(00,00DD,6) , 0 , 41 , 0 , 32 , 52 ), // #241 + INST(Fnstcw , X86M_Only , O_FPU(00,00D9,7) , 0 , 54 , 0 , 72 , 52 ), // #242 + INST(Fnstenv , X86M_Only , O_FPU(00,00D9,6) , 0 , 41 , 0 , 32 , 52 ), // #243 + INST(Fnstsw , FpuStsw , O_FPU(00,00DD,7) , O_FPU(00,DFE0,_) , 54 , 12 , 73 , 52 ), // #244 + INST(Fpatan , FpuOp , O_FPU(00,D9F3,_) , 0 , 37 , 0 , 31 , 52 ), // #245 + INST(Fprem , FpuOp , O_FPU(00,D9F8,_) , 0 , 37 , 0 , 31 , 52 ), // #246 + INST(Fprem1 , FpuOp , O_FPU(00,D9F5,_) , 0 , 37 , 0 , 31 , 52 ), // #247 + INST(Fptan , FpuOp , O_FPU(00,D9F2,_) , 0 , 37 , 0 , 31 , 52 ), // #248 + INST(Frndint , FpuOp , O_FPU(00,D9FC,_) , 0 , 37 , 0 , 31 , 52 ), // #249 + INST(Frstor , X86M_Only , O_FPU(00,00DD,4) , 0 , 40 , 0 , 32 , 52 ), // #250 + INST(Fsave , X86M_Only , O_FPU(9B,00DD,6) , 0 , 58 , 0 , 32 , 52 ), // #251 + INST(Fscale , FpuOp , O_FPU(00,D9FD,_) , 0 , 37 , 0 , 31 , 52 ), // #252 + INST(Fsin , FpuOp , O_FPU(00,D9FE,_) , 0 , 37 , 0 , 31 , 52 ), // #253 + INST(Fsincos , FpuOp , O_FPU(00,D9FB,_) , 0 , 37 , 0 , 31 , 52 ), // #254 + INST(Fsqrt , FpuOp , O_FPU(00,D9FA,_) , 0 , 37 , 0 , 31 , 52 ), // #255 + INST(Fst , FpuFldFst , O_FPU(00,00D9,2) , 0 , 52 , 0 , 74 , 52 ), // #256 + INST(Fstcw , X86M_Only , O_FPU(9B,00D9,7) , 0 , 59 , 0 , 72 , 52 ), // #257 + INST(Fstenv , X86M_Only , O_FPU(9B,00D9,6) , 0 , 58 , 0 , 32 , 52 ), // #258 + INST(Fstp , FpuFldFst , O_FPU(00,00D9,3) , O(000000,DB,7,_,_,_,_,_ ), 53 , 13 , 71 , 52 ), // #259 + INST(Fstsw , FpuStsw , O_FPU(9B,00DD,7) , O_FPU(9B,DFE0,_) , 59 , 14 , 73 , 52 ), // #260 + INST(Fsub , FpuArith , O_FPU(00,E0E8,4) , 0 , 60 , 0 , 64 , 52 ), // #261 + INST(Fsubp , FpuRDef , O_FPU(00,DEE8,_) , 0 , 39 , 0 , 65 , 52 ), // #262 + INST(Fsubr , FpuArith , O_FPU(00,E8E0,5) , 0 , 61 , 0 , 64 , 52 ), // #263 + INST(Fsubrp , FpuRDef , O_FPU(00,DEE0,_) , 0 , 39 , 0 , 65 , 52 ), // #264 + INST(Ftst , FpuOp , O_FPU(00,D9E4,_) , 0 , 37 , 0 , 31 , 52 ), // #265 + INST(Fucom , FpuRDef , O_FPU(00,DDE0,_) , 0 , 50 , 0 , 65 , 52 ), // #266 + INST(Fucomi , FpuR , O_FPU(00,DBE8,_) , 0 , 44 , 0 , 67 , 57 ), // #267 + INST(Fucomip , FpuR , O_FPU(00,DFE8,_) , 0 , 46 , 0 , 67 , 57 ), // #268 + INST(Fucomp , FpuRDef , O_FPU(00,DDE8,_) , 0 , 50 , 0 , 65 , 52 ), // #269 + INST(Fucompp , FpuOp , O_FPU(00,DAE9,_) , 0 , 43 , 0 , 31 , 52 ), // #270 + INST(Fwait , X86Op , O_FPU(00,009B,_) , 0 , 51 , 0 , 31 , 52 ), // #271 + INST(Fxam , FpuOp , O_FPU(00,D9E5,_) , 0 , 37 , 0 , 31 , 52 ), // #272 + INST(Fxch , FpuR , O_FPU(00,D9C8,_) , 0 , 37 , 0 , 65 , 52 ), // #273 + INST(Fxrstor , X86M_Only , O(000F00,AE,1,_,_,_,_,_ ), 0 , 32 , 0 , 32 , 60 ), // #274 + INST(Fxrstor64 , X86M_Only , O(000F00,AE,1,_,1,_,_,_ ), 0 , 31 , 0 , 75 , 60 ), // #275 + INST(Fxsave , X86M_Only , O(000F00,AE,0,_,_,_,_,_ ), 0 , 5 , 0 , 32 , 61 ), // #276 + INST(Fxsave64 , X86M_Only , O(000F00,AE,0,_,1,_,_,_ ), 0 , 62 , 0 , 75 , 61 ), // #277 + INST(Fxtract , FpuOp , O_FPU(00,D9F4,_) , 0 , 37 , 0 , 31 , 52 ), // #278 + INST(Fyl2x , FpuOp , O_FPU(00,D9F1,_) , 0 , 37 , 0 , 31 , 52 ), // #279 + INST(Fyl2xp1 , FpuOp , O_FPU(00,D9F9,_) , 0 , 37 , 0 , 31 , 52 ), // #280 + INST(Getsec , X86Op , O(000F00,37,_,_,_,_,_,_ ), 0 , 5 , 0 , 56 , 62 ), // #281 + INST(Gf2p8affineinvqb , ExtRmi , O(660F3A,CF,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 63 ), // #282 + INST(Gf2p8affineqb , ExtRmi , O(660F3A,CE,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 63 ), // #283 + INST(Gf2p8mulb , ExtRm , O(660F38,CF,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 63 ), // #284 + INST(Haddpd , ExtRm , O(660F00,7C,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 7 ), // #285 + INST(Haddps , ExtRm , O(F20F00,7C,_,_,_,_,_,_ ), 0 , 6 , 0 , 6 , 7 ), // #286 + INST(Hlt , X86Op , O(000000,F4,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 0 ), // #287 + INST(Hreset , X86Op_Mod11RM_I8 , O(F30F3A,F0,0,_,_,_,_,_ ), 0 , 63 , 0 , 76 , 64 ), // #288 + INST(Hsubpd , ExtRm , O(660F00,7D,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 7 ), // #289 + INST(Hsubps , ExtRm , O(F20F00,7D,_,_,_,_,_,_ ), 0 , 6 , 0 , 6 , 7 ), // #290 + INST(Idiv , X86M_GPB_MulDiv , O(000000,F6,7,_,x,_,_,_ ), 0 , 29 , 0 , 58 , 1 ), // #291 + INST(Imul , X86Imul , O(000000,F6,5,_,x,_,_,_ ), 0 , 64 , 0 , 77 , 1 ), // #292 + INST(In , X86In , O(000000,EC,_,_,_,_,_,_ ), O(000000,E4,_,_,_,_,_,_ ), 0 , 15 , 78 , 0 ), // #293 + INST(Inc , X86IncDec , O(000000,FE,0,_,x,_,_,_ ), O(000000,40,_,_,x,_,_,_ ), 0 , 16 , 79 , 47 ), // #294 + INST(Incsspd , X86M , O(F30F00,AE,5,_,0,_,_,_ ), 0 , 65 , 0 , 80 , 65 ), // #295 + INST(Incsspq , X86M , O(F30F00,AE,5,_,1,_,_,_ ), 0 , 66 , 0 , 81 , 65 ), // #296 + INST(Ins , X86Ins , O(000000,6C,_,_,_,_,_,_ ), 0 , 0 , 0 , 82 , 0 ), // #297 + INST(Insertps , ExtRmi , O(660F3A,21,_,_,_,_,_,_ ), 0 , 9 , 0 , 40 , 13 ), // #298 + INST(Insertq , ExtInsertq , O(F20F00,79,_,_,_,_,_,_ ), O(F20F00,78,_,_,_,_,_,_ ), 6 , 17 , 83 , 51 ), // #299 + INST(Int , X86Int , O(000000,CD,_,_,_,_,_,_ ), 0 , 0 , 0 , 84 , 0 ), // #300 + INST(Int3 , X86Op , O(000000,CC,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 0 ), // #301 + INST(Into , X86Op , O(000000,CE,_,_,_,_,_,_ ), 0 , 0 , 0 , 85 , 66 ), // #302 + INST(Invd , X86Op , O(000F00,08,_,_,_,_,_,_ ), 0 , 5 , 0 , 31 , 45 ), // #303 + INST(Invept , X86Rm_NoSize , O(660F38,80,_,_,_,_,_,_ ), 0 , 2 , 0 , 86 , 67 ), // #304 + INST(Invlpg , X86M_Only , O(000F00,01,7,_,_,_,_,_ ), 0 , 24 , 0 , 32 , 45 ), // #305 + INST(Invlpga , X86Op_xAddr , O(000F01,DF,_,_,_,_,_,_ ), 0 , 23 , 0 , 87 , 23 ), // #306 + INST(Invlpgb , X86Op , O(000F01,FE,_,_,_,_,_,_ ), 0 , 23 , 0 , 88 , 68 ), // #307 + INST(Invpcid , X86Rm_NoSize , O(660F38,82,_,_,_,_,_,_ ), 0 , 2 , 0 , 86 , 45 ), // #308 + INST(Invvpid , X86Rm_NoSize , O(660F38,81,_,_,_,_,_,_ ), 0 , 2 , 0 , 86 , 67 ), // #309 + INST(Iret , X86Op , O(660000,CF,_,_,_,_,_,_ ), 0 , 21 , 0 , 89 , 1 ), // #310 + INST(Iretd , X86Op , O(000000,CF,_,_,_,_,_,_ ), 0 , 0 , 0 , 89 , 1 ), // #311 + INST(Iretq , X86Op , O(000000,CF,_,_,1,_,_,_ ), 0 , 22 , 0 , 90 , 1 ), // #312 + INST(Ja , X86Jcc , O(000F00,87,_,_,_,_,_,_ ), O(000000,77,_,_,_,_,_,_ ), 5 , 18 , 91 , 69 ), // #313 + INST(Jae , X86Jcc , O(000F00,83,_,_,_,_,_,_ ), O(000000,73,_,_,_,_,_,_ ), 5 , 19 , 91 , 70 ), // #314 + INST(Jb , X86Jcc , O(000F00,82,_,_,_,_,_,_ ), O(000000,72,_,_,_,_,_,_ ), 5 , 20 , 91 , 70 ), // #315 + INST(Jbe , X86Jcc , O(000F00,86,_,_,_,_,_,_ ), O(000000,76,_,_,_,_,_,_ ), 5 , 21 , 91 , 69 ), // #316 + INST(Jc , X86Jcc , O(000F00,82,_,_,_,_,_,_ ), O(000000,72,_,_,_,_,_,_ ), 5 , 20 , 91 , 70 ), // #317 + INST(Je , X86Jcc , O(000F00,84,_,_,_,_,_,_ ), O(000000,74,_,_,_,_,_,_ ), 5 , 22 , 91 , 71 ), // #318 + INST(Jecxz , X86JecxzLoop , 0 , O(000000,E3,_,_,_,_,_,_ ), 0 , 23 , 92 , 0 ), // #319 + INST(Jg , X86Jcc , O(000F00,8F,_,_,_,_,_,_ ), O(000000,7F,_,_,_,_,_,_ ), 5 , 24 , 91 , 72 ), // #320 + INST(Jge , X86Jcc , O(000F00,8D,_,_,_,_,_,_ ), O(000000,7D,_,_,_,_,_,_ ), 5 , 25 , 91 , 73 ), // #321 + INST(Jl , X86Jcc , O(000F00,8C,_,_,_,_,_,_ ), O(000000,7C,_,_,_,_,_,_ ), 5 , 26 , 91 , 73 ), // #322 + INST(Jle , X86Jcc , O(000F00,8E,_,_,_,_,_,_ ), O(000000,7E,_,_,_,_,_,_ ), 5 , 27 , 91 , 72 ), // #323 + INST(Jmp , X86Jmp , O(000000,FF,4,_,_,_,_,_ ), O(000000,EB,_,_,_,_,_,_ ), 10 , 28 , 93 , 0 ), // #324 + INST(Jna , X86Jcc , O(000F00,86,_,_,_,_,_,_ ), O(000000,76,_,_,_,_,_,_ ), 5 , 21 , 91 , 69 ), // #325 + INST(Jnae , X86Jcc , O(000F00,82,_,_,_,_,_,_ ), O(000000,72,_,_,_,_,_,_ ), 5 , 20 , 91 , 70 ), // #326 + INST(Jnb , X86Jcc , O(000F00,83,_,_,_,_,_,_ ), O(000000,73,_,_,_,_,_,_ ), 5 , 19 , 91 , 70 ), // #327 + INST(Jnbe , X86Jcc , O(000F00,87,_,_,_,_,_,_ ), O(000000,77,_,_,_,_,_,_ ), 5 , 18 , 91 , 69 ), // #328 + INST(Jnc , X86Jcc , O(000F00,83,_,_,_,_,_,_ ), O(000000,73,_,_,_,_,_,_ ), 5 , 19 , 91 , 70 ), // #329 + INST(Jne , X86Jcc , O(000F00,85,_,_,_,_,_,_ ), O(000000,75,_,_,_,_,_,_ ), 5 , 29 , 91 , 71 ), // #330 + INST(Jng , X86Jcc , O(000F00,8E,_,_,_,_,_,_ ), O(000000,7E,_,_,_,_,_,_ ), 5 , 27 , 91 , 72 ), // #331 + INST(Jnge , X86Jcc , O(000F00,8C,_,_,_,_,_,_ ), O(000000,7C,_,_,_,_,_,_ ), 5 , 26 , 91 , 73 ), // #332 + INST(Jnl , X86Jcc , O(000F00,8D,_,_,_,_,_,_ ), O(000000,7D,_,_,_,_,_,_ ), 5 , 25 , 91 , 73 ), // #333 + INST(Jnle , X86Jcc , O(000F00,8F,_,_,_,_,_,_ ), O(000000,7F,_,_,_,_,_,_ ), 5 , 24 , 91 , 72 ), // #334 + INST(Jno , X86Jcc , O(000F00,81,_,_,_,_,_,_ ), O(000000,71,_,_,_,_,_,_ ), 5 , 30 , 91 , 66 ), // #335 + INST(Jnp , X86Jcc , O(000F00,8B,_,_,_,_,_,_ ), O(000000,7B,_,_,_,_,_,_ ), 5 , 31 , 91 , 74 ), // #336 + INST(Jns , X86Jcc , O(000F00,89,_,_,_,_,_,_ ), O(000000,79,_,_,_,_,_,_ ), 5 , 32 , 91 , 75 ), // #337 + INST(Jnz , X86Jcc , O(000F00,85,_,_,_,_,_,_ ), O(000000,75,_,_,_,_,_,_ ), 5 , 29 , 91 , 71 ), // #338 + INST(Jo , X86Jcc , O(000F00,80,_,_,_,_,_,_ ), O(000000,70,_,_,_,_,_,_ ), 5 , 33 , 91 , 66 ), // #339 + INST(Jp , X86Jcc , O(000F00,8A,_,_,_,_,_,_ ), O(000000,7A,_,_,_,_,_,_ ), 5 , 34 , 91 , 74 ), // #340 + INST(Jpe , X86Jcc , O(000F00,8A,_,_,_,_,_,_ ), O(000000,7A,_,_,_,_,_,_ ), 5 , 34 , 91 , 74 ), // #341 + INST(Jpo , X86Jcc , O(000F00,8B,_,_,_,_,_,_ ), O(000000,7B,_,_,_,_,_,_ ), 5 , 31 , 91 , 74 ), // #342 + INST(Js , X86Jcc , O(000F00,88,_,_,_,_,_,_ ), O(000000,78,_,_,_,_,_,_ ), 5 , 35 , 91 , 75 ), // #343 + INST(Jz , X86Jcc , O(000F00,84,_,_,_,_,_,_ ), O(000000,74,_,_,_,_,_,_ ), 5 , 22 , 91 , 71 ), // #344 + INST(Kaddb , VexRvm , V(660F00,4A,_,1,0,_,_,_ ), 0 , 67 , 0 , 94 , 76 ), // #345 + INST(Kaddd , VexRvm , V(660F00,4A,_,1,1,_,_,_ ), 0 , 68 , 0 , 94 , 77 ), // #346 + INST(Kaddq , VexRvm , V(000F00,4A,_,1,1,_,_,_ ), 0 , 69 , 0 , 94 , 77 ), // #347 + INST(Kaddw , VexRvm , V(000F00,4A,_,1,0,_,_,_ ), 0 , 70 , 0 , 94 , 76 ), // #348 + INST(Kandb , VexRvm , V(660F00,41,_,1,0,_,_,_ ), 0 , 67 , 0 , 94 , 76 ), // #349 + INST(Kandd , VexRvm , V(660F00,41,_,1,1,_,_,_ ), 0 , 68 , 0 , 94 , 77 ), // #350 + INST(Kandnb , VexRvm , V(660F00,42,_,1,0,_,_,_ ), 0 , 67 , 0 , 94 , 76 ), // #351 + INST(Kandnd , VexRvm , V(660F00,42,_,1,1,_,_,_ ), 0 , 68 , 0 , 94 , 77 ), // #352 + INST(Kandnq , VexRvm , V(000F00,42,_,1,1,_,_,_ ), 0 , 69 , 0 , 94 , 77 ), // #353 + INST(Kandnw , VexRvm , V(000F00,42,_,1,0,_,_,_ ), 0 , 70 , 0 , 94 , 78 ), // #354 + INST(Kandq , VexRvm , V(000F00,41,_,1,1,_,_,_ ), 0 , 69 , 0 , 94 , 77 ), // #355 + INST(Kandw , VexRvm , V(000F00,41,_,1,0,_,_,_ ), 0 , 70 , 0 , 94 , 78 ), // #356 + INST(Kmovb , VexKmov , V(660F00,90,_,0,0,_,_,_ ), V(660F00,92,_,0,0,_,_,_ ), 71 , 36 , 95 , 79 ), // #357 + INST(Kmovd , VexKmov , V(660F00,90,_,0,1,_,_,_ ), V(F20F00,92,_,0,0,_,_,_ ), 72 , 37 , 96 , 80 ), // #358 + INST(Kmovq , VexKmov , V(000F00,90,_,0,1,_,_,_ ), V(F20F00,92,_,0,1,_,_,_ ), 73 , 38 , 97 , 80 ), // #359 + INST(Kmovw , VexKmov , V(000F00,90,_,0,0,_,_,_ ), V(000F00,92,_,0,0,_,_,_ ), 74 , 39 , 98 , 81 ), // #360 + INST(Knotb , VexRm , V(660F00,44,_,0,0,_,_,_ ), 0 , 71 , 0 , 99 , 76 ), // #361 + INST(Knotd , VexRm , V(660F00,44,_,0,1,_,_,_ ), 0 , 72 , 0 , 99 , 77 ), // #362 + INST(Knotq , VexRm , V(000F00,44,_,0,1,_,_,_ ), 0 , 73 , 0 , 99 , 77 ), // #363 + INST(Knotw , VexRm , V(000F00,44,_,0,0,_,_,_ ), 0 , 74 , 0 , 99 , 78 ), // #364 + INST(Korb , VexRvm , V(660F00,45,_,1,0,_,_,_ ), 0 , 67 , 0 , 94 , 76 ), // #365 + INST(Kord , VexRvm , V(660F00,45,_,1,1,_,_,_ ), 0 , 68 , 0 , 94 , 77 ), // #366 + INST(Korq , VexRvm , V(000F00,45,_,1,1,_,_,_ ), 0 , 69 , 0 , 94 , 77 ), // #367 + INST(Kortestb , VexRm , V(660F00,98,_,0,0,_,_,_ ), 0 , 71 , 0 , 99 , 82 ), // #368 + INST(Kortestd , VexRm , V(660F00,98,_,0,1,_,_,_ ), 0 , 72 , 0 , 99 , 83 ), // #369 + INST(Kortestq , VexRm , V(000F00,98,_,0,1,_,_,_ ), 0 , 73 , 0 , 99 , 83 ), // #370 + INST(Kortestw , VexRm , V(000F00,98,_,0,0,_,_,_ ), 0 , 74 , 0 , 99 , 84 ), // #371 + INST(Korw , VexRvm , V(000F00,45,_,1,0,_,_,_ ), 0 , 70 , 0 , 94 , 78 ), // #372 + INST(Kshiftlb , VexRmi , V(660F3A,32,_,0,0,_,_,_ ), 0 , 75 , 0 , 100, 76 ), // #373 + INST(Kshiftld , VexRmi , V(660F3A,33,_,0,0,_,_,_ ), 0 , 75 , 0 , 100, 77 ), // #374 + INST(Kshiftlq , VexRmi , V(660F3A,33,_,0,1,_,_,_ ), 0 , 76 , 0 , 100, 77 ), // #375 + INST(Kshiftlw , VexRmi , V(660F3A,32,_,0,1,_,_,_ ), 0 , 76 , 0 , 100, 78 ), // #376 + INST(Kshiftrb , VexRmi , V(660F3A,30,_,0,0,_,_,_ ), 0 , 75 , 0 , 100, 76 ), // #377 + INST(Kshiftrd , VexRmi , V(660F3A,31,_,0,0,_,_,_ ), 0 , 75 , 0 , 100, 77 ), // #378 + INST(Kshiftrq , VexRmi , V(660F3A,31,_,0,1,_,_,_ ), 0 , 76 , 0 , 100, 77 ), // #379 + INST(Kshiftrw , VexRmi , V(660F3A,30,_,0,1,_,_,_ ), 0 , 76 , 0 , 100, 78 ), // #380 + INST(Ktestb , VexRm , V(660F00,99,_,0,0,_,_,_ ), 0 , 71 , 0 , 99 , 82 ), // #381 + INST(Ktestd , VexRm , V(660F00,99,_,0,1,_,_,_ ), 0 , 72 , 0 , 99 , 83 ), // #382 + INST(Ktestq , VexRm , V(000F00,99,_,0,1,_,_,_ ), 0 , 73 , 0 , 99 , 83 ), // #383 + INST(Ktestw , VexRm , V(000F00,99,_,0,0,_,_,_ ), 0 , 74 , 0 , 99 , 82 ), // #384 + INST(Kunpckbw , VexRvm , V(660F00,4B,_,1,0,_,_,_ ), 0 , 67 , 0 , 94 , 78 ), // #385 + INST(Kunpckdq , VexRvm , V(000F00,4B,_,1,1,_,_,_ ), 0 , 69 , 0 , 94 , 77 ), // #386 + INST(Kunpckwd , VexRvm , V(000F00,4B,_,1,0,_,_,_ ), 0 , 70 , 0 , 94 , 77 ), // #387 + INST(Kxnorb , VexRvm , V(660F00,46,_,1,0,_,_,_ ), 0 , 67 , 0 , 101, 76 ), // #388 + INST(Kxnord , VexRvm , V(660F00,46,_,1,1,_,_,_ ), 0 , 68 , 0 , 101, 77 ), // #389 + INST(Kxnorq , VexRvm , V(000F00,46,_,1,1,_,_,_ ), 0 , 69 , 0 , 101, 77 ), // #390 + INST(Kxnorw , VexRvm , V(000F00,46,_,1,0,_,_,_ ), 0 , 70 , 0 , 101, 78 ), // #391 + INST(Kxorb , VexRvm , V(660F00,47,_,1,0,_,_,_ ), 0 , 67 , 0 , 101, 76 ), // #392 + INST(Kxord , VexRvm , V(660F00,47,_,1,1,_,_,_ ), 0 , 68 , 0 , 101, 77 ), // #393 + INST(Kxorq , VexRvm , V(000F00,47,_,1,1,_,_,_ ), 0 , 69 , 0 , 101, 77 ), // #394 + INST(Kxorw , VexRvm , V(000F00,47,_,1,0,_,_,_ ), 0 , 70 , 0 , 101, 78 ), // #395 + INST(Lahf , X86Op , O(000000,9F,_,_,_,_,_,_ ), 0 , 0 , 0 , 102, 85 ), // #396 + INST(Lar , X86Rm , O(000F00,02,_,_,_,_,_,_ ), 0 , 5 , 0 , 103, 11 ), // #397 + INST(Lcall , X86LcallLjmp , O(000000,FF,3,_,_,_,_,_ ), O(000000,9A,_,_,_,_,_,_ ), 77 , 40 , 104, 1 ), // #398 + INST(Lddqu , ExtRm , O(F20F00,F0,_,_,_,_,_,_ ), 0 , 6 , 0 , 105, 7 ), // #399 + INST(Ldmxcsr , X86M_Only , O(000F00,AE,2,_,_,_,_,_ ), 0 , 78 , 0 , 106, 6 ), // #400 + INST(Lds , X86Rm , O(000000,C5,_,_,_,_,_,_ ), 0 , 0 , 0 , 107, 0 ), // #401 + INST(Ldtilecfg , AmxCfg , V(000F38,49,_,0,0,_,_,_ ), 0 , 11 , 0 , 108, 86 ), // #402 + INST(Lea , X86Lea , O(000000,8D,_,_,x,_,_,_ ), 0 , 0 , 0 , 109, 0 ), // #403 + INST(Leave , X86Op , O(000000,C9,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 0 ), // #404 + INST(Les , X86Rm , O(000000,C4,_,_,_,_,_,_ ), 0 , 0 , 0 , 107, 0 ), // #405 + INST(Lfence , X86Fence , O(000F00,AE,5,_,_,_,_,_ ), 0 , 79 , 0 , 31 , 5 ), // #406 + INST(Lfs , X86Rm , O(000F00,B4,_,_,_,_,_,_ ), 0 , 5 , 0 , 110, 0 ), // #407 + INST(Lgdt , X86M_Only , O(000F00,01,2,_,_,_,_,_ ), 0 , 78 , 0 , 32 , 0 ), // #408 + INST(Lgs , X86Rm , O(000F00,B5,_,_,_,_,_,_ ), 0 , 5 , 0 , 110, 0 ), // #409 + INST(Lidt , X86M_Only , O(000F00,01,3,_,_,_,_,_ ), 0 , 80 , 0 , 32 , 0 ), // #410 + INST(Ljmp , X86LcallLjmp , O(000000,FF,5,_,_,_,_,_ ), O(000000,EA,_,_,_,_,_,_ ), 64 , 41 , 111, 0 ), // #411 + INST(Lldt , X86M_NoSize , O(000F00,00,2,_,_,_,_,_ ), 0 , 78 , 0 , 112, 0 ), // #412 + INST(Llwpcb , VexR_Wx , V(XOP_M9,12,0,0,x,_,_,_ ), 0 , 81 , 0 , 113, 87 ), // #413 + INST(Lmsw , X86M_NoSize , O(000F00,01,6,_,_,_,_,_ ), 0 , 82 , 0 , 112, 0 ), // #414 + INST(Lods , X86StrRm , O(000000,AC,_,_,_,_,_,_ ), 0 , 0 , 0 , 114, 88 ), // #415 + INST(Loop , X86JecxzLoop , 0 , O(000000,E2,_,_,_,_,_,_ ), 0 , 42 , 115, 0 ), // #416 + INST(Loope , X86JecxzLoop , 0 , O(000000,E1,_,_,_,_,_,_ ), 0 , 43 , 115, 71 ), // #417 + INST(Loopne , X86JecxzLoop , 0 , O(000000,E0,_,_,_,_,_,_ ), 0 , 44 , 115, 71 ), // #418 + INST(Lsl , X86Rm , O(000F00,03,_,_,_,_,_,_ ), 0 , 5 , 0 , 116, 11 ), // #419 + INST(Lss , X86Rm , O(000F00,B2,_,_,_,_,_,_ ), 0 , 5 , 0 , 110, 0 ), // #420 + INST(Ltr , X86M_NoSize , O(000F00,00,3,_,_,_,_,_ ), 0 , 80 , 0 , 112, 0 ), // #421 + INST(Lwpins , VexVmi4_Wx , V(XOP_MA,12,0,0,x,_,_,_ ), 0 , 83 , 0 , 117, 87 ), // #422 + INST(Lwpval , VexVmi4_Wx , V(XOP_MA,12,1,0,x,_,_,_ ), 0 , 84 , 0 , 117, 87 ), // #423 + INST(Lzcnt , X86Rm_Raw66H , O(F30F00,BD,_,_,x,_,_,_ ), 0 , 7 , 0 , 23 , 89 ), // #424 + INST(Maskmovdqu , ExtRm_ZDI , O(660F00,F7,_,_,_,_,_,_ ), 0 , 4 , 0 , 118, 5 ), // #425 + INST(Maskmovq , ExtRm_ZDI , O(000F00,F7,_,_,_,_,_,_ ), 0 , 5 , 0 , 119, 90 ), // #426 + INST(Maxpd , ExtRm , O(660F00,5F,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #427 + INST(Maxps , ExtRm , O(000F00,5F,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #428 + INST(Maxsd , ExtRm , O(F20F00,5F,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #429 + INST(Maxss , ExtRm , O(F30F00,5F,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 6 ), // #430 + INST(Mcommit , X86Op , O(F30F01,FA,_,_,_,_,_,_ ), 0 , 27 , 0 , 31 , 91 ), // #431 + INST(Mfence , X86Fence , O(000F00,AE,6,_,_,_,_,_ ), 0 , 82 , 0 , 31 , 5 ), // #432 + INST(Minpd , ExtRm , O(660F00,5D,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #433 + INST(Minps , ExtRm , O(000F00,5D,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #434 + INST(Minsd , ExtRm , O(F20F00,5D,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #435 + INST(Minss , ExtRm , O(F30F00,5D,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 6 ), // #436 + INST(Monitor , X86Op , O(000F01,C8,_,_,_,_,_,_ ), 0 , 23 , 0 , 120, 92 ), // #437 + INST(Monitorx , X86Op , O(000F01,FA,_,_,_,_,_,_ ), 0 , 23 , 0 , 120, 93 ), // #438 + INST(Mov , X86Mov , 0 , 0 , 0 , 0 , 121, 94 ), // #439 + INST(Movabs , X86Movabs , 0 , 0 , 0 , 0 , 122, 0 ), // #440 + INST(Movapd , ExtMov , O(660F00,28,_,_,_,_,_,_ ), O(660F00,29,_,_,_,_,_,_ ), 4 , 45 , 123, 95 ), // #441 + INST(Movaps , ExtMov , O(000F00,28,_,_,_,_,_,_ ), O(000F00,29,_,_,_,_,_,_ ), 5 , 46 , 123, 96 ), // #442 + INST(Movbe , ExtMovbe , O(000F38,F0,_,_,x,_,_,_ ), O(000F38,F1,_,_,x,_,_,_ ), 1 , 47 , 124, 97 ), // #443 + INST(Movd , ExtMovd , O(000F00,6E,_,_,_,_,_,_ ), O(000F00,7E,_,_,_,_,_,_ ), 5 , 48 , 125, 98 ), // #444 + INST(Movddup , ExtMov , O(F20F00,12,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 7 ), // #445 + INST(Movdir64b , X86EnqcmdMovdir64b , O(660F38,F8,_,_,_,_,_,_ ), 0 , 2 , 0 , 126, 99 ), // #446 + INST(Movdiri , X86MovntiMovdiri , O(000F38,F9,_,_,_,_,_,_ ), 0 , 1 , 0 , 3 , 100), // #447 + INST(Movdq2q , ExtMov , O(F20F00,D6,_,_,_,_,_,_ ), 0 , 6 , 0 , 127, 5 ), // #448 + INST(Movdqa , ExtMov , O(660F00,6F,_,_,_,_,_,_ ), O(660F00,7F,_,_,_,_,_,_ ), 4 , 49 , 123, 95 ), // #449 + INST(Movdqu , ExtMov , O(F30F00,6F,_,_,_,_,_,_ ), O(F30F00,7F,_,_,_,_,_,_ ), 7 , 50 , 123, 95 ), // #450 + INST(Movhlps , ExtMov , O(000F00,12,_,_,_,_,_,_ ), 0 , 5 , 0 , 128, 6 ), // #451 + INST(Movhpd , ExtMov , O(660F00,16,_,_,_,_,_,_ ), O(660F00,17,_,_,_,_,_,_ ), 4 , 51 , 129, 5 ), // #452 + INST(Movhps , ExtMov , O(000F00,16,_,_,_,_,_,_ ), O(000F00,17,_,_,_,_,_,_ ), 5 , 52 , 129, 6 ), // #453 + INST(Movlhps , ExtMov , O(000F00,16,_,_,_,_,_,_ ), 0 , 5 , 0 , 128, 6 ), // #454 + INST(Movlpd , ExtMov , O(660F00,12,_,_,_,_,_,_ ), O(660F00,13,_,_,_,_,_,_ ), 4 , 53 , 129, 5 ), // #455 + INST(Movlps , ExtMov , O(000F00,12,_,_,_,_,_,_ ), O(000F00,13,_,_,_,_,_,_ ), 5 , 54 , 129, 6 ), // #456 + INST(Movmskpd , ExtMov , O(660F00,50,_,_,_,_,_,_ ), 0 , 4 , 0 , 130, 5 ), // #457 + INST(Movmskps , ExtMov , O(000F00,50,_,_,_,_,_,_ ), 0 , 5 , 0 , 130, 6 ), // #458 + INST(Movntdq , ExtMov , 0 , O(660F00,E7,_,_,_,_,_,_ ), 0 , 55 , 131, 5 ), // #459 + INST(Movntdqa , ExtMov , O(660F38,2A,_,_,_,_,_,_ ), 0 , 2 , 0 , 105, 13 ), // #460 + INST(Movnti , X86MovntiMovdiri , O(000F00,C3,_,_,x,_,_,_ ), 0 , 5 , 0 , 3 , 5 ), // #461 + INST(Movntpd , ExtMov , 0 , O(660F00,2B,_,_,_,_,_,_ ), 0 , 56 , 131, 5 ), // #462 + INST(Movntps , ExtMov , 0 , O(000F00,2B,_,_,_,_,_,_ ), 0 , 57 , 131, 6 ), // #463 + INST(Movntq , ExtMov , 0 , O(000F00,E7,_,_,_,_,_,_ ), 0 , 58 , 132, 90 ), // #464 + INST(Movntsd , ExtMov , 0 , O(F20F00,2B,_,_,_,_,_,_ ), 0 , 59 , 133, 51 ), // #465 + INST(Movntss , ExtMov , 0 , O(F30F00,2B,_,_,_,_,_,_ ), 0 , 60 , 134, 51 ), // #466 + INST(Movq , ExtMovq , O(000F00,6E,_,_,x,_,_,_ ), O(000F00,7E,_,_,x,_,_,_ ), 5 , 48 , 135, 101), // #467 + INST(Movq2dq , ExtRm , O(F30F00,D6,_,_,_,_,_,_ ), 0 , 7 , 0 , 136, 5 ), // #468 + INST(Movs , X86StrMm , O(000000,A4,_,_,_,_,_,_ ), 0 , 0 , 0 , 137, 88 ), // #469 + INST(Movsd , ExtMov , O(F20F00,10,_,_,_,_,_,_ ), O(F20F00,11,_,_,_,_,_,_ ), 6 , 61 , 138, 95 ), // #470 + INST(Movshdup , ExtRm , O(F30F00,16,_,_,_,_,_,_ ), 0 , 7 , 0 , 6 , 7 ), // #471 + INST(Movsldup , ExtRm , O(F30F00,12,_,_,_,_,_,_ ), 0 , 7 , 0 , 6 , 7 ), // #472 + INST(Movss , ExtMov , O(F30F00,10,_,_,_,_,_,_ ), O(F30F00,11,_,_,_,_,_,_ ), 7 , 62 , 139, 96 ), // #473 + INST(Movsx , X86MovsxMovzx , O(000F00,BE,_,_,x,_,_,_ ), 0 , 5 , 0 , 140, 0 ), // #474 + INST(Movsxd , X86Rm , O(000000,63,_,_,x,_,_,_ ), 0 , 0 , 0 , 141, 0 ), // #475 + INST(Movupd , ExtMov , O(660F00,10,_,_,_,_,_,_ ), O(660F00,11,_,_,_,_,_,_ ), 4 , 63 , 123, 95 ), // #476 + INST(Movups , ExtMov , O(000F00,10,_,_,_,_,_,_ ), O(000F00,11,_,_,_,_,_,_ ), 5 , 64 , 123, 96 ), // #477 + INST(Movzx , X86MovsxMovzx , O(000F00,B6,_,_,x,_,_,_ ), 0 , 5 , 0 , 140, 0 ), // #478 + INST(Mpsadbw , ExtRmi , O(660F3A,42,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 13 ), // #479 + INST(Mul , X86M_GPB_MulDiv , O(000000,F6,4,_,x,_,_,_ ), 0 , 10 , 0 , 58 , 1 ), // #480 + INST(Mulpd , ExtRm , O(660F00,59,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #481 + INST(Mulps , ExtRm , O(000F00,59,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #482 + INST(Mulsd , ExtRm , O(F20F00,59,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #483 + INST(Mulss , ExtRm , O(F30F00,59,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 6 ), // #484 + INST(Mulx , VexRvm_ZDX_Wx , V(F20F38,F6,_,0,x,_,_,_ ), 0 , 85 , 0 , 142, 102), // #485 + INST(Mwait , X86Op , O(000F01,C9,_,_,_,_,_,_ ), 0 , 23 , 0 , 143, 92 ), // #486 + INST(Mwaitx , X86Op , O(000F01,FB,_,_,_,_,_,_ ), 0 , 23 , 0 , 144, 93 ), // #487 + INST(Neg , X86M_GPB , O(000000,F6,3,_,x,_,_,_ ), 0 , 77 , 0 , 145, 1 ), // #488 + INST(Nop , X86M_Nop , O(000000,90,_,_,_,_,_,_ ), 0 , 0 , 0 , 146, 0 ), // #489 + INST(Not , X86M_GPB , O(000000,F6,2,_,x,_,_,_ ), 0 , 3 , 0 , 145, 0 ), // #490 + INST(Or , X86Arith , O(000000,08,1,_,x,_,_,_ ), 0 , 33 , 0 , 147, 1 ), // #491 + INST(Orpd , ExtRm , O(660F00,56,_,_,_,_,_,_ ), 0 , 4 , 0 , 12 , 5 ), // #492 + INST(Orps , ExtRm , O(000F00,56,_,_,_,_,_,_ ), 0 , 5 , 0 , 12 , 6 ), // #493 + INST(Out , X86Out , O(000000,EE,_,_,_,_,_,_ ), O(000000,E6,_,_,_,_,_,_ ), 0 , 65 , 148, 0 ), // #494 + INST(Outs , X86Outs , O(000000,6E,_,_,_,_,_,_ ), 0 , 0 , 0 , 149, 0 ), // #495 + INST(Pabsb , ExtRm_P , O(000F38,1C,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #496 + INST(Pabsd , ExtRm_P , O(000F38,1E,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #497 + INST(Pabsw , ExtRm_P , O(000F38,1D,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #498 + INST(Packssdw , ExtRm_P , O(000F00,6B,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #499 + INST(Packsswb , ExtRm_P , O(000F00,63,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #500 + INST(Packusdw , ExtRm , O(660F38,2B,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 13 ), // #501 + INST(Packuswb , ExtRm_P , O(000F00,67,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #502 + INST(Paddb , ExtRm_P , O(000F00,FC,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #503 + INST(Paddd , ExtRm_P , O(000F00,FE,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #504 + INST(Paddq , ExtRm_P , O(000F00,D4,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 5 ), // #505 + INST(Paddsb , ExtRm_P , O(000F00,EC,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #506 + INST(Paddsw , ExtRm_P , O(000F00,ED,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #507 + INST(Paddusb , ExtRm_P , O(000F00,DC,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #508 + INST(Paddusw , ExtRm_P , O(000F00,DD,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #509 + INST(Paddw , ExtRm_P , O(000F00,FD,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #510 + INST(Palignr , ExtRmi_P , O(000F3A,0F,_,_,_,_,_,_ ), 0 , 86 , 0 , 151, 103), // #511 + INST(Pand , ExtRm_P , O(000F00,DB,_,_,_,_,_,_ ), 0 , 5 , 0 , 152, 98 ), // #512 + INST(Pandn , ExtRm_P , O(000F00,DF,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #513 + INST(Pause , X86Op , O(F30000,90,_,_,_,_,_,_ ), 0 , 87 , 0 , 31 , 0 ), // #514 + INST(Pavgb , ExtRm_P , O(000F00,E0,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 104), // #515 + INST(Pavgusb , Ext3dNow , O(000F0F,BF,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #516 + INST(Pavgw , ExtRm_P , O(000F00,E3,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 104), // #517 + INST(Pblendvb , ExtRm_XMM0 , O(660F38,10,_,_,_,_,_,_ ), 0 , 2 , 0 , 16 , 13 ), // #518 + INST(Pblendw , ExtRmi , O(660F3A,0E,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 13 ), // #519 + INST(Pclmulqdq , ExtRmi , O(660F3A,44,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 105), // #520 + INST(Pcmpeqb , ExtRm_P , O(000F00,74,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #521 + INST(Pcmpeqd , ExtRm_P , O(000F00,76,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #522 + INST(Pcmpeqq , ExtRm , O(660F38,29,_,_,_,_,_,_ ), 0 , 2 , 0 , 155, 13 ), // #523 + INST(Pcmpeqw , ExtRm_P , O(000F00,75,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #524 + INST(Pcmpestri , ExtRmi , O(660F3A,61,_,_,_,_,_,_ ), 0 , 9 , 0 , 156, 106), // #525 + INST(Pcmpestrm , ExtRmi , O(660F3A,60,_,_,_,_,_,_ ), 0 , 9 , 0 , 157, 106), // #526 + INST(Pcmpgtb , ExtRm_P , O(000F00,64,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #527 + INST(Pcmpgtd , ExtRm_P , O(000F00,66,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #528 + INST(Pcmpgtq , ExtRm , O(660F38,37,_,_,_,_,_,_ ), 0 , 2 , 0 , 155, 46 ), // #529 + INST(Pcmpgtw , ExtRm_P , O(000F00,65,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #530 + INST(Pcmpistri , ExtRmi , O(660F3A,63,_,_,_,_,_,_ ), 0 , 9 , 0 , 158, 106), // #531 + INST(Pcmpistrm , ExtRmi , O(660F3A,62,_,_,_,_,_,_ ), 0 , 9 , 0 , 159, 106), // #532 + INST(Pconfig , X86Op , O(000F01,C5,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 107), // #533 + INST(Pdep , VexRvm_Wx , V(F20F38,F5,_,0,x,_,_,_ ), 0 , 85 , 0 , 11 , 102), // #534 + INST(Pext , VexRvm_Wx , V(F30F38,F5,_,0,x,_,_,_ ), 0 , 89 , 0 , 11 , 102), // #535 + INST(Pextrb , ExtExtract , O(000F3A,14,_,_,_,_,_,_ ), 0 , 86 , 0 , 160, 13 ), // #536 + INST(Pextrd , ExtExtract , O(000F3A,16,_,_,_,_,_,_ ), 0 , 86 , 0 , 62 , 13 ), // #537 + INST(Pextrq , ExtExtract , O(000F3A,16,_,_,1,_,_,_ ), 0 , 90 , 0 , 161, 13 ), // #538 + INST(Pextrw , ExtPextrw , O(000F00,C5,_,_,_,_,_,_ ), O(000F3A,15,_,_,_,_,_,_ ), 5 , 66 , 162, 108), // #539 + INST(Pf2id , Ext3dNow , O(000F0F,1D,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #540 + INST(Pf2iw , Ext3dNow , O(000F0F,1C,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 109), // #541 + INST(Pfacc , Ext3dNow , O(000F0F,AE,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #542 + INST(Pfadd , Ext3dNow , O(000F0F,9E,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #543 + INST(Pfcmpeq , Ext3dNow , O(000F0F,B0,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #544 + INST(Pfcmpge , Ext3dNow , O(000F0F,90,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #545 + INST(Pfcmpgt , Ext3dNow , O(000F0F,A0,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #546 + INST(Pfmax , Ext3dNow , O(000F0F,A4,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #547 + INST(Pfmin , Ext3dNow , O(000F0F,94,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #548 + INST(Pfmul , Ext3dNow , O(000F0F,B4,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #549 + INST(Pfnacc , Ext3dNow , O(000F0F,8A,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 109), // #550 + INST(Pfpnacc , Ext3dNow , O(000F0F,8E,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 109), // #551 + INST(Pfrcp , Ext3dNow , O(000F0F,96,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #552 + INST(Pfrcpit1 , Ext3dNow , O(000F0F,A6,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #553 + INST(Pfrcpit2 , Ext3dNow , O(000F0F,B6,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #554 + INST(Pfrcpv , Ext3dNow , O(000F0F,86,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 110), // #555 + INST(Pfrsqit1 , Ext3dNow , O(000F0F,A7,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #556 + INST(Pfrsqrt , Ext3dNow , O(000F0F,97,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #557 + INST(Pfrsqrtv , Ext3dNow , O(000F0F,87,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 110), // #558 + INST(Pfsub , Ext3dNow , O(000F0F,9A,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #559 + INST(Pfsubr , Ext3dNow , O(000F0F,AA,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #560 + INST(Phaddd , ExtRm_P , O(000F38,02,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #561 + INST(Phaddsw , ExtRm_P , O(000F38,03,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #562 + INST(Phaddw , ExtRm_P , O(000F38,01,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #563 + INST(Phminposuw , ExtRm , O(660F38,41,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 13 ), // #564 + INST(Phsubd , ExtRm_P , O(000F38,06,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #565 + INST(Phsubsw , ExtRm_P , O(000F38,07,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #566 + INST(Phsubw , ExtRm_P , O(000F38,05,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #567 + INST(Pi2fd , Ext3dNow , O(000F0F,0D,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #568 + INST(Pi2fw , Ext3dNow , O(000F0F,0C,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 109), // #569 + INST(Pinsrb , ExtRmi , O(660F3A,20,_,_,_,_,_,_ ), 0 , 9 , 0 , 163, 13 ), // #570 + INST(Pinsrd , ExtRmi , O(660F3A,22,_,_,_,_,_,_ ), 0 , 9 , 0 , 164, 13 ), // #571 + INST(Pinsrq , ExtRmi , O(660F3A,22,_,_,1,_,_,_ ), 0 , 91 , 0 , 165, 13 ), // #572 + INST(Pinsrw , ExtRmi_P , O(000F00,C4,_,_,_,_,_,_ ), 0 , 5 , 0 , 166, 104), // #573 + INST(Pmaddubsw , ExtRm_P , O(000F38,04,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #574 + INST(Pmaddwd , ExtRm_P , O(000F00,F5,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #575 + INST(Pmaxsb , ExtRm , O(660F38,3C,_,_,_,_,_,_ ), 0 , 2 , 0 , 12 , 13 ), // #576 + INST(Pmaxsd , ExtRm , O(660F38,3D,_,_,_,_,_,_ ), 0 , 2 , 0 , 12 , 13 ), // #577 + INST(Pmaxsw , ExtRm_P , O(000F00,EE,_,_,_,_,_,_ ), 0 , 5 , 0 , 152, 104), // #578 + INST(Pmaxub , ExtRm_P , O(000F00,DE,_,_,_,_,_,_ ), 0 , 5 , 0 , 152, 104), // #579 + INST(Pmaxud , ExtRm , O(660F38,3F,_,_,_,_,_,_ ), 0 , 2 , 0 , 12 , 13 ), // #580 + INST(Pmaxuw , ExtRm , O(660F38,3E,_,_,_,_,_,_ ), 0 , 2 , 0 , 12 , 13 ), // #581 + INST(Pminsb , ExtRm , O(660F38,38,_,_,_,_,_,_ ), 0 , 2 , 0 , 12 , 13 ), // #582 + INST(Pminsd , ExtRm , O(660F38,39,_,_,_,_,_,_ ), 0 , 2 , 0 , 12 , 13 ), // #583 + INST(Pminsw , ExtRm_P , O(000F00,EA,_,_,_,_,_,_ ), 0 , 5 , 0 , 152, 104), // #584 + INST(Pminub , ExtRm_P , O(000F00,DA,_,_,_,_,_,_ ), 0 , 5 , 0 , 152, 104), // #585 + INST(Pminud , ExtRm , O(660F38,3B,_,_,_,_,_,_ ), 0 , 2 , 0 , 12 , 13 ), // #586 + INST(Pminuw , ExtRm , O(660F38,3A,_,_,_,_,_,_ ), 0 , 2 , 0 , 12 , 13 ), // #587 + INST(Pmovmskb , ExtRm_P , O(000F00,D7,_,_,_,_,_,_ ), 0 , 5 , 0 , 167, 104), // #588 + INST(Pmovsxbd , ExtRm , O(660F38,21,_,_,_,_,_,_ ), 0 , 2 , 0 , 8 , 13 ), // #589 + INST(Pmovsxbq , ExtRm , O(660F38,22,_,_,_,_,_,_ ), 0 , 2 , 0 , 168, 13 ), // #590 + INST(Pmovsxbw , ExtRm , O(660F38,20,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 13 ), // #591 + INST(Pmovsxdq , ExtRm , O(660F38,25,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 13 ), // #592 + INST(Pmovsxwd , ExtRm , O(660F38,23,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 13 ), // #593 + INST(Pmovsxwq , ExtRm , O(660F38,24,_,_,_,_,_,_ ), 0 , 2 , 0 , 8 , 13 ), // #594 + INST(Pmovzxbd , ExtRm , O(660F38,31,_,_,_,_,_,_ ), 0 , 2 , 0 , 8 , 13 ), // #595 + INST(Pmovzxbq , ExtRm , O(660F38,32,_,_,_,_,_,_ ), 0 , 2 , 0 , 168, 13 ), // #596 + INST(Pmovzxbw , ExtRm , O(660F38,30,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 13 ), // #597 + INST(Pmovzxdq , ExtRm , O(660F38,35,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 13 ), // #598 + INST(Pmovzxwd , ExtRm , O(660F38,33,_,_,_,_,_,_ ), 0 , 2 , 0 , 7 , 13 ), // #599 + INST(Pmovzxwq , ExtRm , O(660F38,34,_,_,_,_,_,_ ), 0 , 2 , 0 , 8 , 13 ), // #600 + INST(Pmuldq , ExtRm , O(660F38,28,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 13 ), // #601 + INST(Pmulhrsw , ExtRm_P , O(000F38,0B,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #602 + INST(Pmulhrw , Ext3dNow , O(000F0F,B7,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 58 ), // #603 + INST(Pmulhuw , ExtRm_P , O(000F00,E4,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 104), // #604 + INST(Pmulhw , ExtRm_P , O(000F00,E5,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #605 + INST(Pmulld , ExtRm , O(660F38,40,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 13 ), // #606 + INST(Pmullw , ExtRm_P , O(000F00,D5,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #607 + INST(Pmuludq , ExtRm_P , O(000F00,F4,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 5 ), // #608 + INST(Pop , X86Pop , O(000000,8F,0,_,_,_,_,_ ), O(000000,58,_,_,_,_,_,_ ), 0 , 67 , 169, 0 ), // #609 + INST(Popa , X86Op , O(660000,61,_,_,_,_,_,_ ), 0 , 21 , 0 , 85 , 0 ), // #610 + INST(Popad , X86Op , O(000000,61,_,_,_,_,_,_ ), 0 , 0 , 0 , 85 , 0 ), // #611 + INST(Popcnt , X86Rm_Raw66H , O(F30F00,B8,_,_,x,_,_,_ ), 0 , 7 , 0 , 23 , 111), // #612 + INST(Popf , X86Op , O(660000,9D,_,_,_,_,_,_ ), 0 , 21 , 0 , 31 , 112), // #613 + INST(Popfd , X86Op , O(000000,9D,_,_,_,_,_,_ ), 0 , 0 , 0 , 85 , 112), // #614 + INST(Popfq , X86Op , O(000000,9D,_,_,_,_,_,_ ), 0 , 0 , 0 , 34 , 112), // #615 + INST(Por , ExtRm_P , O(000F00,EB,_,_,_,_,_,_ ), 0 , 5 , 0 , 152, 98 ), // #616 + INST(Prefetch , X86M_Only , O(000F00,0D,0,_,_,_,_,_ ), 0 , 5 , 0 , 32 , 58 ), // #617 + INST(Prefetchit0 , X86M_Only , O(000F00,18,7,_,_,_,_,_ ), 0 , 24 , 0 , 75 , 113), // #618 + INST(Prefetchit1 , X86M_Only , O(000F00,18,6,_,_,_,_,_ ), 0 , 82 , 0 , 75 , 113), // #619 + INST(Prefetchnta , X86M_Only , O(000F00,18,0,_,_,_,_,_ ), 0 , 5 , 0 , 32 , 6 ), // #620 + INST(Prefetcht0 , X86M_Only , O(000F00,18,1,_,_,_,_,_ ), 0 , 32 , 0 , 32 , 6 ), // #621 + INST(Prefetcht1 , X86M_Only , O(000F00,18,2,_,_,_,_,_ ), 0 , 78 , 0 , 32 , 6 ), // #622 + INST(Prefetcht2 , X86M_Only , O(000F00,18,3,_,_,_,_,_ ), 0 , 80 , 0 , 32 , 6 ), // #623 + INST(Prefetchw , X86M_Only , O(000F00,0D,1,_,_,_,_,_ ), 0 , 32 , 0 , 32 , 114), // #624 + INST(Prefetchwt1 , X86M_Only , O(000F00,0D,2,_,_,_,_,_ ), 0 , 78 , 0 , 32 , 115), // #625 + INST(Psadbw , ExtRm_P , O(000F00,F6,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 104), // #626 + INST(Pshufb , ExtRm_P , O(000F38,00,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #627 + INST(Pshufd , ExtRmi , O(660F00,70,_,_,_,_,_,_ ), 0 , 4 , 0 , 9 , 5 ), // #628 + INST(Pshufhw , ExtRmi , O(F30F00,70,_,_,_,_,_,_ ), 0 , 7 , 0 , 9 , 5 ), // #629 + INST(Pshuflw , ExtRmi , O(F20F00,70,_,_,_,_,_,_ ), 0 , 6 , 0 , 9 , 5 ), // #630 + INST(Pshufw , ExtRmi_P , O(000F00,70,_,_,_,_,_,_ ), 0 , 5 , 0 , 170, 90 ), // #631 + INST(Psignb , ExtRm_P , O(000F38,08,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #632 + INST(Psignd , ExtRm_P , O(000F38,0A,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #633 + INST(Psignw , ExtRm_P , O(000F38,09,_,_,_,_,_,_ ), 0 , 1 , 0 , 150, 103), // #634 + INST(Pslld , ExtRmRi_P , O(000F00,F2,_,_,_,_,_,_ ), O(000F00,72,6,_,_,_,_,_ ), 5 , 68 , 171, 98 ), // #635 + INST(Pslldq , ExtRmRi , 0 , O(660F00,73,7,_,_,_,_,_ ), 0 , 69 , 172, 5 ), // #636 + INST(Psllq , ExtRmRi_P , O(000F00,F3,_,_,_,_,_,_ ), O(000F00,73,6,_,_,_,_,_ ), 5 , 70 , 171, 98 ), // #637 + INST(Psllw , ExtRmRi_P , O(000F00,F1,_,_,_,_,_,_ ), O(000F00,71,6,_,_,_,_,_ ), 5 , 71 , 171, 98 ), // #638 + INST(Psmash , X86Op , O(F30F01,FF,_,_,_,_,_,_ ), 0 , 27 , 0 , 34 , 116), // #639 + INST(Psrad , ExtRmRi_P , O(000F00,E2,_,_,_,_,_,_ ), O(000F00,72,4,_,_,_,_,_ ), 5 , 72 , 171, 98 ), // #640 + INST(Psraw , ExtRmRi_P , O(000F00,E1,_,_,_,_,_,_ ), O(000F00,71,4,_,_,_,_,_ ), 5 , 73 , 171, 98 ), // #641 + INST(Psrld , ExtRmRi_P , O(000F00,D2,_,_,_,_,_,_ ), O(000F00,72,2,_,_,_,_,_ ), 5 , 74 , 171, 98 ), // #642 + INST(Psrldq , ExtRmRi , 0 , O(660F00,73,3,_,_,_,_,_ ), 0 , 75 , 172, 5 ), // #643 + INST(Psrlq , ExtRmRi_P , O(000F00,D3,_,_,_,_,_,_ ), O(000F00,73,2,_,_,_,_,_ ), 5 , 76 , 171, 98 ), // #644 + INST(Psrlw , ExtRmRi_P , O(000F00,D1,_,_,_,_,_,_ ), O(000F00,71,2,_,_,_,_,_ ), 5 , 77 , 171, 98 ), // #645 + INST(Psubb , ExtRm_P , O(000F00,F8,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #646 + INST(Psubd , ExtRm_P , O(000F00,FA,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #647 + INST(Psubq , ExtRm_P , O(000F00,FB,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 5 ), // #648 + INST(Psubsb , ExtRm_P , O(000F00,E8,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #649 + INST(Psubsw , ExtRm_P , O(000F00,E9,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #650 + INST(Psubusb , ExtRm_P , O(000F00,D8,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #651 + INST(Psubusw , ExtRm_P , O(000F00,D9,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #652 + INST(Psubw , ExtRm_P , O(000F00,F9,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #653 + INST(Pswapd , Ext3dNow , O(000F0F,BB,_,_,_,_,_,_ ), 0 , 88 , 0 , 154, 109), // #654 + INST(Ptest , ExtRm , O(660F38,17,_,_,_,_,_,_ ), 0 , 2 , 0 , 6 , 117), // #655 + INST(Ptwrite , X86M , O(F30F00,AE,4,_,_,_,_,_ ), 0 , 92 , 0 , 173, 118), // #656 + INST(Punpckhbw , ExtRm_P , O(000F00,68,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #657 + INST(Punpckhdq , ExtRm_P , O(000F00,6A,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #658 + INST(Punpckhqdq , ExtRm , O(660F00,6D,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #659 + INST(Punpckhwd , ExtRm_P , O(000F00,69,_,_,_,_,_,_ ), 0 , 5 , 0 , 150, 98 ), // #660 + INST(Punpcklbw , ExtRm_P , O(000F00,60,_,_,_,_,_,_ ), 0 , 5 , 0 , 174, 98 ), // #661 + INST(Punpckldq , ExtRm_P , O(000F00,62,_,_,_,_,_,_ ), 0 , 5 , 0 , 174, 98 ), // #662 + INST(Punpcklqdq , ExtRm , O(660F00,6C,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #663 + INST(Punpcklwd , ExtRm_P , O(000F00,61,_,_,_,_,_,_ ), 0 , 5 , 0 , 174, 98 ), // #664 + INST(Push , X86Push , O(000000,FF,6,_,_,_,_,_ ), O(000000,50,_,_,_,_,_,_ ), 34 , 78 , 175, 0 ), // #665 + INST(Pusha , X86Op , O(660000,60,_,_,_,_,_,_ ), 0 , 21 , 0 , 85 , 0 ), // #666 + INST(Pushad , X86Op , O(000000,60,_,_,_,_,_,_ ), 0 , 0 , 0 , 85 , 0 ), // #667 + INST(Pushf , X86Op , O(660000,9C,_,_,_,_,_,_ ), 0 , 21 , 0 , 31 , 119), // #668 + INST(Pushfd , X86Op , O(000000,9C,_,_,_,_,_,_ ), 0 , 0 , 0 , 85 , 119), // #669 + INST(Pushfq , X86Op , O(000000,9C,_,_,_,_,_,_ ), 0 , 0 , 0 , 34 , 119), // #670 + INST(Pvalidate , X86Op , O(F20F01,FF,_,_,_,_,_,_ ), 0 , 93 , 0 , 31 , 120), // #671 + INST(Pxor , ExtRm_P , O(000F00,EF,_,_,_,_,_,_ ), 0 , 5 , 0 , 153, 98 ), // #672 + INST(Rcl , X86Rot , O(000000,D0,2,_,x,_,_,_ ), 0 , 3 , 0 , 176, 121), // #673 + INST(Rcpps , ExtRm , O(000F00,53,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #674 + INST(Rcpss , ExtRm , O(F30F00,53,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 6 ), // #675 + INST(Rcr , X86Rot , O(000000,D0,3,_,x,_,_,_ ), 0 , 77 , 0 , 176, 121), // #676 + INST(Rdfsbase , X86M , O(F30F00,AE,0,_,x,_,_,_ ), 0 , 7 , 0 , 177, 122), // #677 + INST(Rdgsbase , X86M , O(F30F00,AE,1,_,x,_,_,_ ), 0 , 94 , 0 , 177, 122), // #678 + INST(Rdmsr , X86Op , O(000F00,32,_,_,_,_,_,_ ), 0 , 5 , 0 , 178, 123), // #679 + INST(Rdpid , X86R_Native , O(F30F00,C7,7,_,_,_,_,_ ), 0 , 95 , 0 , 179, 124), // #680 + INST(Rdpkru , X86Op , O(000F01,EE,_,_,_,_,_,_ ), 0 , 23 , 0 , 178, 125), // #681 + INST(Rdpmc , X86Op , O(000F00,33,_,_,_,_,_,_ ), 0 , 5 , 0 , 178, 0 ), // #682 + INST(Rdpru , X86Op , O(000F01,FD,_,_,_,_,_,_ ), 0 , 23 , 0 , 178, 126), // #683 + INST(Rdrand , X86M , O(000F00,C7,6,_,x,_,_,_ ), 0 , 82 , 0 , 24 , 127), // #684 + INST(Rdseed , X86M , O(000F00,C7,7,_,x,_,_,_ ), 0 , 24 , 0 , 24 , 128), // #685 + INST(Rdsspd , X86M , O(F30F00,1E,1,_,_,_,_,_ ), 0 , 94 , 0 , 80 , 65 ), // #686 + INST(Rdsspq , X86M , O(F30F00,1E,1,_,_,_,_,_ ), 0 , 94 , 0 , 81 , 65 ), // #687 + INST(Rdtsc , X86Op , O(000F00,31,_,_,_,_,_,_ ), 0 , 5 , 0 , 29 , 129), // #688 + INST(Rdtscp , X86Op , O(000F01,F9,_,_,_,_,_,_ ), 0 , 23 , 0 , 178, 130), // #689 + INST(Ret , X86Ret , O(000000,C2,_,_,_,_,_,_ ), 0 , 0 , 0 , 180, 0 ), // #690 + INST(Retf , X86Ret , O(000000,CA,_,_,x,_,_,_ ), 0 , 0 , 0 , 181, 0 ), // #691 + INST(Rmpadjust , X86Op , O(F30F01,FE,_,_,_,_,_,_ ), 0 , 27 , 0 , 34 , 116), // #692 + INST(Rmpupdate , X86Op , O(F20F01,FE,_,_,_,_,_,_ ), 0 , 93 , 0 , 34 , 116), // #693 + INST(Rol , X86Rot , O(000000,D0,0,_,x,_,_,_ ), 0 , 0 , 0 , 176, 131), // #694 + INST(Ror , X86Rot , O(000000,D0,1,_,x,_,_,_ ), 0 , 33 , 0 , 176, 131), // #695 + INST(Rorx , VexRmi_Wx , V(F20F3A,F0,_,0,x,_,_,_ ), 0 , 96 , 0 , 182, 102), // #696 + INST(Roundpd , ExtRmi , O(660F3A,09,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 13 ), // #697 + INST(Roundps , ExtRmi , O(660F3A,08,_,_,_,_,_,_ ), 0 , 9 , 0 , 9 , 13 ), // #698 + INST(Roundsd , ExtRmi , O(660F3A,0B,_,_,_,_,_,_ ), 0 , 9 , 0 , 39 , 13 ), // #699 + INST(Roundss , ExtRmi , O(660F3A,0A,_,_,_,_,_,_ ), 0 , 9 , 0 , 40 , 13 ), // #700 + INST(Rsm , X86Op , O(000F00,AA,_,_,_,_,_,_ ), 0 , 5 , 0 , 85 , 1 ), // #701 + INST(Rsqrtps , ExtRm , O(000F00,52,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #702 + INST(Rsqrtss , ExtRm , O(F30F00,52,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 6 ), // #703 + INST(Rstorssp , X86M_Only , O(F30F00,01,5,_,_,_,_,_ ), 0 , 65 , 0 , 33 , 25 ), // #704 + INST(Sahf , X86Op , O(000000,9E,_,_,_,_,_,_ ), 0 , 0 , 0 , 102, 132), // #705 + INST(Sal , X86Rot , O(000000,D0,4,_,x,_,_,_ ), 0 , 10 , 0 , 176, 1 ), // #706 + INST(Sar , X86Rot , O(000000,D0,7,_,x,_,_,_ ), 0 , 29 , 0 , 176, 1 ), // #707 + INST(Sarx , VexRmv_Wx , V(F30F38,F7,_,0,x,_,_,_ ), 0 , 89 , 0 , 14 , 102), // #708 + INST(Saveprevssp , X86Op , O(F30F01,EA,_,_,_,_,_,_ ), 0 , 27 , 0 , 31 , 25 ), // #709 + INST(Sbb , X86Arith , O(000000,18,3,_,x,_,_,_ ), 0 , 77 , 0 , 183, 3 ), // #710 + INST(Scas , X86StrRm , O(000000,AE,_,_,_,_,_,_ ), 0 , 0 , 0 , 184, 39 ), // #711 + INST(Seamcall , X86Op , O(660F01,CF,_,_,_,_,_,_ ), 0 , 97 , 0 , 31 , 133), // #712 + INST(Seamops , X86Op , O(660F01,CE,_,_,_,_,_,_ ), 0 , 97 , 0 , 31 , 133), // #713 + INST(Seamret , X86Op , O(660F01,CD,_,_,_,_,_,_ ), 0 , 97 , 0 , 31 , 133), // #714 + INST(Senduipi , X86M_NoSize , O(F30F00,C7,6,_,_,_,_,_ ), 0 , 26 , 0 , 81 , 26 ), // #715 + INST(Serialize , X86Op , O(000F01,E8,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 134), // #716 + INST(Seta , X86Set , O(000F00,97,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 69 ), // #717 + INST(Setae , X86Set , O(000F00,93,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 70 ), // #718 + INST(Setb , X86Set , O(000F00,92,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 70 ), // #719 + INST(Setbe , X86Set , O(000F00,96,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 69 ), // #720 + INST(Setc , X86Set , O(000F00,92,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 70 ), // #721 + INST(Sete , X86Set , O(000F00,94,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 71 ), // #722 + INST(Setg , X86Set , O(000F00,9F,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 72 ), // #723 + INST(Setge , X86Set , O(000F00,9D,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 73 ), // #724 + INST(Setl , X86Set , O(000F00,9C,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 73 ), // #725 + INST(Setle , X86Set , O(000F00,9E,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 72 ), // #726 + INST(Setna , X86Set , O(000F00,96,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 69 ), // #727 + INST(Setnae , X86Set , O(000F00,92,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 70 ), // #728 + INST(Setnb , X86Set , O(000F00,93,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 70 ), // #729 + INST(Setnbe , X86Set , O(000F00,97,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 69 ), // #730 + INST(Setnc , X86Set , O(000F00,93,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 70 ), // #731 + INST(Setne , X86Set , O(000F00,95,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 71 ), // #732 + INST(Setng , X86Set , O(000F00,9E,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 72 ), // #733 + INST(Setnge , X86Set , O(000F00,9C,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 73 ), // #734 + INST(Setnl , X86Set , O(000F00,9D,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 73 ), // #735 + INST(Setnle , X86Set , O(000F00,9F,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 72 ), // #736 + INST(Setno , X86Set , O(000F00,91,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 66 ), // #737 + INST(Setnp , X86Set , O(000F00,9B,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 74 ), // #738 + INST(Setns , X86Set , O(000F00,99,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 75 ), // #739 + INST(Setnz , X86Set , O(000F00,95,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 71 ), // #740 + INST(Seto , X86Set , O(000F00,90,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 66 ), // #741 + INST(Setp , X86Set , O(000F00,9A,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 74 ), // #742 + INST(Setpe , X86Set , O(000F00,9A,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 74 ), // #743 + INST(Setpo , X86Set , O(000F00,9B,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 74 ), // #744 + INST(Sets , X86Set , O(000F00,98,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 75 ), // #745 + INST(Setssbsy , X86Op , O(F30F01,E8,_,_,_,_,_,_ ), 0 , 27 , 0 , 31 , 65 ), // #746 + INST(Setz , X86Set , O(000F00,94,_,_,_,_,_,_ ), 0 , 5 , 0 , 185, 71 ), // #747 + INST(Sfence , X86Fence , O(000F00,AE,7,_,_,_,_,_ ), 0 , 24 , 0 , 31 , 6 ), // #748 + INST(Sgdt , X86M_Only , O(000F00,01,0,_,_,_,_,_ ), 0 , 5 , 0 , 32 , 0 ), // #749 + INST(Sha1msg1 , ExtRm , O(000F38,C9,_,_,_,_,_,_ ), 0 , 1 , 0 , 6 , 135), // #750 + INST(Sha1msg2 , ExtRm , O(000F38,CA,_,_,_,_,_,_ ), 0 , 1 , 0 , 6 , 135), // #751 + INST(Sha1nexte , ExtRm , O(000F38,C8,_,_,_,_,_,_ ), 0 , 1 , 0 , 6 , 135), // #752 + INST(Sha1rnds4 , ExtRmi , O(000F3A,CC,_,_,_,_,_,_ ), 0 , 86 , 0 , 9 , 135), // #753 + INST(Sha256msg1 , ExtRm , O(000F38,CC,_,_,_,_,_,_ ), 0 , 1 , 0 , 6 , 135), // #754 + INST(Sha256msg2 , ExtRm , O(000F38,CD,_,_,_,_,_,_ ), 0 , 1 , 0 , 6 , 135), // #755 + INST(Sha256rnds2 , ExtRm_XMM0 , O(000F38,CB,_,_,_,_,_,_ ), 0 , 1 , 0 , 16 , 135), // #756 + INST(Shl , X86Rot , O(000000,D0,4,_,x,_,_,_ ), 0 , 10 , 0 , 176, 1 ), // #757 + INST(Shld , X86ShldShrd , O(000F00,A4,_,_,x,_,_,_ ), 0 , 5 , 0 , 186, 1 ), // #758 + INST(Shlx , VexRmv_Wx , V(660F38,F7,_,0,x,_,_,_ ), 0 , 30 , 0 , 14 , 102), // #759 + INST(Shr , X86Rot , O(000000,D0,5,_,x,_,_,_ ), 0 , 64 , 0 , 176, 1 ), // #760 + INST(Shrd , X86ShldShrd , O(000F00,AC,_,_,x,_,_,_ ), 0 , 5 , 0 , 186, 1 ), // #761 + INST(Shrx , VexRmv_Wx , V(F20F38,F7,_,0,x,_,_,_ ), 0 , 85 , 0 , 14 , 102), // #762 + INST(Shufpd , ExtRmi , O(660F00,C6,_,_,_,_,_,_ ), 0 , 4 , 0 , 9 , 5 ), // #763 + INST(Shufps , ExtRmi , O(000F00,C6,_,_,_,_,_,_ ), 0 , 5 , 0 , 9 , 6 ), // #764 + INST(Sidt , X86M_Only , O(000F00,01,1,_,_,_,_,_ ), 0 , 32 , 0 , 32 , 0 ), // #765 + INST(Skinit , X86Op_xAX , O(000F01,DE,_,_,_,_,_,_ ), 0 , 23 , 0 , 56 , 136), // #766 + INST(Sldt , X86M_NoMemSize , O(000F00,00,0,_,_,_,_,_ ), 0 , 5 , 0 , 187, 0 ), // #767 + INST(Slwpcb , VexR_Wx , V(XOP_M9,12,1,0,x,_,_,_ ), 0 , 13 , 0 , 113, 87 ), // #768 + INST(Smsw , X86M_NoMemSize , O(000F00,01,4,_,_,_,_,_ ), 0 , 98 , 0 , 187, 0 ), // #769 + INST(Sqrtpd , ExtRm , O(660F00,51,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #770 + INST(Sqrtps , ExtRm , O(000F00,51,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #771 + INST(Sqrtsd , ExtRm , O(F20F00,51,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #772 + INST(Sqrtss , ExtRm , O(F30F00,51,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 6 ), // #773 + INST(Stac , X86Op , O(000F01,CB,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 17 ), // #774 + INST(Stc , X86Op , O(000000,F9,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 18 ), // #775 + INST(Std , X86Op , O(000000,FD,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 19 ), // #776 + INST(Stgi , X86Op , O(000F01,DC,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 136), // #777 + INST(Sti , X86Op , O(000000,FB,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 24 ), // #778 + INST(Stmxcsr , X86M_Only , O(000F00,AE,3,_,_,_,_,_ ), 0 , 80 , 0 , 106, 6 ), // #779 + INST(Stos , X86StrMr , O(000000,AA,_,_,_,_,_,_ ), 0 , 0 , 0 , 188, 88 ), // #780 + INST(Str , X86M_NoMemSize , O(000F00,00,1,_,_,_,_,_ ), 0 , 32 , 0 , 187, 0 ), // #781 + INST(Sttilecfg , AmxCfg , V(660F38,49,_,0,0,_,_,_ ), 0 , 30 , 0 , 108, 86 ), // #782 + INST(Stui , X86Op , O(F30F01,EF,_,_,_,_,_,_ ), 0 , 27 , 0 , 34 , 26 ), // #783 + INST(Sub , X86Arith , O(000000,28,5,_,x,_,_,_ ), 0 , 64 , 0 , 183, 1 ), // #784 + INST(Subpd , ExtRm , O(660F00,5C,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #785 + INST(Subps , ExtRm , O(000F00,5C,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #786 + INST(Subsd , ExtRm , O(F20F00,5C,_,_,_,_,_,_ ), 0 , 6 , 0 , 7 , 5 ), // #787 + INST(Subss , ExtRm , O(F30F00,5C,_,_,_,_,_,_ ), 0 , 7 , 0 , 8 , 6 ), // #788 + INST(Swapgs , X86Op , O(000F01,F8,_,_,_,_,_,_ ), 0 , 23 , 0 , 34 , 0 ), // #789 + INST(Syscall , X86Op , O(000F00,05,_,_,_,_,_,_ ), 0 , 5 , 0 , 34 , 0 ), // #790 + INST(Sysenter , X86Op , O(000F00,34,_,_,_,_,_,_ ), 0 , 5 , 0 , 31 , 0 ), // #791 + INST(Sysexit , X86Op , O(000F00,35,_,_,_,_,_,_ ), 0 , 5 , 0 , 31 , 0 ), // #792 + INST(Sysexitq , X86Op , O(000F00,35,_,_,1,_,_,_ ), 0 , 62 , 0 , 34 , 0 ), // #793 + INST(Sysret , X86Op , O(000F00,07,_,_,_,_,_,_ ), 0 , 5 , 0 , 34 , 0 ), // #794 + INST(Sysretq , X86Op , O(000F00,07,_,_,1,_,_,_ ), 0 , 62 , 0 , 34 , 0 ), // #795 + INST(T1mskc , VexVm_Wx , V(XOP_M9,01,7,0,x,_,_,_ ), 0 , 99 , 0 , 15 , 12 ), // #796 + INST(Tcmmimfp16ps , AmxRmv , V(660F38,6C,_,0,0,_,_,_ ), 0 , 30 , 0 , 189, 137), // #797 + INST(Tcmmrlfp16ps , AmxRmv , V(000F38,6C,_,0,0,_,_,_ ), 0 , 11 , 0 , 189, 137), // #798 + INST(Tdcall , X86Op , O(660F01,CC,_,_,_,_,_,_ ), 0 , 97 , 0 , 31 , 133), // #799 + INST(Tdpbf16ps , AmxRmv , V(F30F38,5C,_,0,0,_,_,_ ), 0 , 89 , 0 , 189, 138), // #800 + INST(Tdpbssd , AmxRmv , V(F20F38,5E,_,0,0,_,_,_ ), 0 , 85 , 0 , 189, 139), // #801 + INST(Tdpbsud , AmxRmv , V(F30F38,5E,_,0,0,_,_,_ ), 0 , 89 , 0 , 189, 139), // #802 + INST(Tdpbusd , AmxRmv , V(660F38,5E,_,0,0,_,_,_ ), 0 , 30 , 0 , 189, 139), // #803 + INST(Tdpbuud , AmxRmv , V(000F38,5E,_,0,0,_,_,_ ), 0 , 11 , 0 , 189, 139), // #804 + INST(Tdpfp16ps , AmxRmv , V(F20F38,5C,_,0,0,_,_,_ ), 0 , 85 , 0 , 189, 140), // #805 + INST(Test , X86Test , O(000000,84,_,_,x,_,_,_ ), O(000000,F6,_,_,x,_,_,_ ), 0 , 79 , 190, 1 ), // #806 + INST(Testui , X86Op , O(F30F01,ED,_,_,_,_,_,_ ), 0 , 27 , 0 , 34 , 141), // #807 + INST(Tileloadd , AmxRm , V(F20F38,4B,_,0,0,_,_,_ ), 0 , 85 , 0 , 191, 86 ), // #808 + INST(Tileloaddt1 , AmxRm , V(660F38,4B,_,0,0,_,_,_ ), 0 , 30 , 0 , 191, 86 ), // #809 + INST(Tilerelease , VexOpMod , V(000F38,49,0,0,0,_,_,_ ), 0 , 11 , 0 , 192, 86 ), // #810 + INST(Tilestored , AmxMr , V(F30F38,4B,_,0,0,_,_,_ ), 0 , 89 , 0 , 193, 86 ), // #811 + INST(Tilezero , AmxR , V(F20F38,49,_,0,0,_,_,_ ), 0 , 85 , 0 , 194, 86 ), // #812 + INST(Tlbsync , X86Op , O(000F01,FF,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 68 ), // #813 + INST(Tpause , X86R32_EDX_EAX , O(660F00,AE,6,_,_,_,_,_ ), 0 , 28 , 0 , 195, 142), // #814 + INST(Tzcnt , X86Rm_Raw66H , O(F30F00,BC,_,_,x,_,_,_ ), 0 , 7 , 0 , 23 , 10 ), // #815 + INST(Tzmsk , VexVm_Wx , V(XOP_M9,01,4,0,x,_,_,_ ), 0 , 100, 0 , 15 , 12 ), // #816 + INST(Ucomisd , ExtRm , O(660F00,2E,_,_,_,_,_,_ ), 0 , 4 , 0 , 7 , 43 ), // #817 + INST(Ucomiss , ExtRm , O(000F00,2E,_,_,_,_,_,_ ), 0 , 5 , 0 , 8 , 44 ), // #818 + INST(Ud0 , X86Rm , O(000F00,FF,_,_,_,_,_,_ ), 0 , 5 , 0 , 196, 0 ), // #819 + INST(Ud1 , X86Rm , O(000F00,B9,_,_,_,_,_,_ ), 0 , 5 , 0 , 196, 0 ), // #820 + INST(Ud2 , X86Op , O(000F00,0B,_,_,_,_,_,_ ), 0 , 5 , 0 , 31 , 0 ), // #821 + INST(Uiret , X86Op , O(F30F01,EC,_,_,_,_,_,_ ), 0 , 27 , 0 , 34 , 26 ), // #822 + INST(Umonitor , X86R_FromM , O(F30F00,AE,6,_,_,_,_,_ ), 0 , 26 , 0 , 197, 143), // #823 + INST(Umwait , X86R32_EDX_EAX , O(F20F00,AE,6,_,_,_,_,_ ), 0 , 101, 0 , 195, 142), // #824 + INST(Unpckhpd , ExtRm , O(660F00,15,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #825 + INST(Unpckhps , ExtRm , O(000F00,15,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #826 + INST(Unpcklpd , ExtRm , O(660F00,14,_,_,_,_,_,_ ), 0 , 4 , 0 , 6 , 5 ), // #827 + INST(Unpcklps , ExtRm , O(000F00,14,_,_,_,_,_,_ ), 0 , 5 , 0 , 6 , 6 ), // #828 + INST(V4fmaddps , VexRm_T1_4X , E(F20F38,9A,_,2,_,0,4,T4X), 0 , 102, 0 , 198, 144), // #829 + INST(V4fmaddss , VexRm_T1_4X , E(F20F38,9B,_,0,_,0,4,T4X), 0 , 103, 0 , 199, 144), // #830 + INST(V4fnmaddps , VexRm_T1_4X , E(F20F38,AA,_,2,_,0,4,T4X), 0 , 102, 0 , 198, 144), // #831 + INST(V4fnmaddss , VexRm_T1_4X , E(F20F38,AB,_,0,_,0,4,T4X), 0 , 103, 0 , 199, 144), // #832 + INST(Vaddpd , VexRvm_Lx , V(660F00,58,_,x,I,1,4,FV ), 0 , 104, 0 , 200, 145), // #833 + INST(Vaddph , VexRvm_Lx , E(00MAP5,58,_,_,_,0,4,FV ), 0 , 105, 0 , 201, 146), // #834 + INST(Vaddps , VexRvm_Lx , V(000F00,58,_,x,I,0,4,FV ), 0 , 106, 0 , 202, 145), // #835 + INST(Vaddsd , VexRvm , V(F20F00,58,_,I,I,1,3,T1S), 0 , 107, 0 , 203, 147), // #836 + INST(Vaddsh , VexRvm , E(F3MAP5,58,_,_,_,0,1,T1S), 0 , 108, 0 , 204, 148), // #837 + INST(Vaddss , VexRvm , V(F30F00,58,_,I,I,0,2,T1S), 0 , 109, 0 , 205, 147), // #838 + INST(Vaddsubpd , VexRvm_Lx , V(660F00,D0,_,x,I,_,_,_ ), 0 , 71 , 0 , 206, 149), // #839 + INST(Vaddsubps , VexRvm_Lx , V(F20F00,D0,_,x,I,_,_,_ ), 0 , 110, 0 , 206, 149), // #840 + INST(Vaesdec , VexRvm_Lx , V(660F38,DE,_,x,I,_,4,FVM), 0 , 111, 0 , 207, 150), // #841 + INST(Vaesdeclast , VexRvm_Lx , V(660F38,DF,_,x,I,_,4,FVM), 0 , 111, 0 , 207, 150), // #842 + INST(Vaesenc , VexRvm_Lx , V(660F38,DC,_,x,I,_,4,FVM), 0 , 111, 0 , 207, 150), // #843 + INST(Vaesenclast , VexRvm_Lx , V(660F38,DD,_,x,I,_,4,FVM), 0 , 111, 0 , 207, 150), // #844 + INST(Vaesimc , VexRm , V(660F38,DB,_,0,I,_,_,_ ), 0 , 30 , 0 , 208, 151), // #845 + INST(Vaeskeygenassist , VexRmi , V(660F3A,DF,_,0,I,_,_,_ ), 0 , 75 , 0 , 209, 151), // #846 + INST(Valignd , VexRvmi_Lx , E(660F3A,03,_,x,_,0,4,FV ), 0 , 112, 0 , 210, 152), // #847 + INST(Valignq , VexRvmi_Lx , E(660F3A,03,_,x,_,1,4,FV ), 0 , 113, 0 , 211, 152), // #848 + INST(Vandnpd , VexRvm_Lx , V(660F00,55,_,x,I,1,4,FV ), 0 , 104, 0 , 212, 153), // #849 + INST(Vandnps , VexRvm_Lx , V(000F00,55,_,x,I,0,4,FV ), 0 , 106, 0 , 213, 153), // #850 + INST(Vandpd , VexRvm_Lx , V(660F00,54,_,x,I,1,4,FV ), 0 , 104, 0 , 214, 153), // #851 + INST(Vandps , VexRvm_Lx , V(000F00,54,_,x,I,0,4,FV ), 0 , 106, 0 , 215, 153), // #852 + INST(Vbcstnebf162ps , VexRm_Lx , V(F30F38,B1,_,x,0,_,_,_ ), 0 , 89 , 0 , 216, 154), // #853 + INST(Vbcstnesh2ps , VexRm_Lx , V(660F38,B1,_,x,0,_,_,_ ), 0 , 30 , 0 , 216, 154), // #854 + INST(Vblendmpd , VexRvm_Lx , E(660F38,65,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #855 + INST(Vblendmps , VexRvm_Lx , E(660F38,65,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 152), // #856 + INST(Vblendpd , VexRvmi_Lx , V(660F3A,0D,_,x,I,_,_,_ ), 0 , 75 , 0 , 219, 149), // #857 + INST(Vblendps , VexRvmi_Lx , V(660F3A,0C,_,x,I,_,_,_ ), 0 , 75 , 0 , 219, 149), // #858 + INST(Vblendvpd , VexRvmr_Lx , V(660F3A,4B,_,x,0,_,_,_ ), 0 , 75 , 0 , 220, 149), // #859 + INST(Vblendvps , VexRvmr_Lx , V(660F3A,4A,_,x,0,_,_,_ ), 0 , 75 , 0 , 220, 149), // #860 + INST(Vbroadcastf128 , VexRm , V(660F38,1A,_,1,0,_,_,_ ), 0 , 116, 0 , 221, 149), // #861 + INST(Vbroadcastf32x2 , VexRm_Lx , E(660F38,19,_,x,_,0,3,T2 ), 0 , 117, 0 , 222, 155), // #862 + INST(Vbroadcastf32x4 , VexRm_Lx , E(660F38,1A,_,x,_,0,4,T4 ), 0 , 118, 0 , 223, 78 ), // #863 + INST(Vbroadcastf32x8 , VexRm , E(660F38,1B,_,2,_,0,5,T8 ), 0 , 119, 0 , 224, 76 ), // #864 + INST(Vbroadcastf64x2 , VexRm_Lx , E(660F38,1A,_,x,_,1,4,T2 ), 0 , 120, 0 , 223, 155), // #865 + INST(Vbroadcastf64x4 , VexRm , E(660F38,1B,_,2,_,1,5,T4 ), 0 , 121, 0 , 224, 78 ), // #866 + INST(Vbroadcasti128 , VexRm , V(660F38,5A,_,1,0,_,_,_ ), 0 , 116, 0 , 221, 156), // #867 + INST(Vbroadcasti32x2 , VexRm_Lx , E(660F38,59,_,x,_,0,3,T2 ), 0 , 117, 0 , 225, 155), // #868 + INST(Vbroadcasti32x4 , VexRm_Lx , E(660F38,5A,_,x,_,0,4,T4 ), 0 , 118, 0 , 223, 152), // #869 + INST(Vbroadcasti32x8 , VexRm , E(660F38,5B,_,2,_,0,5,T8 ), 0 , 119, 0 , 224, 76 ), // #870 + INST(Vbroadcasti64x2 , VexRm_Lx , E(660F38,5A,_,x,_,1,4,T2 ), 0 , 120, 0 , 223, 155), // #871 + INST(Vbroadcasti64x4 , VexRm , E(660F38,5B,_,2,_,1,5,T4 ), 0 , 121, 0 , 224, 78 ), // #872 + INST(Vbroadcastsd , VexRm_Lx , V(660F38,19,_,x,0,1,3,T1S), 0 , 122, 0 , 226, 157), // #873 + INST(Vbroadcastss , VexRm_Lx , V(660F38,18,_,x,0,0,2,T1S), 0 , 123, 0 , 227, 157), // #874 + INST(Vcmppd , VexRvmi_Lx_KEvex , V(660F00,C2,_,x,I,1,4,FV ), 0 , 104, 0 , 228, 145), // #875 + INST(Vcmpph , VexRvmi_Lx_KEvex , E(000F3A,C2,_,_,_,0,4,FV ), 0 , 124, 0 , 229, 146), // #876 + INST(Vcmpps , VexRvmi_Lx_KEvex , V(000F00,C2,_,x,I,0,4,FV ), 0 , 106, 0 , 230, 145), // #877 + INST(Vcmpsd , VexRvmi_KEvex , V(F20F00,C2,_,I,I,1,3,T1S), 0 , 107, 0 , 231, 147), // #878 + INST(Vcmpsh , VexRvmi_KEvex , E(F30F3A,C2,_,_,_,0,1,T1S), 0 , 125, 0 , 232, 148), // #879 + INST(Vcmpss , VexRvmi_KEvex , V(F30F00,C2,_,I,I,0,2,T1S), 0 , 109, 0 , 233, 147), // #880 + INST(Vcomisd , VexRm , V(660F00,2F,_,I,I,1,3,T1S), 0 , 126, 0 , 234, 158), // #881 + INST(Vcomish , VexRm , E(00MAP5,2F,_,_,_,0,1,T1S), 0 , 127, 0 , 235, 159), // #882 + INST(Vcomiss , VexRm , V(000F00,2F,_,I,I,0,2,T1S), 0 , 128, 0 , 236, 158), // #883 + INST(Vcompresspd , VexMr_Lx , E(660F38,8A,_,x,_,1,3,T1S), 0 , 129, 0 , 237, 152), // #884 + INST(Vcompressps , VexMr_Lx , E(660F38,8A,_,x,_,0,2,T1S), 0 , 130, 0 , 237, 152), // #885 + INST(Vcvtdq2pd , VexRm_Lx , V(F30F00,E6,_,x,I,0,3,HV ), 0 , 131, 0 , 238, 145), // #886 + INST(Vcvtdq2ph , VexRm_Lx_Narrow , E(00MAP5,5B,_,x,0,0,4,FV ), 0 , 105, 0 , 239, 146), // #887 + INST(Vcvtdq2ps , VexRm_Lx , V(000F00,5B,_,x,I,0,4,FV ), 0 , 106, 0 , 240, 145), // #888 + INST(Vcvtne2ps2bf16 , VexRvm_Lx , E(F20F38,72,_,_,_,0,4,FV ), 0 , 132, 0 , 218, 160), // #889 + INST(Vcvtneebf162ps , VexRm_Lx , V(F30F38,B0,_,x,0,_,_,_ ), 0 , 89 , 0 , 241, 154), // #890 + INST(Vcvtneeph2ps , VexRm_Lx , V(660F38,B0,_,x,0,_,_,_ ), 0 , 30 , 0 , 241, 154), // #891 + INST(Vcvtneobf162ps , VexRm_Lx , V(F20F38,B0,_,x,0,_,_,_ ), 0 , 85 , 0 , 241, 154), // #892 + INST(Vcvtneoph2ps , VexRm_Lx , V(000F38,B0,_,x,0,_,_,_ ), 0 , 11 , 0 , 241, 154), // #893 + INST(Vcvtneps2bf16 , VexRm_Lx_Narrow , V(F30F38,72,_,_,_,0,4,FV ), 0 , 133, 0 , 242, 161), // #894 + INST(Vcvtpd2dq , VexRm_Lx_Narrow , V(F20F00,E6,_,x,I,1,4,FV ), 0 , 134, 0 , 243, 145), // #895 + INST(Vcvtpd2ph , VexRm_Lx , E(66MAP5,5A,_,_,_,1,4,FV ), 0 , 135, 0 , 244, 146), // #896 + INST(Vcvtpd2ps , VexRm_Lx_Narrow , V(660F00,5A,_,x,I,1,4,FV ), 0 , 104, 0 , 243, 145), // #897 + INST(Vcvtpd2qq , VexRm_Lx , E(660F00,7B,_,x,_,1,4,FV ), 0 , 136, 0 , 245, 155), // #898 + INST(Vcvtpd2udq , VexRm_Lx_Narrow , E(000F00,79,_,x,_,1,4,FV ), 0 , 137, 0 , 246, 152), // #899 + INST(Vcvtpd2uqq , VexRm_Lx , E(660F00,79,_,x,_,1,4,FV ), 0 , 136, 0 , 245, 155), // #900 + INST(Vcvtph2dq , VexRm_Lx , E(66MAP5,5B,_,_,_,0,3,HV ), 0 , 138, 0 , 247, 146), // #901 + INST(Vcvtph2pd , VexRm_Lx , E(00MAP5,5A,_,_,_,0,2,QV ), 0 , 139, 0 , 248, 146), // #902 + INST(Vcvtph2ps , VexRm_Lx , V(660F38,13,_,x,0,0,3,HVM), 0 , 140, 0 , 249, 162), // #903 + INST(Vcvtph2psx , VexRm_Lx , E(66MAP6,13,_,_,_,0,3,HV ), 0 , 141, 0 , 250, 146), // #904 + INST(Vcvtph2qq , VexRm_Lx , E(66MAP5,7B,_,_,_,0,2,QV ), 0 , 142, 0 , 251, 146), // #905 + INST(Vcvtph2udq , VexRm_Lx , E(00MAP5,79,_,_,_,0,3,HV ), 0 , 143, 0 , 247, 146), // #906 + INST(Vcvtph2uqq , VexRm_Lx , E(66MAP5,79,_,_,_,0,2,QV ), 0 , 142, 0 , 251, 146), // #907 + INST(Vcvtph2uw , VexRm_Lx , E(00MAP5,7D,_,_,_,0,4,FV ), 0 , 105, 0 , 252, 146), // #908 + INST(Vcvtph2w , VexRm_Lx , E(66MAP5,7D,_,_,_,0,4,FV ), 0 , 144, 0 , 252, 146), // #909 + INST(Vcvtps2dq , VexRm_Lx , V(660F00,5B,_,x,I,0,4,FV ), 0 , 145, 0 , 240, 145), // #910 + INST(Vcvtps2pd , VexRm_Lx , V(000F00,5A,_,x,I,0,3,HV ), 0 , 146, 0 , 253, 145), // #911 + INST(Vcvtps2ph , VexMri_Lx , V(660F3A,1D,_,x,0,0,3,HVM), 0 , 147, 0 , 254, 162), // #912 + INST(Vcvtps2phx , VexRm_Lx_Narrow , E(66MAP5,1D,_,_,_,0,4,FV ), 0 , 144, 0 , 239, 146), // #913 + INST(Vcvtps2qq , VexRm_Lx , E(660F00,7B,_,x,_,0,3,HV ), 0 , 148, 0 , 255, 155), // #914 + INST(Vcvtps2udq , VexRm_Lx , E(000F00,79,_,x,_,0,4,FV ), 0 , 149, 0 , 256, 152), // #915 + INST(Vcvtps2uqq , VexRm_Lx , E(660F00,79,_,x,_,0,3,HV ), 0 , 148, 0 , 255, 155), // #916 + INST(Vcvtqq2pd , VexRm_Lx , E(F30F00,E6,_,x,_,1,4,FV ), 0 , 150, 0 , 245, 155), // #917 + INST(Vcvtqq2ph , VexRm_Lx , E(00MAP5,5B,_,_,_,1,4,FV ), 0 , 151, 0 , 244, 146), // #918 + INST(Vcvtqq2ps , VexRm_Lx_Narrow , E(000F00,5B,_,x,_,1,4,FV ), 0 , 137, 0 , 246, 155), // #919 + INST(Vcvtsd2sh , VexRvm , E(F2MAP5,5A,_,_,_,1,3,T1S), 0 , 152, 0 , 257, 148), // #920 + INST(Vcvtsd2si , VexRm_Wx , V(F20F00,2D,_,I,x,x,3,T1F), 0 , 153, 0 , 258, 147), // #921 + INST(Vcvtsd2ss , VexRvm , V(F20F00,5A,_,I,I,1,3,T1S), 0 , 107, 0 , 203, 147), // #922 + INST(Vcvtsd2usi , VexRm_Wx , E(F20F00,79,_,I,_,x,3,T1F), 0 , 154, 0 , 259, 78 ), // #923 + INST(Vcvtsh2sd , VexRvm , E(F3MAP5,5A,_,_,_,0,1,T1S), 0 , 108, 0 , 260, 148), // #924 + INST(Vcvtsh2si , VexRm_Wx , E(F3MAP5,2D,_,_,_,x,1,T1S), 0 , 108, 0 , 261, 148), // #925 + INST(Vcvtsh2ss , VexRvm , E(00MAP6,13,_,_,_,0,1,T1S), 0 , 155, 0 , 260, 148), // #926 + INST(Vcvtsh2usi , VexRm_Wx , E(F3MAP5,79,_,_,_,x,1,T1S), 0 , 108, 0 , 261, 148), // #927 + INST(Vcvtsi2sd , VexRvm_Wx , V(F20F00,2A,_,I,x,x,2,T1W), 0 , 156, 0 , 262, 147), // #928 + INST(Vcvtsi2sh , VexRvm_Wx , E(F3MAP5,2A,_,_,_,x,2,T1W), 0 , 157, 0 , 263, 148), // #929 + INST(Vcvtsi2ss , VexRvm_Wx , V(F30F00,2A,_,I,x,x,2,T1W), 0 , 158, 0 , 262, 147), // #930 + INST(Vcvtss2sd , VexRvm , V(F30F00,5A,_,I,I,0,2,T1S), 0 , 109, 0 , 264, 147), // #931 + INST(Vcvtss2sh , VexRvm , E(00MAP5,1D,_,_,_,0,2,T1S), 0 , 159, 0 , 265, 148), // #932 + INST(Vcvtss2si , VexRm_Wx , V(F30F00,2D,_,I,x,x,2,T1F), 0 , 109, 0 , 266, 147), // #933 + INST(Vcvtss2usi , VexRm_Wx , E(F30F00,79,_,I,_,x,2,T1F), 0 , 160, 0 , 267, 78 ), // #934 + INST(Vcvttpd2dq , VexRm_Lx_Narrow , V(660F00,E6,_,x,I,1,4,FV ), 0 , 104, 0 , 268, 145), // #935 + INST(Vcvttpd2qq , VexRm_Lx , E(660F00,7A,_,x,_,1,4,FV ), 0 , 136, 0 , 269, 152), // #936 + INST(Vcvttpd2udq , VexRm_Lx_Narrow , E(000F00,78,_,x,_,1,4,FV ), 0 , 137, 0 , 270, 152), // #937 + INST(Vcvttpd2uqq , VexRm_Lx , E(660F00,78,_,x,_,1,4,FV ), 0 , 136, 0 , 269, 155), // #938 + INST(Vcvttph2dq , VexRm_Lx , E(F3MAP5,5B,_,_,_,0,3,HV ), 0 , 161, 0 , 250, 146), // #939 + INST(Vcvttph2qq , VexRm_Lx , E(66MAP5,7A,_,_,_,0,2,QV ), 0 , 142, 0 , 248, 146), // #940 + INST(Vcvttph2udq , VexRm_Lx , E(00MAP5,78,_,_,_,0,3,HV ), 0 , 143, 0 , 250, 146), // #941 + INST(Vcvttph2uqq , VexRm_Lx , E(66MAP5,78,_,_,_,0,2,QV ), 0 , 142, 0 , 248, 146), // #942 + INST(Vcvttph2uw , VexRm_Lx , E(00MAP5,7C,_,_,_,0,4,FV ), 0 , 105, 0 , 271, 146), // #943 + INST(Vcvttph2w , VexRm_Lx , E(66MAP5,7C,_,_,_,0,4,FV ), 0 , 144, 0 , 271, 146), // #944 + INST(Vcvttps2dq , VexRm_Lx , V(F30F00,5B,_,x,I,0,4,FV ), 0 , 162, 0 , 272, 145), // #945 + INST(Vcvttps2qq , VexRm_Lx , E(660F00,7A,_,x,_,0,3,HV ), 0 , 148, 0 , 273, 155), // #946 + INST(Vcvttps2udq , VexRm_Lx , E(000F00,78,_,x,_,0,4,FV ), 0 , 149, 0 , 274, 152), // #947 + INST(Vcvttps2uqq , VexRm_Lx , E(660F00,78,_,x,_,0,3,HV ), 0 , 148, 0 , 273, 155), // #948 + INST(Vcvttsd2si , VexRm_Wx , V(F20F00,2C,_,I,x,x,3,T1F), 0 , 153, 0 , 275, 147), // #949 + INST(Vcvttsd2usi , VexRm_Wx , E(F20F00,78,_,I,_,x,3,T1F), 0 , 154, 0 , 276, 78 ), // #950 + INST(Vcvttsh2si , VexRm_Wx , E(F3MAP5,2C,_,_,_,x,1,T1S), 0 , 108, 0 , 277, 148), // #951 + INST(Vcvttsh2usi , VexRm_Wx , E(F3MAP5,78,_,_,_,x,1,T1S), 0 , 108, 0 , 277, 148), // #952 + INST(Vcvttss2si , VexRm_Wx , V(F30F00,2C,_,I,x,x,2,T1F), 0 , 109, 0 , 278, 147), // #953 + INST(Vcvttss2usi , VexRm_Wx , E(F30F00,78,_,I,_,x,2,T1F), 0 , 160, 0 , 279, 78 ), // #954 + INST(Vcvtudq2pd , VexRm_Lx , E(F30F00,7A,_,x,_,0,3,HV ), 0 , 163, 0 , 280, 152), // #955 + INST(Vcvtudq2ph , VexRm_Lx_Narrow , E(F2MAP5,7A,_,_,_,0,4,FV ), 0 , 164, 0 , 239, 146), // #956 + INST(Vcvtudq2ps , VexRm_Lx , E(F20F00,7A,_,x,_,0,4,FV ), 0 , 165, 0 , 256, 152), // #957 + INST(Vcvtuqq2pd , VexRm_Lx , E(F30F00,7A,_,x,_,1,4,FV ), 0 , 150, 0 , 245, 155), // #958 + INST(Vcvtuqq2ph , VexRm_Lx , E(F2MAP5,7A,_,_,_,1,4,FV ), 0 , 166, 0 , 244, 146), // #959 + INST(Vcvtuqq2ps , VexRm_Lx_Narrow , E(F20F00,7A,_,x,_,1,4,FV ), 0 , 167, 0 , 246, 155), // #960 + INST(Vcvtusi2sd , VexRvm_Wx , E(F20F00,7B,_,I,_,x,2,T1W), 0 , 168, 0 , 281, 78 ), // #961 + INST(Vcvtusi2sh , VexRvm_Wx , E(F3MAP5,7B,_,_,_,x,2,T1W), 0 , 157, 0 , 263, 148), // #962 + INST(Vcvtusi2ss , VexRvm_Wx , E(F30F00,7B,_,I,_,x,2,T1W), 0 , 169, 0 , 281, 78 ), // #963 + INST(Vcvtuw2ph , VexRm_Lx , E(F2MAP5,7D,_,_,_,0,4,FV ), 0 , 164, 0 , 252, 146), // #964 + INST(Vcvtw2ph , VexRm_Lx , E(F3MAP5,7D,_,_,_,0,4,FV ), 0 , 170, 0 , 252, 146), // #965 + INST(Vdbpsadbw , VexRvmi_Lx , E(660F3A,42,_,x,_,0,4,FVM), 0 , 112, 0 , 282, 163), // #966 + INST(Vdivpd , VexRvm_Lx , V(660F00,5E,_,x,I,1,4,FV ), 0 , 104, 0 , 200, 145), // #967 + INST(Vdivph , VexRvm_Lx , E(00MAP5,5E,_,_,_,0,4,FV ), 0 , 105, 0 , 201, 146), // #968 + INST(Vdivps , VexRvm_Lx , V(000F00,5E,_,x,I,0,4,FV ), 0 , 106, 0 , 202, 145), // #969 + INST(Vdivsd , VexRvm , V(F20F00,5E,_,I,I,1,3,T1S), 0 , 107, 0 , 203, 147), // #970 + INST(Vdivsh , VexRvm , E(F3MAP5,5E,_,_,_,0,1,T1S), 0 , 108, 0 , 204, 148), // #971 + INST(Vdivss , VexRvm , V(F30F00,5E,_,I,I,0,2,T1S), 0 , 109, 0 , 205, 147), // #972 + INST(Vdpbf16ps , VexRvm_Lx , E(F30F38,52,_,_,_,0,4,FV ), 0 , 171, 0 , 218, 160), // #973 + INST(Vdppd , VexRvmi_Lx , V(660F3A,41,_,x,I,_,_,_ ), 0 , 75 , 0 , 283, 149), // #974 + INST(Vdpps , VexRvmi_Lx , V(660F3A,40,_,x,I,_,_,_ ), 0 , 75 , 0 , 219, 149), // #975 + INST(Verr , X86M_NoSize , O(000F00,00,4,_,_,_,_,_ ), 0 , 98 , 0 , 112, 11 ), // #976 + INST(Verw , X86M_NoSize , O(000F00,00,5,_,_,_,_,_ ), 0 , 79 , 0 , 112, 11 ), // #977 + INST(Vexp2pd , VexRm , E(660F38,C8,_,2,_,1,4,FV ), 0 , 172, 0 , 284, 164), // #978 + INST(Vexp2ps , VexRm , E(660F38,C8,_,2,_,0,4,FV ), 0 , 173, 0 , 285, 164), // #979 + INST(Vexpandpd , VexRm_Lx , E(660F38,88,_,x,_,1,3,T1S), 0 , 129, 0 , 286, 152), // #980 + INST(Vexpandps , VexRm_Lx , E(660F38,88,_,x,_,0,2,T1S), 0 , 130, 0 , 286, 152), // #981 + INST(Vextractf128 , VexMri , V(660F3A,19,_,1,0,_,_,_ ), 0 , 174, 0 , 287, 149), // #982 + INST(Vextractf32x4 , VexMri_Lx , E(660F3A,19,_,x,_,0,4,T4 ), 0 , 175, 0 , 288, 152), // #983 + INST(Vextractf32x8 , VexMri , E(660F3A,1B,_,2,_,0,5,T8 ), 0 , 176, 0 , 289, 76 ), // #984 + INST(Vextractf64x2 , VexMri_Lx , E(660F3A,19,_,x,_,1,4,T2 ), 0 , 177, 0 , 288, 155), // #985 + INST(Vextractf64x4 , VexMri , E(660F3A,1B,_,2,_,1,5,T4 ), 0 , 178, 0 , 289, 78 ), // #986 + INST(Vextracti128 , VexMri , V(660F3A,39,_,1,0,_,_,_ ), 0 , 174, 0 , 287, 156), // #987 + INST(Vextracti32x4 , VexMri_Lx , E(660F3A,39,_,x,_,0,4,T4 ), 0 , 175, 0 , 288, 152), // #988 + INST(Vextracti32x8 , VexMri , E(660F3A,3B,_,2,_,0,5,T8 ), 0 , 176, 0 , 289, 76 ), // #989 + INST(Vextracti64x2 , VexMri_Lx , E(660F3A,39,_,x,_,1,4,T2 ), 0 , 177, 0 , 288, 155), // #990 + INST(Vextracti64x4 , VexMri , E(660F3A,3B,_,2,_,1,5,T4 ), 0 , 178, 0 , 289, 78 ), // #991 + INST(Vextractps , VexMri , V(660F3A,17,_,0,I,I,2,T1S), 0 , 179, 0 , 290, 147), // #992 + INST(Vfcmaddcph , VexRvm_Lx , E(F2MAP6,56,_,_,_,0,4,FV ), 0 , 180, 0 , 291, 146), // #993 + INST(Vfcmaddcsh , VexRvm , E(F2MAP6,57,_,_,_,0,2,T1S), 0 , 181, 0 , 265, 148), // #994 + INST(Vfcmulcph , VexRvm_Lx , E(F2MAP6,D6,_,_,_,0,4,FV ), 0 , 180, 0 , 291, 146), // #995 + INST(Vfcmulcsh , VexRvm , E(F2MAP6,D7,_,_,_,0,2,T1S), 0 , 181, 0 , 265, 148), // #996 + INST(Vfixupimmpd , VexRvmi_Lx , E(660F3A,54,_,x,_,1,4,FV ), 0 , 113, 0 , 292, 152), // #997 + INST(Vfixupimmps , VexRvmi_Lx , E(660F3A,54,_,x,_,0,4,FV ), 0 , 112, 0 , 293, 152), // #998 + INST(Vfixupimmsd , VexRvmi , E(660F3A,55,_,I,_,1,3,T1S), 0 , 182, 0 , 294, 78 ), // #999 + INST(Vfixupimmss , VexRvmi , E(660F3A,55,_,I,_,0,2,T1S), 0 , 183, 0 , 295, 78 ), // #1000 + INST(Vfmadd132pd , VexRvm_Lx , V(660F38,98,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1001 + INST(Vfmadd132ph , VexRvm_Lx , E(66MAP6,98,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1002 + INST(Vfmadd132ps , VexRvm_Lx , V(660F38,98,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1003 + INST(Vfmadd132sd , VexRvm , V(660F38,99,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1004 + INST(Vfmadd132sh , VexRvm , E(66MAP6,99,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1005 + INST(Vfmadd132ss , VexRvm , V(660F38,99,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1006 + INST(Vfmadd213pd , VexRvm_Lx , V(660F38,A8,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1007 + INST(Vfmadd213ph , VexRvm_Lx , E(66MAP6,A8,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1008 + INST(Vfmadd213ps , VexRvm_Lx , V(660F38,A8,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1009 + INST(Vfmadd213sd , VexRvm , V(660F38,A9,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1010 + INST(Vfmadd213sh , VexRvm , E(66MAP6,A9,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1011 + INST(Vfmadd213ss , VexRvm , V(660F38,A9,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1012 + INST(Vfmadd231pd , VexRvm_Lx , V(660F38,B8,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1013 + INST(Vfmadd231ph , VexRvm_Lx , E(66MAP6,B8,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1014 + INST(Vfmadd231ps , VexRvm_Lx , V(660F38,B8,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1015 + INST(Vfmadd231sd , VexRvm , V(660F38,B9,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1016 + INST(Vfmadd231sh , VexRvm , E(66MAP6,B9,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1017 + INST(Vfmadd231ss , VexRvm , V(660F38,B9,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1018 + INST(Vfmaddcph , VexRvm_Lx , E(F3MAP6,56,_,_,_,0,4,FV ), 0 , 188, 0 , 291, 146), // #1019 + INST(Vfmaddcsh , VexRvm , E(F3MAP6,57,_,_,_,0,2,T1S), 0 , 189, 0 , 265, 148), // #1020 + INST(Vfmaddpd , Fma4_Lx , V(660F3A,69,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1021 + INST(Vfmaddps , Fma4_Lx , V(660F3A,68,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1022 + INST(Vfmaddsd , Fma4 , V(660F3A,6B,_,0,x,_,_,_ ), 0 , 75 , 0 , 297, 167), // #1023 + INST(Vfmaddss , Fma4 , V(660F3A,6A,_,0,x,_,_,_ ), 0 , 75 , 0 , 298, 167), // #1024 + INST(Vfmaddsub132pd , VexRvm_Lx , V(660F38,96,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1025 + INST(Vfmaddsub132ph , VexRvm_Lx , E(66MAP6,96,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1026 + INST(Vfmaddsub132ps , VexRvm_Lx , V(660F38,96,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1027 + INST(Vfmaddsub213pd , VexRvm_Lx , V(660F38,A6,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1028 + INST(Vfmaddsub213ph , VexRvm_Lx , E(66MAP6,A6,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1029 + INST(Vfmaddsub213ps , VexRvm_Lx , V(660F38,A6,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1030 + INST(Vfmaddsub231pd , VexRvm_Lx , V(660F38,B6,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1031 + INST(Vfmaddsub231ph , VexRvm_Lx , E(66MAP6,B6,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1032 + INST(Vfmaddsub231ps , VexRvm_Lx , V(660F38,B6,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1033 + INST(Vfmaddsubpd , Fma4_Lx , V(660F3A,5D,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1034 + INST(Vfmaddsubps , Fma4_Lx , V(660F3A,5C,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1035 + INST(Vfmsub132pd , VexRvm_Lx , V(660F38,9A,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1036 + INST(Vfmsub132ph , VexRvm_Lx , E(66MAP6,9A,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1037 + INST(Vfmsub132ps , VexRvm_Lx , V(660F38,9A,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1038 + INST(Vfmsub132sd , VexRvm , V(660F38,9B,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1039 + INST(Vfmsub132sh , VexRvm , E(66MAP6,9B,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1040 + INST(Vfmsub132ss , VexRvm , V(660F38,9B,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1041 + INST(Vfmsub213pd , VexRvm_Lx , V(660F38,AA,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1042 + INST(Vfmsub213ph , VexRvm_Lx , E(66MAP6,AA,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1043 + INST(Vfmsub213ps , VexRvm_Lx , V(660F38,AA,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1044 + INST(Vfmsub213sd , VexRvm , V(660F38,AB,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1045 + INST(Vfmsub213sh , VexRvm , E(66MAP6,AB,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1046 + INST(Vfmsub213ss , VexRvm , V(660F38,AB,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1047 + INST(Vfmsub231pd , VexRvm_Lx , V(660F38,BA,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1048 + INST(Vfmsub231ph , VexRvm_Lx , E(66MAP6,BA,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1049 + INST(Vfmsub231ps , VexRvm_Lx , V(660F38,BA,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1050 + INST(Vfmsub231sd , VexRvm , V(660F38,BB,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1051 + INST(Vfmsub231sh , VexRvm , E(66MAP6,BB,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1052 + INST(Vfmsub231ss , VexRvm , V(660F38,BB,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1053 + INST(Vfmsubadd132pd , VexRvm_Lx , V(660F38,97,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1054 + INST(Vfmsubadd132ph , VexRvm_Lx , E(66MAP6,97,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1055 + INST(Vfmsubadd132ps , VexRvm_Lx , V(660F38,97,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1056 + INST(Vfmsubadd213pd , VexRvm_Lx , V(660F38,A7,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1057 + INST(Vfmsubadd213ph , VexRvm_Lx , E(66MAP6,A7,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1058 + INST(Vfmsubadd213ps , VexRvm_Lx , V(660F38,A7,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1059 + INST(Vfmsubadd231pd , VexRvm_Lx , V(660F38,B7,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1060 + INST(Vfmsubadd231ph , VexRvm_Lx , E(66MAP6,B7,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1061 + INST(Vfmsubadd231ps , VexRvm_Lx , V(660F38,B7,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1062 + INST(Vfmsubaddpd , Fma4_Lx , V(660F3A,5F,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1063 + INST(Vfmsubaddps , Fma4_Lx , V(660F3A,5E,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1064 + INST(Vfmsubpd , Fma4_Lx , V(660F3A,6D,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1065 + INST(Vfmsubps , Fma4_Lx , V(660F3A,6C,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1066 + INST(Vfmsubsd , Fma4 , V(660F3A,6F,_,0,x,_,_,_ ), 0 , 75 , 0 , 297, 167), // #1067 + INST(Vfmsubss , Fma4 , V(660F3A,6E,_,0,x,_,_,_ ), 0 , 75 , 0 , 298, 167), // #1068 + INST(Vfmulcph , VexRvm_Lx , E(F3MAP6,D6,_,_,_,0,4,FV ), 0 , 188, 0 , 291, 146), // #1069 + INST(Vfmulcsh , VexRvm , E(F3MAP6,D7,_,_,_,0,2,T1S), 0 , 189, 0 , 265, 146), // #1070 + INST(Vfnmadd132pd , VexRvm_Lx , V(660F38,9C,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1071 + INST(Vfnmadd132ph , VexRvm_Lx , E(66MAP6,9C,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1072 + INST(Vfnmadd132ps , VexRvm_Lx , V(660F38,9C,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1073 + INST(Vfnmadd132sd , VexRvm , V(660F38,9D,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1074 + INST(Vfnmadd132sh , VexRvm , E(66MAP6,9D,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1075 + INST(Vfnmadd132ss , VexRvm , V(660F38,9D,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1076 + INST(Vfnmadd213pd , VexRvm_Lx , V(660F38,AC,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1077 + INST(Vfnmadd213ph , VexRvm_Lx , E(66MAP6,AC,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1078 + INST(Vfnmadd213ps , VexRvm_Lx , V(660F38,AC,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1079 + INST(Vfnmadd213sd , VexRvm , V(660F38,AD,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1080 + INST(Vfnmadd213sh , VexRvm , E(66MAP6,AD,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1081 + INST(Vfnmadd213ss , VexRvm , V(660F38,AD,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1082 + INST(Vfnmadd231pd , VexRvm_Lx , V(660F38,BC,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1083 + INST(Vfnmadd231ph , VexRvm_Lx , E(66MAP6,BC,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1084 + INST(Vfnmadd231ps , VexRvm_Lx , V(660F38,BC,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1085 + INST(Vfnmadd231sd , VexRvm , V(660F38,BD,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1086 + INST(Vfnmadd231sh , VexRvm , E(66MAP6,BD,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1087 + INST(Vfnmadd231ss , VexRvm , V(660F38,BD,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1088 + INST(Vfnmaddpd , Fma4_Lx , V(660F3A,79,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1089 + INST(Vfnmaddps , Fma4_Lx , V(660F3A,78,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1090 + INST(Vfnmaddsd , Fma4 , V(660F3A,7B,_,0,x,_,_,_ ), 0 , 75 , 0 , 297, 167), // #1091 + INST(Vfnmaddss , Fma4 , V(660F3A,7A,_,0,x,_,_,_ ), 0 , 75 , 0 , 298, 167), // #1092 + INST(Vfnmsub132pd , VexRvm_Lx , V(660F38,9E,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1093 + INST(Vfnmsub132ph , VexRvm_Lx , E(66MAP6,9E,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1094 + INST(Vfnmsub132ps , VexRvm_Lx , V(660F38,9E,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1095 + INST(Vfnmsub132sd , VexRvm , V(660F38,9F,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1096 + INST(Vfnmsub132sh , VexRvm , E(66MAP6,9F,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1097 + INST(Vfnmsub132ss , VexRvm , V(660F38,9F,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1098 + INST(Vfnmsub213pd , VexRvm_Lx , V(660F38,AE,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1099 + INST(Vfnmsub213ph , VexRvm_Lx , E(66MAP6,AE,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1100 + INST(Vfnmsub213ps , VexRvm_Lx , V(660F38,AE,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1101 + INST(Vfnmsub213sd , VexRvm , V(660F38,AF,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1102 + INST(Vfnmsub213sh , VexRvm , E(66MAP6,AF,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1103 + INST(Vfnmsub213ss , VexRvm , V(660F38,AF,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1104 + INST(Vfnmsub231pd , VexRvm_Lx , V(660F38,BE,_,x,1,1,4,FV ), 0 , 184, 0 , 200, 165), // #1105 + INST(Vfnmsub231ph , VexRvm_Lx , E(66MAP6,BE,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1106 + INST(Vfnmsub231ps , VexRvm_Lx , V(660F38,BE,_,x,0,0,4,FV ), 0 , 111, 0 , 202, 165), // #1107 + INST(Vfnmsub231sd , VexRvm , V(660F38,BF,_,I,1,1,3,T1S), 0 , 186, 0 , 203, 166), // #1108 + INST(Vfnmsub231sh , VexRvm , E(66MAP6,BF,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1109 + INST(Vfnmsub231ss , VexRvm , V(660F38,BF,_,I,0,0,2,T1S), 0 , 123, 0 , 205, 166), // #1110 + INST(Vfnmsubpd , Fma4_Lx , V(660F3A,7D,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1111 + INST(Vfnmsubps , Fma4_Lx , V(660F3A,7C,_,x,x,_,_,_ ), 0 , 75 , 0 , 296, 167), // #1112 + INST(Vfnmsubsd , Fma4 , V(660F3A,7F,_,0,x,_,_,_ ), 0 , 75 , 0 , 297, 167), // #1113 + INST(Vfnmsubss , Fma4 , V(660F3A,7E,_,0,x,_,_,_ ), 0 , 75 , 0 , 298, 167), // #1114 + INST(Vfpclasspd , VexRmi_Lx , E(660F3A,66,_,x,_,1,4,FV ), 0 , 113, 0 , 299, 155), // #1115 + INST(Vfpclassph , VexRmi_Lx , E(000F3A,66,_,_,_,0,4,FV ), 0 , 124, 0 , 300, 146), // #1116 + INST(Vfpclassps , VexRmi_Lx , E(660F3A,66,_,x,_,0,4,FV ), 0 , 112, 0 , 301, 155), // #1117 + INST(Vfpclasssd , VexRmi , E(660F3A,67,_,I,_,1,3,T1S), 0 , 182, 0 , 302, 76 ), // #1118 + INST(Vfpclasssh , VexRmi , E(000F3A,67,_,_,_,0,1,T1S), 0 , 190, 0 , 303, 148), // #1119 + INST(Vfpclassss , VexRmi , E(660F3A,67,_,I,_,0,2,T1S), 0 , 183, 0 , 304, 76 ), // #1120 + INST(Vfrczpd , VexRm_Lx , V(XOP_M9,81,_,x,0,_,_,_ ), 0 , 81 , 0 , 305, 168), // #1121 + INST(Vfrczps , VexRm_Lx , V(XOP_M9,80,_,x,0,_,_,_ ), 0 , 81 , 0 , 305, 168), // #1122 + INST(Vfrczsd , VexRm , V(XOP_M9,83,_,0,0,_,_,_ ), 0 , 81 , 0 , 306, 168), // #1123 + INST(Vfrczss , VexRm , V(XOP_M9,82,_,0,0,_,_,_ ), 0 , 81 , 0 , 307, 168), // #1124 + INST(Vgatherdpd , VexRmvRm_VM , V(660F38,92,_,x,1,_,_,_ ), E(660F38,92,_,x,_,1,3,T1S), 191, 80 , 308, 169), // #1125 + INST(Vgatherdps , VexRmvRm_VM , V(660F38,92,_,x,0,_,_,_ ), E(660F38,92,_,x,_,0,2,T1S), 30 , 81 , 309, 169), // #1126 + INST(Vgatherpf0dpd , VexM_VM , E(660F38,C6,1,2,_,1,3,T1S), 0 , 192, 0 , 310, 170), // #1127 + INST(Vgatherpf0dps , VexM_VM , E(660F38,C6,1,2,_,0,2,T1S), 0 , 193, 0 , 311, 170), // #1128 + INST(Vgatherpf0qpd , VexM_VM , E(660F38,C7,1,2,_,1,3,T1S), 0 , 192, 0 , 312, 170), // #1129 + INST(Vgatherpf0qps , VexM_VM , E(660F38,C7,1,2,_,0,2,T1S), 0 , 193, 0 , 312, 170), // #1130 + INST(Vgatherpf1dpd , VexM_VM , E(660F38,C6,2,2,_,1,3,T1S), 0 , 194, 0 , 310, 170), // #1131 + INST(Vgatherpf1dps , VexM_VM , E(660F38,C6,2,2,_,0,2,T1S), 0 , 195, 0 , 311, 170), // #1132 + INST(Vgatherpf1qpd , VexM_VM , E(660F38,C7,2,2,_,1,3,T1S), 0 , 194, 0 , 312, 170), // #1133 + INST(Vgatherpf1qps , VexM_VM , E(660F38,C7,2,2,_,0,2,T1S), 0 , 195, 0 , 312, 170), // #1134 + INST(Vgatherqpd , VexRmvRm_VM , V(660F38,93,_,x,1,_,_,_ ), E(660F38,93,_,x,_,1,3,T1S), 191, 82 , 313, 169), // #1135 + INST(Vgatherqps , VexRmvRm_VM , V(660F38,93,_,x,0,_,_,_ ), E(660F38,93,_,x,_,0,2,T1S), 30 , 83 , 314, 169), // #1136 + INST(Vgetexppd , VexRm_Lx , E(660F38,42,_,x,_,1,4,FV ), 0 , 114, 0 , 269, 152), // #1137 + INST(Vgetexpph , VexRm_Lx , E(66MAP6,42,_,_,_,0,4,FV ), 0 , 185, 0 , 271, 146), // #1138 + INST(Vgetexpps , VexRm_Lx , E(660F38,42,_,x,_,0,4,FV ), 0 , 115, 0 , 274, 152), // #1139 + INST(Vgetexpsd , VexRvm , E(660F38,43,_,I,_,1,3,T1S), 0 , 129, 0 , 315, 78 ), // #1140 + INST(Vgetexpsh , VexRvm , E(66MAP6,43,_,_,_,0,1,T1S), 0 , 187, 0 , 260, 148), // #1141 + INST(Vgetexpss , VexRvm , E(660F38,43,_,I,_,0,2,T1S), 0 , 130, 0 , 316, 78 ), // #1142 + INST(Vgetmantpd , VexRmi_Lx , E(660F3A,26,_,x,_,1,4,FV ), 0 , 113, 0 , 317, 152), // #1143 + INST(Vgetmantph , VexRmi_Lx , E(000F3A,26,_,_,_,0,4,FV ), 0 , 124, 0 , 318, 146), // #1144 + INST(Vgetmantps , VexRmi_Lx , E(660F3A,26,_,x,_,0,4,FV ), 0 , 112, 0 , 319, 152), // #1145 + INST(Vgetmantsd , VexRvmi , E(660F3A,27,_,I,_,1,3,T1S), 0 , 182, 0 , 294, 78 ), // #1146 + INST(Vgetmantsh , VexRvmi , E(000F3A,27,_,_,_,0,1,T1S), 0 , 190, 0 , 320, 148), // #1147 + INST(Vgetmantss , VexRvmi , E(660F3A,27,_,I,_,0,2,T1S), 0 , 183, 0 , 295, 78 ), // #1148 + INST(Vgf2p8affineinvqb, VexRvmi_Lx , V(660F3A,CF,_,x,1,1,4,FV ), 0 , 196, 0 , 321, 171), // #1149 + INST(Vgf2p8affineqb , VexRvmi_Lx , V(660F3A,CE,_,x,1,1,4,FV ), 0 , 196, 0 , 321, 171), // #1150 + INST(Vgf2p8mulb , VexRvm_Lx , V(660F38,CF,_,x,0,0,4,FV ), 0 , 111, 0 , 322, 171), // #1151 + INST(Vhaddpd , VexRvm_Lx , V(660F00,7C,_,x,I,_,_,_ ), 0 , 71 , 0 , 206, 149), // #1152 + INST(Vhaddps , VexRvm_Lx , V(F20F00,7C,_,x,I,_,_,_ ), 0 , 110, 0 , 206, 149), // #1153 + INST(Vhsubpd , VexRvm_Lx , V(660F00,7D,_,x,I,_,_,_ ), 0 , 71 , 0 , 206, 149), // #1154 + INST(Vhsubps , VexRvm_Lx , V(F20F00,7D,_,x,I,_,_,_ ), 0 , 110, 0 , 206, 149), // #1155 + INST(Vinsertf128 , VexRvmi , V(660F3A,18,_,1,0,_,_,_ ), 0 , 174, 0 , 323, 149), // #1156 + INST(Vinsertf32x4 , VexRvmi_Lx , E(660F3A,18,_,x,_,0,4,T4 ), 0 , 175, 0 , 324, 152), // #1157 + INST(Vinsertf32x8 , VexRvmi , E(660F3A,1A,_,2,_,0,5,T8 ), 0 , 176, 0 , 325, 76 ), // #1158 + INST(Vinsertf64x2 , VexRvmi_Lx , E(660F3A,18,_,x,_,1,4,T2 ), 0 , 177, 0 , 324, 155), // #1159 + INST(Vinsertf64x4 , VexRvmi , E(660F3A,1A,_,2,_,1,5,T4 ), 0 , 178, 0 , 325, 78 ), // #1160 + INST(Vinserti128 , VexRvmi , V(660F3A,38,_,1,0,_,_,_ ), 0 , 174, 0 , 323, 156), // #1161 + INST(Vinserti32x4 , VexRvmi_Lx , E(660F3A,38,_,x,_,0,4,T4 ), 0 , 175, 0 , 324, 152), // #1162 + INST(Vinserti32x8 , VexRvmi , E(660F3A,3A,_,2,_,0,5,T8 ), 0 , 176, 0 , 325, 76 ), // #1163 + INST(Vinserti64x2 , VexRvmi_Lx , E(660F3A,38,_,x,_,1,4,T2 ), 0 , 177, 0 , 324, 155), // #1164 + INST(Vinserti64x4 , VexRvmi , E(660F3A,3A,_,2,_,1,5,T4 ), 0 , 178, 0 , 325, 78 ), // #1165 + INST(Vinsertps , VexRvmi , V(660F3A,21,_,0,I,0,2,T1S), 0 , 179, 0 , 326, 147), // #1166 + INST(Vlddqu , VexRm_Lx , V(F20F00,F0,_,x,I,_,_,_ ), 0 , 110, 0 , 241, 149), // #1167 + INST(Vldmxcsr , VexM , V(000F00,AE,2,0,I,_,_,_ ), 0 , 197, 0 , 327, 149), // #1168 + INST(Vmaskmovdqu , VexRm_ZDI , V(660F00,F7,_,0,I,_,_,_ ), 0 , 71 , 0 , 328, 149), // #1169 + INST(Vmaskmovpd , VexRvmMvr_Lx , V(660F38,2D,_,x,0,_,_,_ ), V(660F38,2F,_,x,0,_,_,_ ), 30 , 84 , 329, 149), // #1170 + INST(Vmaskmovps , VexRvmMvr_Lx , V(660F38,2C,_,x,0,_,_,_ ), V(660F38,2E,_,x,0,_,_,_ ), 30 , 85 , 329, 149), // #1171 + INST(Vmaxpd , VexRvm_Lx , V(660F00,5F,_,x,I,1,4,FV ), 0 , 104, 0 , 330, 145), // #1172 + INST(Vmaxph , VexRvm_Lx , E(00MAP5,5F,_,_,_,0,4,FV ), 0 , 105, 0 , 331, 146), // #1173 + INST(Vmaxps , VexRvm_Lx , V(000F00,5F,_,x,I,0,4,FV ), 0 , 106, 0 , 332, 145), // #1174 + INST(Vmaxsd , VexRvm , V(F20F00,5F,_,I,I,1,3,T1S), 0 , 107, 0 , 333, 147), // #1175 + INST(Vmaxsh , VexRvm , E(F3MAP5,5F,_,_,_,0,1,T1S), 0 , 108, 0 , 260, 148), // #1176 + INST(Vmaxss , VexRvm , V(F30F00,5F,_,I,I,0,2,T1S), 0 , 109, 0 , 264, 147), // #1177 + INST(Vmcall , X86Op , O(000F01,C1,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 67 ), // #1178 + INST(Vmclear , X86M_Only , O(660F00,C7,6,_,_,_,_,_ ), 0 , 28 , 0 , 33 , 67 ), // #1179 + INST(Vmfunc , X86Op , O(000F01,D4,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 67 ), // #1180 + INST(Vmgexit , X86Op , O(F20F01,D9,_,_,_,_,_,_ ), 0 , 93 , 0 , 31 , 172), // #1181 + INST(Vminpd , VexRvm_Lx , V(660F00,5D,_,x,I,1,4,FV ), 0 , 104, 0 , 330, 145), // #1182 + INST(Vminph , VexRvm_Lx , E(00MAP5,5D,_,_,_,0,4,FV ), 0 , 105, 0 , 331, 146), // #1183 + INST(Vminps , VexRvm_Lx , V(000F00,5D,_,x,I,0,4,FV ), 0 , 106, 0 , 332, 145), // #1184 + INST(Vminsd , VexRvm , V(F20F00,5D,_,I,I,1,3,T1S), 0 , 107, 0 , 333, 147), // #1185 + INST(Vminsh , VexRvm , E(F3MAP5,5D,_,_,_,0,1,T1S), 0 , 108, 0 , 260, 148), // #1186 + INST(Vminss , VexRvm , V(F30F00,5D,_,I,I,0,2,T1S), 0 , 109, 0 , 264, 147), // #1187 + INST(Vmlaunch , X86Op , O(000F01,C2,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 67 ), // #1188 + INST(Vmload , X86Op_xAX , O(000F01,DA,_,_,_,_,_,_ ), 0 , 23 , 0 , 334, 23 ), // #1189 + INST(Vmmcall , X86Op , O(000F01,D9,_,_,_,_,_,_ ), 0 , 23 , 0 , 335, 23 ), // #1190 + INST(Vmovapd , VexRmMr_Lx , V(660F00,28,_,x,I,1,4,FVM), V(660F00,29,_,x,I,1,4,FVM), 104, 86 , 336, 173), // #1191 + INST(Vmovaps , VexRmMr_Lx , V(000F00,28,_,x,I,0,4,FVM), V(000F00,29,_,x,I,0,4,FVM), 106, 87 , 336, 173), // #1192 + INST(Vmovd , VexMovdMovq , V(660F00,6E,_,0,0,0,2,T1S), V(660F00,7E,_,0,0,0,2,T1S), 198, 88 , 337, 147), // #1193 + INST(Vmovddup , VexRm_Lx , V(F20F00,12,_,x,I,1,3,DUP), 0 , 199, 0 , 338, 145), // #1194 + INST(Vmovdqa , VexRmMr_Lx , V(660F00,6F,_,x,I,_,_,_ ), V(660F00,7F,_,x,I,_,_,_ ), 71 , 89 , 339, 174), // #1195 + INST(Vmovdqa32 , VexRmMr_Lx , E(660F00,6F,_,x,_,0,4,FVM), E(660F00,7F,_,x,_,0,4,FVM), 200, 90 , 340, 175), // #1196 + INST(Vmovdqa64 , VexRmMr_Lx , E(660F00,6F,_,x,_,1,4,FVM), E(660F00,7F,_,x,_,1,4,FVM), 136, 91 , 340, 175), // #1197 + INST(Vmovdqu , VexRmMr_Lx , V(F30F00,6F,_,x,I,_,_,_ ), V(F30F00,7F,_,x,I,_,_,_ ), 201, 92 , 339, 174), // #1198 + INST(Vmovdqu16 , VexRmMr_Lx , E(F20F00,6F,_,x,_,1,4,FVM), E(F20F00,7F,_,x,_,1,4,FVM), 167, 93 , 340, 176), // #1199 + INST(Vmovdqu32 , VexRmMr_Lx , E(F30F00,6F,_,x,_,0,4,FVM), E(F30F00,7F,_,x,_,0,4,FVM), 202, 94 , 340, 175), // #1200 + INST(Vmovdqu64 , VexRmMr_Lx , E(F30F00,6F,_,x,_,1,4,FVM), E(F30F00,7F,_,x,_,1,4,FVM), 150, 95 , 340, 175), // #1201 + INST(Vmovdqu8 , VexRmMr_Lx , E(F20F00,6F,_,x,_,0,4,FVM), E(F20F00,7F,_,x,_,0,4,FVM), 165, 96 , 340, 176), // #1202 + INST(Vmovhlps , VexRvm , V(000F00,12,_,0,I,0,_,_ ), 0 , 74 , 0 , 341, 147), // #1203 + INST(Vmovhpd , VexRvmMr , V(660F00,16,_,0,I,1,3,T1S), V(660F00,17,_,0,I,1,3,T1S), 126, 97 , 342, 147), // #1204 + INST(Vmovhps , VexRvmMr , V(000F00,16,_,0,I,0,3,T2 ), V(000F00,17,_,0,I,0,3,T2 ), 203, 98 , 342, 147), // #1205 + INST(Vmovlhps , VexRvm , V(000F00,16,_,0,I,0,_,_ ), 0 , 74 , 0 , 341, 147), // #1206 + INST(Vmovlpd , VexRvmMr , V(660F00,12,_,0,I,1,3,T1S), V(660F00,13,_,0,I,1,3,T1S), 126, 99 , 342, 147), // #1207 + INST(Vmovlps , VexRvmMr , V(000F00,12,_,0,I,0,3,T2 ), V(000F00,13,_,0,I,0,3,T2 ), 203, 100, 342, 147), // #1208 + INST(Vmovmskpd , VexRm_Lx , V(660F00,50,_,x,I,_,_,_ ), 0 , 71 , 0 , 343, 149), // #1209 + INST(Vmovmskps , VexRm_Lx , V(000F00,50,_,x,I,_,_,_ ), 0 , 74 , 0 , 343, 149), // #1210 + INST(Vmovntdq , VexMr_Lx , V(660F00,E7,_,x,I,0,4,FVM), 0 , 145, 0 , 344, 145), // #1211 + INST(Vmovntdqa , VexRm_Lx , V(660F38,2A,_,x,I,0,4,FVM), 0 , 111, 0 , 345, 157), // #1212 + INST(Vmovntpd , VexMr_Lx , V(660F00,2B,_,x,I,1,4,FVM), 0 , 104, 0 , 344, 145), // #1213 + INST(Vmovntps , VexMr_Lx , V(000F00,2B,_,x,I,0,4,FVM), 0 , 106, 0 , 344, 145), // #1214 + INST(Vmovq , VexMovdMovq , V(660F00,6E,_,0,I,1,3,T1S), V(660F00,7E,_,0,I,1,3,T1S), 126, 101, 346, 177), // #1215 + INST(Vmovsd , VexMovssMovsd , V(F20F00,10,_,I,I,1,3,T1S), V(F20F00,11,_,I,I,1,3,T1S), 107, 102, 347, 177), // #1216 + INST(Vmovsh , VexMovssMovsd , E(F3MAP5,10,_,I,_,0,1,T1S), E(F3MAP5,11,_,I,_,0,1,T1S), 108, 103, 348, 148), // #1217 + INST(Vmovshdup , VexRm_Lx , V(F30F00,16,_,x,I,0,4,FVM), 0 , 162, 0 , 349, 145), // #1218 + INST(Vmovsldup , VexRm_Lx , V(F30F00,12,_,x,I,0,4,FVM), 0 , 162, 0 , 349, 145), // #1219 + INST(Vmovss , VexMovssMovsd , V(F30F00,10,_,I,I,0,2,T1S), V(F30F00,11,_,I,I,0,2,T1S), 109, 104, 350, 177), // #1220 + INST(Vmovupd , VexRmMr_Lx , V(660F00,10,_,x,I,1,4,FVM), V(660F00,11,_,x,I,1,4,FVM), 104, 105, 336, 173), // #1221 + INST(Vmovups , VexRmMr_Lx , V(000F00,10,_,x,I,0,4,FVM), V(000F00,11,_,x,I,0,4,FVM), 106, 106, 336, 173), // #1222 + INST(Vmovw , VexMovdMovq , E(66MAP5,6E,_,0,_,I,1,T1S), E(66MAP5,7E,_,0,_,I,1,T1S), 204, 107, 351, 148), // #1223 + INST(Vmpsadbw , VexRvmi_Lx , V(660F3A,42,_,x,I,_,_,_ ), 0 , 75 , 0 , 219, 178), // #1224 + INST(Vmptrld , X86M_Only , O(000F00,C7,6,_,_,_,_,_ ), 0 , 82 , 0 , 33 , 67 ), // #1225 + INST(Vmptrst , X86M_Only , O(000F00,C7,7,_,_,_,_,_ ), 0 , 24 , 0 , 33 , 67 ), // #1226 + INST(Vmread , X86Mr_NoSize , O(000F00,78,_,_,_,_,_,_ ), 0 , 5 , 0 , 352, 67 ), // #1227 + INST(Vmresume , X86Op , O(000F01,C3,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 67 ), // #1228 + INST(Vmrun , X86Op_xAX , O(000F01,D8,_,_,_,_,_,_ ), 0 , 23 , 0 , 334, 23 ), // #1229 + INST(Vmsave , X86Op_xAX , O(000F01,DB,_,_,_,_,_,_ ), 0 , 23 , 0 , 334, 23 ), // #1230 + INST(Vmulpd , VexRvm_Lx , V(660F00,59,_,x,I,1,4,FV ), 0 , 104, 0 , 200, 145), // #1231 + INST(Vmulph , VexRvm_Lx , E(00MAP5,59,_,_,_,0,4,FV ), 0 , 105, 0 , 201, 146), // #1232 + INST(Vmulps , VexRvm_Lx , V(000F00,59,_,x,I,0,4,FV ), 0 , 106, 0 , 202, 145), // #1233 + INST(Vmulsd , VexRvm , V(F20F00,59,_,I,I,1,3,T1S), 0 , 107, 0 , 203, 147), // #1234 + INST(Vmulsh , VexRvm , E(F3MAP5,59,_,_,_,0,1,T1S), 0 , 108, 0 , 204, 148), // #1235 + INST(Vmulss , VexRvm , V(F30F00,59,_,I,I,0,2,T1S), 0 , 109, 0 , 205, 147), // #1236 + INST(Vmwrite , X86Rm_NoSize , O(000F00,79,_,_,_,_,_,_ ), 0 , 5 , 0 , 353, 67 ), // #1237 + INST(Vmxoff , X86Op , O(000F01,C4,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 67 ), // #1238 + INST(Vmxon , X86M_Only , O(F30F00,C7,6,_,_,_,_,_ ), 0 , 26 , 0 , 33 , 67 ), // #1239 + INST(Vorpd , VexRvm_Lx , V(660F00,56,_,x,I,1,4,FV ), 0 , 104, 0 , 214, 153), // #1240 + INST(Vorps , VexRvm_Lx , V(000F00,56,_,x,I,0,4,FV ), 0 , 106, 0 , 215, 153), // #1241 + INST(Vp2intersectd , VexRvm_Lx_2xK , E(F20F38,68,_,_,_,0,4,FV ), 0 , 132, 0 , 354, 179), // #1242 + INST(Vp2intersectq , VexRvm_Lx_2xK , E(F20F38,68,_,_,_,1,4,FV ), 0 , 205, 0 , 355, 179), // #1243 + INST(Vp4dpwssd , VexRm_T1_4X , E(F20F38,52,_,2,_,0,4,T4X), 0 , 102, 0 , 198, 180), // #1244 + INST(Vp4dpwssds , VexRm_T1_4X , E(F20F38,53,_,2,_,0,4,T4X), 0 , 102, 0 , 198, 180), // #1245 + INST(Vpabsb , VexRm_Lx , V(660F38,1C,_,x,I,_,4,FVM), 0 , 111, 0 , 349, 181), // #1246 + INST(Vpabsd , VexRm_Lx , V(660F38,1E,_,x,I,0,4,FV ), 0 , 111, 0 , 356, 157), // #1247 + INST(Vpabsq , VexRm_Lx , E(660F38,1F,_,x,_,1,4,FV ), 0 , 114, 0 , 357, 152), // #1248 + INST(Vpabsw , VexRm_Lx , V(660F38,1D,_,x,I,_,4,FVM), 0 , 111, 0 , 349, 181), // #1249 + INST(Vpackssdw , VexRvm_Lx , V(660F00,6B,_,x,I,0,4,FV ), 0 , 145, 0 , 213, 181), // #1250 + INST(Vpacksswb , VexRvm_Lx , V(660F00,63,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1251 + INST(Vpackusdw , VexRvm_Lx , V(660F38,2B,_,x,I,0,4,FV ), 0 , 111, 0 , 213, 181), // #1252 + INST(Vpackuswb , VexRvm_Lx , V(660F00,67,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1253 + INST(Vpaddb , VexRvm_Lx , V(660F00,FC,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1254 + INST(Vpaddd , VexRvm_Lx , V(660F00,FE,_,x,I,0,4,FV ), 0 , 145, 0 , 213, 157), // #1255 + INST(Vpaddq , VexRvm_Lx , V(660F00,D4,_,x,I,1,4,FV ), 0 , 104, 0 , 212, 157), // #1256 + INST(Vpaddsb , VexRvm_Lx , V(660F00,EC,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1257 + INST(Vpaddsw , VexRvm_Lx , V(660F00,ED,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1258 + INST(Vpaddusb , VexRvm_Lx , V(660F00,DC,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1259 + INST(Vpaddusw , VexRvm_Lx , V(660F00,DD,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1260 + INST(Vpaddw , VexRvm_Lx , V(660F00,FD,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1261 + INST(Vpalignr , VexRvmi_Lx , V(660F3A,0F,_,x,I,I,4,FVM), 0 , 206, 0 , 321, 181), // #1262 + INST(Vpand , VexRvm_Lx , V(660F00,DB,_,x,I,_,_,_ ), 0 , 71 , 0 , 358, 178), // #1263 + INST(Vpandd , VexRvm_Lx , E(660F00,DB,_,x,_,0,4,FV ), 0 , 200, 0 , 359, 152), // #1264 + INST(Vpandn , VexRvm_Lx , V(660F00,DF,_,x,I,_,_,_ ), 0 , 71 , 0 , 360, 178), // #1265 + INST(Vpandnd , VexRvm_Lx , E(660F00,DF,_,x,_,0,4,FV ), 0 , 200, 0 , 361, 152), // #1266 + INST(Vpandnq , VexRvm_Lx , E(660F00,DF,_,x,_,1,4,FV ), 0 , 136, 0 , 362, 152), // #1267 + INST(Vpandq , VexRvm_Lx , E(660F00,DB,_,x,_,1,4,FV ), 0 , 136, 0 , 363, 152), // #1268 + INST(Vpavgb , VexRvm_Lx , V(660F00,E0,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1269 + INST(Vpavgw , VexRvm_Lx , V(660F00,E3,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1270 + INST(Vpblendd , VexRvmi_Lx , V(660F3A,02,_,x,0,_,_,_ ), 0 , 75 , 0 , 219, 156), // #1271 + INST(Vpblendmb , VexRvm_Lx , E(660F38,66,_,x,_,0,4,FVM), 0 , 115, 0 , 364, 163), // #1272 + INST(Vpblendmd , VexRvm_Lx , E(660F38,64,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 152), // #1273 + INST(Vpblendmq , VexRvm_Lx , E(660F38,64,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1274 + INST(Vpblendmw , VexRvm_Lx , E(660F38,66,_,x,_,1,4,FVM), 0 , 114, 0 , 364, 163), // #1275 + INST(Vpblendvb , VexRvmr_Lx , V(660F3A,4C,_,x,0,_,_,_ ), 0 , 75 , 0 , 220, 178), // #1276 + INST(Vpblendw , VexRvmi_Lx , V(660F3A,0E,_,x,I,_,_,_ ), 0 , 75 , 0 , 219, 178), // #1277 + INST(Vpbroadcastb , VexRm_Lx_Bcst , V(660F38,78,_,x,0,0,0,T1S), E(660F38,7A,_,x,0,0,0,T1S), 30 , 108, 365, 182), // #1278 + INST(Vpbroadcastd , VexRm_Lx_Bcst , V(660F38,58,_,x,0,0,2,T1S), E(660F38,7C,_,x,0,0,0,T1S), 123, 109, 366, 169), // #1279 + INST(Vpbroadcastmb2q , VexRm_Lx , E(F30F38,2A,_,x,_,1,_,_ ), 0 , 207, 0 , 367, 183), // #1280 + INST(Vpbroadcastmw2d , VexRm_Lx , E(F30F38,3A,_,x,_,0,_,_ ), 0 , 208, 0 , 367, 183), // #1281 + INST(Vpbroadcastq , VexRm_Lx_Bcst , V(660F38,59,_,x,0,1,3,T1S), E(660F38,7C,_,x,0,1,0,T1S), 122, 110, 368, 169), // #1282 + INST(Vpbroadcastw , VexRm_Lx_Bcst , V(660F38,79,_,x,0,0,1,T1S), E(660F38,7B,_,x,0,0,0,T1S), 209, 111, 369, 182), // #1283 + INST(Vpclmulqdq , VexRvmi_Lx , V(660F3A,44,_,x,I,_,4,FVM), 0 , 206, 0 , 370, 184), // #1284 + INST(Vpcmov , VexRvrmRvmr_Lx , V(XOP_M8,A2,_,x,x,_,_,_ ), 0 , 210, 0 , 296, 168), // #1285 + INST(Vpcmpb , VexRvmi_Lx , E(660F3A,3F,_,x,_,0,4,FVM), 0 , 112, 0 , 371, 163), // #1286 + INST(Vpcmpd , VexRvmi_Lx , E(660F3A,1F,_,x,_,0,4,FV ), 0 , 112, 0 , 372, 152), // #1287 + INST(Vpcmpeqb , VexRvm_Lx_KEvex , V(660F00,74,_,x,I,I,4,FV ), 0 , 145, 0 , 373, 181), // #1288 + INST(Vpcmpeqd , VexRvm_Lx_KEvex , V(660F00,76,_,x,I,0,4,FVM), 0 , 145, 0 , 374, 157), // #1289 + INST(Vpcmpeqq , VexRvm_Lx_KEvex , V(660F38,29,_,x,I,1,4,FVM), 0 , 211, 0 , 375, 157), // #1290 + INST(Vpcmpeqw , VexRvm_Lx_KEvex , V(660F00,75,_,x,I,I,4,FV ), 0 , 145, 0 , 373, 181), // #1291 + INST(Vpcmpestri , VexRmi , V(660F3A,61,_,0,I,_,_,_ ), 0 , 75 , 0 , 376, 185), // #1292 + INST(Vpcmpestrm , VexRmi , V(660F3A,60,_,0,I,_,_,_ ), 0 , 75 , 0 , 377, 185), // #1293 + INST(Vpcmpgtb , VexRvm_Lx_KEvex , V(660F00,64,_,x,I,I,4,FV ), 0 , 145, 0 , 373, 181), // #1294 + INST(Vpcmpgtd , VexRvm_Lx_KEvex , V(660F00,66,_,x,I,0,4,FVM), 0 , 145, 0 , 374, 157), // #1295 + INST(Vpcmpgtq , VexRvm_Lx_KEvex , V(660F38,37,_,x,I,1,4,FVM), 0 , 211, 0 , 375, 157), // #1296 + INST(Vpcmpgtw , VexRvm_Lx_KEvex , V(660F00,65,_,x,I,I,4,FV ), 0 , 145, 0 , 373, 181), // #1297 + INST(Vpcmpistri , VexRmi , V(660F3A,63,_,0,I,_,_,_ ), 0 , 75 , 0 , 378, 185), // #1298 + INST(Vpcmpistrm , VexRmi , V(660F3A,62,_,0,I,_,_,_ ), 0 , 75 , 0 , 379, 185), // #1299 + INST(Vpcmpq , VexRvmi_Lx , E(660F3A,1F,_,x,_,1,4,FV ), 0 , 113, 0 , 380, 152), // #1300 + INST(Vpcmpub , VexRvmi_Lx , E(660F3A,3E,_,x,_,0,4,FVM), 0 , 112, 0 , 371, 163), // #1301 + INST(Vpcmpud , VexRvmi_Lx , E(660F3A,1E,_,x,_,0,4,FV ), 0 , 112, 0 , 372, 152), // #1302 + INST(Vpcmpuq , VexRvmi_Lx , E(660F3A,1E,_,x,_,1,4,FV ), 0 , 113, 0 , 380, 152), // #1303 + INST(Vpcmpuw , VexRvmi_Lx , E(660F3A,3E,_,x,_,1,4,FVM), 0 , 113, 0 , 380, 163), // #1304 + INST(Vpcmpw , VexRvmi_Lx , E(660F3A,3F,_,x,_,1,4,FVM), 0 , 113, 0 , 380, 163), // #1305 + INST(Vpcomb , VexRvmi , V(XOP_M8,CC,_,0,0,_,_,_ ), 0 , 210, 0 , 283, 168), // #1306 + INST(Vpcomd , VexRvmi , V(XOP_M8,CE,_,0,0,_,_,_ ), 0 , 210, 0 , 283, 168), // #1307 + INST(Vpcompressb , VexMr_Lx , E(660F38,63,_,x,_,0,0,T1S), 0 , 212, 0 , 237, 186), // #1308 + INST(Vpcompressd , VexMr_Lx , E(660F38,8B,_,x,_,0,2,T1S), 0 , 130, 0 , 237, 152), // #1309 + INST(Vpcompressq , VexMr_Lx , E(660F38,8B,_,x,_,1,3,T1S), 0 , 129, 0 , 237, 152), // #1310 + INST(Vpcompressw , VexMr_Lx , E(660F38,63,_,x,_,1,1,T1S), 0 , 213, 0 , 237, 186), // #1311 + INST(Vpcomq , VexRvmi , V(XOP_M8,CF,_,0,0,_,_,_ ), 0 , 210, 0 , 283, 168), // #1312 + INST(Vpcomub , VexRvmi , V(XOP_M8,EC,_,0,0,_,_,_ ), 0 , 210, 0 , 283, 168), // #1313 + INST(Vpcomud , VexRvmi , V(XOP_M8,EE,_,0,0,_,_,_ ), 0 , 210, 0 , 283, 168), // #1314 + INST(Vpcomuq , VexRvmi , V(XOP_M8,EF,_,0,0,_,_,_ ), 0 , 210, 0 , 283, 168), // #1315 + INST(Vpcomuw , VexRvmi , V(XOP_M8,ED,_,0,0,_,_,_ ), 0 , 210, 0 , 283, 168), // #1316 + INST(Vpcomw , VexRvmi , V(XOP_M8,CD,_,0,0,_,_,_ ), 0 , 210, 0 , 283, 168), // #1317 + INST(Vpconflictd , VexRm_Lx , E(660F38,C4,_,x,_,0,4,FV ), 0 , 115, 0 , 381, 183), // #1318 + INST(Vpconflictq , VexRm_Lx , E(660F38,C4,_,x,_,1,4,FV ), 0 , 114, 0 , 381, 183), // #1319 + INST(Vpdpbssd , VexRvm_Lx , V(F20F38,50,_,x,0,_,_,_ ), 0 , 85 , 0 , 206, 187), // #1320 + INST(Vpdpbssds , VexRvm_Lx , V(F20F38,51,_,x,0,_,_,_ ), 0 , 85 , 0 , 206, 187), // #1321 + INST(Vpdpbsud , VexRvm_Lx , V(F30F38,50,_,x,0,_,_,_ ), 0 , 89 , 0 , 206, 187), // #1322 + INST(Vpdpbsuds , VexRvm_Lx , V(F30F38,51,_,x,0,_,_,_ ), 0 , 89 , 0 , 206, 187), // #1323 + INST(Vpdpbusd , VexRvm_Lx , V(660F38,50,_,x,_,0,4,FV ), 0 , 111, 0 , 382, 188), // #1324 + INST(Vpdpbusds , VexRvm_Lx , V(660F38,51,_,x,_,0,4,FV ), 0 , 111, 0 , 382, 188), // #1325 + INST(Vpdpbuud , VexRvm_Lx , V(000F38,50,_,x,0,_,_,_ ), 0 , 11 , 0 , 206, 187), // #1326 + INST(Vpdpbuuds , VexRvm_Lx , V(000F38,51,_,x,0,_,_,_ ), 0 , 11 , 0 , 206, 187), // #1327 + INST(Vpdpwssd , VexRvm_Lx , V(660F38,52,_,x,_,0,4,FV ), 0 , 111, 0 , 382, 188), // #1328 + INST(Vpdpwssds , VexRvm_Lx , V(660F38,53,_,x,_,0,4,FV ), 0 , 111, 0 , 382, 188), // #1329 + INST(Vpdpwsud , VexRvm_Lx , V(F30F38,D2,_,x,0,_,_,_ ), 0 , 89 , 0 , 206, 189), // #1330 + INST(Vpdpwsuds , VexRvm_Lx , V(F30F38,D3,_,x,0,_,_,_ ), 0 , 89 , 0 , 206, 189), // #1331 + INST(Vpdpwusd , VexRvm_Lx , V(660F38,D2,_,x,0,_,_,_ ), 0 , 30 , 0 , 206, 189), // #1332 + INST(Vpdpwusds , VexRvm_Lx , V(660F38,D3,_,x,0,_,_,_ ), 0 , 30 , 0 , 206, 189), // #1333 + INST(Vpdpwuud , VexRvm_Lx , V(000F38,D2,_,x,0,_,_,_ ), 0 , 11 , 0 , 206, 189), // #1334 + INST(Vpdpwuuds , VexRvm_Lx , V(000F38,D3,_,x,0,_,_,_ ), 0 , 11 , 0 , 206, 189), // #1335 + INST(Vperm2f128 , VexRvmi , V(660F3A,06,_,1,0,_,_,_ ), 0 , 174, 0 , 383, 149), // #1336 + INST(Vperm2i128 , VexRvmi , V(660F3A,46,_,1,0,_,_,_ ), 0 , 174, 0 , 383, 156), // #1337 + INST(Vpermb , VexRvm_Lx , E(660F38,8D,_,x,_,0,4,FVM), 0 , 115, 0 , 364, 190), // #1338 + INST(Vpermd , VexRvm_Lx , V(660F38,36,_,x,0,0,4,FV ), 0 , 111, 0 , 384, 169), // #1339 + INST(Vpermi2b , VexRvm_Lx , E(660F38,75,_,x,_,0,4,FVM), 0 , 115, 0 , 364, 190), // #1340 + INST(Vpermi2d , VexRvm_Lx , E(660F38,76,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 152), // #1341 + INST(Vpermi2pd , VexRvm_Lx , E(660F38,77,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1342 + INST(Vpermi2ps , VexRvm_Lx , E(660F38,77,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 152), // #1343 + INST(Vpermi2q , VexRvm_Lx , E(660F38,76,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1344 + INST(Vpermi2w , VexRvm_Lx , E(660F38,75,_,x,_,1,4,FVM), 0 , 114, 0 , 364, 163), // #1345 + INST(Vpermil2pd , VexRvrmiRvmri_Lx , V(660F3A,49,_,x,x,_,_,_ ), 0 , 75 , 0 , 385, 168), // #1346 + INST(Vpermil2ps , VexRvrmiRvmri_Lx , V(660F3A,48,_,x,x,_,_,_ ), 0 , 75 , 0 , 385, 168), // #1347 + INST(Vpermilpd , VexRvmRmi_Lx , V(660F38,0D,_,x,0,1,4,FV ), V(660F3A,05,_,x,0,1,4,FV ), 211, 112, 386, 145), // #1348 + INST(Vpermilps , VexRvmRmi_Lx , V(660F38,0C,_,x,0,0,4,FV ), V(660F3A,04,_,x,0,0,4,FV ), 111, 113, 387, 145), // #1349 + INST(Vpermpd , VexRvmRmi_Lx , E(660F38,16,_,x,1,1,4,FV ), V(660F3A,01,_,x,1,1,4,FV ), 214, 114, 388, 169), // #1350 + INST(Vpermps , VexRvm_Lx , V(660F38,16,_,x,0,0,4,FV ), 0 , 111, 0 , 384, 169), // #1351 + INST(Vpermq , VexRvmRmi_Lx , E(660F38,36,_,x,_,1,4,FV ), V(660F3A,00,_,x,1,1,4,FV ), 114, 115, 388, 169), // #1352 + INST(Vpermt2b , VexRvm_Lx , E(660F38,7D,_,x,_,0,4,FVM), 0 , 115, 0 , 364, 190), // #1353 + INST(Vpermt2d , VexRvm_Lx , E(660F38,7E,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 152), // #1354 + INST(Vpermt2pd , VexRvm_Lx , E(660F38,7F,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1355 + INST(Vpermt2ps , VexRvm_Lx , E(660F38,7F,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 152), // #1356 + INST(Vpermt2q , VexRvm_Lx , E(660F38,7E,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1357 + INST(Vpermt2w , VexRvm_Lx , E(660F38,7D,_,x,_,1,4,FVM), 0 , 114, 0 , 364, 163), // #1358 + INST(Vpermw , VexRvm_Lx , E(660F38,8D,_,x,_,1,4,FVM), 0 , 114, 0 , 364, 163), // #1359 + INST(Vpexpandb , VexRm_Lx , E(660F38,62,_,x,_,0,0,T1S), 0 , 212, 0 , 286, 186), // #1360 + INST(Vpexpandd , VexRm_Lx , E(660F38,89,_,x,_,0,2,T1S), 0 , 130, 0 , 286, 152), // #1361 + INST(Vpexpandq , VexRm_Lx , E(660F38,89,_,x,_,1,3,T1S), 0 , 129, 0 , 286, 152), // #1362 + INST(Vpexpandw , VexRm_Lx , E(660F38,62,_,x,_,1,1,T1S), 0 , 213, 0 , 286, 186), // #1363 + INST(Vpextrb , VexMri , V(660F3A,14,_,0,0,I,0,T1S), 0 , 75 , 0 , 389, 191), // #1364 + INST(Vpextrd , VexMri , V(660F3A,16,_,0,0,0,2,T1S), 0 , 179, 0 , 290, 192), // #1365 + INST(Vpextrq , VexMri , V(660F3A,16,_,0,1,1,3,T1S), 0 , 215, 0 , 390, 192), // #1366 + INST(Vpextrw , VexMri_Vpextrw , V(660F3A,15,_,0,0,I,1,T1S), 0 , 216, 0 , 391, 191), // #1367 + INST(Vpgatherdd , VexRmvRm_VM , V(660F38,90,_,x,0,_,_,_ ), E(660F38,90,_,x,_,0,2,T1S), 30 , 116, 309, 169), // #1368 + INST(Vpgatherdq , VexRmvRm_VM , V(660F38,90,_,x,1,_,_,_ ), E(660F38,90,_,x,_,1,3,T1S), 191, 117, 308, 169), // #1369 + INST(Vpgatherqd , VexRmvRm_VM , V(660F38,91,_,x,0,_,_,_ ), E(660F38,91,_,x,_,0,2,T1S), 30 , 118, 314, 169), // #1370 + INST(Vpgatherqq , VexRmvRm_VM , V(660F38,91,_,x,1,_,_,_ ), E(660F38,91,_,x,_,1,3,T1S), 191, 119, 313, 169), // #1371 + INST(Vphaddbd , VexRm , V(XOP_M9,C2,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1372 + INST(Vphaddbq , VexRm , V(XOP_M9,C3,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1373 + INST(Vphaddbw , VexRm , V(XOP_M9,C1,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1374 + INST(Vphaddd , VexRvm_Lx , V(660F38,02,_,x,I,_,_,_ ), 0 , 30 , 0 , 206, 178), // #1375 + INST(Vphadddq , VexRm , V(XOP_M9,CB,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1376 + INST(Vphaddsw , VexRvm_Lx , V(660F38,03,_,x,I,_,_,_ ), 0 , 30 , 0 , 206, 178), // #1377 + INST(Vphaddubd , VexRm , V(XOP_M9,D2,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1378 + INST(Vphaddubq , VexRm , V(XOP_M9,D3,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1379 + INST(Vphaddubw , VexRm , V(XOP_M9,D1,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1380 + INST(Vphaddudq , VexRm , V(XOP_M9,DB,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1381 + INST(Vphadduwd , VexRm , V(XOP_M9,D6,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1382 + INST(Vphadduwq , VexRm , V(XOP_M9,D7,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1383 + INST(Vphaddw , VexRvm_Lx , V(660F38,01,_,x,I,_,_,_ ), 0 , 30 , 0 , 206, 178), // #1384 + INST(Vphaddwd , VexRm , V(XOP_M9,C6,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1385 + INST(Vphaddwq , VexRm , V(XOP_M9,C7,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1386 + INST(Vphminposuw , VexRm , V(660F38,41,_,0,I,_,_,_ ), 0 , 30 , 0 , 208, 149), // #1387 + INST(Vphsubbw , VexRm , V(XOP_M9,E1,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1388 + INST(Vphsubd , VexRvm_Lx , V(660F38,06,_,x,I,_,_,_ ), 0 , 30 , 0 , 206, 178), // #1389 + INST(Vphsubdq , VexRm , V(XOP_M9,E3,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1390 + INST(Vphsubsw , VexRvm_Lx , V(660F38,07,_,x,I,_,_,_ ), 0 , 30 , 0 , 206, 178), // #1391 + INST(Vphsubw , VexRvm_Lx , V(660F38,05,_,x,I,_,_,_ ), 0 , 30 , 0 , 206, 178), // #1392 + INST(Vphsubwd , VexRm , V(XOP_M9,E2,_,0,0,_,_,_ ), 0 , 81 , 0 , 208, 168), // #1393 + INST(Vpinsrb , VexRvmi , V(660F3A,20,_,0,0,I,0,T1S), 0 , 75 , 0 , 392, 191), // #1394 + INST(Vpinsrd , VexRvmi , V(660F3A,22,_,0,0,0,2,T1S), 0 , 179, 0 , 393, 192), // #1395 + INST(Vpinsrq , VexRvmi , V(660F3A,22,_,0,1,1,3,T1S), 0 , 215, 0 , 394, 192), // #1396 + INST(Vpinsrw , VexRvmi , V(660F00,C4,_,0,0,I,1,T1S), 0 , 217, 0 , 395, 191), // #1397 + INST(Vplzcntd , VexRm_Lx , E(660F38,44,_,x,_,0,4,FV ), 0 , 115, 0 , 381, 183), // #1398 + INST(Vplzcntq , VexRm_Lx , E(660F38,44,_,x,_,1,4,FV ), 0 , 114, 0 , 357, 183), // #1399 + INST(Vpmacsdd , VexRvmr , V(XOP_M8,9E,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1400 + INST(Vpmacsdqh , VexRvmr , V(XOP_M8,9F,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1401 + INST(Vpmacsdql , VexRvmr , V(XOP_M8,97,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1402 + INST(Vpmacssdd , VexRvmr , V(XOP_M8,8E,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1403 + INST(Vpmacssdqh , VexRvmr , V(XOP_M8,8F,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1404 + INST(Vpmacssdql , VexRvmr , V(XOP_M8,87,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1405 + INST(Vpmacsswd , VexRvmr , V(XOP_M8,86,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1406 + INST(Vpmacssww , VexRvmr , V(XOP_M8,85,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1407 + INST(Vpmacswd , VexRvmr , V(XOP_M8,96,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1408 + INST(Vpmacsww , VexRvmr , V(XOP_M8,95,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1409 + INST(Vpmadcsswd , VexRvmr , V(XOP_M8,A6,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1410 + INST(Vpmadcswd , VexRvmr , V(XOP_M8,B6,_,0,0,_,_,_ ), 0 , 210, 0 , 396, 168), // #1411 + INST(Vpmadd52huq , VexRvm_Lx , V(660F38,B5,_,x,1,1,4,FV ), 0 , 184, 0 , 397, 193), // #1412 + INST(Vpmadd52luq , VexRvm_Lx , V(660F38,B4,_,x,1,1,4,FV ), 0 , 184, 0 , 397, 193), // #1413 + INST(Vpmaddubsw , VexRvm_Lx , V(660F38,04,_,x,I,I,4,FVM), 0 , 111, 0 , 322, 181), // #1414 + INST(Vpmaddwd , VexRvm_Lx , V(660F00,F5,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1415 + INST(Vpmaskmovd , VexRvmMvr_Lx , V(660F38,8C,_,x,0,_,_,_ ), V(660F38,8E,_,x,0,_,_,_ ), 30 , 120, 329, 156), // #1416 + INST(Vpmaskmovq , VexRvmMvr_Lx , V(660F38,8C,_,x,1,_,_,_ ), V(660F38,8E,_,x,1,_,_,_ ), 191, 121, 329, 156), // #1417 + INST(Vpmaxsb , VexRvm_Lx , V(660F38,3C,_,x,I,I,4,FVM), 0 , 111, 0 , 398, 181), // #1418 + INST(Vpmaxsd , VexRvm_Lx , V(660F38,3D,_,x,I,0,4,FV ), 0 , 111, 0 , 215, 157), // #1419 + INST(Vpmaxsq , VexRvm_Lx , E(660F38,3D,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1420 + INST(Vpmaxsw , VexRvm_Lx , V(660F00,EE,_,x,I,I,4,FVM), 0 , 145, 0 , 398, 181), // #1421 + INST(Vpmaxub , VexRvm_Lx , V(660F00,DE,_,x,I,I,4,FVM), 0 , 145, 0 , 398, 181), // #1422 + INST(Vpmaxud , VexRvm_Lx , V(660F38,3F,_,x,I,0,4,FV ), 0 , 111, 0 , 215, 157), // #1423 + INST(Vpmaxuq , VexRvm_Lx , E(660F38,3F,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1424 + INST(Vpmaxuw , VexRvm_Lx , V(660F38,3E,_,x,I,I,4,FVM), 0 , 111, 0 , 398, 181), // #1425 + INST(Vpminsb , VexRvm_Lx , V(660F38,38,_,x,I,I,4,FVM), 0 , 111, 0 , 398, 181), // #1426 + INST(Vpminsd , VexRvm_Lx , V(660F38,39,_,x,I,0,4,FV ), 0 , 111, 0 , 215, 157), // #1427 + INST(Vpminsq , VexRvm_Lx , E(660F38,39,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1428 + INST(Vpminsw , VexRvm_Lx , V(660F00,EA,_,x,I,I,4,FVM), 0 , 145, 0 , 398, 181), // #1429 + INST(Vpminub , VexRvm_Lx , V(660F00,DA,_,x,I,_,4,FVM), 0 , 145, 0 , 398, 181), // #1430 + INST(Vpminud , VexRvm_Lx , V(660F38,3B,_,x,I,0,4,FV ), 0 , 111, 0 , 215, 157), // #1431 + INST(Vpminuq , VexRvm_Lx , E(660F38,3B,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1432 + INST(Vpminuw , VexRvm_Lx , V(660F38,3A,_,x,I,_,4,FVM), 0 , 111, 0 , 398, 181), // #1433 + INST(Vpmovb2m , VexRm_Lx , E(F30F38,29,_,x,_,0,_,_ ), 0 , 208, 0 , 399, 163), // #1434 + INST(Vpmovd2m , VexRm_Lx , E(F30F38,39,_,x,_,0,_,_ ), 0 , 208, 0 , 399, 155), // #1435 + INST(Vpmovdb , VexMr_Lx , E(F30F38,31,_,x,_,0,2,QVM), 0 , 218, 0 , 400, 152), // #1436 + INST(Vpmovdw , VexMr_Lx , E(F30F38,33,_,x,_,0,3,HVM), 0 , 219, 0 , 401, 152), // #1437 + INST(Vpmovm2b , VexRm_Lx , E(F30F38,28,_,x,_,0,_,_ ), 0 , 208, 0 , 367, 163), // #1438 + INST(Vpmovm2d , VexRm_Lx , E(F30F38,38,_,x,_,0,_,_ ), 0 , 208, 0 , 367, 155), // #1439 + INST(Vpmovm2q , VexRm_Lx , E(F30F38,38,_,x,_,1,_,_ ), 0 , 207, 0 , 367, 155), // #1440 + INST(Vpmovm2w , VexRm_Lx , E(F30F38,28,_,x,_,1,_,_ ), 0 , 207, 0 , 367, 163), // #1441 + INST(Vpmovmskb , VexRm_Lx , V(660F00,D7,_,x,I,_,_,_ ), 0 , 71 , 0 , 343, 178), // #1442 + INST(Vpmovq2m , VexRm_Lx , E(F30F38,39,_,x,_,1,_,_ ), 0 , 207, 0 , 399, 155), // #1443 + INST(Vpmovqb , VexMr_Lx , E(F30F38,32,_,x,_,0,1,OVM), 0 , 220, 0 , 402, 152), // #1444 + INST(Vpmovqd , VexMr_Lx , E(F30F38,35,_,x,_,0,3,HVM), 0 , 219, 0 , 401, 152), // #1445 + INST(Vpmovqw , VexMr_Lx , E(F30F38,34,_,x,_,0,2,QVM), 0 , 218, 0 , 400, 152), // #1446 + INST(Vpmovsdb , VexMr_Lx , E(F30F38,21,_,x,_,0,2,QVM), 0 , 218, 0 , 400, 152), // #1447 + INST(Vpmovsdw , VexMr_Lx , E(F30F38,23,_,x,_,0,3,HVM), 0 , 219, 0 , 401, 152), // #1448 + INST(Vpmovsqb , VexMr_Lx , E(F30F38,22,_,x,_,0,1,OVM), 0 , 220, 0 , 402, 152), // #1449 + INST(Vpmovsqd , VexMr_Lx , E(F30F38,25,_,x,_,0,3,HVM), 0 , 219, 0 , 401, 152), // #1450 + INST(Vpmovsqw , VexMr_Lx , E(F30F38,24,_,x,_,0,2,QVM), 0 , 218, 0 , 400, 152), // #1451 + INST(Vpmovswb , VexMr_Lx , E(F30F38,20,_,x,_,0,3,HVM), 0 , 219, 0 , 401, 163), // #1452 + INST(Vpmovsxbd , VexRm_Lx , V(660F38,21,_,x,I,I,2,QVM), 0 , 221, 0 , 403, 157), // #1453 + INST(Vpmovsxbq , VexRm_Lx , V(660F38,22,_,x,I,I,1,OVM), 0 , 222, 0 , 404, 157), // #1454 + INST(Vpmovsxbw , VexRm_Lx , V(660F38,20,_,x,I,I,3,HVM), 0 , 140, 0 , 405, 181), // #1455 + INST(Vpmovsxdq , VexRm_Lx , V(660F38,25,_,x,I,0,3,HVM), 0 , 140, 0 , 405, 157), // #1456 + INST(Vpmovsxwd , VexRm_Lx , V(660F38,23,_,x,I,I,3,HVM), 0 , 140, 0 , 405, 157), // #1457 + INST(Vpmovsxwq , VexRm_Lx , V(660F38,24,_,x,I,I,2,QVM), 0 , 221, 0 , 403, 157), // #1458 + INST(Vpmovusdb , VexMr_Lx , E(F30F38,11,_,x,_,0,2,QVM), 0 , 218, 0 , 400, 152), // #1459 + INST(Vpmovusdw , VexMr_Lx , E(F30F38,13,_,x,_,0,3,HVM), 0 , 219, 0 , 401, 152), // #1460 + INST(Vpmovusqb , VexMr_Lx , E(F30F38,12,_,x,_,0,1,OVM), 0 , 220, 0 , 402, 152), // #1461 + INST(Vpmovusqd , VexMr_Lx , E(F30F38,15,_,x,_,0,3,HVM), 0 , 219, 0 , 401, 152), // #1462 + INST(Vpmovusqw , VexMr_Lx , E(F30F38,14,_,x,_,0,2,QVM), 0 , 218, 0 , 400, 152), // #1463 + INST(Vpmovuswb , VexMr_Lx , E(F30F38,10,_,x,_,0,3,HVM), 0 , 219, 0 , 401, 163), // #1464 + INST(Vpmovw2m , VexRm_Lx , E(F30F38,29,_,x,_,1,_,_ ), 0 , 207, 0 , 399, 163), // #1465 + INST(Vpmovwb , VexMr_Lx , E(F30F38,30,_,x,_,0,3,HVM), 0 , 219, 0 , 401, 163), // #1466 + INST(Vpmovzxbd , VexRm_Lx , V(660F38,31,_,x,I,I,2,QVM), 0 , 221, 0 , 403, 157), // #1467 + INST(Vpmovzxbq , VexRm_Lx , V(660F38,32,_,x,I,I,1,OVM), 0 , 222, 0 , 404, 157), // #1468 + INST(Vpmovzxbw , VexRm_Lx , V(660F38,30,_,x,I,I,3,HVM), 0 , 140, 0 , 405, 181), // #1469 + INST(Vpmovzxdq , VexRm_Lx , V(660F38,35,_,x,I,0,3,HVM), 0 , 140, 0 , 405, 157), // #1470 + INST(Vpmovzxwd , VexRm_Lx , V(660F38,33,_,x,I,I,3,HVM), 0 , 140, 0 , 405, 157), // #1471 + INST(Vpmovzxwq , VexRm_Lx , V(660F38,34,_,x,I,I,2,QVM), 0 , 221, 0 , 403, 157), // #1472 + INST(Vpmuldq , VexRvm_Lx , V(660F38,28,_,x,I,1,4,FV ), 0 , 211, 0 , 212, 157), // #1473 + INST(Vpmulhrsw , VexRvm_Lx , V(660F38,0B,_,x,I,I,4,FVM), 0 , 111, 0 , 322, 181), // #1474 + INST(Vpmulhuw , VexRvm_Lx , V(660F00,E4,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1475 + INST(Vpmulhw , VexRvm_Lx , V(660F00,E5,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1476 + INST(Vpmulld , VexRvm_Lx , V(660F38,40,_,x,I,0,4,FV ), 0 , 111, 0 , 213, 157), // #1477 + INST(Vpmullq , VexRvm_Lx , E(660F38,40,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 155), // #1478 + INST(Vpmullw , VexRvm_Lx , V(660F00,D5,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1479 + INST(Vpmultishiftqb , VexRvm_Lx , E(660F38,83,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 190), // #1480 + INST(Vpmuludq , VexRvm_Lx , V(660F00,F4,_,x,I,1,4,FV ), 0 , 104, 0 , 212, 157), // #1481 + INST(Vpopcntb , VexRm_Lx , E(660F38,54,_,x,_,0,4,FV ), 0 , 115, 0 , 286, 194), // #1482 + INST(Vpopcntd , VexRm_Lx , E(660F38,55,_,x,_,0,4,FVM), 0 , 115, 0 , 381, 195), // #1483 + INST(Vpopcntq , VexRm_Lx , E(660F38,55,_,x,_,1,4,FVM), 0 , 114, 0 , 357, 195), // #1484 + INST(Vpopcntw , VexRm_Lx , E(660F38,54,_,x,_,1,4,FV ), 0 , 114, 0 , 286, 194), // #1485 + INST(Vpor , VexRvm_Lx , V(660F00,EB,_,x,I,_,_,_ ), 0 , 71 , 0 , 358, 178), // #1486 + INST(Vpord , VexRvm_Lx , E(660F00,EB,_,x,_,0,4,FV ), 0 , 200, 0 , 359, 152), // #1487 + INST(Vporq , VexRvm_Lx , E(660F00,EB,_,x,_,1,4,FV ), 0 , 136, 0 , 363, 152), // #1488 + INST(Vpperm , VexRvrmRvmr , V(XOP_M8,A3,_,0,x,_,_,_ ), 0 , 210, 0 , 406, 168), // #1489 + INST(Vprold , VexVmi_Lx , E(660F00,72,1,x,_,0,4,FV ), 0 , 223, 0 , 407, 152), // #1490 + INST(Vprolq , VexVmi_Lx , E(660F00,72,1,x,_,1,4,FV ), 0 , 224, 0 , 408, 152), // #1491 + INST(Vprolvd , VexRvm_Lx , E(660F38,15,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 152), // #1492 + INST(Vprolvq , VexRvm_Lx , E(660F38,15,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1493 + INST(Vprord , VexVmi_Lx , E(660F00,72,0,x,_,0,4,FV ), 0 , 200, 0 , 407, 152), // #1494 + INST(Vprorq , VexVmi_Lx , E(660F00,72,0,x,_,1,4,FV ), 0 , 136, 0 , 408, 152), // #1495 + INST(Vprorvd , VexRvm_Lx , E(660F38,14,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 152), // #1496 + INST(Vprorvq , VexRvm_Lx , E(660F38,14,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1497 + INST(Vprotb , VexRvmRmvRmi , V(XOP_M9,90,_,0,x,_,_,_ ), V(XOP_M8,C0,_,0,x,_,_,_ ), 81 , 122, 409, 168), // #1498 + INST(Vprotd , VexRvmRmvRmi , V(XOP_M9,92,_,0,x,_,_,_ ), V(XOP_M8,C2,_,0,x,_,_,_ ), 81 , 123, 409, 168), // #1499 + INST(Vprotq , VexRvmRmvRmi , V(XOP_M9,93,_,0,x,_,_,_ ), V(XOP_M8,C3,_,0,x,_,_,_ ), 81 , 124, 409, 168), // #1500 + INST(Vprotw , VexRvmRmvRmi , V(XOP_M9,91,_,0,x,_,_,_ ), V(XOP_M8,C1,_,0,x,_,_,_ ), 81 , 125, 409, 168), // #1501 + INST(Vpsadbw , VexRvm_Lx , V(660F00,F6,_,x,I,I,4,FVM), 0 , 145, 0 , 207, 181), // #1502 + INST(Vpscatterdd , VexMr_VM , E(660F38,A0,_,x,_,0,2,T1S), 0 , 130, 0 , 410, 152), // #1503 + INST(Vpscatterdq , VexMr_VM , E(660F38,A0,_,x,_,1,3,T1S), 0 , 129, 0 , 411, 152), // #1504 + INST(Vpscatterqd , VexMr_VM , E(660F38,A1,_,x,_,0,2,T1S), 0 , 130, 0 , 412, 152), // #1505 + INST(Vpscatterqq , VexMr_VM , E(660F38,A1,_,x,_,1,3,T1S), 0 , 129, 0 , 413, 152), // #1506 + INST(Vpshab , VexRvmRmv , V(XOP_M9,98,_,0,x,_,_,_ ), 0 , 81 , 0 , 414, 168), // #1507 + INST(Vpshad , VexRvmRmv , V(XOP_M9,9A,_,0,x,_,_,_ ), 0 , 81 , 0 , 414, 168), // #1508 + INST(Vpshaq , VexRvmRmv , V(XOP_M9,9B,_,0,x,_,_,_ ), 0 , 81 , 0 , 414, 168), // #1509 + INST(Vpshaw , VexRvmRmv , V(XOP_M9,99,_,0,x,_,_,_ ), 0 , 81 , 0 , 414, 168), // #1510 + INST(Vpshlb , VexRvmRmv , V(XOP_M9,94,_,0,x,_,_,_ ), 0 , 81 , 0 , 414, 168), // #1511 + INST(Vpshld , VexRvmRmv , V(XOP_M9,96,_,0,x,_,_,_ ), 0 , 81 , 0 , 414, 168), // #1512 + INST(Vpshldd , VexRvmi_Lx , E(660F3A,71,_,x,_,0,4,FV ), 0 , 112, 0 , 210, 186), // #1513 + INST(Vpshldq , VexRvmi_Lx , E(660F3A,71,_,x,_,1,4,FV ), 0 , 113, 0 , 211, 186), // #1514 + INST(Vpshldvd , VexRvm_Lx , E(660F38,71,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 186), // #1515 + INST(Vpshldvq , VexRvm_Lx , E(660F38,71,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 186), // #1516 + INST(Vpshldvw , VexRvm_Lx , E(660F38,70,_,x,_,1,4,FVM), 0 , 114, 0 , 364, 186), // #1517 + INST(Vpshldw , VexRvmi_Lx , E(660F3A,70,_,x,_,1,4,FVM), 0 , 113, 0 , 282, 186), // #1518 + INST(Vpshlq , VexRvmRmv , V(XOP_M9,97,_,0,x,_,_,_ ), 0 , 81 , 0 , 414, 168), // #1519 + INST(Vpshlw , VexRvmRmv , V(XOP_M9,95,_,0,x,_,_,_ ), 0 , 81 , 0 , 414, 168), // #1520 + INST(Vpshrdd , VexRvmi_Lx , E(660F3A,73,_,x,_,0,4,FV ), 0 , 112, 0 , 210, 186), // #1521 + INST(Vpshrdq , VexRvmi_Lx , E(660F3A,73,_,x,_,1,4,FV ), 0 , 113, 0 , 211, 186), // #1522 + INST(Vpshrdvd , VexRvm_Lx , E(660F38,73,_,x,_,0,4,FV ), 0 , 115, 0 , 218, 186), // #1523 + INST(Vpshrdvq , VexRvm_Lx , E(660F38,73,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 186), // #1524 + INST(Vpshrdvw , VexRvm_Lx , E(660F38,72,_,x,_,1,4,FVM), 0 , 114, 0 , 364, 186), // #1525 + INST(Vpshrdw , VexRvmi_Lx , E(660F3A,72,_,x,_,1,4,FVM), 0 , 113, 0 , 282, 186), // #1526 + INST(Vpshufb , VexRvm_Lx , V(660F38,00,_,x,I,I,4,FVM), 0 , 111, 0 , 322, 181), // #1527 + INST(Vpshufbitqmb , VexRvm_Lx , E(660F38,8F,_,x,0,0,4,FVM), 0 , 115, 0 , 415, 194), // #1528 + INST(Vpshufd , VexRmi_Lx , V(660F00,70,_,x,I,0,4,FV ), 0 , 145, 0 , 416, 157), // #1529 + INST(Vpshufhw , VexRmi_Lx , V(F30F00,70,_,x,I,I,4,FVM), 0 , 162, 0 , 417, 181), // #1530 + INST(Vpshuflw , VexRmi_Lx , V(F20F00,70,_,x,I,I,4,FVM), 0 , 225, 0 , 417, 181), // #1531 + INST(Vpsignb , VexRvm_Lx , V(660F38,08,_,x,I,_,_,_ ), 0 , 30 , 0 , 206, 178), // #1532 + INST(Vpsignd , VexRvm_Lx , V(660F38,0A,_,x,I,_,_,_ ), 0 , 30 , 0 , 206, 178), // #1533 + INST(Vpsignw , VexRvm_Lx , V(660F38,09,_,x,I,_,_,_ ), 0 , 30 , 0 , 206, 178), // #1534 + INST(Vpslld , VexRvmVmi_Lx_MEvex , V(660F00,F2,_,x,I,0,4,128), V(660F00,72,6,x,I,0,4,FV ), 226, 126, 418, 157), // #1535 + INST(Vpslldq , VexVmi_Lx_MEvex , V(660F00,73,7,x,I,I,4,FVM), 0 , 227, 0 , 419, 181), // #1536 + INST(Vpsllq , VexRvmVmi_Lx_MEvex , V(660F00,F3,_,x,I,1,4,128), V(660F00,73,6,x,I,1,4,FV ), 228, 127, 420, 157), // #1537 + INST(Vpsllvd , VexRvm_Lx , V(660F38,47,_,x,0,0,4,FV ), 0 , 111, 0 , 213, 169), // #1538 + INST(Vpsllvq , VexRvm_Lx , V(660F38,47,_,x,1,1,4,FV ), 0 , 184, 0 , 212, 169), // #1539 + INST(Vpsllvw , VexRvm_Lx , E(660F38,12,_,x,_,1,4,FVM), 0 , 114, 0 , 364, 163), // #1540 + INST(Vpsllw , VexRvmVmi_Lx_MEvex , V(660F00,F1,_,x,I,I,4,128), V(660F00,71,6,x,I,I,4,FVM), 226, 128, 421, 181), // #1541 + INST(Vpsrad , VexRvmVmi_Lx_MEvex , V(660F00,E2,_,x,I,0,4,128), V(660F00,72,4,x,I,0,4,FV ), 226, 129, 418, 157), // #1542 + INST(Vpsraq , VexRvmVmi_Lx_MEvex , E(660F00,E2,_,x,_,1,4,128), E(660F00,72,4,x,_,1,4,FV ), 229, 130, 422, 152), // #1543 + INST(Vpsravd , VexRvm_Lx , V(660F38,46,_,x,0,0,4,FV ), 0 , 111, 0 , 213, 169), // #1544 + INST(Vpsravq , VexRvm_Lx , E(660F38,46,_,x,_,1,4,FV ), 0 , 114, 0 , 217, 152), // #1545 + INST(Vpsravw , VexRvm_Lx , E(660F38,11,_,x,_,1,4,FVM), 0 , 114, 0 , 364, 163), // #1546 + INST(Vpsraw , VexRvmVmi_Lx_MEvex , V(660F00,E1,_,x,I,I,4,128), V(660F00,71,4,x,I,I,4,FVM), 226, 131, 421, 181), // #1547 + INST(Vpsrld , VexRvmVmi_Lx_MEvex , V(660F00,D2,_,x,I,0,4,128), V(660F00,72,2,x,I,0,4,FV ), 226, 132, 418, 157), // #1548 + INST(Vpsrldq , VexVmi_Lx_MEvex , V(660F00,73,3,x,I,I,4,FVM), 0 , 230, 0 , 419, 181), // #1549 + INST(Vpsrlq , VexRvmVmi_Lx_MEvex , V(660F00,D3,_,x,I,1,4,128), V(660F00,73,2,x,I,1,4,FV ), 228, 133, 420, 157), // #1550 + INST(Vpsrlvd , VexRvm_Lx , V(660F38,45,_,x,0,0,4,FV ), 0 , 111, 0 , 213, 169), // #1551 + INST(Vpsrlvq , VexRvm_Lx , V(660F38,45,_,x,1,1,4,FV ), 0 , 184, 0 , 212, 169), // #1552 + INST(Vpsrlvw , VexRvm_Lx , E(660F38,10,_,x,_,1,4,FVM), 0 , 114, 0 , 364, 163), // #1553 + INST(Vpsrlw , VexRvmVmi_Lx_MEvex , V(660F00,D1,_,x,I,I,4,128), V(660F00,71,2,x,I,I,4,FVM), 226, 134, 421, 181), // #1554 + INST(Vpsubb , VexRvm_Lx , V(660F00,F8,_,x,I,I,4,FVM), 0 , 145, 0 , 423, 181), // #1555 + INST(Vpsubd , VexRvm_Lx , V(660F00,FA,_,x,I,0,4,FV ), 0 , 145, 0 , 424, 157), // #1556 + INST(Vpsubq , VexRvm_Lx , V(660F00,FB,_,x,I,1,4,FV ), 0 , 104, 0 , 425, 157), // #1557 + INST(Vpsubsb , VexRvm_Lx , V(660F00,E8,_,x,I,I,4,FVM), 0 , 145, 0 , 423, 181), // #1558 + INST(Vpsubsw , VexRvm_Lx , V(660F00,E9,_,x,I,I,4,FVM), 0 , 145, 0 , 423, 181), // #1559 + INST(Vpsubusb , VexRvm_Lx , V(660F00,D8,_,x,I,I,4,FVM), 0 , 145, 0 , 423, 181), // #1560 + INST(Vpsubusw , VexRvm_Lx , V(660F00,D9,_,x,I,I,4,FVM), 0 , 145, 0 , 423, 181), // #1561 + INST(Vpsubw , VexRvm_Lx , V(660F00,F9,_,x,I,I,4,FVM), 0 , 145, 0 , 423, 181), // #1562 + INST(Vpternlogd , VexRvmi_Lx , E(660F3A,25,_,x,_,0,4,FV ), 0 , 112, 0 , 210, 152), // #1563 + INST(Vpternlogq , VexRvmi_Lx , E(660F3A,25,_,x,_,1,4,FV ), 0 , 113, 0 , 211, 152), // #1564 + INST(Vptest , VexRm_Lx , V(660F38,17,_,x,I,_,_,_ ), 0 , 30 , 0 , 305, 185), // #1565 + INST(Vptestmb , VexRvm_Lx , E(660F38,26,_,x,_,0,4,FVM), 0 , 115, 0 , 415, 163), // #1566 + INST(Vptestmd , VexRvm_Lx , E(660F38,27,_,x,_,0,4,FV ), 0 , 115, 0 , 426, 152), // #1567 + INST(Vptestmq , VexRvm_Lx , E(660F38,27,_,x,_,1,4,FV ), 0 , 114, 0 , 427, 152), // #1568 + INST(Vptestmw , VexRvm_Lx , E(660F38,26,_,x,_,1,4,FVM), 0 , 114, 0 , 415, 163), // #1569 + INST(Vptestnmb , VexRvm_Lx , E(F30F38,26,_,x,_,0,4,FVM), 0 , 171, 0 , 415, 163), // #1570 + INST(Vptestnmd , VexRvm_Lx , E(F30F38,27,_,x,_,0,4,FV ), 0 , 171, 0 , 426, 152), // #1571 + INST(Vptestnmq , VexRvm_Lx , E(F30F38,27,_,x,_,1,4,FV ), 0 , 231, 0 , 427, 152), // #1572 + INST(Vptestnmw , VexRvm_Lx , E(F30F38,26,_,x,_,1,4,FVM), 0 , 231, 0 , 415, 163), // #1573 + INST(Vpunpckhbw , VexRvm_Lx , V(660F00,68,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1574 + INST(Vpunpckhdq , VexRvm_Lx , V(660F00,6A,_,x,I,0,4,FV ), 0 , 145, 0 , 213, 157), // #1575 + INST(Vpunpckhqdq , VexRvm_Lx , V(660F00,6D,_,x,I,1,4,FV ), 0 , 104, 0 , 212, 157), // #1576 + INST(Vpunpckhwd , VexRvm_Lx , V(660F00,69,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1577 + INST(Vpunpcklbw , VexRvm_Lx , V(660F00,60,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1578 + INST(Vpunpckldq , VexRvm_Lx , V(660F00,62,_,x,I,0,4,FV ), 0 , 145, 0 , 213, 157), // #1579 + INST(Vpunpcklqdq , VexRvm_Lx , V(660F00,6C,_,x,I,1,4,FV ), 0 , 104, 0 , 212, 157), // #1580 + INST(Vpunpcklwd , VexRvm_Lx , V(660F00,61,_,x,I,I,4,FVM), 0 , 145, 0 , 322, 181), // #1581 + INST(Vpxor , VexRvm_Lx , V(660F00,EF,_,x,I,_,_,_ ), 0 , 71 , 0 , 360, 178), // #1582 + INST(Vpxord , VexRvm_Lx , E(660F00,EF,_,x,_,0,4,FV ), 0 , 200, 0 , 361, 152), // #1583 + INST(Vpxorq , VexRvm_Lx , E(660F00,EF,_,x,_,1,4,FV ), 0 , 136, 0 , 362, 152), // #1584 + INST(Vrangepd , VexRvmi_Lx , E(660F3A,50,_,x,_,1,4,FV ), 0 , 113, 0 , 292, 155), // #1585 + INST(Vrangeps , VexRvmi_Lx , E(660F3A,50,_,x,_,0,4,FV ), 0 , 112, 0 , 293, 155), // #1586 + INST(Vrangesd , VexRvmi , E(660F3A,51,_,I,_,1,3,T1S), 0 , 182, 0 , 294, 76 ), // #1587 + INST(Vrangess , VexRvmi , E(660F3A,51,_,I,_,0,2,T1S), 0 , 183, 0 , 295, 76 ), // #1588 + INST(Vrcp14pd , VexRm_Lx , E(660F38,4C,_,x,_,1,4,FV ), 0 , 114, 0 , 357, 152), // #1589 + INST(Vrcp14ps , VexRm_Lx , E(660F38,4C,_,x,_,0,4,FV ), 0 , 115, 0 , 381, 152), // #1590 + INST(Vrcp14sd , VexRvm , E(660F38,4D,_,I,_,1,3,T1S), 0 , 129, 0 , 428, 78 ), // #1591 + INST(Vrcp14ss , VexRvm , E(660F38,4D,_,I,_,0,2,T1S), 0 , 130, 0 , 429, 78 ), // #1592 + INST(Vrcp28pd , VexRm , E(660F38,CA,_,2,_,1,4,FV ), 0 , 172, 0 , 284, 164), // #1593 + INST(Vrcp28ps , VexRm , E(660F38,CA,_,2,_,0,4,FV ), 0 , 173, 0 , 285, 164), // #1594 + INST(Vrcp28sd , VexRvm , E(660F38,CB,_,I,_,1,3,T1S), 0 , 129, 0 , 315, 164), // #1595 + INST(Vrcp28ss , VexRvm , E(660F38,CB,_,I,_,0,2,T1S), 0 , 130, 0 , 316, 164), // #1596 + INST(Vrcpph , VexRm_Lx , E(66MAP6,4C,_,_,_,0,4,FV ), 0 , 185, 0 , 430, 148), // #1597 + INST(Vrcpps , VexRm_Lx , V(000F00,53,_,x,I,_,_,_ ), 0 , 74 , 0 , 305, 149), // #1598 + INST(Vrcpsh , VexRvm , E(66MAP6,4D,_,_,_,0,1,T1S), 0 , 187, 0 , 431, 148), // #1599 + INST(Vrcpss , VexRvm , V(F30F00,53,_,I,I,_,_,_ ), 0 , 201, 0 , 432, 149), // #1600 + INST(Vreducepd , VexRmi_Lx , E(660F3A,56,_,x,_,1,4,FV ), 0 , 113, 0 , 408, 155), // #1601 + INST(Vreduceph , VexRmi_Lx , E(000F3A,56,_,_,_,0,4,FV ), 0 , 124, 0 , 318, 146), // #1602 + INST(Vreduceps , VexRmi_Lx , E(660F3A,56,_,x,_,0,4,FV ), 0 , 112, 0 , 407, 155), // #1603 + INST(Vreducesd , VexRvmi , E(660F3A,57,_,I,_,1,3,T1S), 0 , 182, 0 , 433, 76 ), // #1604 + INST(Vreducesh , VexRvmi , E(000F3A,57,_,_,_,0,1,T1S), 0 , 190, 0 , 320, 148), // #1605 + INST(Vreducess , VexRvmi , E(660F3A,57,_,I,_,0,2,T1S), 0 , 183, 0 , 434, 76 ), // #1606 + INST(Vrndscalepd , VexRmi_Lx , E(660F3A,09,_,x,_,1,4,FV ), 0 , 113, 0 , 317, 152), // #1607 + INST(Vrndscaleph , VexRmi_Lx , E(000F3A,08,_,_,_,0,4,FV ), 0 , 124, 0 , 318, 146), // #1608 + INST(Vrndscaleps , VexRmi_Lx , E(660F3A,08,_,x,_,0,4,FV ), 0 , 112, 0 , 319, 152), // #1609 + INST(Vrndscalesd , VexRvmi , E(660F3A,0B,_,I,_,1,3,T1S), 0 , 182, 0 , 294, 78 ), // #1610 + INST(Vrndscalesh , VexRvmi , E(000F3A,0A,_,_,_,0,1,T1S), 0 , 190, 0 , 320, 148), // #1611 + INST(Vrndscaless , VexRvmi , E(660F3A,0A,_,I,_,0,2,T1S), 0 , 183, 0 , 295, 78 ), // #1612 + INST(Vroundpd , VexRmi_Lx , V(660F3A,09,_,x,I,_,_,_ ), 0 , 75 , 0 , 435, 149), // #1613 + INST(Vroundps , VexRmi_Lx , V(660F3A,08,_,x,I,_,_,_ ), 0 , 75 , 0 , 435, 149), // #1614 + INST(Vroundsd , VexRvmi , V(660F3A,0B,_,I,I,_,_,_ ), 0 , 75 , 0 , 436, 149), // #1615 + INST(Vroundss , VexRvmi , V(660F3A,0A,_,I,I,_,_,_ ), 0 , 75 , 0 , 437, 149), // #1616 + INST(Vrsqrt14pd , VexRm_Lx , E(660F38,4E,_,x,_,1,4,FV ), 0 , 114, 0 , 357, 152), // #1617 + INST(Vrsqrt14ps , VexRm_Lx , E(660F38,4E,_,x,_,0,4,FV ), 0 , 115, 0 , 381, 152), // #1618 + INST(Vrsqrt14sd , VexRvm , E(660F38,4F,_,I,_,1,3,T1S), 0 , 129, 0 , 428, 78 ), // #1619 + INST(Vrsqrt14ss , VexRvm , E(660F38,4F,_,I,_,0,2,T1S), 0 , 130, 0 , 429, 78 ), // #1620 + INST(Vrsqrt28pd , VexRm , E(660F38,CC,_,2,_,1,4,FV ), 0 , 172, 0 , 284, 164), // #1621 + INST(Vrsqrt28ps , VexRm , E(660F38,CC,_,2,_,0,4,FV ), 0 , 173, 0 , 285, 164), // #1622 + INST(Vrsqrt28sd , VexRvm , E(660F38,CD,_,I,_,1,3,T1S), 0 , 129, 0 , 315, 164), // #1623 + INST(Vrsqrt28ss , VexRvm , E(660F38,CD,_,I,_,0,2,T1S), 0 , 130, 0 , 316, 164), // #1624 + INST(Vrsqrtph , VexRm_Lx , E(66MAP6,4E,_,_,_,0,4,FV ), 0 , 185, 0 , 430, 146), // #1625 + INST(Vrsqrtps , VexRm_Lx , V(000F00,52,_,x,I,_,_,_ ), 0 , 74 , 0 , 305, 149), // #1626 + INST(Vrsqrtsh , VexRvm , E(66MAP6,4F,_,_,_,0,1,T1S), 0 , 187, 0 , 431, 148), // #1627 + INST(Vrsqrtss , VexRvm , V(F30F00,52,_,I,I,_,_,_ ), 0 , 201, 0 , 432, 149), // #1628 + INST(Vscalefpd , VexRvm_Lx , E(660F38,2C,_,x,_,1,4,FV ), 0 , 114, 0 , 438, 152), // #1629 + INST(Vscalefph , VexRvm_Lx , E(66MAP6,2C,_,_,_,0,4,FV ), 0 , 185, 0 , 201, 146), // #1630 + INST(Vscalefps , VexRvm_Lx , E(660F38,2C,_,x,_,0,4,FV ), 0 , 115, 0 , 291, 152), // #1631 + INST(Vscalefsd , VexRvm , E(660F38,2D,_,I,_,1,3,T1S), 0 , 129, 0 , 257, 78 ), // #1632 + INST(Vscalefsh , VexRvm , E(66MAP6,2D,_,_,_,0,1,T1S), 0 , 187, 0 , 204, 148), // #1633 + INST(Vscalefss , VexRvm , E(660F38,2D,_,I,_,0,2,T1S), 0 , 130, 0 , 265, 78 ), // #1634 + INST(Vscatterdpd , VexMr_VM , E(660F38,A2,_,x,_,1,3,T1S), 0 , 129, 0 , 411, 152), // #1635 + INST(Vscatterdps , VexMr_VM , E(660F38,A2,_,x,_,0,2,T1S), 0 , 130, 0 , 410, 152), // #1636 + INST(Vscatterpf0dpd , VexM_VM , E(660F38,C6,5,2,_,1,3,T1S), 0 , 232, 0 , 310, 170), // #1637 + INST(Vscatterpf0dps , VexM_VM , E(660F38,C6,5,2,_,0,2,T1S), 0 , 233, 0 , 311, 170), // #1638 + INST(Vscatterpf0qpd , VexM_VM , E(660F38,C7,5,2,_,1,3,T1S), 0 , 232, 0 , 312, 170), // #1639 + INST(Vscatterpf0qps , VexM_VM , E(660F38,C7,5,2,_,0,2,T1S), 0 , 233, 0 , 312, 170), // #1640 + INST(Vscatterpf1dpd , VexM_VM , E(660F38,C6,6,2,_,1,3,T1S), 0 , 234, 0 , 310, 170), // #1641 + INST(Vscatterpf1dps , VexM_VM , E(660F38,C6,6,2,_,0,2,T1S), 0 , 235, 0 , 311, 170), // #1642 + INST(Vscatterpf1qpd , VexM_VM , E(660F38,C7,6,2,_,1,3,T1S), 0 , 234, 0 , 312, 170), // #1643 + INST(Vscatterpf1qps , VexM_VM , E(660F38,C7,6,2,_,0,2,T1S), 0 , 235, 0 , 312, 170), // #1644 + INST(Vscatterqpd , VexMr_VM , E(660F38,A3,_,x,_,1,3,T1S), 0 , 129, 0 , 413, 152), // #1645 + INST(Vscatterqps , VexMr_VM , E(660F38,A3,_,x,_,0,2,T1S), 0 , 130, 0 , 412, 152), // #1646 + INST(Vsha512msg1 , VexRm , V(F20F38,CC,_,1,0,_,_,_ ), 0 , 236, 0 , 439, 196), // #1647 + INST(Vsha512msg2 , VexRm , V(F20F38,CD,_,1,0,_,_,_ ), 0 , 236, 0 , 440, 196), // #1648 + INST(Vsha512rnds2 , VexRvm , V(F20F38,CB,_,1,0,_,_,_ ), 0 , 236, 0 , 441, 196), // #1649 + INST(Vshuff32x4 , VexRvmi_Lx , E(660F3A,23,_,x,_,0,4,FV ), 0 , 112, 0 , 442, 152), // #1650 + INST(Vshuff64x2 , VexRvmi_Lx , E(660F3A,23,_,x,_,1,4,FV ), 0 , 113, 0 , 443, 152), // #1651 + INST(Vshufi32x4 , VexRvmi_Lx , E(660F3A,43,_,x,_,0,4,FV ), 0 , 112, 0 , 442, 152), // #1652 + INST(Vshufi64x2 , VexRvmi_Lx , E(660F3A,43,_,x,_,1,4,FV ), 0 , 113, 0 , 443, 152), // #1653 + INST(Vshufpd , VexRvmi_Lx , V(660F00,C6,_,x,I,1,4,FV ), 0 , 104, 0 , 444, 145), // #1654 + INST(Vshufps , VexRvmi_Lx , V(000F00,C6,_,x,I,0,4,FV ), 0 , 106, 0 , 445, 145), // #1655 + INST(Vsm3msg1 , VexRvm , V(000F38,DA,_,0,0,_,_,_ ), 0 , 11 , 0 , 446, 197), // #1656 + INST(Vsm3msg2 , VexRvm , V(660F38,DA,_,0,0,_,_,_ ), 0 , 30 , 0 , 446, 197), // #1657 + INST(Vsm3rnds2 , VexRvmi , V(660F3A,DE,_,0,0,_,_,_ ), 0 , 75 , 0 , 283, 197), // #1658 + INST(Vsm4key4 , VexRvm_Lx , V(F30F38,DA,_,x,0,_,_,_ ), 0 , 89 , 0 , 206, 198), // #1659 + INST(Vsm4rnds4 , VexRvm_Lx , V(F20F38,DA,_,x,0,_,_,_ ), 0 , 85 , 0 , 206, 198), // #1660 + INST(Vsqrtpd , VexRm_Lx , V(660F00,51,_,x,I,1,4,FV ), 0 , 104, 0 , 447, 145), // #1661 + INST(Vsqrtph , VexRm_Lx , E(00MAP5,51,_,_,_,0,4,FV ), 0 , 105, 0 , 252, 146), // #1662 + INST(Vsqrtps , VexRm_Lx , V(000F00,51,_,x,I,0,4,FV ), 0 , 106, 0 , 240, 145), // #1663 + INST(Vsqrtsd , VexRvm , V(F20F00,51,_,I,I,1,3,T1S), 0 , 107, 0 , 203, 147), // #1664 + INST(Vsqrtsh , VexRvm , E(F3MAP5,51,_,_,_,0,1,T1S), 0 , 108, 0 , 204, 148), // #1665 + INST(Vsqrtss , VexRvm , V(F30F00,51,_,I,I,0,2,T1S), 0 , 109, 0 , 205, 147), // #1666 + INST(Vstmxcsr , VexM , V(000F00,AE,3,0,I,_,_,_ ), 0 , 237, 0 , 327, 149), // #1667 + INST(Vsubpd , VexRvm_Lx , V(660F00,5C,_,x,I,1,4,FV ), 0 , 104, 0 , 200, 145), // #1668 + INST(Vsubph , VexRvm_Lx , E(00MAP5,5C,_,_,_,0,4,FV ), 0 , 105, 0 , 201, 146), // #1669 + INST(Vsubps , VexRvm_Lx , V(000F00,5C,_,x,I,0,4,FV ), 0 , 106, 0 , 202, 145), // #1670 + INST(Vsubsd , VexRvm , V(F20F00,5C,_,I,I,1,3,T1S), 0 , 107, 0 , 203, 147), // #1671 + INST(Vsubsh , VexRvm , E(F3MAP5,5C,_,_,_,0,1,T1S), 0 , 108, 0 , 204, 148), // #1672 + INST(Vsubss , VexRvm , V(F30F00,5C,_,I,I,0,2,T1S), 0 , 109, 0 , 205, 147), // #1673 + INST(Vtestpd , VexRm_Lx , V(660F38,0F,_,x,0,_,_,_ ), 0 , 30 , 0 , 305, 185), // #1674 + INST(Vtestps , VexRm_Lx , V(660F38,0E,_,x,0,_,_,_ ), 0 , 30 , 0 , 305, 185), // #1675 + INST(Vucomisd , VexRm , V(660F00,2E,_,I,I,1,3,T1S), 0 , 126, 0 , 234, 158), // #1676 + INST(Vucomish , VexRm , E(00MAP5,2E,_,_,_,0,1,T1S), 0 , 127, 0 , 235, 159), // #1677 + INST(Vucomiss , VexRm , V(000F00,2E,_,I,I,0,2,T1S), 0 , 128, 0 , 236, 158), // #1678 + INST(Vunpckhpd , VexRvm_Lx , V(660F00,15,_,x,I,1,4,FV ), 0 , 104, 0 , 212, 145), // #1679 + INST(Vunpckhps , VexRvm_Lx , V(000F00,15,_,x,I,0,4,FV ), 0 , 106, 0 , 213, 145), // #1680 + INST(Vunpcklpd , VexRvm_Lx , V(660F00,14,_,x,I,1,4,FV ), 0 , 104, 0 , 212, 145), // #1681 + INST(Vunpcklps , VexRvm_Lx , V(000F00,14,_,x,I,0,4,FV ), 0 , 106, 0 , 213, 145), // #1682 + INST(Vxorpd , VexRvm_Lx , V(660F00,57,_,x,I,1,4,FV ), 0 , 104, 0 , 425, 153), // #1683 + INST(Vxorps , VexRvm_Lx , V(000F00,57,_,x,I,0,4,FV ), 0 , 106, 0 , 424, 153), // #1684 + INST(Vzeroall , VexOp , V(000F00,77,_,1,I,_,_,_ ), 0 , 70 , 0 , 448, 149), // #1685 + INST(Vzeroupper , VexOp , V(000F00,77,_,0,I,_,_,_ ), 0 , 74 , 0 , 448, 149), // #1686 + INST(Wbinvd , X86Op , O(000F00,09,_,_,_,_,_,_ ), 0 , 5 , 0 , 31 , 45 ), // #1687 + INST(Wbnoinvd , X86Op , O(F30F00,09,_,_,_,_,_,_ ), 0 , 7 , 0 , 31 , 199), // #1688 + INST(Wrfsbase , X86M , O(F30F00,AE,2,_,x,_,_,_ ), 0 , 238, 0 , 177, 122), // #1689 + INST(Wrgsbase , X86M , O(F30F00,AE,3,_,x,_,_,_ ), 0 , 239, 0 , 177, 122), // #1690 + INST(Wrmsr , X86Op , O(000F00,30,_,_,_,_,_,_ ), 0 , 5 , 0 , 178, 123), // #1691 + INST(Wrssd , X86Mr , O(000F38,F6,_,_,_,_,_,_ ), 0 , 1 , 0 , 449, 65 ), // #1692 + INST(Wrssq , X86Mr , O(000F38,F6,_,_,1,_,_,_ ), 0 , 240, 0 , 450, 65 ), // #1693 + INST(Wrussd , X86Mr , O(660F38,F5,_,_,_,_,_,_ ), 0 , 2 , 0 , 449, 65 ), // #1694 + INST(Wrussq , X86Mr , O(660F38,F5,_,_,1,_,_,_ ), 0 , 241, 0 , 450, 65 ), // #1695 + INST(Xabort , X86Op_Mod11RM_I8 , O(000000,C6,7,_,_,_,_,_ ), 0 , 29 , 0 , 84 , 200), // #1696 + INST(Xadd , X86Xadd , O(000F00,C0,_,_,x,_,_,_ ), 0 , 5 , 0 , 451, 40 ), // #1697 + INST(Xbegin , X86JmpRel , O(000000,C7,7,_,_,_,_,_ ), 0 , 29 , 0 , 452, 200), // #1698 + INST(Xchg , X86Xchg , O(000000,86,_,_,x,_,_,_ ), 0 , 0 , 0 , 453, 0 ), // #1699 + INST(Xend , X86Op , O(000F01,D5,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 200), // #1700 + INST(Xgetbv , X86Op , O(000F01,D0,_,_,_,_,_,_ ), 0 , 23 , 0 , 178, 201), // #1701 + INST(Xlatb , X86Op , O(000000,D7,_,_,_,_,_,_ ), 0 , 0 , 0 , 31 , 0 ), // #1702 + INST(Xor , X86Arith , O(000000,30,6,_,x,_,_,_ ), 0 , 34 , 0 , 183, 1 ), // #1703 + INST(Xorpd , ExtRm , O(660F00,57,_,_,_,_,_,_ ), 0 , 4 , 0 , 155, 5 ), // #1704 + INST(Xorps , ExtRm , O(000F00,57,_,_,_,_,_,_ ), 0 , 5 , 0 , 155, 6 ), // #1705 + INST(Xresldtrk , X86Op , O(F20F01,E9,_,_,_,_,_,_ ), 0 , 93 , 0 , 31 , 202), // #1706 + INST(Xrstor , X86M_Only_EDX_EAX , O(000F00,AE,5,_,_,_,_,_ ), 0 , 79 , 0 , 454, 201), // #1707 + INST(Xrstor64 , X86M_Only_EDX_EAX , O(000F00,AE,5,_,1,_,_,_ ), 0 , 242, 0 , 455, 201), // #1708 + INST(Xrstors , X86M_Only_EDX_EAX , O(000F00,C7,3,_,_,_,_,_ ), 0 , 80 , 0 , 454, 203), // #1709 + INST(Xrstors64 , X86M_Only_EDX_EAX , O(000F00,C7,3,_,1,_,_,_ ), 0 , 243, 0 , 455, 203), // #1710 + INST(Xsave , X86M_Only_EDX_EAX , O(000F00,AE,4,_,_,_,_,_ ), 0 , 98 , 0 , 454, 201), // #1711 + INST(Xsave64 , X86M_Only_EDX_EAX , O(000F00,AE,4,_,1,_,_,_ ), 0 , 244, 0 , 455, 201), // #1712 + INST(Xsavec , X86M_Only_EDX_EAX , O(000F00,C7,4,_,_,_,_,_ ), 0 , 98 , 0 , 454, 204), // #1713 + INST(Xsavec64 , X86M_Only_EDX_EAX , O(000F00,C7,4,_,1,_,_,_ ), 0 , 244, 0 , 455, 204), // #1714 + INST(Xsaveopt , X86M_Only_EDX_EAX , O(000F00,AE,6,_,_,_,_,_ ), 0 , 82 , 0 , 454, 205), // #1715 + INST(Xsaveopt64 , X86M_Only_EDX_EAX , O(000F00,AE,6,_,1,_,_,_ ), 0 , 245, 0 , 455, 205), // #1716 + INST(Xsaves , X86M_Only_EDX_EAX , O(000F00,C7,5,_,_,_,_,_ ), 0 , 79 , 0 , 454, 203), // #1717 + INST(Xsaves64 , X86M_Only_EDX_EAX , O(000F00,C7,5,_,1,_,_,_ ), 0 , 242, 0 , 455, 203), // #1718 + INST(Xsetbv , X86Op , O(000F01,D1,_,_,_,_,_,_ ), 0 , 23 , 0 , 178, 201), // #1719 + INST(Xsusldtrk , X86Op , O(F20F01,E8,_,_,_,_,_,_ ), 0 , 93 , 0 , 31 , 202), // #1720 + INST(Xtest , X86Op , O(000F01,D6,_,_,_,_,_,_ ), 0 , 23 , 0 , 31 , 206) // #1721 // ${InstInfo:End} }; #undef NAME_DATA_INDEX @@ -1739,248 +1798,251 @@ const InstDB::InstInfo InstDB::_instInfoTable[] = { // ------------------- Automatically generated, do not edit ------------------- const uint32_t InstDB::_mainOpcodeTable[] = { O(000000,00,0,0,0,0,0,0 ), // #0 [ref=56x] - O(000000,00,2,0,0,0,0,0 ), // #1 [ref=4x] - O(660F38,00,0,0,0,0,0,0 ), // #2 [ref=43x] - O(660F00,00,0,0,0,0,0,0 ), // #3 [ref=38x] - O(000F00,00,0,0,0,0,0,0 ), // #4 [ref=231x] - O(F20F00,00,0,0,0,0,0,0 ), // #5 [ref=24x] - O(F30F00,00,0,0,0,0,0,0 ), // #6 [ref=29x] - O(F30F38,00,0,0,0,0,0,0 ), // #7 [ref=2x] - O(660F3A,00,0,0,0,0,0,0 ), // #8 [ref=22x] - O(000000,00,4,0,0,0,0,0 ), // #9 [ref=5x] - V(000F38,00,0,0,0,0,0,None), // #10 [ref=6x] - V(XOP_M9,00,1,0,0,0,0,None), // #11 [ref=3x] - V(XOP_M9,00,6,0,0,0,0,None), // #12 [ref=2x] - V(XOP_M9,00,5,0,0,0,0,None), // #13 [ref=1x] - V(XOP_M9,00,3,0,0,0,0,None), // #14 [ref=1x] - V(XOP_M9,00,2,0,0,0,0,None), // #15 [ref=1x] - V(000F38,00,3,0,0,0,0,None), // #16 [ref=1x] - V(000F38,00,2,0,0,0,0,None), // #17 [ref=1x] - V(000F38,00,1,0,0,0,0,None), // #18 [ref=1x] - O(660000,00,0,0,0,0,0,0 ), // #19 [ref=7x] - O(000000,00,0,0,1,0,0,0 ), // #20 [ref=3x] - O(000F01,00,0,0,0,0,0,0 ), // #21 [ref=29x] - O(000F00,00,7,0,0,0,0,0 ), // #22 [ref=5x] - O(660F00,00,7,0,0,0,0,0 ), // #23 [ref=1x] - O(F30F00,00,6,0,0,0,0,0 ), // #24 [ref=4x] - O(F30F01,00,0,0,0,0,0,0 ), // #25 [ref=9x] - O(660F00,00,6,0,0,0,0,0 ), // #26 [ref=3x] - O(000000,00,7,0,0,0,0,0 ), // #27 [ref=5x] - O(000F00,00,1,0,1,0,0,0 ), // #28 [ref=2x] - O(000F00,00,1,0,0,0,0,0 ), // #29 [ref=6x] - O(F20F38,00,0,0,0,0,0,0 ), // #30 [ref=2x] - O(000000,00,1,0,0,0,0,0 ), // #31 [ref=3x] - O(000000,00,6,0,0,0,0,0 ), // #32 [ref=3x] - O(F30F00,00,7,0,0,0,0,3 ), // #33 [ref=1x] - O(F30F00,00,7,0,0,0,0,2 ), // #34 [ref=1x] - O_FPU(00,D900,0) , // #35 [ref=29x] - O_FPU(00,C000,0) , // #36 [ref=1x] - O_FPU(00,DE00,0) , // #37 [ref=7x] - O_FPU(00,0000,4) , // #38 [ref=4x] - O_FPU(00,0000,6) , // #39 [ref=4x] - O_FPU(9B,DB00,0) , // #40 [ref=2x] - O_FPU(00,DA00,0) , // #41 [ref=5x] - O_FPU(00,DB00,0) , // #42 [ref=8x] - O_FPU(00,D000,2) , // #43 [ref=1x] - O_FPU(00,DF00,0) , // #44 [ref=2x] - O_FPU(00,D800,3) , // #45 [ref=1x] - O_FPU(00,F000,6) , // #46 [ref=1x] - O_FPU(00,F800,7) , // #47 [ref=1x] - O_FPU(00,DD00,0) , // #48 [ref=3x] - O_FPU(00,0000,0) , // #49 [ref=4x] - O_FPU(00,0000,2) , // #50 [ref=3x] - O_FPU(00,0000,3) , // #51 [ref=3x] - O_FPU(00,0000,7) , // #52 [ref=3x] - O_FPU(00,0000,1) , // #53 [ref=2x] - O_FPU(00,0000,5) , // #54 [ref=2x] - O_FPU(00,C800,1) , // #55 [ref=1x] - O_FPU(9B,0000,6) , // #56 [ref=2x] - O_FPU(9B,0000,7) , // #57 [ref=2x] - O_FPU(00,E000,4) , // #58 [ref=1x] - O_FPU(00,E800,5) , // #59 [ref=1x] - O(000F00,00,0,0,1,0,0,0 ), // #60 [ref=3x] - O(F30F3A,00,0,0,0,0,0,0 ), // #61 [ref=1x] - O(000000,00,5,0,0,0,0,0 ), // #62 [ref=4x] - O(F30F00,00,5,0,0,0,0,0 ), // #63 [ref=2x] - O(F30F00,00,5,0,1,0,0,0 ), // #64 [ref=1x] - V(660F00,00,0,1,0,0,0,None), // #65 [ref=7x] - V(660F00,00,0,1,1,0,0,None), // #66 [ref=6x] - V(000F00,00,0,1,1,0,0,None), // #67 [ref=7x] - V(000F00,00,0,1,0,0,0,None), // #68 [ref=8x] - V(660F00,00,0,0,0,0,0,None), // #69 [ref=15x] - V(660F00,00,0,0,1,0,0,None), // #70 [ref=4x] - V(000F00,00,0,0,1,0,0,None), // #71 [ref=4x] - V(000F00,00,0,0,0,0,0,None), // #72 [ref=10x] - V(660F3A,00,0,0,0,0,0,None), // #73 [ref=47x] - V(660F3A,00,0,0,1,0,0,None), // #74 [ref=4x] - O(000000,00,3,0,0,0,0,0 ), // #75 [ref=4x] - O(000F00,00,2,0,0,0,0,0 ), // #76 [ref=5x] - O(000F00,00,5,0,0,0,0,0 ), // #77 [ref=4x] - O(000F00,00,3,0,0,0,0,0 ), // #78 [ref=5x] - V(XOP_M9,00,0,0,0,0,0,None), // #79 [ref=32x] - O(000F00,00,6,0,0,0,0,0 ), // #80 [ref=5x] - V(XOP_MA,00,0,0,0,0,0,None), // #81 [ref=1x] - V(XOP_MA,00,1,0,0,0,0,None), // #82 [ref=1x] - O(000F38,00,0,0,0,0,0,0 ), // #83 [ref=24x] - V(F20F38,00,0,0,0,0,0,None), // #84 [ref=6x] - O(000F3A,00,0,0,0,0,0,0 ), // #85 [ref=4x] - O(F30000,00,0,0,0,0,0,0 ), // #86 [ref=1x] - O(000F0F,00,0,0,0,0,0,0 ), // #87 [ref=26x] - V(F30F38,00,0,0,0,0,0,None), // #88 [ref=5x] - O(000F3A,00,0,0,1,0,0,0 ), // #89 [ref=1x] - O(660F3A,00,0,0,1,0,0,0 ), // #90 [ref=1x] - O(F30F00,00,4,0,0,0,0,0 ), // #91 [ref=1x] - O(F20F01,00,0,0,0,0,0,0 ), // #92 [ref=4x] - O(F30F00,00,1,0,0,0,0,0 ), // #93 [ref=3x] - O(F30F00,00,7,0,0,0,0,0 ), // #94 [ref=1x] - V(F20F3A,00,0,0,0,0,0,None), // #95 [ref=1x] - V(660F38,00,0,0,0,0,0,None), // #96 [ref=26x] - O(000F00,00,4,0,0,0,0,0 ), // #97 [ref=4x] - V(XOP_M9,00,7,0,0,0,0,None), // #98 [ref=1x] - V(XOP_M9,00,4,0,0,0,0,None), // #99 [ref=1x] - O(F20F00,00,6,0,0,0,0,0 ), // #100 [ref=1x] - E(F20F38,00,0,2,0,0,4,None), // #101 [ref=4x] - E(F20F38,00,0,0,0,0,4,None), // #102 [ref=2x] - V(660F00,00,0,0,0,1,4,ByLL), // #103 [ref=25x] - E(00MAP5,00,0,0,0,0,4,ByLL), // #104 [ref=10x] - V(000F00,00,0,0,0,0,4,ByLL), // #105 [ref=19x] - V(F20F00,00,0,0,0,1,3,None), // #106 [ref=10x] - E(F3MAP5,00,0,0,0,0,1,None), // #107 [ref=13x] - V(F30F00,00,0,0,0,0,2,None), // #108 [ref=12x] - V(F20F00,00,0,0,0,0,0,None), // #109 [ref=4x] - V(660F38,00,0,0,0,0,4,ByLL), // #110 [ref=50x] - E(660F3A,00,0,0,0,0,4,ByLL), // #111 [ref=17x] - E(660F3A,00,0,0,0,1,4,ByLL), // #112 [ref=18x] - E(660F38,00,0,0,0,1,4,ByLL), // #113 [ref=40x] - E(660F38,00,0,0,0,0,4,ByLL), // #114 [ref=25x] - V(660F38,00,0,1,0,0,0,None), // #115 [ref=2x] - E(660F38,00,0,0,0,0,3,None), // #116 [ref=2x] - E(660F38,00,0,0,0,0,4,None), // #117 [ref=2x] - E(660F38,00,0,2,0,0,5,None), // #118 [ref=2x] - E(660F38,00,0,0,0,1,4,None), // #119 [ref=2x] - E(660F38,00,0,2,0,1,5,None), // #120 [ref=2x] - V(660F38,00,0,0,0,1,3,None), // #121 [ref=2x] - V(660F38,00,0,0,0,0,2,None), // #122 [ref=14x] - E(000F3A,00,0,0,0,0,4,ByLL), // #123 [ref=5x] - E(F30F3A,00,0,0,0,0,1,None), // #124 [ref=1x] - V(660F00,00,0,0,0,1,3,None), // #125 [ref=5x] - E(00MAP5,00,0,0,0,0,1,None), // #126 [ref=2x] - V(000F00,00,0,0,0,0,2,None), // #127 [ref=2x] - E(660F38,00,0,0,0,1,3,None), // #128 [ref=14x] - E(660F38,00,0,0,0,0,2,None), // #129 [ref=14x] - V(F30F00,00,0,0,0,0,3,ByLL), // #130 [ref=1x] - E(F20F38,00,0,0,0,0,4,ByLL), // #131 [ref=2x] - E(F30F38,00,0,0,0,0,4,ByLL), // #132 [ref=4x] - V(F20F00,00,0,0,0,1,4,ByLL), // #133 [ref=1x] - E(66MAP5,00,0,0,0,1,4,ByLL), // #134 [ref=1x] - E(660F00,00,0,0,0,1,4,ByLL), // #135 [ref=10x] - E(000F00,00,0,0,0,1,4,ByLL), // #136 [ref=3x] - E(66MAP5,00,0,0,0,0,3,ByLL), // #137 [ref=1x] - E(00MAP5,00,0,0,0,0,2,ByLL), // #138 [ref=1x] - V(660F38,00,0,0,0,0,3,ByLL), // #139 [ref=7x] - E(66MAP6,00,0,0,0,0,3,ByLL), // #140 [ref=1x] - E(66MAP5,00,0,0,0,0,2,ByLL), // #141 [ref=4x] - E(00MAP5,00,0,0,0,0,3,ByLL), // #142 [ref=2x] - E(66MAP5,00,0,0,0,0,4,ByLL), // #143 [ref=3x] - V(660F00,00,0,0,0,0,4,ByLL), // #144 [ref=43x] - V(000F00,00,0,0,0,0,3,ByLL), // #145 [ref=1x] - V(660F3A,00,0,0,0,0,3,ByLL), // #146 [ref=1x] - E(660F00,00,0,0,0,0,3,ByLL), // #147 [ref=4x] - E(000F00,00,0,0,0,0,4,ByLL), // #148 [ref=2x] - E(F30F00,00,0,0,0,1,4,ByLL), // #149 [ref=3x] - E(00MAP5,00,0,0,0,1,4,ByLL), // #150 [ref=1x] - E(F2MAP5,00,0,0,0,1,3,None), // #151 [ref=1x] - V(F20F00,00,0,0,0,0,3,None), // #152 [ref=2x] - E(F20F00,00,0,0,0,0,3,None), // #153 [ref=2x] - E(00MAP6,00,0,0,0,0,1,None), // #154 [ref=1x] - V(F20F00,00,0,0,0,0,2,T1W ), // #155 [ref=1x] - E(F3MAP5,00,0,0,0,0,2,T1W ), // #156 [ref=2x] - V(F30F00,00,0,0,0,0,2,T1W ), // #157 [ref=1x] - E(00MAP5,00,0,0,0,0,2,None), // #158 [ref=1x] - E(F30F00,00,0,0,0,0,2,None), // #159 [ref=2x] - E(F3MAP5,00,0,0,0,0,3,ByLL), // #160 [ref=1x] - V(F30F00,00,0,0,0,0,4,ByLL), // #161 [ref=4x] - E(F30F00,00,0,0,0,0,3,ByLL), // #162 [ref=1x] - E(F2MAP5,00,0,0,0,0,4,ByLL), // #163 [ref=2x] - E(F20F00,00,0,0,0,0,4,ByLL), // #164 [ref=2x] - E(F2MAP5,00,0,0,0,1,4,ByLL), // #165 [ref=1x] - E(F20F00,00,0,0,0,1,4,ByLL), // #166 [ref=2x] - E(F20F00,00,0,0,0,0,2,T1W ), // #167 [ref=1x] - E(F30F00,00,0,0,0,0,2,T1W ), // #168 [ref=1x] - E(F3MAP5,00,0,0,0,0,4,ByLL), // #169 [ref=1x] - E(660F38,00,0,2,0,1,4,ByLL), // #170 [ref=3x] - E(660F38,00,0,2,0,0,4,ByLL), // #171 [ref=3x] - V(660F3A,00,0,1,0,0,0,None), // #172 [ref=6x] - E(660F3A,00,0,0,0,0,4,None), // #173 [ref=4x] - E(660F3A,00,0,2,0,0,5,None), // #174 [ref=4x] - E(660F3A,00,0,0,0,1,4,None), // #175 [ref=4x] - E(660F3A,00,0,2,0,1,5,None), // #176 [ref=4x] - V(660F3A,00,0,0,0,0,2,None), // #177 [ref=4x] - E(F2MAP6,00,0,0,0,0,4,ByLL), // #178 [ref=2x] - E(F2MAP6,00,0,0,0,0,2,None), // #179 [ref=2x] - E(660F3A,00,0,0,0,1,3,None), // #180 [ref=6x] - E(660F3A,00,0,0,0,0,2,None), // #181 [ref=6x] - V(660F38,00,0,0,1,1,4,ByLL), // #182 [ref=20x] - E(66MAP6,00,0,0,0,0,4,ByLL), // #183 [ref=22x] - V(660F38,00,0,0,1,1,3,None), // #184 [ref=12x] - E(66MAP6,00,0,0,0,0,1,None), // #185 [ref=16x] - E(F3MAP6,00,0,0,0,0,4,ByLL), // #186 [ref=2x] - E(F3MAP6,00,0,0,0,0,2,None), // #187 [ref=2x] - E(000F3A,00,0,0,0,0,1,None), // #188 [ref=4x] - V(660F38,00,0,0,1,0,0,None), // #189 [ref=5x] - E(660F38,00,1,2,0,1,3,None), // #190 [ref=2x] - E(660F38,00,1,2,0,0,2,None), // #191 [ref=2x] - E(660F38,00,2,2,0,1,3,None), // #192 [ref=2x] - E(660F38,00,2,2,0,0,2,None), // #193 [ref=2x] - V(660F3A,00,0,0,1,1,4,ByLL), // #194 [ref=2x] - V(000F00,00,2,0,0,0,0,None), // #195 [ref=1x] - V(660F00,00,0,0,0,0,2,None), // #196 [ref=1x] - V(F20F00,00,0,0,0,1,3,DUP ), // #197 [ref=1x] - E(660F00,00,0,0,0,0,4,ByLL), // #198 [ref=6x] - V(F30F00,00,0,0,0,0,0,None), // #199 [ref=3x] - E(F30F00,00,0,0,0,0,4,ByLL), // #200 [ref=1x] - V(000F00,00,0,0,0,0,3,None), // #201 [ref=2x] - E(66MAP5,00,0,0,0,0,1,None), // #202 [ref=1x] - E(F20F38,00,0,0,0,1,4,ByLL), // #203 [ref=1x] - V(660F3A,00,0,0,0,0,4,ByLL), // #204 [ref=2x] - E(F30F38,00,0,0,0,1,0,None), // #205 [ref=5x] - E(F30F38,00,0,0,0,0,0,None), // #206 [ref=5x] - V(660F38,00,0,0,0,0,1,None), // #207 [ref=1x] - V(XOP_M8,00,0,0,0,0,0,None), // #208 [ref=22x] - V(660F38,00,0,0,0,1,4,ByLL), // #209 [ref=4x] - E(660F38,00,0,0,0,0,0,None), // #210 [ref=2x] - E(660F38,00,0,0,0,1,1,None), // #211 [ref=2x] - E(660F38,00,0,0,1,1,4,ByLL), // #212 [ref=1x] - V(660F3A,00,0,0,1,1,3,None), // #213 [ref=2x] - V(660F3A,00,0,0,0,0,1,None), // #214 [ref=1x] - V(660F00,00,0,0,0,0,1,None), // #215 [ref=1x] - E(F30F38,00,0,0,0,0,2,ByLL), // #216 [ref=6x] - E(F30F38,00,0,0,0,0,3,ByLL), // #217 [ref=9x] - E(F30F38,00,0,0,0,0,1,ByLL), // #218 [ref=3x] - V(660F38,00,0,0,0,0,2,ByLL), // #219 [ref=4x] - V(660F38,00,0,0,0,0,1,ByLL), // #220 [ref=2x] - E(660F00,00,1,0,0,0,4,ByLL), // #221 [ref=1x] - E(660F00,00,1,0,0,1,4,ByLL), // #222 [ref=1x] - V(F20F00,00,0,0,0,0,4,ByLL), // #223 [ref=1x] - V(660F00,00,0,0,0,0,4,None), // #224 [ref=6x] - V(660F00,00,7,0,0,0,4,ByLL), // #225 [ref=1x] - V(660F00,00,0,0,0,1,4,None), // #226 [ref=2x] - E(660F00,00,0,0,0,1,4,None), // #227 [ref=1x] - V(660F00,00,3,0,0,0,4,ByLL), // #228 [ref=1x] - E(F30F38,00,0,0,0,1,4,ByLL), // #229 [ref=2x] - E(660F38,00,5,2,0,1,3,None), // #230 [ref=2x] - E(660F38,00,5,2,0,0,2,None), // #231 [ref=2x] - E(660F38,00,6,2,0,1,3,None), // #232 [ref=2x] - E(660F38,00,6,2,0,0,2,None), // #233 [ref=2x] - V(000F00,00,3,0,0,0,0,None), // #234 [ref=1x] - O(F30F00,00,2,0,0,0,0,0 ), // #235 [ref=1x] - O(F30F00,00,3,0,0,0,0,0 ), // #236 [ref=1x] - O(000F38,00,0,0,1,0,0,0 ), // #237 [ref=1x] - O(660F38,00,0,0,1,0,0,0 ), // #238 [ref=1x] - O(000F00,00,5,0,1,0,0,0 ), // #239 [ref=2x] - O(000F00,00,3,0,1,0,0,0 ), // #240 [ref=1x] - O(000F00,00,4,0,1,0,0,0 ), // #241 [ref=2x] - O(000F00,00,6,0,1,0,0,0 ) // #242 [ref=1x] + O(000F38,00,0,0,0,0,0,0 ), // #1 [ref=25x] + O(660F38,00,0,0,0,0,0,0 ), // #2 [ref=44x] + O(000000,00,2,0,0,0,0,0 ), // #3 [ref=4x] + O(660F00,00,0,0,0,0,0,0 ), // #4 [ref=38x] + O(000F00,00,0,0,0,0,0,0 ), // #5 [ref=231x] + O(F20F00,00,0,0,0,0,0,0 ), // #6 [ref=24x] + O(F30F00,00,0,0,0,0,0,0 ), // #7 [ref=29x] + O(F30F38,00,0,0,0,0,0,0 ), // #8 [ref=3x] + O(660F3A,00,0,0,0,0,0,0 ), // #9 [ref=22x] + O(000000,00,4,0,0,0,0,0 ), // #10 [ref=5x] + V(000F38,00,0,0,0,0,0,None), // #11 [ref=13x] + O(F20F38,00,0,0,0,0,0,0 ), // #12 [ref=3x] + V(XOP_M9,00,1,0,0,0,0,None), // #13 [ref=3x] + V(XOP_M9,00,6,0,0,0,0,None), // #14 [ref=2x] + V(XOP_M9,00,5,0,0,0,0,None), // #15 [ref=1x] + V(XOP_M9,00,3,0,0,0,0,None), // #16 [ref=1x] + V(XOP_M9,00,2,0,0,0,0,None), // #17 [ref=1x] + V(000F38,00,3,0,0,0,0,None), // #18 [ref=1x] + V(000F38,00,2,0,0,0,0,None), // #19 [ref=1x] + V(000F38,00,1,0,0,0,0,None), // #20 [ref=1x] + O(660000,00,0,0,0,0,0,0 ), // #21 [ref=7x] + O(000000,00,0,0,1,0,0,0 ), // #22 [ref=3x] + O(000F01,00,0,0,0,0,0,0 ), // #23 [ref=32x] + O(000F00,00,7,0,0,0,0,0 ), // #24 [ref=6x] + O(660F00,00,7,0,0,0,0,0 ), // #25 [ref=1x] + O(F30F00,00,6,0,0,0,0,0 ), // #26 [ref=4x] + O(F30F01,00,0,0,0,0,0,0 ), // #27 [ref=9x] + O(660F00,00,6,0,0,0,0,0 ), // #28 [ref=3x] + O(000000,00,7,0,0,0,0,0 ), // #29 [ref=5x] + V(660F38,00,0,0,0,0,0,None), // #30 [ref=48x] + O(000F00,00,1,0,1,0,0,0 ), // #31 [ref=2x] + O(000F00,00,1,0,0,0,0,0 ), // #32 [ref=6x] + O(000000,00,1,0,0,0,0,0 ), // #33 [ref=3x] + O(000000,00,6,0,0,0,0,0 ), // #34 [ref=3x] + O(F30F00,00,7,0,0,0,0,3 ), // #35 [ref=1x] + O(F30F00,00,7,0,0,0,0,2 ), // #36 [ref=1x] + O_FPU(00,D900,0) , // #37 [ref=29x] + O_FPU(00,C000,0) , // #38 [ref=1x] + O_FPU(00,DE00,0) , // #39 [ref=7x] + O_FPU(00,0000,4) , // #40 [ref=4x] + O_FPU(00,0000,6) , // #41 [ref=4x] + O_FPU(9B,DB00,0) , // #42 [ref=2x] + O_FPU(00,DA00,0) , // #43 [ref=5x] + O_FPU(00,DB00,0) , // #44 [ref=8x] + O_FPU(00,D000,2) , // #45 [ref=1x] + O_FPU(00,DF00,0) , // #46 [ref=2x] + O_FPU(00,D800,3) , // #47 [ref=1x] + O_FPU(00,F000,6) , // #48 [ref=1x] + O_FPU(00,F800,7) , // #49 [ref=1x] + O_FPU(00,DD00,0) , // #50 [ref=3x] + O_FPU(00,0000,0) , // #51 [ref=4x] + O_FPU(00,0000,2) , // #52 [ref=3x] + O_FPU(00,0000,3) , // #53 [ref=3x] + O_FPU(00,0000,7) , // #54 [ref=3x] + O_FPU(00,0000,1) , // #55 [ref=2x] + O_FPU(00,0000,5) , // #56 [ref=2x] + O_FPU(00,C800,1) , // #57 [ref=1x] + O_FPU(9B,0000,6) , // #58 [ref=2x] + O_FPU(9B,0000,7) , // #59 [ref=2x] + O_FPU(00,E000,4) , // #60 [ref=1x] + O_FPU(00,E800,5) , // #61 [ref=1x] + O(000F00,00,0,0,1,0,0,0 ), // #62 [ref=3x] + O(F30F3A,00,0,0,0,0,0,0 ), // #63 [ref=1x] + O(000000,00,5,0,0,0,0,0 ), // #64 [ref=4x] + O(F30F00,00,5,0,0,0,0,0 ), // #65 [ref=2x] + O(F30F00,00,5,0,1,0,0,0 ), // #66 [ref=1x] + V(660F00,00,0,1,0,0,0,None), // #67 [ref=7x] + V(660F00,00,0,1,1,0,0,None), // #68 [ref=6x] + V(000F00,00,0,1,1,0,0,None), // #69 [ref=7x] + V(000F00,00,0,1,0,0,0,None), // #70 [ref=8x] + V(660F00,00,0,0,0,0,0,None), // #71 [ref=15x] + V(660F00,00,0,0,1,0,0,None), // #72 [ref=4x] + V(000F00,00,0,0,1,0,0,None), // #73 [ref=4x] + V(000F00,00,0,0,0,0,0,None), // #74 [ref=10x] + V(660F3A,00,0,0,0,0,0,None), // #75 [ref=48x] + V(660F3A,00,0,0,1,0,0,None), // #76 [ref=4x] + O(000000,00,3,0,0,0,0,0 ), // #77 [ref=4x] + O(000F00,00,2,0,0,0,0,0 ), // #78 [ref=5x] + O(000F00,00,5,0,0,0,0,0 ), // #79 [ref=4x] + O(000F00,00,3,0,0,0,0,0 ), // #80 [ref=5x] + V(XOP_M9,00,0,0,0,0,0,None), // #81 [ref=32x] + O(000F00,00,6,0,0,0,0,0 ), // #82 [ref=6x] + V(XOP_MA,00,0,0,0,0,0,None), // #83 [ref=1x] + V(XOP_MA,00,1,0,0,0,0,None), // #84 [ref=1x] + V(F20F38,00,0,0,0,0,0,None), // #85 [ref=11x] + O(000F3A,00,0,0,0,0,0,0 ), // #86 [ref=4x] + O(F30000,00,0,0,0,0,0,0 ), // #87 [ref=1x] + O(000F0F,00,0,0,0,0,0,0 ), // #88 [ref=26x] + V(F30F38,00,0,0,0,0,0,None), // #89 [ref=12x] + O(000F3A,00,0,0,1,0,0,0 ), // #90 [ref=1x] + O(660F3A,00,0,0,1,0,0,0 ), // #91 [ref=1x] + O(F30F00,00,4,0,0,0,0,0 ), // #92 [ref=1x] + O(F20F01,00,0,0,0,0,0,0 ), // #93 [ref=5x] + O(F30F00,00,1,0,0,0,0,0 ), // #94 [ref=3x] + O(F30F00,00,7,0,0,0,0,0 ), // #95 [ref=1x] + V(F20F3A,00,0,0,0,0,0,None), // #96 [ref=1x] + O(660F01,00,0,0,0,0,0,0 ), // #97 [ref=4x] + O(000F00,00,4,0,0,0,0,0 ), // #98 [ref=4x] + V(XOP_M9,00,7,0,0,0,0,None), // #99 [ref=1x] + V(XOP_M9,00,4,0,0,0,0,None), // #100 [ref=1x] + O(F20F00,00,6,0,0,0,0,0 ), // #101 [ref=1x] + E(F20F38,00,0,2,0,0,4,None), // #102 [ref=4x] + E(F20F38,00,0,0,0,0,4,None), // #103 [ref=2x] + V(660F00,00,0,0,0,1,4,ByLL), // #104 [ref=25x] + E(00MAP5,00,0,0,0,0,4,ByLL), // #105 [ref=10x] + V(000F00,00,0,0,0,0,4,ByLL), // #106 [ref=19x] + V(F20F00,00,0,0,0,1,3,None), // #107 [ref=10x] + E(F3MAP5,00,0,0,0,0,1,None), // #108 [ref=13x] + V(F30F00,00,0,0,0,0,2,None), // #109 [ref=12x] + V(F20F00,00,0,0,0,0,0,None), // #110 [ref=4x] + V(660F38,00,0,0,0,0,4,ByLL), // #111 [ref=50x] + E(660F3A,00,0,0,0,0,4,ByLL), // #112 [ref=17x] + E(660F3A,00,0,0,0,1,4,ByLL), // #113 [ref=18x] + E(660F38,00,0,0,0,1,4,ByLL), // #114 [ref=38x] + E(660F38,00,0,0,0,0,4,ByLL), // #115 [ref=25x] + V(660F38,00,0,1,0,0,0,None), // #116 [ref=2x] + E(660F38,00,0,0,0,0,3,None), // #117 [ref=2x] + E(660F38,00,0,0,0,0,4,None), // #118 [ref=2x] + E(660F38,00,0,2,0,0,5,None), // #119 [ref=2x] + E(660F38,00,0,0,0,1,4,None), // #120 [ref=2x] + E(660F38,00,0,2,0,1,5,None), // #121 [ref=2x] + V(660F38,00,0,0,0,1,3,None), // #122 [ref=2x] + V(660F38,00,0,0,0,0,2,None), // #123 [ref=14x] + E(000F3A,00,0,0,0,0,4,ByLL), // #124 [ref=5x] + E(F30F3A,00,0,0,0,0,1,None), // #125 [ref=1x] + V(660F00,00,0,0,0,1,3,None), // #126 [ref=5x] + E(00MAP5,00,0,0,0,0,1,None), // #127 [ref=2x] + V(000F00,00,0,0,0,0,2,None), // #128 [ref=2x] + E(660F38,00,0,0,0,1,3,None), // #129 [ref=14x] + E(660F38,00,0,0,0,0,2,None), // #130 [ref=14x] + V(F30F00,00,0,0,0,0,3,ByLL), // #131 [ref=1x] + E(F20F38,00,0,0,0,0,4,ByLL), // #132 [ref=2x] + V(F30F38,00,0,0,0,0,4,ByLL), // #133 [ref=1x] + V(F20F00,00,0,0,0,1,4,ByLL), // #134 [ref=1x] + E(66MAP5,00,0,0,0,1,4,ByLL), // #135 [ref=1x] + E(660F00,00,0,0,0,1,4,ByLL), // #136 [ref=10x] + E(000F00,00,0,0,0,1,4,ByLL), // #137 [ref=3x] + E(66MAP5,00,0,0,0,0,3,ByLL), // #138 [ref=1x] + E(00MAP5,00,0,0,0,0,2,ByLL), // #139 [ref=1x] + V(660F38,00,0,0,0,0,3,ByLL), // #140 [ref=7x] + E(66MAP6,00,0,0,0,0,3,ByLL), // #141 [ref=1x] + E(66MAP5,00,0,0,0,0,2,ByLL), // #142 [ref=4x] + E(00MAP5,00,0,0,0,0,3,ByLL), // #143 [ref=2x] + E(66MAP5,00,0,0,0,0,4,ByLL), // #144 [ref=3x] + V(660F00,00,0,0,0,0,4,ByLL), // #145 [ref=43x] + V(000F00,00,0,0,0,0,3,ByLL), // #146 [ref=1x] + V(660F3A,00,0,0,0,0,3,ByLL), // #147 [ref=1x] + E(660F00,00,0,0,0,0,3,ByLL), // #148 [ref=4x] + E(000F00,00,0,0,0,0,4,ByLL), // #149 [ref=2x] + E(F30F00,00,0,0,0,1,4,ByLL), // #150 [ref=3x] + E(00MAP5,00,0,0,0,1,4,ByLL), // #151 [ref=1x] + E(F2MAP5,00,0,0,0,1,3,None), // #152 [ref=1x] + V(F20F00,00,0,0,0,0,3,None), // #153 [ref=2x] + E(F20F00,00,0,0,0,0,3,None), // #154 [ref=2x] + E(00MAP6,00,0,0,0,0,1,None), // #155 [ref=1x] + V(F20F00,00,0,0,0,0,2,T1W ), // #156 [ref=1x] + E(F3MAP5,00,0,0,0,0,2,T1W ), // #157 [ref=2x] + V(F30F00,00,0,0,0,0,2,T1W ), // #158 [ref=1x] + E(00MAP5,00,0,0,0,0,2,None), // #159 [ref=1x] + E(F30F00,00,0,0,0,0,2,None), // #160 [ref=2x] + E(F3MAP5,00,0,0,0,0,3,ByLL), // #161 [ref=1x] + V(F30F00,00,0,0,0,0,4,ByLL), // #162 [ref=4x] + E(F30F00,00,0,0,0,0,3,ByLL), // #163 [ref=1x] + E(F2MAP5,00,0,0,0,0,4,ByLL), // #164 [ref=2x] + E(F20F00,00,0,0,0,0,4,ByLL), // #165 [ref=2x] + E(F2MAP5,00,0,0,0,1,4,ByLL), // #166 [ref=1x] + E(F20F00,00,0,0,0,1,4,ByLL), // #167 [ref=2x] + E(F20F00,00,0,0,0,0,2,T1W ), // #168 [ref=1x] + E(F30F00,00,0,0,0,0,2,T1W ), // #169 [ref=1x] + E(F3MAP5,00,0,0,0,0,4,ByLL), // #170 [ref=1x] + E(F30F38,00,0,0,0,0,4,ByLL), // #171 [ref=3x] + E(660F38,00,0,2,0,1,4,ByLL), // #172 [ref=3x] + E(660F38,00,0,2,0,0,4,ByLL), // #173 [ref=3x] + V(660F3A,00,0,1,0,0,0,None), // #174 [ref=6x] + E(660F3A,00,0,0,0,0,4,None), // #175 [ref=4x] + E(660F3A,00,0,2,0,0,5,None), // #176 [ref=4x] + E(660F3A,00,0,0,0,1,4,None), // #177 [ref=4x] + E(660F3A,00,0,2,0,1,5,None), // #178 [ref=4x] + V(660F3A,00,0,0,0,0,2,None), // #179 [ref=4x] + E(F2MAP6,00,0,0,0,0,4,ByLL), // #180 [ref=2x] + E(F2MAP6,00,0,0,0,0,2,None), // #181 [ref=2x] + E(660F3A,00,0,0,0,1,3,None), // #182 [ref=6x] + E(660F3A,00,0,0,0,0,2,None), // #183 [ref=6x] + V(660F38,00,0,0,1,1,4,ByLL), // #184 [ref=22x] + E(66MAP6,00,0,0,0,0,4,ByLL), // #185 [ref=22x] + V(660F38,00,0,0,1,1,3,None), // #186 [ref=12x] + E(66MAP6,00,0,0,0,0,1,None), // #187 [ref=16x] + E(F3MAP6,00,0,0,0,0,4,ByLL), // #188 [ref=2x] + E(F3MAP6,00,0,0,0,0,2,None), // #189 [ref=2x] + E(000F3A,00,0,0,0,0,1,None), // #190 [ref=4x] + V(660F38,00,0,0,1,0,0,None), // #191 [ref=5x] + E(660F38,00,1,2,0,1,3,None), // #192 [ref=2x] + E(660F38,00,1,2,0,0,2,None), // #193 [ref=2x] + E(660F38,00,2,2,0,1,3,None), // #194 [ref=2x] + E(660F38,00,2,2,0,0,2,None), // #195 [ref=2x] + V(660F3A,00,0,0,1,1,4,ByLL), // #196 [ref=2x] + V(000F00,00,2,0,0,0,0,None), // #197 [ref=1x] + V(660F00,00,0,0,0,0,2,None), // #198 [ref=1x] + V(F20F00,00,0,0,0,1,3,DUP ), // #199 [ref=1x] + E(660F00,00,0,0,0,0,4,ByLL), // #200 [ref=6x] + V(F30F00,00,0,0,0,0,0,None), // #201 [ref=3x] + E(F30F00,00,0,0,0,0,4,ByLL), // #202 [ref=1x] + V(000F00,00,0,0,0,0,3,None), // #203 [ref=2x] + E(66MAP5,00,0,0,0,0,1,None), // #204 [ref=1x] + E(F20F38,00,0,0,0,1,4,ByLL), // #205 [ref=1x] + V(660F3A,00,0,0,0,0,4,ByLL), // #206 [ref=2x] + E(F30F38,00,0,0,0,1,0,None), // #207 [ref=5x] + E(F30F38,00,0,0,0,0,0,None), // #208 [ref=5x] + V(660F38,00,0,0,0,0,1,None), // #209 [ref=1x] + V(XOP_M8,00,0,0,0,0,0,None), // #210 [ref=22x] + V(660F38,00,0,0,0,1,4,ByLL), // #211 [ref=4x] + E(660F38,00,0,0,0,0,0,None), // #212 [ref=2x] + E(660F38,00,0,0,0,1,1,None), // #213 [ref=2x] + E(660F38,00,0,0,1,1,4,ByLL), // #214 [ref=1x] + V(660F3A,00,0,0,1,1,3,None), // #215 [ref=2x] + V(660F3A,00,0,0,0,0,1,None), // #216 [ref=1x] + V(660F00,00,0,0,0,0,1,None), // #217 [ref=1x] + E(F30F38,00,0,0,0,0,2,ByLL), // #218 [ref=6x] + E(F30F38,00,0,0,0,0,3,ByLL), // #219 [ref=9x] + E(F30F38,00,0,0,0,0,1,ByLL), // #220 [ref=3x] + V(660F38,00,0,0,0,0,2,ByLL), // #221 [ref=4x] + V(660F38,00,0,0,0,0,1,ByLL), // #222 [ref=2x] + E(660F00,00,1,0,0,0,4,ByLL), // #223 [ref=1x] + E(660F00,00,1,0,0,1,4,ByLL), // #224 [ref=1x] + V(F20F00,00,0,0,0,0,4,ByLL), // #225 [ref=1x] + V(660F00,00,0,0,0,0,4,None), // #226 [ref=6x] + V(660F00,00,7,0,0,0,4,ByLL), // #227 [ref=1x] + V(660F00,00,0,0,0,1,4,None), // #228 [ref=2x] + E(660F00,00,0,0,0,1,4,None), // #229 [ref=1x] + V(660F00,00,3,0,0,0,4,ByLL), // #230 [ref=1x] + E(F30F38,00,0,0,0,1,4,ByLL), // #231 [ref=2x] + E(660F38,00,5,2,0,1,3,None), // #232 [ref=2x] + E(660F38,00,5,2,0,0,2,None), // #233 [ref=2x] + E(660F38,00,6,2,0,1,3,None), // #234 [ref=2x] + E(660F38,00,6,2,0,0,2,None), // #235 [ref=2x] + V(F20F38,00,0,1,0,0,0,None), // #236 [ref=3x] + V(000F00,00,3,0,0,0,0,None), // #237 [ref=1x] + O(F30F00,00,2,0,0,0,0,0 ), // #238 [ref=1x] + O(F30F00,00,3,0,0,0,0,0 ), // #239 [ref=1x] + O(000F38,00,0,0,1,0,0,0 ), // #240 [ref=1x] + O(660F38,00,0,0,1,0,0,0 ), // #241 [ref=1x] + O(000F00,00,5,0,1,0,0,0 ), // #242 [ref=2x] + O(000F00,00,3,0,1,0,0,0 ), // #243 [ref=1x] + O(000F00,00,4,0,1,0,0,0 ), // #244 [ref=2x] + O(000F00,00,6,0,1,0,0,0 ) // #245 [ref=1x] }; // ---------------------------------------------------------------------------- // ${MainOpcodeTable:End} @@ -1988,7 +2050,7 @@ const uint32_t InstDB::_mainOpcodeTable[] = { // ${AltOpcodeTable:Begin} // ------------------- Automatically generated, do not edit ------------------- const uint32_t InstDB::_altOpcodeTable[] = { - O(000000,00,0,0,0,0,0,0 ), // #0 [ref=1514x] + O(000000,00,0,0,0,0,0,0 ), // #0 [ref=1573x] O(660F00,1B,0,0,0,0,0,0 ), // #1 [ref=1x] O(000F00,BA,4,0,0,0,0,0 ), // #2 [ref=1x] O(000F00,BA,7,0,0,0,0,0 ), // #3 [ref=1x] @@ -2143,449 +2205,461 @@ const uint32_t InstDB::_altOpcodeTable[] = { #define SAME_REG_HINT(VAL) uint8_t(InstSameRegHint::k##VAL) const InstDB::CommonInfo InstDB::_commonInfoTable[] = { { 0 , 0 , 0 , 0 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #0 [ref=1x] - { 0 , 0 , 383, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #1 [ref=4x] - { 0 , 0 , 384, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #2 [ref=2x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 16 , 12, CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #3 [ref=2x] - { 0 , 0 , 180, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #4 [ref=2x] - { F(Vec) , 0 , 79 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #5 [ref=54x] - { F(Vec) , 0 , 106, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #6 [ref=19x] - { F(Vec) , 0 , 212, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #7 [ref=16x] - { F(Vec) , 0 , 221, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #8 [ref=20x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 28 , 11, CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #9 [ref=1x] - { F(Vex) , 0 , 275, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #10 [ref=3x] - { F(Vec) , 0 , 79 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #11 [ref=12x] - { 0 , 0 , 385, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #12 [ref=1x] - { F(Vex) , 0 , 277, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #13 [ref=5x] - { F(Vex) , 0 , 180, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #14 [ref=12x] - { F(Vec) , 0 , 386, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #15 [ref=4x] - { 0 , 0 , 279, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #16 [ref=3x] - { F(Mib) , 0 , 387, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #17 [ref=1x] - { 0 , 0 , 388, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #18 [ref=1x] - { 0 , 0 , 281, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #19 [ref=1x] - { F(Mib) , 0 , 389, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #20 [ref=1x] - { 0 , 0 , 283, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #21 [ref=1x] - { 0 , 0 , 179, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #22 [ref=35x] - { 0 , 0 , 390, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #23 [ref=3x] - { 0 , 0 , 123, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #24 [ref=1x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 123, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #25 [ref=3x] - { F(Rep)|F(RepIgnored) , 0 , 285, 2 , CONTROL_FLOW(Call), SAME_REG_HINT(None)}, // #26 [ref=1x] - { 0 , 0 , 391, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #27 [ref=1x] - { 0 , 0 , 392, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #28 [ref=2x] - { 0 , 0 , 364, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #29 [ref=1x] - { 0 , 0 , 108, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #30 [ref=83x] - { 0 , 0 , 393, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #31 [ref=11x] - { 0 , 0 , 394, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #32 [ref=6x] - { 0 , 0 , 395, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #33 [ref=13x] - { 0 , 0 , 396, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #34 [ref=1x] - { 0 , 0 , 16 , 12, CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #35 [ref=1x] - { F(Rep) , 0 , 127, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #36 [ref=1x] - { F(Vec) , 0 , 397, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #37 [ref=2x] - { F(Vec) , 0 , 398, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #38 [ref=3x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 131, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #39 [ref=1x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 399, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #40 [ref=1x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 400, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #41 [ref=1x] - { 0 , 0 , 401, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #42 [ref=1x] - { 0 , 0 , 402, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #43 [ref=1x] - { 0 , 0 , 287, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #44 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 403, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #45 [ref=2x] - { F(Mmx)|F(Vec) , 0 , 404, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #46 [ref=2x] - { F(Mmx)|F(Vec) , 0 , 405, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #47 [ref=2x] - { F(Vec) , 0 , 406, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #48 [ref=2x] - { F(Vec) , 0 , 407, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #49 [ref=2x] - { F(Vec) , 0 , 408, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #50 [ref=2x] - { 0 , 0 , 409, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #51 [ref=1x] - { 0 , 0 , 410, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #52 [ref=2x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 289, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #53 [ref=2x] - { 0 , 0 , 39 , 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #54 [ref=3x] - { F(Mmx) , 0 , 108, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #55 [ref=1x] - { 0 , 0 , 291, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #56 [ref=2x] - { 0 , 0 , 411, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #57 [ref=1x] - { F(Vec) , 0 , 412, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #58 [ref=2x] - { F(Vec) , 0 , 293, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #59 [ref=1x] - { F(FpuM32)|F(FpuM64) , 0 , 182, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #60 [ref=6x] - { 0 , 0 , 295, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #61 [ref=9x] - { F(FpuM80) , 0 , 413, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #62 [ref=2x] - { 0 , 0 , 296, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #63 [ref=13x] - { F(FpuM32)|F(FpuM64) , 0 , 297, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #64 [ref=2x] - { F(FpuM16)|F(FpuM32) , 0 , 414, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #65 [ref=9x] - { F(FpuM16)|F(FpuM32)|F(FpuM64) , 0 , 415, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #66 [ref=3x] - { F(FpuM32)|F(FpuM64)|F(FpuM80) , 0 , 416, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #67 [ref=2x] - { F(FpuM16) , 0 , 417, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #68 [ref=3x] - { 0 , 0 , 418, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #69 [ref=13x] - { F(FpuM16) , 0 , 419, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #70 [ref=2x] - { F(FpuM32)|F(FpuM64) , 0 , 298, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #71 [ref=1x] - { 0 , 0 , 420, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #72 [ref=2x] - { 0 , 0 , 421, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #73 [ref=1x] - { 0 , 0 , 39 , 10, CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #74 [ref=1x] - { 0 , 0 , 422, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #75 [ref=1x] - { 0 , 0 , 423, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #76 [ref=2x] - { 0 , 0 , 348, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #77 [ref=3x] - { F(Rep) , 0 , 424, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #78 [ref=1x] - { F(Vec) , 0 , 299, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #79 [ref=1x] - { 0 , 0 , 425, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #80 [ref=2x] - { 0 , 0 , 426, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #81 [ref=8x] - { 0 , 0 , 301, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #82 [ref=3x] - { 0 , 0 , 303, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #83 [ref=1x] - { 0 , 0 , 108, 1 , CONTROL_FLOW(Return), SAME_REG_HINT(None)}, // #84 [ref=2x] - { 0 , 0 , 395, 1 , CONTROL_FLOW(Return), SAME_REG_HINT(None)}, // #85 [ref=1x] - { F(Rep)|F(RepIgnored) , 0 , 305, 2 , CONTROL_FLOW(Branch), SAME_REG_HINT(None)}, // #86 [ref=30x] - { F(Rep)|F(RepIgnored) , 0 , 307, 2 , CONTROL_FLOW(Branch), SAME_REG_HINT(None)}, // #87 [ref=1x] - { F(Rep)|F(RepIgnored) , 0 , 309, 2 , CONTROL_FLOW(Jump), SAME_REG_HINT(None)}, // #88 [ref=1x] - { F(Vex) , 0 , 427, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #89 [ref=19x] - { F(Vex) , 0 , 311, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #90 [ref=1x] - { F(Vex) , 0 , 313, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #91 [ref=1x] - { F(Vex) , 0 , 315, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #92 [ref=1x] - { F(Vex) , 0 , 317, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #93 [ref=1x] - { F(Vex) , 0 , 428, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #94 [ref=12x] - { F(Vex) , 0 , 429, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #95 [ref=8x] - { F(Vex) , 0 , 427, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #96 [ref=8x] - { 0 , 0 , 430, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #97 [ref=2x] - { 0 , 0 , 319, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #98 [ref=1x] - { 0 , 0 , 321, 2 , CONTROL_FLOW(Call), SAME_REG_HINT(None)}, // #99 [ref=1x] - { F(Vec) , 0 , 230, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #100 [ref=2x] - { 0 , 0 , 431, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #101 [ref=2x] - { 0 , 0 , 323, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #102 [ref=2x] - { F(Vex) , 0 , 432, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #103 [ref=2x] - { 0 , 0 , 433, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #104 [ref=1x] - { 0 , 0 , 185, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #105 [ref=3x] - { 0 , 0 , 321, 2 , CONTROL_FLOW(Jump), SAME_REG_HINT(None)}, // #106 [ref=1x] - { 0 , 0 , 434, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #107 [ref=5x] - { F(Vex) , 0 , 435, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #108 [ref=2x] - { F(Rep) , 0 , 135, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #109 [ref=1x] - { 0 , 0 , 307, 2 , CONTROL_FLOW(Branch), SAME_REG_HINT(None)}, // #110 [ref=3x] - { 0 , 0 , 325, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #111 [ref=1x] - { F(Vex) , 0 , 436, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #112 [ref=2x] - { F(Vec) , 0 , 437, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #113 [ref=1x] - { F(Mmx) , 0 , 438, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #114 [ref=1x] - { 0 , 0 , 439, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #115 [ref=2x] - { F(XRelease) , 0 , 0 , 16, CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #116 [ref=1x] - { 0 , 0 , 49 , 9 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #117 [ref=1x] - { F(Vec) , 0 , 79 , 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #118 [ref=6x] - { 0 , 0 , 73 , 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #119 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 327, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #120 [ref=1x] - { 0 , 0 , 440, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #121 [ref=1x] - { 0 , 0 , 77 , 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #122 [ref=2x] - { F(Mmx)|F(Vec) , 0 , 441, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #123 [ref=1x] - { F(Vec) , 0 , 294, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #124 [ref=2x] - { F(Vec) , 0 , 236, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #125 [ref=4x] - { F(Vec) , 0 , 442, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #126 [ref=2x] - { F(Vec) , 0 , 80 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #127 [ref=3x] - { F(Mmx) , 0 , 443, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #128 [ref=1x] - { F(Vec) , 0 , 107, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #129 [ref=1x] - { F(Vec) , 0 , 242, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #130 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 103, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #131 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 444, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #132 [ref=1x] - { F(Rep) , 0 , 139, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #133 [ref=1x] - { F(Vec) , 0 , 106, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #134 [ref=1x] - { F(Vec) , 0 , 329, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #135 [ref=1x] - { 0 , 0 , 331, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #136 [ref=2x] - { 0 , 0 , 333, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #137 [ref=1x] - { F(Vex) , 0 , 335, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #138 [ref=1x] - { 0 , 0 , 445, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #139 [ref=1x] - { 0 , 0 , 446, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #140 [ref=1x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 290, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #141 [ref=2x] - { 0 , 0 , 108, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #142 [ref=1x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 16 , 12, CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #143 [ref=1x] - { 0 , 0 , 447, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #144 [ref=1x] - { F(Rep) , 0 , 448, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #145 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 337, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #146 [ref=37x] - { F(Mmx)|F(Vec) , 0 , 339, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #147 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 337, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #148 [ref=6x] - { F(Mmx)|F(Vec) , 0 , 337, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #149 [ref=16x] - { F(Mmx) , 0 , 337, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #150 [ref=26x] - { F(Vec) , 0 , 79 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #151 [ref=4x] - { F(Vec) , 0 , 449, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #152 [ref=1x] - { F(Vec) , 0 , 450, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #153 [ref=1x] - { F(Vec) , 0 , 451, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #154 [ref=1x] - { F(Vec) , 0 , 452, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #155 [ref=1x] - { F(Vec) , 0 , 453, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #156 [ref=1x] - { F(Vec) , 0 , 454, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #157 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 341, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #158 [ref=1x] - { F(Vec) , 0 , 455, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #159 [ref=1x] - { F(Vec) , 0 , 456, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #160 [ref=1x] - { F(Vec) , 0 , 457, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #161 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 458, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #162 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 459, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #163 [ref=1x] - { F(Vec) , 0 , 263, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #164 [ref=2x] - { 0 , 0 , 143, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #165 [ref=1x] - { F(Mmx) , 0 , 339, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #166 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 343, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #167 [ref=8x] - { F(Vec) , 0 , 460, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #168 [ref=2x] - { 0 , 0 , 461, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #169 [ref=1x] - { F(Mmx)|F(Vec) , 0 , 345, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #170 [ref=3x] - { 0 , 0 , 147, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #171 [ref=1x] - { 0 , 0 , 462, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #172 [ref=8x] - { 0 , 0 , 463, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #173 [ref=4x] - { 0 , 0 , 464, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #174 [ref=8x] - { 0 , 0 , 347, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #175 [ref=1x] - { F(Rep)|F(RepIgnored) , 0 , 349, 2 , CONTROL_FLOW(Return), SAME_REG_HINT(None)}, // #176 [ref=1x] - { 0 , 0 , 349, 2 , CONTROL_FLOW(Return), SAME_REG_HINT(None)}, // #177 [ref=1x] - { F(Vex) , 0 , 351, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #178 [ref=1x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 16 , 12, CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #179 [ref=3x] - { F(Rep) , 0 , 151, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #180 [ref=1x] - { 0 , 0 , 465, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #181 [ref=30x] - { 0 , 0 , 188, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #182 [ref=2x] - { 0 , 0 , 466, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #183 [ref=3x] - { F(Rep) , 0 , 155, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #184 [ref=1x] - { F(Vex) , 0 , 467, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #185 [ref=5x] - { 0 , 0 , 66 , 7 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #186 [ref=1x] - { F(Tsib)|F(Vex) , 0 , 468, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #187 [ref=2x] - { F(Vex) , 0 , 395, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #188 [ref=1x] - { F(Tsib)|F(Vex) , 0 , 469, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #189 [ref=1x] - { F(Vex) , 0 , 470, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #190 [ref=1x] - { 0 , 0 , 471, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #191 [ref=2x] - { 0 , 0 , 180, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #192 [ref=2x] - { 0 , 0 , 472, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #193 [ref=1x] - { F(Evex)|F(Vec) , X(K)|X(T4X)|X(Z) , 473, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #194 [ref=4x] - { F(Evex)|F(Vec) , X(K)|X(T4X)|X(Z) , 474, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #195 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #196 [ref=22x] - { F(Evex)|F(Vec) , X(B16)|X(ER)|X(K)|X(SAE)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #197 [ref=23x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #198 [ref=22x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(K)|X(SAE)|X(Z) , 475, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #199 [ref=18x] - { F(Evex)|F(Vec) , X(ER)|X(K)|X(SAE)|X(Z) , 476, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #200 [ref=18x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(K)|X(SAE)|X(Z) , 477, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #201 [ref=17x] - { F(Vec)|F(Vex) , 0 , 191, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #202 [ref=15x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #203 [ref=5x] - { F(Vec)|F(Vex) , 0 , 79 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #204 [ref=17x] - { F(Vec)|F(Vex) , 0 , 221, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #205 [ref=1x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 194, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #206 [ref=4x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 194, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #207 [ref=4x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #208 [ref=10x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #209 [ref=12x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #210 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #211 [ref=6x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #212 [ref=19x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #213 [ref=12x] - { F(Vec)|F(Vex) , 0 , 194, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #214 [ref=6x] - { F(Vec)|F(Vex) , 0 , 353, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #215 [ref=3x] - { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 478, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #216 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 479, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #217 [ref=1x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 480, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #218 [ref=4x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 481, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #219 [ref=4x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 482, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #220 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 479, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #221 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 483, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #222 [ref=1x] - { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(B64)|X(K)|X(SAE)|X(Z) , 197, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #223 [ref=1x] - { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE) , 200, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #224 [ref=1x] - { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(B32)|X(K)|X(SAE)|X(Z) , 197, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #225 [ref=1x] - { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 484, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #226 [ref=1x] - { F(Evex)|F(Vec) , X(K)|X(SAE) , 485, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #227 [ref=1x] - { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 486, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #228 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(SAE) , 106, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #229 [ref=2x] - { F(Evex)|F(Vec) , X(SAE) , 263, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #230 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(SAE) , 212, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #231 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 203, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #232 [ref=6x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 206, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #233 [ref=1x] - { F(Evex)|F(Vec) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 355, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #234 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #235 [ref=3x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 355, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #236 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 355, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #237 [ref=2x] - { F(Evex)|F(Vec) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 487, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #238 [ref=3x] - { F(Evex)|F(Vec) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #239 [ref=4x] - { F(Evex)|F(Vec) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 355, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #240 [ref=3x] - { F(Evex)|F(Vec) , X(B16)|X(ER)|X(K)|X(SAE)|X(Z) , 206, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #241 [ref=2x] - { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 212, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #242 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 206, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #243 [ref=1x] - { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 206, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #244 [ref=3x] - { F(Evex)|F(Vec) , X(B16)|X(ER)|X(K)|X(SAE)|X(Z) , 212, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #245 [ref=2x] - { F(Evex)|F(Vec) , X(B16)|X(ER)|X(K)|X(SAE)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #246 [ref=5x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 206, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #247 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 215, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #248 [ref=1x] - { F(Evex)|F(Vec) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 206, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #249 [ref=2x] - { F(Evex)|F(Vec) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #250 [ref=2x] - { F(Evex)|F(Vec) , X(ER)|X(K)|X(SAE)|X(Z) , 475, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #251 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(SAE) , 406, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #252 [ref=1x] - { F(Evex)|F(Vec) , X(ER)|X(SAE) , 406, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #253 [ref=1x] - { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 476, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #254 [ref=5x] - { F(Evex)|F(Vec) , X(ER)|X(SAE) , 488, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #255 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(SAE) , 489, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #256 [ref=2x] - { F(Evex)|F(Vec) , X(ER)|X(SAE) , 489, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #257 [ref=4x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 477, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #258 [ref=3x] - { F(Evex)|F(Vec) , X(ER)|X(K)|X(SAE)|X(Z) , 477, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #259 [ref=6x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(SAE) , 408, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #260 [ref=1x] - { F(Evex)|F(Vec) , X(ER)|X(SAE) , 408, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #261 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(SAE)|X(Z) , 355, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #262 [ref=1x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #263 [ref=3x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 355, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #264 [ref=1x] - { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #265 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(SAE)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #266 [ref=1x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 206, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #267 [ref=2x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #268 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(SAE) , 406, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #269 [ref=1x] - { F(Evex)|F(Vec) , X(SAE) , 406, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #270 [ref=1x] - { F(Evex)|F(Vec) , X(SAE) , 488, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #271 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(SAE) , 408, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #272 [ref=1x] - { F(Evex)|F(Vec) , X(SAE) , 408, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #273 [ref=1x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 206, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #274 [ref=1x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 194, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #275 [ref=3x] - { F(Vec)|F(Vex) , 0 , 194, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #276 [ref=9x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 83 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #277 [ref=3x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 83 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #278 [ref=3x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #279 [ref=8x] - { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 216, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #280 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 490, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #281 [ref=4x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 217, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #282 [ref=4x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 412, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #283 [ref=2x] - { F(Evex)|F(Vec) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #284 [ref=5x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 194, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #285 [ref=2x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 194, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #286 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 491, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #287 [ref=4x] - { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 492, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #288 [ref=4x] - { F(Vec)|F(Vex) , 0 , 159, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #289 [ref=13x] - { F(Vec)|F(Vex) , 0 , 357, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #290 [ref=4x] - { F(Vec)|F(Vex) , 0 , 359, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #291 [ref=4x] - { F(Evex)|F(Vec) , X(B64)|X(K) , 493, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #292 [ref=1x] - { F(Evex)|F(Vec) , X(B16)|X(K) , 493, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #293 [ref=1x] - { F(Evex)|F(Vec) , X(B32)|X(K) , 493, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #294 [ref=1x] - { F(Evex)|F(Vec) , X(K) , 494, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #295 [ref=1x] - { F(Evex)|F(Vec) , X(K) , 495, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #296 [ref=1x] - { F(Evex)|F(Vec) , X(K) , 496, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #297 [ref=1x] - { F(Vec)|F(Vex) , 0 , 209, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #298 [ref=7x] - { F(Vec)|F(Vex) , 0 , 106, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #299 [ref=1x] - { F(Vec)|F(Vex) , 0 , 212, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #300 [ref=1x] - { F(Evex)|F(EvexTwoOp)|F(Vec)|F(Vex)|F(Vsib) , X(K) , 163, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #301 [ref=2x] - { F(Evex)|F(EvexTwoOp)|F(Vec)|F(Vex)|F(Vsib) , X(K) , 113, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #302 [ref=2x] - { F(Evex)|F(Vsib) , X(K) , 497, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #303 [ref=4x] - { F(Evex)|F(Vsib) , X(K) , 498, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #304 [ref=4x] - { F(Evex)|F(Vsib) , X(K) , 499, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #305 [ref=8x] - { F(Evex)|F(EvexTwoOp)|F(Vec)|F(Vex)|F(Vsib) , X(K) , 118, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #306 [ref=2x] - { F(Evex)|F(EvexTwoOp)|F(Vec)|F(Vex)|F(Vsib) , X(K) , 218, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #307 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 475, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #308 [ref=3x] - { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 477, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #309 [ref=3x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 221, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #310 [ref=2x] - { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 221, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #311 [ref=3x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 221, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #312 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 500, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #313 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 194, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #314 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #315 [ref=22x] - { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 361, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #316 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 361, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #317 [ref=4x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 501, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #318 [ref=4x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 492, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #319 [ref=1x] - { F(Vec)|F(Vex) , 0 , 230, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #320 [ref=1x] - { F(Vex) , 0 , 431, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #321 [ref=2x] - { F(Vec)|F(Vex) , 0 , 437, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #322 [ref=1x] - { F(Vec)|F(Vex) , 0 , 167, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #323 [ref=4x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(SAE)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #324 [ref=2x] - { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #325 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(SAE)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #326 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 475, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #327 [ref=2x] - { 0 , 0 , 363, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #328 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 79 , 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #329 [ref=4x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 365, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #330 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 224, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #331 [ref=1x] - { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 79 , 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #332 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 79 , 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #333 [ref=6x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 238, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #334 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 367, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #335 [ref=4x] - { F(Vec)|F(Vex) , 0 , 502, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #336 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 227, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #337 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 230, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #338 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 233, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #339 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 236, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #340 [ref=1x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 239, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #341 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #342 [ref=4x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 242, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #343 [ref=1x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 369, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #344 [ref=1x] - { 0 , 0 , 371, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #345 [ref=1x] - { 0 , 0 , 373, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #346 [ref=1x] - { F(Evex)|F(Vec) , X(B32) , 245, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #347 [ref=1x] - { F(Evex)|F(Vec) , X(B64) , 245, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #348 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #349 [ref=1x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #350 [ref=5x] - { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 191, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #351 [ref=2x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #352 [ref=2x] - { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 191, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #353 [ref=2x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #354 [ref=2x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #355 [ref=2x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #356 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #357 [ref=13x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 503, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #358 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 504, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #359 [ref=1x] - { F(Evex)|F(Vec) , 0 , 505, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #360 [ref=6x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 248, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #361 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 506, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #362 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 194, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #363 [ref=1x] - { F(Evex)|F(Vec) , X(K) , 200, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #364 [ref=2x] - { F(Evex)|F(Vec) , X(B32)|X(K) , 200, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #365 [ref=2x] - { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(K) , 251, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #366 [ref=4x] - { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(B32)|X(K) , 251, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #367 [ref=2x] - { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(B64)|X(K) , 251, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #368 [ref=2x] - { F(Vec)|F(Vex) , 0 , 449, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #369 [ref=1x] - { F(Vec)|F(Vex) , 0 , 450, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #370 [ref=1x] - { F(Vec)|F(Vex) , 0 , 451, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #371 [ref=1x] - { F(Vec)|F(Vex) , 0 , 452, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #372 [ref=1x] - { F(Evex)|F(Vec) , X(B64)|X(K) , 200, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #373 [ref=4x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #374 [ref=6x] - { F(Evex)|F(EvexCompat)|F(PreferEvex)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #375 [ref=4x] - { F(Vec)|F(Vex) , 0 , 195, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #376 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 192, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #377 [ref=2x] - { F(Vec)|F(Vex) , 0 , 171, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #378 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 85 , 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #379 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 85 , 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #380 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 175, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #381 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 453, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #382 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 454, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #383 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 507, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #384 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 508, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #385 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 509, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #386 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 510, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #387 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 511, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #388 [ref=1x] - { F(Vec)|F(Vex) , 0 , 353, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #389 [ref=12x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #390 [ref=8x] - { F(Evex)|F(Vec) , 0 , 512, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #391 [ref=4x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 254, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #392 [ref=6x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 257, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #393 [ref=9x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 260, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #394 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 212, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #395 [ref=4x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 263, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #396 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 206, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #397 [ref=6x] - { F(Vec)|F(Vex) , 0 , 159, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #398 [ref=1x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 221, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #399 [ref=3x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 221, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #400 [ref=3x] - { F(Vec)|F(Vex) , 0 , 375, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #401 [ref=4x] - { F(Evex)|F(Vec)|F(Vsib) , X(K) , 266, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #402 [ref=2x] - { F(Evex)|F(Vec)|F(Vsib) , X(K) , 377, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #403 [ref=2x] - { F(Evex)|F(Vec)|F(Vsib) , X(K) , 379, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #404 [ref=2x] - { F(Evex)|F(Vec)|F(Vsib) , X(K) , 269, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #405 [ref=2x] - { F(Vec)|F(Vex) , 0 , 381, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #406 [ref=8x] - { F(Evex)|F(Vec) , X(K) , 272, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #407 [ref=5x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 221, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #408 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 221, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #409 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 91 , 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #410 [ref=3x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 221, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #411 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 91 , 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #412 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 91 , 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #413 [ref=3x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 97 , 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #414 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #415 [ref=6x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #416 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #417 [ref=2x] - { F(Evex)|F(Vec) , X(B32)|X(K) , 272, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #418 [ref=2x] - { F(Evex)|F(Vec) , X(B64)|X(K) , 272, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #419 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 475, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #420 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 477, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #421 [ref=2x] - { F(Evex)|F(Vec) , X(B16)|X(K)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #422 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 476, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #423 [ref=2x] - { F(Vec)|F(Vex) , 0 , 477, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #424 [ref=2x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 491, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #425 [ref=1x] - { F(Evex)|F(Vec) , X(K)|X(Z) , 492, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #426 [ref=1x] - { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 221, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #427 [ref=2x] - { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 491, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #428 [ref=1x] - { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 492, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #429 [ref=1x] - { F(Evex)|F(Vec) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 191, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #430 [ref=1x] - { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 195, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #431 [ref=2x] - { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 195, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #432 [ref=2x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 194, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #433 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 194, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #434 [ref=1x] - { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 209, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #435 [ref=1x] - { F(Vec)|F(Vex) , 0 , 108, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #436 [ref=2x] - { 0 , 0 , 23 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #437 [ref=2x] - { 0 , 0 , 61 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #438 [ref=2x] - { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 58 , 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #439 [ref=1x] - { 0 , 0 , 513, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #440 [ref=1x] - { F(Lock)|F(XAcquire) , 0 , 58 , 8 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #441 [ref=1x] - { 0 , 0 , 514, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #442 [ref=6x] - { 0 , 0 , 515, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)} // #443 [ref=6x] + { 0 , 0 , 457, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #1 [ref=4x] + { 0 , 0 , 458, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #2 [ref=2x] + { 0 , 0 , 108, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #3 [ref=6x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 20 , 13, CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #4 [ref=2x] + { 0 , 0 , 50 , 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #5 [ref=2x] + { F(Vec) , 0 , 72 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #6 [ref=54x] + { F(Vec) , 0 , 143, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #7 [ref=19x] + { F(Vec) , 0 , 283, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #8 [ref=16x] + { F(Vec) , 0 , 292, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #9 [ref=20x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 33 , 12, CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #10 [ref=1x] + { F(Vex) , 0 , 325, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #11 [ref=3x] + { F(Vec) , 0 , 72 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #12 [ref=12x] + { 0 , 0 , 459, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #13 [ref=1x] + { F(Vex) , 0 , 327, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #14 [ref=5x] + { F(Vex) , 0 , 50 , 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #15 [ref=12x] + { F(Vec) , 0 , 460, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #16 [ref=4x] + { 0 , 0 , 329, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #17 [ref=3x] + { F(Mib) , 0 , 461, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #18 [ref=1x] + { 0 , 0 , 462, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #19 [ref=1x] + { 0 , 0 , 331, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #20 [ref=1x] + { F(Mib) , 0 , 463, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #21 [ref=1x] + { 0 , 0 , 333, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #22 [ref=1x] + { 0 , 0 , 49 , 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #23 [ref=35x] + { 0 , 0 , 335, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #24 [ref=3x] + { 0 , 0 , 134, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #25 [ref=1x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 134, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #26 [ref=3x] + { F(Rep)|F(RepIgnored) , 0 , 235, 3 , CONTROL_FLOW(Call), SAME_REG_HINT(None)}, // #27 [ref=1x] + { 0 , 0 , 464, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #28 [ref=1x] + { 0 , 0 , 465, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #29 [ref=2x] + { 0 , 0 , 436, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #30 [ref=1x] + { 0 , 0 , 110, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #31 [ref=87x] + { 0 , 0 , 466, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #32 [ref=24x] + { 0 , 0 , 467, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #33 [ref=6x] + { 0 , 0 , 468, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #34 [ref=14x] + { 0 , 0 , 469, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #35 [ref=1x] + { 0 , 0 , 20 , 13, CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #36 [ref=1x] + { F(Vex) , 0 , 337, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #37 [ref=16x] + { F(Rep) , 0 , 179, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #38 [ref=1x] + { F(Vec) , 0 , 470, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #39 [ref=2x] + { F(Vec) , 0 , 471, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #40 [ref=3x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 183, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #41 [ref=1x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 472, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #42 [ref=1x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 473, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #43 [ref=1x] + { 0 , 0 , 474, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #44 [ref=1x] + { 0 , 0 , 475, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #45 [ref=1x] + { 0 , 0 , 339, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #46 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 476, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #47 [ref=2x] + { F(Mmx)|F(Vec) , 0 , 477, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #48 [ref=2x] + { F(Mmx)|F(Vec) , 0 , 478, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #49 [ref=2x] + { F(Vec) , 0 , 341, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #50 [ref=2x] + { F(Vec) , 0 , 343, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #51 [ref=1x] + { F(Vec) , 0 , 345, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #52 [ref=1x] + { F(Vec) , 0 , 347, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #53 [ref=1x] + { F(Vec) , 0 , 349, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #54 [ref=1x] + { 0 , 0 , 479, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #55 [ref=1x] + { 0 , 0 , 480, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #56 [ref=3x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 238, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #57 [ref=1x] + { 0 , 0 , 45 , 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #58 [ref=3x] + { F(Mmx) , 0 , 110, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #59 [ref=1x] + { 0 , 0 , 351, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #60 [ref=2x] + { 0 , 0 , 481, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #61 [ref=1x] + { F(Vec) , 0 , 482, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #62 [ref=2x] + { F(Vec) , 0 , 353, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #63 [ref=1x] + { F(FpuM32)|F(FpuM64) , 0 , 241, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #64 [ref=6x] + { 0 , 0 , 355, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #65 [ref=9x] + { F(FpuM80) , 0 , 483, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #66 [ref=2x] + { 0 , 0 , 356, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #67 [ref=13x] + { F(FpuM32)|F(FpuM64) , 0 , 357, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #68 [ref=2x] + { F(FpuM16)|F(FpuM32) , 0 , 484, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #69 [ref=9x] + { F(FpuM16)|F(FpuM32)|F(FpuM64) , 0 , 485, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #70 [ref=3x] + { F(FpuM32)|F(FpuM64)|F(FpuM80) , 0 , 486, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #71 [ref=2x] + { F(FpuM16) , 0 , 487, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #72 [ref=3x] + { F(FpuM16) , 0 , 488, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #73 [ref=2x] + { F(FpuM32)|F(FpuM64) , 0 , 358, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #74 [ref=1x] + { 0 , 0 , 489, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #75 [ref=4x] + { 0 , 0 , 490, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #76 [ref=1x] + { 0 , 0 , 45 , 10, CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #77 [ref=1x] + { 0 , 0 , 491, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #78 [ref=1x] + { F(Lock) , 0 , 238, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #79 [ref=1x] + { 0 , 0 , 379, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #80 [ref=2x] + { 0 , 0 , 336, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #81 [ref=3x] + { F(Rep) , 0 , 492, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #82 [ref=1x] + { F(Vec) , 0 , 359, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #83 [ref=1x] + { 0 , 0 , 493, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #84 [ref=2x] + { 0 , 0 , 494, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #85 [ref=8x] + { 0 , 0 , 361, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #86 [ref=3x] + { 0 , 0 , 363, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #87 [ref=1x] + { 0 , 0 , 365, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #88 [ref=1x] + { 0 , 0 , 110, 1 , CONTROL_FLOW(Return), SAME_REG_HINT(None)}, // #89 [ref=2x] + { 0 , 0 , 468, 1 , CONTROL_FLOW(Return), SAME_REG_HINT(None)}, // #90 [ref=1x] + { F(Rep) , 0 , 244, 1 , CONTROL_FLOW(Branch), SAME_REG_HINT(None)}, // #91 [ref=30x] + { F(Rep) , 0 , 367, 2 , CONTROL_FLOW(Branch), SAME_REG_HINT(None)}, // #92 [ref=1x] + { F(Rep) , 0 , 244, 3 , CONTROL_FLOW(Jump), SAME_REG_HINT(None)}, // #93 [ref=1x] + { F(Vex) , 0 , 495, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #94 [ref=19x] + { F(Vex) , 0 , 369, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #95 [ref=1x] + { F(Vex) , 0 , 371, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #96 [ref=1x] + { F(Vex) , 0 , 187, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #97 [ref=1x] + { F(Vex) , 0 , 373, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #98 [ref=1x] + { F(Vex) , 0 , 496, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #99 [ref=12x] + { F(Vex) , 0 , 497, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #100 [ref=8x] + { F(Vex) , 0 , 495, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #101 [ref=8x] + { 0 , 0 , 498, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #102 [ref=2x] + { 0 , 0 , 253, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #103 [ref=1x] + { 0 , 0 , 247, 3 , CONTROL_FLOW(Call), SAME_REG_HINT(None)}, // #104 [ref=1x] + { F(Vec) , 0 , 169, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #105 [ref=2x] + { 0 , 0 , 499, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #106 [ref=2x] + { 0 , 0 , 375, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #107 [ref=2x] + { F(Vex) , 0 , 500, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #108 [ref=2x] + { 0 , 0 , 377, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #109 [ref=1x] + { 0 , 0 , 250, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #110 [ref=3x] + { 0 , 0 , 247, 3 , CONTROL_FLOW(Jump), SAME_REG_HINT(None)}, // #111 [ref=1x] + { 0 , 0 , 501, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #112 [ref=5x] + { F(Vex) , 0 , 379, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #113 [ref=2x] + { F(Rep) , 0 , 191, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #114 [ref=1x] + { 0 , 0 , 367, 2 , CONTROL_FLOW(Branch), SAME_REG_HINT(None)}, // #115 [ref=3x] + { 0 , 0 , 253, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #116 [ref=1x] + { F(Vex) , 0 , 381, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #117 [ref=2x] + { F(Vec) , 0 , 502, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #118 [ref=1x] + { F(Mmx) , 0 , 503, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #119 [ref=1x] + { 0 , 0 , 504, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #120 [ref=2x] + { F(XRelease) , 0 , 0 , 20, CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #121 [ref=1x] + { 0 , 0 , 55 , 9 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #122 [ref=1x] + { F(Vec) , 0 , 72 , 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #123 [ref=6x] + { 0 , 0 , 104, 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #124 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 383, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #125 [ref=1x] + { 0 , 0 , 385, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #126 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 505, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #127 [ref=1x] + { F(Vec) , 0 , 354, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #128 [ref=2x] + { F(Vec) , 0 , 80 , 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #129 [ref=4x] + { F(Vec) , 0 , 506, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #130 [ref=2x] + { F(Vec) , 0 , 73 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #131 [ref=3x] + { F(Mmx) , 0 , 507, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #132 [ref=1x] + { F(Vec) , 0 , 80 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #133 [ref=1x] + { F(Vec) , 0 , 88 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #134 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 139, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #135 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 508, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #136 [ref=1x] + { F(Rep) , 0 , 195, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #137 [ref=1x] + { F(Vec) , 0 , 387, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #138 [ref=1x] + { F(Vec) , 0 , 389, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #139 [ref=1x] + { 0 , 0 , 256, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #140 [ref=2x] + { 0 , 0 , 391, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #141 [ref=1x] + { F(Vex) , 0 , 393, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #142 [ref=1x] + { 0 , 0 , 509, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #143 [ref=1x] + { 0 , 0 , 510, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #144 [ref=1x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 239, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #145 [ref=2x] + { 0 , 0 , 110, 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #146 [ref=1x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 20 , 13, CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #147 [ref=1x] + { 0 , 0 , 511, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #148 [ref=1x] + { F(Rep) , 0 , 512, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #149 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 395, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #150 [ref=37x] + { F(Mmx)|F(Vec) , 0 , 397, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #151 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 395, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #152 [ref=6x] + { F(Mmx)|F(Vec) , 0 , 395, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #153 [ref=16x] + { F(Mmx) , 0 , 139, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #154 [ref=26x] + { F(Vec) , 0 , 72 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #155 [ref=4x] + { F(Vec) , 0 , 513, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #156 [ref=1x] + { F(Vec) , 0 , 514, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #157 [ref=1x] + { F(Vec) , 0 , 515, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #158 [ref=1x] + { F(Vec) , 0 , 516, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #159 [ref=1x] + { F(Vec) , 0 , 517, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #160 [ref=1x] + { F(Vec) , 0 , 518, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #161 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 399, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #162 [ref=1x] + { F(Vec) , 0 , 519, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #163 [ref=1x] + { F(Vec) , 0 , 520, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #164 [ref=1x] + { F(Vec) , 0 , 521, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #165 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 522, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #166 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 523, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #167 [ref=1x] + { F(Vec) , 0 , 313, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #168 [ref=2x] + { 0 , 0 , 144, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #169 [ref=1x] + { F(Mmx) , 0 , 397, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #170 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 401, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #171 [ref=8x] + { F(Vec) , 0 , 524, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #172 [ref=2x] + { 0 , 0 , 403, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #173 [ref=1x] + { F(Mmx)|F(Vec) , 0 , 405, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #174 [ref=3x] + { 0 , 0 , 149, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #175 [ref=1x] + { 0 , 0 , 407, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #176 [ref=8x] + { 0 , 0 , 525, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #177 [ref=4x] + { 0 , 0 , 526, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #178 [ref=8x] + { 0 , 0 , 409, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #179 [ref=1x] + { F(Rep)|F(RepIgnored) , 0 , 411, 2 , CONTROL_FLOW(Return), SAME_REG_HINT(None)}, // #180 [ref=1x] + { 0 , 0 , 411, 2 , CONTROL_FLOW(Return), SAME_REG_HINT(None)}, // #181 [ref=1x] + { F(Vex) , 0 , 413, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #182 [ref=1x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 20 , 13, CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #183 [ref=3x] + { F(Rep) , 0 , 199, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #184 [ref=1x] + { 0 , 0 , 527, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #185 [ref=30x] + { 0 , 0 , 259, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #186 [ref=2x] + { 0 , 0 , 415, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #187 [ref=3x] + { F(Rep) , 0 , 203, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #188 [ref=1x] + { F(Vex) , 0 , 528, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #189 [ref=8x] + { 0 , 0 , 64 , 8 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #190 [ref=1x] + { F(Tsib)|F(Vex) , 0 , 529, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #191 [ref=2x] + { F(Vex) , 0 , 468, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #192 [ref=1x] + { F(Tsib)|F(Vex) , 0 , 530, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #193 [ref=1x] + { F(Vex) , 0 , 531, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #194 [ref=1x] + { 0 , 0 , 532, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #195 [ref=2x] + { 0 , 0 , 50 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #196 [ref=2x] + { 0 , 0 , 417, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #197 [ref=1x] + { F(Evex)|F(Vec) , X(K)|X(T4X)|X(Z) , 533, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #198 [ref=4x] + { F(Evex)|F(Vec) , X(K)|X(T4X)|X(Z) , 534, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #199 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #200 [ref=22x] + { F(Evex)|F(Vec) , X(B16)|X(ER)|X(K)|X(SAE)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #201 [ref=23x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #202 [ref=22x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(K)|X(SAE)|X(Z) , 535, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #203 [ref=18x] + { F(Evex)|F(Vec) , X(ER)|X(K)|X(SAE)|X(Z) , 536, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #204 [ref=18x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(K)|X(SAE)|X(Z) , 537, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #205 [ref=17x] + { F(Vec)|F(Vex) , 0 , 262, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #206 [ref=29x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #207 [ref=5x] + { F(Vec)|F(Vex) , 0 , 72 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #208 [ref=17x] + { F(Vec)|F(Vex) , 0 , 292, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #209 [ref=1x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 265, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #210 [ref=4x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 265, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #211 [ref=4x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #212 [ref=10x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #213 [ref=12x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #214 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #215 [ref=6x] + { F(Vec)|F(Vex) , 0 , 538, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #216 [ref=2x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #217 [ref=17x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #218 [ref=12x] + { F(Vec)|F(Vex) , 0 , 265, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #219 [ref=6x] + { F(Vec)|F(Vex) , 0 , 419, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #220 [ref=3x] + { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 539, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #221 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 540, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #222 [ref=1x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 541, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #223 [ref=4x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 542, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #224 [ref=4x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 447, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #225 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 540, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #226 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 543, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #227 [ref=1x] + { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(B64)|X(K)|X(SAE) , 268, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #228 [ref=1x] + { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE) , 271, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #229 [ref=1x] + { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(B32)|X(K)|X(SAE) , 268, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #230 [ref=1x] + { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(K)|X(SAE) , 544, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #231 [ref=1x] + { F(Evex)|F(Vec) , X(K)|X(SAE) , 545, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #232 [ref=1x] + { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(K)|X(SAE) , 546, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #233 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(SAE) , 143, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #234 [ref=2x] + { F(Evex)|F(Vec) , X(SAE) , 313, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #235 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(SAE) , 283, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #236 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 274, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #237 [ref=6x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 277, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #238 [ref=1x] + { F(Evex)|F(Vec) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 421, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #239 [ref=3x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #240 [ref=3x] + { F(Vec)|F(Vex) , 0 , 169, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #241 [ref=5x] + { F(Evex)|F(EvexCompat)|F(PreferEvex)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 421, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #242 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 421, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #243 [ref=2x] + { F(Evex)|F(Vec) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 547, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #244 [ref=3x] + { F(Evex)|F(Vec) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #245 [ref=4x] + { F(Evex)|F(Vec) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 421, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #246 [ref=3x] + { F(Evex)|F(Vec) , X(B16)|X(ER)|X(K)|X(SAE)|X(Z) , 277, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #247 [ref=2x] + { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 283, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #248 [ref=3x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 277, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #249 [ref=1x] + { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 277, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #250 [ref=3x] + { F(Evex)|F(Vec) , X(B16)|X(ER)|X(K)|X(SAE)|X(Z) , 283, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #251 [ref=2x] + { F(Evex)|F(Vec) , X(B16)|X(ER)|X(K)|X(SAE)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #252 [ref=5x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 277, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #253 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 286, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #254 [ref=1x] + { F(Evex)|F(Vec) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 277, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #255 [ref=2x] + { F(Evex)|F(Vec) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #256 [ref=2x] + { F(Evex)|F(Vec) , X(ER)|X(K)|X(SAE)|X(Z) , 535, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #257 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(SAE) , 341, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #258 [ref=1x] + { F(Evex)|F(Vec) , X(ER)|X(SAE) , 341, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #259 [ref=1x] + { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 536, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #260 [ref=5x] + { F(Evex)|F(Vec) , X(ER)|X(SAE) , 423, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #261 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(SAE) , 425, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #262 [ref=2x] + { F(Evex)|F(Vec) , X(ER)|X(SAE) , 427, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #263 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 537, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #264 [ref=3x] + { F(Evex)|F(Vec) , X(ER)|X(K)|X(SAE)|X(Z) , 537, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #265 [ref=6x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(ER)|X(SAE) , 347, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #266 [ref=1x] + { F(Evex)|F(Vec) , X(ER)|X(SAE) , 347, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #267 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(SAE)|X(Z) , 421, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #268 [ref=1x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #269 [ref=3x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 421, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #270 [ref=1x] + { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #271 [ref=3x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(SAE)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #272 [ref=1x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 277, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #273 [ref=2x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #274 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(SAE) , 341, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #275 [ref=1x] + { F(Evex)|F(Vec) , X(SAE) , 341, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #276 [ref=1x] + { F(Evex)|F(Vec) , X(SAE) , 423, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #277 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(SAE) , 347, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #278 [ref=1x] + { F(Evex)|F(Vec) , X(SAE) , 347, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #279 [ref=1x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 277, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #280 [ref=1x] + { F(Evex)|F(Vec) , X(ER)|X(SAE) , 425, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #281 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 265, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #282 [ref=3x] + { F(Vec)|F(Vex) , 0 , 265, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #283 [ref=10x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 78 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #284 [ref=3x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 78 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #285 [ref=3x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #286 [ref=8x] + { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 287, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #287 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 548, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #288 [ref=4x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 288, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #289 [ref=4x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 482, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #290 [ref=2x] + { F(Evex)|F(Vec) , X(B32)|X(ER)|X(K)|X(SAE)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #291 [ref=5x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 265, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #292 [ref=2x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 265, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #293 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 549, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #294 [ref=4x] + { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 550, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #295 [ref=4x] + { F(Vec)|F(Vex) , 0 , 207, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #296 [ref=13x] + { F(Vec)|F(Vex) , 0 , 429, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #297 [ref=4x] + { F(Vec)|F(Vex) , 0 , 431, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #298 [ref=4x] + { F(Evex)|F(Vec) , X(B64)|X(K) , 551, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #299 [ref=1x] + { F(Evex)|F(Vec) , X(B16)|X(K) , 551, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #300 [ref=1x] + { F(Evex)|F(Vec) , X(B32)|X(K) , 551, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #301 [ref=1x] + { F(Evex)|F(Vec) , X(K) , 552, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #302 [ref=1x] + { F(Evex)|F(Vec) , X(K) , 553, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #303 [ref=1x] + { F(Evex)|F(Vec) , X(K) , 554, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #304 [ref=1x] + { F(Vec)|F(Vex) , 0 , 280, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #305 [ref=7x] + { F(Vec)|F(Vex) , 0 , 143, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #306 [ref=1x] + { F(Vec)|F(Vex) , 0 , 283, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #307 [ref=1x] + { F(Evex)|F(EvexTwoOp)|F(Vec)|F(Vex)|F(Vsib) , X(K) , 211, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #308 [ref=2x] + { F(Evex)|F(EvexTwoOp)|F(Vec)|F(Vex)|F(Vsib) , X(K) , 154, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #309 [ref=2x] + { F(Evex)|F(Vsib) , X(K) , 555, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #310 [ref=4x] + { F(Evex)|F(Vsib) , X(K) , 556, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #311 [ref=4x] + { F(Evex)|F(Vsib) , X(K) , 557, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #312 [ref=8x] + { F(Evex)|F(EvexTwoOp)|F(Vec)|F(Vex)|F(Vsib) , X(K) , 159, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #313 [ref=2x] + { F(Evex)|F(EvexTwoOp)|F(Vec)|F(Vex)|F(Vsib) , X(K) , 289, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #314 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 535, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #315 [ref=3x] + { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 537, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #316 [ref=3x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(SAE)|X(Z) , 292, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #317 [ref=2x] + { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 292, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #318 [ref=3x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(SAE)|X(Z) , 292, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #319 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(SAE)|X(Z) , 558, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #320 [ref=3x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 265, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #321 [ref=3x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #322 [ref=22x] + { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 433, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #323 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 433, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #324 [ref=4x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 559, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #325 [ref=4x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 550, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #326 [ref=1x] + { F(Vex) , 0 , 499, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #327 [ref=2x] + { F(Vec)|F(Vex) , 0 , 502, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #328 [ref=1x] + { F(Vec)|F(Vex) , 0 , 215, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #329 [ref=4x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(SAE)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #330 [ref=2x] + { F(Evex)|F(Vec) , X(B16)|X(K)|X(SAE)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #331 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(SAE)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #332 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(SAE)|X(Z) , 535, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #333 [ref=2x] + { 0 , 0 , 435, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #334 [ref=3x] + { 0 , 0 , 437, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #335 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 72 , 8 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #336 [ref=4x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 439, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #337 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 295, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #338 [ref=1x] + { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 72 , 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #339 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 116, 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #340 [ref=6x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 82 , 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #341 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 219, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #342 [ref=4x] + { F(Vec)|F(Vex) , 0 , 560, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #343 [ref=3x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 164, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #344 [ref=3x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 169, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #345 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 174, 5 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #346 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 80 , 8 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #347 [ref=1x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 223, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #348 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #349 [ref=4x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 88 , 8 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #350 [ref=1x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 441, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #351 [ref=1x] + { 0 , 0 , 443, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #352 [ref=1x] + { 0 , 0 , 445, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #353 [ref=1x] + { F(Evex)|F(Vec) , X(B32) , 298, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #354 [ref=1x] + { F(Evex)|F(Vec) , X(B64) , 298, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #355 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #356 [ref=1x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #357 [ref=5x] + { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 262, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #358 [ref=2x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #359 [ref=2x] + { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 262, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #360 [ref=2x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #361 [ref=2x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #362 [ref=2x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #363 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #364 [ref=13x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 561, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #365 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 562, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #366 [ref=1x] + { F(Evex)|F(Vec) , 0 , 563, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #367 [ref=6x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 447, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #368 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 564, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #369 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 265, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #370 [ref=1x] + { F(Evex)|F(Vec) , X(K) , 271, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #371 [ref=2x] + { F(Evex)|F(Vec) , X(B32)|X(K) , 271, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #372 [ref=2x] + { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(K) , 301, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #373 [ref=4x] + { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(B32)|X(K) , 301, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #374 [ref=2x] + { F(Evex)|F(EvexKReg)|F(Vec)|F(Vex) , X(B64)|X(K) , 301, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #375 [ref=2x] + { F(Vec)|F(Vex) , 0 , 513, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #376 [ref=1x] + { F(Vec)|F(Vex) , 0 , 514, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #377 [ref=1x] + { F(Vec)|F(Vex) , 0 , 515, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #378 [ref=1x] + { F(Vec)|F(Vex) , 0 , 516, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #379 [ref=1x] + { F(Evex)|F(Vec) , X(B64)|X(K) , 271, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #380 [ref=4x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #381 [ref=6x] + { F(Evex)|F(EvexCompat)|F(PreferEvex)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #382 [ref=4x] + { F(Vec)|F(Vex) , 0 , 266, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #383 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 263, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #384 [ref=2x] + { F(Vec)|F(Vex) , 0 , 227, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #385 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 96 , 8 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #386 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 96 , 8 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #387 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 231, 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #388 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 517, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #389 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 518, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #390 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 565, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #391 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 566, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #392 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 567, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #393 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 568, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #394 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 569, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #395 [ref=1x] + { F(Vec)|F(Vex) , 0 , 419, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #396 [ref=12x] + { F(Evex)|F(EvexCompat)|F(PreferEvex)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #397 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #398 [ref=8x] + { F(Evex)|F(Vec) , 0 , 570, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #399 [ref=4x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 304, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #400 [ref=6x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 307, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #401 [ref=9x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 310, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #402 [ref=3x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 283, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #403 [ref=4x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 313, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #404 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 277, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #405 [ref=6x] + { F(Vec)|F(Vex) , 0 , 207, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #406 [ref=1x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 292, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #407 [ref=3x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 292, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #408 [ref=3x] + { F(Vec)|F(Vex) , 0 , 449, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #409 [ref=4x] + { F(Evex)|F(Vec)|F(Vsib) , X(K) , 316, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #410 [ref=2x] + { F(Evex)|F(Vec)|F(Vsib) , X(K) , 451, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #411 [ref=2x] + { F(Evex)|F(Vec)|F(Vsib) , X(K) , 453, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #412 [ref=2x] + { F(Evex)|F(Vec)|F(Vsib) , X(K) , 319, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #413 [ref=2x] + { F(Vec)|F(Vex) , 0 , 455, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #414 [ref=8x] + { F(Evex)|F(Vec) , X(K) , 322, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #415 [ref=5x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 292, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #416 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 292, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #417 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 122, 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #418 [ref=3x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , 0 , 292, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #419 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 122, 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #420 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 122, 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #421 [ref=3x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 128, 6 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #422 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #423 [ref=6x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #424 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(WO)}, // #425 [ref=2x] + { F(Evex)|F(Vec) , X(B32)|X(K) , 322, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #426 [ref=2x] + { F(Evex)|F(Vec) , X(B64)|X(K) , 322, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #427 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 535, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #428 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 537, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #429 [ref=2x] + { F(Evex)|F(Vec) , X(B16)|X(K)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #430 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 536, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #431 [ref=2x] + { F(Vec)|F(Vex) , 0 , 537, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #432 [ref=2x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 549, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #433 [ref=1x] + { F(Evex)|F(Vec) , X(K)|X(Z) , 550, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #434 [ref=1x] + { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 292, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #435 [ref=2x] + { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 549, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #436 [ref=1x] + { F(EvexTransformable)|F(Vec)|F(Vex) , 0 , 550, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #437 [ref=1x] + { F(Evex)|F(Vec) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 262, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #438 [ref=1x] + { F(Vec)|F(Vex) , 0 , 571, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #439 [ref=1x] + { F(Vec)|F(Vex) , 0 , 572, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #440 [ref=1x] + { F(Vec)|F(Vex) , 0 , 573, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #441 [ref=1x] + { F(Evex)|F(Vec) , X(B32)|X(K)|X(Z) , 266, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #442 [ref=2x] + { F(Evex)|F(Vec) , X(B64)|X(K)|X(Z) , 266, 2 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #443 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(K)|X(Z) , 265, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #444 [ref=1x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B32)|X(K)|X(Z) , 265, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #445 [ref=1x] + { F(Vec)|F(Vex) , 0 , 262, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #446 [ref=2x] + { F(Evex)|F(EvexCompat)|F(Vec)|F(Vex) , X(B64)|X(ER)|X(K)|X(SAE)|X(Z) , 280, 3 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #447 [ref=1x] + { F(Vec)|F(Vex) , 0 , 110, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #448 [ref=2x] + { 0 , 0 , 27 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #449 [ref=2x] + { 0 , 0 , 28 , 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #450 [ref=2x] + { F(Lock)|F(XAcquire)|F(XRelease) , 0 , 25 , 4 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #451 [ref=1x] + { 0 , 0 , 236, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #452 [ref=1x] + { F(XAcquire) , 0 , 25 , 8 , CONTROL_FLOW(Regular), SAME_REG_HINT(RO)}, // #453 [ref=1x] + { 0 , 0 , 574, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)}, // #454 [ref=6x] + { 0 , 0 , 575, 1 , CONTROL_FLOW(Regular), SAME_REG_HINT(None)} // #455 [ref=6x] }; #undef SAME_REG_HINT #undef CONTROL_FLOW @@ -2601,197 +2675,220 @@ const InstDB::CommonInfo InstDB::_commonInfoTable[] = { // ------------------- Automatically generated, do not edit ------------------- #define EXT(VAL) uint32_t(CpuFeatures::X86::k##VAL) const InstDB::AdditionalInfo InstDB::_additionalInfoTable[] = { - { 0, 0, { 0 } }, // #0 [ref=148x] + { 0, 0, { 0 } }, // #0 [ref=67x] { 0, 1, { 0 } }, // #1 [ref=32x] - { 0, 2, { 0 } }, // #2 [ref=2x] - { 0, 3, { EXT(ADX) } }, // #3 [ref=1x] - { 0, 0, { EXT(SSE2) } }, // #4 [ref=60x] - { 0, 0, { EXT(SSE) } }, // #5 [ref=41x] - { 0, 0, { EXT(SSE3) } }, // #6 [ref=12x] - { 0, 4, { EXT(ADX) } }, // #7 [ref=1x] - { 0, 0, { EXT(AESNI) } }, // #8 [ref=6x] - { 0, 1, { EXT(BMI) } }, // #9 [ref=6x] - { 0, 5, { 0 } }, // #10 [ref=5x] - { 0, 0, { EXT(TBM) } }, // #11 [ref=9x] - { 0, 0, { EXT(SSE4_1) } }, // #12 [ref=47x] - { 0, 0, { EXT(MPX) } }, // #13 [ref=7x] - { 0, 6, { 0 } }, // #14 [ref=4x] - { 0, 1, { EXT(BMI2) } }, // #15 [ref=1x] - { 0, 7, { EXT(SMAP) } }, // #16 [ref=2x] - { 0, 8, { 0 } }, // #17 [ref=2x] - { 0, 9, { 0 } }, // #18 [ref=2x] - { 0, 0, { EXT(CLDEMOTE) } }, // #19 [ref=1x] - { 0, 0, { EXT(CLFLUSH) } }, // #20 [ref=1x] - { 0, 0, { EXT(CLFLUSHOPT) } }, // #21 [ref=1x] - { 0, 0, { EXT(SVM) } }, // #22 [ref=6x] - { 0, 10, { 0 } }, // #23 [ref=2x] - { 0, 1, { EXT(CET_SS) } }, // #24 [ref=3x] - { 0, 0, { EXT(UINTR) } }, // #25 [ref=4x] - { 0, 0, { EXT(CLWB) } }, // #26 [ref=1x] - { 0, 0, { EXT(CLZERO) } }, // #27 [ref=1x] - { 0, 3, { 0 } }, // #28 [ref=1x] - { 0, 11, { EXT(CMOV) } }, // #29 [ref=6x] - { 0, 12, { EXT(CMOV) } }, // #30 [ref=8x] - { 0, 13, { EXT(CMOV) } }, // #31 [ref=6x] - { 0, 14, { EXT(CMOV) } }, // #32 [ref=4x] - { 0, 15, { EXT(CMOV) } }, // #33 [ref=4x] - { 0, 16, { EXT(CMOV) } }, // #34 [ref=2x] - { 0, 17, { EXT(CMOV) } }, // #35 [ref=6x] - { 0, 18, { EXT(CMOV) } }, // #36 [ref=2x] - { 0, 19, { 0 } }, // #37 [ref=2x] - { 0, 1, { EXT(I486) } }, // #38 [ref=2x] - { 0, 5, { EXT(CMPXCHG16B) } }, // #39 [ref=1x] - { 0, 5, { EXT(CMPXCHG8B) } }, // #40 [ref=1x] - { 0, 1, { EXT(SSE2) } }, // #41 [ref=2x] - { 0, 1, { EXT(SSE) } }, // #42 [ref=2x] - { 0, 0, { EXT(I486) } }, // #43 [ref=4x] - { 0, 0, { EXT(SSE4_2) } }, // #44 [ref=2x] - { 0, 20, { 0 } }, // #45 [ref=2x] - { 0, 0, { EXT(MMX) } }, // #46 [ref=1x] - { 0, 0, { EXT(CET_IBT) } }, // #47 [ref=2x] - { 0, 0, { EXT(ENQCMD) } }, // #48 [ref=2x] - { 0, 0, { EXT(SSE4A) } }, // #49 [ref=4x] - { 0, 21, { 0 } }, // #50 [ref=4x] - { 0, 0, { EXT(3DNOW) } }, // #51 [ref=21x] - { 0, 0, { EXT(FXSR) } }, // #52 [ref=4x] - { 0, 0, { EXT(SMX) } }, // #53 [ref=1x] - { 0, 0, { EXT(GFNI) } }, // #54 [ref=3x] - { 0, 0, { EXT(HRESET) } }, // #55 [ref=1x] - { 0, 0, { EXT(CET_SS) } }, // #56 [ref=9x] - { 0, 16, { 0 } }, // #57 [ref=5x] - { 0, 0, { EXT(VMX) } }, // #58 [ref=12x] - { 0, 11, { 0 } }, // #59 [ref=8x] - { 0, 12, { 0 } }, // #60 [ref=12x] - { 0, 13, { 0 } }, // #61 [ref=10x] - { 0, 14, { 0 } }, // #62 [ref=8x] - { 0, 15, { 0 } }, // #63 [ref=8x] - { 0, 17, { 0 } }, // #64 [ref=8x] - { 0, 18, { 0 } }, // #65 [ref=4x] - { 0, 0, { EXT(AVX512_DQ) } }, // #66 [ref=22x] - { 0, 0, { EXT(AVX512_BW) } }, // #67 [ref=20x] - { 0, 0, { EXT(AVX512_F) } }, // #68 [ref=36x] - { 1, 0, { EXT(AVX512_DQ) } }, // #69 [ref=1x] - { 1, 0, { EXT(AVX512_BW) } }, // #70 [ref=2x] - { 1, 0, { EXT(AVX512_F) } }, // #71 [ref=1x] - { 0, 1, { EXT(AVX512_DQ) } }, // #72 [ref=3x] - { 0, 1, { EXT(AVX512_BW) } }, // #73 [ref=4x] - { 0, 1, { EXT(AVX512_F) } }, // #74 [ref=1x] - { 0, 22, { EXT(LAHFSAHF) } }, // #75 [ref=1x] - { 0, 0, { EXT(AMX_TILE) } }, // #76 [ref=7x] - { 0, 0, { EXT(LWP) } }, // #77 [ref=4x] - { 0, 23, { 0 } }, // #78 [ref=3x] - { 0, 1, { EXT(LZCNT) } }, // #79 [ref=1x] - { 0, 0, { EXT(MMX2) } }, // #80 [ref=8x] - { 0, 1, { EXT(MCOMMIT) } }, // #81 [ref=1x] - { 0, 0, { EXT(MONITOR) } }, // #82 [ref=2x] - { 0, 0, { EXT(MONITORX) } }, // #83 [ref=2x] - { 1, 0, { 0 } }, // #84 [ref=1x] - { 1, 0, { EXT(SSE2) } }, // #85 [ref=5x] - { 1, 0, { EXT(SSE) } }, // #86 [ref=3x] - { 0, 0, { EXT(MOVBE) } }, // #87 [ref=1x] - { 0, 0, { EXT(MMX), EXT(SSE2) } }, // #88 [ref=45x] - { 0, 0, { EXT(MOVDIR64B) } }, // #89 [ref=1x] - { 0, 0, { EXT(MOVDIRI) } }, // #90 [ref=1x] - { 1, 0, { EXT(MMX), EXT(SSE2) } }, // #91 [ref=1x] - { 0, 0, { EXT(BMI2) } }, // #92 [ref=7x] - { 0, 0, { EXT(SSSE3) } }, // #93 [ref=15x] - { 0, 0, { EXT(MMX2), EXT(SSE2) } }, // #94 [ref=10x] - { 0, 0, { EXT(PCLMULQDQ) } }, // #95 [ref=1x] - { 0, 1, { EXT(SSE4_2) } }, // #96 [ref=4x] - { 0, 0, { EXT(PCONFIG) } }, // #97 [ref=1x] - { 0, 0, { EXT(MMX2), EXT(SSE2), EXT(SSE4_1) } }, // #98 [ref=1x] - { 0, 0, { EXT(3DNOW2) } }, // #99 [ref=5x] - { 0, 0, { EXT(GEODE) } }, // #100 [ref=2x] - { 0, 1, { EXT(POPCNT) } }, // #101 [ref=1x] - { 0, 24, { 0 } }, // #102 [ref=3x] - { 0, 1, { EXT(PREFETCHW) } }, // #103 [ref=1x] - { 0, 1, { EXT(PREFETCHWT1) } }, // #104 [ref=1x] - { 0, 20, { EXT(SNP) } }, // #105 [ref=3x] - { 0, 1, { EXT(SSE4_1) } }, // #106 [ref=1x] - { 0, 0, { EXT(PTWRITE) } }, // #107 [ref=1x] - { 0, 25, { 0 } }, // #108 [ref=3x] - { 0, 1, { EXT(SNP) } }, // #109 [ref=1x] - { 0, 26, { 0 } }, // #110 [ref=2x] - { 0, 0, { EXT(FSGSBASE) } }, // #111 [ref=4x] - { 0, 0, { EXT(MSR) } }, // #112 [ref=2x] - { 0, 0, { EXT(RDPID) } }, // #113 [ref=1x] - { 0, 0, { EXT(OSPKE) } }, // #114 [ref=1x] - { 0, 0, { EXT(RDPRU) } }, // #115 [ref=1x] - { 0, 1, { EXT(RDRAND) } }, // #116 [ref=1x] - { 0, 1, { EXT(RDSEED) } }, // #117 [ref=1x] - { 0, 0, { EXT(RDTSC) } }, // #118 [ref=1x] - { 0, 0, { EXT(RDTSCP) } }, // #119 [ref=1x] - { 0, 27, { 0 } }, // #120 [ref=2x] - { 0, 28, { EXT(LAHFSAHF) } }, // #121 [ref=1x] - { 0, 0, { EXT(SERIALIZE) } }, // #122 [ref=1x] - { 0, 0, { EXT(SHA) } }, // #123 [ref=7x] - { 0, 0, { EXT(SKINIT) } }, // #124 [ref=2x] - { 0, 0, { EXT(AMX_BF16) } }, // #125 [ref=1x] - { 0, 0, { EXT(AMX_INT8) } }, // #126 [ref=4x] - { 0, 1, { EXT(UINTR) } }, // #127 [ref=1x] - { 0, 1, { EXT(WAITPKG) } }, // #128 [ref=2x] - { 0, 0, { EXT(WAITPKG) } }, // #129 [ref=1x] - { 0, 0, { EXT(AVX512_4FMAPS) } }, // #130 [ref=4x] - { 0, 0, { EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL) } }, // #131 [ref=42x] - { 0, 0, { EXT(AVX512_FP16), EXT(AVX512_VL) } }, // #132 [ref=63x] - { 0, 0, { EXT(AVX), EXT(AVX512_F) } }, // #133 [ref=29x] - { 0, 0, { EXT(AVX512_FP16) } }, // #134 [ref=43x] - { 0, 0, { EXT(AVX) } }, // #135 [ref=35x] - { 0, 0, { EXT(AESNI), EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL), EXT(VAES) } }, // #136 [ref=4x] - { 0, 0, { EXT(AESNI), EXT(AVX) } }, // #137 [ref=2x] - { 0, 0, { EXT(AVX512_F), EXT(AVX512_VL) } }, // #138 [ref=108x] - { 0, 0, { EXT(AVX), EXT(AVX512_DQ), EXT(AVX512_VL) } }, // #139 [ref=8x] - { 0, 0, { EXT(AVX512_DQ), EXT(AVX512_VL) } }, // #140 [ref=30x] - { 0, 0, { EXT(AVX2) } }, // #141 [ref=7x] - { 0, 0, { EXT(AVX), EXT(AVX2), EXT(AVX512_F), EXT(AVX512_VL) } }, // #142 [ref=39x] - { 0, 1, { EXT(AVX), EXT(AVX512_F) } }, // #143 [ref=4x] - { 0, 0, { EXT(AVX512_BF16), EXT(AVX512_VL) } }, // #144 [ref=3x] - { 0, 0, { EXT(AVX512_F), EXT(AVX512_VL), EXT(F16C) } }, // #145 [ref=2x] - { 0, 0, { EXT(AVX512_BW), EXT(AVX512_VL) } }, // #146 [ref=24x] - { 0, 0, { EXT(AVX512_ERI) } }, // #147 [ref=10x] - { 0, 0, { EXT(AVX512_F), EXT(AVX512_VL), EXT(FMA) } }, // #148 [ref=36x] - { 0, 0, { EXT(AVX512_F), EXT(FMA) } }, // #149 [ref=24x] - { 0, 0, { EXT(FMA4) } }, // #150 [ref=20x] - { 0, 0, { EXT(XOP) } }, // #151 [ref=55x] - { 0, 0, { EXT(AVX2), EXT(AVX512_F), EXT(AVX512_VL) } }, // #152 [ref=19x] - { 0, 0, { EXT(AVX512_PFI) } }, // #153 [ref=16x] - { 0, 0, { EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL), EXT(GFNI) } }, // #154 [ref=3x] - { 1, 0, { EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL) } }, // #155 [ref=4x] - { 1, 0, { EXT(AVX) } }, // #156 [ref=2x] - { 1, 0, { EXT(AVX512_F), EXT(AVX512_VL) } }, // #157 [ref=4x] - { 1, 0, { EXT(AVX512_BW), EXT(AVX512_VL) } }, // #158 [ref=2x] - { 1, 0, { EXT(AVX), EXT(AVX512_F) } }, // #159 [ref=3x] - { 0, 0, { EXT(AVX), EXT(AVX2) } }, // #160 [ref=17x] - { 0, 0, { EXT(AVX512_VP2INTERSECT) } }, // #161 [ref=2x] - { 0, 0, { EXT(AVX512_4VNNIW) } }, // #162 [ref=2x] - { 0, 0, { EXT(AVX), EXT(AVX2), EXT(AVX512_BW), EXT(AVX512_VL) } }, // #163 [ref=54x] - { 0, 0, { EXT(AVX2), EXT(AVX512_BW), EXT(AVX512_VL) } }, // #164 [ref=2x] - { 0, 0, { EXT(AVX512_CDI), EXT(AVX512_VL) } }, // #165 [ref=6x] - { 0, 0, { EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL), EXT(PCLMULQDQ), EXT(VPCLMULQDQ) } }, // #166 [ref=1x] - { 0, 1, { EXT(AVX) } }, // #167 [ref=7x] - { 0, 0, { EXT(AVX512_VBMI2), EXT(AVX512_VL) } }, // #168 [ref=16x] - { 0, 0, { EXT(AVX512_VL), EXT(AVX512_VNNI), EXT(AVX_VNNI) } }, // #169 [ref=4x] - { 0, 0, { EXT(AVX512_VBMI), EXT(AVX512_VL) } }, // #170 [ref=4x] - { 0, 0, { EXT(AVX), EXT(AVX512_BW) } }, // #171 [ref=4x] - { 0, 0, { EXT(AVX), EXT(AVX512_DQ) } }, // #172 [ref=4x] - { 0, 0, { EXT(AVX512_IFMA), EXT(AVX512_VL) } }, // #173 [ref=2x] - { 0, 0, { EXT(AVX512_BITALG), EXT(AVX512_VL) } }, // #174 [ref=3x] - { 0, 0, { EXT(AVX512_VL), EXT(AVX512_VPOPCNTDQ) } }, // #175 [ref=2x] - { 0, 0, { EXT(WBNOINVD) } }, // #176 [ref=1x] - { 0, 0, { EXT(RTM) } }, // #177 [ref=3x] - { 0, 0, { EXT(XSAVE) } }, // #178 [ref=6x] - { 0, 0, { EXT(TSXLDTRK) } }, // #179 [ref=2x] - { 0, 0, { EXT(XSAVES) } }, // #180 [ref=4x] - { 0, 0, { EXT(XSAVEC) } }, // #181 [ref=2x] - { 0, 0, { EXT(XSAVEOPT) } }, // #182 [ref=2x] - { 0, 1, { EXT(TSX) } } // #183 [ref=1x] + { 0, 0, { EXT(RAO_INT) } }, // #2 [ref=4x] + { 0, 2, { 0 } }, // #3 [ref=2x] + { 0, 3, { EXT(ADX) } }, // #4 [ref=1x] + { 0, 0, { EXT(SSE2) } }, // #5 [ref=60x] + { 0, 0, { EXT(SSE) } }, // #6 [ref=46x] + { 0, 0, { EXT(SSE3) } }, // #7 [ref=10x] + { 0, 4, { EXT(ADX) } }, // #8 [ref=1x] + { 0, 0, { EXT(AESNI) } }, // #9 [ref=6x] + { 0, 1, { EXT(BMI) } }, // #10 [ref=6x] + { 0, 5, { 0 } }, // #11 [ref=5x] + { 0, 0, { EXT(TBM) } }, // #12 [ref=9x] + { 0, 0, { EXT(SSE4_1) } }, // #13 [ref=47x] + { 0, 0, { EXT(MPX) } }, // #14 [ref=7x] + { 0, 6, { 0 } }, // #15 [ref=4x] + { 0, 1, { EXT(BMI2) } }, // #16 [ref=1x] + { 0, 7, { EXT(SMAP) } }, // #17 [ref=2x] + { 0, 8, { 0 } }, // #18 [ref=2x] + { 0, 9, { 0 } }, // #19 [ref=2x] + { 0, 0, { EXT(CLDEMOTE) } }, // #20 [ref=1x] + { 0, 0, { EXT(CLFLUSH) } }, // #21 [ref=1x] + { 0, 0, { EXT(CLFLUSHOPT) } }, // #22 [ref=1x] + { 0, 0, { EXT(SVM) } }, // #23 [ref=6x] + { 0, 10, { 0 } }, // #24 [ref=2x] + { 0, 1, { EXT(CET_SS) } }, // #25 [ref=3x] + { 0, 0, { EXT(UINTR) } }, // #26 [ref=4x] + { 0, 0, { EXT(CLWB) } }, // #27 [ref=1x] + { 0, 0, { EXT(CLZERO) } }, // #28 [ref=1x] + { 0, 3, { 0 } }, // #29 [ref=1x] + { 0, 11, { EXT(CMOV) } }, // #30 [ref=4x] + { 0, 12, { EXT(CMOV) } }, // #31 [ref=6x] + { 0, 13, { EXT(CMOV) } }, // #32 [ref=4x] + { 0, 14, { EXT(CMOV) } }, // #33 [ref=4x] + { 0, 15, { EXT(CMOV) } }, // #34 [ref=4x] + { 0, 16, { EXT(CMOV) } }, // #35 [ref=2x] + { 0, 17, { EXT(CMOV) } }, // #36 [ref=4x] + { 0, 18, { EXT(CMOV) } }, // #37 [ref=2x] + { 0, 1, { EXT(CMPCCXADD) } }, // #38 [ref=16x] + { 0, 19, { 0 } }, // #39 [ref=2x] + { 0, 1, { EXT(I486) } }, // #40 [ref=2x] + { 0, 5, { EXT(CMPXCHG16B) } }, // #41 [ref=1x] + { 0, 5, { EXT(CMPXCHG8B) } }, // #42 [ref=1x] + { 0, 1, { EXT(SSE2) } }, // #43 [ref=2x] + { 0, 1, { EXT(SSE) } }, // #44 [ref=2x] + { 0, 0, { EXT(I486) } }, // #45 [ref=5x] + { 0, 0, { EXT(SSE4_2) } }, // #46 [ref=2x] + { 0, 20, { 0 } }, // #47 [ref=2x] + { 0, 0, { EXT(MMX) } }, // #48 [ref=1x] + { 0, 0, { EXT(CET_IBT) } }, // #49 [ref=2x] + { 0, 1, { EXT(ENQCMD) } }, // #50 [ref=2x] + { 0, 0, { EXT(SSE4A) } }, // #51 [ref=4x] + { 0, 21, { EXT(FPU) } }, // #52 [ref=80x] + { 0, 22, { EXT(CMOV), EXT(FPU) } }, // #53 [ref=2x] + { 0, 23, { EXT(CMOV), EXT(FPU) } }, // #54 [ref=2x] + { 0, 24, { EXT(CMOV), EXT(FPU) } }, // #55 [ref=2x] + { 0, 25, { EXT(CMOV), EXT(FPU) } }, // #56 [ref=2x] + { 0, 26, { EXT(FPU) } }, // #57 [ref=4x] + { 0, 0, { EXT(3DNOW) } }, // #58 [ref=21x] + { 0, 21, { EXT(SSE3), EXT(FPU) } }, // #59 [ref=1x] + { 0, 21, { EXT(FXSR) } }, // #60 [ref=2x] + { 0, 27, { EXT(FXSR) } }, // #61 [ref=2x] + { 0, 0, { EXT(SMX) } }, // #62 [ref=1x] + { 0, 0, { EXT(GFNI) } }, // #63 [ref=3x] + { 0, 0, { EXT(HRESET) } }, // #64 [ref=1x] + { 0, 0, { EXT(CET_SS) } }, // #65 [ref=9x] + { 0, 16, { 0 } }, // #66 [ref=5x] + { 0, 0, { EXT(VMX) } }, // #67 [ref=13x] + { 0, 0, { EXT(INVLPGB) } }, // #68 [ref=2x] + { 0, 11, { 0 } }, // #69 [ref=8x] + { 0, 12, { 0 } }, // #70 [ref=12x] + { 0, 13, { 0 } }, // #71 [ref=10x] + { 0, 14, { 0 } }, // #72 [ref=8x] + { 0, 15, { 0 } }, // #73 [ref=8x] + { 0, 17, { 0 } }, // #74 [ref=8x] + { 0, 18, { 0 } }, // #75 [ref=4x] + { 0, 0, { EXT(AVX512_DQ) } }, // #76 [ref=22x] + { 0, 0, { EXT(AVX512_BW) } }, // #77 [ref=20x] + { 0, 0, { EXT(AVX512_F) } }, // #78 [ref=36x] + { 1, 0, { EXT(AVX512_DQ) } }, // #79 [ref=1x] + { 1, 0, { EXT(AVX512_BW) } }, // #80 [ref=2x] + { 1, 0, { EXT(AVX512_F) } }, // #81 [ref=1x] + { 0, 1, { EXT(AVX512_DQ) } }, // #82 [ref=3x] + { 0, 1, { EXT(AVX512_BW) } }, // #83 [ref=4x] + { 0, 1, { EXT(AVX512_F) } }, // #84 [ref=1x] + { 0, 28, { EXT(LAHFSAHF) } }, // #85 [ref=1x] + { 0, 0, { EXT(AMX_TILE) } }, // #86 [ref=7x] + { 0, 0, { EXT(LWP) } }, // #87 [ref=4x] + { 0, 29, { 0 } }, // #88 [ref=3x] + { 0, 1, { EXT(LZCNT) } }, // #89 [ref=1x] + { 0, 0, { EXT(MMX2) } }, // #90 [ref=3x] + { 0, 1, { EXT(MCOMMIT) } }, // #91 [ref=1x] + { 0, 0, { EXT(MONITOR) } }, // #92 [ref=2x] + { 0, 0, { EXT(MONITORX) } }, // #93 [ref=2x] + { 1, 0, { 0 } }, // #94 [ref=1x] + { 1, 0, { EXT(SSE2) } }, // #95 [ref=5x] + { 1, 0, { EXT(SSE) } }, // #96 [ref=3x] + { 0, 0, { EXT(MOVBE) } }, // #97 [ref=1x] + { 0, 0, { EXT(MMX), EXT(SSE2) } }, // #98 [ref=45x] + { 0, 0, { EXT(MOVDIR64B) } }, // #99 [ref=1x] + { 0, 0, { EXT(MOVDIRI) } }, // #100 [ref=1x] + { 1, 0, { EXT(MMX), EXT(SSE2) } }, // #101 [ref=1x] + { 0, 0, { EXT(BMI2) } }, // #102 [ref=7x] + { 0, 0, { EXT(SSSE3) } }, // #103 [ref=16x] + { 0, 0, { EXT(MMX2), EXT(SSE2) } }, // #104 [ref=10x] + { 0, 0, { EXT(PCLMULQDQ) } }, // #105 [ref=1x] + { 0, 1, { EXT(SSE4_2) } }, // #106 [ref=4x] + { 0, 0, { EXT(PCONFIG) } }, // #107 [ref=1x] + { 0, 0, { EXT(MMX2), EXT(SSE2), EXT(SSE4_1) } }, // #108 [ref=1x] + { 0, 0, { EXT(3DNOW2) } }, // #109 [ref=5x] + { 0, 0, { EXT(GEODE) } }, // #110 [ref=2x] + { 0, 1, { EXT(POPCNT) } }, // #111 [ref=1x] + { 0, 30, { 0 } }, // #112 [ref=3x] + { 0, 0, { EXT(PREFETCHI) } }, // #113 [ref=2x] + { 0, 1, { EXT(PREFETCHW) } }, // #114 [ref=1x] + { 0, 1, { EXT(PREFETCHWT1) } }, // #115 [ref=1x] + { 0, 20, { EXT(SEV_SNP) } }, // #116 [ref=3x] + { 0, 1, { EXT(SSE4_1) } }, // #117 [ref=1x] + { 0, 0, { EXT(PTWRITE) } }, // #118 [ref=1x] + { 0, 31, { 0 } }, // #119 [ref=3x] + { 0, 1, { EXT(SEV_SNP) } }, // #120 [ref=1x] + { 0, 32, { 0 } }, // #121 [ref=2x] + { 0, 0, { EXT(FSGSBASE) } }, // #122 [ref=4x] + { 0, 0, { EXT(MSR) } }, // #123 [ref=2x] + { 0, 0, { EXT(RDPID) } }, // #124 [ref=1x] + { 0, 0, { EXT(OSPKE) } }, // #125 [ref=1x] + { 0, 0, { EXT(RDPRU) } }, // #126 [ref=1x] + { 0, 1, { EXT(RDRAND) } }, // #127 [ref=1x] + { 0, 1, { EXT(RDSEED) } }, // #128 [ref=1x] + { 0, 0, { EXT(RDTSC) } }, // #129 [ref=1x] + { 0, 0, { EXT(RDTSCP) } }, // #130 [ref=1x] + { 0, 33, { 0 } }, // #131 [ref=2x] + { 0, 34, { EXT(LAHFSAHF) } }, // #132 [ref=1x] + { 0, 0, { EXT(SEAM) } }, // #133 [ref=4x] + { 0, 0, { EXT(SERIALIZE) } }, // #134 [ref=1x] + { 0, 0, { EXT(SHA) } }, // #135 [ref=7x] + { 0, 0, { EXT(SKINIT) } }, // #136 [ref=2x] + { 0, 0, { EXT(AMX_COMPLEX) } }, // #137 [ref=2x] + { 0, 0, { EXT(AMX_BF16) } }, // #138 [ref=1x] + { 0, 0, { EXT(AMX_INT8) } }, // #139 [ref=4x] + { 0, 0, { EXT(AMX_FP16) } }, // #140 [ref=1x] + { 0, 1, { EXT(UINTR) } }, // #141 [ref=1x] + { 0, 1, { EXT(WAITPKG) } }, // #142 [ref=2x] + { 0, 0, { EXT(WAITPKG) } }, // #143 [ref=1x] + { 0, 0, { EXT(AVX512_4FMAPS) } }, // #144 [ref=4x] + { 0, 0, { EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL) } }, // #145 [ref=38x] + { 0, 0, { EXT(AVX512_FP16), EXT(AVX512_VL) } }, // #146 [ref=60x] + { 0, 0, { EXT(AVX), EXT(AVX512_F) } }, // #147 [ref=33x] + { 0, 0, { EXT(AVX512_FP16) } }, // #148 [ref=44x] + { 0, 0, { EXT(AVX) } }, // #149 [ref=35x] + { 0, 0, { EXT(AESNI), EXT(VAES), EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL) } }, // #150 [ref=4x] + { 0, 0, { EXT(AESNI), EXT(AVX) } }, // #151 [ref=2x] + { 0, 0, { EXT(AVX512_F), EXT(AVX512_VL) } }, // #152 [ref=108x] + { 0, 0, { EXT(AVX), EXT(AVX512_DQ), EXT(AVX512_VL) } }, // #153 [ref=8x] + { 0, 0, { EXT(AVX_NE_CONVERT) } }, // #154 [ref=6x] + { 0, 0, { EXT(AVX512_DQ), EXT(AVX512_VL) } }, // #155 [ref=30x] + { 0, 0, { EXT(AVX2) } }, // #156 [ref=7x] + { 0, 0, { EXT(AVX), EXT(AVX2), EXT(AVX512_F), EXT(AVX512_VL) } }, // #157 [ref=39x] + { 0, 1, { EXT(AVX), EXT(AVX512_F) } }, // #158 [ref=4x] + { 0, 1, { EXT(AVX512_FP16) } }, // #159 [ref=2x] + { 0, 0, { EXT(AVX512_BF16), EXT(AVX512_VL) } }, // #160 [ref=2x] + { 0, 0, { EXT(AVX_NE_CONVERT), EXT(AVX512_BF16), EXT(AVX512_VL) } }, // #161 [ref=1x] + { 0, 0, { EXT(F16C), EXT(AVX512_F), EXT(AVX512_VL) } }, // #162 [ref=2x] + { 0, 0, { EXT(AVX512_BW), EXT(AVX512_VL) } }, // #163 [ref=24x] + { 0, 0, { EXT(AVX512_ER) } }, // #164 [ref=10x] + { 0, 0, { EXT(FMA), EXT(AVX512_F), EXT(AVX512_VL) } }, // #165 [ref=36x] + { 0, 0, { EXT(FMA), EXT(AVX512_F) } }, // #166 [ref=24x] + { 0, 0, { EXT(FMA4) } }, // #167 [ref=20x] + { 0, 0, { EXT(XOP) } }, // #168 [ref=55x] + { 0, 0, { EXT(AVX2), EXT(AVX512_F), EXT(AVX512_VL) } }, // #169 [ref=19x] + { 0, 0, { EXT(AVX512_PF) } }, // #170 [ref=16x] + { 0, 0, { EXT(GFNI), EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL) } }, // #171 [ref=3x] + { 0, 0, { EXT(SEV_ES) } }, // #172 [ref=1x] + { 1, 0, { EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL) } }, // #173 [ref=4x] + { 1, 0, { EXT(AVX) } }, // #174 [ref=2x] + { 1, 0, { EXT(AVX512_F), EXT(AVX512_VL) } }, // #175 [ref=4x] + { 1, 0, { EXT(AVX512_BW), EXT(AVX512_VL) } }, // #176 [ref=2x] + { 1, 0, { EXT(AVX), EXT(AVX512_F) } }, // #177 [ref=3x] + { 0, 0, { EXT(AVX), EXT(AVX2) } }, // #178 [ref=17x] + { 0, 0, { EXT(AVX512_VL), EXT(AVX512_VP2INTERSECT) } }, // #179 [ref=2x] + { 0, 0, { EXT(AVX512_4VNNIW) } }, // #180 [ref=2x] + { 0, 0, { EXT(AVX), EXT(AVX2), EXT(AVX512_BW), EXT(AVX512_VL) } }, // #181 [ref=54x] + { 0, 0, { EXT(AVX2), EXT(AVX512_BW), EXT(AVX512_VL) } }, // #182 [ref=2x] + { 0, 0, { EXT(AVX512_CD), EXT(AVX512_VL) } }, // #183 [ref=6x] + { 0, 0, { EXT(PCLMULQDQ), EXT(VPCLMULQDQ), EXT(AVX), EXT(AVX512_F), EXT(AVX512_VL) } }, // #184 [ref=1x] + { 0, 1, { EXT(AVX) } }, // #185 [ref=7x] + { 0, 0, { EXT(AVX512_VBMI2), EXT(AVX512_VL) } }, // #186 [ref=16x] + { 0, 0, { EXT(AVX_VNNI_INT8) } }, // #187 [ref=6x] + { 0, 0, { EXT(AVX_VNNI), EXT(AVX512_VL), EXT(AVX512_VNNI) } }, // #188 [ref=4x] + { 0, 0, { EXT(AVX_VNNI_INT16) } }, // #189 [ref=6x] + { 0, 0, { EXT(AVX512_VBMI), EXT(AVX512_VL) } }, // #190 [ref=4x] + { 0, 0, { EXT(AVX), EXT(AVX512_BW) } }, // #191 [ref=4x] + { 0, 0, { EXT(AVX), EXT(AVX512_DQ) } }, // #192 [ref=4x] + { 0, 0, { EXT(AVX_IFMA), EXT(AVX512_IFMA), EXT(AVX512_VL) } }, // #193 [ref=2x] + { 0, 0, { EXT(AVX512_BITALG), EXT(AVX512_VL) } }, // #194 [ref=3x] + { 0, 0, { EXT(AVX512_VL), EXT(AVX512_VPOPCNTDQ) } }, // #195 [ref=2x] + { 0, 0, { EXT(SHA512), EXT(AVX) } }, // #196 [ref=3x] + { 0, 0, { EXT(SM3), EXT(AVX) } }, // #197 [ref=3x] + { 0, 0, { EXT(SM4), EXT(AVX) } }, // #198 [ref=2x] + { 0, 0, { EXT(WBNOINVD) } }, // #199 [ref=1x] + { 0, 0, { EXT(RTM) } }, // #200 [ref=3x] + { 0, 0, { EXT(XSAVE) } }, // #201 [ref=6x] + { 0, 0, { EXT(TSXLDTRK) } }, // #202 [ref=2x] + { 0, 0, { EXT(XSAVES) } }, // #203 [ref=4x] + { 0, 0, { EXT(XSAVEC) } }, // #204 [ref=2x] + { 0, 0, { EXT(XSAVEOPT) } }, // #205 [ref=2x] + { 0, 1, { EXT(TSX) } } // #206 [ref=1x] }; #undef EXT #define FLAG(VAL) uint32_t(CpuRWFlags::kX86_##VAL) const InstDB::RWFlagsInfoTable InstDB::_rwFlagsInfoTable[] = { - { 0, 0 }, // #0 [ref=1429x] - { 0, FLAG(AF) | FLAG(CF) | FLAG(OF) | FLAG(PF) | FLAG(SF) | FLAG(ZF) }, // #1 [ref=84x] + { 0, 0 }, // #0 [ref=1383x] + { 0, FLAG(AF) | FLAG(CF) | FLAG(OF) | FLAG(PF) | FLAG(SF) | FLAG(ZF) }, // #1 [ref=104x] { FLAG(CF), FLAG(AF) | FLAG(CF) | FLAG(OF) | FLAG(PF) | FLAG(SF) | FLAG(ZF) }, // #2 [ref=2x] { FLAG(CF), FLAG(CF) }, // #3 [ref=2x] { FLAG(OF), FLAG(OF) }, // #4 [ref=1x] @@ -2801,30 +2898,36 @@ const InstDB::RWFlagsInfoTable InstDB::_rwFlagsInfoTable[] = { { 0, FLAG(CF) }, // #8 [ref=2x] { 0, FLAG(DF) }, // #9 [ref=2x] { 0, FLAG(IF) }, // #10 [ref=2x] - { FLAG(CF) | FLAG(ZF), 0 }, // #11 [ref=14x] - { FLAG(CF), 0 }, // #12 [ref=20x] - { FLAG(ZF), 0 }, // #13 [ref=16x] + { FLAG(CF) | FLAG(ZF), 0 }, // #11 [ref=12x] + { FLAG(CF), 0 }, // #12 [ref=18x] + { FLAG(ZF), 0 }, // #13 [ref=14x] { FLAG(OF) | FLAG(SF) | FLAG(ZF), 0 }, // #14 [ref=12x] { FLAG(OF) | FLAG(SF), 0 }, // #15 [ref=12x] { FLAG(OF), 0 }, // #16 [ref=7x] - { FLAG(PF), 0 }, // #17 [ref=14x] + { FLAG(PF), 0 }, // #17 [ref=12x] { FLAG(SF), 0 }, // #18 [ref=6x] { FLAG(DF), FLAG(AF) | FLAG(CF) | FLAG(OF) | FLAG(PF) | FLAG(SF) | FLAG(ZF) }, // #19 [ref=2x] { 0, FLAG(AF) | FLAG(OF) | FLAG(PF) | FLAG(SF) | FLAG(ZF) }, // #20 [ref=5x] - { 0, FLAG(CF) | FLAG(PF) | FLAG(ZF) }, // #21 [ref=4x] - { FLAG(AF) | FLAG(CF) | FLAG(PF) | FLAG(SF) | FLAG(ZF), 0 }, // #22 [ref=1x] - { FLAG(DF), 0 }, // #23 [ref=3x] - { 0, FLAG(AF) | FLAG(CF) | FLAG(DF) | FLAG(IF) | FLAG(OF) | FLAG(PF) | FLAG(SF) | FLAG(ZF) }, // #24 [ref=3x] - { FLAG(AF) | FLAG(CF) | FLAG(DF) | FLAG(IF) | FLAG(OF) | FLAG(PF) | FLAG(SF) | FLAG(ZF), 0 }, // #25 [ref=3x] - { FLAG(CF) | FLAG(OF), FLAG(CF) | FLAG(OF) }, // #26 [ref=2x] - { 0, FLAG(CF) | FLAG(OF) }, // #27 [ref=2x] - { 0, FLAG(AF) | FLAG(CF) | FLAG(PF) | FLAG(SF) | FLAG(ZF) } // #28 [ref=1x] + { 0, FLAG(C0) | FLAG(C1) | FLAG(C2) | FLAG(C3) }, // #21 [ref=83x] + { FLAG(CF), FLAG(C0) | FLAG(C1) | FLAG(C2) | FLAG(C3) }, // #22 [ref=2x] + { FLAG(CF) | FLAG(ZF), FLAG(C0) | FLAG(C1) | FLAG(C2) | FLAG(C3) }, // #23 [ref=2x] + { FLAG(ZF), FLAG(C0) | FLAG(C1) | FLAG(C2) | FLAG(C3) }, // #24 [ref=2x] + { FLAG(PF), FLAG(C0) | FLAG(C1) | FLAG(C2) | FLAG(C3) }, // #25 [ref=2x] + { 0, FLAG(C1) | FLAG(CF) | FLAG(PF) | FLAG(ZF) }, // #26 [ref=4x] + { FLAG(C0) | FLAG(C1) | FLAG(C2) | FLAG(C3), 0 }, // #27 [ref=2x] + { FLAG(AF) | FLAG(CF) | FLAG(PF) | FLAG(SF) | FLAG(ZF), 0 }, // #28 [ref=1x] + { FLAG(DF), 0 }, // #29 [ref=3x] + { 0, FLAG(AF) | FLAG(CF) | FLAG(DF) | FLAG(IF) | FLAG(OF) | FLAG(PF) | FLAG(SF) | FLAG(ZF) }, // #30 [ref=3x] + { FLAG(AF) | FLAG(CF) | FLAG(DF) | FLAG(IF) | FLAG(OF) | FLAG(PF) | FLAG(SF) | FLAG(ZF), 0 }, // #31 [ref=3x] + { FLAG(CF) | FLAG(OF), FLAG(CF) | FLAG(OF) }, // #32 [ref=2x] + { 0, FLAG(CF) | FLAG(OF) }, // #33 [ref=2x] + { 0, FLAG(AF) | FLAG(CF) | FLAG(PF) | FLAG(SF) | FLAG(ZF) } // #34 [ref=1x] }; #undef FLAG #define FLAG(VAL) uint32_t(InstRWFlags::k##VAL) const InstRWFlags InstDB::_instFlagsTable[] = { - InstRWFlags(FLAG(None)), // #0 [ref=1634x] + InstRWFlags(FLAG(None)), // #0 [ref=1693x] InstRWFlags(FLAG(MovOp)) // #1 [ref=29x] }; #undef FLAG @@ -2841,7 +2944,9 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x80000000, // Small ''. 0x80000421, // Small 'aaa'. 0x80001021, // Small 'aad'. + 0x80021021, // Small 'aadd'. 0x80003421, // Small 'aam'. + 0x80023821, // Small 'aand'. 0x80004C21, // Small 'aas'. 0x80000C81, // Small 'adc'. 0x800C0C81, // Small 'adcx'. @@ -2850,13 +2955,13 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x81381081, // Small 'addps'. 0x80499081, // Small 'addsd'. 0x81399081, // Small 'addss'. - 0x20876079, // Large 'addsub|pd'. - 0x20706079, // Large 'addsub|ps'. + 0x20A76099, // Large 'addsub|pd'. + 0x207D6099, // Large 'addsub|ps'. 0x800C3C81, // Small 'adox'. 0x86524CA1, // Small 'aesdec'. - 0x3028718D, // Large 'aesdecl|ast'. + 0x302871D5, // Large 'aesdecl|ast'. 0x86E2CCA1, // Small 'aesenc'. - 0x30287195, // Large 'aesencl|ast'. + 0x302871DD, // Large 'aesencl|ast'. 0x86D4CCA1, // Small 'aesimc'. 0x0000F012, // Large 'aeskeygenassist'. 0x800011C1, // Small 'and'. @@ -2865,18 +2970,20 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0xA70711C1, // Small 'andnps'. 0x804811C1, // Small 'andpd'. 0x813811C1, // Small 'andps'. + 0x800049E1, // Small 'aor'. 0x80064241, // Small 'arpl'. + 0x80093F01, // Small 'axor'. 0x812A60A2, // Small 'bextr'. - 0x261B5630, // Large 'blcfi|ll'. + 0x26F45709, // Large 'blcfi|ll'. 0x80048D82, // Small 'blci'. 0x80348D82, // Small 'blcic'. 0x97368D82, // Small 'blcmsk'. 0x80098D82, // Small 'blcs'. - 0x208753E4, // Large 'blend|pd'. - 0x207053E4, // Large 'blend|ps'. - 0x33EA53E4, // Large 'blend|vpd'. - 0x315053E4, // Large 'blend|vps'. - 0x261B5635, // Large 'blsfi|ll'. + 0x20A75471, // Large 'blend|pd'. + 0x207D5471, // Large 'blend|ps'. + 0x34775471, // Large 'blend|vpd'. + 0x318B5471, // Large 'blend|vps'. + 0x26F4570E, // Large 'blsfi|ll'. 0x8004CD82, // Small 'blsi'. 0x8034CD82, // Small 'blsic'. 0x9736CD82, // Small 'blsmsk'. @@ -2904,12 +3011,12 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x80018583, // Small 'clac'. 0x80000D83, // Small 'clc'. 0x80001183, // Small 'cld'. - 0x20BF6503, // Large 'cldemo|te'. - 0x0000724D, // Large 'clflush'. - 0x1020924D, // Large 'clflushop|t'. + 0x20DF65B0, // Large 'cldemo|te'. + 0x0000729D, // Large 'clflush'. + 0x1020929D, // Large 'clflushop|t'. 0x80049D83, // Small 'clgi'. 0x80002583, // Small 'cli'. - 0x10177509, // Large 'clrssbs|y'. + 0x101775B6, // Large 'clrssbs|y'. 0x8009D183, // Small 'clts'. 0x8004D583, // Small 'clui'. 0x80015D83, // Small 'clwb'. @@ -2926,15 +3033,15 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x80CB3DA3, // Small 'cmovl'. 0x8ACB3DA3, // Small 'cmovle'. 0x82EB3DA3, // Small 'cmovna'. - 0x20125516, // Large 'cmovn|ae'. + 0x20125713, // Large 'cmovn|ae'. 0x84EB3DA3, // Small 'cmovnb'. - 0x100B6516, // Large 'cmovnb|e'. + 0x22AA5713, // Large 'cmovn|be'. 0x86EB3DA3, // Small 'cmovnc'. 0x8AEB3DA3, // Small 'cmovne'. 0x8EEB3DA3, // Small 'cmovng'. - 0x20185516, // Large 'cmovn|ge'. + 0x20185713, // Large 'cmovn|ge'. 0x98EB3DA3, // Small 'cmovnl'. - 0x217C5516, // Large 'cmovn|le'. + 0x21C45713, // Large 'cmovn|le'. 0x9EEB3DA3, // Small 'cmovno'. 0xA0EB3DA3, // Small 'cmovnp'. 0xA6EB3DA3, // Small 'cmovns'. @@ -2946,41 +3053,57 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x813B3DA3, // Small 'cmovs'. 0x81AB3DA3, // Small 'cmovz'. 0x800041A3, // Small 'cmp'. + 0x309963D9, // Large 'cmpbex|add'. + 0x309955BD, // Large 'cmpbx|add'. + 0x309963DF, // Large 'cmplex|add'. + 0x309955C2, // Large 'cmplx|add'. + 0x309972A6, // Large 'cmpnbex|add'. + 0x309963E5, // Large 'cmpnbx|add'. + 0x309972AD, // Large 'cmpnlex|add'. + 0x309963EB, // Large 'cmpnlx|add'. + 0x309963F1, // Large 'cmpnox|add'. + 0x309963F7, // Large 'cmpnpx|add'. + 0x309963FD, // Large 'cmpnsx|add'. + 0x30996403, // Large 'cmpnzx|add'. + 0x309955C7, // Large 'cmpox|add'. 0x804841A3, // Small 'cmppd'. 0x813841A3, // Small 'cmpps'. + 0x309955CC, // Large 'cmppx|add'. 0x8009C1A3, // Small 'cmps'. 0x8049C1A3, // Small 'cmpsd'. 0x8139C1A3, // Small 'cmpss'. - 0x00007256, // Large 'cmpxchg'. - 0x10109256, // Large 'cmpxchg16|b'. - 0x23837256, // Large 'cmpxchg|8b'. + 0x309955D1, // Large 'cmpsx|add'. + 0x000072B4, // Large 'cmpxchg'. + 0x101092B4, // Large 'cmpxchg16|b'. + 0x240972B4, // Large 'cmpxchg|8b'. + 0x309955D6, // Large 'cmpzx|add'. 0x8934B5E3, // Small 'comisd'. 0xA734B5E3, // Small 'comiss'. 0x8044D603, // Small 'cpuid'. 0x80003E23, // Small 'cqo'. 0x81DF0E43, // Small 'crc32'. - 0x208763EE, // Large 'cvtdq2|pd'. - 0x207063EE, // Large 'cvtdq2|ps'. - 0x20C5627F, // Large 'cvtpd2|dq'. - 0x21E2627F, // Large 'cvtpd2|pi'. - 0x2070627F, // Large 'cvtpd2|ps'. - 0x34875510, // Large 'cvtpi|2pd'. - 0x306F5510, // Large 'cvtpi|2ps'. - 0x20C56293, // Large 'cvtps2|dq'. - 0x10267293, // Large 'cvtps2p|d'. - 0x10097293, // Large 'cvtps2p|i'. - 0x201D629C, // Large 'cvtsd2|si'. - 0x201C629C, // Large 'cvtsd2|ss'. - 0x210E63FE, // Large 'cvtsi2|sd'. - 0x201C63FE, // Large 'cvtsi2|ss'. - 0x210E62AC, // Large 'cvtss2|sd'. - 0x201D62AC, // Large 'cvtss2|si'. - 0x20C571A6, // Large 'cvttpd2|dq'. - 0x21E271A6, // Large 'cvttpd2|pi'. - 0x20C571BA, // Large 'cvttps2|dq'. - 0x21E271BA, // Large 'cvttps2|pi'. - 0x201D71C3, // Large 'cvttsd2|si'. - 0x201D71D5, // Large 'cvttss2|si'. + 0x20A7647B, // Large 'cvtdq2|pd'. + 0x207D647B, // Large 'cvtdq2|ps'. + 0x20E562D5, // Large 'cvtpd2|dq'. + 0x222A62D5, // Large 'cvtpd2|pi'. + 0x207D62D5, // Large 'cvtpd2|ps'. + 0x352555DB, // Large 'cvtpi|2pd'. + 0x307C55DB, // Large 'cvtpi|2ps'. + 0x20E562E9, // Large 'cvtps2|dq'. + 0x102672E9, // Large 'cvtps2p|d'. + 0x100972E9, // Large 'cvtps2p|i'. + 0x201D62F2, // Large 'cvtsd2|si'. + 0x201C62F2, // Large 'cvtsd2|ss'. + 0x2144648B, // Large 'cvtsi2|sd'. + 0x201C648B, // Large 'cvtsi2|ss'. + 0x21446302, // Large 'cvtss2|sd'. + 0x201D6302, // Large 'cvtss2|si'. + 0x20E571EE, // Large 'cvttpd2|dq'. + 0x222A71EE, // Large 'cvttpd2|pi'. + 0x20E57202, // Large 'cvttps2|dq'. + 0x222A7202, // Large 'cvttps2|pi'. + 0x201D720B, // Large 'cvttsd2|si'. + 0x201D721D, // Large 'cvttss2|si'. 0x800012E3, // Small 'cwd'. 0x800292E3, // Small 'cwde'. 0x80000424, // Small 'daa'. @@ -2994,12 +3117,12 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x80024204, // Small 'dppd'. 0x8009C204, // Small 'dpps'. 0x8009B5A5, // Small 'emms'. - 0x202C563A, // Large 'endbr|32'. - 0x2030563A, // Large 'endbr|64'. + 0x202C5718, // Large 'endbr|32'. + 0x20305718, // Large 'endbr|64'. 0x88D1C5C5, // Small 'enqcmd'. - 0x207B563F, // Large 'enqcm|ds'. + 0x209B571D, // Large 'enqcm|ds'. 0x8122D1C5, // Small 'enter'. - 0x207070F0, // Large 'extract|ps'. + 0x207D710D, // Large 'extract|ps'. 0x81195305, // Small 'extrq'. 0x81C6E3A6, // Small 'f2xm1'. 0x80098826, // Small 'fabs'. @@ -3010,12 +3133,12 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x8009A066, // Small 'fchs'. 0x8182B066, // Small 'fclex'. 0x8567B466, // Small 'fcmovb'. - 0x26445515, // Large 'fcmov|be'. + 0x22AA55E0, // Large 'fcmov|be'. 0x8B67B466, // Small 'fcmove'. - 0x00007515, // Large 'fcmovnb'. - 0x100B7515, // Large 'fcmovnb|e'. - 0x100B6515, // Large 'fcmovn|e'. - 0x107D6515, // Large 'fcmovn|u'. + 0x22A955E0, // Large 'fcmov|nb'. + 0x32A955E0, // Large 'fcmov|nbe'. + 0x200A55E0, // Large 'fcmov|ne'. + 0x272255E0, // Large 'fcmov|nu'. 0xAB67B466, // Small 'fcmovu'. 0x8006BC66, // Small 'fcom'. 0x8096BC66, // Small 'fcomi'. @@ -3023,7 +3146,7 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x8106BC66, // Small 'fcomp'. 0xA106BC66, // Small 'fcompp'. 0x8009BC66, // Small 'fcos'. - 0x21A95646, // Large 'fdecs|tp'. + 0x21F15724, // Large 'fdecs|tp'. 0x800B2486, // Small 'fdiv'. 0x810B2486, // Small 'fdivp'. 0x812B2486, // Small 'fdivr'. @@ -3037,7 +3160,7 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0xA5649126, // Small 'fidivr'. 0x80023126, // Small 'fild'. 0x80CAB526, // Small 'fimul'. - 0x21A9564B, // Large 'fincs|tp'. + 0x21F15729, // Large 'fincs|tp'. 0x8144B926, // Small 'finit'. 0x800A4D26, // Small 'fist'. 0x810A4D26, // Small 'fistp'. @@ -3061,18 +3184,18 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x80083DC6, // Small 'fnop'. 0x8B60CDC6, // Small 'fnsave'. 0xAE3A4DC6, // Small 'fnstcw'. - 0x200D5650, // Large 'fnste|nv'. + 0x200D572E, // Large 'fnste|nv'. 0xAF3A4DC6, // Small 'fnstsw'. 0x9C1A0606, // Small 'fpatan'. 0x80D2CA06, // Small 'fprem'. 0xB8D2CA06, // Small 'fprem1'. 0x80E0D206, // Small 'fptan'. - 0x31054655, // Large 'frnd|int'. + 0x31224733, // Large 'frnd|int'. 0xA4FA4E46, // Small 'frstor'. 0x805B0666, // Small 'fsave'. 0x8AC08E66, // Small 'fscale'. 0x80072666, // Small 'fsin'. - 0x221D5659, // Large 'fsinc|os'. + 0x22655737, // Large 'fsinc|os'. 0x81494666, // Small 'fsqrt'. 0x80005266, // Small 'fst'. 0x8171D266, // Small 'fstcw'. @@ -3086,23 +3209,23 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x800A4E86, // Small 'ftst'. 0x80D78EA6, // Small 'fucom'. 0x92D78EA6, // Small 'fucomi'. - 0x2543565E, // Large 'fucom|ip'. + 0x260C573C, // Large 'fucom|ip'. 0xA0D78EA6, // Small 'fucomp'. - 0x2663565E, // Large 'fucom|pp'. + 0x25CE573C, // Large 'fucom|pp'. 0x814486E6, // Small 'fwait'. 0x80068706, // Small 'fxam'. 0x80040F06, // Small 'fxch'. - 0x00007385, // Large 'fxrstor'. - 0x20307385, // Large 'fxrstor|64'. + 0x0000740B, // Large 'fxrstor'. + 0x2030740B, // Large 'fxrstor|64'. 0x8B60CF06, // Small 'fxsave'. - 0x2030651C, // Large 'fxsave|64'. - 0x50F22385, // Large 'fx|tract'. + 0x203065E5, // Large 'fxsave|64'. + 0x510F240B, // Large 'fx|tract'. 0x818EB326, // Small 'fyl2x'. - 0x26025665, // Large 'fyl2x|p1'. + 0x206E5741, // Large 'fyl2x|p1'. 0x8659D0A7, // Small 'getsec'. 0x1010F001, // Large 'gf2p8affineinvq|b'. 0x200FB001, // Large 'gf2p8affine|qb'. - 0x42E25001, // Large 'gf2p8|mulb'. + 0x43385001, // Large 'gf2p8|mulb'. 0x89021028, // Small 'haddpd'. 0xA7021028, // Small 'haddps'. 0x80005188, // Small 'hlt'. @@ -3113,20 +3236,21 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x800655A9, // Small 'imul'. 0x800001C9, // Small 'in'. 0x80000DC9, // Small 'inc'. - 0x2087566A, // Large 'incss|pd'. - 0x266F566A, // Large 'incss|pq'. + 0x20A75746, // Large 'incss|pd'. + 0x274B5746, // Large 'incss|pq'. 0x80004DC9, // Small 'ins'. - 0x20706149, // Large 'insert|ps'. - 0x100F6149, // Large 'insert|q'. + 0x207D6184, // Large 'insert|ps'. + 0x100F6184, // Large 'insert|q'. 0x800051C9, // Small 'int'. 0x800F51C9, // Small 'int3'. 0x8007D1C9, // Small 'into'. 0x800259C9, // Small 'invd'. 0xA902D9C9, // Small 'invept'. 0x8F0659C9, // Small 'invlpg'. - 0x33164671, // Large 'invl|pga'. - 0x23A05675, // Large 'invpc|id'. - 0x23A0567A, // Large 'invvp|id'. + 0x336C474D, // Large 'invl|pga'. + 0x23995751, // Large 'invlp|gb'. + 0x24265756, // Large 'invpc|id'. + 0x2426575B, // Large 'invvp|id'. 0x800A1649, // Small 'iret'. 0x804A1649, // Small 'iretd'. 0x811A1649, // Small 'iretq'. @@ -3185,26 +3309,26 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x800149EB, // Small 'korb'. 0x800249EB, // Small 'kord'. 0x8008C9EB, // Small 'korq'. - 0x10107522, // Large 'kortest|b'. - 0x10267522, // Large 'kortest|d'. - 0x100F7522, // Large 'kortest|q'. - 0x105F7522, // Large 'kortest|w'. + 0x101075EB, // Large 'kortest|b'. + 0x102675EB, // Large 'kortest|d'. + 0x100F75EB, // Large 'kortest|q'. + 0x105F75EB, // Large 'kortest|w'. 0x800BC9EB, // Small 'korw'. - 0x22E46529, // Large 'kshift|lb'. - 0x234B6529, // Large 'kshift|ld'. - 0x22406529, // Large 'kshift|lq'. - 0x234E6529, // Large 'kshift|lw'. - 0x252F6529, // Large 'kshift|rb'. - 0x10267529, // Large 'kshiftr|d'. - 0x100F7529, // Large 'kshiftr|q'. - 0x105F7529, // Large 'kshiftr|w'. + 0x233A65F2, // Large 'kshift|lb'. + 0x23A165F2, // Large 'kshift|ld'. + 0x228865F2, // Large 'kshift|lq'. + 0x23A465F2, // Large 'kshift|lw'. + 0x25F865F2, // Large 'kshift|rb'. + 0x102675F2, // Large 'kshiftr|d'. + 0x100F75F2, // Large 'kshiftr|q'. + 0x105F75F2, // Large 'kshiftr|w'. 0x8549968B, // Small 'ktestb'. 0x8949968B, // Small 'ktestd'. 0xA349968B, // Small 'ktestq'. 0xAF49968B, // Small 'ktestw'. - 0x23446531, // Large 'kunpck|bw'. - 0x20C56531, // Large 'kunpck|dq'. - 0x23466531, // Large 'kunpck|wd'. + 0x239A65FA, // Large 'kunpck|bw'. + 0x20E565FA, // Large 'kunpck|dq'. + 0x239C65FA, // Large 'kunpck|wd'. 0x8527BB0B, // Small 'kxnorb'. 0x8927BB0B, // Small 'kxnord'. 0xA327BB0B, // Small 'kxnorq'. @@ -3217,9 +3341,9 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x8000482C, // Small 'lar'. 0x80C6046C, // Small 'lcall'. 0x8158908C, // Small 'lddqu'. - 0x1023657B, // Large 'ldmxcs|r'. + 0x1023664B, // Large 'ldmxcs|r'. 0x80004C8C, // Small 'lds'. - 0x1001838C, // Large 'ldtilecf|g'. + 0x10018412, // Large 'ldtilecf|g'. 0x800004AC, // Small 'lea'. 0x805B04AC, // Small 'leave'. 0x80004CAC, // Small 'les'. @@ -3242,61 +3366,61 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0xA6E4C2EC, // Small 'lwpins'. 0x981B42EC, // Small 'lwpval'. 0x81470F4C, // Small 'lzcnt'. - 0x107D91F9, // Large 'maskmovdq|u'. - 0x100F71F9, // Large 'maskmov|q'. + 0x109D9241, // Large 'maskmovdq|u'. + 0x100F7241, // Large 'maskmov|q'. 0x8048602D, // Small 'maxpd'. 0x8138602D, // Small 'maxps'. 0x8049E02D, // Small 'maxsd'. 0x8139E02D, // Small 'maxss'. - 0x2157567F, // Large 'mcomm|it'. + 0x21925760, // Large 'mcomm|it'. 0x8A3714CD, // Small 'mfence'. 0x8048392D, // Small 'minpd'. 0x8138392D, // Small 'minps'. 0x8049B92D, // Small 'minsd'. 0x8139B92D, // Small 'minss'. - 0x00007537, // Large 'monitor'. - 0x102E7537, // Large 'monitor|x'. + 0x00007600, // Large 'monitor'. + 0x102E7600, // Large 'monitor|x'. 0x800059ED, // Small 'mov'. 0xA620D9ED, // Small 'movabs'. 0x8900D9ED, // Small 'movapd'. 0xA700D9ED, // Small 'movaps'. 0x805159ED, // Small 'movbe'. 0x800259ED, // Small 'movd'. - 0x358741FD, // Large 'movd|dup'. - 0x10108394, // Large 'movdir64|b'. - 0x10096394, // Large 'movdir|i'. - 0x25BD51FD, // Large 'movdq|2q'. + 0x36574245, // Large 'movd|dup'. + 0x1010841A, // Large 'movdir64|b'. + 0x1009641A, // Large 'movdir|i'. + 0x268F5245, // Large 'movdq|2q'. 0x831259ED, // Small 'movdqa'. 0xAB1259ED, // Small 'movdqu'. - 0x34ED458D, // Large 'movh|lps'. + 0x359A465D, // Large 'movh|lps'. 0x890459ED, // Small 'movhpd'. 0xA70459ED, // Small 'movhps'. - 0x20705592, // Large 'movlh|ps'. + 0x207D5662, // Large 'movlh|ps'. 0x890659ED, // Small 'movlpd'. 0xA70659ED, // Small 'movlps'. - 0x20876443, // Large 'movmsk|pd'. - 0x20706443, // Large 'movmsk|ps'. - 0x20C5544A, // Large 'movnt|dq'. - 0x3436544A, // Large 'movnt|dqa'. + 0x20A764D0, // Large 'movmsk|pd'. + 0x207D64D0, // Large 'movmsk|ps'. + 0x20E554D7, // Large 'movnt|dq'. + 0x34C354D7, // Large 'movnt|dqa'. 0x934759ED, // Small 'movnti'. - 0x2087544A, // Large 'movnt|pd'. - 0x2070544A, // Large 'movnt|ps'. + 0x20A754D7, // Large 'movnt|pd'. + 0x207D54D7, // Large 'movnt|ps'. 0xA34759ED, // Small 'movntq'. - 0x210E544A, // Large 'movnt|sd'. - 0x201C544A, // Large 'movnt|ss'. + 0x214454D7, // Large 'movnt|sd'. + 0x201C54D7, // Large 'movnt|ss'. 0x8008D9ED, // Small 'movq'. - 0x20C55684, // Large 'movq2|dq'. + 0x20E55765, // Large 'movq2|dq'. 0x8009D9ED, // Small 'movs'. 0x8049D9ED, // Small 'movsd'. - 0x21E16450, // Large 'movshd|up'. - 0x21E16457, // Large 'movsld|up'. + 0x222964DD, // Large 'movshd|up'. + 0x222964E4, // Large 'movsld|up'. 0x8139D9ED, // Small 'movss'. 0x8189D9ED, // Small 'movsx'. 0x8989D9ED, // Small 'movsxd'. 0x890AD9ED, // Small 'movupd'. 0xA70AD9ED, // Small 'movups'. 0x818D59ED, // Small 'movzx'. - 0x23445598, // Large 'mpsad|bw'. + 0x239A5668, // Large 'mpsad|bw'. 0x800032AD, // Small 'mul'. 0x804832AD, // Small 'mulpd'. 0x813832AD, // Small 'mulps'. @@ -3316,41 +3440,41 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x80298830, // Small 'pabsb'. 0x80498830, // Small 'pabsd'. 0x81798830, // Small 'pabsw'. - 0x0000845E, // Large 'packssdw'. - 0x2465645E, // Large 'packss|wb'. - 0x24646468, // Large 'packus|dw'. - 0x00008468, // Large 'packuswb'. + 0x000084EB, // Large 'packssdw'. + 0x24F264EB, // Large 'packss|wb'. + 0x24F164F5, // Large 'packus|dw'. + 0x000084F5, // Large 'packuswb'. 0x80221030, // Small 'paddb'. 0x80421030, // Small 'paddd'. 0x81121030, // Small 'paddq'. 0x85321030, // Small 'paddsb'. 0xAF321030, // Small 'paddsw'. - 0x250D55A5, // Large 'paddu|sb'. - 0x232D55A5, // Large 'paddu|sw'. + 0x25BA5675, // Large 'paddu|sb'. + 0x23835675, // Large 'paddu|sw'. 0x81721030, // Small 'paddw'. - 0x102365AB, // Large 'palign|r'. + 0x1023667B, // Large 'palign|r'. 0x80023830, // Small 'pand'. 0x80E23830, // Small 'pandn'. 0x8059D430, // Small 'pause'. 0x8023D830, // Small 'pavgb'. - 0x250D5689, // Large 'pavgu|sb'. + 0x25BA576A, // Large 'pavgu|sb'. 0x8173D830, // Small 'pavgw'. - 0x20216471, // Large 'pblend|vb'. - 0x105F6471, // Large 'pblend|w'. - 0x424052EF, // Large 'pclmu|lqdq'. - 0x200F52F5, // Large 'pcmpe|qb'. - 0x223552F5, // Large 'pcmpe|qd'. - 0x21AE52F5, // Large 'pcmpe|qq'. - 0x24BB52F5, // Large 'pcmpe|qw'. - 0x100982F5, // Large 'pcmpestr|i'. - 0x105C82F5, // Large 'pcmpestr|m'. - 0x35B14255, // Large 'pcmp|gtb'. - 0x35B44255, // Large 'pcmp|gtd'. - 0x35B74255, // Large 'pcmp|gtq'. - 0x35BA4255, // Large 'pcmp|gtw'. - 0x100982FE, // Large 'pcmpistr|i'. - 0x105C82FE, // Large 'pcmpistr|m'. - 0x25AE520D, // Large 'pconf|ig'. + 0x202164FE, // Large 'pblend|vb'. + 0x105F64FE, // Large 'pblend|w'. + 0x42885345, // Large 'pclmu|lqdq'. + 0x200F534B, // Large 'pcmpe|qb'. + 0x227D534B, // Large 'pcmpe|qd'. + 0x21F6534B, // Large 'pcmpe|qq'. + 0x2559534B, // Large 'pcmpe|qw'. + 0x1009834B, // Large 'pcmpestr|i'. + 0x105C834B, // Large 'pcmpestr|m'. + 0x368142A5, // Large 'pcmp|gtb'. + 0x368442A5, // Large 'pcmp|gtd'. + 0x368742A5, // Large 'pcmp|gtq'. + 0x368A42A5, // Large 'pcmp|gtw'. + 0x10098354, // Large 'pcmpistr|i'. + 0x105C8354, // Large 'pcmpistr|m'. + 0x267E5255, // Large 'pconf|ig'. 0x80081490, // Small 'pdep'. 0x800A60B0, // Small 'pext'. 0x852A60B0, // Small 'pextrb'. @@ -3361,29 +3485,29 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x8174F4D0, // Small 'pf2iw'. 0x803184D0, // Small 'pfacc'. 0x804204D0, // Small 'pfadd'. - 0x100F668E, // Large 'pfcmpe|q'. - 0x2018568E, // Large 'pfcmp|ge'. - 0x25B1568E, // Large 'pfcmp|gt'. + 0x100F676F, // Large 'pfcmpe|q'. + 0x2018576F, // Large 'pfcmp|ge'. + 0x2681576F, // Large 'pfcmp|gt'. 0x8180B4D0, // Small 'pfmax'. 0x80E4B4D0, // Small 'pfmin'. 0x80CAB4D0, // Small 'pfmul'. 0x8630B8D0, // Small 'pfnacc'. - 0x24245694, // Large 'pfpna|cc'. + 0x24B15775, // Large 'pfpna|cc'. 0x8101C8D0, // Small 'pfrcp'. - 0x2165653E, // Large 'pfrcpi|t1'. - 0x2261653E, // Large 'pfrcpi|t2'. + 0x21AD6607, // Large 'pfrcpi|t1'. + 0x22BF6607, // Large 'pfrcpi|t2'. 0xAD01C8D0, // Small 'pfrcpv'. - 0x21656544, // Large 'pfrsqi|t1'. - 0x214D5544, // Large 'pfrsq|rt'. - 0x354A5544, // Large 'pfrsq|rtv'. + 0x21AD660D, // Large 'pfrsqi|t1'. + 0x2188560D, // Large 'pfrsq|rt'. + 0x3613560D, // Large 'pfrsq|rtv'. 0x802ACCD0, // Small 'pfsub'. 0xA42ACCD0, // Small 'pfsubr'. 0x88420510, // Small 'phaddd'. - 0x232D5498, // Large 'phadd|sw'. + 0x23835536, // Large 'phadd|sw'. 0xAE420510, // Small 'phaddw'. - 0x105F9217, // Large 'phminposu|w'. + 0x105F925F, // Large 'phminposu|w'. 0x882ACD10, // Small 'phsubd'. - 0x232D55C4, // Large 'phsub|sw'. + 0x23835696, // Large 'phsub|sw'. 0xAE2ACD10, // Small 'phsubw'. 0x80437530, // Small 'pi2fd'. 0x81737530, // Small 'pi2fw'. @@ -3391,8 +3515,8 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x8929B930, // Small 'pinsrd'. 0xA329B930, // Small 'pinsrq'. 0xAF29B930, // Small 'pinsrw'. - 0x432F5221, // Large 'pmadd|ubsw'. - 0x23465221, // Large 'pmadd|wd'. + 0x43855269, // Large 'pmadd|ubsw'. + 0x239C5269, // Large 'pmadd|wd'. 0x853C05B0, // Small 'pmaxsb'. 0x893C05B0, // Small 'pmaxsd'. 0xAF3C05B0, // Small 'pmaxsw'. @@ -3405,27 +3529,27 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x855725B0, // Small 'pminub'. 0x895725B0, // Small 'pminud'. 0xAF5725B0, // Small 'pminuw'. - 0x101074A5, // Large 'pmovmsk|b'. - 0x102674AD, // Large 'pmovsxb|d'. - 0x100F74AD, // Large 'pmovsxb|q'. - 0x105F74AD, // Large 'pmovsxb|w'. - 0x20C564AD, // Large 'pmovsx|dq'. - 0x234664AD, // Large 'pmovsx|wd'. - 0x249F64AD, // Large 'pmovsx|wq'. - 0x102674BE, // Large 'pmovzxb|d'. - 0x100F74BE, // Large 'pmovzxb|q'. - 0x105F74BE, // Large 'pmovzxb|w'. - 0x20C564BE, // Large 'pmovzx|dq'. - 0x234664BE, // Large 'pmovzx|wd'. - 0x249F64BE, // Large 'pmovzx|wq'. + 0x10107543, // Large 'pmovmsk|b'. + 0x1026754B, // Large 'pmovsxb|d'. + 0x100F754B, // Large 'pmovsxb|q'. + 0x105F754B, // Large 'pmovsxb|w'. + 0x20E5654B, // Large 'pmovsx|dq'. + 0x239C654B, // Large 'pmovsx|wd'. + 0x253D654B, // Large 'pmovsx|wq'. + 0x1026755C, // Large 'pmovzxb|d'. + 0x100F755C, // Large 'pmovzxb|q'. + 0x105F755C, // Large 'pmovzxb|w'. + 0x20E5655C, // Large 'pmovzx|dq'. + 0x239C655C, // Large 'pmovzx|wd'. + 0x253D655C, // Large 'pmovzx|wq'. 0xA24655B0, // Small 'pmuldq'. - 0x232D64C6, // Large 'pmulhr|sw'. - 0x105F64C6, // Large 'pmulhr|w'. - 0x23F454C6, // Large 'pmulh|uw'. + 0x23836564, // Large 'pmulhr|sw'. + 0x105F6564, // Large 'pmulhr|w'. + 0x24815564, // Large 'pmulh|uw'. 0xAE8655B0, // Small 'pmulhw'. 0x88C655B0, // Small 'pmulld'. 0xAEC655B0, // Small 'pmullw'. - 0x328F40AF, // Large 'pmul|udq'. + 0x32E540CF, // Large 'pmul|udq'. 0x800041F0, // Small 'pop'. 0x8000C1F0, // Small 'popa'. 0x8040C1F0, // Small 'popad'. @@ -3434,18 +3558,20 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x804341F0, // Small 'popfd'. 0x811341F0, // Small 'popfq'. 0x800049F0, // Small 'por'. - 0x0000815A, // Large 'prefetch'. - 0x1006A15A, // Large 'prefetchnt|a'. - 0x225F815A, // Large 'prefetch|t0'. - 0x2165815A, // Large 'prefetch|t1'. - 0x2261815A, // Large 'prefetch|t2'. - 0x105F815A, // Large 'prefetch|w'. - 0x3164815A, // Large 'prefetch|wt1'. + 0x0000819F, // Large 'prefetch'. + 0x10E4A19F, // Large 'prefetchit|0'. + 0x106BA19F, // Large 'prefetchit|1'. + 0x31A9819F, // Large 'prefetch|nta'. + 0x22BD819F, // Large 'prefetch|t0'. + 0x21AD819F, // Large 'prefetch|t1'. + 0x22BF819F, // Large 'prefetch|t2'. + 0x105F819F, // Large 'prefetch|w'. + 0x31AC819F, // Large 'prefetch|wt1'. 0xAE220670, // Small 'psadbw'. 0x846AA270, // Small 'pshufb'. 0x886AA270, // Small 'pshufd'. - 0x25F15151, // Large 'pshuf|hw'. - 0x234E5151, // Large 'pshuf|lw'. + 0x26C3518C, // Large 'pshuf|hw'. + 0x23A4518C, // Large 'pshuf|lw'. 0xAE6AA270, // Small 'pshufw'. 0x84E3A670, // Small 'psignb'. 0x88E3A670, // Small 'psignd'. @@ -3466,34 +3592,34 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x81115670, // Small 'psubq'. 0x85315670, // Small 'psubsb'. 0xAF315670, // Small 'psubsw'. - 0x250D55F4, // Large 'psubu|sb'. - 0x232D55F4, // Large 'psubu|sw'. + 0x25BA56C6, // Large 'psubu|sb'. + 0x238356C6, // Large 'psubu|sw'. 0x81715670, // Small 'psubw'. 0x8900DE70, // Small 'pswapd'. 0x81499690, // Small 'ptest'. - 0x20BF5699, // Large 'ptwri|te'. - 0x23447238, // Large 'punpckh|bw'. - 0x20C57238, // Large 'punpckh|dq'. - 0x20C58238, // Large 'punpckhq|dq'. - 0x23467238, // Large 'punpckh|wd'. - 0x33486238, // Large 'punpck|lbw'. - 0x334B6238, // Large 'punpck|ldq'. - 0x42406238, // Large 'punpck|lqdq'. - 0x334E6238, // Large 'punpck|lwd'. + 0x20DF577A, // Large 'ptwri|te'. + 0x239A7280, // Large 'punpckh|bw'. + 0x20E57280, // Large 'punpckh|dq'. + 0x20E58280, // Large 'punpckhq|dq'. + 0x239C7280, // Large 'punpckh|wd'. + 0x339E6280, // Large 'punpck|lbw'. + 0x33A16280, // Large 'punpck|ldq'. + 0x42886280, // Large 'punpck|lqdq'. + 0x33A46280, // Large 'punpck|lwd'. 0x80044EB0, // Small 'push'. 0x80144EB0, // Small 'pusha'. 0x88144EB0, // Small 'pushad'. 0x80644EB0, // Small 'pushf'. 0x88644EB0, // Small 'pushfd'. 0xA2644EB0, // Small 'pushfq'. - 0x20BF739C, // Large 'pvalida|te'. + 0x20DF7422, // Large 'pvalida|te'. 0x80093F10, // Small 'pxor'. 0x80003072, // Small 'rcl'. 0x81384072, // Small 'rcpps'. 0x8139C072, // Small 'rcpss'. 0x80004872, // Small 'rcr'. - 0x33B0554D, // Large 'rdfsb|ase'. - 0x33B05552, // Large 'rdgsb|ase'. + 0x34365616, // Large 'rdfsb|ase'. + 0x3436561B, // Large 'rdgsb|ase'. 0x8129B492, // Small 'rdmsr'. 0x8044C092, // Small 'rdpid'. 0xAB25C092, // Small 'rdpkru'. @@ -3507,28 +3633,31 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0xA039D092, // Small 'rdtscp'. 0x800050B2, // Small 'ret'. 0x800350B2, // Small 'retf'. - 0x201F73A3, // Large 'rmpadju|st'. - 0x20BF73AA, // Large 'rmpupda|te'. + 0x201F7429, // Large 'rmpadju|st'. + 0x20DF7430, // Large 'rmpupda|te'. 0x800031F2, // Small 'rol'. 0x800049F2, // Small 'ror'. 0x800C49F2, // Small 'rorx'. - 0x20875606, // Large 'round|pd'. - 0x20705606, // Large 'round|ps'. - 0x00007606, // Large 'roundsd'. - 0x10146606, // Large 'rounds|s'. + 0x20A756D8, // Large 'round|pd'. + 0x207D56D8, // Large 'round|ps'. + 0x000076D8, // Large 'roundsd'. + 0x101466D8, // Large 'rounds|s'. 0x80003672, // Small 'rsm'. - 0x20705352, // Large 'rsqrt|ps'. - 0x201C5352, // Large 'rsqrt|ss'. - 0x35575387, // Large 'rstor|ssp'. + 0x207D53A8, // Large 'rsqrt|ps'. + 0x201C53A8, // Large 'rsqrt|ss'. + 0x3620540D, // Large 'rstor|ssp'. 0x80032033, // Small 'sahf'. 0x80003033, // Small 'sal'. 0x80004833, // Small 'sar'. 0x800C4833, // Small 'sarx'. - 0x1004A167, // Large 'saveprevss|p'. + 0x1004A1AF, // Large 'saveprevss|p'. 0x80000853, // Small 'sbb'. 0x80098473, // Small 'scas'. - 0x21E2655A, // Large 'sendui|pi'. - 0x237573B1, // Large 'seriali|ze'. + 0x10D27623, // Large 'seamcal|l'. + 0x207D577F, // Large 'seamo|ps'. + 0x21A35784, // Large 'seamr|et'. + 0x222A662A, // Large 'sendui|pi'. + 0x23CB7437, // Large 'seriali|ze'. 0x8000D0B3, // Small 'seta'. 0x8050D0B3, // Small 'setae'. 0x800150B3, // Small 'setb'. @@ -3558,17 +3687,17 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x805850B3, // Small 'setpe'. 0x80F850B3, // Small 'setpo'. 0x8009D0B3, // Small 'sets'. - 0x10177560, // Large 'setssbs|y'. + 0x10177630, // Large 'setssbs|y'. 0x800D50B3, // Small 'setz'. 0x8A3714D3, // Small 'sfence'. 0x800A10F3, // Small 'sgdt'. - 0x426343B8, // Large 'sha1|msg1'. - 0x426743B8, // Large 'sha1|msg2'. - 0x20BF73B8, // Large 'sha1nex|te'. - 0x102F83BF, // Large 'sha1rnds|4'. - 0x42636171, // Large 'sha256|msg1'. - 0x42676171, // Large 'sha256|msg2'. - 0x20719171, // Large 'sha256rnd|s2'. + 0x4295443E, // Large 'sha1|msg1'. + 0x4299443E, // Large 'sha1|msg2'. + 0x20DF743E, // Large 'sha1nex|te'. + 0x102F8445, // Large 'sha1rnds|4'. + 0x429561B9, // Large 'sha256|msg1'. + 0x429961B9, // Large 'sha256|msg2'. + 0x207E91B9, // Large 'sha256rnd|s2'. 0x80003113, // Small 'shl'. 0x80023113, // Small 'shld'. 0x800C3113, // Small 'shlx'. @@ -3591,10 +3720,10 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x80001293, // Small 'std'. 0x80049E93, // Small 'stgi'. 0x80002693, // Small 'sti'. - 0x1023660E, // Large 'stmxcs|r'. + 0x102366E7, // Large 'stmxcs|r'. 0x8009BE93, // Small 'stos'. 0x80004A93, // Small 'str'. - 0x100183C7, // Large 'sttilecf|g'. + 0x1001844D, // Large 'sttilecf|g'. 0x8004D693, // Small 'stui'. 0x80000AB3, // Small 'sub'. 0x80480AB3, // Small 'subpd'. @@ -3602,83 +3731,90 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x80498AB3, // Small 'subsd'. 0x81398AB3, // Small 'subss'. 0xA67806F3, // Small 'swapgs'. - 0x361A469E, // Large 'sysc|all'. - 0x41064567, // Large 'syse|nter'. - 0x2157556B, // Large 'sysex|it'. - 0x3157556B, // Large 'sysex|itq'. + 0x36F34789, // Large 'sysc|all'. + 0x41234637, // Large 'syse|nter'. + 0x2192563B, // Large 'sysex|it'. + 0x3192563B, // Large 'sysex|itq'. 0xA8594F33, // Small 'sysret'. - 0x215856A2, // Large 'sysre|tq'. + 0x2193578D, // Large 'sysre|tq'. 0x86B9B794, // Small 't1mskc'. - 0x207073CF, // Large 'tdpbf16|ps'. - 0x332243CF, // Large 'tdpb|ssd'. - 0x328E43CF, // Large 'tdpb|sud'. - 0x210E56A7, // Large 'tdpbu|sd'. - 0x228F56A7, // Large 'tdpbu|ud'. + 0x207DA12B, // Large 'tcmmimfp16|ps'. + 0x207DA135, // Large 'tcmmrlfp16|ps'. + 0x98C08C94, // Small 'tdcall'. + 0x207D7455, // Large 'tdpbf16|ps'. + 0x31434455, // Large 'tdpb|ssd'. + 0x32E44455, // Large 'tdpb|sud'. + 0x21445792, // Large 'tdpbu|sd'. + 0x22E55792, // Large 'tdpbu|ud'. + 0x207D745C, // Large 'tdpfp16|ps'. 0x800A4CB4, // Small 'test'. 0x935A4CB4, // Small 'testui'. - 0x0000917A, // Large 'tileloadd'. - 0x2165917A, // Large 'tileloadd|t1'. - 0x210A9183, // Large 'tilerelea|se'. - 0x1026926B, // Large 'tilestore|d'. - 0x4375417A, // Large 'tile|zero'. + 0x000091C2, // Large 'tileloadd'. + 0x21AD91C2, // Large 'tileloadd|t1'. + 0x212791CB, // Large 'tilerelea|se'. + 0x102692C1, // Large 'tilestore|d'. + 0x43CB41C2, // Large 'tile|zero'. + 0x21E15797, // Large 'tlbsy|nc'. 0x8B3A8614, // Small 'tpause'. 0x81470F54, // Small 'tzcnt'. 0x80B9B754, // Small 'tzmsk'. - 0x210E5615, // Large 'ucomi|sd'. - 0x201C5615, // Large 'ucomi|ss'. + 0x214456EE, // Large 'ucomi|sd'. + 0x201C56EE, // Large 'ucomi|ss'. 0x80006C95, // Small 'ud0'. 0x80007095, // Small 'ud1'. 0x80007495, // Small 'ud2'. 0x8142C935, // Small 'uiret'. - 0x7537107D, // Large 'u|monitor'. + 0x7600109D, // Large 'u|monitor'. 0xA890DDB5, // Small 'umwait'. - 0x20876239, // Large 'unpckh|pd'. - 0x20706239, // Large 'unpckh|ps'. - 0x34EA5239, // Large 'unpck|lpd'. - 0x34ED5239, // Large 'unpck|lps'. - 0x30D163D6, // Large 'v4fmad|dps'. - 0x327B63D6, // Large 'v4fmad|dss'. - 0x30D17274, // Large 'v4fnmad|dps'. - 0x327B7274, // Large 'v4fnmad|dss'. + 0x20A76281, // Large 'unpckh|pd'. + 0x207D6281, // Large 'unpckh|ps'. + 0x35975281, // Large 'unpck|lpd'. + 0x359A5281, // Large 'unpck|lps'. + 0x30F16463, // Large 'v4fmad|dps'. + 0x32D16463, // Large 'v4fmad|dss'. + 0x30F172CA, // Large 'v4fnmad|dps'. + 0x32D172CA, // Large 'v4fnmad|dss'. 0x89021036, // Small 'vaddpd'. 0x91021036, // Small 'vaddph'. 0xA7021036, // Small 'vaddps'. 0x89321036, // Small 'vaddsd'. 0x91321036, // Small 'vaddsh'. 0xA7321036, // Small 'vaddss'. - 0x208773DC, // Large 'vaddsub|pd'. - 0x207073DC, // Large 'vaddsub|ps'. - 0x0000718C, // Large 'vaesdec'. - 0x3028818C, // Large 'vaesdecl|ast'. - 0x00007194, // Large 'vaesenc'. - 0x30288194, // Large 'vaesencl|ast'. - 0x267F56AC, // Large 'vaesi|mc'. + 0x20A77469, // Large 'vaddsub|pd'. + 0x207D7469, // Large 'vaddsub|ps'. + 0x000071D4, // Large 'vaesdec'. + 0x302881D4, // Large 'vaesdecl|ast'. + 0x000071DC, // Large 'vaesenc'. + 0x302881DC, // Large 'vaesencl|ast'. + 0x2626579C, // Large 'vaesi|mc'. 0x1020F011, // Large 'vaeskeygenassis|t'. - 0x217856B1, // Large 'valig|nd'. - 0x264056B1, // Large 'valig|nq'. - 0x208756B6, // Large 'vandn|pd'. - 0x207056B6, // Large 'vandn|ps'. + 0x219D57A1, // Large 'valig|nd'. + 0x271E57A1, // Large 'valig|nq'. + 0x20A757A6, // Large 'vandn|pd'. + 0x207D57A6, // Large 'vandn|ps'. 0x89023836, // Small 'vandpd'. 0xA7023836, // Small 'vandps'. - 0x208773E3, // Large 'vblendm|pd'. - 0x207073E3, // Large 'vblendm|ps'. - 0x208763E3, // Large 'vblend|pd'. - 0x207063E3, // Large 'vblend|ps'. - 0x33EA63E3, // Large 'vblend|vpd'. - 0x315063E3, // Large 'vblend|vps'. - 0x3062B021, // Large 'vbroadcastf|128'. + 0x1014D062, // Large 'vbcstnebf162p|s'. + 0x513F7062, // Large 'vbcstne|sh2ps'. + 0x20A77470, // Large 'vblendm|pd'. + 0x207D7470, // Large 'vblendm|ps'. + 0x20A76470, // Large 'vblend|pd'. + 0x207D6470, // Large 'vblend|ps'. + 0x34776470, // Large 'vblend|vpd'. + 0x318B6470, // Large 'vblend|vps'. + 0x306FB021, // Large 'vbroadcastf|128'. 0x1003E021, // Large 'vbroadcastf32x|2'. 0x102FE021, // Large 'vbroadcastf32x|4'. 0x1005E021, // Large 'vbroadcastf32x|8'. 0x4030B021, // Large 'vbroadcastf|64x2'. 0x4034B021, // Large 'vbroadcastf|64x4'. - 0x4065A021, // Large 'vbroadcast|i128'. + 0x4072A021, // Large 'vbroadcast|i128'. 0x5038A021, // Large 'vbroadcast|i32x2'. 0x503DA021, // Large 'vbroadcast|i32x4'. 0x5042A021, // Large 'vbroadcast|i32x8'. 0x5047A021, // Large 'vbroadcast|i64x2'. 0x504CA021, // Large 'vbroadcast|i64x4'. - 0x210EA021, // Large 'vbroadcast|sd'. + 0x2144A021, // Large 'vbroadcast|sd'. 0x201CA021, // Large 'vbroadcast|ss'. 0x89083476, // Small 'vcmppd'. 0x91083476, // Small 'vcmpph'. @@ -3686,293 +3822,297 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x89383476, // Small 'vcmpsd'. 0x91383476, // Small 'vcmpsh'. 0xA7383476, // Small 'vcmpss'. - 0x210E56BB, // Large 'vcomi|sd'. - 0x20B556BB, // Large 'vcomi|sh'. - 0x201C56BB, // Large 'vcomi|ss'. - 0x2087919C, // Large 'vcompress|pd'. - 0x2070919C, // Large 'vcompress|ps'. - 0x208773ED, // Large 'vcvtdq2|pd'. - 0x208273ED, // Large 'vcvtdq2|ph'. - 0x207073ED, // Large 'vcvtdq2|ps'. - 0x1030D069, // Large 'vcvtne2ps2bf1|6'. - 0x1030C0DC, // Large 'vcvtneps2bf1|6'. - 0x20C5727E, // Large 'vcvtpd2|dq'. - 0x2082727E, // Large 'vcvtpd2|ph'. - 0x2070727E, // Large 'vcvtpd2|ps'. - 0x21AE727E, // Large 'vcvtpd2|qq'. - 0x20C5827E, // Large 'vcvtpd2u|dq'. - 0x21AE827E, // Large 'vcvtpd2u|qq'. - 0x20C57286, // Large 'vcvtph2|dq'. - 0x10268286, // Large 'vcvtph2p|d'. - 0x00009286, // Large 'vcvtph2ps'. - 0x102E9286, // Large 'vcvtph2ps|x'. - 0x21AE7286, // Large 'vcvtph2|qq'. - 0x328F7286, // Large 'vcvtph2|udq'. - 0x31AD7286, // Large 'vcvtph2|uqq'. - 0x23F47286, // Large 'vcvtph2|uw'. - 0x105F7286, // Large 'vcvtph2|w'. - 0x20C57292, // Large 'vcvtps2|dq'. - 0x10268292, // Large 'vcvtps2p|d'. - 0x00009292, // Large 'vcvtps2ph'. - 0x102E9292, // Large 'vcvtps2ph|x'. - 0x21AE7292, // Large 'vcvtps2|qq'. - 0x328F7292, // Large 'vcvtps2|udq'. - 0x31AD7292, // Large 'vcvtps2|uqq'. - 0x208773F6, // Large 'vcvtqq2|pd'. - 0x208273F6, // Large 'vcvtqq2|ph'. - 0x207073F6, // Large 'vcvtqq2|ps'. - 0x20B5729B, // Large 'vcvtsd2|sh'. - 0x201D729B, // Large 'vcvtsd2|si'. - 0x201C729B, // Large 'vcvtsd2|ss'. - 0x201D829B, // Large 'vcvtsd2u|si'. - 0x210E72A3, // Large 'vcvtsh2|sd'. - 0x201D72A3, // Large 'vcvtsh2|si'. - 0x201C72A3, // Large 'vcvtsh2|ss'. - 0x201D82A3, // Large 'vcvtsh2u|si'. - 0x210E73FD, // Large 'vcvtsi2|sd'. - 0x20B573FD, // Large 'vcvtsi2|sh'. - 0x201C73FD, // Large 'vcvtsi2|ss'. - 0x210E72AB, // Large 'vcvtss2|sd'. - 0x20B572AB, // Large 'vcvtss2|sh'. - 0x201D72AB, // Large 'vcvtss2|si'. - 0x201D82AB, // Large 'vcvtss2u|si'. - 0x20C581A5, // Large 'vcvttpd2|dq'. - 0x21AE81A5, // Large 'vcvttpd2|qq'. - 0x20C591A5, // Large 'vcvttpd2u|dq'. - 0x21AE91A5, // Large 'vcvttpd2u|qq'. - 0x20C581B0, // Large 'vcvttph2|dq'. - 0x21AE81B0, // Large 'vcvttph2|qq'. - 0x20C591B0, // Large 'vcvttph2u|dq'. - 0x21AE91B0, // Large 'vcvttph2u|qq'. - 0x105F91B0, // Large 'vcvttph2u|w'. - 0x105F81B0, // Large 'vcvttph2|w'. - 0x20C581B9, // Large 'vcvttps2|dq'. - 0x21AE81B9, // Large 'vcvttps2|qq'. - 0x20C591B9, // Large 'vcvttps2u|dq'. - 0x21AE91B9, // Large 'vcvttps2u|qq'. - 0x201D81C2, // Large 'vcvttsd2|si'. - 0x201D91C2, // Large 'vcvttsd2u|si'. - 0x201D81CB, // Large 'vcvttsh2|si'. - 0x201D91CB, // Large 'vcvttsh2u|si'. - 0x201D81D4, // Large 'vcvttss2|si'. - 0x201D91D4, // Large 'vcvttss2u|si'. - 0x208782B3, // Large 'vcvtudq2|pd'. - 0x208282B3, // Large 'vcvtudq2|ph'. - 0x207082B3, // Large 'vcvtudq2|ps'. - 0x208782BB, // Large 'vcvtuqq2|pd'. - 0x208282BB, // Large 'vcvtuqq2|ph'. - 0x207082BB, // Large 'vcvtuqq2|ps'. - 0x210E82C3, // Large 'vcvtusi2|sd'. - 0x20B582C3, // Large 'vcvtusi2|sh'. - 0x201C82C3, // Large 'vcvtusi2|ss'. - 0x30816404, // Large 'vcvtuw|2ph'. - 0x30815570, // Large 'vcvtw|2ph'. - 0x2344740A, // Large 'vdbpsad|bw'. + 0x214457AB, // Large 'vcomi|sd'. + 0x20D557AB, // Large 'vcomi|sh'. + 0x201C57AB, // Large 'vcomi|ss'. + 0x20A791E4, // Large 'vcompress|pd'. + 0x207D91E4, // Large 'vcompress|ps'. + 0x20A7747A, // Large 'vcvtdq2|pd'. + 0x20A2747A, // Large 'vcvtdq2|ph'. + 0x207D747A, // Large 'vcvtdq2|ps'. + 0x4069A076, // Large 'vcvtne2ps2|bf16'. + 0x307CB080, // Large 'vcvtneebf16|2ps'. + 0x51467080, // Large 'vcvtnee|ph2ps'. + 0x307CB08B, // Large 'vcvtneobf16|2ps'. + 0x5146708B, // Large 'vcvtneo|ph2ps'. + 0x406990FC, // Large 'vcvtneps2|bf16'. + 0x20E572D4, // Large 'vcvtpd2|dq'. + 0x20A272D4, // Large 'vcvtpd2|ph'. + 0x207D72D4, // Large 'vcvtpd2|ps'. + 0x21F672D4, // Large 'vcvtpd2|qq'. + 0x20E582D4, // Large 'vcvtpd2u|dq'. + 0x21F682D4, // Large 'vcvtpd2u|qq'. + 0x20E572DC, // Large 'vcvtph2|dq'. + 0x102682DC, // Large 'vcvtph2p|d'. + 0x000092DC, // Large 'vcvtph2ps'. + 0x102E92DC, // Large 'vcvtph2ps|x'. + 0x21F672DC, // Large 'vcvtph2|qq'. + 0x32E572DC, // Large 'vcvtph2|udq'. + 0x31F572DC, // Large 'vcvtph2|uqq'. + 0x248172DC, // Large 'vcvtph2|uw'. + 0x105F72DC, // Large 'vcvtph2|w'. + 0x20E572E8, // Large 'vcvtps2|dq'. + 0x102682E8, // Large 'vcvtps2p|d'. + 0x000092E8, // Large 'vcvtps2ph'. + 0x102E92E8, // Large 'vcvtps2ph|x'. + 0x21F672E8, // Large 'vcvtps2|qq'. + 0x32E572E8, // Large 'vcvtps2|udq'. + 0x31F572E8, // Large 'vcvtps2|uqq'. + 0x20A77483, // Large 'vcvtqq2|pd'. + 0x20A27483, // Large 'vcvtqq2|ph'. + 0x207D7483, // Large 'vcvtqq2|ps'. + 0x20D572F1, // Large 'vcvtsd2|sh'. + 0x201D72F1, // Large 'vcvtsd2|si'. + 0x201C72F1, // Large 'vcvtsd2|ss'. + 0x201D82F1, // Large 'vcvtsd2u|si'. + 0x214472F9, // Large 'vcvtsh2|sd'. + 0x201D72F9, // Large 'vcvtsh2|si'. + 0x201C72F9, // Large 'vcvtsh2|ss'. + 0x201D82F9, // Large 'vcvtsh2u|si'. + 0x2144748A, // Large 'vcvtsi2|sd'. + 0x20D5748A, // Large 'vcvtsi2|sh'. + 0x201C748A, // Large 'vcvtsi2|ss'. + 0x21447301, // Large 'vcvtss2|sd'. + 0x20D57301, // Large 'vcvtss2|sh'. + 0x201D7301, // Large 'vcvtss2|si'. + 0x201D8301, // Large 'vcvtss2u|si'. + 0x20E581ED, // Large 'vcvttpd2|dq'. + 0x21F681ED, // Large 'vcvttpd2|qq'. + 0x20E591ED, // Large 'vcvttpd2u|dq'. + 0x21F691ED, // Large 'vcvttpd2u|qq'. + 0x20E581F8, // Large 'vcvttph2|dq'. + 0x21F681F8, // Large 'vcvttph2|qq'. + 0x20E591F8, // Large 'vcvttph2u|dq'. + 0x21F691F8, // Large 'vcvttph2u|qq'. + 0x105F91F8, // Large 'vcvttph2u|w'. + 0x105F81F8, // Large 'vcvttph2|w'. + 0x20E58201, // Large 'vcvttps2|dq'. + 0x21F68201, // Large 'vcvttps2|qq'. + 0x20E59201, // Large 'vcvttps2u|dq'. + 0x21F69201, // Large 'vcvttps2u|qq'. + 0x201D820A, // Large 'vcvttsd2|si'. + 0x201D920A, // Large 'vcvttsd2u|si'. + 0x201D8213, // Large 'vcvttsh2|si'. + 0x201D9213, // Large 'vcvttsh2u|si'. + 0x201D821C, // Large 'vcvttss2|si'. + 0x201D921C, // Large 'vcvttss2u|si'. + 0x20A78309, // Large 'vcvtudq2|pd'. + 0x20A28309, // Large 'vcvtudq2|ph'. + 0x207D8309, // Large 'vcvtudq2|ps'. + 0x20A78311, // Large 'vcvtuqq2|pd'. + 0x20A28311, // Large 'vcvtuqq2|ph'. + 0x207D8311, // Large 'vcvtuqq2|ps'. + 0x21448319, // Large 'vcvtusi2|sd'. + 0x20D58319, // Large 'vcvtusi2|sh'. + 0x201C8319, // Large 'vcvtusi2|ss'. + 0x30A16491, // Large 'vcvtuw|2ph'. + 0x30A15640, // Large 'vcvtw|2ph'. + 0x239A7497, // Large 'vdbpsad|bw'. 0x890B2496, // Small 'vdivpd'. 0x910B2496, // Small 'vdivph'. 0xA70B2496, // Small 'vdivps'. 0x893B2496, // Small 'vdivsd'. 0x913B2496, // Small 'vdivsh'. 0xA73B2496, // Small 'vdivss'. - 0x20707411, // Large 'vdpbf16|ps'. + 0x207D749E, // Large 'vdpbf16|ps'. 0x80484096, // Small 'vdppd'. 0x81384096, // Small 'vdpps'. 0x800948B6, // Small 'verr'. 0x800BC8B6, // Small 'verw'. - 0x34874418, // Large 'vexp|2pd'. - 0x306F4418, // Large 'vexp|2ps'. - 0x30CD6418, // Large 'vexpan|dpd'. - 0x30D16418, // Large 'vexpan|dps'. - 0x306290EF, // Large 'vextractf|128'. - 0x602A70E8, // Large 'vextrac|tf32x4'. - 0x404390EF, // Large 'vextractf|32x8'. - 0x403090EF, // Large 'vextractf|64x2'. - 0x403490EF, // Large 'vextractf|64x4'. - 0x406580EF, // Large 'vextract|i128'. - 0x503D80EF, // Large 'vextract|i32x4'. - 0x504280EF, // Large 'vextract|i32x8'. - 0x504780EF, // Large 'vextract|i64x2'. - 0x504C80EF, // Large 'vextract|i64x4'. - 0x207080EF, // Large 'vextract|ps'. - 0x208282CB, // Large 'vfcmaddc|ph'. - 0x20B582CB, // Large 'vfcmaddc|sh'. - 0x2082741E, // Large 'vfcmulc|ph'. - 0x20B5741E, // Large 'vfcmulc|sh'. - 0x208791DD, // Large 'vfixupimm|pd'. - 0x207091DD, // Large 'vfixupimm|ps'. - 0x210E91DD, // Large 'vfixupimm|sd'. - 0x201C91DD, // Large 'vfixupimm|ss'. - 0x208791E6, // Large 'vfmadd132|pd'. - 0x208291E6, // Large 'vfmadd132|ph'. - 0x207091E6, // Large 'vfmadd132|ps'. - 0x210E91E6, // Large 'vfmadd132|sd'. - 0x20B591E6, // Large 'vfmadd132|sh'. - 0x201C91E6, // Large 'vfmadd132|ss'. - 0x50846076, // Large 'vfmadd|213pd'. - 0x50896076, // Large 'vfmadd|213ph'. - 0x508E6076, // Large 'vfmadd|213ps'. - 0x511A6076, // Large 'vfmadd|213sd'. - 0x511F6076, // Large 'vfmadd|213sh'. - 0x51246076, // Large 'vfmadd|213ss'. - 0x50936076, // Large 'vfmadd|231pd'. - 0x50986076, // Large 'vfmadd|231ph'. - 0x509D6076, // Large 'vfmadd|231ps'. - 0x51296076, // Large 'vfmadd|231sd'. - 0x512E6076, // Large 'vfmadd|231sh'. - 0x51336076, // Large 'vfmadd|231ss'. - 0x34256076, // Large 'vfmadd|cph'. - 0x34286076, // Large 'vfmadd|csh'. - 0x20876076, // Large 'vfmadd|pd'. - 0x20706076, // Large 'vfmadd|ps'. - 0x10267076, // Large 'vfmadds|d'. - 0x10147076, // Large 'vfmadds|s'. - 0x1026D076, // Large 'vfmaddsub132p|d'. - 0x1083D076, // Large 'vfmaddsub132p|h'. - 0x1014D076, // Large 'vfmaddsub132p|s'. - 0x50849076, // Large 'vfmaddsub|213pd'. - 0x50899076, // Large 'vfmaddsub|213ph'. - 0x508E9076, // Large 'vfmaddsub|213ps'. - 0x50939076, // Large 'vfmaddsub|231pd'. - 0x50989076, // Large 'vfmaddsub|231ph'. - 0x509D9076, // Large 'vfmaddsub|231ps'. - 0x20879076, // Large 'vfmaddsub|pd'. - 0x20709076, // Large 'vfmaddsub|ps'. - 0x208791EF, // Large 'vfmsub132|pd'. - 0x208291EF, // Large 'vfmsub132|ph'. - 0x207091EF, // Large 'vfmsub132|ps'. - 0x210E91EF, // Large 'vfmsub132|sd'. - 0x20B591EF, // Large 'vfmsub132|sh'. - 0x201C91EF, // Large 'vfmsub132|ss'. - 0x508460A2, // Large 'vfmsub|213pd'. - 0x508960A2, // Large 'vfmsub|213ph'. - 0x508E60A2, // Large 'vfmsub|213ps'. - 0x511A60A2, // Large 'vfmsub|213sd'. - 0x511F60A2, // Large 'vfmsub|213sh'. - 0x512460A2, // Large 'vfmsub|213ss'. - 0x509360A2, // Large 'vfmsub|231pd'. - 0x509860A2, // Large 'vfmsub|231ph'. - 0x509D60A2, // Large 'vfmsub|231ps'. - 0x512960A2, // Large 'vfmsub|231sd'. - 0x512E60A2, // Large 'vfmsub|231sh'. - 0x513360A2, // Large 'vfmsub|231ss'. - 0x2087C0A2, // Large 'vfmsubadd132|pd'. - 0x2082C0A2, // Large 'vfmsubadd132|ph'. - 0x2070C0A2, // Large 'vfmsubadd132|ps'. - 0x508490A2, // Large 'vfmsubadd|213pd'. - 0x508990A2, // Large 'vfmsubadd|213ph'. - 0x508E90A2, // Large 'vfmsubadd|213ps'. - 0x509390A2, // Large 'vfmsubadd|231pd'. - 0x509890A2, // Large 'vfmsubadd|231ph'. - 0x509D90A2, // Large 'vfmsubadd|231ps'. - 0x208790A2, // Large 'vfmsubadd|pd'. - 0x207090A2, // Large 'vfmsubadd|ps'. - 0x208760A2, // Large 'vfmsub|pd'. - 0x207060A2, // Large 'vfmsub|ps'. - 0x210E60A2, // Large 'vfmsub|sd'. - 0x201C60A2, // Large 'vfmsub|ss'. - 0x34255575, // Large 'vfmul|cph'. - 0x34285575, // Large 'vfmul|csh'. - 0x2087A110, // Large 'vfnmadd132|pd'. - 0x2082A110, // Large 'vfnmadd132|ph'. - 0x2070A110, // Large 'vfnmadd132|ps'. - 0x210EA110, // Large 'vfnmadd132|sd'. - 0x20B5A110, // Large 'vfnmadd132|sh'. - 0x201CA110, // Large 'vfnmadd132|ss'. - 0x50847110, // Large 'vfnmadd|213pd'. - 0x50897110, // Large 'vfnmadd|213ph'. - 0x508E7110, // Large 'vfnmadd|213ps'. - 0x511A7110, // Large 'vfnmadd|213sd'. - 0x511F7110, // Large 'vfnmadd|213sh'. - 0x51247110, // Large 'vfnmadd|213ss'. - 0x50937110, // Large 'vfnmadd|231pd'. - 0x50987110, // Large 'vfnmadd|231ph'. - 0x509D7110, // Large 'vfnmadd|231ps'. - 0x51297110, // Large 'vfnmadd|231sd'. - 0x512E7110, // Large 'vfnmadd|231sh'. - 0x51337110, // Large 'vfnmadd|231ss'. - 0x20877110, // Large 'vfnmadd|pd'. - 0x20707110, // Large 'vfnmadd|ps'. - 0x210E7110, // Large 'vfnmadd|sd'. - 0x201C7110, // Large 'vfnmadd|ss'. - 0x2087A138, // Large 'vfnmsub132|pd'. - 0x2082A138, // Large 'vfnmsub132|ph'. - 0x2070A138, // Large 'vfnmsub132|ps'. - 0x210EA138, // Large 'vfnmsub132|sd'. - 0x20B5A138, // Large 'vfnmsub132|sh'. - 0x201CA138, // Large 'vfnmsub132|ss'. - 0x50847138, // Large 'vfnmsub|213pd'. - 0x50897138, // Large 'vfnmsub|213ph'. - 0x508E7138, // Large 'vfnmsub|213ps'. - 0x511A7138, // Large 'vfnmsub|213sd'. - 0x511F7138, // Large 'vfnmsub|213sh'. - 0x51247138, // Large 'vfnmsub|213ss'. - 0x50937138, // Large 'vfnmsub|231pd'. - 0x50987138, // Large 'vfnmsub|231ph'. - 0x509D7138, // Large 'vfnmsub|231ps'. - 0x51297138, // Large 'vfnmsub|231sd'. - 0x512E7138, // Large 'vfnmsub|231sh'. - 0x51337138, // Large 'vfnmsub|231ss'. - 0x20877138, // Large 'vfnmsub|pd'. - 0x20707138, // Large 'vfnmsub|ps'. - 0x210E7138, // Large 'vfnmsub|sd'. - 0x201C7138, // Large 'vfnmsub|ss'. - 0x208782D3, // Large 'vfpclass|pd'. - 0x208282D3, // Large 'vfpclass|ph'. - 0x207082D3, // Large 'vfpclass|ps'. - 0x210E82D3, // Large 'vfpclass|sd'. - 0x20B582D3, // Large 'vfpclass|sh'. - 0x201C82D3, // Large 'vfpclass|ss'. - 0x208756C0, // Large 'vfrcz|pd'. - 0x207056C0, // Large 'vfrcz|ps'. - 0x210E56C0, // Large 'vfrcz|sd'. - 0x201C56C0, // Large 'vfrcz|ss'. - 0x30CD70F8, // Large 'vgather|dpd'. - 0x30D170F8, // Large 'vgather|dps'. - 0x30CDA0F8, // Large 'vgatherpf0|dpd'. - 0x30D1A0F8, // Large 'vgatherpf0|dps'. - 0x30C6A0F8, // Large 'vgatherpf0|qpd'. - 0x30C9A0F8, // Large 'vgatherpf0|qps'. - 0x40CC90F8, // Large 'vgatherpf|1dpd'. - 0x40D090F8, // Large 'vgatherpf|1dps'. - 0x40D490F8, // Large 'vgatherpf|1qpd'. - 0x40D890F8, // Large 'vgatherpf|1qps'. - 0x30C670F8, // Large 'vgather|qpd'. - 0x30C970F8, // Large 'vgather|qps'. - 0x2087742B, // Large 'vgetexp|pd'. - 0x2082742B, // Large 'vgetexp|ph'. - 0x2070742B, // Large 'vgetexp|ps'. - 0x210E742B, // Large 'vgetexp|sd'. - 0x20B5742B, // Large 'vgetexp|sh'. - 0x201C742B, // Large 'vgetexp|ss'. - 0x31A972DB, // Large 'vgetman|tpd'. - 0x31B472DB, // Large 'vgetman|tph'. - 0x31BD72DB, // Large 'vgetman|tps'. - 0x310D72DB, // Large 'vgetman|tsd'. - 0x31CF72DB, // Large 'vgetman|tsh'. - 0x31D872DB, // Large 'vgetman|tss'. + 0x352544A5, // Large 'vexp|2pd'. + 0x307C44A5, // Large 'vexp|2ps'. + 0x30ED64A5, // Large 'vexpan|dpd'. + 0x30F164A5, // Large 'vexpan|dps'. + 0x306F910C, // Large 'vextractf|128'. + 0x602A7105, // Large 'vextrac|tf32x4'. + 0x4043910C, // Large 'vextractf|32x8'. + 0x4030910C, // Large 'vextractf|64x2'. + 0x4034910C, // Large 'vextractf|64x4'. + 0x4072810C, // Large 'vextract|i128'. + 0x503D810C, // Large 'vextract|i32x4'. + 0x5042810C, // Large 'vextract|i32x8'. + 0x5047810C, // Large 'vextract|i64x2'. + 0x504C810C, // Large 'vextract|i64x4'. + 0x207D810C, // Large 'vextract|ps'. + 0x20A28321, // Large 'vfcmaddc|ph'. + 0x20D58321, // Large 'vfcmaddc|sh'. + 0x20A274AB, // Large 'vfcmulc|ph'. + 0x20D574AB, // Large 'vfcmulc|sh'. + 0x20A79225, // Large 'vfixupimm|pd'. + 0x207D9225, // Large 'vfixupimm|ps'. + 0x21449225, // Large 'vfixupimm|sd'. + 0x201C9225, // Large 'vfixupimm|ss'. + 0x20A7922E, // Large 'vfmadd132|pd'. + 0x20A2922E, // Large 'vfmadd132|ph'. + 0x207D922E, // Large 'vfmadd132|ps'. + 0x2144922E, // Large 'vfmadd132|sd'. + 0x20D5922E, // Large 'vfmadd132|sh'. + 0x201C922E, // Large 'vfmadd132|ss'. + 0x50A46096, // Large 'vfmadd|213pd'. + 0x50A96096, // Large 'vfmadd|213ph'. + 0x50AE6096, // Large 'vfmadd|213ps'. + 0x51556096, // Large 'vfmadd|213sd'. + 0x515A6096, // Large 'vfmadd|213sh'. + 0x515F6096, // Large 'vfmadd|213ss'. + 0x50B36096, // Large 'vfmadd|231pd'. + 0x50B86096, // Large 'vfmadd|231ph'. + 0x50BD6096, // Large 'vfmadd|231ps'. + 0x51646096, // Large 'vfmadd|231sd'. + 0x51696096, // Large 'vfmadd|231sh'. + 0x516E6096, // Large 'vfmadd|231ss'. + 0x34B26096, // Large 'vfmadd|cph'. + 0x34B56096, // Large 'vfmadd|csh'. + 0x20A76096, // Large 'vfmadd|pd'. + 0x207D6096, // Large 'vfmadd|ps'. + 0x10267096, // Large 'vfmadds|d'. + 0x10147096, // Large 'vfmadds|s'. + 0x1026D096, // Large 'vfmaddsub132p|d'. + 0x10A3D096, // Large 'vfmaddsub132p|h'. + 0x1014D096, // Large 'vfmaddsub132p|s'. + 0x50A49096, // Large 'vfmaddsub|213pd'. + 0x50A99096, // Large 'vfmaddsub|213ph'. + 0x50AE9096, // Large 'vfmaddsub|213ps'. + 0x50B39096, // Large 'vfmaddsub|231pd'. + 0x50B89096, // Large 'vfmaddsub|231ph'. + 0x50BD9096, // Large 'vfmaddsub|231ps'. + 0x20A79096, // Large 'vfmaddsub|pd'. + 0x207D9096, // Large 'vfmaddsub|ps'. + 0x20A79237, // Large 'vfmsub132|pd'. + 0x20A29237, // Large 'vfmsub132|ph'. + 0x207D9237, // Large 'vfmsub132|ps'. + 0x21449237, // Large 'vfmsub132|sd'. + 0x20D59237, // Large 'vfmsub132|sh'. + 0x201C9237, // Large 'vfmsub132|ss'. + 0x50A460C2, // Large 'vfmsub|213pd'. + 0x50A960C2, // Large 'vfmsub|213ph'. + 0x50AE60C2, // Large 'vfmsub|213ps'. + 0x515560C2, // Large 'vfmsub|213sd'. + 0x515A60C2, // Large 'vfmsub|213sh'. + 0x515F60C2, // Large 'vfmsub|213ss'. + 0x50B360C2, // Large 'vfmsub|231pd'. + 0x50B860C2, // Large 'vfmsub|231ph'. + 0x50BD60C2, // Large 'vfmsub|231ps'. + 0x516460C2, // Large 'vfmsub|231sd'. + 0x516960C2, // Large 'vfmsub|231sh'. + 0x516E60C2, // Large 'vfmsub|231ss'. + 0x20A7C0C2, // Large 'vfmsubadd132|pd'. + 0x20A2C0C2, // Large 'vfmsubadd132|ph'. + 0x207DC0C2, // Large 'vfmsubadd132|ps'. + 0x50A490C2, // Large 'vfmsubadd|213pd'. + 0x50A990C2, // Large 'vfmsubadd|213ph'. + 0x50AE90C2, // Large 'vfmsubadd|213ps'. + 0x50B390C2, // Large 'vfmsubadd|231pd'. + 0x50B890C2, // Large 'vfmsubadd|231ph'. + 0x50BD90C2, // Large 'vfmsubadd|231ps'. + 0x20A790C2, // Large 'vfmsubadd|pd'. + 0x207D90C2, // Large 'vfmsubadd|ps'. + 0x20A760C2, // Large 'vfmsub|pd'. + 0x207D60C2, // Large 'vfmsub|ps'. + 0x214460C2, // Large 'vfmsub|sd'. + 0x201C60C2, // Large 'vfmsub|ss'. + 0x34B25645, // Large 'vfmul|cph'. + 0x34B55645, // Large 'vfmul|csh'. + 0x20A7A14B, // Large 'vfnmadd132|pd'. + 0x20A2A14B, // Large 'vfnmadd132|ph'. + 0x207DA14B, // Large 'vfnmadd132|ps'. + 0x2144A14B, // Large 'vfnmadd132|sd'. + 0x20D5A14B, // Large 'vfnmadd132|sh'. + 0x201CA14B, // Large 'vfnmadd132|ss'. + 0x50A4714B, // Large 'vfnmadd|213pd'. + 0x50A9714B, // Large 'vfnmadd|213ph'. + 0x50AE714B, // Large 'vfnmadd|213ps'. + 0x5155714B, // Large 'vfnmadd|213sd'. + 0x515A714B, // Large 'vfnmadd|213sh'. + 0x515F714B, // Large 'vfnmadd|213ss'. + 0x50B3714B, // Large 'vfnmadd|231pd'. + 0x50B8714B, // Large 'vfnmadd|231ph'. + 0x50BD714B, // Large 'vfnmadd|231ps'. + 0x5164714B, // Large 'vfnmadd|231sd'. + 0x5169714B, // Large 'vfnmadd|231sh'. + 0x516E714B, // Large 'vfnmadd|231ss'. + 0x20A7714B, // Large 'vfnmadd|pd'. + 0x207D714B, // Large 'vfnmadd|ps'. + 0x2144714B, // Large 'vfnmadd|sd'. + 0x201C714B, // Large 'vfnmadd|ss'. + 0x20A7A173, // Large 'vfnmsub132|pd'. + 0x20A2A173, // Large 'vfnmsub132|ph'. + 0x207DA173, // Large 'vfnmsub132|ps'. + 0x2144A173, // Large 'vfnmsub132|sd'. + 0x20D5A173, // Large 'vfnmsub132|sh'. + 0x201CA173, // Large 'vfnmsub132|ss'. + 0x50A47173, // Large 'vfnmsub|213pd'. + 0x50A97173, // Large 'vfnmsub|213ph'. + 0x50AE7173, // Large 'vfnmsub|213ps'. + 0x51557173, // Large 'vfnmsub|213sd'. + 0x515A7173, // Large 'vfnmsub|213sh'. + 0x515F7173, // Large 'vfnmsub|213ss'. + 0x50B37173, // Large 'vfnmsub|231pd'. + 0x50B87173, // Large 'vfnmsub|231ph'. + 0x50BD7173, // Large 'vfnmsub|231ps'. + 0x51647173, // Large 'vfnmsub|231sd'. + 0x51697173, // Large 'vfnmsub|231sh'. + 0x516E7173, // Large 'vfnmsub|231ss'. + 0x20A77173, // Large 'vfnmsub|pd'. + 0x207D7173, // Large 'vfnmsub|ps'. + 0x21447173, // Large 'vfnmsub|sd'. + 0x201C7173, // Large 'vfnmsub|ss'. + 0x20A78329, // Large 'vfpclass|pd'. + 0x20A28329, // Large 'vfpclass|ph'. + 0x207D8329, // Large 'vfpclass|ps'. + 0x21448329, // Large 'vfpclass|sd'. + 0x20D58329, // Large 'vfpclass|sh'. + 0x201C8329, // Large 'vfpclass|ss'. + 0x20A757B0, // Large 'vfrcz|pd'. + 0x207D57B0, // Large 'vfrcz|ps'. + 0x214457B0, // Large 'vfrcz|sd'. + 0x201C57B0, // Large 'vfrcz|ss'. + 0x30ED7115, // Large 'vgather|dpd'. + 0x30F17115, // Large 'vgather|dps'. + 0x30EDA115, // Large 'vgatherpf0|dpd'. + 0x30F1A115, // Large 'vgatherpf0|dps'. + 0x30E6A115, // Large 'vgatherpf0|qpd'. + 0x30E9A115, // Large 'vgatherpf0|qps'. + 0x40EC9115, // Large 'vgatherpf|1dpd'. + 0x40F09115, // Large 'vgatherpf|1dps'. + 0x40F49115, // Large 'vgatherpf|1qpd'. + 0x40F89115, // Large 'vgatherpf|1qps'. + 0x30E67115, // Large 'vgather|qpd'. + 0x30E97115, // Large 'vgather|qps'. + 0x20A774B8, // Large 'vgetexp|pd'. + 0x20A274B8, // Large 'vgetexp|ph'. + 0x207D74B8, // Large 'vgetexp|ps'. + 0x214474B8, // Large 'vgetexp|sd'. + 0x20D574B8, // Large 'vgetexp|sh'. + 0x201C74B8, // Large 'vgetexp|ss'. + 0x31F17331, // Large 'vgetman|tpd'. + 0x31FC7331, // Large 'vgetman|tph'. + 0x32057331, // Large 'vgetman|tps'. + 0x320E7331, // Large 'vgetman|tsd'. + 0x32177331, // Large 'vgetman|tsh'. + 0x32207331, // Large 'vgetman|tss'. 0x200FF000, // Large 'vgf2p8affineinv|qb'. 0x200FC000, // Large 'vgf2p8affine|qb'. - 0x42E26000, // Large 'vgf2p8|mulb'. - 0x30CD46C5, // Large 'vhad|dpd'. - 0x30D146C5, // Large 'vhad|dps'. - 0x208756C9, // Large 'vhsub|pd'. - 0x207056C9, // Large 'vhsub|ps'. - 0x30628148, // Large 'vinsertf|128'. - 0x602A6142, // Large 'vinser|tf32x4'. - 0x40438148, // Large 'vinsertf|32x8'. - 0x40308148, // Large 'vinsertf|64x2'. - 0x40348148, // Large 'vinsertf|64x4'. - 0x40657148, // Large 'vinsert|i128'. - 0x503D7148, // Large 'vinsert|i32x4'. - 0x50427148, // Large 'vinsert|i32x8'. - 0x50477148, // Large 'vinsert|i64x2'. - 0x504C7148, // Large 'vinsert|i64x4'. - 0x20707148, // Large 'vinsert|ps'. + 0x43386000, // Large 'vgf2p8|mulb'. + 0x30ED47B5, // Large 'vhad|dpd'. + 0x30F147B5, // Large 'vhad|dps'. + 0x20A757B9, // Large 'vhsub|pd'. + 0x207D57B9, // Large 'vhsub|ps'. + 0x306F8183, // Large 'vinsertf|128'. + 0x602A617D, // Large 'vinser|tf32x4'. + 0x40438183, // Large 'vinsertf|32x8'. + 0x40308183, // Large 'vinsertf|64x2'. + 0x40348183, // Large 'vinsertf|64x4'. + 0x40727183, // Large 'vinsert|i128'. + 0x503D7183, // Large 'vinsert|i32x4'. + 0x50427183, // Large 'vinsert|i32x8'. + 0x50477183, // Large 'vinsert|i64x2'. + 0x504C7183, // Large 'vinsert|i64x4'. + 0x207D7183, // Large 'vinsert|ps'. 0xAB121196, // Small 'vlddqu'. - 0x1023757A, // Large 'vldmxcs|r'. - 0x107DA1F8, // Large 'vmaskmovdq|u'. - 0x208781F8, // Large 'vmaskmov|pd'. - 0x207081F8, // Large 'vmaskmov|ps'. + 0x1023764A, // Large 'vldmxcs|r'. + 0x109DA240, // Large 'vmaskmovdq|u'. + 0x20A78240, // Large 'vmaskmov|pd'. + 0x207D8240, // Large 'vmaskmov|ps'. 0x890C05B6, // Small 'vmaxpd'. 0x910C05B6, // Small 'vmaxph'. 0xA70C05B6, // Small 'vmaxps'. @@ -3980,55 +4120,56 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x913C05B6, // Small 'vmaxsh'. 0xA73C05B6, // Small 'vmaxss'. 0x98C08DB6, // Small 'vmcall'. - 0x23A256CE, // Large 'vmcle|ar'. + 0x242857BE, // Large 'vmcle|ar'. 0x86EA99B6, // Small 'vmfunc'. + 0x219257C3, // Large 'vmgex|it'. 0x890725B6, // Small 'vminpd'. 0x910725B6, // Small 'vminph'. 0xA70725B6, // Small 'vminps'. 0x893725B6, // Small 'vminsd'. 0x913725B6, // Small 'vminsh'. 0xA73725B6, // Small 'vminss'. - 0x21606581, // Large 'vmlaun|ch'. + 0x21A56651, // Large 'vmlaun|ch'. 0x8817B1B6, // Small 'vmload'. - 0x361A46D3, // Large 'vmmc|all'. - 0x208756D7, // Large 'vmova|pd'. - 0x207056D7, // Large 'vmova|ps'. + 0x36F347C8, // Large 'vmmc|all'. + 0x20A757CC, // Large 'vmova|pd'. + 0x207D57CC, // Large 'vmova|ps'. 0x804B3DB6, // Small 'vmovd'. - 0x35875432, // Large 'vmovd|dup'. - 0x00007432, // Large 'vmovdqa'. - 0x202C7432, // Large 'vmovdqa|32'. - 0x20307432, // Large 'vmovdqa|64'. - 0x107D6432, // Large 'vmovdq|u'. - 0x34396432, // Large 'vmovdq|u16'. - 0x343C6432, // Large 'vmovdq|u32'. - 0x343F6432, // Large 'vmovdq|u64'. - 0x258A6432, // Large 'vmovdq|u8'. - 0x34ED558C, // Large 'vmovh|lps'. - 0x2087558C, // Large 'vmovh|pd'. - 0x2070558C, // Large 'vmovh|ps'. - 0x20706591, // Large 'vmovlh|ps'. - 0x20875591, // Large 'vmovl|pd'. - 0x20705591, // Large 'vmovl|ps'. - 0x20877442, // Large 'vmovmsk|pd'. - 0x20707442, // Large 'vmovmsk|ps'. - 0x20C56449, // Large 'vmovnt|dq'. - 0x34366449, // Large 'vmovnt|dqa'. - 0x20876449, // Large 'vmovnt|pd'. - 0x20706449, // Large 'vmovnt|ps'. + 0x365754BF, // Large 'vmovd|dup'. + 0x000074BF, // Large 'vmovdqa'. + 0x202C74BF, // Large 'vmovdqa|32'. + 0x203074BF, // Large 'vmovdqa|64'. + 0x109D64BF, // Large 'vmovdq|u'. + 0x34C664BF, // Large 'vmovdq|u16'. + 0x34C964BF, // Large 'vmovdq|u32'. + 0x34CC64BF, // Large 'vmovdq|u64'. + 0x265A64BF, // Large 'vmovdq|u8'. + 0x359A565C, // Large 'vmovh|lps'. + 0x20A7565C, // Large 'vmovh|pd'. + 0x207D565C, // Large 'vmovh|ps'. + 0x207D6661, // Large 'vmovlh|ps'. + 0x20A75661, // Large 'vmovl|pd'. + 0x207D5661, // Large 'vmovl|ps'. + 0x20A774CF, // Large 'vmovmsk|pd'. + 0x207D74CF, // Large 'vmovmsk|ps'. + 0x20E564D6, // Large 'vmovnt|dq'. + 0x34C364D6, // Large 'vmovnt|dqa'. + 0x20A764D6, // Large 'vmovnt|pd'. + 0x207D64D6, // Large 'vmovnt|ps'. 0x811B3DB6, // Small 'vmovq'. 0x893B3DB6, // Small 'vmovsd'. 0x913B3DB6, // Small 'vmovsh'. - 0x21E1744F, // Large 'vmovshd|up'. - 0x21E17456, // Large 'vmovsld|up'. + 0x222974DC, // Large 'vmovshd|up'. + 0x222974E3, // Large 'vmovsld|up'. 0xA73B3DB6, // Small 'vmovss'. - 0x33AD4432, // Large 'vmov|upd'. - 0x207056DC, // Large 'vmovu|ps'. + 0x343344BF, // Large 'vmov|upd'. + 0x207D57D1, // Large 'vmovu|ps'. 0x817B3DB6, // Small 'vmovw'. - 0x23446597, // Large 'vmpsad|bw'. - 0x338B46E1, // Large 'vmpt|rld'. - 0x338746E1, // Large 'vmpt|rst'. + 0x239A6667, // Large 'vmpsad|bw'. + 0x341147D6, // Large 'vmpt|rld'. + 0x340D47D6, // Large 'vmpt|rst'. 0x8812C9B6, // Small 'vmread'. - 0x100B759D, // Large 'vmresum|e'. + 0x100B766D, // Large 'vmresum|e'. 0x80EAC9B6, // Small 'vmrun'. 0x8B60CDB6, // Small 'vmsave'. 0x890655B6, // Small 'vmulpd'. @@ -4037,439 +4178,460 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x893655B6, // Small 'vmulsd'. 0x913655B6, // Small 'vmulsh'. 0xA73655B6, // Small 'vmulss'. - 0x20BF56E5, // Large 'vmwri|te'. + 0x20DF57DA, // Large 'vmwri|te'. + 0x8C67E1B6, // Small 'vmxoff'. 0x80E7E1B6, // Small 'vmxon'. 0x804849F6, // Small 'vorpd'. 0x813849F6, // Small 'vorps'. - 0x1026C102, // Large 'vp2intersect|d'. - 0x100FC102, // Large 'vp2intersect|q'. - 0x102682E6, // Large 'vp4dpwss|d'. - 0x207B82E6, // Large 'vp4dpwss|ds'. + 0x1026C11F, // Large 'vp2intersect|d'. + 0x100FC11F, // Large 'vp2intersect|q'. + 0x1026833C, // Large 'vp4dpwss|d'. + 0x209B833C, // Large 'vp4dpwss|ds'. 0x85310616, // Small 'vpabsb'. 0x89310616, // Small 'vpabsd'. 0xA3310616, // Small 'vpabsq'. 0xAF310616, // Small 'vpabsw'. - 0x105F845D, // Large 'vpackssd|w'. - 0x2465745D, // Large 'vpackss|wb'. - 0x34636467, // Large 'vpacku|sdw'. - 0x346D6467, // Large 'vpacku|swb'. + 0x105F84EA, // Large 'vpackssd|w'. + 0x24F274EA, // Large 'vpackss|wb'. + 0x34F064F4, // Large 'vpacku|sdw'. + 0x34FA64F4, // Large 'vpacku|swb'. 0x84420616, // Small 'vpaddb'. 0x88420616, // Small 'vpaddd'. 0xA2420616, // Small 'vpaddq'. - 0x250D55A4, // Large 'vpadd|sb'. - 0x232D55A4, // Large 'vpadd|sw'. - 0x250D65A4, // Large 'vpaddu|sb'. - 0x232D65A4, // Large 'vpaddu|sw'. + 0x25BA5674, // Large 'vpadd|sb'. + 0x23835674, // Large 'vpadd|sw'. + 0x25BA6674, // Large 'vpaddu|sb'. + 0x23836674, // Large 'vpaddu|sw'. 0xAE420616, // Small 'vpaddw'. - 0x102375AA, // Large 'vpalign|r'. + 0x1023767A, // Large 'vpalign|r'. 0x80470616, // Small 'vpand'. 0x88470616, // Small 'vpandd'. 0x9C470616, // Small 'vpandn'. - 0x217856EA, // Large 'vpand|nd'. - 0x264056EA, // Large 'vpand|nq'. + 0x219D57DF, // Large 'vpand|nd'. + 0x271E57DF, // Large 'vpand|nq'. 0xA2470616, // Small 'vpandq'. 0x847B0616, // Small 'vpavgb'. 0xAE7B0616, // Small 'vpavgw'. - 0x10267470, // Large 'vpblend|d'. - 0x205C7470, // Large 'vpblend|mb'. - 0x24777470, // Large 'vpblend|md'. - 0x100F8470, // Large 'vpblendm|q'. - 0x105F8470, // Large 'vpblendm|w'. - 0x20217470, // Large 'vpblend|vb'. - 0x105F7470, // Large 'vpblend|w'. + 0x102674FD, // Large 'vpblend|d'. + 0x205C74FD, // Large 'vpblend|mb'. + 0x250474FD, // Large 'vpblend|md'. + 0x100F84FD, // Large 'vpblendm|q'. + 0x105F84FD, // Large 'vpblendm|w'. + 0x202174FD, // Large 'vpblend|vb'. + 0x105F74FD, // Large 'vpblend|w'. 0x1010B051, // Large 'vpbroadcast|b'. 0x1026B051, // Large 'vpbroadcast|d'. 0x100FE051, // Large 'vpbroadcastmb2|q'. 0x305FC051, // Large 'vpbroadcastm|w2d'. 0x100FB051, // Large 'vpbroadcast|q'. 0x105FB051, // Large 'vpbroadcast|w'. - 0x424062EE, // Large 'vpclmu|lqdq'. + 0x42886344, // Large 'vpclmu|lqdq'. 0xACF68E16, // Small 'vpcmov'. 0x85068E16, // Small 'vpcmpb'. 0x89068E16, // Small 'vpcmpd'. - 0x200F62F4, // Large 'vpcmpe|qb'. - 0x223562F4, // Large 'vpcmpe|qd'. - 0x21AE62F4, // Large 'vpcmpe|qq'. - 0x24BB62F4, // Large 'vpcmpe|qw'. - 0x100992F4, // Large 'vpcmpestr|i'. - 0x105C92F4, // Large 'vpcmpestr|m'. - 0x35B152F4, // Large 'vpcmp|gtb'. - 0x35B452F4, // Large 'vpcmp|gtd'. - 0x35B752F4, // Large 'vpcmp|gtq'. - 0x35BA52F4, // Large 'vpcmp|gtw'. - 0x100992FD, // Large 'vpcmpistr|i'. - 0x105C92FD, // Large 'vpcmpistr|m'. + 0x200F634A, // Large 'vpcmpe|qb'. + 0x227D634A, // Large 'vpcmpe|qd'. + 0x21F6634A, // Large 'vpcmpe|qq'. + 0x2559634A, // Large 'vpcmpe|qw'. + 0x1009934A, // Large 'vpcmpestr|i'. + 0x105C934A, // Large 'vpcmpestr|m'. + 0x3681534A, // Large 'vpcmp|gtb'. + 0x3684534A, // Large 'vpcmp|gtd'. + 0x3687534A, // Large 'vpcmp|gtq'. + 0x368A534A, // Large 'vpcmp|gtw'. + 0x10099353, // Large 'vpcmpistr|i'. + 0x105C9353, // Large 'vpcmpistr|m'. 0xA3068E16, // Small 'vpcmpq'. - 0x207D52F4, // Large 'vpcmp|ub'. - 0x228F52F4, // Large 'vpcmp|ud'. - 0x21AD52F4, // Large 'vpcmp|uq'. - 0x23F452F4, // Large 'vpcmp|uw'. + 0x209D534A, // Large 'vpcmp|ub'. + 0x22E5534A, // Large 'vpcmp|ud'. + 0x21F5534A, // Large 'vpcmp|uq'. + 0x2481534A, // Large 'vpcmp|uw'. 0xAF068E16, // Small 'vpcmpw'. 0x84D78E16, // Small 'vpcomb'. 0x88D78E16, // Small 'vpcomd'. - 0x1010A202, // Large 'vpcompress|b'. - 0x1026A202, // Large 'vpcompress|d'. - 0x100FA202, // Large 'vpcompress|q'. - 0x105FA202, // Large 'vpcompress|w'. + 0x1010A24A, // Large 'vpcompress|b'. + 0x1026A24A, // Large 'vpcompress|d'. + 0x100FA24A, // Large 'vpcompress|q'. + 0x105FA24A, // Large 'vpcompress|w'. 0xA2D78E16, // Small 'vpcomq'. - 0x207D5202, // Large 'vpcom|ub'. - 0x228F5202, // Large 'vpcom|ud'. - 0x21AD5202, // Large 'vpcom|uq'. - 0x23F45202, // Large 'vpcom|uw'. + 0x209D524A, // Large 'vpcom|ub'. + 0x22E5524A, // Large 'vpcom|ud'. + 0x21F5524A, // Large 'vpcom|uq'. + 0x2481524A, // Large 'vpcom|uw'. 0xAED78E16, // Small 'vpcomw'. - 0x1026A20C, // Large 'vpconflict|d'. - 0x100FA20C, // Large 'vpconflict|q'. - 0x10267479, // Large 'vpdpbus|d'. - 0x207B7479, // Large 'vpdpbus|ds'. - 0x10267480, // Large 'vpdpwss|d'. - 0x207B7480, // Large 'vpdpwss|ds'. - 0x30627306, // Large 'vperm2f|128'. - 0x40656306, // Large 'vperm2|i128'. + 0x1026A254, // Large 'vpconflict|d'. + 0x100FA254, // Large 'vpconflict|q'. + 0x10267506, // Large 'vpdpbss|d'. + 0x209B7506, // Large 'vpdpbss|ds'. + 0x22E56506, // Large 'vpdpbs|ud'. + 0x350D6506, // Large 'vpdpbs|uds'. + 0x10267510, // Large 'vpdpbus|d'. + 0x209B7510, // Large 'vpdpbus|ds'. + 0x22E56510, // Large 'vpdpbu|ud'. + 0x350D6510, // Large 'vpdpbu|uds'. + 0x10267517, // Large 'vpdpwss|d'. + 0x209B7517, // Large 'vpdpwss|ds'. + 0x22E56517, // Large 'vpdpws|ud'. + 0x350D6517, // Large 'vpdpws|uds'. + 0x1026751E, // Large 'vpdpwus|d'. + 0x209B751E, // Large 'vpdpwus|ds'. + 0x22E5651E, // Large 'vpdpwu|ud'. + 0x350D651E, // Large 'vpdpwu|uds'. + 0x306F735C, // Large 'vperm2f|128'. + 0x4072635C, // Large 'vperm2|i128'. 0x84D91616, // Small 'vpermb'. 0x88D91616, // Small 'vpermd'. - 0x2072630D, // Large 'vpermi|2b'. - 0x2060630D, // Large 'vpermi|2d'. - 0x3487630D, // Large 'vpermi|2pd'. - 0x306F630D, // Large 'vpermi|2ps'. - 0x25BD630D, // Large 'vpermi|2q'. - 0x205E630D, // Large 'vpermi|2w'. - 0x2087830D, // Large 'vpermil2|pd'. - 0x2070830D, // Large 'vpermil2|ps'. - 0x2087730D, // Large 'vpermil|pd'. - 0x2070730D, // Large 'vpermil|ps'. - 0x20875306, // Large 'vperm|pd'. - 0x20705306, // Large 'vperm|ps'. + 0x268D6363, // Large 'vpermi|2b'. + 0x20606363, // Large 'vpermi|2d'. + 0x35256363, // Large 'vpermi|2pd'. + 0x307C6363, // Large 'vpermi|2ps'. + 0x268F6363, // Large 'vpermi|2q'. + 0x205E6363, // Large 'vpermi|2w'. + 0x20A78363, // Large 'vpermil2|pd'. + 0x207D8363, // Large 'vpermil2|ps'. + 0x20A77363, // Large 'vpermil|pd'. + 0x207D7363, // Large 'vpermil|ps'. + 0x20A7535C, // Large 'vperm|pd'. + 0x207D535C, // Large 'vperm|ps'. 0xA2D91616, // Small 'vpermq'. - 0x2072648A, // Large 'vpermt|2b'. - 0x2060648A, // Large 'vpermt|2d'. - 0x3487648A, // Large 'vpermt|2pd'. - 0x306F648A, // Large 'vpermt|2ps'. - 0x25BD648A, // Large 'vpermt|2q'. - 0x205E648A, // Large 'vpermt|2w'. + 0x268D6528, // Large 'vpermt|2b'. + 0x20606528, // Large 'vpermt|2d'. + 0x35256528, // Large 'vpermt|2pd'. + 0x307C6528, // Large 'vpermt|2ps'. + 0x268F6528, // Large 'vpermt|2q'. + 0x205E6528, // Large 'vpermt|2w'. 0xAED91616, // Small 'vpermw'. - 0x240B7490, // Large 'vpexpan|db'. - 0x207A7490, // Large 'vpexpan|dd'. - 0x20C57490, // Large 'vpexpan|dq'. - 0x24647490, // Large 'vpexpan|dw'. - 0x352E4490, // Large 'vpex|trb'. - 0x254D56EF, // Large 'vpext|rd'. - 0x223456EF, // Large 'vpext|rq'. - 0x26F456EF, // Large 'vpext|rw'. - 0x207A8315, // Large 'vpgather|dd'. - 0x20C58315, // Large 'vpgather|dq'. - 0x22358315, // Large 'vpgather|qd'. - 0x21AE8315, // Large 'vpgather|qq'. - 0x25BF6497, // Large 'vphadd|bd'. - 0x25C16497, // Large 'vphadd|bq'. - 0x23446497, // Large 'vphadd|bw'. - 0x10266497, // Large 'vphadd|d'. - 0x20C56497, // Large 'vphadd|dq'. - 0x232D6497, // Large 'vphadd|sw'. - 0x10268497, // Large 'vphaddub|d'. - 0x100F8497, // Large 'vphaddub|q'. - 0x105F8497, // Large 'vphaddub|w'. - 0x20C57497, // Large 'vphaddu|dq'. - 0x23467497, // Large 'vphaddu|wd'. - 0x249F7497, // Large 'vphaddu|wq'. - 0x105F6497, // Large 'vphadd|w'. - 0x23466497, // Large 'vphadd|wd'. - 0x249F6497, // Large 'vphadd|wq'. - 0x105FA216, // Large 'vphminposu|w'. - 0x234465C3, // Large 'vphsub|bw'. - 0x102665C3, // Large 'vphsub|d'. - 0x20C565C3, // Large 'vphsub|dq'. - 0x232D65C3, // Large 'vphsub|sw'. - 0x105F65C3, // Large 'vphsub|w'. - 0x234665C3, // Large 'vphsub|wd'. - 0x252F56F6, // Large 'vpins|rb'. - 0x254D56F6, // Large 'vpins|rd'. - 0x223456F6, // Large 'vpins|rq'. - 0x26F456F6, // Large 'vpins|rw'. - 0x23CF65C9, // Large 'vplzcn|td'. - 0x215865C9, // Large 'vplzcn|tq'. - 0x207A631D, // Large 'vpmacs|dd'. - 0x34A1631D, // Large 'vpmacs|dqh'. - 0x334C631D, // Large 'vpmacs|dql'. - 0x1026831D, // Large 'vpmacssd|d'. - 0x1083931D, // Large 'vpmacssdq|h'. - 0x10B2931D, // Large 'vpmacssdq|l'. - 0x2346731D, // Large 'vpmacss|wd'. - 0x2345731D, // Large 'vpmacss|ww'. - 0x2346631D, // Large 'vpmacs|wd'. - 0x2345631D, // Large 'vpmacs|ww'. - 0x10269326, // Large 'vpmadcssw|d'. - 0x23467326, // Large 'vpmadcs|wd'. - 0x21AD9220, // Large 'vpmadd52h|uq'. - 0x32298220, // Large 'vpmadd52|luq'. - 0x432F6220, // Large 'vpmadd|ubsw'. - 0x23466220, // Large 'vpmadd|wd'. - 0x61FB4220, // Large 'vpma|skmovd'. - 0x200E8333, // Large 'vpmaskmo|vq'. - 0x250D56FB, // Large 'vpmax|sb'. - 0x210E56FB, // Large 'vpmax|sd'. - 0x235356FB, // Large 'vpmax|sq'. - 0x232D56FB, // Large 'vpmax|sw'. - 0x207D56FB, // Large 'vpmax|ub'. - 0x228F56FB, // Large 'vpmax|ud'. - 0x21AD56FB, // Large 'vpmax|uq'. - 0x23F456FB, // Large 'vpmax|uw'. - 0x250D5700, // Large 'vpmin|sb'. - 0x210E5700, // Large 'vpmin|sd'. - 0x23535700, // Large 'vpmin|sq'. - 0x232D5700, // Large 'vpmin|sw'. - 0x207D5700, // Large 'vpmin|ub'. - 0x228F5700, // Large 'vpmin|ud'. - 0x21AD5700, // Large 'vpmin|uq'. - 0x23F45700, // Large 'vpmin|uw'. - 0x35CF54A4, // Large 'vpmov|b2m'. - 0x35D254A4, // Large 'vpmov|d2m'. - 0x240B54A4, // Large 'vpmov|db'. - 0x246454A4, // Large 'vpmov|dw'. - 0x207264A4, // Large 'vpmovm|2b'. - 0x206064A4, // Large 'vpmovm|2d'. - 0x25BD64A4, // Large 'vpmovm|2q'. - 0x205E64A4, // Large 'vpmovm|2w'. - 0x101084A4, // Large 'vpmovmsk|b'. - 0x35D554A4, // Large 'vpmov|q2m'. - 0x200F54A4, // Large 'vpmov|qb'. - 0x223554A4, // Large 'vpmov|qd'. - 0x24BB54A4, // Large 'vpmov|qw'. - 0x240B64AC, // Large 'vpmovs|db'. - 0x246464AC, // Large 'vpmovs|dw'. - 0x200F64AC, // Large 'vpmovs|qb'. - 0x223564AC, // Large 'vpmovs|qd'. - 0x24BB64AC, // Large 'vpmovs|qw'. - 0x246564AC, // Large 'vpmovs|wb'. - 0x102684AC, // Large 'vpmovsxb|d'. - 0x100F84AC, // Large 'vpmovsxb|q'. - 0x105F84AC, // Large 'vpmovsxb|w'. - 0x20C574AC, // Large 'vpmovsx|dq'. - 0x234674AC, // Large 'vpmovsx|wd'. - 0x249F74AC, // Large 'vpmovsx|wq'. - 0x240B74B4, // Large 'vpmovus|db'. - 0x246474B4, // Large 'vpmovus|dw'. - 0x200F74B4, // Large 'vpmovus|qb'. - 0x223574B4, // Large 'vpmovus|qd'. - 0x24BB74B4, // Large 'vpmovus|qw'. - 0x246574B4, // Large 'vpmovus|wb'. - 0x35D854A4, // Large 'vpmov|w2m'. - 0x246554A4, // Large 'vpmov|wb'. - 0x102684BD, // Large 'vpmovzxb|d'. - 0x100F84BD, // Large 'vpmovzxb|q'. - 0x105F84BD, // Large 'vpmovzxb|w'. - 0x20C574BD, // Large 'vpmovzx|dq'. - 0x234674BD, // Large 'vpmovzx|wd'. - 0x249F74BD, // Large 'vpmovzx|wq'. - 0x20C550AE, // Large 'vpmul|dq'. - 0x232D74C5, // Large 'vpmulhr|sw'. - 0x23F464C5, // Large 'vpmulh|uw'. - 0x105F64C5, // Large 'vpmulh|w'. - 0x234B50AE, // Large 'vpmul|ld'. - 0x224050AE, // Large 'vpmul|lq'. - 0x234E50AE, // Large 'vpmul|lw'. - 0x200FC0AE, // Large 'vpmultishift|qb'. - 0x328F50AE, // Large 'vpmul|udq'. - 0x25B265DB, // Large 'vpopcn|tb'. - 0x23CF65DB, // Large 'vpopcn|td'. - 0x215865DB, // Large 'vpopcn|tq'. - 0x216365DB, // Large 'vpopcn|tw'. + 0x2498752E, // Large 'vpexpan|db'. + 0x209A752E, // Large 'vpexpan|dd'. + 0x20E5752E, // Large 'vpexpan|dq'. + 0x24F1752E, // Large 'vpexpan|dw'. + 0x35F7452E, // Large 'vpex|trb'. + 0x261657E4, // Large 'vpext|rd'. + 0x227C57E4, // Large 'vpext|rq'. + 0x27E957E4, // Large 'vpext|rw'. + 0x209A836B, // Large 'vpgather|dd'. + 0x20E5836B, // Large 'vpgather|dq'. + 0x227D836B, // Large 'vpgather|qd'. + 0x21F6836B, // Large 'vpgather|qq'. + 0x26916535, // Large 'vphadd|bd'. + 0x26936535, // Large 'vphadd|bq'. + 0x239A6535, // Large 'vphadd|bw'. + 0x10266535, // Large 'vphadd|d'. + 0x20E56535, // Large 'vphadd|dq'. + 0x23836535, // Large 'vphadd|sw'. + 0x10268535, // Large 'vphaddub|d'. + 0x100F8535, // Large 'vphaddub|q'. + 0x105F8535, // Large 'vphaddub|w'. + 0x20E57535, // Large 'vphaddu|dq'. + 0x239C7535, // Large 'vphaddu|wd'. + 0x253D7535, // Large 'vphaddu|wq'. + 0x105F6535, // Large 'vphadd|w'. + 0x239C6535, // Large 'vphadd|wd'. + 0x253D6535, // Large 'vphadd|wq'. + 0x105FA25E, // Large 'vphminposu|w'. + 0x239A6695, // Large 'vphsub|bw'. + 0x10266695, // Large 'vphsub|d'. + 0x20E56695, // Large 'vphsub|dq'. + 0x23836695, // Large 'vphsub|sw'. + 0x105F6695, // Large 'vphsub|w'. + 0x239C6695, // Large 'vphsub|wd'. + 0x25F857EB, // Large 'vpins|rb'. + 0x261657EB, // Large 'vpins|rd'. + 0x227C57EB, // Large 'vpins|rq'. + 0x27E957EB, // Large 'vpins|rw'. + 0x2455669B, // Large 'vplzcn|td'. + 0x2193669B, // Large 'vplzcn|tq'. + 0x209A6373, // Large 'vpmacs|dd'. + 0x353F6373, // Large 'vpmacs|dqh'. + 0x33A26373, // Large 'vpmacs|dql'. + 0x10268373, // Large 'vpmacssd|d'. + 0x10A39373, // Large 'vpmacssdq|h'. + 0x10D29373, // Large 'vpmacssdq|l'. + 0x239C7373, // Large 'vpmacss|wd'. + 0x239B7373, // Large 'vpmacss|ww'. + 0x239C6373, // Large 'vpmacs|wd'. + 0x239B6373, // Large 'vpmacs|ww'. + 0x1026937C, // Large 'vpmadcssw|d'. + 0x239C737C, // Large 'vpmadcs|wd'. + 0x21F59268, // Large 'vpmadd52h|uq'. + 0x32718268, // Large 'vpmadd52|luq'. + 0x43856268, // Large 'vpmadd|ubsw'. + 0x239C6268, // Large 'vpmadd|wd'. + 0x62434268, // Large 'vpma|skmovd'. + 0x200E8389, // Large 'vpmaskmo|vq'. + 0x25BA57F0, // Large 'vpmax|sb'. + 0x214457F0, // Large 'vpmax|sd'. + 0x23A957F0, // Large 'vpmax|sq'. + 0x238357F0, // Large 'vpmax|sw'. + 0x209D57F0, // Large 'vpmax|ub'. + 0x22E557F0, // Large 'vpmax|ud'. + 0x21F557F0, // Large 'vpmax|uq'. + 0x248157F0, // Large 'vpmax|uw'. + 0x25BA57F5, // Large 'vpmin|sb'. + 0x214457F5, // Large 'vpmin|sd'. + 0x23A957F5, // Large 'vpmin|sq'. + 0x238357F5, // Large 'vpmin|sw'. + 0x209D57F5, // Large 'vpmin|ub'. + 0x22E557F5, // Large 'vpmin|ud'. + 0x21F557F5, // Large 'vpmin|uq'. + 0x248157F5, // Large 'vpmin|uw'. + 0x36A15542, // Large 'vpmov|b2m'. + 0x36A45542, // Large 'vpmov|d2m'. + 0x24985542, // Large 'vpmov|db'. + 0x24F15542, // Large 'vpmov|dw'. + 0x268D6542, // Large 'vpmovm|2b'. + 0x20606542, // Large 'vpmovm|2d'. + 0x268F6542, // Large 'vpmovm|2q'. + 0x205E6542, // Large 'vpmovm|2w'. + 0x10108542, // Large 'vpmovmsk|b'. + 0x36A75542, // Large 'vpmov|q2m'. + 0x200F5542, // Large 'vpmov|qb'. + 0x227D5542, // Large 'vpmov|qd'. + 0x25595542, // Large 'vpmov|qw'. + 0x2498654A, // Large 'vpmovs|db'. + 0x24F1654A, // Large 'vpmovs|dw'. + 0x200F654A, // Large 'vpmovs|qb'. + 0x227D654A, // Large 'vpmovs|qd'. + 0x2559654A, // Large 'vpmovs|qw'. + 0x24F2654A, // Large 'vpmovs|wb'. + 0x1026854A, // Large 'vpmovsxb|d'. + 0x100F854A, // Large 'vpmovsxb|q'. + 0x105F854A, // Large 'vpmovsxb|w'. + 0x20E5754A, // Large 'vpmovsx|dq'. + 0x239C754A, // Large 'vpmovsx|wd'. + 0x253D754A, // Large 'vpmovsx|wq'. + 0x24987552, // Large 'vpmovus|db'. + 0x24F17552, // Large 'vpmovus|dw'. + 0x200F7552, // Large 'vpmovus|qb'. + 0x227D7552, // Large 'vpmovus|qd'. + 0x25597552, // Large 'vpmovus|qw'. + 0x24F27552, // Large 'vpmovus|wb'. + 0x36AA5542, // Large 'vpmov|w2m'. + 0x24F25542, // Large 'vpmov|wb'. + 0x1026855B, // Large 'vpmovzxb|d'. + 0x100F855B, // Large 'vpmovzxb|q'. + 0x105F855B, // Large 'vpmovzxb|w'. + 0x20E5755B, // Large 'vpmovzx|dq'. + 0x239C755B, // Large 'vpmovzx|wd'. + 0x253D755B, // Large 'vpmovzx|wq'. + 0x20E550CE, // Large 'vpmul|dq'. + 0x23837563, // Large 'vpmulhr|sw'. + 0x24816563, // Large 'vpmulh|uw'. + 0x105F6563, // Large 'vpmulh|w'. + 0x23A150CE, // Large 'vpmul|ld'. + 0x228850CE, // Large 'vpmul|lq'. + 0x23A450CE, // Large 'vpmul|lw'. + 0x200FC0CE, // Large 'vpmultishift|qb'. + 0x32E550CE, // Large 'vpmul|udq'. + 0x268266AD, // Large 'vpopcn|tb'. + 0x245566AD, // Large 'vpopcn|td'. + 0x219366AD, // Large 'vpopcn|tq'. + 0x264366AD, // Large 'vpopcn|tw'. 0x80093E16, // Small 'vpor'. 0x80493E16, // Small 'vpord'. 0x81193E16, // Small 'vporq'. 0x9B22C216, // Small 'vpperm'. 0x88C7CA16, // Small 'vprold'. 0xA2C7CA16, // Small 'vprolq'. - 0x21FF5705, // Large 'vprol|vd'. - 0x200E5705, // Large 'vprol|vq'. + 0x224757FA, // Large 'vprol|vd'. + 0x200E57FA, // Large 'vprol|vq'. 0x8927CA16, // Small 'vprord'. 0xA327CA16, // Small 'vprorq'. - 0x21FF570A, // Large 'vpror|vd'. - 0x200E570A, // Large 'vpror|vq'. + 0x224757FF, // Large 'vpror|vd'. + 0x200E57FF, // Large 'vpror|vq'. 0x8547CA16, // Small 'vprotb'. 0x8947CA16, // Small 'vprotd'. 0xA347CA16, // Small 'vprotq'. 0xAF47CA16, // Small 'vprotw'. - 0x2344570F, // Large 'vpsad|bw'. - 0x207A922C, // Large 'vpscatter|dd'. - 0x20C5922C, // Large 'vpscatter|dq'. - 0x2235922C, // Large 'vpscatter|qd'. - 0x100FA22C, // Large 'vpscatterq|q'. + 0x239A5804, // Large 'vpsad|bw'. + 0x209A9274, // Large 'vpscatter|dd'. + 0x20E59274, // Large 'vpscatter|dq'. + 0x227D9274, // Large 'vpscatter|qd'. + 0x100FA274, // Large 'vpscatterq|q'. 0x84144E16, // Small 'vpshab'. 0x88144E16, // Small 'vpshad'. 0xA2144E16, // Small 'vpshaq'. 0xAE144E16, // Small 'vpshaw'. 0x84C44E16, // Small 'vpshlb'. 0x88C44E16, // Small 'vpshld'. - 0x102665E1, // Large 'vpshld|d'. - 0x100F65E1, // Large 'vpshld|q'. - 0x341055E1, // Large 'vpshl|dvd'. - 0x35E655E1, // Large 'vpshl|dvq'. - 0x105F75E1, // Large 'vpshldv|w'. - 0x105F65E1, // Large 'vpshld|w'. + 0x102666B3, // Large 'vpshld|d'. + 0x100F66B3, // Large 'vpshld|q'. + 0x349D56B3, // Large 'vpshl|dvd'. + 0x36B856B3, // Large 'vpshl|dvq'. + 0x105F76B3, // Large 'vpshldv|w'. + 0x105F66B3, // Large 'vpshld|w'. 0xA2C44E16, // Small 'vpshlq'. 0xAEC44E16, // Small 'vpshlw'. - 0x102665E9, // Large 'vpshrd|d'. - 0x100F65E9, // Large 'vpshrd|q'. - 0x341055E9, // Large 'vpshr|dvd'. - 0x35E655E9, // Large 'vpshr|dvq'. - 0x35EE55E9, // Large 'vpshr|dvw'. - 0x105F65E9, // Large 'vpshrd|w'. - 0x00007150, // Large 'vpshufb'. - 0x205CA150, // Large 'vpshufbitq|mb'. - 0x10266150, // Large 'vpshuf|d'. - 0x25F16150, // Large 'vpshuf|hw'. - 0x234E6150, // Large 'vpshuf|lw'. - 0x251A5714, // Large 'vpsig|nb'. - 0x21785714, // Large 'vpsig|nd'. - 0x26225714, // Large 'vpsig|nw'. + 0x102666BB, // Large 'vpshrd|d'. + 0x100F66BB, // Large 'vpshrd|q'. + 0x349D56BB, // Large 'vpshr|dvd'. + 0x36B856BB, // Large 'vpshr|dvq'. + 0x36C056BB, // Large 'vpshr|dvw'. + 0x105F66BB, // Large 'vpshrd|w'. + 0x0000718B, // Large 'vpshufb'. + 0x205CA18B, // Large 'vpshufbitq|mb'. + 0x1026618B, // Large 'vpshuf|d'. + 0x26C3618B, // Large 'vpshuf|hw'. + 0x23A4618B, // Large 'vpshuf|lw'. + 0x22A95809, // Large 'vpsig|nb'. + 0x219D5809, // Large 'vpsig|nd'. + 0x26FB5809, // Large 'vpsig|nw'. 0x88C64E16, // Small 'vpslld'. - 0x334B4719, // Large 'vpsl|ldq'. + 0x33A1480E, // Large 'vpsl|ldq'. 0xA2C64E16, // Small 'vpsllq'. - 0x21FF571D, // Large 'vpsll|vd'. - 0x200E571D, // Large 'vpsll|vq'. - 0x25EF571D, // Large 'vpsll|vw'. + 0x22475812, // Large 'vpsll|vd'. + 0x200E5812, // Large 'vpsll|vq'. + 0x26C15812, // Large 'vpsll|vw'. 0xAEC64E16, // Small 'vpsllw'. 0x88194E16, // Small 'vpsrad'. 0xA2194E16, // Small 'vpsraq'. - 0x21FF5722, // Large 'vpsra|vd'. - 0x200E5722, // Large 'vpsra|vq'. - 0x25EF5722, // Large 'vpsra|vw'. + 0x22475817, // Large 'vpsra|vd'. + 0x200E5817, // Large 'vpsra|vq'. + 0x26C15817, // Large 'vpsra|vw'. 0xAE194E16, // Small 'vpsraw'. 0x88C94E16, // Small 'vpsrld'. - 0x334B4722, // Large 'vpsr|ldq'. + 0x33A14817, // Large 'vpsr|ldq'. 0xA2C94E16, // Small 'vpsrlq'. - 0x21FF5727, // Large 'vpsrl|vd'. - 0x200E5727, // Large 'vpsrl|vq'. - 0x25EF5727, // Large 'vpsrl|vw'. + 0x2247581C, // Large 'vpsrl|vd'. + 0x200E581C, // Large 'vpsrl|vq'. + 0x26C1581C, // Large 'vpsrl|vw'. 0xAEC94E16, // Small 'vpsrlw'. 0x842ACE16, // Small 'vpsubb'. 0x882ACE16, // Small 'vpsubd'. 0xA22ACE16, // Small 'vpsubq'. - 0x250D55F3, // Large 'vpsub|sb'. - 0x232D55F3, // Large 'vpsub|sw'. - 0x250D65F3, // Large 'vpsubu|sb'. - 0x232D65F3, // Large 'vpsubu|sw'. + 0x25BA56C5, // Large 'vpsub|sb'. + 0x238356C5, // Large 'vpsub|sw'. + 0x25BA66C5, // Large 'vpsubu|sb'. + 0x238366C5, // Large 'vpsubu|sw'. 0xAE2ACE16, // Small 'vpsubw'. - 0x1026933B, // Large 'vpternlog|d'. - 0x100F933B, // Large 'vpternlog|q'. + 0x10269391, // Large 'vpternlog|d'. + 0x100F9391, // Large 'vpternlog|q'. 0xA932D216, // Small 'vptest'. - 0x205C64CC, // Large 'vptest|mb'. - 0x247764CC, // Large 'vptest|md'. - 0x24D364CC, // Large 'vptest|mq'. - 0x25D764CC, // Large 'vptest|mw'. - 0x205C74CC, // Large 'vptestn|mb'. - 0x247774CC, // Large 'vptestn|md'. - 0x24D374CC, // Large 'vptestn|mq'. - 0x105F84CC, // Large 'vptestnm|w'. - 0x23448237, // Large 'vpunpckh|bw'. - 0x20C58237, // Large 'vpunpckh|dq'. - 0x20C59237, // Large 'vpunpckhq|dq'. - 0x23468237, // Large 'vpunpckh|wd'. - 0x33487237, // Large 'vpunpck|lbw'. - 0x334B7237, // Large 'vpunpck|ldq'. - 0x42407237, // Large 'vpunpck|lqdq'. - 0x334E7237, // Large 'vpunpck|lwd'. + 0x205C656A, // Large 'vptest|mb'. + 0x2504656A, // Large 'vptest|md'. + 0x2571656A, // Large 'vptest|mq'. + 0x26A9656A, // Large 'vptest|mw'. + 0x205C756A, // Large 'vptestn|mb'. + 0x2504756A, // Large 'vptestn|md'. + 0x2571756A, // Large 'vptestn|mq'. + 0x105F856A, // Large 'vptestnm|w'. + 0x239A827F, // Large 'vpunpckh|bw'. + 0x20E5827F, // Large 'vpunpckh|dq'. + 0x20E5927F, // Large 'vpunpckhq|dq'. + 0x239C827F, // Large 'vpunpckh|wd'. + 0x339E727F, // Large 'vpunpck|lbw'. + 0x33A1727F, // Large 'vpunpck|ldq'. + 0x4288727F, // Large 'vpunpck|lqdq'. + 0x33A4727F, // Large 'vpunpck|lwd'. 0x8127E216, // Small 'vpxor'. 0x8927E216, // Small 'vpxord'. 0xA327E216, // Small 'vpxorq'. - 0x208765F9, // Large 'vrange|pd'. - 0x207065F9, // Large 'vrange|ps'. - 0x210E65F9, // Large 'vrange|sd'. - 0x201C65F9, // Large 'vrange|ss'. - 0x208765FF, // Large 'vrcp14|pd'. - 0x207065FF, // Large 'vrcp14|ps'. - 0x210E65FF, // Large 'vrcp14|sd'. - 0x201C65FF, // Large 'vrcp14|ss'. - 0x435945FF, // Large 'vrcp|28pd'. - 0x435D45FF, // Large 'vrcp|28ps'. - 0x436145FF, // Large 'vrcp|28sd'. - 0x436545FF, // Large 'vrcp|28ss'. + 0x20A766CB, // Large 'vrange|pd'. + 0x207D66CB, // Large 'vrange|ps'. + 0x214466CB, // Large 'vrange|sd'. + 0x201C66CB, // Large 'vrange|ss'. + 0x20A766D1, // Large 'vrcp14|pd'. + 0x207D66D1, // Large 'vrcp14|ps'. + 0x214466D1, // Large 'vrcp14|sd'. + 0x201C66D1, // Large 'vrcp14|ss'. + 0x43AF46D1, // Large 'vrcp|28pd'. + 0x43B346D1, // Large 'vrcp|28ps'. + 0x43B746D1, // Large 'vrcp|28sd'. + 0x43BB46D1, // Large 'vrcp|28ss'. 0x91080E56, // Small 'vrcpph'. 0xA7080E56, // Small 'vrcpps'. 0x91380E56, // Small 'vrcpsh'. 0xA7380E56, // Small 'vrcpss'. - 0x208774D5, // Large 'vreduce|pd'. - 0x208274D5, // Large 'vreduce|ph'. - 0x207074D5, // Large 'vreduce|ps'. - 0x210E74D5, // Large 'vreduce|sd'. - 0x20B574D5, // Large 'vreduce|sh'. - 0x201C74D5, // Large 'vreduce|ss'. - 0x20879244, // Large 'vrndscale|pd'. - 0x20829244, // Large 'vrndscale|ph'. - 0x20709244, // Large 'vrndscale|ps'. - 0x210E9244, // Large 'vrndscale|sd'. - 0x20B59244, // Large 'vrndscale|sh'. - 0x201C9244, // Large 'vrndscale|ss'. - 0x30CD5605, // Large 'vroun|dpd'. - 0x30D15605, // Large 'vroun|dps'. - 0x360A5605, // Large 'vroun|dsd'. - 0x10147605, // Large 'vrounds|s'. - 0x20878351, // Large 'vrsqrt14|pd'. - 0x20708351, // Large 'vrsqrt14|ps'. - 0x210E8351, // Large 'vrsqrt14|sd'. - 0x201C8351, // Large 'vrsqrt14|ss'. - 0x43596351, // Large 'vrsqrt|28pd'. - 0x435D6351, // Large 'vrsqrt|28ps'. - 0x43616351, // Large 'vrsqrt|28sd'. - 0x43656351, // Large 'vrsqrt|28ss'. - 0x20826351, // Large 'vrsqrt|ph'. - 0x20706351, // Large 'vrsqrt|ps'. - 0x20B56351, // Large 'vrsqrt|sh'. - 0x201C6351, // Large 'vrsqrt|ss'. - 0x208774DC, // Large 'vscalef|pd'. - 0x208274DC, // Large 'vscalef|ph'. - 0x207074DC, // Large 'vscalef|ps'. - 0x210E74DC, // Large 'vscalef|sd'. - 0x20B574DC, // Large 'vscalef|sh'. - 0x201C74DC, // Large 'vscalef|ss'. - 0x30CD80BA, // Large 'vscatter|dpd'. - 0x30D180BA, // Large 'vscatter|dps'. - 0x2087C0BA, // Large 'vscatterpf0d|pd'. - 0x2070C0BA, // Large 'vscatterpf0d|ps'. - 0x30C6B0BA, // Large 'vscatterpf0|qpd'. - 0x30C9B0BA, // Large 'vscatterpf0|qps'. - 0x40CCA0BA, // Large 'vscatterpf|1dpd'. - 0x40D0A0BA, // Large 'vscatterpf|1dps'. - 0x40D4A0BA, // Large 'vscatterpf|1qpd'. - 0x40D8A0BA, // Large 'vscatterpf|1qps'. - 0x30C680BA, // Large 'vscatter|qpd'. - 0x30C980BA, // Large 'vscatter|qps'. - 0x502B5369, // Large 'vshuf|f32x4'. - 0x4030636E, // Large 'vshuff|64x2'. - 0x503D5369, // Large 'vshuf|i32x4'. - 0x50475369, // Large 'vshuf|i64x2'. - 0x20875369, // Large 'vshuf|pd'. - 0x20705369, // Large 'vshuf|ps'. - 0x31A9472C, // Large 'vsqr|tpd'. - 0x31B4472C, // Large 'vsqr|tph'. - 0x31BD472C, // Large 'vsqr|tps'. - 0x310D472C, // Large 'vsqr|tsd'. - 0x31CF472C, // Large 'vsqr|tsh'. - 0x31D8472C, // Large 'vsqr|tss'. - 0x1023760D, // Large 'vstmxcs|r'. + 0x20A77573, // Large 'vreduce|pd'. + 0x20A27573, // Large 'vreduce|ph'. + 0x207D7573, // Large 'vreduce|ps'. + 0x21447573, // Large 'vreduce|sd'. + 0x20D57573, // Large 'vreduce|sh'. + 0x201C7573, // Large 'vreduce|ss'. + 0x20A7928C, // Large 'vrndscale|pd'. + 0x20A2928C, // Large 'vrndscale|ph'. + 0x207D928C, // Large 'vrndscale|ps'. + 0x2144928C, // Large 'vrndscale|sd'. + 0x20D5928C, // Large 'vrndscale|sh'. + 0x201C928C, // Large 'vrndscale|ss'. + 0x30ED56D7, // Large 'vroun|dpd'. + 0x30F156D7, // Large 'vroun|dps'. + 0x36DC56D7, // Large 'vroun|dsd'. + 0x101476D7, // Large 'vrounds|s'. + 0x20A783A7, // Large 'vrsqrt14|pd'. + 0x207D83A7, // Large 'vrsqrt14|ps'. + 0x214483A7, // Large 'vrsqrt14|sd'. + 0x201C83A7, // Large 'vrsqrt14|ss'. + 0x43AF63A7, // Large 'vrsqrt|28pd'. + 0x43B363A7, // Large 'vrsqrt|28ps'. + 0x43B763A7, // Large 'vrsqrt|28sd'. + 0x43BB63A7, // Large 'vrsqrt|28ss'. + 0x20A263A7, // Large 'vrsqrt|ph'. + 0x207D63A7, // Large 'vrsqrt|ps'. + 0x20D563A7, // Large 'vrsqrt|sh'. + 0x201C63A7, // Large 'vrsqrt|ss'. + 0x20A7757A, // Large 'vscalef|pd'. + 0x20A2757A, // Large 'vscalef|ph'. + 0x207D757A, // Large 'vscalef|ps'. + 0x2144757A, // Large 'vscalef|sd'. + 0x20D5757A, // Large 'vscalef|sh'. + 0x201C757A, // Large 'vscalef|ss'. + 0x30ED80DA, // Large 'vscatter|dpd'. + 0x30F180DA, // Large 'vscatter|dps'. + 0x20A7C0DA, // Large 'vscatterpf0d|pd'. + 0x207DC0DA, // Large 'vscatterpf0d|ps'. + 0x30E6B0DA, // Large 'vscatterpf0|qpd'. + 0x30E9B0DA, // Large 'vscatterpf0|qps'. + 0x40ECA0DA, // Large 'vscatterpf|1dpd'. + 0x40F0A0DA, // Large 'vscatterpf|1dps'. + 0x40F4A0DA, // Large 'vscatterpf|1qpd'. + 0x40F8A0DA, // Large 'vscatterpf|1qps'. + 0x30E680DA, // Large 'vscatter|qpd'. + 0x30E980DA, // Large 'vscatter|qps'. + 0x42957195, // Large 'vsha512|msg1'. + 0x42997195, // Large 'vsha512|msg2'. + 0x207EA195, // Large 'vsha512rnd|s2'. + 0x502B53BF, // Large 'vshuf|f32x4'. + 0x403063C4, // Large 'vshuff|64x2'. + 0x503D53BF, // Large 'vshuf|i32x4'. + 0x504753BF, // Large 'vshuf|i64x2'. + 0x20A753BF, // Large 'vshuf|pd'. + 0x207D53BF, // Large 'vshuf|ps'. + 0x42954581, // Large 'vsm3|msg1'. + 0x42994581, // Large 'vsm3|msg2'. + 0x207E7581, // Large 'vsm3rnd|s2'. + 0x102F76DF, // Large 'vsm4key|4'. + 0x102F8588, // Large 'vsm4rnds|4'. + 0x31F14821, // Large 'vsqr|tpd'. + 0x31FC4821, // Large 'vsqr|tph'. + 0x32054821, // Large 'vsqr|tps'. + 0x320E4821, // Large 'vsqr|tsd'. + 0x32174821, // Large 'vsqr|tsh'. + 0x32204821, // Large 'vsqr|tss'. + 0x102376E6, // Large 'vstmxcs|r'. 0x89015676, // Small 'vsubpd'. 0x91015676, // Small 'vsubph'. 0xA7015676, // Small 'vsubps'. 0x89315676, // Small 'vsubsd'. 0x91315676, // Small 'vsubsh'. 0xA7315676, // Small 'vsubss'. - 0x31A94730, // Large 'vtes|tpd'. - 0x31BD4730, // Large 'vtes|tps'. - 0x210E6614, // Large 'vucomi|sd'. - 0x20B56614, // Large 'vucomi|sh'. - 0x201C6614, // Large 'vucomi|ss'. - 0x208774E3, // Large 'vunpckh|pd'. - 0x207074E3, // Large 'vunpckh|ps'. - 0x34EA64E3, // Large 'vunpck|lpd'. - 0x34ED64E3, // Large 'vunpck|lps'. + 0x31F14825, // Large 'vtes|tpd'. + 0x32054825, // Large 'vtes|tps'. + 0x214466ED, // Large 'vucomi|sd'. + 0x20D566ED, // Large 'vucomi|sh'. + 0x201C66ED, // Large 'vucomi|ss'. + 0x20A77590, // Large 'vunpckh|pd'. + 0x207D7590, // Large 'vunpckh|ps'. + 0x35976590, // Large 'vunpck|lpd'. + 0x359A6590, // Large 'vunpck|lps'. 0x89093F16, // Small 'vxorpd'. 0xA7093F16, // Small 'vxorps'. - 0x361A5374, // Large 'vzero|all'. - 0x33077374, // Large 'vzeroup|per'. + 0x36F353CA, // Large 'vzero|all'. + 0x335D73CA, // Large 'vzeroup|per'. 0x89672457, // Small 'wbinvd'. - 0x21FF661D, // Large 'wbnoin|vd'. - 0x33B05623, // Large 'wrfsb|ase'. - 0x33B05628, // Large 'wrgsb|ase'. + 0x224766F6, // Large 'wbnoin|vd'. + 0x343656FC, // Large 'wrfsb|ase'. + 0x34365701, // Large 'wrgsb|ase'. 0x8129B657, // Small 'wrmsr'. 0x8049CE57, // Small 'wrssd'. 0x8119CE57, // Small 'wrssq'. @@ -4485,53 +4647,56 @@ const uint32_t InstDB::_instNameIndexTable[] = { 0x800049F8, // Small 'xor'. 0x804849F8, // Small 'xorpd'. 0x813849F8, // Small 'xorps'. - 0x101584F0, // Large 'xresldtr|k'. + 0x1015859D, // Large 'xresldtr|k'. 0xA4FA4E58, // Small 'xrstor'. - 0x20306386, // Large 'xrstor|64'. - 0x10146386, // Large 'xrstor|s'. - 0x34F86386, // Large 'xrstor|s64'. + 0x2030640C, // Large 'xrstor|64'. + 0x1014640C, // Large 'xrstor|s'. + 0x35A5640C, // Large 'xrstor|s64'. 0x805B0678, // Small 'xsave'. - 0x2030537B, // Large 'xsave|64'. + 0x203053D1, // Large 'xsave|64'. 0x865B0678, // Small 'xsavec'. - 0x362D537B, // Large 'xsave|c64'. - 0x0000837B, // Large 'xsaveopt'. - 0x2030837B, // Large 'xsaveopt|64'. + 0x370653D1, // Large 'xsave|c64'. + 0x000083D1, // Large 'xsaveopt'. + 0x203083D1, // Large 'xsaveopt|64'. 0xA65B0678, // Small 'xsaves'. - 0x34F8537B, // Large 'xsave|s64'. + 0x35A553D1, // Large 'xsave|s64'. 0xAC2A1678, // Small 'xsetbv'. - 0x101584FB, // Large 'xsusldtr|k'. + 0x101585A8, // Large 'xsusldtr|k'. 0x81499698 // Small 'xtest'. }; const char InstDB::_instNameStringTable[] = "vgf2p8affineinvqbvaeskeygenassistvbroadcastf32x464x264x4i32x2i32x4i32x8i64x2i64x" - "4vpbroadcastmb2w2d128i128vcvtne2ps2bf1vfmaddsub132ph213pd213ph213ps231pd231ph231" - "psvfmsubadd132vpmultishiftvscatterpf0dqpdqps1dpd1dps1qpd1qpsvcvtneps2bf1vextracv" - "extractfvgatherpf0vp2intersectsdvfnmadd132213sd213sh213ss231sd231sh231ssvfnmsub1" - "32vinservinsertfvpshufbitqprefetchntwt1saveprevsssha256rndtileloaddtilereleavaes" - "declvaesenclvcompressvcvttpd2uqqvcvttph2uvcvttps2uvcvttsd2uvcvttsh2uvcvttss2uvfi" - "xupimmvfmadd132vfmsub132vmaskmovdqvpcompressvpconflictvphminposuvpmadd52hluqvpsc" - "atterqdvpunpckhqlqdqvrndscaleclflushopcmpxchg16t0t2msg1msg2tilestorev4fnmaddssvc" - "vtpd2uvcvtph2psudqvcvtps2phvcvtsd2uvcvtsh2uvcvtss2uvcvtudq2vcvtuqq2vcvtusi2vfcma" - "ddcvfpclassvgetmanmulbvp4dpwssvpclmuvpcmpestrvpcmpistrvperm2fvpermil2vpgathervpm" - "acssdqvpmadcsswubswvpmaskmovpternlogbwwdlbwldqlwdvrsqrt1428pd28ps28sd28ssvshufvs" - "huffvzeroupxsaveopt8bfxrstorldtilecfmovdir64pvalidarmpadjurmpupdaserialisha1nexs" - "ha1rndssttilecftdpbf16v4fmadvaddsubvblendmvpdvcvtdq2uwvcvtqq2vcvtsi2vcvtuwvdbpsa" - "dvdpbf16vexpanvfcmulccphcshvgetexpvmovdqau16u32u64vmovmskvmovntvmovshdvmovsldvpa" - "ckssdwbvpackuswbvpblendmdvpdpbusvpdpwss2pdvpermtvpexpanvphaddubwqdqhvpmovmskvpmo" - "vsxbvpmovusqwvpmovzxbvpmulhrvptestnmqvreducevscalefvunpckhlpdlpsxresldtrs64xsusl" - "dtrcldemoclrssbscvtpifcmovnbfxsavekortestkshiftrbkunpckmonitorpfrcpipfrsqirtvrdf" - "sbrdgsbsspsenduisetssbssysesysexvcvtwvfmulvldmxcsvmlaundupu8vmovhvmovlhvmpsadvmr" - "esumvpadduvpaligngtbgtdgtqgtw2qbdbqvphsubvplzcnb2md2mq2mw2mvpopcnvpshldvqvpshrdv" - "whwvpsubuvrangevrcp14vroundsdvstmxcsvucomiallwbnoinwrfsbwrgsbc64blcfiblsfiendbre" - "nqcmbefdecsfincsfnstefrndfsincfucomppfyl2xincsspqinvlinvpcinvvpmcommmovq2pavgupf" - "cmpepfpnaptwrisyscsysretdpbuvaesivaligvandnvcomivfrczvhadvhsubvmclevmmcvmovavmov" - "uvmptvmwrivpandvpextrwvpinsvpmaxvpminvprolvprorvpsadvpsigvpslvpsllvpsravpsrlvsqr" - "vtes"; + "4vpbroadcastmb2w2dvbcstnebf162p128i128vcvtne2ps2vcvtneebf16vcvtneobf16vfmaddsub1" + "32ph213pd213ph213ps231pd231ph231psvfmsubadd132vpmultishiftvscatterpf0dqpdqps1dpd" + "1dps1qpd1qpsvcvtneps2vextracvextractfvgatherpf0vp2intersecttcmmimfp16tcmmrlfp16s" + "h2pssdph2psvfnmadd132213sd213sh213ss231sd231sh231ssvfnmsub132vinservinsertfvpshu" + "fbitqvsha512rndprefetchitntawt1saveprevsssha256rndtileloaddtilereleavaesdeclvaes" + "enclvcompressvcvttpd2uqqvcvttph2uvcvttps2uvcvttsd2uvcvttsh2uvcvttss2uvfixupimmvf" + "madd132vfmsub132vmaskmovdqvpcompressvpconflictvphminposuvpmadd52hluqvpscatterqdv" + "punpckhqlqdqvrndscalemsg1msg2clflushopcmpnbexcmpnlexcmpxchg16t0t2tilestorev4fnma" + "ddssvcvtpd2uvcvtph2psudqvcvtps2phvcvtsd2uvcvtsh2uvcvtss2uvcvtudq2vcvtuqq2vcvtusi" + "2vfcmaddcvfpclassvgetmanmulbvp4dpwssvpclmuvpcmpestrvpcmpistrvperm2fvpermil2vpgat" + "hervpmacssdqvpmadcsswubswvpmaskmovpternlogbwwdlbwldqlwdvrsqrt1428pd28ps28sd28ssv" + "shufvshuffvzeroupxsaveoptcmpbexcmplexcmpnbxcmpnlxcmpnoxcmpnpxcmpnsxcmpnzx8bfxrst" + "orldtilecfmovdir64pvalidarmpadjurmpupdaserialisha1nexsha1rndssttilecftdpbf16tdpf" + "p16v4fmadvaddsubvblendmvpdvcvtdq2uwvcvtqq2vcvtsi2vcvtuwvdbpsadvdpbf16vexpanvfcmu" + "lccphcshvgetexpvmovdqau16u32u64vmovmskvmovntvmovshdvmovsldvpackssdwbvpackuswbvpb" + "lendmdvpdpbssudsvpdpbusvpdpwssvpdpwus2pdvpermtvpexpanvphaddubwqdqhvpmovmskvpmovs" + "xbvpmovusqwvpmovzxbvpmulhrvptestnmqvreducevscalefvsm3rndvsm4rndsvunpckhlpdlpsxre" + "sldtrs64xsusldtrcldemoclrssbscmpbxcmplxcmpoxcmppxcmpsxcmpzxcvtpifcmovfxsavekorte" + "stkshiftrbkunpckmonitorpfrcpipfrsqirtvrdfsbrdgsbsspseamcalsenduisetssbssysesysex" + "vcvtwvfmulvldmxcsvmlaundupu8vmovhvmovlhvmpsadvmresumvpadduvpaligngtbgtdgtqgtw2b2" + "qbdbqvphsubvplzcnb2md2mq2mw2mvpopcnvpshldvqvpshrdvwhwvpsubuvrangevrcp14vroundsdv" + "sm4keyvstmxcsvucomiallwbnoinwrfsbwrgsbc64blcfiblsficmovnendbrenqcmnufdecsfincsfn" + "stefrndfsincfucomfyl2xincsspqinvlinvlpinvpcinvvpmcommmovq2pavgupfcmpepfpnaptwris" + "eamoseamrsyscsysretdpbutlbsyvaesivaligvandnvcomivfrczvhadvhsubvmclevmgexvmmcvmov" + "avmovuvmptvmwrivpandvpextrwvpinsvpmaxvpminvprolvprorvpsadvpsigvpslvpsllvpsravpsr" + "lvsqrvtes"; const InstDB::InstNameIndex InstDB::instNameIndex[26] = { - { Inst::kIdAaa , Inst::kIdArpl + 1 }, + { Inst::kIdAaa , Inst::kIdAxor + 1 }, { Inst::kIdBextr , Inst::kIdBzhi + 1 }, { Inst::kIdCall , Inst::kIdCwde + 1 }, { Inst::kIdDaa , Inst::kIdDpps + 1 }, @@ -4583,515 +4748,575 @@ const InstDB::InstSignature InstDB::_instSignatureTable[] = { ROW(2, 1, 1, 0, 9 , 10 , 0 , 0 , 0 , 0 ), // {r8lo|r8hi|m8, i8|u8} ROW(2, 1, 1, 0, 11 , 12 , 0 , 0 , 0 , 0 ), // {r16|m16, i16|u16} ROW(2, 1, 1, 0, 13 , 14 , 0 , 0 , 0 , 0 ), // {r32|m32, i32|u32} - ROW(2, 0, 1, 0, 15 , 16 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, i32} + ROW(2, 0, 1, 0, 15 , 16 , 0 , 0 , 0 , 0 ), // {r64|m64, i32} ROW(2, 0, 1, 0, 8 , 17 , 0 , 0 , 0 , 0 ), // {r64, i64|u64|m64|mem|sreg|creg|dreg} ROW(2, 1, 1, 0, 2 , 18 , 0 , 0 , 0 , 0 ), // {r8lo|r8hi, m8|mem} ROW(2, 1, 1, 0, 4 , 19 , 0 , 0 , 0 , 0 ), // {r16, m16|mem|sreg} ROW(2, 1, 1, 0, 6 , 20 , 0 , 0 , 0 , 0 ), // {r32, m32|mem|sreg} ROW(2, 1, 1, 0, 21 , 22 , 0 , 0 , 0 , 0 ), // {m16|mem, sreg} + ROW(2, 1, 1, 0, 21 , 22 , 0 , 0 , 0 , 0 ), // {m16|mem, sreg} + ROW(2, 0, 1, 0, 21 , 22 , 0 , 0 , 0 , 0 ), // {m16|mem, sreg} ROW(2, 1, 1, 0, 22 , 21 , 0 , 0 , 0 , 0 ), // {sreg, m16|mem} + ROW(2, 1, 1, 0, 22 , 21 , 0 , 0 , 0 , 0 ), // {sreg, m16|mem} + ROW(2, 0, 1, 0, 22 , 21 , 0 , 0 , 0 , 0 ), // {sreg, m16|mem} ROW(2, 1, 0, 0, 6 , 23 , 0 , 0 , 0 , 0 ), // {r32, creg|dreg} ROW(2, 1, 0, 0, 23 , 6 , 0 , 0 , 0 , 0 ), // {creg|dreg, r32} - ROW(2, 1, 1, 0, 9 , 10 , 0 , 0 , 0 , 0 ), // #16 {r8lo|r8hi|m8, i8|u8} + ROW(2, 1, 1, 0, 9 , 10 , 0 , 0 , 0 , 0 ), // #20 {r8lo|r8hi|m8, i8|u8} ROW(2, 1, 1, 0, 11 , 12 , 0 , 0 , 0 , 0 ), // {r16|m16, i16|u16} ROW(2, 1, 1, 0, 13 , 14 , 0 , 0 , 0 , 0 ), // {r32|m32, i32|u32} - ROW(2, 0, 1, 0, 15 , 24 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, i32|r64} - ROW(2, 1, 1, 0, 25 , 26 , 0 , 0 , 0 , 0 ), // {r16|m16|r32|m32|r64|m64|mem, i8} - ROW(2, 1, 1, 0, 1 , 2 , 0 , 0 , 0 , 0 ), // {r8lo|r8hi|m8|mem, r8lo|r8hi} + ROW(2, 0, 1, 0, 15 , 24 , 0 , 0 , 0 , 0 ), // {r64|m64, i32|i8} + ROW(2, 1, 1, 0, 25 , 26 , 0 , 0 , 0 , 0 ), // {r16|m16|r32|m32, i8} + ROW(2, 1, 1, 0, 1 , 2 , 0 , 0 , 0 , 0 ), // #25 {r8lo|r8hi|m8|mem, r8lo|r8hi} ROW(2, 1, 1, 0, 27 , 4 , 0 , 0 , 0 , 0 ), // {r16|m16|mem, r16} - ROW(2, 1, 1, 0, 28 , 6 , 0 , 0 , 0 , 0 ), // #23 {r32|m32|mem, r32} + ROW(2, 1, 1, 0, 28 , 6 , 0 , 0 , 0 , 0 ), // #27 {r32|m32|mem, r32} + ROW(2, 0, 1, 0, 29 , 8 , 0 , 0 , 0 , 0 ), // #28 {r64|m64|mem, r64} ROW(2, 1, 1, 0, 2 , 18 , 0 , 0 , 0 , 0 ), // {r8lo|r8hi, m8|mem} ROW(2, 1, 1, 0, 4 , 21 , 0 , 0 , 0 , 0 ), // {r16, m16|mem} - ROW(2, 1, 1, 0, 6 , 29 , 0 , 0 , 0 , 0 ), // {r32, m32|mem} - ROW(2, 0, 1, 0, 8 , 30 , 0 , 0 , 0 , 0 ), // {r64, m64|mem} - ROW(2, 1, 1, 0, 31 , 10 , 0 , 0 , 0 , 0 ), // #28 {r8lo|r8hi|m8|r16|m16|r32|m32|r64|m64|mem, i8|u8} + ROW(2, 1, 1, 0, 6 , 30 , 0 , 0 , 0 , 0 ), // {r32, m32|mem} + ROW(2, 0, 1, 0, 8 , 31 , 0 , 0 , 0 , 0 ), // {r64, m64|mem} + ROW(2, 1, 1, 0, 32 , 10 , 0 , 0 , 0 , 0 ), // #33 {r8lo|r8hi|m8|r16|m16|r32|m32, i8|u8} ROW(2, 1, 1, 0, 11 , 12 , 0 , 0 , 0 , 0 ), // {r16|m16, i16|u16} ROW(2, 1, 1, 0, 13 , 14 , 0 , 0 , 0 , 0 ), // {r32|m32, i32|u32} - ROW(2, 0, 1, 0, 8 , 32 , 0 , 0 , 0 , 0 ), // {r64, u32|i32|r64|m64|mem} - ROW(2, 0, 1, 0, 30 , 24 , 0 , 0 , 0 , 0 ), // {m64|mem, i32|r64} + ROW(2, 0, 1, 0, 8 , 33 , 0 , 0 , 0 , 0 ), // {r64, u32|i32|i8|u8|r64|m64|mem} + ROW(2, 0, 1, 0, 34 , 35 , 0 , 0 , 0 , 0 ), // {m64, i32|i8|u8} ROW(2, 1, 1, 0, 1 , 2 , 0 , 0 , 0 , 0 ), // {r8lo|r8hi|m8|mem, r8lo|r8hi} ROW(2, 1, 1, 0, 27 , 4 , 0 , 0 , 0 , 0 ), // {r16|m16|mem, r16} ROW(2, 1, 1, 0, 28 , 6 , 0 , 0 , 0 , 0 ), // {r32|m32|mem, r32} + ROW(2, 0, 1, 0, 31 , 8 , 0 , 0 , 0 , 0 ), // {m64|mem, r64} ROW(2, 1, 1, 0, 2 , 18 , 0 , 0 , 0 , 0 ), // {r8lo|r8hi, m8|mem} ROW(2, 1, 1, 0, 4 , 21 , 0 , 0 , 0 , 0 ), // {r16, m16|mem} - ROW(2, 1, 1, 0, 6 , 29 , 0 , 0 , 0 , 0 ), // {r32, m32|mem} - ROW(2, 1, 1, 1, 33 , 1 , 0 , 0 , 0 , 0 ), // #39 {, r8lo|r8hi|m8|mem} - ROW(3, 1, 1, 2, 34 , 33 , 27 , 0 , 0 , 0 ), // {, , r16|m16|mem} - ROW(3, 1, 1, 2, 35 , 36 , 28 , 0 , 0 , 0 ), // {, , r32|m32|mem} - ROW(3, 0, 1, 2, 37 , 38 , 15 , 0 , 0 , 0 ), // {, , r64|m64|mem} - ROW(2, 1, 1, 0, 4 , 39 , 0 , 0 , 0 , 0 ), // {r16, r16|m16|mem|i8|i16|u16} - ROW(2, 1, 1, 0, 6 , 40 , 0 , 0 , 0 , 0 ), // {r32, r32|m32|mem|i8|i32|u32} - ROW(2, 0, 1, 0, 8 , 41 , 0 , 0 , 0 , 0 ), // {r64, r64|m64|mem|i8|i32} + ROW(2, 1, 1, 0, 6 , 30 , 0 , 0 , 0 , 0 ), // {r32, m32|mem} + ROW(2, 1, 1, 1, 36 , 1 , 0 , 0 , 0 , 0 ), // #45 {, r8lo|r8hi|m8|mem} + ROW(3, 1, 1, 2, 37 , 36 , 27 , 0 , 0 , 0 ), // {, , r16|m16|mem} + ROW(3, 1, 1, 2, 38 , 39 , 28 , 0 , 0 , 0 ), // {, , r32|m32|mem} + ROW(3, 0, 1, 2, 40 , 41 , 29 , 0 , 0 , 0 ), // {, , r64|m64|mem} + ROW(2, 1, 1, 0, 4 , 27 , 0 , 0 , 0 , 0 ), // #49 {r16, r16|m16|mem} + ROW(2, 1, 1, 0, 6 , 28 , 0 , 0 , 0 , 0 ), // #50 {r32, r32|m32|mem} + ROW(2, 0, 1, 0, 8 , 29 , 0 , 0 , 0 , 0 ), // {r64, r64|m64|mem} ROW(3, 1, 1, 0, 4 , 27 , 42 , 0 , 0 , 0 ), // {r16, r16|m16|mem, i8|i16|u16} ROW(3, 1, 1, 0, 6 , 28 , 43 , 0 , 0 , 0 ), // {r32, r32|m32|mem, i8|i32|u32} - ROW(3, 0, 1, 0, 8 , 15 , 44 , 0 , 0 , 0 ), // {r64, r64|m64|mem, i8|i32} - ROW(2, 0, 1, 0, 8 , 45 , 0 , 0 , 0 , 0 ), // #49 {r64, i64|u64} - ROW(2, 0, 1, 0, 46 , 18 , 0 , 0 , 0 , 0 ), // {al, m8|mem} - ROW(2, 0, 1, 0, 47 , 21 , 0 , 0 , 0 , 0 ), // {ax, m16|mem} - ROW(2, 0, 1, 0, 48 , 29 , 0 , 0 , 0 , 0 ), // {eax, m32|mem} - ROW(2, 0, 1, 0, 49 , 30 , 0 , 0 , 0 , 0 ), // {rax, m64|mem} - ROW(2, 0, 1, 0, 18 , 46 , 0 , 0 , 0 , 0 ), // {m8|mem, al} - ROW(2, 0, 1, 0, 21 , 47 , 0 , 0 , 0 , 0 ), // {m16|mem, ax} - ROW(2, 0, 1, 0, 29 , 48 , 0 , 0 , 0 , 0 ), // {m32|mem, eax} - ROW(2, 0, 1, 0, 30 , 49 , 0 , 0 , 0 , 0 ), // {m64|mem, rax} - ROW(2, 1, 1, 0, 1 , 2 , 0 , 0 , 0 , 0 ), // #58 {r8lo|r8hi|m8|mem, r8lo|r8hi} - ROW(2, 1, 1, 0, 27 , 4 , 0 , 0 , 0 , 0 ), // {r16|m16|mem, r16} - ROW(2, 1, 1, 0, 28 , 6 , 0 , 0 , 0 , 0 ), // {r32|m32|mem, r32} - ROW(2, 0, 1, 0, 15 , 8 , 0 , 0 , 0 , 0 ), // #61 {r64|m64|mem, r64} - ROW(2, 1, 1, 0, 2 , 18 , 0 , 0 , 0 , 0 ), // {r8lo|r8hi, m8|mem} - ROW(2, 1, 1, 0, 4 , 21 , 0 , 0 , 0 , 0 ), // {r16, m16|mem} - ROW(2, 1, 1, 0, 6 , 29 , 0 , 0 , 0 , 0 ), // {r32, m32|mem} - ROW(2, 0, 1, 0, 8 , 30 , 0 , 0 , 0 , 0 ), // {r64, m64|mem} - ROW(2, 1, 1, 0, 9 , 10 , 0 , 0 , 0 , 0 ), // #66 {r8lo|r8hi|m8, i8|u8} + ROW(3, 0, 1, 0, 8 , 29 , 24 , 0 , 0 , 0 ), // {r64, r64|m64|mem, i8|i32} + ROW(2, 0, 1, 0, 8 , 44 , 0 , 0 , 0 , 0 ), // #55 {r64, i64|u64} + ROW(2, 1, 1, 0, 45 , 18 , 0 , 0 , 0 , 0 ), // {al, m8|mem} + ROW(2, 1, 1, 0, 46 , 21 , 0 , 0 , 0 , 0 ), // {ax, m16|mem} + ROW(2, 1, 1, 0, 47 , 30 , 0 , 0 , 0 , 0 ), // {eax, m32|mem} + ROW(2, 0, 1, 0, 48 , 31 , 0 , 0 , 0 , 0 ), // {rax, m64|mem} + ROW(2, 1, 1, 0, 18 , 45 , 0 , 0 , 0 , 0 ), // {m8|mem, al} + ROW(2, 1, 1, 0, 21 , 46 , 0 , 0 , 0 , 0 ), // {m16|mem, ax} + ROW(2, 1, 1, 0, 30 , 47 , 0 , 0 , 0 , 0 ), // {m32|mem, eax} + ROW(2, 0, 1, 0, 31 , 48 , 0 , 0 , 0 , 0 ), // {m64|mem, rax} + ROW(2, 1, 1, 0, 9 , 10 , 0 , 0 , 0 , 0 ), // #64 {r8lo|r8hi|m8, i8|u8} ROW(2, 1, 1, 0, 11 , 12 , 0 , 0 , 0 , 0 ), // {r16|m16, i16|u16} ROW(2, 1, 1, 0, 13 , 14 , 0 , 0 , 0 , 0 ), // {r32|m32, i32|u32} - ROW(2, 0, 1, 0, 15 , 24 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, i32|r64} + ROW(2, 0, 1, 0, 15 , 16 , 0 , 0 , 0 , 0 ), // {r64|m64, i32} ROW(2, 1, 1, 0, 1 , 2 , 0 , 0 , 0 , 0 ), // {r8lo|r8hi|m8|mem, r8lo|r8hi} ROW(2, 1, 1, 0, 27 , 4 , 0 , 0 , 0 , 0 ), // {r16|m16|mem, r16} ROW(2, 1, 1, 0, 28 , 6 , 0 , 0 , 0 , 0 ), // {r32|m32|mem, r32} - ROW(2, 1, 1, 0, 4 , 21 , 0 , 0 , 0 , 0 ), // #73 {r16, m16|mem} - ROW(2, 1, 1, 0, 6 , 29 , 0 , 0 , 0 , 0 ), // {r32, m32|mem} - ROW(2, 0, 1, 0, 8 , 30 , 0 , 0 , 0 , 0 ), // {r64, m64|mem} + ROW(2, 0, 1, 0, 29 , 8 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, r64} + ROW(2, 1, 1, 0, 49 , 50 , 0 , 0 , 0 , 0 ), // #72 {xmm, xmm|m128|mem} + ROW(2, 1, 1, 0, 51 , 49 , 0 , 0 , 0 , 0 ), // #73 {m128|mem, xmm} + ROW(2, 1, 1, 0, 52 , 53 , 0 , 0 , 0 , 0 ), // {ymm, ymm|m256|mem} + ROW(2, 1, 1, 0, 54 , 52 , 0 , 0 , 0 , 0 ), // {m256|mem, ymm} + ROW(2, 1, 1, 0, 51 , 49 , 0 , 0 , 0 , 0 ), // {m128|mem, xmm} + ROW(2, 1, 1, 0, 54 , 52 , 0 , 0 , 0 , 0 ), // {m256|mem, ymm} + ROW(2, 1, 1, 0, 55 , 56 , 0 , 0 , 0 , 0 ), // #78 {zmm, zmm|m512|mem} + ROW(2, 1, 1, 0, 57 , 55 , 0 , 0 , 0 , 0 ), // {m512|mem, zmm} + ROW(2, 1, 1, 0, 31 , 49 , 0 , 0 , 0 , 0 ), // #80 {m64|mem, xmm} + ROW(2, 1, 1, 0, 49 , 31 , 0 , 0 , 0 , 0 ), // {xmm, m64|mem} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // #82 {xmm, xmm, xmm} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // {xmm, xmm, xmm} + ROW(2, 1, 1, 0, 31 , 49 , 0 , 0 , 0 , 0 ), // {m64|mem, xmm} + ROW(2, 1, 1, 0, 49 , 31 , 0 , 0 , 0 , 0 ), // {xmm, m64|mem} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // {xmm, xmm, xmm} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // {xmm, xmm, xmm} + ROW(2, 1, 1, 0, 30 , 49 , 0 , 0 , 0 , 0 ), // #88 {m32|mem, xmm} + ROW(2, 1, 1, 0, 49 , 30 , 0 , 0 , 0 , 0 ), // {xmm, m32|mem} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // {xmm, xmm, xmm} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // {xmm, xmm, xmm} + ROW(2, 1, 1, 0, 30 , 49 , 0 , 0 , 0 , 0 ), // {m32|mem, xmm} + ROW(2, 1, 1, 0, 49 , 30 , 0 , 0 , 0 , 0 ), // {xmm, m32|mem} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // {xmm, xmm, xmm} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // {xmm, xmm, xmm} + ROW(3, 1, 1, 0, 49 , 49 , 58 , 0 , 0 , 0 ), // #96 {xmm, xmm, xmm|m128|mem|i8|u8} + ROW(3, 1, 1, 0, 49 , 51 , 10 , 0 , 0 , 0 ), // {xmm, m128|mem, i8|u8} + ROW(3, 1, 1, 0, 52 , 52 , 59 , 0 , 0 , 0 ), // {ymm, ymm, ymm|m256|mem|i8|u8} + ROW(3, 1, 1, 0, 52 , 54 , 10 , 0 , 0 , 0 ), // {ymm, m256|mem, i8|u8} + ROW(3, 1, 1, 0, 55 , 55 , 60 , 0 , 0 , 0 ), // {zmm, zmm, zmm|m512|mem|i8|u8} + ROW(3, 1, 1, 0, 49 , 51 , 10 , 0 , 0 , 0 ), // {xmm, m128|mem, i8|u8} + ROW(3, 1, 1, 0, 52 , 54 , 10 , 0 , 0 , 0 ), // {ymm, m256|mem, i8|u8} + ROW(3, 1, 1, 0, 55 , 57 , 10 , 0 , 0 , 0 ), // {zmm, m512|mem, i8|u8} + ROW(2, 1, 1, 0, 4 , 21 , 0 , 0 , 0 , 0 ), // #104 {r16, m16|mem} + ROW(2, 1, 1, 0, 6 , 30 , 0 , 0 , 0 , 0 ), // {r32, m32|mem} + ROW(2, 0, 1, 0, 8 , 31 , 0 , 0 , 0 , 0 ), // {r64, m64|mem} ROW(2, 1, 1, 0, 21 , 4 , 0 , 0 , 0 , 0 ), // {m16|mem, r16} - ROW(2, 1, 1, 0, 29 , 6 , 0 , 0 , 0 , 0 ), // #77 {m32|mem, r32} - ROW(2, 0, 1, 0, 30 , 8 , 0 , 0 , 0 , 0 ), // {m64|mem, r64} - ROW(2, 1, 1, 0, 50 , 51 , 0 , 0 , 0 , 0 ), // #79 {xmm, xmm|m128|mem} - ROW(2, 1, 1, 0, 52 , 50 , 0 , 0 , 0 , 0 ), // #80 {m128|mem, xmm} - ROW(2, 1, 1, 0, 53 , 54 , 0 , 0 , 0 , 0 ), // {ymm, ymm|m256|mem} - ROW(2, 1, 1, 0, 55 , 53 , 0 , 0 , 0 , 0 ), // {m256|mem, ymm} - ROW(2, 1, 1, 0, 56 , 57 , 0 , 0 , 0 , 0 ), // #83 {zmm, zmm|m512|mem} - ROW(2, 1, 1, 0, 58 , 56 , 0 , 0 , 0 , 0 ), // {m512|mem, zmm} - ROW(3, 1, 1, 0, 50 , 50 , 59 , 0 , 0 , 0 ), // #85 {xmm, xmm, xmm|m128|mem|i8|u8} - ROW(3, 1, 1, 0, 50 , 52 , 10 , 0 , 0 , 0 ), // {xmm, m128|mem, i8|u8} - ROW(3, 1, 1, 0, 53 , 53 , 60 , 0 , 0 , 0 ), // {ymm, ymm, ymm|m256|mem|i8|u8} - ROW(3, 1, 1, 0, 53 , 55 , 10 , 0 , 0 , 0 ), // {ymm, m256|mem, i8|u8} - ROW(3, 1, 1, 0, 56 , 56 , 61 , 0 , 0 , 0 ), // {zmm, zmm, zmm|m512|mem|i8|u8} - ROW(3, 1, 1, 0, 56 , 58 , 10 , 0 , 0 , 0 ), // {zmm, m512|mem, i8|u8} - ROW(3, 1, 1, 0, 50 , 50 , 59 , 0 , 0 , 0 ), // #91 {xmm, xmm, i8|u8|xmm|m128|mem} - ROW(3, 1, 1, 0, 53 , 53 , 59 , 0 , 0 , 0 ), // {ymm, ymm, i8|u8|xmm|m128|mem} - ROW(3, 1, 1, 0, 50 , 52 , 10 , 0 , 0 , 0 ), // {xmm, m128|mem, i8|u8} - ROW(3, 1, 1, 0, 53 , 55 , 10 , 0 , 0 , 0 ), // {ymm, m256|mem, i8|u8} - ROW(3, 1, 1, 0, 56 , 56 , 59 , 0 , 0 , 0 ), // {zmm, zmm, xmm|m128|mem|i8|u8} - ROW(3, 1, 1, 0, 56 , 58 , 10 , 0 , 0 , 0 ), // {zmm, m512|mem, i8|u8} - ROW(3, 1, 1, 0, 50 , 50 , 59 , 0 , 0 , 0 ), // #97 {xmm, xmm, xmm|m128|mem|i8|u8} - ROW(3, 1, 1, 0, 50 , 52 , 10 , 0 , 0 , 0 ), // {xmm, m128|mem, i8|u8} - ROW(3, 1, 1, 0, 53 , 53 , 59 , 0 , 0 , 0 ), // {ymm, ymm, xmm|m128|mem|i8|u8} - ROW(3, 1, 1, 0, 53 , 55 , 10 , 0 , 0 , 0 ), // {ymm, m256|mem, i8|u8} - ROW(3, 1, 1, 0, 56 , 56 , 59 , 0 , 0 , 0 ), // {zmm, zmm, xmm|m128|mem|i8|u8} - ROW(3, 1, 1, 0, 56 , 58 , 10 , 0 , 0 , 0 ), // {zmm, m512|mem, i8|u8} - ROW(2, 1, 1, 0, 62 , 63 , 0 , 0 , 0 , 0 ), // #103 {mm, mm|m64|mem|r64} - ROW(2, 1, 1, 0, 15 , 64 , 0 , 0 , 0 , 0 ), // {m64|mem|r64, mm|xmm} - ROW(2, 0, 1, 0, 50 , 15 , 0 , 0 , 0 , 0 ), // {xmm, r64|m64|mem} - ROW(2, 1, 1, 0, 50 , 65 , 0 , 0 , 0 , 0 ), // #106 {xmm, xmm|m64|mem} - ROW(2, 1, 1, 0, 30 , 50 , 0 , 0 , 0 , 0 ), // #107 {m64|mem, xmm} - ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #108 {} - ROW(1, 1, 1, 0, 66 , 0 , 0 , 0 , 0 , 0 ), // {r16|m16|r32|m32|r64|m64} + ROW(2, 1, 1, 0, 30 , 6 , 0 , 0 , 0 , 0 ), // #108 {m32|mem, r32} + ROW(2, 0, 1, 0, 31 , 8 , 0 , 0 , 0 , 0 ), // {m64|mem, r64} + ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #110 {} + ROW(1, 1, 1, 0, 25 , 0 , 0 , 0 , 0 , 0 ), // {r16|m16|r32|m32} + ROW(1, 0, 1, 0, 15 , 0 , 0 , 0 , 0 , 0 ), // {r64|m64} ROW(2, 1, 1, 0, 27 , 4 , 0 , 0 , 0 , 0 ), // {r16|m16|mem, r16} ROW(2, 1, 1, 0, 28 , 6 , 0 , 0 , 0 , 0 ), // {r32|m32|mem, r32} - ROW(2, 1, 1, 0, 15 , 8 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, r64} - ROW(3, 1, 1, 0, 50 , 67 , 50 , 0 , 0 , 0 ), // #113 {xmm, vm32x, xmm} - ROW(3, 1, 1, 0, 53 , 68 , 53 , 0 , 0 , 0 ), // {ymm, vm32y, ymm} - ROW(2, 1, 1, 0, 50 , 67 , 0 , 0 , 0 , 0 ), // {xmm, vm32x} - ROW(2, 1, 1, 0, 53 , 68 , 0 , 0 , 0 , 0 ), // {ymm, vm32y} - ROW(2, 1, 1, 0, 56 , 69 , 0 , 0 , 0 , 0 ), // {zmm, vm32z} - ROW(3, 1, 1, 0, 50 , 70 , 50 , 0 , 0 , 0 ), // #118 {xmm, vm64x, xmm} - ROW(3, 1, 1, 0, 53 , 71 , 53 , 0 , 0 , 0 ), // {ymm, vm64y, ymm} - ROW(2, 1, 1, 0, 50 , 70 , 0 , 0 , 0 , 0 ), // {xmm, vm64x} - ROW(2, 1, 1, 0, 53 , 71 , 0 , 0 , 0 , 0 ), // {ymm, vm64y} - ROW(2, 1, 1, 0, 56 , 72 , 0 , 0 , 0 , 0 ), // {zmm, vm64z} - ROW(2, 1, 1, 0, 25 , 10 , 0 , 0 , 0 , 0 ), // #123 {r16|m16|r32|m32|r64|m64|mem, i8|u8} + ROW(2, 0, 1, 0, 29 , 8 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, r64} + ROW(2, 1, 1, 0, 49 , 50 , 0 , 0 , 0 , 0 ), // #116 {xmm, xmm|m128|mem} + ROW(2, 1, 1, 0, 51 , 49 , 0 , 0 , 0 , 0 ), // {m128|mem, xmm} + ROW(2, 1, 1, 0, 52 , 53 , 0 , 0 , 0 , 0 ), // {ymm, ymm|m256|mem} + ROW(2, 1, 1, 0, 54 , 52 , 0 , 0 , 0 , 0 ), // {m256|mem, ymm} + ROW(2, 1, 1, 0, 55 , 56 , 0 , 0 , 0 , 0 ), // {zmm, zmm|m512|mem} + ROW(2, 1, 1, 0, 57 , 55 , 0 , 0 , 0 , 0 ), // {m512|mem, zmm} + ROW(3, 1, 1, 0, 49 , 49 , 58 , 0 , 0 , 0 ), // #122 {xmm, xmm, i8|u8|xmm|m128|mem} + ROW(3, 1, 1, 0, 52 , 52 , 58 , 0 , 0 , 0 ), // {ymm, ymm, i8|u8|xmm|m128|mem} + ROW(3, 1, 1, 0, 49 , 51 , 10 , 0 , 0 , 0 ), // {xmm, m128|mem, i8|u8} + ROW(3, 1, 1, 0, 52 , 54 , 10 , 0 , 0 , 0 ), // {ymm, m256|mem, i8|u8} + ROW(3, 1, 1, 0, 55 , 55 , 58 , 0 , 0 , 0 ), // {zmm, zmm, xmm|m128|mem|i8|u8} + ROW(3, 1, 1, 0, 55 , 57 , 10 , 0 , 0 , 0 ), // {zmm, m512|mem, i8|u8} + ROW(3, 1, 1, 0, 49 , 49 , 58 , 0 , 0 , 0 ), // #128 {xmm, xmm, xmm|m128|mem|i8|u8} + ROW(3, 1, 1, 0, 49 , 51 , 10 , 0 , 0 , 0 ), // {xmm, m128|mem, i8|u8} + ROW(3, 1, 1, 0, 52 , 52 , 58 , 0 , 0 , 0 ), // {ymm, ymm, xmm|m128|mem|i8|u8} + ROW(3, 1, 1, 0, 52 , 54 , 10 , 0 , 0 , 0 ), // {ymm, m256|mem, i8|u8} + ROW(3, 1, 1, 0, 55 , 55 , 58 , 0 , 0 , 0 ), // {zmm, zmm, xmm|m128|mem|i8|u8} + ROW(3, 1, 1, 0, 55 , 57 , 10 , 0 , 0 , 0 ), // {zmm, m512|mem, i8|u8} + ROW(2, 1, 1, 0, 25 , 10 , 0 , 0 , 0 , 0 ), // #134 {r16|m16|r32|m32, i8|u8} + ROW(2, 0, 1, 0, 15 , 10 , 0 , 0 , 0 , 0 ), // {r64|m64, i8|u8} ROW(2, 1, 1, 0, 27 , 4 , 0 , 0 , 0 , 0 ), // {r16|m16|mem, r16} ROW(2, 1, 1, 0, 28 , 6 , 0 , 0 , 0 , 0 ), // {r32|m32|mem, r32} - ROW(2, 0, 1, 0, 15 , 8 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, r64} - ROW(2, 1, 1, 2, 73 , 74 , 0 , 0 , 0 , 0 ), // #127 {, } - ROW(2, 1, 1, 2, 75 , 76 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 1, 1, 2, 77 , 78 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 0, 1, 2, 79 , 80 , 0 , 0 , 0 , 0 ), // {, } - ROW(3, 1, 1, 1, 1 , 2 , 81 , 0 , 0 , 0 ), // #131 {r8lo|r8hi|m8|mem, r8lo|r8hi, } - ROW(3, 1, 1, 1, 27 , 4 , 33 , 0 , 0 , 0 ), // {r16|m16|mem, r16, } - ROW(3, 1, 1, 1, 28 , 6 , 36 , 0 , 0 , 0 ), // {r32|m32|mem, r32, } - ROW(3, 0, 1, 1, 15 , 8 , 38 , 0 , 0 , 0 ), // {r64|m64|mem, r64, } - ROW(2, 1, 1, 2, 81 , 82 , 0 , 0 , 0 , 0 ), // #135 {, } - ROW(2, 1, 1, 2, 33 , 83 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 1, 1, 2, 36 , 84 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 0, 1, 2, 38 , 85 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 1, 1, 2, 74 , 73 , 0 , 0 , 0 , 0 ), // #139 {, } - ROW(2, 1, 1, 2, 76 , 75 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 1, 1, 2, 78 , 77 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 0, 1, 2, 80 , 79 , 0 , 0 , 0 , 0 ), // {, } - ROW(1, 1, 1, 0, 86 , 0 , 0 , 0 , 0 , 0 ), // #143 {r16|m16|r64|m64} + ROW(2, 0, 1, 0, 29 , 8 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, r64} + ROW(2, 1, 1, 0, 61 , 62 , 0 , 0 , 0 , 0 ), // #139 {mm, mm|m64|mem} + ROW(2, 0, 1, 0, 63 , 29 , 0 , 0 , 0 , 0 ), // {mm|xmm, r64|m64|mem} + ROW(2, 1, 1, 0, 31 , 63 , 0 , 0 , 0 , 0 ), // {m64|mem, mm|xmm} + ROW(2, 0, 1, 0, 29 , 63 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, mm|xmm} + ROW(2, 1, 1, 0, 49 , 64 , 0 , 0 , 0 , 0 ), // #143 {xmm, xmm|m64|mem} + ROW(1, 1, 1, 0, 11 , 0 , 0 , 0 , 0 , 0 ), // #144 {r16|m16} ROW(1, 1, 0, 0, 13 , 0 , 0 , 0 , 0 , 0 ), // {r32|m32} - ROW(1, 1, 0, 0, 87 , 0 , 0 , 0 , 0 , 0 ), // {ds|es|ss} - ROW(1, 1, 1, 0, 88 , 0 , 0 , 0 , 0 , 0 ), // {fs|gs} - ROW(1, 1, 1, 0, 89 , 0 , 0 , 0 , 0 , 0 ), // #147 {r16|m16|r64|m64|i8|i16|i32} - ROW(1, 1, 0, 0, 90 , 0 , 0 , 0 , 0 , 0 ), // {r32|m32|i32|u32} - ROW(1, 1, 0, 0, 91 , 0 , 0 , 0 , 0 , 0 ), // {cs|ss|ds|es} - ROW(1, 1, 1, 0, 88 , 0 , 0 , 0 , 0 , 0 ), // {fs|gs} - ROW(2, 1, 1, 2, 81 , 92 , 0 , 0 , 0 , 0 ), // #151 {, } - ROW(2, 1, 1, 2, 33 , 93 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 1, 1, 2, 36 , 94 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 0, 1, 2, 38 , 95 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 1, 1, 2, 92 , 81 , 0 , 0 , 0 , 0 ), // #155 {, } - ROW(2, 1, 1, 2, 93 , 33 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 1, 1, 2, 94 , 36 , 0 , 0 , 0 , 0 ), // {, } - ROW(2, 0, 1, 2, 95 , 38 , 0 , 0 , 0 , 0 ), // {, } - ROW(4, 1, 1, 0, 50 , 50 , 50 , 51 , 0 , 0 ), // #159 {xmm, xmm, xmm, xmm|m128|mem} - ROW(4, 1, 1, 0, 50 , 50 , 52 , 50 , 0 , 0 ), // {xmm, xmm, m128|mem, xmm} - ROW(4, 1, 1, 0, 53 , 53 , 53 , 54 , 0 , 0 ), // {ymm, ymm, ymm, ymm|m256|mem} - ROW(4, 1, 1, 0, 53 , 53 , 55 , 53 , 0 , 0 ), // {ymm, ymm, m256|mem, ymm} - ROW(3, 1, 1, 0, 50 , 67 , 50 , 0 , 0 , 0 ), // #163 {xmm, vm32x, xmm} - ROW(3, 1, 1, 0, 53 , 67 , 53 , 0 , 0 , 0 ), // {ymm, vm32x, ymm} - ROW(2, 1, 1, 0, 96 , 67 , 0 , 0 , 0 , 0 ), // {xmm|ymm, vm32x} - ROW(2, 1, 1, 0, 56 , 68 , 0 , 0 , 0 , 0 ), // {zmm, vm32y} - ROW(3, 1, 1, 0, 52 , 50 , 50 , 0 , 0 , 0 ), // #167 {m128|mem, xmm, xmm} - ROW(3, 1, 1, 0, 55 , 53 , 53 , 0 , 0 , 0 ), // {m256|mem, ymm, ymm} - ROW(3, 1, 1, 0, 50 , 50 , 52 , 0 , 0 , 0 ), // {xmm, xmm, m128|mem} - ROW(3, 1, 1, 0, 53 , 53 , 55 , 0 , 0 , 0 ), // {ymm, ymm, m256|mem} - ROW(5, 1, 1, 0, 50 , 50 , 51 , 50 , 97 , 0 ), // #171 {xmm, xmm, xmm|m128|mem, xmm, i4|u4} - ROW(5, 1, 1, 0, 50 , 50 , 50 , 52 , 97 , 0 ), // {xmm, xmm, xmm, m128|mem, i4|u4} - ROW(5, 1, 1, 0, 53 , 53 , 54 , 53 , 97 , 0 ), // {ymm, ymm, ymm|m256|mem, ymm, i4|u4} - ROW(5, 1, 1, 0, 53 , 53 , 53 , 55 , 97 , 0 ), // {ymm, ymm, ymm, m256|mem, i4|u4} - ROW(3, 1, 1, 0, 53 , 54 , 10 , 0 , 0 , 0 ), // #175 {ymm, ymm|m256|mem, i8|u8} - ROW(3, 1, 1, 0, 53 , 53 , 54 , 0 , 0 , 0 ), // {ymm, ymm, ymm|m256|mem} - ROW(3, 1, 1, 0, 56 , 56 , 61 , 0 , 0 , 0 ), // {zmm, zmm, zmm|m512|mem|i8|u8} - ROW(3, 1, 1, 0, 56 , 58 , 10 , 0 , 0 , 0 ), // {zmm, m512|mem, i8|u8} - ROW(2, 1, 1, 0, 4 , 27 , 0 , 0 , 0 , 0 ), // #179 {r16, r16|m16|mem} - ROW(2, 1, 1, 0, 6 , 28 , 0 , 0 , 0 , 0 ), // #180 {r32, r32|m32|mem} - ROW(2, 0, 1, 0, 8 , 15 , 0 , 0 , 0 , 0 ), // {r64, r64|m64|mem} - ROW(1, 1, 1, 0, 98 , 0 , 0 , 0 , 0 , 0 ), // #182 {m32|m64} - ROW(2, 1, 1, 0, 99 , 100, 0 , 0 , 0 , 0 ), // {st0, st} - ROW(2, 1, 1, 0, 100, 99 , 0 , 0 , 0 , 0 ), // {st, st0} - ROW(2, 1, 1, 0, 4 , 29 , 0 , 0 , 0 , 0 ), // #185 {r16, m32|mem} - ROW(2, 1, 1, 0, 6 , 101, 0 , 0 , 0 , 0 ), // {r32, m48|mem} - ROW(2, 0, 1, 0, 8 , 102, 0 , 0 , 0 , 0 ), // {r64, m80|mem} - ROW(3, 1, 1, 0, 27 , 4 , 103, 0 , 0 , 0 ), // #188 {r16|m16|mem, r16, cl|i8|u8} - ROW(3, 1, 1, 0, 28 , 6 , 103, 0 , 0 , 0 ), // {r32|m32|mem, r32, cl|i8|u8} - ROW(3, 0, 1, 0, 15 , 8 , 103, 0 , 0 , 0 ), // {r64|m64|mem, r64, cl|i8|u8} - ROW(3, 1, 1, 0, 50 , 50 , 51 , 0 , 0 , 0 ), // #191 {xmm, xmm, xmm|m128|mem} - ROW(3, 1, 1, 0, 53 , 53 , 54 , 0 , 0 , 0 ), // #192 {ymm, ymm, ymm|m256|mem} - ROW(3, 1, 1, 0, 56 , 56 , 57 , 0 , 0 , 0 ), // {zmm, zmm, zmm|m512|mem} - ROW(4, 1, 1, 0, 50 , 50 , 51 , 10 , 0 , 0 ), // #194 {xmm, xmm, xmm|m128|mem, i8|u8} - ROW(4, 1, 1, 0, 53 , 53 , 54 , 10 , 0 , 0 ), // #195 {ymm, ymm, ymm|m256|mem, i8|u8} - ROW(4, 1, 1, 0, 56 , 56 , 57 , 10 , 0 , 0 ), // {zmm, zmm, zmm|m512|mem, i8|u8} - ROW(4, 1, 1, 0, 104, 50 , 51 , 10 , 0 , 0 ), // #197 {xmm|k, xmm, xmm|m128|mem, i8|u8} - ROW(4, 1, 1, 0, 105, 53 , 54 , 10 , 0 , 0 ), // {ymm|k, ymm, ymm|m256|mem, i8|u8} - ROW(4, 1, 1, 0, 106, 56 , 57 , 10 , 0 , 0 ), // {k, zmm, zmm|m512|mem, i8|u8} - ROW(4, 1, 1, 0, 106, 50 , 51 , 10 , 0 , 0 ), // #200 {k, xmm, xmm|m128|mem, i8|u8} - ROW(4, 1, 1, 0, 106, 53 , 54 , 10 , 0 , 0 ), // {k, ymm, ymm|m256|mem, i8|u8} - ROW(4, 1, 1, 0, 106, 56 , 57 , 10 , 0 , 0 ), // {k, zmm, zmm|m512|mem, i8|u8} - ROW(2, 1, 1, 0, 51 , 50 , 0 , 0 , 0 , 0 ), // #203 {xmm|m128|mem, xmm} - ROW(2, 1, 1, 0, 54 , 53 , 0 , 0 , 0 , 0 ), // {ymm|m256|mem, ymm} - ROW(2, 1, 1, 0, 57 , 56 , 0 , 0 , 0 , 0 ), // {zmm|m512|mem, zmm} - ROW(2, 1, 1, 0, 50 , 65 , 0 , 0 , 0 , 0 ), // #206 {xmm, xmm|m64|mem} - ROW(2, 1, 1, 0, 53 , 51 , 0 , 0 , 0 , 0 ), // {ymm, xmm|m128|mem} - ROW(2, 1, 1, 0, 56 , 54 , 0 , 0 , 0 , 0 ), // {zmm, ymm|m256|mem} - ROW(2, 1, 1, 0, 50 , 51 , 0 , 0 , 0 , 0 ), // #209 {xmm, xmm|m128|mem} - ROW(2, 1, 1, 0, 53 , 54 , 0 , 0 , 0 , 0 ), // {ymm, ymm|m256|mem} - ROW(2, 1, 1, 0, 56 , 57 , 0 , 0 , 0 , 0 ), // {zmm, zmm|m512|mem} - ROW(2, 1, 1, 0, 50 , 107, 0 , 0 , 0 , 0 ), // #212 {xmm, xmm|m32|mem} - ROW(2, 1, 1, 0, 53 , 65 , 0 , 0 , 0 , 0 ), // {ymm, xmm|m64|mem} - ROW(2, 1, 1, 0, 56 , 51 , 0 , 0 , 0 , 0 ), // {zmm, xmm|m128|mem} - ROW(3, 1, 1, 0, 65 , 50 , 10 , 0 , 0 , 0 ), // #215 {xmm|m64|mem, xmm, i8|u8} - ROW(3, 1, 1, 0, 51 , 53 , 10 , 0 , 0 , 0 ), // #216 {xmm|m128|mem, ymm, i8|u8} - ROW(3, 1, 1, 0, 54 , 56 , 10 , 0 , 0 , 0 ), // #217 {ymm|m256|mem, zmm, i8|u8} - ROW(3, 1, 1, 0, 50 , 108, 50 , 0 , 0 , 0 ), // #218 {xmm, vm64x|vm64y, xmm} - ROW(2, 1, 1, 0, 50 , 108, 0 , 0 , 0 , 0 ), // {xmm, vm64x|vm64y} - ROW(2, 1, 1, 0, 53 , 72 , 0 , 0 , 0 , 0 ), // {ymm, vm64z} - ROW(3, 1, 1, 0, 50 , 51 , 10 , 0 , 0 , 0 ), // #221 {xmm, xmm|m128|mem, i8|u8} - ROW(3, 1, 1, 0, 53 , 54 , 10 , 0 , 0 , 0 ), // {ymm, ymm|m256|mem, i8|u8} - ROW(3, 1, 1, 0, 56 , 57 , 10 , 0 , 0 , 0 ), // {zmm, zmm|m512|mem, i8|u8} - ROW(2, 1, 1, 0, 50 , 65 , 0 , 0 , 0 , 0 ), // #224 {xmm, xmm|m64|mem} - ROW(2, 1, 1, 0, 53 , 54 , 0 , 0 , 0 , 0 ), // {ymm, ymm|m256|mem} - ROW(2, 1, 1, 0, 56 , 57 , 0 , 0 , 0 , 0 ), // {zmm, zmm|m512|mem} - ROW(2, 1, 1, 0, 52 , 50 , 0 , 0 , 0 , 0 ), // #227 {m128|mem, xmm} - ROW(2, 1, 1, 0, 55 , 53 , 0 , 0 , 0 , 0 ), // {m256|mem, ymm} - ROW(2, 1, 1, 0, 58 , 56 , 0 , 0 , 0 , 0 ), // {m512|mem, zmm} - ROW(2, 1, 1, 0, 50 , 52 , 0 , 0 , 0 , 0 ), // #230 {xmm, m128|mem} - ROW(2, 1, 1, 0, 53 , 55 , 0 , 0 , 0 , 0 ), // {ymm, m256|mem} - ROW(2, 1, 1, 0, 56 , 58 , 0 , 0 , 0 , 0 ), // {zmm, m512|mem} - ROW(2, 0, 1, 0, 15 , 50 , 0 , 0 , 0 , 0 ), // #233 {r64|m64|mem, xmm} - ROW(2, 1, 1, 0, 50 , 109, 0 , 0 , 0 , 0 ), // {xmm, xmm|m64|mem|r64} - ROW(2, 1, 1, 0, 30 , 50 , 0 , 0 , 0 , 0 ), // {m64|mem, xmm} - ROW(2, 1, 1, 0, 30 , 50 , 0 , 0 , 0 , 0 ), // #236 {m64|mem, xmm} - ROW(2, 1, 1, 0, 50 , 30 , 0 , 0 , 0 , 0 ), // {xmm, m64|mem} - ROW(3, 1, 1, 0, 50 , 50 , 50 , 0 , 0 , 0 ), // #238 {xmm, xmm, xmm} - ROW(2, 1, 1, 0, 21 , 50 , 0 , 0 , 0 , 0 ), // #239 {m16|mem, xmm} - ROW(2, 1, 1, 0, 50 , 21 , 0 , 0 , 0 , 0 ), // {xmm, m16|mem} - ROW(3, 1, 1, 0, 50 , 50 , 50 , 0 , 0 , 0 ), // {xmm, xmm, xmm} - ROW(2, 1, 1, 0, 29 , 50 , 0 , 0 , 0 , 0 ), // #242 {m32|mem, xmm} - ROW(2, 1, 1, 0, 50 , 29 , 0 , 0 , 0 , 0 ), // {xmm, m32|mem} - ROW(3, 1, 1, 0, 50 , 50 , 50 , 0 , 0 , 0 ), // {xmm, xmm, xmm} - ROW(4, 1, 1, 0, 106, 106, 50 , 51 , 0 , 0 ), // #245 {k, k, xmm, xmm|m128|mem} - ROW(4, 1, 1, 0, 106, 106, 53 , 54 , 0 , 0 ), // {k, k, ymm, ymm|m256|mem} - ROW(4, 1, 1, 0, 106, 106, 56 , 57 , 0 , 0 ), // {k, k, zmm, zmm|m512|mem} - ROW(2, 1, 1, 0, 96 , 109, 0 , 0 , 0 , 0 ), // #248 {xmm|ymm, xmm|m64|mem|r64} - ROW(2, 0, 1, 0, 56 , 8 , 0 , 0 , 0 , 0 ), // {zmm, r64} - ROW(2, 1, 1, 0, 56 , 65 , 0 , 0 , 0 , 0 ), // {zmm, xmm|m64|mem} - ROW(3, 1, 1, 0, 104, 50 , 51 , 0 , 0 , 0 ), // #251 {xmm|k, xmm, xmm|m128|mem} - ROW(3, 1, 1, 0, 105, 53 , 54 , 0 , 0 , 0 ), // {ymm|k, ymm, ymm|m256|mem} - ROW(3, 1, 1, 0, 106, 56 , 57 , 0 , 0 , 0 ), // {k, zmm, zmm|m512|mem} - ROW(2, 1, 1, 0, 107, 50 , 0 , 0 , 0 , 0 ), // #254 {xmm|m32|mem, xmm} - ROW(2, 1, 1, 0, 65 , 53 , 0 , 0 , 0 , 0 ), // {xmm|m64|mem, ymm} - ROW(2, 1, 1, 0, 51 , 56 , 0 , 0 , 0 , 0 ), // {xmm|m128|mem, zmm} - ROW(2, 1, 1, 0, 65 , 50 , 0 , 0 , 0 , 0 ), // #257 {xmm|m64|mem, xmm} - ROW(2, 1, 1, 0, 51 , 53 , 0 , 0 , 0 , 0 ), // {xmm|m128|mem, ymm} - ROW(2, 1, 1, 0, 54 , 56 , 0 , 0 , 0 , 0 ), // {ymm|m256|mem, zmm} - ROW(2, 1, 1, 0, 110, 50 , 0 , 0 , 0 , 0 ), // #260 {xmm|m16|mem, xmm} - ROW(2, 1, 1, 0, 107, 53 , 0 , 0 , 0 , 0 ), // {xmm|m32|mem, ymm} - ROW(2, 1, 1, 0, 65 , 56 , 0 , 0 , 0 , 0 ), // {xmm|m64|mem, zmm} - ROW(2, 1, 1, 0, 50 , 110, 0 , 0 , 0 , 0 ), // #263 {xmm, xmm|m16|mem} - ROW(2, 1, 1, 0, 53 , 107, 0 , 0 , 0 , 0 ), // {ymm, xmm|m32|mem} - ROW(2, 1, 1, 0, 56 , 65 , 0 , 0 , 0 , 0 ), // {zmm, xmm|m64|mem} - ROW(2, 1, 1, 0, 67 , 50 , 0 , 0 , 0 , 0 ), // #266 {vm32x, xmm} - ROW(2, 1, 1, 0, 68 , 53 , 0 , 0 , 0 , 0 ), // {vm32y, ymm} - ROW(2, 1, 1, 0, 69 , 56 , 0 , 0 , 0 , 0 ), // {vm32z, zmm} - ROW(2, 1, 1, 0, 70 , 50 , 0 , 0 , 0 , 0 ), // #269 {vm64x, xmm} - ROW(2, 1, 1, 0, 71 , 53 , 0 , 0 , 0 , 0 ), // {vm64y, ymm} - ROW(2, 1, 1, 0, 72 , 56 , 0 , 0 , 0 , 0 ), // {vm64z, zmm} - ROW(3, 1, 1, 0, 106, 50 , 51 , 0 , 0 , 0 ), // #272 {k, xmm, xmm|m128|mem} - ROW(3, 1, 1, 0, 106, 53 , 54 , 0 , 0 , 0 ), // {k, ymm, ymm|m256|mem} - ROW(3, 1, 1, 0, 106, 56 , 57 , 0 , 0 , 0 ), // {k, zmm, zmm|m512|mem} - ROW(3, 1, 1, 0, 6 , 6 , 28 , 0 , 0 , 0 ), // #275 {r32, r32, r32|m32|mem} - ROW(3, 0, 1, 0, 8 , 8 , 15 , 0 , 0 , 0 ), // {r64, r64, r64|m64|mem} - ROW(3, 1, 1, 0, 6 , 28 , 6 , 0 , 0 , 0 ), // #277 {r32, r32|m32|mem, r32} - ROW(3, 0, 1, 0, 8 , 15 , 8 , 0 , 0 , 0 ), // {r64, r64|m64|mem, r64} - ROW(2, 1, 0, 0, 111, 28 , 0 , 0 , 0 , 0 ), // #279 {bnd, r32|m32|mem} - ROW(2, 0, 1, 0, 111, 15 , 0 , 0 , 0 , 0 ), // {bnd, r64|m64|mem} - ROW(2, 1, 1, 0, 111, 112, 0 , 0 , 0 , 0 ), // #281 {bnd, bnd|mem} - ROW(2, 1, 1, 0, 113, 111, 0 , 0 , 0 , 0 ), // {mem, bnd} - ROW(2, 1, 0, 0, 4 , 29 , 0 , 0 , 0 , 0 ), // #283 {r16, m32|mem} - ROW(2, 1, 0, 0, 6 , 30 , 0 , 0 , 0 , 0 ), // {r32, m64|mem} - ROW(1, 1, 0, 0, 114, 0 , 0 , 0 , 0 , 0 ), // #285 {rel16|r16|m16|r32|m32} - ROW(1, 1, 1, 0, 115, 0 , 0 , 0 , 0 , 0 ), // {rel32|r64|m64|mem} - ROW(2, 1, 1, 0, 6 , 116, 0 , 0 , 0 , 0 ), // #287 {r32, r8lo|r8hi|m8|r16|m16|r32|m32} - ROW(2, 0, 1, 0, 8 , 117, 0 , 0 , 0 , 0 ), // {r64, r8lo|r8hi|m8|r64|m64} - ROW(1, 1, 0, 0, 118, 0 , 0 , 0 , 0 , 0 ), // #289 {r16|r32} - ROW(1, 1, 1, 0, 31 , 0 , 0 , 0 , 0 , 0 ), // #290 {r8lo|r8hi|m8|r16|m16|r32|m32|r64|m64|mem} - ROW(2, 1, 0, 0, 119, 58 , 0 , 0 , 0 , 0 ), // #291 {es:[mem|m512|memBase], m512|mem} - ROW(2, 0, 1, 0, 119, 58 , 0 , 0 , 0 , 0 ), // {es:[mem|m512|memBase], m512|mem} - ROW(3, 1, 1, 0, 50 , 10 , 10 , 0 , 0 , 0 ), // #293 {xmm, i8|u8, i8|u8} - ROW(2, 1, 1, 0, 50 , 50 , 0 , 0 , 0 , 0 ), // #294 {xmm, xmm} - ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #295 {} - ROW(1, 1, 1, 0, 100, 0 , 0 , 0 , 0 , 0 ), // #296 {st} - ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #297 {} - ROW(1, 1, 1, 0, 120, 0 , 0 , 0 , 0 , 0 ), // #298 {m32|m64|st} - ROW(2, 1, 1, 0, 50 , 50 , 0 , 0 , 0 , 0 ), // #299 {xmm, xmm} - ROW(4, 1, 1, 0, 50 , 50 , 10 , 10 , 0 , 0 ), // {xmm, xmm, i8|u8, i8|u8} - ROW(2, 1, 0, 0, 6 , 52 , 0 , 0 , 0 , 0 ), // #301 {r32, m128|mem} - ROW(2, 0, 1, 0, 8 , 52 , 0 , 0 , 0 , 0 ), // {r64, m128|mem} - ROW(2, 1, 0, 2, 36 , 121, 0 , 0 , 0 , 0 ), // #303 {, } - ROW(2, 0, 1, 2, 122, 121, 0 , 0 , 0 , 0 ), // {, } - ROW(1, 1, 1, 0, 123, 0 , 0 , 0 , 0 , 0 ), // #305 {rel8|rel32} - ROW(1, 1, 0, 0, 124, 0 , 0 , 0 , 0 , 0 ), // {rel16} - ROW(2, 1, 0, 1, 125, 126, 0 , 0 , 0 , 0 ), // #307 {, rel8} - ROW(2, 0, 1, 1, 127, 126, 0 , 0 , 0 , 0 ), // {, rel8} - ROW(1, 1, 1, 0, 128, 0 , 0 , 0 , 0 , 0 ), // #309 {rel8|rel32|r64|m64|mem} - ROW(1, 1, 0, 0, 129, 0 , 0 , 0 , 0 , 0 ), // {rel16|r32|m32|mem} - ROW(2, 1, 1, 0, 106, 130, 0 , 0 , 0 , 0 ), // #311 {k, k|m8|mem|r32} - ROW(2, 1, 1, 0, 131, 106, 0 , 0 , 0 , 0 ), // {m8|mem|r32, k} - ROW(2, 1, 1, 0, 106, 132, 0 , 0 , 0 , 0 ), // #313 {k, k|m32|mem|r32} - ROW(2, 1, 1, 0, 28 , 106, 0 , 0 , 0 , 0 ), // {m32|mem|r32, k} - ROW(2, 1, 1, 0, 106, 133, 0 , 0 , 0 , 0 ), // #315 {k, k|m64|mem|r64} - ROW(2, 1, 1, 0, 15 , 106, 0 , 0 , 0 , 0 ), // {m64|mem|r64, k} - ROW(2, 1, 1, 0, 106, 134, 0 , 0 , 0 , 0 ), // #317 {k, k|m16|mem|r32} - ROW(2, 1, 1, 0, 135, 106, 0 , 0 , 0 , 0 ), // {m16|mem|r32, k} - ROW(2, 1, 1, 0, 4 , 27 , 0 , 0 , 0 , 0 ), // #319 {r16, r16|m16|mem} - ROW(2, 1, 1, 0, 6 , 135, 0 , 0 , 0 , 0 ), // {r32, r32|m16|mem} - ROW(2, 1, 0, 0, 136, 137, 0 , 0 , 0 , 0 ), // #321 {i16, i16|i32} - ROW(1, 1, 1, 0, 138, 0 , 0 , 0 , 0 , 0 ), // {m32|m48|m80|mem} - ROW(2, 1, 0, 0, 4 , 29 , 0 , 0 , 0 , 0 ), // #323 {r16, m32|mem} - ROW(2, 1, 0, 0, 6 , 101, 0 , 0 , 0 , 0 ), // {r32, m48|mem} - ROW(2, 1, 1, 0, 4 , 27 , 0 , 0 , 0 , 0 ), // #325 {r16, r16|m16|mem} - ROW(2, 1, 1, 0, 139, 135, 0 , 0 , 0 , 0 ), // {r32|r64, r32|m16|mem} - ROW(2, 1, 1, 0, 64 , 28 , 0 , 0 , 0 , 0 ), // #327 {mm|xmm, r32|m32|mem} - ROW(2, 1, 1, 0, 28 , 64 , 0 , 0 , 0 , 0 ), // {r32|m32|mem, mm|xmm} - ROW(2, 1, 1, 0, 50 , 107, 0 , 0 , 0 , 0 ), // #329 {xmm, xmm|m32|mem} - ROW(2, 1, 1, 0, 29 , 50 , 0 , 0 , 0 , 0 ), // {m32|mem, xmm} - ROW(2, 1, 1, 0, 4 , 9 , 0 , 0 , 0 , 0 ), // #331 {r16, r8lo|r8hi|m8} - ROW(2, 1, 1, 0, 139, 140, 0 , 0 , 0 , 0 ), // {r32|r64, r8lo|r8hi|m8|r16|m16} - ROW(2, 0, 1, 0, 4 , 27 , 0 , 0 , 0 , 0 ), // #333 {r16, r16|m16|mem} - ROW(2, 0, 1, 0, 139, 28 , 0 , 0 , 0 , 0 ), // {r32|r64, r32|m32|mem} - ROW(4, 1, 1, 1, 6 , 6 , 28 , 35 , 0 , 0 ), // #335 {r32, r32, r32|m32|mem, } - ROW(4, 0, 1, 1, 8 , 8 , 15 , 37 , 0 , 0 ), // {r64, r64, r64|m64|mem, } - ROW(2, 1, 1, 0, 62 , 141, 0 , 0 , 0 , 0 ), // #337 {mm, mm|m64|mem} - ROW(2, 1, 1, 0, 50 , 51 , 0 , 0 , 0 , 0 ), // {xmm, xmm|m128|mem} - ROW(3, 1, 1, 0, 62 , 141, 10 , 0 , 0 , 0 ), // #339 {mm, mm|m64|mem, i8|u8} - ROW(3, 1, 1, 0, 50 , 51 , 10 , 0 , 0 , 0 ), // {xmm, xmm|m128|mem, i8|u8} - ROW(3, 1, 1, 0, 6 , 64 , 10 , 0 , 0 , 0 ), // #341 {r32, mm|xmm, i8|u8} - ROW(3, 1, 1, 0, 21 , 50 , 10 , 0 , 0 , 0 ), // {m16|mem, xmm, i8|u8} - ROW(2, 1, 1, 0, 62 , 142, 0 , 0 , 0 , 0 ), // #343 {mm, i8|u8|mm|m64|mem} - ROW(2, 1, 1, 0, 50 , 59 , 0 , 0 , 0 , 0 ), // {xmm, i8|u8|xmm|m128|mem} - ROW(2, 1, 1, 0, 62 , 143, 0 , 0 , 0 , 0 ), // #345 {mm, mm|m32|mem} - ROW(2, 1, 1, 0, 50 , 51 , 0 , 0 , 0 , 0 ), // {xmm, xmm|m128|mem} - ROW(1, 1, 0, 0, 6 , 0 , 0 , 0 , 0 , 0 ), // #347 {r32} - ROW(1, 0, 1, 0, 8 , 0 , 0 , 0 , 0 , 0 ), // #348 {r64} - ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #349 {} - ROW(1, 1, 1, 0, 144, 0 , 0 , 0 , 0 , 0 ), // {u16} - ROW(3, 1, 1, 0, 6 , 28 , 10 , 0 , 0 , 0 ), // #351 {r32, r32|m32|mem, i8|u8} - ROW(3, 0, 1, 0, 8 , 15 , 10 , 0 , 0 , 0 ), // {r64, r64|m64|mem, i8|u8} - ROW(4, 1, 1, 0, 50 , 50 , 51 , 50 , 0 , 0 ), // #353 {xmm, xmm, xmm|m128|mem, xmm} - ROW(4, 1, 1, 0, 53 , 53 , 54 , 53 , 0 , 0 ), // {ymm, ymm, ymm|m256|mem, ymm} - ROW(2, 1, 1, 0, 50 , 145, 0 , 0 , 0 , 0 ), // #355 {xmm, xmm|m128|ymm|m256} - ROW(2, 1, 1, 0, 53 , 57 , 0 , 0 , 0 , 0 ), // {ymm, zmm|m512|mem} - ROW(4, 1, 1, 0, 50 , 50 , 50 , 65 , 0 , 0 ), // #357 {xmm, xmm, xmm, xmm|m64|mem} - ROW(4, 1, 1, 0, 50 , 50 , 30 , 50 , 0 , 0 ), // {xmm, xmm, m64|mem, xmm} - ROW(4, 1, 1, 0, 50 , 50 , 50 , 107, 0 , 0 ), // #359 {xmm, xmm, xmm, xmm|m32|mem} - ROW(4, 1, 1, 0, 50 , 50 , 29 , 50 , 0 , 0 ), // {xmm, xmm, m32|mem, xmm} - ROW(4, 1, 1, 0, 53 , 53 , 51 , 10 , 0 , 0 ), // #361 {ymm, ymm, xmm|m128|mem, i8|u8} - ROW(4, 1, 1, 0, 56 , 56 , 51 , 10 , 0 , 0 ), // {zmm, zmm, xmm|m128|mem, i8|u8} - ROW(1, 1, 0, 1, 36 , 0 , 0 , 0 , 0 , 0 ), // #363 {} - ROW(1, 0, 1, 1, 38 , 0 , 0 , 0 , 0 , 0 ), // #364 {} - ROW(2, 1, 1, 0, 28 , 50 , 0 , 0 , 0 , 0 ), // #365 {r32|m32|mem, xmm} - ROW(2, 1, 1, 0, 50 , 28 , 0 , 0 , 0 , 0 ), // {xmm, r32|m32|mem} - ROW(2, 1, 1, 0, 30 , 50 , 0 , 0 , 0 , 0 ), // #367 {m64|mem, xmm} - ROW(3, 1, 1, 0, 50 , 50 , 30 , 0 , 0 , 0 ), // {xmm, xmm, m64|mem} - ROW(2, 1, 1, 0, 135, 50 , 0 , 0 , 0 , 0 ), // #369 {r32|m16|mem, xmm} - ROW(2, 1, 1, 0, 50 , 135, 0 , 0 , 0 , 0 ), // {xmm, r32|m16|mem} - ROW(2, 1, 0, 0, 28 , 6 , 0 , 0 , 0 , 0 ), // #371 {r32|m32|mem, r32} - ROW(2, 0, 1, 0, 15 , 8 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, r64} - ROW(2, 1, 0, 0, 6 , 28 , 0 , 0 , 0 , 0 ), // #373 {r32, r32|m32|mem} - ROW(2, 0, 1, 0, 8 , 15 , 0 , 0 , 0 , 0 ), // {r64, r64|m64|mem} - ROW(3, 1, 1, 0, 50 , 50 , 59 , 0 , 0 , 0 ), // #375 {xmm, xmm, xmm|m128|mem|i8|u8} - ROW(3, 1, 1, 0, 50 , 52 , 146, 0 , 0 , 0 ), // {xmm, m128|mem, i8|u8|xmm} - ROW(2, 1, 1, 0, 67 , 96 , 0 , 0 , 0 , 0 ), // #377 {vm32x, xmm|ymm} - ROW(2, 1, 1, 0, 68 , 56 , 0 , 0 , 0 , 0 ), // {vm32y, zmm} - ROW(2, 1, 1, 0, 108, 50 , 0 , 0 , 0 , 0 ), // #379 {vm64x|vm64y, xmm} - ROW(2, 1, 1, 0, 72 , 53 , 0 , 0 , 0 , 0 ), // {vm64z, ymm} - ROW(3, 1, 1, 0, 50 , 50 , 51 , 0 , 0 , 0 ), // #381 {xmm, xmm, xmm|m128|mem} - ROW(3, 1, 1, 0, 50 , 52 , 50 , 0 , 0 , 0 ), // {xmm, m128|mem, xmm} - ROW(1, 1, 0, 1, 33 , 0 , 0 , 0 , 0 , 0 ), // #383 {} - ROW(2, 1, 0, 1, 33 , 10 , 0 , 0 , 0 , 0 ), // #384 {, i8|u8} - ROW(2, 1, 0, 0, 27 , 4 , 0 , 0 , 0 , 0 ), // #385 {r16|m16|mem, r16} - ROW(3, 1, 1, 1, 50 , 51 , 147, 0 , 0 , 0 ), // #386 {xmm, xmm|m128|mem, } - ROW(2, 1, 1, 0, 111, 148, 0 , 0 , 0 , 0 ), // #387 {bnd, mib} - ROW(2, 1, 1, 0, 111, 113, 0 , 0 , 0 , 0 ), // #388 {bnd, mem} - ROW(2, 1, 1, 0, 148, 111, 0 , 0 , 0 , 0 ), // #389 {mib, bnd} - ROW(1, 1, 1, 0, 149, 0 , 0 , 0 , 0 , 0 ), // #390 {r16|r32|r64} - ROW(1, 1, 1, 1, 33 , 0 , 0 , 0 , 0 , 0 ), // #391 {} - ROW(2, 1, 1, 2, 35 , 36 , 0 , 0 , 0 , 0 ), // #392 {, } - ROW(1, 1, 1, 0, 150, 0 , 0 , 0 , 0 , 0 ), // #393 {mem|m8|m16|m32|m48|m64|m80|m128|m256|m512|m1024} - ROW(1, 1, 1, 0, 30 , 0 , 0 , 0 , 0 , 0 ), // #394 {m64|mem} - ROW(0, 0, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #395 {} - ROW(1, 1, 1, 1, 151, 0 , 0 , 0 , 0 , 0 ), // #396 {} - ROW(3, 1, 1, 0, 50 , 65 , 10 , 0 , 0 , 0 ), // #397 {xmm, xmm|m64|mem, i8|u8} - ROW(3, 1, 1, 0, 50 , 107, 10 , 0 , 0 , 0 ), // #398 {xmm, xmm|m32|mem, i8|u8} - ROW(5, 0, 1, 4, 52 , 37 , 38 , 152, 153, 0 ), // #399 {m128|mem, , , , } - ROW(5, 1, 1, 4, 30 , 35 , 36 , 121, 154, 0 ), // #400 {m64|mem, , , , } - ROW(4, 1, 1, 4, 36 , 154, 121, 35 , 0 , 0 ), // #401 {, , , } - ROW(2, 0, 1, 2, 37 , 38 , 0 , 0 , 0 , 0 ), // #402 {, } - ROW(2, 1, 1, 0, 62 , 51 , 0 , 0 , 0 , 0 ), // #403 {mm, xmm|m128|mem} - ROW(2, 1, 1, 0, 50 , 141, 0 , 0 , 0 , 0 ), // #404 {xmm, mm|m64|mem} - ROW(2, 1, 1, 0, 62 , 65 , 0 , 0 , 0 , 0 ), // #405 {mm, xmm|m64|mem} - ROW(2, 1, 1, 0, 139, 65 , 0 , 0 , 0 , 0 ), // #406 {r32|r64, xmm|m64|mem} - ROW(2, 1, 1, 0, 50 , 155, 0 , 0 , 0 , 0 ), // #407 {xmm, r32|m32|mem|r64|m64} - ROW(2, 1, 1, 0, 139, 107, 0 , 0 , 0 , 0 ), // #408 {r32|r64, xmm|m32|mem} - ROW(2, 1, 1, 2, 34 , 33 , 0 , 0 , 0 , 0 ), // #409 {, } - ROW(1, 1, 1, 1, 36 , 0 , 0 , 0 , 0 , 0 ), // #410 {} - ROW(2, 1, 1, 0, 12 , 10 , 0 , 0 , 0 , 0 ), // #411 {i16|u16, i8|u8} - ROW(3, 1, 1, 0, 28 , 50 , 10 , 0 , 0 , 0 ), // #412 {r32|m32|mem, xmm, i8|u8} - ROW(1, 1, 1, 0, 102, 0 , 0 , 0 , 0 , 0 ), // #413 {m80|mem} - ROW(1, 1, 1, 0, 156, 0 , 0 , 0 , 0 , 0 ), // #414 {m16|m32} - ROW(1, 1, 1, 0, 157, 0 , 0 , 0 , 0 , 0 ), // #415 {m16|m32|m64} - ROW(1, 1, 1, 0, 158, 0 , 0 , 0 , 0 , 0 ), // #416 {m32|m64|m80|st} - ROW(1, 1, 1, 0, 21 , 0 , 0 , 0 , 0 , 0 ), // #417 {m16|mem} - ROW(1, 1, 1, 0, 113, 0 , 0 , 0 , 0 , 0 ), // #418 {mem} - ROW(1, 1, 1, 0, 159, 0 , 0 , 0 , 0 , 0 ), // #419 {ax|m16|mem} - ROW(1, 0, 1, 0, 113, 0 , 0 , 0 , 0 , 0 ), // #420 {mem} - ROW(2, 1, 1, 1, 10 , 36 , 0 , 0 , 0 , 0 ), // #421 {i8|u8, } - ROW(2, 1, 1, 0, 160, 161, 0 , 0 , 0 , 0 ), // #422 {al|ax|eax, i8|u8|dx} - ROW(1, 1, 1, 0, 6 , 0 , 0 , 0 , 0 , 0 ), // #423 {r32} - ROW(2, 1, 1, 0, 162, 163, 0 , 0 , 0 , 0 ), // #424 {es:[m8|memBase|zdi|m16|m32], dx} - ROW(1, 1, 1, 0, 10 , 0 , 0 , 0 , 0 , 0 ), // #425 {i8|u8} - ROW(0, 1, 0, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #426 {} - ROW(3, 1, 1, 0, 106, 106, 106, 0 , 0 , 0 ), // #427 {k, k, k} - ROW(2, 1, 1, 0, 106, 106, 0 , 0 , 0 , 0 ), // #428 {k, k} - ROW(3, 1, 1, 0, 106, 106, 10 , 0 , 0 , 0 ), // #429 {k, k, i8|u8} - ROW(1, 1, 1, 1, 164, 0 , 0 , 0 , 0 , 0 ), // #430 {} - ROW(1, 1, 1, 0, 29 , 0 , 0 , 0 , 0 , 0 ), // #431 {m32|mem} - ROW(1, 0, 1, 0, 58 , 0 , 0 , 0 , 0 , 0 ), // #432 {m512|mem} - ROW(2, 1, 1, 0, 149, 150, 0 , 0 , 0 , 0 ), // #433 {r16|r32|r64, mem|m8|m16|m32|m48|m64|m80|m128|m256|m512|m1024} - ROW(1, 1, 1, 0, 27 , 0 , 0 , 0 , 0 , 0 ), // #434 {r16|m16|mem} - ROW(1, 1, 1, 0, 139, 0 , 0 , 0 , 0 , 0 ), // #435 {r32|r64} - ROW(3, 1, 1, 0, 139, 28 , 14 , 0 , 0 , 0 ), // #436 {r32|r64, r32|m32|mem, i32|u32} - ROW(3, 1, 1, 1, 50 , 50 , 165, 0 , 0 , 0 ), // #437 {xmm, xmm, } - ROW(3, 1, 1, 1, 62 , 62 , 166, 0 , 0 , 0 ), // #438 {mm, mm, } - ROW(3, 1, 1, 3, 167, 121, 35 , 0 , 0 , 0 ), // #439 {, , } - ROW(2, 1, 1, 0, 119, 58 , 0 , 0 , 0 , 0 ), // #440 {es:[mem|m512|memBase], m512|mem} - ROW(2, 1, 1, 0, 62 , 50 , 0 , 0 , 0 , 0 ), // #441 {mm, xmm} - ROW(2, 1, 1, 0, 6 , 50 , 0 , 0 , 0 , 0 ), // #442 {r32, xmm} - ROW(2, 1, 1, 0, 30 , 62 , 0 , 0 , 0 , 0 ), // #443 {m64|mem, mm} - ROW(2, 1, 1, 0, 50 , 62 , 0 , 0 , 0 , 0 ), // #444 {xmm, mm} - ROW(2, 1, 1, 2, 36 , 121, 0 , 0 , 0 , 0 ), // #445 {, } - ROW(3, 1, 1, 3, 36 , 121, 154, 0 , 0 , 0 ), // #446 {, , } - ROW(2, 1, 1, 0, 168, 160, 0 , 0 , 0 , 0 ), // #447 {u8|dx, al|ax|eax} - ROW(2, 1, 1, 0, 163, 169, 0 , 0 , 0 , 0 ), // #448 {dx, ds:[m8|memBase|zsi|m16|m32]} - ROW(6, 1, 1, 3, 50 , 51 , 10 , 121, 36 , 35 ), // #449 {xmm, xmm|m128|mem, i8|u8, , , } - ROW(6, 1, 1, 3, 50 , 51 , 10 , 147, 36 , 35 ), // #450 {xmm, xmm|m128|mem, i8|u8, , , } - ROW(4, 1, 1, 1, 50 , 51 , 10 , 121, 0 , 0 ), // #451 {xmm, xmm|m128|mem, i8|u8, } - ROW(4, 1, 1, 1, 50 , 51 , 10 , 147, 0 , 0 ), // #452 {xmm, xmm|m128|mem, i8|u8, } - ROW(3, 1, 1, 0, 131, 50 , 10 , 0 , 0 , 0 ), // #453 {r32|m8|mem, xmm, i8|u8} - ROW(3, 0, 1, 0, 15 , 50 , 10 , 0 , 0 , 0 ), // #454 {r64|m64|mem, xmm, i8|u8} - ROW(3, 1, 1, 0, 50 , 131, 10 , 0 , 0 , 0 ), // #455 {xmm, r32|m8|mem, i8|u8} - ROW(3, 1, 1, 0, 50 , 28 , 10 , 0 , 0 , 0 ), // #456 {xmm, r32|m32|mem, i8|u8} - ROW(3, 0, 1, 0, 50 , 15 , 10 , 0 , 0 , 0 ), // #457 {xmm, r64|m64|mem, i8|u8} - ROW(3, 1, 1, 0, 64 , 135, 10 , 0 , 0 , 0 ), // #458 {mm|xmm, r32|m16|mem, i8|u8} - ROW(2, 1, 1, 0, 6 , 64 , 0 , 0 , 0 , 0 ), // #459 {r32, mm|xmm} - ROW(2, 1, 1, 0, 50 , 10 , 0 , 0 , 0 , 0 ), // #460 {xmm, i8|u8} - ROW(1, 1, 1, 0, 155, 0 , 0 , 0 , 0 , 0 ), // #461 {r32|m32|mem|r64|m64} - ROW(2, 1, 1, 0, 31 , 103, 0 , 0 , 0 , 0 ), // #462 {r8lo|r8hi|m8|r16|m16|r32|m32|r64|m64|mem, cl|i8|u8} - ROW(1, 0, 1, 0, 139, 0 , 0 , 0 , 0 , 0 ), // #463 {r32|r64} - ROW(3, 1, 1, 3, 35 , 36 , 121, 0 , 0 , 0 ), // #464 {, , } - ROW(1, 1, 1, 0, 1 , 0 , 0 , 0 , 0 , 0 ), // #465 {r8lo|r8hi|m8|mem} - ROW(1, 1, 1, 0, 170, 0 , 0 , 0 , 0 , 0 ), // #466 {r16|m16|mem|r32|r64} - ROW(3, 0, 1, 0, 171, 171, 171, 0 , 0 , 0 ), // #467 {tmm, tmm, tmm} - ROW(2, 0, 1, 0, 171, 172, 0 , 0 , 0 , 0 ), // #468 {tmm, tmem} - ROW(2, 0, 1, 0, 172, 171, 0 , 0 , 0 , 0 ), // #469 {tmem, tmm} - ROW(1, 0, 1, 0, 171, 0 , 0 , 0 , 0 , 0 ), // #470 {tmm} - ROW(3, 1, 1, 2, 6 , 35 , 36 , 0 , 0 , 0 ), // #471 {r32, , } - ROW(1, 1, 1, 0, 173, 0 , 0 , 0 , 0 , 0 ), // #472 {ds:[mem|memBase]} - ROW(6, 1, 1, 0, 56 , 56 , 56 , 56 , 56 , 52 ), // #473 {zmm, zmm, zmm, zmm, zmm, m128|mem} - ROW(6, 1, 1, 0, 50 , 50 , 50 , 50 , 50 , 52 ), // #474 {xmm, xmm, xmm, xmm, xmm, m128|mem} - ROW(3, 1, 1, 0, 50 , 50 , 65 , 0 , 0 , 0 ), // #475 {xmm, xmm, xmm|m64|mem} - ROW(3, 1, 1, 0, 50 , 50 , 110, 0 , 0 , 0 ), // #476 {xmm, xmm, xmm|m16|mem} - ROW(3, 1, 1, 0, 50 , 50 , 107, 0 , 0 , 0 ), // #477 {xmm, xmm, xmm|m32|mem} - ROW(2, 1, 1, 0, 53 , 52 , 0 , 0 , 0 , 0 ), // #478 {ymm, m128|mem} - ROW(2, 1, 1, 0, 174, 65 , 0 , 0 , 0 , 0 ), // #479 {ymm|zmm, xmm|m64|mem} - ROW(2, 1, 1, 0, 174, 52 , 0 , 0 , 0 , 0 ), // #480 {ymm|zmm, m128|mem} - ROW(2, 1, 1, 0, 56 , 55 , 0 , 0 , 0 , 0 ), // #481 {zmm, m256|mem} - ROW(2, 1, 1, 0, 175, 65 , 0 , 0 , 0 , 0 ), // #482 {xmm|ymm|zmm, xmm|m64|mem} - ROW(2, 1, 1, 0, 175, 107, 0 , 0 , 0 , 0 ), // #483 {xmm|ymm|zmm, m32|mem|xmm} - ROW(4, 1, 1, 0, 104, 50 , 65 , 10 , 0 , 0 ), // #484 {xmm|k, xmm, xmm|m64|mem, i8|u8} - ROW(4, 1, 1, 0, 106, 50 , 110, 10 , 0 , 0 ), // #485 {k, xmm, xmm|m16|mem, i8|u8} - ROW(4, 1, 1, 0, 104, 50 , 107, 10 , 0 , 0 ), // #486 {xmm|k, xmm, xmm|m32|mem, i8|u8} - ROW(2, 1, 1, 0, 50 , 176, 0 , 0 , 0 , 0 ), // #487 {xmm, xmm|m128|ymm|m256|zmm|m512} - ROW(2, 1, 1, 0, 139, 110, 0 , 0 , 0 , 0 ), // #488 {r32|r64, xmm|m16|mem} - ROW(3, 1, 1, 0, 50 , 50 , 155, 0 , 0 , 0 ), // #489 {xmm, xmm, r32|m32|mem|r64|m64} - ROW(3, 1, 1, 0, 51 , 174, 10 , 0 , 0 , 0 ), // #490 {xmm|m128|mem, ymm|zmm, i8|u8} - ROW(4, 1, 1, 0, 50 , 50 , 65 , 10 , 0 , 0 ), // #491 {xmm, xmm, xmm|m64|mem, i8|u8} - ROW(4, 1, 1, 0, 50 , 50 , 107, 10 , 0 , 0 ), // #492 {xmm, xmm, xmm|m32|mem, i8|u8} - ROW(3, 1, 1, 0, 106, 176, 10 , 0 , 0 , 0 ), // #493 {k, xmm|m128|ymm|m256|zmm|m512, i8|u8} - ROW(3, 1, 1, 0, 106, 65 , 10 , 0 , 0 , 0 ), // #494 {k, xmm|m64|mem, i8|u8} - ROW(3, 1, 1, 0, 106, 110, 10 , 0 , 0 , 0 ), // #495 {k, xmm|m16|mem, i8|u8} - ROW(3, 1, 1, 0, 106, 107, 10 , 0 , 0 , 0 ), // #496 {k, xmm|m32|mem, i8|u8} - ROW(1, 1, 1, 0, 68 , 0 , 0 , 0 , 0 , 0 ), // #497 {vm32y} - ROW(1, 1, 1, 0, 69 , 0 , 0 , 0 , 0 , 0 ), // #498 {vm32z} - ROW(1, 1, 1, 0, 72 , 0 , 0 , 0 , 0 , 0 ), // #499 {vm64z} - ROW(4, 1, 1, 0, 50 , 50 , 110, 10 , 0 , 0 ), // #500 {xmm, xmm, xmm|m16|mem, i8|u8} - ROW(4, 1, 1, 0, 56 , 56 , 54 , 10 , 0 , 0 ), // #501 {zmm, zmm, ymm|m256|mem, i8|u8} - ROW(2, 1, 1, 0, 6 , 96 , 0 , 0 , 0 , 0 ), // #502 {r32, xmm|ymm} - ROW(2, 1, 1, 0, 175, 177, 0 , 0 , 0 , 0 ), // #503 {xmm|ymm|zmm, xmm|m8|mem|r32} - ROW(2, 1, 1, 0, 175, 178, 0 , 0 , 0 , 0 ), // #504 {xmm|ymm|zmm, xmm|m32|mem|r32} - ROW(2, 1, 1, 0, 175, 106, 0 , 0 , 0 , 0 ), // #505 {xmm|ymm|zmm, k} - ROW(2, 1, 1, 0, 175, 179, 0 , 0 , 0 , 0 ), // #506 {xmm|ymm|zmm, xmm|m16|mem|r32} - ROW(3, 1, 1, 0, 135, 50 , 10 , 0 , 0 , 0 ), // #507 {r32|m16|mem, xmm, i8|u8} - ROW(4, 1, 1, 0, 50 , 50 , 131, 10 , 0 , 0 ), // #508 {xmm, xmm, r32|m8|mem, i8|u8} - ROW(4, 1, 1, 0, 50 , 50 , 28 , 10 , 0 , 0 ), // #509 {xmm, xmm, r32|m32|mem, i8|u8} - ROW(4, 0, 1, 0, 50 , 50 , 15 , 10 , 0 , 0 ), // #510 {xmm, xmm, r64|m64|mem, i8|u8} - ROW(4, 1, 1, 0, 50 , 50 , 135, 10 , 0 , 0 ), // #511 {xmm, xmm, r32|m16|mem, i8|u8} - ROW(2, 1, 1, 0, 106, 175, 0 , 0 , 0 , 0 ), // #512 {k, xmm|ymm|zmm} - ROW(1, 1, 1, 0, 124, 0 , 0 , 0 , 0 , 0 ), // #513 {rel16|rel32} - ROW(3, 1, 1, 2, 113, 35 , 36 , 0 , 0 , 0 ), // #514 {mem, , } - ROW(3, 0, 1, 2, 113, 35 , 36 , 0 , 0 , 0 ) // #515 {mem, , } + ROW(1, 0, 1, 0, 15 , 0 , 0 , 0 , 0 , 0 ), // {r64|m64} + ROW(1, 1, 0, 0, 65 , 0 , 0 , 0 , 0 , 0 ), // {ds|es|ss} + ROW(1, 1, 1, 0, 66 , 0 , 0 , 0 , 0 , 0 ), // {fs|gs} + ROW(1, 1, 1, 0, 67 , 0 , 0 , 0 , 0 , 0 ), // #149 {r16|m16|i8|i16} + ROW(1, 1, 0, 0, 68 , 0 , 0 , 0 , 0 , 0 ), // {r32|m32|i32|u32} + ROW(1, 0, 1, 0, 69 , 0 , 0 , 0 , 0 , 0 ), // {r64|m64|i32} + ROW(1, 1, 0, 0, 70 , 0 , 0 , 0 , 0 , 0 ), // {cs|ss|ds|es} + ROW(1, 1, 1, 0, 66 , 0 , 0 , 0 , 0 , 0 ), // {fs|gs} + ROW(3, 1, 1, 0, 49 , 71 , 49 , 0 , 0 , 0 ), // #154 {xmm, vm32x, xmm} + ROW(3, 1, 1, 0, 52 , 72 , 52 , 0 , 0 , 0 ), // {ymm, vm32y, ymm} + ROW(2, 1, 1, 0, 49 , 71 , 0 , 0 , 0 , 0 ), // {xmm, vm32x} + ROW(2, 1, 1, 0, 52 , 72 , 0 , 0 , 0 , 0 ), // {ymm, vm32y} + ROW(2, 1, 1, 0, 55 , 73 , 0 , 0 , 0 , 0 ), // {zmm, vm32z} + ROW(3, 1, 1, 0, 49 , 74 , 49 , 0 , 0 , 0 ), // #159 {xmm, vm64x, xmm} + ROW(3, 1, 1, 0, 52 , 75 , 52 , 0 , 0 , 0 ), // {ymm, vm64y, ymm} + ROW(2, 1, 1, 0, 49 , 74 , 0 , 0 , 0 , 0 ), // {xmm, vm64x} + ROW(2, 1, 1, 0, 52 , 75 , 0 , 0 , 0 , 0 ), // {ymm, vm64y} + ROW(2, 1, 1, 0, 55 , 76 , 0 , 0 , 0 , 0 ), // {zmm, vm64z} + ROW(2, 1, 1, 0, 51 , 49 , 0 , 0 , 0 , 0 ), // #164 {m128|mem, xmm} + ROW(2, 1, 1, 0, 54 , 52 , 0 , 0 , 0 , 0 ), // {m256|mem, ymm} + ROW(2, 1, 1, 0, 51 , 49 , 0 , 0 , 0 , 0 ), // {m128|mem, xmm} + ROW(2, 1, 1, 0, 54 , 52 , 0 , 0 , 0 , 0 ), // {m256|mem, ymm} + ROW(2, 1, 1, 0, 57 , 55 , 0 , 0 , 0 , 0 ), // {m512|mem, zmm} + ROW(2, 1, 1, 0, 49 , 51 , 0 , 0 , 0 , 0 ), // #169 {xmm, m128|mem} + ROW(2, 1, 1, 0, 52 , 54 , 0 , 0 , 0 , 0 ), // {ymm, m256|mem} + ROW(2, 1, 1, 0, 49 , 51 , 0 , 0 , 0 , 0 ), // {xmm, m128|mem} + ROW(2, 1, 1, 0, 52 , 54 , 0 , 0 , 0 , 0 ), // {ymm, m256|mem} + ROW(2, 1, 1, 0, 55 , 57 , 0 , 0 , 0 , 0 ), // {zmm, m512|mem} + ROW(2, 0, 1, 0, 29 , 49 , 0 , 0 , 0 , 0 ), // #174 {r64|m64|mem, xmm} + ROW(2, 1, 1, 0, 49 , 64 , 0 , 0 , 0 , 0 ), // {xmm, xmm|m64|mem} + ROW(2, 0, 1, 0, 49 , 29 , 0 , 0 , 0 , 0 ), // {xmm, r64|m64|mem} + ROW(2, 1, 1, 0, 31 , 49 , 0 , 0 , 0 , 0 ), // {m64|mem, xmm} + ROW(2, 1, 1, 0, 31 , 49 , 0 , 0 , 0 , 0 ), // {m64|mem, xmm} + ROW(2, 1, 1, 0, 77 , 78 , 0 , 0 , 0 , 0 ), // #179 {ds:[memBase|zsi|m8], es:[memBase|zdi|m8]} + ROW(2, 1, 1, 0, 79 , 80 , 0 , 0 , 0 , 0 ), // {ds:[memBase|zsi|m16], es:[memBase|zdi|m16]} + ROW(2, 1, 1, 0, 81 , 82 , 0 , 0 , 0 , 0 ), // {ds:[memBase|zsi|m32], es:[memBase|zdi|m32]} + ROW(2, 0, 1, 0, 83 , 84 , 0 , 0 , 0 , 0 ), // {ds:[memBase|zsi|m64], es:[memBase|zdi|m64]} + ROW(3, 1, 1, 1, 1 , 2 , 85 , 0 , 0 , 0 ), // #183 {r8lo|r8hi|m8|mem, r8lo|r8hi, } + ROW(3, 1, 1, 1, 27 , 4 , 36 , 0 , 0 , 0 ), // {r16|m16|mem, r16, } + ROW(3, 1, 1, 1, 28 , 6 , 39 , 0 , 0 , 0 ), // {r32|m32|mem, r32, } + ROW(3, 0, 1, 1, 29 , 8 , 41 , 0 , 0 , 0 ), // {r64|m64|mem, r64, } + ROW(2, 1, 1, 0, 86 , 87 , 0 , 0 , 0 , 0 ), // #187 {k, k|m64|mem} + ROW(2, 0, 1, 0, 86 , 8 , 0 , 0 , 0 , 0 ), // {k, r64} + ROW(2, 1, 1, 0, 31 , 86 , 0 , 0 , 0 , 0 ), // {m64|mem, k} + ROW(2, 0, 1, 0, 8 , 86 , 0 , 0 , 0 , 0 ), // {r64, k} + ROW(2, 1, 1, 0, 45 , 88 , 0 , 0 , 0 , 0 ), // #191 {al, ds:[memBase|zsi|m8|mem]} + ROW(2, 1, 1, 0, 46 , 89 , 0 , 0 , 0 , 0 ), // {ax, ds:[memBase|zsi|m16|mem]} + ROW(2, 1, 1, 0, 47 , 90 , 0 , 0 , 0 , 0 ), // {eax, ds:[memBase|zsi|m32|mem]} + ROW(2, 0, 1, 0, 48 , 91 , 0 , 0 , 0 , 0 ), // {rax, ds:[memBase|zsi|m64|mem]} + ROW(2, 1, 1, 0, 78 , 77 , 0 , 0 , 0 , 0 ), // #195 {es:[memBase|zdi|m8], ds:[memBase|zsi|m8]} + ROW(2, 1, 1, 0, 80 , 79 , 0 , 0 , 0 , 0 ), // {es:[memBase|zdi|m16], ds:[memBase|zsi|m16]} + ROW(2, 1, 1, 0, 82 , 81 , 0 , 0 , 0 , 0 ), // {es:[memBase|zdi|m32], ds:[memBase|zsi|m32]} + ROW(2, 0, 1, 0, 84 , 83 , 0 , 0 , 0 , 0 ), // {es:[memBase|zdi|m64], ds:[memBase|zsi|m64]} + ROW(2, 1, 1, 0, 45 , 92 , 0 , 0 , 0 , 0 ), // #199 {al, es:[memBase|zdi|m8|mem]} + ROW(2, 1, 1, 0, 46 , 93 , 0 , 0 , 0 , 0 ), // {ax, es:[memBase|zdi|m16|mem]} + ROW(2, 1, 1, 0, 47 , 94 , 0 , 0 , 0 , 0 ), // {eax, es:[memBase|zdi|m32|mem]} + ROW(2, 0, 1, 0, 48 , 95 , 0 , 0 , 0 , 0 ), // {rax, es:[memBase|zdi|m64|mem]} + ROW(2, 1, 1, 0, 92 , 45 , 0 , 0 , 0 , 0 ), // #203 {es:[memBase|zdi|m8|mem], al} + ROW(2, 1, 1, 0, 93 , 46 , 0 , 0 , 0 , 0 ), // {es:[memBase|zdi|m16|mem], ax} + ROW(2, 1, 1, 0, 94 , 47 , 0 , 0 , 0 , 0 ), // {es:[memBase|zdi|m32|mem], eax} + ROW(2, 0, 1, 0, 95 , 48 , 0 , 0 , 0 , 0 ), // {es:[memBase|zdi|m64|mem], rax} + ROW(4, 1, 1, 0, 49 , 49 , 49 , 50 , 0 , 0 ), // #207 {xmm, xmm, xmm, xmm|m128|mem} + ROW(4, 1, 1, 0, 49 , 49 , 51 , 49 , 0 , 0 ), // {xmm, xmm, m128|mem, xmm} + ROW(4, 1, 1, 0, 52 , 52 , 52 , 53 , 0 , 0 ), // {ymm, ymm, ymm, ymm|m256|mem} + ROW(4, 1, 1, 0, 52 , 52 , 54 , 52 , 0 , 0 ), // {ymm, ymm, m256|mem, ymm} + ROW(3, 1, 1, 0, 49 , 71 , 49 , 0 , 0 , 0 ), // #211 {xmm, vm32x, xmm} + ROW(3, 1, 1, 0, 52 , 71 , 52 , 0 , 0 , 0 ), // {ymm, vm32x, ymm} + ROW(2, 1, 1, 0, 96 , 71 , 0 , 0 , 0 , 0 ), // {xmm|ymm, vm32x} + ROW(2, 1, 1, 0, 55 , 72 , 0 , 0 , 0 , 0 ), // {zmm, vm32y} + ROW(3, 1, 1, 0, 51 , 49 , 49 , 0 , 0 , 0 ), // #215 {m128|mem, xmm, xmm} + ROW(3, 1, 1, 0, 54 , 52 , 52 , 0 , 0 , 0 ), // {m256|mem, ymm, ymm} + ROW(3, 1, 1, 0, 49 , 49 , 51 , 0 , 0 , 0 ), // {xmm, xmm, m128|mem} + ROW(3, 1, 1, 0, 52 , 52 , 54 , 0 , 0 , 0 ), // {ymm, ymm, m256|mem} + ROW(2, 1, 1, 0, 31 , 49 , 0 , 0 , 0 , 0 ), // #219 {m64|mem, xmm} + ROW(3, 1, 1, 0, 49 , 49 , 31 , 0 , 0 , 0 ), // {xmm, xmm, m64|mem} + ROW(2, 1, 1, 0, 31 , 49 , 0 , 0 , 0 , 0 ), // {m64|mem, xmm} + ROW(3, 1, 1, 0, 49 , 49 , 31 , 0 , 0 , 0 ), // {xmm, xmm, m64|mem} + ROW(2, 1, 1, 0, 21 , 49 , 0 , 0 , 0 , 0 ), // #223 {m16|mem, xmm} + ROW(2, 1, 1, 0, 49 , 21 , 0 , 0 , 0 , 0 ), // {xmm, m16|mem} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // {xmm, xmm, xmm} + ROW(3, 1, 1, 0, 49 , 49 , 49 , 0 , 0 , 0 ), // {xmm, xmm, xmm} + ROW(5, 1, 1, 0, 49 , 49 , 50 , 49 , 97 , 0 ), // #227 {xmm, xmm, xmm|m128|mem, xmm, i4|u4} + ROW(5, 1, 1, 0, 49 , 49 , 49 , 51 , 97 , 0 ), // {xmm, xmm, xmm, m128|mem, i4|u4} + ROW(5, 1, 1, 0, 52 , 52 , 53 , 52 , 97 , 0 ), // {ymm, ymm, ymm|m256|mem, ymm, i4|u4} + ROW(5, 1, 1, 0, 52 , 52 , 52 , 54 , 97 , 0 ), // {ymm, ymm, ymm, m256|mem, i4|u4} + ROW(3, 1, 1, 0, 52 , 53 , 10 , 0 , 0 , 0 ), // #231 {ymm, ymm|m256|mem, i8|u8} + ROW(3, 1, 1, 0, 52 , 52 , 53 , 0 , 0 , 0 ), // {ymm, ymm, ymm|m256|mem} + ROW(3, 1, 1, 0, 55 , 55 , 60 , 0 , 0 , 0 ), // {zmm, zmm, zmm|m512|mem|i8|u8} + ROW(3, 1, 1, 0, 55 , 57 , 10 , 0 , 0 , 0 ), // {zmm, m512|mem, i8|u8} + ROW(1, 1, 0, 0, 98 , 0 , 0 , 0 , 0 , 0 ), // #235 {rel16|r16|m16|mem|r32|m32} + ROW(1, 1, 1, 0, 99 , 0 , 0 , 0 , 0 , 0 ), // #236 {rel32} + ROW(1, 0, 1, 0, 29 , 0 , 0 , 0 , 0 , 0 ), // {r64|m64|mem} + ROW(1, 1, 0, 0, 100, 0 , 0 , 0 , 0 , 0 ), // #238 {r16|r32} + ROW(1, 1, 1, 0, 32 , 0 , 0 , 0 , 0 , 0 ), // #239 {r8lo|r8hi|m8|r16|m16|r32|m32} + ROW(1, 0, 1, 0, 15 , 0 , 0 , 0 , 0 , 0 ), // {r64|m64} + ROW(1, 1, 1, 0, 101, 0 , 0 , 0 , 0 , 0 ), // #241 {m32|m64} + ROW(2, 1, 1, 0, 102, 103, 0 , 0 , 0 , 0 ), // {st0, st} + ROW(2, 1, 1, 0, 103, 102, 0 , 0 , 0 , 0 ), // {st, st0} + ROW(1, 1, 1, 0, 104, 0 , 0 , 0 , 0 , 0 ), // #244 {rel8|rel32} + ROW(1, 1, 0, 0, 105, 0 , 0 , 0 , 0 , 0 ), // {rel16|r32|m32} + ROW(1, 0, 1, 0, 15 , 0 , 0 , 0 , 0 , 0 ), // {r64|m64} + ROW(2, 1, 0, 0, 106, 107, 0 , 0 , 0 , 0 ), // #247 {i16, i16|i32} + ROW(1, 1, 1, 0, 108, 0 , 0 , 0 , 0 , 0 ), // {m32|mem|m48} + ROW(1, 0, 1, 0, 109, 0 , 0 , 0 , 0 , 0 ), // {m80|mem} + ROW(2, 1, 1, 0, 4 , 30 , 0 , 0 , 0 , 0 ), // #250 {r16, m32|mem} + ROW(2, 1, 1, 0, 6 , 110, 0 , 0 , 0 , 0 ), // {r32, m48|mem} + ROW(2, 0, 1, 0, 8 , 109, 0 , 0 , 0 , 0 ), // {r64, m80|mem} + ROW(2, 1, 1, 0, 4 , 27 , 0 , 0 , 0 , 0 ), // #253 {r16, r16|m16|mem} + ROW(2, 1, 1, 0, 6 , 111, 0 , 0 , 0 , 0 ), // {r32, r32|m16|mem} + ROW(2, 0, 1, 0, 8 , 111, 0 , 0 , 0 , 0 ), // {r64, r32|m16|mem} + ROW(2, 1, 1, 0, 4 , 9 , 0 , 0 , 0 , 0 ), // #256 {r16, r8lo|r8hi|m8} + ROW(2, 1, 1, 0, 6 , 112, 0 , 0 , 0 , 0 ), // {r32, r8lo|r8hi|m8|r16|m16} + ROW(2, 0, 1, 0, 8 , 113, 0 , 0 , 0 , 0 ), // {r64, r8lo|m8|r16|m16} + ROW(3, 1, 1, 0, 27 , 4 , 114, 0 , 0 , 0 ), // #259 {r16|m16|mem, r16, cl|i8|u8} + ROW(3, 1, 1, 0, 28 , 6 , 114, 0 , 0 , 0 ), // {r32|m32|mem, r32, cl|i8|u8} + ROW(3, 0, 1, 0, 29 , 8 , 114, 0 , 0 , 0 ), // {r64|m64|mem, r64, cl|i8|u8} + ROW(3, 1, 1, 0, 49 , 49 , 50 , 0 , 0 , 0 ), // #262 {xmm, xmm, xmm|m128|mem} + ROW(3, 1, 1, 0, 52 , 52 , 53 , 0 , 0 , 0 ), // #263 {ymm, ymm, ymm|m256|mem} + ROW(3, 1, 1, 0, 55 , 55 , 56 , 0 , 0 , 0 ), // {zmm, zmm, zmm|m512|mem} + ROW(4, 1, 1, 0, 49 , 49 , 50 , 10 , 0 , 0 ), // #265 {xmm, xmm, xmm|m128|mem, i8|u8} + ROW(4, 1, 1, 0, 52 , 52 , 53 , 10 , 0 , 0 ), // #266 {ymm, ymm, ymm|m256|mem, i8|u8} + ROW(4, 1, 1, 0, 55 , 55 , 56 , 10 , 0 , 0 ), // {zmm, zmm, zmm|m512|mem, i8|u8} + ROW(4, 1, 1, 0, 115, 49 , 50 , 10 , 0 , 0 ), // #268 {xmm|k, xmm, xmm|m128|mem, i8|u8} + ROW(4, 1, 1, 0, 116, 52 , 53 , 10 , 0 , 0 ), // {ymm|k, ymm, ymm|m256|mem, i8|u8} + ROW(4, 1, 1, 0, 86 , 55 , 56 , 10 , 0 , 0 ), // {k, zmm, zmm|m512|mem, i8|u8} + ROW(4, 1, 1, 0, 86 , 49 , 50 , 10 , 0 , 0 ), // #271 {k, xmm, xmm|m128|mem, i8|u8} + ROW(4, 1, 1, 0, 86 , 52 , 53 , 10 , 0 , 0 ), // {k, ymm, ymm|m256|mem, i8|u8} + ROW(4, 1, 1, 0, 86 , 55 , 56 , 10 , 0 , 0 ), // {k, zmm, zmm|m512|mem, i8|u8} + ROW(2, 1, 1, 0, 50 , 49 , 0 , 0 , 0 , 0 ), // #274 {xmm|m128|mem, xmm} + ROW(2, 1, 1, 0, 53 , 52 , 0 , 0 , 0 , 0 ), // {ymm|m256|mem, ymm} + ROW(2, 1, 1, 0, 56 , 55 , 0 , 0 , 0 , 0 ), // {zmm|m512|mem, zmm} + ROW(2, 1, 1, 0, 49 , 64 , 0 , 0 , 0 , 0 ), // #277 {xmm, xmm|m64|mem} + ROW(2, 1, 1, 0, 52 , 50 , 0 , 0 , 0 , 0 ), // {ymm, xmm|m128|mem} + ROW(2, 1, 1, 0, 55 , 53 , 0 , 0 , 0 , 0 ), // {zmm, ymm|m256|mem} + ROW(2, 1, 1, 0, 49 , 50 , 0 , 0 , 0 , 0 ), // #280 {xmm, xmm|m128|mem} + ROW(2, 1, 1, 0, 52 , 53 , 0 , 0 , 0 , 0 ), // {ymm, ymm|m256|mem} + ROW(2, 1, 1, 0, 55 , 56 , 0 , 0 , 0 , 0 ), // {zmm, zmm|m512|mem} + ROW(2, 1, 1, 0, 49 , 117, 0 , 0 , 0 , 0 ), // #283 {xmm, xmm|m32|mem} + ROW(2, 1, 1, 0, 52 , 64 , 0 , 0 , 0 , 0 ), // {ymm, xmm|m64|mem} + ROW(2, 1, 1, 0, 55 , 50 , 0 , 0 , 0 , 0 ), // {zmm, xmm|m128|mem} + ROW(3, 1, 1, 0, 64 , 49 , 10 , 0 , 0 , 0 ), // #286 {xmm|m64|mem, xmm, i8|u8} + ROW(3, 1, 1, 0, 50 , 52 , 10 , 0 , 0 , 0 ), // #287 {xmm|m128|mem, ymm, i8|u8} + ROW(3, 1, 1, 0, 53 , 55 , 10 , 0 , 0 , 0 ), // #288 {ymm|m256|mem, zmm, i8|u8} + ROW(3, 1, 1, 0, 49 , 118, 49 , 0 , 0 , 0 ), // #289 {xmm, vm64x|vm64y, xmm} + ROW(2, 1, 1, 0, 49 , 118, 0 , 0 , 0 , 0 ), // {xmm, vm64x|vm64y} + ROW(2, 1, 1, 0, 52 , 76 , 0 , 0 , 0 , 0 ), // {ymm, vm64z} + ROW(3, 1, 1, 0, 49 , 50 , 10 , 0 , 0 , 0 ), // #292 {xmm, xmm|m128|mem, i8|u8} + ROW(3, 1, 1, 0, 52 , 53 , 10 , 0 , 0 , 0 ), // {ymm, ymm|m256|mem, i8|u8} + ROW(3, 1, 1, 0, 55 , 56 , 10 , 0 , 0 , 0 ), // {zmm, zmm|m512|mem, i8|u8} + ROW(2, 1, 1, 0, 49 , 64 , 0 , 0 , 0 , 0 ), // #295 {xmm, xmm|m64|mem} + ROW(2, 1, 1, 0, 52 , 53 , 0 , 0 , 0 , 0 ), // {ymm, ymm|m256|mem} + ROW(2, 1, 1, 0, 55 , 56 , 0 , 0 , 0 , 0 ), // {zmm, zmm|m512|mem} + ROW(4, 1, 1, 0, 86 , 86 , 49 , 50 , 0 , 0 ), // #298 {k, k, xmm, xmm|m128|mem} + ROW(4, 1, 1, 0, 86 , 86 , 52 , 53 , 0 , 0 ), // {k, k, ymm, ymm|m256|mem} + ROW(4, 1, 1, 0, 86 , 86 , 55 , 56 , 0 , 0 ), // {k, k, zmm, zmm|m512|mem} + ROW(3, 1, 1, 0, 115, 49 , 50 , 0 , 0 , 0 ), // #301 {xmm|k, xmm, xmm|m128|mem} + ROW(3, 1, 1, 0, 116, 52 , 53 , 0 , 0 , 0 ), // {ymm|k, ymm, ymm|m256|mem} + ROW(3, 1, 1, 0, 86 , 55 , 56 , 0 , 0 , 0 ), // {k, zmm, zmm|m512|mem} + ROW(2, 1, 1, 0, 117, 49 , 0 , 0 , 0 , 0 ), // #304 {xmm|m32|mem, xmm} + ROW(2, 1, 1, 0, 64 , 52 , 0 , 0 , 0 , 0 ), // {xmm|m64|mem, ymm} + ROW(2, 1, 1, 0, 50 , 55 , 0 , 0 , 0 , 0 ), // {xmm|m128|mem, zmm} + ROW(2, 1, 1, 0, 64 , 49 , 0 , 0 , 0 , 0 ), // #307 {xmm|m64|mem, xmm} + ROW(2, 1, 1, 0, 50 , 52 , 0 , 0 , 0 , 0 ), // {xmm|m128|mem, ymm} + ROW(2, 1, 1, 0, 53 , 55 , 0 , 0 , 0 , 0 ), // {ymm|m256|mem, zmm} + ROW(2, 1, 1, 0, 119, 49 , 0 , 0 , 0 , 0 ), // #310 {xmm|m16|mem, xmm} + ROW(2, 1, 1, 0, 117, 52 , 0 , 0 , 0 , 0 ), // {xmm|m32|mem, ymm} + ROW(2, 1, 1, 0, 64 , 55 , 0 , 0 , 0 , 0 ), // {xmm|m64|mem, zmm} + ROW(2, 1, 1, 0, 49 , 119, 0 , 0 , 0 , 0 ), // #313 {xmm, xmm|m16|mem} + ROW(2, 1, 1, 0, 52 , 117, 0 , 0 , 0 , 0 ), // {ymm, xmm|m32|mem} + ROW(2, 1, 1, 0, 55 , 64 , 0 , 0 , 0 , 0 ), // {zmm, xmm|m64|mem} + ROW(2, 1, 1, 0, 71 , 49 , 0 , 0 , 0 , 0 ), // #316 {vm32x, xmm} + ROW(2, 1, 1, 0, 72 , 52 , 0 , 0 , 0 , 0 ), // {vm32y, ymm} + ROW(2, 1, 1, 0, 73 , 55 , 0 , 0 , 0 , 0 ), // {vm32z, zmm} + ROW(2, 1, 1, 0, 74 , 49 , 0 , 0 , 0 , 0 ), // #319 {vm64x, xmm} + ROW(2, 1, 1, 0, 75 , 52 , 0 , 0 , 0 , 0 ), // {vm64y, ymm} + ROW(2, 1, 1, 0, 76 , 55 , 0 , 0 , 0 , 0 ), // {vm64z, zmm} + ROW(3, 1, 1, 0, 86 , 49 , 50 , 0 , 0 , 0 ), // #322 {k, xmm, xmm|m128|mem} + ROW(3, 1, 1, 0, 86 , 52 , 53 , 0 , 0 , 0 ), // {k, ymm, ymm|m256|mem} + ROW(3, 1, 1, 0, 86 , 55 , 56 , 0 , 0 , 0 ), // {k, zmm, zmm|m512|mem} + ROW(3, 1, 1, 0, 6 , 6 , 28 , 0 , 0 , 0 ), // #325 {r32, r32, r32|m32|mem} + ROW(3, 0, 1, 0, 8 , 8 , 29 , 0 , 0 , 0 ), // {r64, r64, r64|m64|mem} + ROW(3, 1, 1, 0, 6 , 28 , 6 , 0 , 0 , 0 ), // #327 {r32, r32|m32|mem, r32} + ROW(3, 0, 1, 0, 8 , 29 , 8 , 0 , 0 , 0 ), // {r64, r64|m64|mem, r64} + ROW(2, 1, 0, 0, 120, 28 , 0 , 0 , 0 , 0 ), // #329 {bnd, r32|m32|mem} + ROW(2, 0, 1, 0, 120, 29 , 0 , 0 , 0 , 0 ), // {bnd, r64|m64|mem} + ROW(2, 1, 1, 0, 120, 121, 0 , 0 , 0 , 0 ), // #331 {bnd, bnd|mem} + ROW(2, 1, 1, 0, 122, 120, 0 , 0 , 0 , 0 ), // {mem, bnd} + ROW(2, 1, 0, 0, 4 , 30 , 0 , 0 , 0 , 0 ), // #333 {r16, m32|mem} + ROW(2, 1, 0, 0, 6 , 31 , 0 , 0 , 0 , 0 ), // {r32, m64|mem} + ROW(1, 1, 1, 0, 100, 0 , 0 , 0 , 0 , 0 ), // #335 {r16|r32} + ROW(1, 0, 1, 0, 8 , 0 , 0 , 0 , 0 , 0 ), // #336 {r64} + ROW(3, 1, 1, 0, 30 , 6 , 6 , 0 , 0 , 0 ), // #337 {m32|mem, r32, r32} + ROW(3, 0, 1, 0, 31 , 8 , 8 , 0 , 0 , 0 ), // {m64|mem, r64, r64} + ROW(2, 1, 1, 0, 6 , 32 , 0 , 0 , 0 , 0 ), // #339 {r32, r8lo|r8hi|m8|r16|m16|r32|m32} + ROW(2, 0, 1, 0, 8 , 123, 0 , 0 , 0 , 0 ), // {r64, r8lo|m8|r64|m64} + ROW(2, 1, 1, 0, 6 , 64 , 0 , 0 , 0 , 0 ), // #341 {r32, xmm|m64|mem} + ROW(2, 0, 1, 0, 8 , 64 , 0 , 0 , 0 , 0 ), // {r64, xmm|m64|mem} + ROW(2, 1, 1, 0, 49 , 28 , 0 , 0 , 0 , 0 ), // #343 {xmm, r32|m32|mem} + ROW(2, 0, 1, 0, 49 , 29 , 0 , 0 , 0 , 0 ), // {xmm, r64|m64|mem} + ROW(2, 0, 1, 0, 49 , 29 , 0 , 0 , 0 , 0 ), // #345 {xmm, r64|m64|mem} + ROW(2, 1, 1, 0, 49 , 28 , 0 , 0 , 0 , 0 ), // {xmm, r32|m32|mem} + ROW(2, 1, 1, 0, 6 , 117, 0 , 0 , 0 , 0 ), // #347 {r32, xmm|m32|mem} + ROW(2, 0, 1, 0, 8 , 117, 0 , 0 , 0 , 0 ), // {r64, xmm|m32|mem} + ROW(2, 0, 1, 0, 8 , 117, 0 , 0 , 0 , 0 ), // #349 {r64, xmm|m32|mem} + ROW(2, 1, 1, 0, 6 , 117, 0 , 0 , 0 , 0 ), // {r32, xmm|m32|mem} + ROW(2, 1, 0, 0, 124, 57 , 0 , 0 , 0 , 0 ), // #351 {es:[mem|m512|memBase], m512|mem} + ROW(2, 0, 1, 0, 124, 57 , 0 , 0 , 0 , 0 ), // {es:[mem|m512|memBase], m512|mem} + ROW(3, 1, 1, 0, 49 , 10 , 10 , 0 , 0 , 0 ), // #353 {xmm, i8|u8, i8|u8} + ROW(2, 1, 1, 0, 49 , 49 , 0 , 0 , 0 , 0 ), // #354 {xmm, xmm} + ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #355 {} + ROW(1, 1, 1, 0, 103, 0 , 0 , 0 , 0 , 0 ), // #356 {st} + ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #357 {} + ROW(1, 1, 1, 0, 125, 0 , 0 , 0 , 0 , 0 ), // #358 {m32|m64|st} + ROW(2, 1, 1, 0, 49 , 49 , 0 , 0 , 0 , 0 ), // #359 {xmm, xmm} + ROW(4, 1, 1, 0, 49 , 49 , 10 , 10 , 0 , 0 ), // {xmm, xmm, i8|u8, i8|u8} + ROW(2, 1, 0, 0, 6 , 51 , 0 , 0 , 0 , 0 ), // #361 {r32, m128|mem} + ROW(2, 0, 1, 0, 8 , 51 , 0 , 0 , 0 , 0 ), // {r64, m128|mem} + ROW(2, 1, 0, 2, 39 , 126, 0 , 0 , 0 , 0 ), // #363 {, } + ROW(2, 0, 1, 2, 127, 126, 0 , 0 , 0 , 0 ), // {, } + ROW(3, 1, 0, 3, 39 , 38 , 126, 0 , 0 , 0 ), // #365 {, , } + ROW(3, 0, 1, 3, 127, 38 , 126, 0 , 0 , 0 ), // {, , } + ROW(2, 1, 0, 1, 128, 129, 0 , 0 , 0 , 0 ), // #367 {, rel8} + ROW(2, 0, 1, 1, 130, 129, 0 , 0 , 0 , 0 ), // {, rel8} + ROW(2, 1, 1, 0, 86 , 131, 0 , 0 , 0 , 0 ), // #369 {k, k|m8|mem|r32} + ROW(2, 1, 1, 0, 132, 86 , 0 , 0 , 0 , 0 ), // {m8|mem|r32, k} + ROW(2, 1, 1, 0, 86 , 133, 0 , 0 , 0 , 0 ), // #371 {k, k|m32|mem|r32} + ROW(2, 1, 1, 0, 28 , 86 , 0 , 0 , 0 , 0 ), // {m32|mem|r32, k} + ROW(2, 1, 1, 0, 86 , 134, 0 , 0 , 0 , 0 ), // #373 {k, k|m16|mem|r32} + ROW(2, 1, 1, 0, 111, 86 , 0 , 0 , 0 , 0 ), // {m16|mem|r32, k} + ROW(2, 1, 0, 0, 4 , 30 , 0 , 0 , 0 , 0 ), // #375 {r16, m32|mem} + ROW(2, 1, 0, 0, 6 , 110, 0 , 0 , 0 , 0 ), // {r32, m48|mem} + ROW(2, 1, 1, 0, 100, 135, 0 , 0 , 0 , 0 ), // #377 {r16|r32, mem|m8|m16|m32|m48|m64|m80|m128|m256|m512|m1024} + ROW(2, 0, 1, 0, 8 , 135, 0 , 0 , 0 , 0 ), // {r64, mem|m8|m16|m32|m48|m64|m80|m128|m256|m512|m1024} + ROW(1, 1, 1, 0, 6 , 0 , 0 , 0 , 0 , 0 ), // #379 {r32} + ROW(1, 0, 1, 0, 8 , 0 , 0 , 0 , 0 , 0 ), // {r64} + ROW(3, 1, 1, 0, 6 , 28 , 14 , 0 , 0 , 0 ), // #381 {r32, r32|m32|mem, i32|u32} + ROW(3, 0, 1, 0, 8 , 28 , 14 , 0 , 0 , 0 ), // {r64, r32|m32|mem, i32|u32} + ROW(2, 1, 1, 0, 63 , 28 , 0 , 0 , 0 , 0 ), // #383 {mm|xmm, r32|m32|mem} + ROW(2, 1, 1, 0, 28 , 63 , 0 , 0 , 0 , 0 ), // {r32|m32|mem, mm|xmm} + ROW(2, 1, 1, 0, 124, 57 , 0 , 0 , 0 , 0 ), // #385 {es:[mem|m512|memBase], m512|mem} + ROW(2, 1, 1, 0, 124, 57 , 0 , 0 , 0 , 0 ), // {es:[mem|m512|memBase], m512|mem} + ROW(2, 1, 1, 0, 49 , 64 , 0 , 0 , 0 , 0 ), // #387 {xmm, xmm|m64|mem} + ROW(2, 1, 1, 0, 31 , 49 , 0 , 0 , 0 , 0 ), // {m64|mem, xmm} + ROW(2, 1, 1, 0, 49 , 117, 0 , 0 , 0 , 0 ), // #389 {xmm, xmm|m32|mem} + ROW(2, 1, 1, 0, 30 , 49 , 0 , 0 , 0 , 0 ), // {m32|mem, xmm} + ROW(2, 0, 1, 0, 4 , 27 , 0 , 0 , 0 , 0 ), // #391 {r16, r16|m16|mem} + ROW(2, 0, 1, 0, 136, 28 , 0 , 0 , 0 , 0 ), // {r32|r64, r32|m32|mem} + ROW(4, 1, 1, 1, 6 , 6 , 28 , 38 , 0 , 0 ), // #393 {r32, r32, r32|m32|mem, } + ROW(4, 0, 1, 1, 8 , 8 , 29 , 40 , 0 , 0 ), // {r64, r64, r64|m64|mem, } + ROW(2, 1, 1, 0, 61 , 62 , 0 , 0 , 0 , 0 ), // #395 {mm, mm|m64|mem} + ROW(2, 1, 1, 0, 49 , 50 , 0 , 0 , 0 , 0 ), // {xmm, xmm|m128|mem} + ROW(3, 1, 1, 0, 61 , 62 , 10 , 0 , 0 , 0 ), // #397 {mm, mm|m64|mem, i8|u8} + ROW(3, 1, 1, 0, 49 , 50 , 10 , 0 , 0 , 0 ), // {xmm, xmm|m128|mem, i8|u8} + ROW(3, 1, 1, 0, 6 , 63 , 10 , 0 , 0 , 0 ), // #399 {r32, mm|xmm, i8|u8} + ROW(3, 1, 1, 0, 21 , 49 , 10 , 0 , 0 , 0 ), // {m16|mem, xmm, i8|u8} + ROW(2, 1, 1, 0, 61 , 137, 0 , 0 , 0 , 0 ), // #401 {mm, i8|u8|mm|m64|mem} + ROW(2, 1, 1, 0, 49 , 58 , 0 , 0 , 0 , 0 ), // {xmm, i8|u8|xmm|m128|mem} + ROW(1, 1, 1, 0, 28 , 0 , 0 , 0 , 0 , 0 ), // #403 {r32|m32|mem} + ROW(1, 0, 1, 0, 29 , 0 , 0 , 0 , 0 , 0 ), // {r64|m64|mem} + ROW(2, 1, 1, 0, 61 , 138, 0 , 0 , 0 , 0 ), // #405 {mm, mm|m32|mem} + ROW(2, 1, 1, 0, 49 , 50 , 0 , 0 , 0 , 0 ), // {xmm, xmm|m128|mem} + ROW(2, 1, 1, 0, 32 , 114, 0 , 0 , 0 , 0 ), // #407 {r8lo|r8hi|m8|r16|m16|r32|m32, cl|i8|u8} + ROW(2, 0, 1, 0, 15 , 114, 0 , 0 , 0 , 0 ), // {r64|m64, cl|i8|u8} + ROW(1, 1, 0, 0, 6 , 0 , 0 , 0 , 0 , 0 ), // #409 {r32} + ROW(1, 0, 1, 0, 8 , 0 , 0 , 0 , 0 , 0 ), // {r64} + ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #411 {} + ROW(1, 1, 1, 0, 139, 0 , 0 , 0 , 0 , 0 ), // {u16} + ROW(3, 1, 1, 0, 6 , 28 , 10 , 0 , 0 , 0 ), // #413 {r32, r32|m32|mem, i8|u8} + ROW(3, 0, 1, 0, 8 , 29 , 10 , 0 , 0 , 0 ), // {r64, r64|m64|mem, i8|u8} + ROW(1, 1, 1, 0, 140, 0 , 0 , 0 , 0 , 0 ), // #415 {r16|m16|mem|r32} + ROW(1, 0, 1, 0, 141, 0 , 0 , 0 , 0 , 0 ), // {r64|m16|mem} + ROW(1, 1, 0, 0, 142, 0 , 0 , 0 , 0 , 0 ), // #417 {ds:[mem|memBase]} + ROW(1, 0, 1, 0, 142, 0 , 0 , 0 , 0 , 0 ), // {ds:[mem|memBase]} + ROW(4, 1, 1, 0, 49 , 49 , 50 , 49 , 0 , 0 ), // #419 {xmm, xmm, xmm|m128|mem, xmm} + ROW(4, 1, 1, 0, 52 , 52 , 53 , 52 , 0 , 0 ), // {ymm, ymm, ymm|m256|mem, ymm} + ROW(2, 1, 1, 0, 49 , 143, 0 , 0 , 0 , 0 ), // #421 {xmm, xmm|m128|ymm|m256} + ROW(2, 1, 1, 0, 52 , 56 , 0 , 0 , 0 , 0 ), // {ymm, zmm|m512|mem} + ROW(2, 1, 1, 0, 6 , 119, 0 , 0 , 0 , 0 ), // #423 {r32, xmm|m16|mem} + ROW(2, 0, 1, 0, 8 , 119, 0 , 0 , 0 , 0 ), // {r64, xmm|m16|mem} + ROW(3, 1, 1, 0, 49 , 49 , 28 , 0 , 0 , 0 ), // #425 {xmm, xmm, r32|m32|mem} + ROW(3, 0, 1, 0, 49 , 49 , 29 , 0 , 0 , 0 ), // {xmm, xmm, r64|m64|mem} + ROW(3, 1, 1, 0, 49 , 49 , 13 , 0 , 0 , 0 ), // #427 {xmm, xmm, r32|m32} + ROW(3, 0, 1, 0, 49 , 49 , 15 , 0 , 0 , 0 ), // {xmm, xmm, r64|m64} + ROW(4, 1, 1, 0, 49 , 49 , 49 , 64 , 0 , 0 ), // #429 {xmm, xmm, xmm, xmm|m64|mem} + ROW(4, 1, 1, 0, 49 , 49 , 31 , 49 , 0 , 0 ), // {xmm, xmm, m64|mem, xmm} + ROW(4, 1, 1, 0, 49 , 49 , 49 , 117, 0 , 0 ), // #431 {xmm, xmm, xmm, xmm|m32|mem} + ROW(4, 1, 1, 0, 49 , 49 , 30 , 49 , 0 , 0 ), // {xmm, xmm, m32|mem, xmm} + ROW(4, 1, 1, 0, 52 , 52 , 50 , 10 , 0 , 0 ), // #433 {ymm, ymm, xmm|m128|mem, i8|u8} + ROW(4, 1, 1, 0, 55 , 55 , 50 , 10 , 0 , 0 ), // {zmm, zmm, xmm|m128|mem, i8|u8} + ROW(1, 1, 0, 1, 39 , 0 , 0 , 0 , 0 , 0 ), // #435 {} + ROW(1, 0, 1, 1, 41 , 0 , 0 , 0 , 0 , 0 ), // #436 {} + ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #437 {} + ROW(0, 1, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // {} + ROW(2, 1, 1, 0, 28 , 49 , 0 , 0 , 0 , 0 ), // #439 {r32|m32|mem, xmm} + ROW(2, 1, 1, 0, 49 , 28 , 0 , 0 , 0 , 0 ), // {xmm, r32|m32|mem} + ROW(2, 1, 1, 0, 111, 49 , 0 , 0 , 0 , 0 ), // #441 {r32|m16|mem, xmm} + ROW(2, 1, 1, 0, 49 , 111, 0 , 0 , 0 , 0 ), // {xmm, r32|m16|mem} + ROW(2, 1, 0, 0, 28 , 6 , 0 , 0 , 0 , 0 ), // #443 {r32|m32|mem, r32} + ROW(2, 0, 1, 0, 29 , 8 , 0 , 0 , 0 , 0 ), // {r64|m64|mem, r64} + ROW(2, 1, 0, 0, 6 , 28 , 0 , 0 , 0 , 0 ), // #445 {r32, r32|m32|mem} + ROW(2, 0, 1, 0, 8 , 29 , 0 , 0 , 0 , 0 ), // {r64, r64|m64|mem} + ROW(2, 1, 1, 0, 144, 64 , 0 , 0 , 0 , 0 ), // #447 {xmm|ymm|zmm, xmm|m64|mem} + ROW(2, 0, 1, 0, 144, 8 , 0 , 0 , 0 , 0 ), // {xmm|ymm|zmm, r64} + ROW(3, 1, 1, 0, 49 , 49 , 58 , 0 , 0 , 0 ), // #449 {xmm, xmm, xmm|m128|mem|i8|u8} + ROW(3, 1, 1, 0, 49 , 51 , 145, 0 , 0 , 0 ), // {xmm, m128|mem, i8|u8|xmm} + ROW(2, 1, 1, 0, 71 , 96 , 0 , 0 , 0 , 0 ), // #451 {vm32x, xmm|ymm} + ROW(2, 1, 1, 0, 72 , 55 , 0 , 0 , 0 , 0 ), // {vm32y, zmm} + ROW(2, 1, 1, 0, 118, 49 , 0 , 0 , 0 , 0 ), // #453 {vm64x|vm64y, xmm} + ROW(2, 1, 1, 0, 76 , 52 , 0 , 0 , 0 , 0 ), // {vm64z, ymm} + ROW(3, 1, 1, 0, 49 , 49 , 50 , 0 , 0 , 0 ), // #455 {xmm, xmm, xmm|m128|mem} + ROW(3, 1, 1, 0, 49 , 51 , 49 , 0 , 0 , 0 ), // {xmm, m128|mem, xmm} + ROW(1, 1, 0, 1, 36 , 0 , 0 , 0 , 0 , 0 ), // #457 {} + ROW(2, 1, 0, 1, 36 , 10 , 0 , 0 , 0 , 0 ), // #458 {, i8|u8} + ROW(2, 1, 0, 0, 27 , 4 , 0 , 0 , 0 , 0 ), // #459 {r16|m16|mem, r16} + ROW(3, 1, 1, 1, 49 , 50 , 146, 0 , 0 , 0 ), // #460 {xmm, xmm|m128|mem, } + ROW(2, 1, 1, 0, 120, 147, 0 , 0 , 0 , 0 ), // #461 {bnd, mib} + ROW(2, 1, 1, 0, 120, 122, 0 , 0 , 0 , 0 ), // #462 {bnd, mem} + ROW(2, 1, 1, 0, 147, 120, 0 , 0 , 0 , 0 ), // #463 {mib, bnd} + ROW(1, 1, 1, 1, 36 , 0 , 0 , 0 , 0 , 0 ), // #464 {} + ROW(2, 1, 1, 2, 38 , 39 , 0 , 0 , 0 , 0 ), // #465 {, } + ROW(1, 1, 1, 0, 122, 0 , 0 , 0 , 0 , 0 ), // #466 {mem} + ROW(1, 1, 1, 0, 31 , 0 , 0 , 0 , 0 , 0 ), // #467 {m64|mem} + ROW(0, 0, 1, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #468 {} + ROW(1, 1, 1, 1, 148, 0 , 0 , 0 , 0 , 0 ), // #469 {} + ROW(3, 1, 1, 0, 49 , 64 , 10 , 0 , 0 , 0 ), // #470 {xmm, xmm|m64|mem, i8|u8} + ROW(3, 1, 1, 0, 49 , 117, 10 , 0 , 0 , 0 ), // #471 {xmm, xmm|m32|mem, i8|u8} + ROW(5, 0, 1, 4, 51 , 40 , 41 , 149, 150, 0 ), // #472 {m128|mem, , , , } + ROW(5, 1, 1, 4, 31 , 38 , 39 , 126, 151, 0 ), // #473 {m64|mem, , , , } + ROW(4, 1, 1, 4, 39 , 151, 126, 38 , 0 , 0 ), // #474 {, , , } + ROW(2, 0, 1, 2, 40 , 41 , 0 , 0 , 0 , 0 ), // #475 {, } + ROW(2, 1, 1, 0, 61 , 50 , 0 , 0 , 0 , 0 ), // #476 {mm, xmm|m128|mem} + ROW(2, 1, 1, 0, 49 , 62 , 0 , 0 , 0 , 0 ), // #477 {xmm, mm|m64|mem} + ROW(2, 1, 1, 0, 61 , 64 , 0 , 0 , 0 , 0 ), // #478 {mm, xmm|m64|mem} + ROW(2, 1, 1, 2, 37 , 36 , 0 , 0 , 0 , 0 ), // #479 {, } + ROW(1, 1, 1, 1, 39 , 0 , 0 , 0 , 0 , 0 ), // #480 {} + ROW(2, 1, 1, 0, 12 , 10 , 0 , 0 , 0 , 0 ), // #481 {i16|u16, i8|u8} + ROW(3, 1, 1, 0, 28 , 49 , 10 , 0 , 0 , 0 ), // #482 {r32|m32|mem, xmm, i8|u8} + ROW(1, 1, 1, 0, 109, 0 , 0 , 0 , 0 , 0 ), // #483 {m80|mem} + ROW(1, 1, 1, 0, 152, 0 , 0 , 0 , 0 , 0 ), // #484 {m16|m32} + ROW(1, 1, 1, 0, 153, 0 , 0 , 0 , 0 , 0 ), // #485 {m16|m32|m64} + ROW(1, 1, 1, 0, 154, 0 , 0 , 0 , 0 , 0 ), // #486 {m32|m64|m80|st} + ROW(1, 1, 1, 0, 21 , 0 , 0 , 0 , 0 , 0 ), // #487 {m16|mem} + ROW(1, 1, 1, 0, 155, 0 , 0 , 0 , 0 , 0 ), // #488 {ax|m16|mem} + ROW(1, 0, 1, 0, 122, 0 , 0 , 0 , 0 , 0 ), // #489 {mem} + ROW(2, 1, 1, 1, 10 , 39 , 0 , 0 , 0 , 0 ), // #490 {i8|u8, } + ROW(2, 1, 1, 0, 156, 157, 0 , 0 , 0 , 0 ), // #491 {al|ax|eax, i8|u8|dx} + ROW(2, 1, 1, 0, 158, 159, 0 , 0 , 0 , 0 ), // #492 {es:[memBase|zdi|m8|m16|m32], dx} + ROW(1, 1, 1, 0, 10 , 0 , 0 , 0 , 0 , 0 ), // #493 {i8|u8} + ROW(0, 1, 0, 0, 0 , 0 , 0 , 0 , 0 , 0 ), // #494 {} + ROW(3, 1, 1, 0, 86 , 86 , 86 , 0 , 0 , 0 ), // #495 {k, k, k} + ROW(2, 1, 1, 0, 86 , 86 , 0 , 0 , 0 , 0 ), // #496 {k, k} + ROW(3, 1, 1, 0, 86 , 86 , 10 , 0 , 0 , 0 ), // #497 {k, k, i8|u8} + ROW(1, 1, 1, 1, 160, 0 , 0 , 0 , 0 , 0 ), // #498 {} + ROW(1, 1, 1, 0, 30 , 0 , 0 , 0 , 0 , 0 ), // #499 {m32|mem} + ROW(1, 0, 1, 0, 57 , 0 , 0 , 0 , 0 , 0 ), // #500 {m512|mem} + ROW(1, 1, 1, 0, 27 , 0 , 0 , 0 , 0 , 0 ), // #501 {r16|m16|mem} + ROW(3, 1, 1, 1, 49 , 49 , 161, 0 , 0 , 0 ), // #502 {xmm, xmm, } + ROW(3, 1, 1, 1, 61 , 61 , 162, 0 , 0 , 0 ), // #503 {mm, mm, } + ROW(3, 1, 1, 3, 163, 126, 38 , 0 , 0 , 0 ), // #504 {, , } + ROW(2, 1, 1, 0, 61 , 49 , 0 , 0 , 0 , 0 ), // #505 {mm, xmm} + ROW(2, 1, 1, 0, 6 , 49 , 0 , 0 , 0 , 0 ), // #506 {r32, xmm} + ROW(2, 1, 1, 0, 31 , 61 , 0 , 0 , 0 , 0 ), // #507 {m64|mem, mm} + ROW(2, 1, 1, 0, 49 , 61 , 0 , 0 , 0 , 0 ), // #508 {xmm, mm} + ROW(2, 1, 1, 2, 39 , 126, 0 , 0 , 0 , 0 ), // #509 {, } + ROW(3, 1, 1, 3, 39 , 126, 151, 0 , 0 , 0 ), // #510 {, , } + ROW(2, 1, 1, 0, 164, 156, 0 , 0 , 0 , 0 ), // #511 {u8|dx, al|ax|eax} + ROW(2, 1, 1, 0, 159, 165, 0 , 0 , 0 , 0 ), // #512 {dx, ds:[memBase|zsi|m8|m16|m32]} + ROW(6, 1, 1, 3, 49 , 50 , 10 , 126, 39 , 38 ), // #513 {xmm, xmm|m128|mem, i8|u8, , , } + ROW(6, 1, 1, 3, 49 , 50 , 10 , 146, 39 , 38 ), // #514 {xmm, xmm|m128|mem, i8|u8, , , } + ROW(4, 1, 1, 1, 49 , 50 , 10 , 126, 0 , 0 ), // #515 {xmm, xmm|m128|mem, i8|u8, } + ROW(4, 1, 1, 1, 49 , 50 , 10 , 146, 0 , 0 ), // #516 {xmm, xmm|m128|mem, i8|u8, } + ROW(3, 1, 1, 0, 132, 49 , 10 , 0 , 0 , 0 ), // #517 {r32|m8|mem, xmm, i8|u8} + ROW(3, 0, 1, 0, 29 , 49 , 10 , 0 , 0 , 0 ), // #518 {r64|m64|mem, xmm, i8|u8} + ROW(3, 1, 1, 0, 49 , 132, 10 , 0 , 0 , 0 ), // #519 {xmm, r32|m8|mem, i8|u8} + ROW(3, 1, 1, 0, 49 , 28 , 10 , 0 , 0 , 0 ), // #520 {xmm, r32|m32|mem, i8|u8} + ROW(3, 0, 1, 0, 49 , 29 , 10 , 0 , 0 , 0 ), // #521 {xmm, r64|m64|mem, i8|u8} + ROW(3, 1, 1, 0, 63 , 111, 10 , 0 , 0 , 0 ), // #522 {mm|xmm, r32|m16|mem, i8|u8} + ROW(2, 1, 1, 0, 6 , 63 , 0 , 0 , 0 , 0 ), // #523 {r32, mm|xmm} + ROW(2, 1, 1, 0, 49 , 10 , 0 , 0 , 0 , 0 ), // #524 {xmm, i8|u8} + ROW(1, 0, 1, 0, 136, 0 , 0 , 0 , 0 , 0 ), // #525 {r32|r64} + ROW(3, 1, 1, 3, 38 , 39 , 126, 0 , 0 , 0 ), // #526 {, , } + ROW(1, 1, 1, 0, 1 , 0 , 0 , 0 , 0 , 0 ), // #527 {r8lo|r8hi|m8|mem} + ROW(3, 0, 1, 0, 166, 166, 166, 0 , 0 , 0 ), // #528 {tmm, tmm, tmm} + ROW(2, 0, 1, 0, 166, 167, 0 , 0 , 0 , 0 ), // #529 {tmm, tmem} + ROW(2, 0, 1, 0, 167, 166, 0 , 0 , 0 , 0 ), // #530 {tmem, tmm} + ROW(1, 0, 1, 0, 166, 0 , 0 , 0 , 0 , 0 ), // #531 {tmm} + ROW(3, 1, 1, 2, 6 , 38 , 39 , 0 , 0 , 0 ), // #532 {r32, , } + ROW(6, 1, 1, 0, 55 , 55 , 55 , 55 , 55 , 51 ), // #533 {zmm, zmm, zmm, zmm, zmm, m128|mem} + ROW(6, 1, 1, 0, 49 , 49 , 49 , 49 , 49 , 51 ), // #534 {xmm, xmm, xmm, xmm, xmm, m128|mem} + ROW(3, 1, 1, 0, 49 , 49 , 64 , 0 , 0 , 0 ), // #535 {xmm, xmm, xmm|m64|mem} + ROW(3, 1, 1, 0, 49 , 49 , 119, 0 , 0 , 0 ), // #536 {xmm, xmm, xmm|m16|mem} + ROW(3, 1, 1, 0, 49 , 49 , 117, 0 , 0 , 0 ), // #537 {xmm, xmm, xmm|m32|mem} + ROW(2, 1, 1, 0, 96 , 21 , 0 , 0 , 0 , 0 ), // #538 {xmm|ymm, m16|mem} + ROW(2, 1, 1, 0, 52 , 51 , 0 , 0 , 0 , 0 ), // #539 {ymm, m128|mem} + ROW(2, 1, 1, 0, 168, 64 , 0 , 0 , 0 , 0 ), // #540 {ymm|zmm, xmm|m64|mem} + ROW(2, 1, 1, 0, 168, 51 , 0 , 0 , 0 , 0 ), // #541 {ymm|zmm, m128|mem} + ROW(2, 1, 1, 0, 55 , 54 , 0 , 0 , 0 , 0 ), // #542 {zmm, m256|mem} + ROW(2, 1, 1, 0, 144, 117, 0 , 0 , 0 , 0 ), // #543 {xmm|ymm|zmm, m32|mem|xmm} + ROW(4, 1, 1, 0, 115, 49 , 64 , 10 , 0 , 0 ), // #544 {xmm|k, xmm, xmm|m64|mem, i8|u8} + ROW(4, 1, 1, 0, 86 , 49 , 119, 10 , 0 , 0 ), // #545 {k, xmm, xmm|m16|mem, i8|u8} + ROW(4, 1, 1, 0, 115, 49 , 117, 10 , 0 , 0 ), // #546 {xmm|k, xmm, xmm|m32|mem, i8|u8} + ROW(2, 1, 1, 0, 49 , 169, 0 , 0 , 0 , 0 ), // #547 {xmm, xmm|m128|ymm|m256|zmm|m512} + ROW(3, 1, 1, 0, 50 , 168, 10 , 0 , 0 , 0 ), // #548 {xmm|m128|mem, ymm|zmm, i8|u8} + ROW(4, 1, 1, 0, 49 , 49 , 64 , 10 , 0 , 0 ), // #549 {xmm, xmm, xmm|m64|mem, i8|u8} + ROW(4, 1, 1, 0, 49 , 49 , 117, 10 , 0 , 0 ), // #550 {xmm, xmm, xmm|m32|mem, i8|u8} + ROW(3, 1, 1, 0, 86 , 169, 10 , 0 , 0 , 0 ), // #551 {k, xmm|m128|ymm|m256|zmm|m512, i8|u8} + ROW(3, 1, 1, 0, 86 , 64 , 10 , 0 , 0 , 0 ), // #552 {k, xmm|m64|mem, i8|u8} + ROW(3, 1, 1, 0, 86 , 119, 10 , 0 , 0 , 0 ), // #553 {k, xmm|m16|mem, i8|u8} + ROW(3, 1, 1, 0, 86 , 117, 10 , 0 , 0 , 0 ), // #554 {k, xmm|m32|mem, i8|u8} + ROW(1, 1, 1, 0, 72 , 0 , 0 , 0 , 0 , 0 ), // #555 {vm32y} + ROW(1, 1, 1, 0, 73 , 0 , 0 , 0 , 0 , 0 ), // #556 {vm32z} + ROW(1, 1, 1, 0, 76 , 0 , 0 , 0 , 0 , 0 ), // #557 {vm64z} + ROW(4, 1, 1, 0, 49 , 49 , 119, 10 , 0 , 0 ), // #558 {xmm, xmm, xmm|m16|mem, i8|u8} + ROW(4, 1, 1, 0, 55 , 55 , 53 , 10 , 0 , 0 ), // #559 {zmm, zmm, ymm|m256|mem, i8|u8} + ROW(2, 1, 1, 0, 6 , 96 , 0 , 0 , 0 , 0 ), // #560 {r32, xmm|ymm} + ROW(2, 1, 1, 0, 144, 170, 0 , 0 , 0 , 0 ), // #561 {xmm|ymm|zmm, xmm|m8|mem|r32} + ROW(2, 1, 1, 0, 144, 171, 0 , 0 , 0 , 0 ), // #562 {xmm|ymm|zmm, xmm|m32|mem|r32} + ROW(2, 1, 1, 0, 144, 86 , 0 , 0 , 0 , 0 ), // #563 {xmm|ymm|zmm, k} + ROW(2, 1, 1, 0, 144, 172, 0 , 0 , 0 , 0 ), // #564 {xmm|ymm|zmm, xmm|m16|mem|r32} + ROW(3, 1, 1, 0, 111, 49 , 10 , 0 , 0 , 0 ), // #565 {r32|m16|mem, xmm, i8|u8} + ROW(4, 1, 1, 0, 49 , 49 , 132, 10 , 0 , 0 ), // #566 {xmm, xmm, r32|m8|mem, i8|u8} + ROW(4, 1, 1, 0, 49 , 49 , 28 , 10 , 0 , 0 ), // #567 {xmm, xmm, r32|m32|mem, i8|u8} + ROW(4, 0, 1, 0, 49 , 49 , 29 , 10 , 0 , 0 ), // #568 {xmm, xmm, r64|m64|mem, i8|u8} + ROW(4, 1, 1, 0, 49 , 49 , 111, 10 , 0 , 0 ), // #569 {xmm, xmm, r32|m16|mem, i8|u8} + ROW(2, 1, 1, 0, 86 , 144, 0 , 0 , 0 , 0 ), // #570 {k, xmm|ymm|zmm} + ROW(2, 1, 1, 0, 52 , 49 , 0 , 0 , 0 , 0 ), // #571 {ymm, xmm} + ROW(2, 1, 1, 0, 52 , 52 , 0 , 0 , 0 , 0 ), // #572 {ymm, ymm} + ROW(3, 1, 1, 0, 52 , 52 , 49 , 0 , 0 , 0 ), // #573 {ymm, ymm, xmm} + ROW(3, 1, 1, 2, 122, 38 , 39 , 0 , 0 , 0 ), // #574 {mem, , } + ROW(3, 0, 1, 2, 122, 38 , 39 , 0 , 0 , 0 ) // #575 {mem, , } }; #undef ROW @@ -5113,7 +5338,7 @@ const InstDB::OpSignature InstDB::_opSignatureTable[] = { ROW(F(ImmI16) | F(ImmU16), 0x00), ROW(F(RegGpd) | F(Mem32), 0x00), ROW(F(ImmI32) | F(ImmU32), 0x00), - ROW(F(RegGpq) | F(MemUnspecified) | F(Mem64), 0x00), + ROW(F(RegGpq) | F(Mem64), 0x00), ROW(F(ImmI32), 0x00), ROW(F(RegSReg) | F(RegCReg) | F(RegDReg) | F(MemUnspecified) | F(Mem64) | F(ImmI64) | F(ImmU64), 0x00), ROW(F(MemUnspecified) | F(Mem8), 0x00), @@ -5122,27 +5347,26 @@ const InstDB::OpSignature InstDB::_opSignatureTable[] = { ROW(F(MemUnspecified) | F(Mem16), 0x00), ROW(F(RegSReg), 0x00), ROW(F(RegCReg) | F(RegDReg), 0x00), - ROW(F(RegGpq) | F(ImmI32), 0x00), - ROW(F(RegGpw) | F(RegGpd) | F(RegGpq) | F(MemUnspecified) | F(Mem16) | F(Mem32) | F(Mem64), 0x00), + ROW(F(ImmI8) | F(ImmI32), 0x00), + ROW(F(RegGpw) | F(RegGpd) | F(Mem16) | F(Mem32), 0x00), ROW(F(ImmI8), 0x00), ROW(F(RegGpw) | F(MemUnspecified) | F(Mem16), 0x00), ROW(F(RegGpd) | F(MemUnspecified) | F(Mem32), 0x00), + ROW(F(RegGpq) | F(MemUnspecified) | F(Mem64), 0x00), ROW(F(MemUnspecified) | F(Mem32), 0x00), ROW(F(MemUnspecified) | F(Mem64), 0x00), - ROW(F(RegGpbLo) | F(RegGpbHi) | F(RegGpw) | F(RegGpd) | F(RegGpq) | F(MemUnspecified) | F(Mem8) | F(Mem16) | F(Mem32) | F(Mem64), 0x00), - ROW(F(RegGpq) | F(MemUnspecified) | F(Mem64) | F(ImmI32) | F(ImmU32), 0x00), + ROW(F(RegGpbLo) | F(RegGpbHi) | F(RegGpw) | F(RegGpd) | F(Mem8) | F(Mem16) | F(Mem32), 0x00), + ROW(F(RegGpq) | F(MemUnspecified) | F(Mem64) | F(ImmI8) | F(ImmU8) | F(ImmI32) | F(ImmU32), 0x00), + ROW(F(Mem64), 0x00), + ROW(F(ImmI8) | F(ImmU8) | F(ImmI32), 0x00), ROW(F(RegGpw) | F(FlagImplicit), 0x01), ROW(F(RegGpw) | F(FlagImplicit), 0x04), ROW(F(RegGpd) | F(FlagImplicit), 0x04), ROW(F(RegGpd) | F(FlagImplicit), 0x01), ROW(F(RegGpq) | F(FlagImplicit), 0x04), ROW(F(RegGpq) | F(FlagImplicit), 0x01), - ROW(F(RegGpw) | F(MemUnspecified) | F(Mem16) | F(ImmI8) | F(ImmI16) | F(ImmU16), 0x00), - ROW(F(RegGpd) | F(MemUnspecified) | F(Mem32) | F(ImmI8) | F(ImmI32) | F(ImmU32), 0x00), - ROW(F(RegGpq) | F(MemUnspecified) | F(Mem64) | F(ImmI8) | F(ImmI32), 0x00), ROW(F(ImmI8) | F(ImmI16) | F(ImmU16), 0x00), ROW(F(ImmI8) | F(ImmI32) | F(ImmU32), 0x00), - ROW(F(ImmI8) | F(ImmI32), 0x00), ROW(F(ImmI64) | F(ImmU64), 0x00), ROW(F(RegGpbLo), 0x01), ROW(F(RegGpw), 0x01), @@ -5161,99 +5385,96 @@ const InstDB::OpSignature InstDB::_opSignatureTable[] = { ROW(F(RegYmm) | F(MemUnspecified) | F(Mem256) | F(ImmI8) | F(ImmU8), 0x00), ROW(F(RegZmm) | F(MemUnspecified) | F(Mem512) | F(ImmI8) | F(ImmU8), 0x00), ROW(F(RegMm), 0x00), - ROW(F(RegGpq) | F(RegMm) | F(MemUnspecified) | F(Mem64), 0x00), + ROW(F(RegMm) | F(MemUnspecified) | F(Mem64), 0x00), ROW(F(RegXmm) | F(RegMm), 0x00), ROW(F(RegXmm) | F(MemUnspecified) | F(Mem64), 0x00), - ROW(F(RegGpw) | F(RegGpd) | F(RegGpq) | F(Mem16) | F(Mem32) | F(Mem64), 0x00), + ROW(F(RegSReg), 0x1A), + ROW(F(RegSReg), 0x60), + ROW(F(RegGpw) | F(Mem16) | F(ImmI8) | F(ImmI16), 0x00), + ROW(F(RegGpd) | F(Mem32) | F(ImmI32) | F(ImmU32), 0x00), + ROW(F(RegGpq) | F(Mem64) | F(ImmI32), 0x00), + ROW(F(RegSReg), 0x1E), ROW(F(Vm32x), 0x00), ROW(F(Vm32y), 0x00), ROW(F(Vm32z), 0x00), ROW(F(Vm64x), 0x00), ROW(F(Vm64y), 0x00), ROW(F(Vm64z), 0x00), - ROW(F(Mem8) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x40), - ROW(F(Mem8) | F(FlagMemBase) | F(FlagMemEs) | F(FlagImplicit), 0x80), - ROW(F(Mem16) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x40), - ROW(F(Mem16) | F(FlagMemBase) | F(FlagMemEs) | F(FlagImplicit), 0x80), - ROW(F(Mem32) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x40), - ROW(F(Mem32) | F(FlagMemBase) | F(FlagMemEs) | F(FlagImplicit), 0x80), - ROW(F(Mem64) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x40), - ROW(F(Mem64) | F(FlagMemBase) | F(FlagMemEs) | F(FlagImplicit), 0x80), + ROW(F(Mem8) | F(FlagMemBase) | F(FlagMemDs), 0x40), + ROW(F(Mem8) | F(FlagMemBase) | F(FlagMemEs), 0x80), + ROW(F(Mem16) | F(FlagMemBase) | F(FlagMemDs), 0x40), + ROW(F(Mem16) | F(FlagMemBase) | F(FlagMemEs), 0x80), + ROW(F(Mem32) | F(FlagMemBase) | F(FlagMemDs), 0x40), + ROW(F(Mem32) | F(FlagMemBase) | F(FlagMemEs), 0x80), + ROW(F(Mem64) | F(FlagMemBase) | F(FlagMemDs), 0x40), + ROW(F(Mem64) | F(FlagMemBase) | F(FlagMemEs), 0x80), ROW(F(RegGpbLo) | F(FlagImplicit), 0x01), - ROW(F(MemUnspecified) | F(Mem8) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x40), - ROW(F(MemUnspecified) | F(Mem16) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x40), - ROW(F(MemUnspecified) | F(Mem32) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x40), - ROW(F(MemUnspecified) | F(Mem64) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x40), - ROW(F(RegGpw) | F(RegGpq) | F(Mem16) | F(Mem64), 0x00), - ROW(F(RegSReg), 0x1A), - ROW(F(RegSReg), 0x60), - ROW(F(RegGpw) | F(RegGpq) | F(Mem16) | F(Mem64) | F(ImmI8) | F(ImmI16) | F(ImmI32), 0x00), - ROW(F(RegGpd) | F(Mem32) | F(ImmI32) | F(ImmU32), 0x00), - ROW(F(RegSReg), 0x1E), - ROW(F(MemUnspecified) | F(Mem8) | F(FlagMemBase) | F(FlagMemEs) | F(FlagImplicit), 0x80), - ROW(F(MemUnspecified) | F(Mem16) | F(FlagMemBase) | F(FlagMemEs) | F(FlagImplicit), 0x80), - ROW(F(MemUnspecified) | F(Mem32) | F(FlagMemBase) | F(FlagMemEs) | F(FlagImplicit), 0x80), - ROW(F(MemUnspecified) | F(Mem64) | F(FlagMemBase) | F(FlagMemEs) | F(FlagImplicit), 0x80), + ROW(F(RegKReg), 0x00), + ROW(F(RegKReg) | F(MemUnspecified) | F(Mem64), 0x00), + ROW(F(MemUnspecified) | F(Mem8) | F(FlagMemBase) | F(FlagMemDs), 0x40), + ROW(F(MemUnspecified) | F(Mem16) | F(FlagMemBase) | F(FlagMemDs), 0x40), + ROW(F(MemUnspecified) | F(Mem32) | F(FlagMemBase) | F(FlagMemDs), 0x40), + ROW(F(MemUnspecified) | F(Mem64) | F(FlagMemBase) | F(FlagMemDs), 0x40), + ROW(F(MemUnspecified) | F(Mem8) | F(FlagMemBase) | F(FlagMemEs), 0x80), + ROW(F(MemUnspecified) | F(Mem16) | F(FlagMemBase) | F(FlagMemEs), 0x80), + ROW(F(MemUnspecified) | F(Mem32) | F(FlagMemBase) | F(FlagMemEs), 0x80), + ROW(F(MemUnspecified) | F(Mem64) | F(FlagMemBase) | F(FlagMemEs), 0x80), ROW(F(RegXmm) | F(RegYmm), 0x00), ROW(F(ImmI4) | F(ImmU4), 0x00), + ROW(F(RegGpw) | F(RegGpd) | F(MemUnspecified) | F(Mem16) | F(Mem32) | F(ImmI32) | F(ImmI64) | F(Rel32), 0x00), + ROW(F(ImmI32) | F(ImmI64) | F(Rel32), 0x00), + ROW(F(RegGpw) | F(RegGpd), 0x00), ROW(F(Mem32) | F(Mem64), 0x00), ROW(F(RegSt), 0x01), ROW(F(RegSt), 0x00), - ROW(F(MemUnspecified) | F(Mem48), 0x00), + ROW(F(ImmI32) | F(ImmI64) | F(Rel8) | F(Rel32), 0x00), + ROW(F(RegGpd) | F(Mem32) | F(ImmI32) | F(ImmI64) | F(Rel32), 0x00), + ROW(F(ImmI16), 0x00), + ROW(F(ImmI16) | F(ImmI32), 0x00), + ROW(F(MemUnspecified) | F(Mem32) | F(Mem48), 0x00), ROW(F(MemUnspecified) | F(Mem80), 0x00), + ROW(F(MemUnspecified) | F(Mem48), 0x00), + ROW(F(RegGpd) | F(MemUnspecified) | F(Mem16), 0x00), + ROW(F(RegGpbLo) | F(RegGpbHi) | F(RegGpw) | F(Mem8) | F(Mem16), 0x00), + ROW(F(RegGpbLo) | F(RegGpw) | F(Mem8) | F(Mem16), 0x00), ROW(F(RegGpbLo) | F(ImmI8) | F(ImmU8), 0x02), ROW(F(RegXmm) | F(RegKReg), 0x00), ROW(F(RegYmm) | F(RegKReg), 0x00), - ROW(F(RegKReg), 0x00), ROW(F(RegXmm) | F(MemUnspecified) | F(Mem32), 0x00), ROW(F(Vm64x) | F(Vm64y), 0x00), - ROW(F(RegGpq) | F(RegXmm) | F(MemUnspecified) | F(Mem64), 0x00), ROW(F(RegXmm) | F(MemUnspecified) | F(Mem16), 0x00), ROW(F(RegBnd), 0x00), ROW(F(RegBnd) | F(MemUnspecified), 0x00), ROW(F(MemUnspecified), 0x00), - ROW(F(RegGpw) | F(RegGpd) | F(Mem16) | F(Mem32) | F(ImmI32) | F(ImmI64) | F(Rel32), 0x00), - ROW(F(RegGpq) | F(MemUnspecified) | F(Mem64) | F(ImmI32) | F(ImmI64) | F(Rel32), 0x00), - ROW(F(RegGpbLo) | F(RegGpbHi) | F(RegGpw) | F(RegGpd) | F(Mem8) | F(Mem16) | F(Mem32), 0x00), - ROW(F(RegGpbLo) | F(RegGpbHi) | F(RegGpq) | F(Mem8) | F(Mem64), 0x00), - ROW(F(RegGpw) | F(RegGpd), 0x00), + ROW(F(RegGpbLo) | F(RegGpq) | F(Mem8) | F(Mem64), 0x00), ROW(F(MemUnspecified) | F(Mem512) | F(FlagMemBase) | F(FlagMemEs), 0x00), ROW(F(RegSt) | F(Mem32) | F(Mem64), 0x00), ROW(F(RegGpd) | F(FlagImplicit), 0x02), ROW(F(RegGpd) | F(RegGpq) | F(FlagImplicit), 0x01), - ROW(F(ImmI32) | F(ImmI64) | F(Rel8) | F(Rel32), 0x00), - ROW(F(ImmI32) | F(ImmI64) | F(Rel32), 0x00), ROW(F(RegGpw) | F(RegGpd) | F(FlagImplicit), 0x02), ROW(F(ImmI32) | F(ImmI64) | F(Rel8), 0x00), ROW(F(RegGpd) | F(RegGpq) | F(FlagImplicit), 0x02), - ROW(F(RegGpq) | F(MemUnspecified) | F(Mem64) | F(ImmI32) | F(ImmI64) | F(Rel8) | F(Rel32), 0x00), - ROW(F(RegGpd) | F(MemUnspecified) | F(Mem32) | F(ImmI32) | F(ImmI64) | F(Rel32), 0x00), ROW(F(RegGpd) | F(RegKReg) | F(MemUnspecified) | F(Mem8), 0x00), ROW(F(RegGpd) | F(MemUnspecified) | F(Mem8), 0x00), ROW(F(RegGpd) | F(RegKReg) | F(MemUnspecified) | F(Mem32), 0x00), - ROW(F(RegGpq) | F(RegKReg) | F(MemUnspecified) | F(Mem64), 0x00), ROW(F(RegGpd) | F(RegKReg) | F(MemUnspecified) | F(Mem16), 0x00), - ROW(F(RegGpd) | F(MemUnspecified) | F(Mem16), 0x00), - ROW(F(ImmI16), 0x00), - ROW(F(ImmI16) | F(ImmI32), 0x00), - ROW(F(MemUnspecified) | F(Mem32) | F(Mem48) | F(Mem80), 0x00), + ROW(F(MemUnspecified) | F(Mem8) | F(Mem16) | F(Mem32) | F(Mem48) | F(Mem64) | F(Mem80) | F(Mem128) | F(Mem256) | F(Mem512) | F(Mem1024), 0x00), ROW(F(RegGpd) | F(RegGpq), 0x00), - ROW(F(RegGpbLo) | F(RegGpbHi) | F(RegGpw) | F(Mem8) | F(Mem16), 0x00), - ROW(F(RegMm) | F(MemUnspecified) | F(Mem64), 0x00), ROW(F(RegMm) | F(MemUnspecified) | F(Mem64) | F(ImmI8) | F(ImmU8), 0x00), ROW(F(RegMm) | F(MemUnspecified) | F(Mem32), 0x00), ROW(F(ImmU16), 0x00), + ROW(F(RegGpw) | F(RegGpd) | F(MemUnspecified) | F(Mem16), 0x00), + ROW(F(RegGpq) | F(MemUnspecified) | F(Mem16), 0x00), + ROW(F(MemUnspecified) | F(FlagMemBase) | F(FlagMemDs), 0x00), ROW(F(RegXmm) | F(RegYmm) | F(Mem128) | F(Mem256), 0x00), + ROW(F(RegXmm) | F(RegYmm) | F(RegZmm), 0x00), ROW(F(RegXmm) | F(ImmI8) | F(ImmU8), 0x00), ROW(F(RegXmm) | F(FlagImplicit), 0x01), ROW(F(MemUnspecified) | F(FlagMib), 0x00), - ROW(F(RegGpw) | F(RegGpd) | F(RegGpq), 0x00), - ROW(F(MemUnspecified) | F(Mem8) | F(Mem16) | F(Mem32) | F(Mem48) | F(Mem64) | F(Mem80) | F(Mem128) | F(Mem256) | F(Mem512) | F(Mem1024), 0x00), ROW(F(MemUnspecified) | F(Mem512) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x01), ROW(F(RegGpq) | F(FlagImplicit), 0x02), ROW(F(RegGpq) | F(FlagImplicit), 0x08), ROW(F(RegGpd) | F(FlagImplicit), 0x08), - ROW(F(RegGpd) | F(RegGpq) | F(MemUnspecified) | F(Mem32) | F(Mem64), 0x00), ROW(F(Mem16) | F(Mem32), 0x00), ROW(F(Mem16) | F(Mem32) | F(Mem64), 0x00), ROW(F(RegSt) | F(Mem32) | F(Mem64) | F(Mem80), 0x00), @@ -5268,12 +5489,9 @@ const InstDB::OpSignature InstDB::_opSignatureTable[] = { ROW(F(MemUnspecified) | F(FlagMemBase) | F(FlagMemDs) | F(FlagImplicit), 0x01), ROW(F(RegGpw) | F(ImmU8), 0x04), ROW(F(Mem8) | F(Mem16) | F(Mem32) | F(FlagMemBase) | F(FlagMemDs), 0x40), - ROW(F(RegGpw) | F(RegGpd) | F(RegGpq) | F(MemUnspecified) | F(Mem16), 0x00), ROW(F(RegTmm), 0x00), ROW(F(MemUnspecified) | F(FlagTMem), 0x00), - ROW(F(MemUnspecified) | F(FlagMemBase) | F(FlagMemDs), 0x00), ROW(F(RegYmm) | F(RegZmm), 0x00), - ROW(F(RegXmm) | F(RegYmm) | F(RegZmm), 0x00), ROW(F(RegXmm) | F(RegYmm) | F(RegZmm) | F(Mem128) | F(Mem256) | F(Mem512), 0x00), ROW(F(RegGpd) | F(RegXmm) | F(MemUnspecified) | F(Mem8), 0x00), ROW(F(RegGpd) | F(RegXmm) | F(MemUnspecified) | F(Mem32), 0x00), @@ -5291,506 +5509,520 @@ const InstDB::OpSignature InstDB::_opSignatureTable[] = { // ${InstRWInfoTable:Begin} // ------------------- Automatically generated, do not edit ------------------- const uint8_t InstDB::rwInfoIndexA[Inst::_kIdCount] = { - 0, 0, 1, 1, 0, 2, 3, 2, 4, 4, 5, 6, 4, 4, 3, 4, 4, 4, 4, 7, 0, 2, 0, 4, 4, 4, - 4, 8, 0, 9, 9, 9, 9, 9, 0, 0, 0, 0, 9, 9, 9, 9, 9, 10, 10, 10, 11, 11, 12, 13, - 14, 9, 9, 0, 15, 16, 16, 16, 0, 0, 0, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, - 3, 3, 3, 3, 3, 3, 3, 18, 0, 0, 19, 0, 0, 0, 0, 0, 20, 21, 0, 22, 23, 24, 7, 25, - 25, 25, 24, 26, 7, 24, 27, 28, 29, 30, 31, 32, 33, 25, 25, 7, 27, 28, 33, 34, - 0, 0, 0, 0, 35, 4, 4, 5, 6, 0, 0, 0, 0, 0, 36, 36, 0, 0, 37, 0, 0, 38, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 38, 0, 38, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 38, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 38, 0, 38, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 4, 4, 0, 39, 4, - 4, 35, 40, 41, 0, 0, 0, 42, 0, 37, 0, 0, 0, 0, 43, 0, 44, 43, 43, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 45, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 46, 47, 48, 49, 50, 51, - 52, 53, 0, 0, 0, 54, 55, 56, 57, 0, 0, 0, 0, 0, 0, 0, 0, 0, 54, 55, 56, 57, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 58, 0, 59, 0, 60, 0, 61, 0, 60, 0, 60, 0, 60, - 0, 0, 0, 0, 0, 62, 63, 63, 63, 58, 60, 0, 0, 0, 9, 0, 0, 4, 4, 5, 6, 0, 0, 4, - 4, 5, 6, 0, 0, 64, 65, 66, 66, 67, 47, 24, 36, 67, 52, 66, 66, 68, 69, 69, 70, - 71, 71, 72, 72, 59, 59, 67, 59, 59, 71, 71, 73, 48, 52, 74, 75, 7, 7, 76, 77, - 9, 66, 66, 77, 0, 35, 4, 4, 5, 6, 0, 78, 0, 0, 79, 0, 2, 4, 4, 80, 81, 9, 9, - 9, 3, 3, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 0, 3, 3, 0, 3, 82, 3, 0, 0, 0, 3, 3, - 4, 3, 0, 0, 3, 3, 4, 3, 0, 0, 0, 0, 0, 0, 0, 0, 83, 27, 27, 82, 82, 82, 82, 82, - 82, 82, 82, 82, 82, 27, 82, 82, 82, 27, 27, 82, 82, 82, 3, 3, 3, 84, 3, 3, 3, - 27, 27, 0, 0, 0, 0, 3, 3, 4, 4, 3, 3, 4, 4, 4, 4, 3, 3, 4, 4, 85, 86, 87, 24, - 24, 24, 86, 86, 87, 24, 24, 24, 86, 4, 3, 82, 3, 3, 4, 3, 3, 0, 0, 0, 9, 0, - 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 3, 3, 0, 0, 0, 0, 3, 3, 3, 3, 88, 3, 3, 0, 3, 3, - 3, 88, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 27, 89, 0, 3, 3, 4, 3, 90, 90, 4, 90, 0, - 0, 0, 0, 0, 0, 0, 3, 91, 7, 92, 91, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 93, 0, 0, - 0, 0, 0, 91, 91, 0, 0, 0, 0, 0, 0, 7, 92, 0, 0, 91, 91, 0, 0, 2, 94, 0, 0, 0, + 0, 0, 1, 2, 1, 2, 0, 3, 4, 3, 5, 5, 6, 7, 5, 5, 4, 5, 5, 5, 5, 8, 0, 3, 0, 5, + 5, 5, 5, 2, 9, 2, 0, 10, 10, 10, 10, 10, 0, 0, 0, 0, 10, 10, 10, 10, 10, 11, 11, + 11, 12, 12, 13, 14, 15, 10, 10, 0, 16, 17, 17, 17, 0, 0, 0, 18, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 20, 0, 0, 0, 0, 0, 0, 0, 21, 22, 0, 23, 24, 25, 8, 26, 26, + 26, 25, 27, 8, 25, 28, 29, 30, 31, 32, 33, 34, 26, 26, 8, 28, 29, 34, 35, 0, + 0, 0, 0, 36, 5, 5, 6, 7, 0, 0, 0, 0, 0, 37, 37, 0, 0, 38, 0, 0, 39, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 39, 0, 39, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 39, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 39, 0, 39, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 5, 5, 5, 0, 40, 5, 5, 36, + 41, 42, 0, 0, 0, 43, 0, 38, 0, 0, 0, 0, 44, 0, 45, 0, 44, 44, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 46, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 47, 48, 49, 50, 51, 52, 53, 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4, 28, 89, 0, 4, 4, 5, 4, 90, 90, 5, 90, + 0, 0, 0, 0, 0, 0, 0, 4, 91, 8, 92, 91, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 93, + 0, 0, 0, 0, 0, 91, 91, 0, 0, 0, 0, 0, 0, 8, 92, 0, 0, 91, 91, 0, 0, 3, 94, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 4, 4, 4, 0, 4, 4, 0, 91, 0, 0, 91, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 7, 7, 26, 92, 0, 0, 0, 0, 0, 0, 95, 0, 0, 0, 2, 4, 4, 5, 6, 0, 0, 0, 0, 0, - 0, 0, 9, 0, 0, 0, 0, 0, 15, 0, 96, 96, 0, 97, 0, 0, 9, 9, 20, 21, 98, 98, 0, - 0, 0, 0, 4, 4, 4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 99, 28, 100, 101, 100, 101, 99, 28, 100, 101, - 100, 101, 102, 103, 0, 0, 0, 0, 0, 0, 20, 104, 21, 105, 105, 106, 77, 9, 0, 77, - 107, 108, 107, 9, 107, 9, 109, 110, 106, 109, 110, 109, 110, 9, 9, 9, 106, - 0, 77, 106, 9, 106, 9, 108, 107, 0, 28, 0, 28, 0, 111, 0, 111, 0, 0, 0, 0, 0, - 33, 33, 107, 9, 107, 9, 109, 110, 109, 110, 9, 9, 9, 106, 9, 106, 28, 28, 111, - 111, 33, 33, 106, 77, 9, 9, 108, 107, 0, 0, 0, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 112, 112, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 5, 5, 5, 0, 5, 5, 0, 91, 0, 0, 91, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 8, 8, 27, 92, 0, 0, 0, 0, 0, 0, 95, 0, 0, 0, 3, 5, 5, 6, 7, 0, + 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 16, 0, 96, 96, 0, 97, 0, 0, + 0, 10, 10, 21, 22, 98, 98, 0, 0, 0, 0, 5, 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 99, 99, 0, 0, 0, 0, 0, 0, 100, 29, + 101, 102, 101, 102, 100, 29, 101, 102, 101, 102, 103, 104, 0, 0, 0, 0, 0, 0, + 21, 105, 22, 106, 106, 107, 77, 10, 0, 67, 67, 67, 67, 77, 108, 109, 108, 10, + 108, 10, 110, 111, 107, 110, 111, 110, 111, 10, 10, 10, 107, 0, 77, 107, 10, + 107, 10, 109, 108, 0, 29, 0, 29, 0, 112, 0, 112, 0, 0, 0, 0, 0, 34, 34, 108, + 10, 108, 10, 110, 111, 110, 111, 10, 10, 10, 107, 10, 107, 29, 29, 112, 112, 34, + 34, 107, 77, 10, 10, 109, 108, 0, 0, 0, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 113, 113, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 9, 27, 113, 60, 60, - 0, 0, 0, 0, 0, 0, 0, 0, 60, 114, 9, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 10, 28, 114, 2, 2, 0, + 0, 0, 0, 0, 0, 0, 0, 2, 115, 10, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 115, 115, 47, 116, 115, 115, 115, 115, 115, - 115, 115, 115, 0, 117, 117, 0, 71, 71, 118, 119, 67, 67, 67, 67, 120, 71, 121, - 9, 9, 73, 115, 115, 49, 0, 0, 0, 105, 0, 0, 0, 0, 0, 0, 0, 0, 0, 122, 0, 0, - 0, 0, 0, 0, 0, 9, 9, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 123, 33, 124, 124, 28, 125, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 105, 105, 105, 105, 0, - 0, 0, 0, 0, 0, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 9, 9, 9, 0, 0, 0, 0, 60, 60, 114, 60, 7, 7, 7, - 0, 7, 0, 7, 7, 7, 7, 7, 7, 0, 7, 7, 84, 7, 0, 7, 0, 0, 7, 0, 0, 0, 0, 9, 9, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 116, 116, 48, 117, 116, 116, 116, 116, + 116, 116, 116, 116, 0, 118, 118, 0, 71, 71, 119, 120, 67, 67, 67, 67, 121, 71, + 122, 10, 10, 73, 116, 116, 50, 0, 0, 0, 106, 0, 0, 0, 0, 0, 0, 0, 0, 0, 123, + 0, 0, 0, 0, 0, 0, 0, 0, 10, 10, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 124, 34, 125, 125, 29, 126, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 106, 106, + 106, 106, 0, 0, 0, 0, 0, 0, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 126, 126, 127, 128, 124, 124, 124, 124, 85, 126, 129, 128, - 127, 127, 128, 129, 128, 127, 128, 130, 131, 106, 106, 106, 130, 127, 128, - 129, 128, 127, 128, 126, 128, 130, 131, 106, 106, 106, 130, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 9, 9, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67, 67, - 132, 67, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 10, 10, 10, 10, 0, 0, 0, 0, 2, 2, 115, 2, 8, 8, 8, 0, 8, 0, 8, 8, 8, 8, 8, 8, + 0, 8, 8, 84, 8, 0, 8, 0, 0, 8, 0, 0, 0, 0, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 127, + 127, 128, 129, 125, 125, 125, 125, 85, 127, 130, 129, 128, 128, 129, 130, + 129, 128, 129, 131, 132, 107, 107, 107, 131, 128, 129, 130, 129, 128, 129, 127, + 129, 131, 132, 107, 107, 107, 131, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 10, 10, 10, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67, 67, 133, 67, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 122, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 9, 9, 0, 0, 112, 112, 0, 0, 9, 9, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, 9, 0, 0, 112, 112, 0, 0, 9, 9, 0, 0, 0, - 0, 0, 0, 0, 0, 67, 67, 0, 0, 0, 0, 0, 0, 0, 0, 67, 132, 0, 0, 0, 0, 0, 0, 9, - 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 122, 122, 20, 104, 21, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 133, 134, 133, 134, 0, 135, 0, 136, 0, 0, 0, 2, 4, 4, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 123, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 10, 10, 0, 0, 113, 113, 0, 0, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 10, 10, 0, 0, 113, 113, 0, 0, 10, 10, 0, 0, 0, 0, 0, 0, 0, + 0, 67, 67, 0, 0, 0, 0, 0, 0, 0, 0, 67, 133, 134, 135, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 10, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 123, 123, 21, 105, 22, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 136, 137, 136, 137, 0, 138, 0, 139, 0, + 0, 0, 3, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; const uint8_t InstDB::rwInfoIndexB[Inst::_kIdCount] = { - 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 3, 0, 0, 0, - 0, 0, 4, 0, 0, 0, 0, 0, 5, 5, 6, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 7, 0, 0, 0, 0, 4, 8, 1, 0, 9, 0, 0, 0, 10, 10, 10, 0, 0, 11, 0, 0, 10, 12, + 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 3, 0, + 0, 0, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0, 5, 5, 6, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 7, 0, 0, 0, 0, 4, 8, 1, 0, 9, 0, 0, 0, 10, 10, 10, 0, 0, 11, 0, + 0, 10, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, + 13, 5, 5, 13, 0, 14, 15, 13, 16, 17, 18, 13, 0, 0, 19, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 20, 1, 1, 21, 22, 0, 0, 0, + 0, 5, 5, 0, 0, 0, 0, 0, 0, 23, 24, 0, 0, 25, 26, 27, 28, 0, 0, 26, 26, 26, 26, + 26, 26, 26, 26, 29, 30, 30, 29, 0, 0, 0, 25, 26, 25, 26, 0, 26, 25, 25, 25, + 25, 25, 25, 25, 0, 0, 31, 31, 31, 25, 25, 29, 0, 32, 10, 0, 0, 0, 0, 0, 0, 25, + 26, 0, 0, 0, 33, 34, 33, 35, 0, 0, 0, 0, 0, 10, 33, 0, 0, 0, 0, 36, 34, 33, 36, + 35, 25, 26, 25, 26, 0, 30, 30, 30, 30, 0, 0, 0, 26, 10, 10, 33, 33, 0, 0, 0, + 20, 5, 5, 0, 0, 0, 0, 0, 0, 0, 22, 37, 0, 21, 38, 39, 0, 40, 41, 0, 0, 0, 0, + 0, 10, 0, 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 43, 44, 45, 46, 43, 44, 43, 44, + 45, 46, 45, 46, 0, 0, 0, 0, 0, 0, 0, 0, 43, 44, 45, 0, 0, 0, 0, 46, 47, 48, + 49, 50, 47, 48, 49, 50, 0, 0, 0, 0, 51, 52, 53, 43, 44, 45, 46, 43, 44, 45, 46, + 54, 0, 25, 0, 55, 0, 56, 0, 0, 0, 0, 0, 10, 0, 10, 25, 57, 58, 57, 0, 0, 0, + 0, 0, 0, 57, 59, 59, 0, 60, 61, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 62, 62, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 5, 5, 0, 13, 14, 15, 16, 17, 0, 0, 18, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 19, 1, 1, 20, 21, 0, 0, - 0, 0, 5, 5, 0, 0, 0, 0, 0, 0, 22, 23, 0, 0, 24, 25, 26, 27, 0, 0, 25, 25, 25, - 25, 25, 25, 25, 25, 28, 29, 29, 28, 0, 0, 0, 24, 25, 24, 25, 0, 25, 24, 24, 24, - 24, 24, 24, 24, 0, 0, 30, 30, 30, 24, 24, 28, 0, 31, 10, 0, 0, 0, 0, 0, 0, 24, - 25, 0, 0, 0, 32, 33, 32, 34, 0, 0, 0, 0, 0, 10, 32, 0, 0, 0, 0, 35, 33, 32, - 35, 34, 24, 25, 24, 25, 0, 29, 29, 29, 29, 0, 0, 0, 25, 10, 10, 32, 32, 0, 0, - 0, 0, 5, 5, 0, 0, 0, 0, 0, 0, 0, 21, 36, 0, 20, 37, 38, 0, 39, 40, 0, 0, 0, 0, - 0, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 41, 42, 43, 44, 41, 42, 41, 42, 43, - 44, 43, 44, 0, 0, 0, 0, 0, 0, 0, 0, 41, 42, 43, 0, 0, 0, 0, 44, 45, 46, 47, - 48, 45, 46, 47, 48, 0, 0, 0, 0, 49, 50, 51, 41, 42, 43, 44, 41, 42, 43, 44, 52, - 0, 24, 0, 53, 0, 54, 0, 0, 0, 0, 0, 10, 0, 10, 24, 55, 56, 55, 0, 0, 0, 0, - 0, 0, 55, 57, 57, 0, 58, 59, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 60, 60, 0, 0, 0, 0, + 0, 0, 63, 0, 0, 63, 0, 0, 0, 0, 0, 5, 64, 0, 0, 0, 0, 65, 0, 66, 21, 67, 21, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 68, 0, 0, 0, 0, 0, + 0, 6, 5, 5, 0, 0, 0, 0, 69, 70, 0, 0, 0, 0, 71, 72, 0, 3, 3, 73, 23, 74, 75, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 61, 0, 0, 61, 0, 0, 0, 0, 0, 5, 62, 0, 0, 0, 0, 63, 0, 64, 20, 65, 20, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 66, 0, 0, 0, 0, 0, 0, - 6, 5, 5, 0, 0, 0, 0, 67, 68, 0, 0, 0, 0, 69, 70, 0, 3, 3, 71, 22, 72, 73, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 74, 39, 75, 76, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 77, 0, 0, 0, 0, 0, 0, 0, 10, - 10, 10, 10, 10, 10, 10, 0, 0, 2, 2, 2, 78, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 65, 0, 0, 0, 0, 0, 0, 0, 0, 65, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 79, 79, 80, 79, 80, 80, 80, 79, 79, 81, 82, 0, 83, - 0, 0, 0, 0, 0, 0, 84, 2, 2, 85, 86, 0, 0, 0, 11, 87, 0, 0, 4, 0, 0, 0, 88, 0, - 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, 89, - 89, 89, 89, 89, 89, 89, 89, 89, 89, 0, 89, 0, 32, 0, 0, 0, 5, 0, 0, 6, 0, 90, - 4, 0, 90, 4, 5, 5, 32, 19, 91, 79, 91, 0, 0, 0, 0, 0, 0, 0, 0, 0, 92, 0, 91, - 93, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 94, 94, 94, 94, 94, 0, 0, 0, 0, - 0, 0, 95, 96, 0, 0, 0, 0, 0, 0, 0, 0, 56, 96, 0, 0, 0, 0, 97, 98, 97, 98, 3, - 3, 3, 99, 100, 101, 3, 3, 3, 3, 3, 3, 0, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 102, - 102, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 103, 3, 104, 105, 106, 0, 0, - 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 107, - 0, 0, 0, 0, 0, 0, 0, 108, 0, 109, 0, 110, 0, 110, 0, 111, 112, 113, 114, 115, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 111, 112, 113, 0, 0, 3, 3, 3, 3, 99, 110, 101, 3, 116, 3, 55, 55, 0, - 0, 0, 0, 117, 118, 119, 118, 119, 117, 118, 119, 118, 119, 22, 120, 121, 120, - 121, 122, 122, 123, 124, 122, 122, 122, 125, 126, 127, 122, 122, 122, 125, 126, - 127, 122, 122, 122, 125, 126, 127, 120, 121, 128, 128, 129, 130, 122, 122, - 122, 122, 122, 122, 122, 122, 122, 128, 128, 122, 122, 122, 125, 131, 127, 122, - 122, 122, 125, 131, 127, 122, 122, 122, 125, 131, 127, 122, 122, 122, 122, 122, - 122, 122, 122, 122, 128, 128, 128, 128, 129, 130, 120, 121, 122, 122, 122, - 125, 126, 127, 122, 122, 122, 125, 126, 127, 122, 122, 122, 125, 126, 127, 128, - 128, 129, 130, 122, 122, 122, 125, 131, 127, 122, 122, 122, 125, 131, 127, - 122, 122, 122, 132, 131, 133, 128, 128, 129, 130, 134, 134, 134, 78, 135, 136, - 0, 0, 0, 0, 137, 138, 10, 10, 10, 10, 10, 10, 10, 10, 138, 139, 0, 0, 0, 140, - 141, 142, 84, 84, 84, 140, 141, 142, 3, 3, 3, 3, 3, 3, 3, 143, 144, 145, 144, - 145, 143, 144, 145, 144, 145, 101, 0, 53, 58, 146, 146, 3, 3, 3, 99, 100, 101, - 0, 147, 0, 3, 3, 3, 99, 100, 101, 0, 148, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 149, 150, 150, 151, 152, 152, 0, 0, 0, 0, 0, 0, 0, 153, 154, 0, 0, 155, 0, - 0, 0, 3, 11, 147, 0, 0, 156, 148, 3, 3, 3, 99, 100, 101, 0, 11, 3, 3, 157, 157, - 158, 158, 0, 0, 0, 0, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, - 3, 3, 3, 3, 3, 3, 3, 3, 102, 3, 0, 0, 0, 0, 0, 0, 3, 128, 103, 103, 3, 3, 3, - 3, 67, 68, 3, 3, 3, 3, 69, 70, 103, 103, 103, 103, 103, 103, 116, 116, 0, 0, - 0, 0, 116, 116, 116, 116, 116, 116, 0, 0, 122, 122, 122, 122, 159, 159, 3, 3, - 3, 122, 3, 3, 122, 122, 128, 128, 160, 160, 160, 3, 160, 3, 122, 122, 122, 122, - 122, 3, 0, 0, 0, 0, 71, 22, 72, 161, 138, 137, 139, 138, 0, 0, 0, 3, 0, 3, 0, - 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 3, 0, 3, 3, 0, 162, 101, 99, 100, 0, 0, 163, 163, - 163, 163, 163, 163, 163, 163, 163, 163, 163, 163, 122, 122, 3, 3, 146, 146, - 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 3, 3, 3, 3, 3, 3, 3, 3, 3, 0, 0, 0, 0, 3, 3, 3, 164, 84, 84, 3, 3, - 84, 84, 3, 3, 165, 165, 165, 165, 3, 0, 0, 0, 0, 165, 165, 165, 165, 165, 165, - 3, 3, 122, 122, 122, 3, 165, 165, 3, 3, 122, 122, 122, 3, 3, 103, 84, 84, 84, - 3, 3, 3, 166, 167, 166, 3, 3, 3, 168, 166, 169, 3, 3, 3, 168, 166, 167, 166, - 3, 3, 3, 168, 3, 3, 3, 3, 3, 3, 3, 3, 170, 170, 0, 103, 103, 103, 103, 103, 103, - 103, 103, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 140, 142, 0, 0, 140, 142, - 0, 0, 140, 142, 0, 0, 141, 142, 84, 84, 84, 140, 141, 142, 84, 84, 84, 140, 141, - 142, 84, 84, 140, 142, 0, 0, 140, 142, 0, 0, 140, 142, 0, 0, 141, 142, 3, 3, - 3, 99, 100, 101, 0, 0, 10, 10, 10, 10, 10, 10, 10, 10, 0, 0, 3, 3, 3, 3, 3, - 3, 0, 0, 0, 140, 141, 142, 92, 3, 3, 3, 99, 100, 101, 0, 0, 0, 0, 0, 3, 3, 3, - 3, 3, 3, 0, 0, 0, 0, 56, 56, 171, 0, 0, 0, 0, 0, 0, 0, 0, 0, 80, 0, 0, 0, 0, 0, - 172, 172, 172, 172, 173, 173, 173, 173, 173, 173, 173, 173, 171, 0, 0 + 0, 0, 0, 0, 76, 40, 77, 78, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 79, 0, 0, 0, 0, 0, 0, 0, + 10, 10, 10, 10, 10, 10, 10, 10, 10, 0, 0, 2, 2, 2, 80, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 67, 0, 0, 0, 0, 0, 0, 0, 0, + 67, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 81, 81, 82, 81, 82, 82, 82, 81, 81, 83, + 84, 0, 85, 0, 0, 0, 0, 0, 0, 86, 2, 2, 87, 88, 0, 0, 0, 11, 89, 0, 0, 4, 0, 0, + 0, 0, 0, 0, 90, 0, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, + 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 91, 0, 91, 0, 33, 0, 0, + 0, 5, 0, 0, 6, 0, 92, 4, 0, 92, 4, 5, 5, 33, 20, 93, 81, 93, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 94, 0, 93, 95, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 96, 96, 0, + 96, 96, 96, 96, 96, 96, 0, 0, 0, 0, 0, 0, 97, 0, 98, 0, 0, 0, 0, 0, 0, 0, 0, 10, + 98, 0, 0, 0, 0, 99, 100, 99, 100, 3, 3, 3, 101, 102, 103, 3, 3, 3, 3, 3, 3, + 0, 2, 3, 3, 3, 3, 3, 3, 0, 0, 3, 3, 3, 3, 104, 104, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 3, 105, 3, 106, 107, 108, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 109, 0, 0, 0, 0, 0, + 0, 0, 110, 0, 111, 0, 112, 0, 112, 0, 113, 114, 115, 116, 117, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 113, 114, + 115, 0, 0, 3, 3, 3, 3, 101, 112, 103, 3, 118, 3, 57, 57, 0, 0, 0, 0, 119, 120, + 121, 120, 121, 119, 120, 121, 120, 121, 23, 122, 123, 122, 123, 124, 124, 125, + 126, 124, 124, 124, 127, 128, 129, 124, 124, 124, 127, 128, 129, 124, 124, + 124, 127, 128, 129, 122, 123, 130, 130, 131, 132, 124, 124, 124, 124, 124, 124, + 124, 124, 124, 130, 130, 124, 124, 124, 127, 133, 129, 124, 124, 124, 127, 133, + 129, 124, 124, 124, 127, 133, 129, 124, 124, 124, 124, 124, 124, 124, 124, + 124, 130, 130, 130, 130, 131, 132, 122, 123, 124, 124, 124, 127, 128, 129, 124, + 124, 124, 127, 128, 129, 124, 124, 124, 127, 128, 129, 130, 130, 131, 132, + 124, 124, 124, 127, 133, 129, 124, 124, 124, 127, 133, 129, 124, 124, 124, 134, + 133, 135, 130, 130, 131, 132, 136, 136, 136, 80, 137, 138, 0, 0, 0, 0, 139, + 140, 10, 10, 10, 10, 10, 10, 10, 10, 140, 141, 0, 0, 0, 142, 143, 144, 86, 86, + 86, 142, 143, 144, 3, 3, 3, 3, 3, 3, 3, 145, 146, 147, 146, 147, 145, 146, 147, + 146, 147, 103, 0, 55, 60, 148, 148, 3, 3, 3, 101, 102, 103, 0, 149, 0, 0, 3, + 3, 3, 101, 102, 103, 0, 150, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 151, 152, + 152, 153, 154, 154, 0, 0, 0, 0, 0, 0, 0, 155, 156, 0, 0, 157, 0, 0, 0, 3, 11, + 149, 0, 0, 158, 150, 3, 3, 3, 101, 102, 103, 0, 0, 11, 3, 3, 159, 159, 160, + 160, 0, 0, 0, 0, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 104, 3, 0, 0, 0, 0, 0, 0, 3, 130, 105, 105, 3, 3, 3, 3, 69, 70, + 3, 3, 3, 3, 71, 72, 105, 105, 105, 105, 105, 105, 118, 118, 0, 0, 0, 0, 118, + 118, 118, 118, 118, 118, 0, 0, 124, 124, 124, 124, 124, 124, 124, 124, 124, + 124, 124, 124, 124, 124, 124, 124, 161, 161, 3, 3, 3, 124, 3, 3, 124, 124, 130, + 130, 162, 162, 162, 3, 162, 3, 124, 124, 124, 124, 124, 3, 0, 0, 0, 0, 73, 23, + 74, 163, 140, 139, 141, 140, 0, 0, 0, 3, 0, 3, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, + 0, 3, 0, 3, 3, 0, 164, 103, 101, 102, 0, 0, 165, 165, 165, 165, 165, 165, 165, + 165, 165, 165, 165, 165, 124, 124, 3, 3, 148, 148, 3, 3, 3, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 0, 0, 0, 0, 3, 3, 3, 166, 86, 86, 3, 3, 86, 86, 3, 3, 167, 167, 167, + 167, 3, 0, 0, 0, 0, 167, 167, 167, 167, 167, 167, 3, 3, 124, 124, 124, 3, 167, + 167, 3, 3, 124, 124, 124, 3, 3, 105, 86, 86, 86, 3, 3, 3, 168, 169, 168, 3, + 3, 3, 170, 168, 171, 3, 3, 3, 170, 168, 169, 168, 3, 3, 3, 170, 3, 3, 3, 3, + 3, 3, 3, 3, 172, 172, 0, 105, 105, 105, 105, 105, 105, 105, 105, 3, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 3, 3, 3, 142, 144, 0, 0, 142, 144, 0, 0, 142, 144, 0, 0, 143, + 144, 86, 86, 86, 142, 143, 144, 86, 86, 86, 142, 143, 144, 86, 86, 142, 144, + 0, 0, 142, 144, 0, 0, 142, 144, 0, 0, 143, 144, 3, 3, 3, 101, 102, 103, 0, 0, + 10, 10, 10, 10, 10, 10, 10, 10, 0, 0, 0, 0, 173, 3, 3, 3, 3, 3, 3, 174, 174, 174, + 3, 3, 0, 0, 0, 142, 143, 144, 94, 3, 3, 3, 101, 102, 103, 0, 0, 0, 0, 0, 3, + 3, 3, 3, 3, 3, 0, 0, 0, 0, 58, 58, 175, 0, 0, 0, 0, 0, 0, 0, 0, 0, 82, 0, 0, + 0, 0, 0, 176, 176, 176, 176, 177, 177, 177, 177, 177, 177, 177, 177, 175, 0, + 0 }; const InstDB::RWInfo InstDB::rwInfoA[] = { - { InstDB::RWInfo::kCategoryGeneric , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #0 [ref=1007x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #0 [ref=1054x] { InstDB::RWInfo::kCategoryGeneric , 0 , { 1 , 0 , 0 , 0 , 0 , 0 } }, // #1 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 1 , { 2 , 3 , 0 , 0 , 0 , 0 } }, // #2 [ref=7x] - { InstDB::RWInfo::kCategoryGeneric , 2 , { 2 , 3 , 0 , 0 , 0 , 0 } }, // #3 [ref=96x] - { InstDB::RWInfo::kCategoryGeneric , 3 , { 4 , 5 , 0 , 0 , 0 , 0 } }, // #4 [ref=55x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 6 , 7 , 0 , 0 , 0 , 0 } }, // #5 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 8 , 9 , 0 , 0 , 0 , 0 } }, // #6 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 3 , { 10, 5 , 0 , 0 , 0 , 0 } }, // #7 [ref=26x] - { InstDB::RWInfo::kCategoryGeneric , 7 , { 12, 13, 0 , 0 , 0 , 0 } }, // #8 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 2 , { 11, 3 , 0 , 0 , 0 , 0 } }, // #9 [ref=75x] - { InstDB::RWInfo::kCategoryGeneric , 2 , { 5 , 3 , 0 , 0 , 0 , 0 } }, // #10 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 8 , { 10, 3 , 0 , 0 , 0 , 0 } }, // #11 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 9 , { 10, 5 , 0 , 0 , 0 , 0 } }, // #12 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 8 , { 15, 5 , 0 , 0 , 0 , 0 } }, // #13 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 3 , 3 , 0 , 0 , 0 , 0 } }, // #14 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 10, { 3 , 3 , 0 , 0 , 0 , 0 } }, // #15 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 10, { 2 , 3 , 0 , 0 , 0 , 0 } }, // #16 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 16, 17, 0 , 0 , 0 , 0 } }, // #17 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 1 , { 3 , 3 , 0 , 0 , 0 , 0 } }, // #18 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 20, 21, 0 , 0 , 0 , 0 } }, // #19 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 7 , 7 , 0 , 0 , 0 , 0 } }, // #20 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 9 , 9 , 0 , 0 , 0 , 0 } }, // #21 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 33, 34, 0 , 0 , 0 , 0 } }, // #22 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 14, { 2 , 3 , 0 , 0 , 0 , 0 } }, // #23 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 10, 7 , 0 , 0 , 0 , 0 } }, // #24 [ref=10x] - { InstDB::RWInfo::kCategoryGeneric , 3 , { 35, 5 , 0 , 0 , 0 , 0 } }, // #25 [ref=5x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 36, 7 , 0 , 0 , 0 , 0 } }, // #26 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 35, 7 , 0 , 0 , 0 , 0 } }, // #27 [ref=11x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 11, 7 , 0 , 0 , 0 , 0 } }, // #28 [ref=9x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 37, 7 , 0 , 0 , 0 , 0 } }, // #29 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 14, { 36, 3 , 0 , 0 , 0 , 0 } }, // #30 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 14, { 37, 3 , 0 , 0 , 0 , 0 } }, // #31 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 36, 9 , 0 , 0 , 0 , 0 } }, // #32 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 11, 9 , 0 , 0 , 0 , 0 } }, // #33 [ref=7x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 38, 39, 0 , 0 , 0 , 0 } }, // #34 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 15, { 1 , 40, 0 , 0 , 0 , 0 } }, // #35 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 16, { 11, 43, 0 , 0 , 0 , 0 } }, // #36 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 4 , 5 , 0 , 0 , 0 , 0 } }, // #37 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 45, 46, 0 , 0 , 0 , 0 } }, // #38 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 0 , 50, 0 , 0 , 0 , 0 } }, // #39 [ref=1x] - { InstDB::RWInfo::kCategoryImul , 2 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #40 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 51, 52, 0 , 0 , 0 , 0 } }, // #41 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 54, 52, 0 , 0 , 0 , 0 } }, // #42 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 13, { 3 , 5 , 0 , 0 , 0 , 0 } }, // #43 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 22, 29, 0 , 0 , 0 , 0 } }, // #44 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 55, 0 , 0 , 0 , 0 , 0 } }, // #45 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 23, { 56, 40, 0 , 0 , 0 , 0 } }, // #46 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 24, { 44, 9 , 0 , 0 , 0 , 0 } }, // #47 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 25, { 35, 7 , 0 , 0 , 0 , 0 } }, // #48 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 26, { 48, 13, 0 , 0 , 0 , 0 } }, // #49 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 56, 40, 0 , 0 , 0 , 0 } }, // #50 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 44, 9 , 0 , 0 , 0 , 0 } }, // #51 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 7 , 0 , 0 , 0 , 0 } }, // #52 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 48, 13, 0 , 0 , 0 , 0 } }, // #53 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 40, 40, 0 , 0 , 0 , 0 } }, // #54 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 9 , 9 , 0 , 0 , 0 , 0 } }, // #55 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 7 , 7 , 0 , 0 , 0 , 0 } }, // #56 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 13, 13, 0 , 0 , 0 , 0 } }, // #57 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 27, { 11, 3 , 0 , 0 , 0 , 0 } }, // #58 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 13, { 10, 5 , 0 , 0 , 0 , 0 } }, // #59 [ref=5x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 2 , 3 , 0 , 0 , 0 , 0 } }, // #60 [ref=11x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 2 , 3 , 0 , 0 , 0 , 0 } }, // #2 [ref=15x] + { InstDB::RWInfo::kCategoryGeneric , 1 , { 2 , 3 , 0 , 0 , 0 , 0 } }, // #3 [ref=7x] + { InstDB::RWInfo::kCategoryGeneric , 2 , { 2 , 3 , 0 , 0 , 0 , 0 } }, // #4 [ref=96x] + { InstDB::RWInfo::kCategoryGeneric , 3 , { 4 , 5 , 0 , 0 , 0 , 0 } }, // #5 [ref=55x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 6 , 7 , 0 , 0 , 0 , 0 } }, // #6 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 8 , 9 , 0 , 0 , 0 , 0 } }, // #7 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 3 , { 10, 5 , 0 , 0 , 0 , 0 } }, // #8 [ref=26x] + { InstDB::RWInfo::kCategoryGeneric , 7 , { 12, 13, 0 , 0 , 0 , 0 } }, // #9 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 2 , { 11, 3 , 0 , 0 , 0 , 0 } }, // #10 [ref=75x] + { InstDB::RWInfo::kCategoryGeneric , 2 , { 5 , 3 , 0 , 0 , 0 , 0 } }, // #11 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 10, 3 , 0 , 0 , 0 , 0 } }, // #12 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 9 , { 10, 5 , 0 , 0 , 0 , 0 } }, // #13 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 15, 5 , 0 , 0 , 0 , 0 } }, // #14 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 3 , 3 , 0 , 0 , 0 , 0 } }, // #15 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 10, { 3 , 3 , 0 , 0 , 0 , 0 } }, // #16 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 10, { 2 , 3 , 0 , 0 , 0 , 0 } }, // #17 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 16, 17, 0 , 0 , 0 , 0 } }, // #18 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 1 , { 3 , 3 , 0 , 0 , 0 , 0 } }, // #19 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 14, { 20, 21, 0 , 0 , 0 , 0 } }, // #20 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 7 , 7 , 0 , 0 , 0 , 0 } }, // #21 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 9 , 9 , 0 , 0 , 0 , 0 } }, // #22 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 33, 34, 0 , 0 , 0 , 0 } }, // #23 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 16, { 2 , 3 , 0 , 0 , 0 , 0 } }, // #24 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 10, 7 , 0 , 0 , 0 , 0 } }, // #25 [ref=10x] + { InstDB::RWInfo::kCategoryGeneric , 3 , { 35, 5 , 0 , 0 , 0 , 0 } }, // #26 [ref=5x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 36, 7 , 0 , 0 , 0 , 0 } }, // #27 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 35, 7 , 0 , 0 , 0 , 0 } }, // #28 [ref=11x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 11, 7 , 0 , 0 , 0 , 0 } }, // #29 [ref=9x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 37, 7 , 0 , 0 , 0 , 0 } }, // #30 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 16, { 36, 3 , 0 , 0 , 0 , 0 } }, // #31 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 16, { 37, 3 , 0 , 0 , 0 , 0 } }, // #32 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 36, 9 , 0 , 0 , 0 , 0 } }, // #33 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 11, 9 , 0 , 0 , 0 , 0 } }, // #34 [ref=7x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 38, 39, 0 , 0 , 0 , 0 } }, // #35 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 17, { 1 , 40, 0 , 0 , 0 , 0 } }, // #36 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 13, { 43, 44, 0 , 0 , 0 , 0 } }, // #37 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 4 , 5 , 0 , 0 , 0 , 0 } }, // #38 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 46, 47, 0 , 0 , 0 , 0 } }, // #39 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 0 , 51, 0 , 0 , 0 , 0 } }, // #40 [ref=1x] + { InstDB::RWInfo::kCategoryImul , 2 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #41 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 52, 53, 0 , 0 , 0 , 0 } }, // #42 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 14, { 55, 53, 0 , 0 , 0 , 0 } }, // #43 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 15, { 3 , 5 , 0 , 0 , 0 , 0 } }, // #44 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 22, 29, 0 , 0 , 0 , 0 } }, // #45 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 57, 0 , 0 , 0 , 0 , 0 } }, // #46 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 23, { 58, 40, 0 , 0 , 0 , 0 } }, // #47 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 24, { 45, 9 , 0 , 0 , 0 , 0 } }, // #48 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 25, { 35, 7 , 0 , 0 , 0 , 0 } }, // #49 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 26, { 49, 13, 0 , 0 , 0 , 0 } }, // #50 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 58, 40, 0 , 0 , 0 , 0 } }, // #51 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 45, 9 , 0 , 0 , 0 , 0 } }, // #52 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 7 , 0 , 0 , 0 , 0 } }, // #53 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 49, 13, 0 , 0 , 0 , 0 } }, // #54 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 40, 40, 0 , 0 , 0 , 0 } }, // #55 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 9 , 9 , 0 , 0 , 0 , 0 } }, // #56 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 7 , 7 , 0 , 0 , 0 , 0 } }, // #57 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 13, 13, 0 , 0 , 0 , 0 } }, // #58 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 27, { 11, 3 , 0 , 0 , 0 , 0 } }, // #59 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 15, { 10, 5 , 0 , 0 , 0 , 0 } }, // #60 [ref=5x] { InstDB::RWInfo::kCategoryGeneric , 8 , { 11, 3 , 0 , 0 , 0 , 0 } }, // #61 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 51, 20, 0 , 0 , 0 , 0 } }, // #62 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 58, 0 , 0 , 0 , 0 , 0 } }, // #63 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 52, 20, 0 , 0 , 0 , 0 } }, // #62 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 60, 0 , 0 , 0 , 0 , 0 } }, // #63 [ref=3x] { InstDB::RWInfo::kCategoryMov , 29, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #64 [ref=1x] { InstDB::RWInfo::kCategoryMovabs , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #65 [ref=1x] { InstDB::RWInfo::kCategoryGeneric , 30, { 10, 5 , 0 , 0 , 0 , 0 } }, // #66 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 11, 3 , 0 , 0 , 0 , 0 } }, // #67 [ref=14x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 36, 61, 0 , 0 , 0 , 0 } }, // #68 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 11, 3 , 0 , 0 , 0 , 0 } }, // #67 [ref=18x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 36, 64, 0 , 0 , 0 , 0 } }, // #68 [ref=1x] { InstDB::RWInfo::kCategoryMovh64 , 12, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #69 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 62, 7 , 0 , 0 , 0 , 0 } }, // #70 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 65, 7 , 0 , 0 , 0 , 0 } }, // #70 [ref=1x] { InstDB::RWInfo::kCategoryGeneric , 12, { 35, 7 , 0 , 0 , 0 , 0 } }, // #71 [ref=7x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 56, 5 , 0 , 0 , 0 , 0 } }, // #72 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 28, { 44, 9 , 0 , 0 , 0 , 0 } }, // #73 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 63, 20, 0 , 0 , 0 , 0 } }, // #74 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 58, 5 , 0 , 0 , 0 , 0 } }, // #72 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 28, { 45, 9 , 0 , 0 , 0 , 0 } }, // #73 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 14, { 66, 20, 0 , 0 , 0 , 0 } }, // #74 [ref=1x] { InstDB::RWInfo::kCategoryGeneric , 31, { 35, 7 , 0 , 0 , 0 , 0 } }, // #75 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 33, { 44, 9 , 0 , 0 , 0 , 0 } }, // #76 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 14, { 11, 3 , 0 , 0 , 0 , 0 } }, // #77 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 33, { 45, 9 , 0 , 0 , 0 , 0 } }, // #76 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 16, { 11, 3 , 0 , 0 , 0 , 0 } }, // #77 [ref=6x] { InstDB::RWInfo::kCategoryGeneric , 0 , { 17, 29, 0 , 0 , 0 , 0 } }, // #78 [ref=1x] { InstDB::RWInfo::kCategoryGeneric , 11, { 3 , 3 , 0 , 0 , 0 , 0 } }, // #79 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 52, 22, 0 , 0 , 0 , 0 } }, // #80 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 52, 66, 0 , 0 , 0 , 0 } }, // #81 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 53, 22, 0 , 0 , 0 , 0 } }, // #80 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 14, { 53, 69, 0 , 0 , 0 , 0 } }, // #81 [ref=1x] { InstDB::RWInfo::kCategoryGeneric , 4 , { 26, 7 , 0 , 0 , 0 , 0 } }, // #82 [ref=18x] { InstDB::RWInfo::kCategoryGeneric , 36, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #83 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 3 , { 69, 5 , 0 , 0 , 0 , 0 } }, // #84 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 3 , { 72, 5 , 0 , 0 , 0 , 0 } }, // #84 [ref=2x] { InstDB::RWInfo::kCategoryVmov1_8 , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #85 [ref=2x] { InstDB::RWInfo::kCategoryGeneric , 5 , { 10, 9 , 0 , 0 , 0 , 0 } }, // #86 [ref=4x] { InstDB::RWInfo::kCategoryGeneric , 27, { 10, 13, 0 , 0 , 0 , 0 } }, // #87 [ref=2x] { InstDB::RWInfo::kCategoryGeneric , 0 , { 4 , 0 , 0 , 0 , 0 , 0 } }, // #88 [ref=2x] { InstDB::RWInfo::kCategoryGeneric , 3 , { 5 , 5 , 0 , 0 , 0 , 0 } }, // #89 [ref=1x] { InstDB::RWInfo::kCategoryPunpcklxx , 38, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #90 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 10, { 2 , 70, 0 , 0 , 0 , 0 } }, // #91 [ref=8x] + { InstDB::RWInfo::kCategoryGeneric , 10, { 2 , 73, 0 , 0 , 0 , 0 } }, // #91 [ref=8x] { InstDB::RWInfo::kCategoryGeneric , 5 , { 37, 9 , 0 , 0 , 0 , 0 } }, // #92 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 16, 50, 0 , 0 , 0 , 0 } }, // #93 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 16, 51, 0 , 0 , 0 , 0 } }, // #93 [ref=1x] { InstDB::RWInfo::kCategoryGeneric , 0 , { 22, 21, 0 , 0 , 0 , 0 } }, // #94 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 63, 22, 0 , 0 , 0 , 0 } }, // #95 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 8 , { 73, 3 , 0 , 0 , 0 , 0 } }, // #96 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 8 , { 11, 43, 0 , 0 , 0 , 0 } }, // #97 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 53, 9 , 0 , 0 , 0 , 0 } }, // #98 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 13, { 79, 5 , 0 , 0 , 0 , 0 } }, // #99 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 13, { 11, 5 , 0 , 0 , 0 , 0 } }, // #100 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 43, { 73, 80, 0 , 0 , 0 , 0 } }, // #101 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 44, { 11, 7 , 0 , 0 , 0 , 0 } }, // #102 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 45, { 11, 9 , 0 , 0 , 0 , 0 } }, // #103 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 27, { 13, 13, 0 , 0 , 0 , 0 } }, // #104 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 11, { 11, 3 , 0 , 0 , 0 , 0 } }, // #105 [ref=7x] - { InstDB::RWInfo::kCategoryVmov2_1 , 46, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #106 [ref=14x] - { InstDB::RWInfo::kCategoryVmov1_2 , 14, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #107 [ref=7x] - { InstDB::RWInfo::kCategoryGeneric , 14, { 10, 3 , 0 , 0 , 0 , 0 } }, // #108 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 46, { 11, 3 , 0 , 0 , 0 , 0 } }, // #109 [ref=5x] - { InstDB::RWInfo::kCategoryGeneric , 47, { 11, 5 , 0 , 0 , 0 , 0 } }, // #110 [ref=5x] - { InstDB::RWInfo::kCategoryGeneric , 27, { 11, 5 , 0 , 0 , 0 , 0 } }, // #111 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 51, { 73, 43, 0 , 0 , 0 , 0 } }, // #112 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 44, 9 , 0 , 0 , 0 , 0 } }, // #113 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 18, { 2 , 3 , 0 , 0 , 0 , 0 } }, // #114 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 58, { 11, 3 , 0 , 0 , 0 , 0 } }, // #115 [ref=12x] - { InstDB::RWInfo::kCategoryVmovddup , 38, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #116 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 12, { 35, 61, 0 , 0 , 0 , 0 } }, // #117 [ref=2x] - { InstDB::RWInfo::kCategoryVmovmskpd , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #118 [ref=1x] - { InstDB::RWInfo::kCategoryVmovmskps , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #119 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 59, { 35, 7 , 0 , 0 , 0 , 0 } }, // #120 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 21, { 48, 13, 0 , 0 , 0 , 0 } }, // #121 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 2 , { 3 , 3 , 0 , 0 , 0 , 0 } }, // #122 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 15, { 11, 40, 0 , 0 , 0 , 0 } }, // #123 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 11, 7 , 0 , 0 , 0 , 0 } }, // #124 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 27, { 11, 13, 0 , 0 , 0 , 0 } }, // #125 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 3 , 0 , 0 , 0 , 0 } }, // #126 [ref=4x] - { InstDB::RWInfo::kCategoryVmov1_4 , 62, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #127 [ref=6x] - { InstDB::RWInfo::kCategoryVmov1_2 , 48, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #128 [ref=9x] - { InstDB::RWInfo::kCategoryVmov1_8 , 63, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #129 [ref=3x] - { InstDB::RWInfo::kCategoryVmov4_1 , 47, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #130 [ref=4x] - { InstDB::RWInfo::kCategoryVmov8_1 , 64, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #131 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 18, { 11, 3 , 0 , 0 , 0 , 0 } }, // #132 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 17, { 44, 9 , 0 , 0 , 0 , 0 } }, // #133 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 35, { 35, 7 , 0 , 0 , 0 , 0 } }, // #134 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 11, { 2 , 2 , 0 , 0 , 0 , 0 } }, // #135 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 58, { 2 , 2 , 0 , 0 , 0 , 0 } } // #136 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 66, 22, 0 , 0 , 0 , 0 } }, // #95 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 43, 3 , 0 , 0 , 0 , 0 } }, // #96 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 11, 44, 0 , 0 , 0 , 0 } }, // #97 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 54, 9 , 0 , 0 , 0 , 0 } }, // #98 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 21, { 11, 13, 0 , 0 , 0 , 0 } }, // #99 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 15, { 81, 5 , 0 , 0 , 0 , 0 } }, // #100 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 15, { 11, 5 , 0 , 0 , 0 , 0 } }, // #101 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 43, { 43, 82, 0 , 0 , 0 , 0 } }, // #102 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 44, { 11, 7 , 0 , 0 , 0 , 0 } }, // #103 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 45, { 11, 9 , 0 , 0 , 0 , 0 } }, // #104 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 27, { 13, 13, 0 , 0 , 0 , 0 } }, // #105 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 11, { 11, 3 , 0 , 0 , 0 , 0 } }, // #106 [ref=7x] + { InstDB::RWInfo::kCategoryVmov2_1 , 46, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #107 [ref=14x] + { InstDB::RWInfo::kCategoryVmov1_2 , 16, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #108 [ref=7x] + { InstDB::RWInfo::kCategoryGeneric , 16, { 10, 3 , 0 , 0 , 0 , 0 } }, // #109 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 46, { 11, 3 , 0 , 0 , 0 , 0 } }, // #110 [ref=5x] + { InstDB::RWInfo::kCategoryGeneric , 47, { 11, 5 , 0 , 0 , 0 , 0 } }, // #111 [ref=5x] + { InstDB::RWInfo::kCategoryGeneric , 27, { 11, 5 , 0 , 0 , 0 , 0 } }, // #112 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 51, { 43, 44, 0 , 0 , 0 , 0 } }, // #113 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 45, 9 , 0 , 0 , 0 , 0 } }, // #114 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 14, { 2 , 3 , 0 , 0 , 0 , 0 } }, // #115 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 58, { 11, 3 , 0 , 0 , 0 , 0 } }, // #116 [ref=12x] + { InstDB::RWInfo::kCategoryVmovddup , 38, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #117 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 12, { 35, 64, 0 , 0 , 0 , 0 } }, // #118 [ref=2x] + { InstDB::RWInfo::kCategoryVmovmskpd , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #119 [ref=1x] + { InstDB::RWInfo::kCategoryVmovmskps , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #120 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 59, { 35, 7 , 0 , 0 , 0 , 0 } }, // #121 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 21, { 49, 13, 0 , 0 , 0 , 0 } }, // #122 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 2 , { 3 , 3 , 0 , 0 , 0 , 0 } }, // #123 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 17, { 11, 40, 0 , 0 , 0 , 0 } }, // #124 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 11, 7 , 0 , 0 , 0 , 0 } }, // #125 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 27, { 11, 13, 0 , 0 , 0 , 0 } }, // #126 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 3 , 0 , 0 , 0 , 0 } }, // #127 [ref=4x] + { InstDB::RWInfo::kCategoryVmov1_4 , 62, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #128 [ref=6x] + { InstDB::RWInfo::kCategoryVmov1_2 , 48, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #129 [ref=9x] + { InstDB::RWInfo::kCategoryVmov1_8 , 63, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #130 [ref=3x] + { InstDB::RWInfo::kCategoryVmov4_1 , 47, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #131 [ref=4x] + { InstDB::RWInfo::kCategoryVmov8_1 , 64, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #132 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 14, { 11, 3 , 0 , 0 , 0 , 0 } }, // #133 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 90, 5 , 0 , 0 , 0 , 0 } }, // #134 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 90, 82, 0 , 0 , 0 , 0 } }, // #135 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 18, { 45, 9 , 0 , 0 , 0 , 0 } }, // #136 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 35, { 35, 7 , 0 , 0 , 0 , 0 } }, // #137 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 11, { 2 , 2 , 0 , 0 , 0 , 0 } }, // #138 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 58, { 2 , 2 , 0 , 0 , 0 , 0 } } // #139 [ref=1x] }; const InstDB::RWInfo InstDB::rwInfoB[] = { - { InstDB::RWInfo::kCategoryGeneric , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #0 [ref=773x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #0 [ref=791x] { InstDB::RWInfo::kCategoryGeneric , 0 , { 1 , 0 , 0 , 0 , 0 , 0 } }, // #1 [ref=5x] { InstDB::RWInfo::kCategoryGeneric , 3 , { 10, 5 , 0 , 0 , 0 , 0 } }, // #2 [ref=7x] - { InstDB::RWInfo::kCategoryGeneric , 6 , { 11, 3 , 3 , 0 , 0 , 0 } }, // #3 [ref=193x] + { InstDB::RWInfo::kCategoryGeneric , 6 , { 11, 3 , 3 , 0 , 0 , 0 } }, // #3 [ref=195x] { InstDB::RWInfo::kCategoryGeneric , 2 , { 11, 3 , 3 , 0 , 0 , 0 } }, // #4 [ref=5x] { InstDB::RWInfo::kCategoryGeneric , 3 , { 4 , 5 , 0 , 0 , 0 , 0 } }, // #5 [ref=14x] { InstDB::RWInfo::kCategoryGeneric , 3 , { 4 , 5 , 14, 0 , 0 , 0 } }, // #6 [ref=4x] { InstDB::RWInfo::kCategoryGeneric , 0 , { 2 , 0 , 0 , 0 , 0 , 0 } }, // #7 [ref=1x] { InstDB::RWInfo::kCategoryGeneric , 11, { 3 , 0 , 0 , 0 , 0 , 0 } }, // #8 [ref=2x] { InstDB::RWInfo::kCategoryGeneric , 0 , { 18, 0 , 0 , 0 , 0 , 0 } }, // #9 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 8 , { 3 , 0 , 0 , 0 , 0 , 0 } }, // #10 [ref=34x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 3 , 0 , 0 , 0 , 0 , 0 } }, // #10 [ref=37x] { InstDB::RWInfo::kCategoryGeneric , 12, { 7 , 0 , 0 , 0 , 0 , 0 } }, // #11 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 19, 0 , 0 , 0 , 0 , 0 } }, // #12 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 6 , 7 , 0 , 0 , 0 , 0 } }, // #13 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 8 , 9 , 0 , 0 , 0 , 0 } }, // #14 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 11, { 2 , 3 , 22, 0 , 0 , 0 } }, // #15 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 13, { 4 , 23, 18, 24, 25, 0 } }, // #16 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 12, { 26, 27, 28, 29, 30, 0 } }, // #17 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 28, 31, 32, 16, 0 , 0 } }, // #18 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 28, 0 , 0 , 0 , 0 , 0 } }, // #19 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 10, { 2 , 0 , 0 , 0 , 0 , 0 } }, // #20 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 6 , { 41, 42, 3 , 0 , 0 , 0 } }, // #21 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 17, { 44, 5 , 0 , 0 , 0 , 0 } }, // #22 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 4 , 0 , 0 , 0 , 0 , 0 } }, // #23 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 18, { 3 , 0 , 0 , 0 , 0 , 0 } }, // #24 [ref=17x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 45, 0 , 0 , 0 , 0 , 0 } }, // #25 [ref=16x] - { InstDB::RWInfo::kCategoryGeneric , 19, { 46, 0 , 0 , 0 , 0 , 0 } }, // #26 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 13, { 19, 0 , 0 , 0 , 0 , 0 } }, // #12 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 2 , 2 , 3 , 0 , 0 , 0 } }, // #13 [ref=16x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 6 , 7 , 0 , 0 , 0 , 0 } }, // #14 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 8 , 9 , 0 , 0 , 0 , 0 } }, // #15 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 11, { 2 , 3 , 22, 0 , 0 , 0 } }, // #16 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 15, { 4 , 23, 18, 24, 25, 0 } }, // #17 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 12, { 26, 27, 28, 29, 30, 0 } }, // #18 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 28, 31, 32, 16, 0 , 0 } }, // #19 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 28, 0 , 0 , 0 , 0 , 0 } }, // #20 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 10, { 2 , 0 , 0 , 0 , 0 , 0 } }, // #21 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 6 , { 41, 42, 3 , 0 , 0 , 0 } }, // #22 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 18, { 45, 5 , 0 , 0 , 0 , 0 } }, // #23 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 4 , 0 , 0 , 0 , 0 , 0 } }, // #24 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 14, { 3 , 0 , 0 , 0 , 0 , 0 } }, // #25 [ref=17x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 46, 0 , 0 , 0 , 0 , 0 } }, // #26 [ref=16x] { InstDB::RWInfo::kCategoryGeneric , 19, { 47, 0 , 0 , 0 , 0 , 0 } }, // #27 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 20, { 3 , 0 , 0 , 0 , 0 , 0 } }, // #28 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 46, 0 , 0 , 0 , 0 , 0 } }, // #29 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 18, { 11, 0 , 0 , 0 , 0 , 0 } }, // #30 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 21, { 13, 0 , 0 , 0 , 0 , 0 } }, // #31 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 8 , { 11, 0 , 0 , 0 , 0 , 0 } }, // #32 [ref=8x] - { InstDB::RWInfo::kCategoryGeneric , 21, { 48, 0 , 0 , 0 , 0 , 0 } }, // #33 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 7 , { 49, 0 , 0 , 0 , 0 , 0 } }, // #34 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 20, { 11, 0 , 0 , 0 , 0 , 0 } }, // #35 [ref=2x] - { InstDB::RWInfo::kCategoryImul , 22, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #36 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 53, 0 , 0 , 0 , 0 , 0 } }, // #37 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 26, 0 , 0 , 0 , 0 , 0 } }, // #38 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 4 , 9 , 0 , 0 , 0 , 0 } }, // #39 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 4 , 5 , 0 , 0 , 0 , 0 } }, // #40 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 56, 40, 40, 0 , 0 , 0 } }, // #41 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 44, 9 , 9 , 0 , 0 , 0 } }, // #42 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 7 , 7 , 0 , 0 , 0 } }, // #43 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 48, 13, 13, 0 , 0 , 0 } }, // #44 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 56, 40, 0 , 0 , 0 , 0 } }, // #45 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 44, 9 , 0 , 0 , 0 , 0 } }, // #46 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 7 , 0 , 0 , 0 , 0 } }, // #47 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 48, 13, 0 , 0 , 0 , 0 } }, // #48 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 48, 40, 40, 0 , 0 , 0 } }, // #49 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 9 , 9 , 0 , 0 , 0 } }, // #50 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 44, 13, 13, 0 , 0 , 0 } }, // #51 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 57, 0 , 0 , 0 , 0 , 0 } }, // #52 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 28, { 9 , 0 , 0 , 0 , 0 , 0 } }, // #53 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 16, { 43, 0 , 0 , 0 , 0 , 0 } }, // #54 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 7 , { 13, 0 , 0 , 0 , 0 , 0 } }, // #55 [ref=5x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 3 , 0 , 0 , 0 , 0 , 0 } }, // #56 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 3 , 9 , 0 , 0 , 0 , 0 } }, // #57 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 5 , 5 , 59, 0 , 0 , 0 } }, // #58 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 7 , 7 , 59, 0 , 0 , 0 } }, // #59 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 19, 29, 60, 0 , 0 , 0 } }, // #60 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 32, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #61 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 6 , { 64, 42, 3 , 0 , 0 , 0 } }, // #62 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 6 , { 11, 11, 3 , 65, 0 , 0 } }, // #63 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 17, 29, 30, 0 , 0 , 0 } }, // #64 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 10, { 3 , 0 , 0 , 0 , 0 , 0 } }, // #65 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 2 , { 2 , 3 , 0 , 0 , 0 , 0 } }, // #66 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 3 , { 5 , 5 , 0 , 67, 17, 60 } }, // #67 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 3 , { 5 , 5 , 0 , 68, 17, 60 } }, // #68 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 3 , { 5 , 5 , 0 , 67, 0 , 0 } }, // #69 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 3 , { 5 , 5 , 0 , 68, 0 , 0 } }, // #70 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 34, { 56, 5 , 0 , 0 , 0 , 0 } }, // #71 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 35, { 35, 5 , 0 , 0 , 0 , 0 } }, // #72 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 37, { 48, 3 , 0 , 0 , 0 , 0 } }, // #73 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 15, { 4 , 40, 0 , 0 , 0 , 0 } }, // #74 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 4 , 7 , 0 , 0 , 0 , 0 } }, // #75 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 27, { 2 , 13, 0 , 0 , 0 , 0 } }, // #76 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 10, { 11, 0 , 0 , 0 , 0 , 0 } }, // #77 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 35, 7 , 0 , 0 , 0 , 0 } }, // #78 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 11, 0 , 0 , 0 , 0 , 0 } }, // #79 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 16, 50, 29, 0 , 0 , 0 } }, // #80 [ref=5x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 44, 0 , 0 , 0 , 0 , 0 } }, // #81 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 0 , 0 , 0 , 0 , 0 } }, // #82 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 16, 50, 67, 0 , 0 , 0 } }, // #83 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 2 , { 11, 3 , 0 , 0 , 0 , 0 } }, // #84 [ref=19x] - { InstDB::RWInfo::kCategoryGeneric , 4 , { 36, 7 , 0 , 0 , 0 , 0 } }, // #85 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 37, 9 , 0 , 0 , 0 , 0 } }, // #86 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 71, 0 , 0 , 0 , 0 , 0 } }, // #87 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 7 , 0 , 0 , 0 , 0 , 0 } }, // #88 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 34, { 72, 0 , 0 , 0 , 0 , 0 } }, // #89 [ref=30x] - { InstDB::RWInfo::kCategoryGeneric , 11, { 2 , 3 , 70, 0 , 0 , 0 } }, // #90 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 39, { 11, 0 , 0 , 0 , 0 , 0 } }, // #91 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 28, { 44, 0 , 0 , 0 , 0 , 0 } }, // #92 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 16, { 73, 0 , 0 , 0 , 0 , 0 } }, // #93 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 74, 43, 43, 0 , 0 , 0 } }, // #94 [ref=5x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 73, 0 , 0 , 0 , 0 , 0 } }, // #95 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 9 , 60, 17, 0 , 0 , 0 } }, // #96 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 13, { 74, 75, 76, 76, 76, 5 } }, // #97 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 13, { 4 , 77, 78, 78, 78, 5 } }, // #98 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 40, { 10, 5 , 7 , 0 , 0 , 0 } }, // #99 [ref=8x] - { InstDB::RWInfo::kCategoryGeneric , 41, { 10, 5 , 13, 0 , 0 , 0 } }, // #100 [ref=7x] - { InstDB::RWInfo::kCategoryGeneric , 42, { 10, 5 , 9 , 0 , 0 , 0 } }, // #101 [ref=9x] - { InstDB::RWInfo::kCategoryGeneric , 6 , { 11, 3 , 3 , 3 , 0 , 0 } }, // #102 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 6 , { 35, 3 , 3 , 0 , 0 , 0 } }, // #103 [ref=18x] - { InstDB::RWInfo::kCategoryGeneric , 40, { 11, 5 , 7 , 0 , 0 , 0 } }, // #104 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 41, { 35, 13, 13, 0 , 0 , 0 } }, // #105 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 42, { 11, 5 , 9 , 0 , 0 , 0 } }, // #106 [ref=1x] - { InstDB::RWInfo::kCategoryVmov1_2 , 48, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #107 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 40, { 10, 5 , 5 , 0 , 0 , 0 } }, // #108 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 40, { 10, 81, 7 , 0 , 0 , 0 } }, // #109 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 41, { 10, 5 , 5 , 0 , 0 , 0 } }, // #110 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 49, { 10, 61, 3 , 0 , 0 , 0 } }, // #111 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 49, { 10, 3 , 3 , 0 , 0 , 0 } }, // #112 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 49, { 10, 81, 3 , 0 , 0 , 0 } }, // #113 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 42, { 10, 61, 9 , 0 , 0 , 0 } }, // #114 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 42, { 10, 5 , 5 , 0 , 0 , 0 } }, // #115 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 50, { 10, 5 , 5 , 0 , 0 , 0 } }, // #116 [ref=9x] - { InstDB::RWInfo::kCategoryGeneric , 52, { 10, 80, 0 , 0 , 0 , 0 } }, // #117 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 52, { 10, 3 , 0 , 0 , 0 , 0 } }, // #118 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 53, { 79, 43, 0 , 0 , 0 , 0 } }, // #119 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 6 , { 82, 3 , 3 , 0 , 0 , 0 } }, // #120 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 42, { 83, 5 , 5 , 0 , 0 , 0 } }, // #121 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 6 , { 2 , 3 , 3 , 0 , 0 , 0 } }, // #122 [ref=76x] - { InstDB::RWInfo::kCategoryGeneric , 40, { 4 , 61, 7 , 0 , 0 , 0 } }, // #123 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 42, { 4 , 81, 9 , 0 , 0 , 0 } }, // #124 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 40, { 6 , 7 , 7 , 0 , 0 , 0 } }, // #125 [ref=11x] - { InstDB::RWInfo::kCategoryGeneric , 41, { 4 , 5 , 5 , 0 , 0 , 0 } }, // #126 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 42, { 8 , 9 , 9 , 0 , 0 , 0 } }, // #127 [ref=11x] - { InstDB::RWInfo::kCategoryGeneric , 54, { 11, 3 , 3 , 3 , 0 , 0 } }, // #128 [ref=15x] - { InstDB::RWInfo::kCategoryGeneric , 55, { 35, 7 , 7 , 7 , 0 , 0 } }, // #129 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 56, { 44, 9 , 9 , 9 , 0 , 0 } }, // #130 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 41, { 4 , 5 , 13, 0 , 0 , 0 } }, // #131 [ref=6x] - { InstDB::RWInfo::kCategoryGeneric , 40, { 26, 7 , 7 , 0 , 0 , 0 } }, // #132 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 42, { 53, 9 , 9 , 0 , 0 , 0 } }, // #133 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 14, { 35, 3 , 0 , 0 , 0 , 0 } }, // #134 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 27, { 35, 13, 0 , 0 , 0 , 0 } }, // #135 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 5 , { 35, 9 , 0 , 0 , 0 , 0 } }, // #136 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 8 , { 2 , 3 , 2 , 0 , 0 , 0 } }, // #137 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 2 , 3 , 2 , 0 , 0 , 0 } }, // #138 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 18, { 4 , 3 , 4 , 0 , 0 , 0 } }, // #139 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 40, { 10, 61, 7 , 0 , 0 , 0 } }, // #140 [ref=11x] - { InstDB::RWInfo::kCategoryGeneric , 41, { 10, 84, 13, 0 , 0 , 0 } }, // #141 [ref=7x] - { InstDB::RWInfo::kCategoryGeneric , 42, { 10, 81, 9 , 0 , 0 , 0 } }, // #142 [ref=13x] - { InstDB::RWInfo::kCategoryGeneric , 50, { 79, 80, 5 , 0 , 0 , 0 } }, // #143 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 50, { 11, 3 , 5 , 0 , 0 , 0 } }, // #144 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 57, { 73, 43, 80, 0 , 0 , 0 } }, // #145 [ref=4x] - { InstDB::RWInfo::kCategoryVmaskmov , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #146 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 12, { 35, 0 , 0 , 0 , 0 , 0 } }, // #147 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 22, 0 , 0 , 0 , 0 , 0 } }, // #148 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 61, 61, 0 , 0 , 0 } }, // #149 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 12, { 10, 7 , 7 , 0 , 0 , 0 } }, // #150 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 7 , 7 , 0 , 0 , 0 } }, // #151 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 12, { 10, 61, 7 , 0 , 0 , 0 } }, // #152 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 61, 7 , 0 , 0 , 0 } }, // #153 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 84, 13, 0 , 0 , 0 } }, // #154 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 81, 9 , 0 , 0 , 0 } }, // #155 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 85, 0 , 0 , 0 , 0 , 0 } }, // #156 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 60, { 86, 87, 3 , 3 , 0 , 0 } }, // #157 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 13, { 73, 75, 76, 76, 76, 5 } }, // #158 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 57, { 79, 80, 80, 0 , 0 , 0 } }, // #159 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 22, { 11, 3 , 3 , 0 , 0 , 0 } }, // #160 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 7 , { 48, 5 , 0 , 0 , 0 , 0 } }, // #161 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 61, { 10, 5 , 40, 0 , 0 , 0 } }, // #162 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 50, { 10, 5 , 5 , 5 , 0 , 0 } }, // #163 [ref=12x] - { InstDB::RWInfo::kCategoryGeneric , 65, { 10, 5 , 5 , 5 , 0 , 0 } }, // #164 [ref=1x] - { InstDB::RWInfo::kCategoryGeneric , 66, { 10, 5 , 5 , 0 , 0 , 0 } }, // #165 [ref=12x] - { InstDB::RWInfo::kCategoryGeneric , 67, { 11, 3 , 5 , 0 , 0 , 0 } }, // #166 [ref=5x] - { InstDB::RWInfo::kCategoryGeneric , 68, { 11, 3 , 0 , 0 , 0 , 0 } }, // #167 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 69, { 11, 3 , 5 , 0 , 0 , 0 } }, // #168 [ref=3x] - { InstDB::RWInfo::kCategoryGeneric , 22, { 11, 3 , 5 , 0 , 0 , 0 } }, // #169 [ref=1x] - { InstDB::RWInfo::kCategoryGenericEx , 6 , { 2 , 3 , 3 , 0 , 0 , 0 } }, // #170 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 0 , { 60, 17, 29, 0 , 0 , 0 } }, // #171 [ref=2x] - { InstDB::RWInfo::kCategoryGeneric , 8 , { 3 , 60, 17, 0 , 0 , 0 } }, // #172 [ref=4x] - { InstDB::RWInfo::kCategoryGeneric , 8 , { 11, 60, 17, 0 , 0 , 0 } } // #173 [ref=8x] + { InstDB::RWInfo::kCategoryGeneric , 19, { 48, 0 , 0 , 0 , 0 , 0 } }, // #28 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 20, { 3 , 0 , 0 , 0 , 0 , 0 } }, // #29 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 47, 0 , 0 , 0 , 0 , 0 } }, // #30 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 14, { 11, 0 , 0 , 0 , 0 , 0 } }, // #31 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 21, { 13, 0 , 0 , 0 , 0 , 0 } }, // #32 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 11, 0 , 0 , 0 , 0 , 0 } }, // #33 [ref=8x] + { InstDB::RWInfo::kCategoryGeneric , 21, { 49, 0 , 0 , 0 , 0 , 0 } }, // #34 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 7 , { 50, 0 , 0 , 0 , 0 , 0 } }, // #35 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 20, { 11, 0 , 0 , 0 , 0 , 0 } }, // #36 [ref=2x] + { InstDB::RWInfo::kCategoryImul , 22, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #37 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 54, 0 , 0 , 0 , 0 , 0 } }, // #38 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 26, 0 , 0 , 0 , 0 , 0 } }, // #39 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 4 , 9 , 0 , 0 , 0 , 0 } }, // #40 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 4 , 5 , 0 , 0 , 0 , 0 } }, // #41 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 22, 56, 57, 0 , 0 , 0 } }, // #42 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 58, 40, 40, 0 , 0 , 0 } }, // #43 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 45, 9 , 9 , 0 , 0 , 0 } }, // #44 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 7 , 7 , 0 , 0 , 0 } }, // #45 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 49, 13, 13, 0 , 0 , 0 } }, // #46 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 58, 40, 0 , 0 , 0 , 0 } }, // #47 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 45, 9 , 0 , 0 , 0 , 0 } }, // #48 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 7 , 0 , 0 , 0 , 0 } }, // #49 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 49, 13, 0 , 0 , 0 , 0 } }, // #50 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 49, 40, 40, 0 , 0 , 0 } }, // #51 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 9 , 9 , 0 , 0 , 0 } }, // #52 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 45, 13, 13, 0 , 0 , 0 } }, // #53 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 59, 0 , 0 , 0 , 0 , 0 } }, // #54 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 28, { 9 , 0 , 0 , 0 , 0 , 0 } }, // #55 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 13, { 44, 0 , 0 , 0 , 0 , 0 } }, // #56 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 7 , { 13, 0 , 0 , 0 , 0 , 0 } }, // #57 [ref=5x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 3 , 0 , 0 , 0 , 0 , 0 } }, // #58 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 3 , 9 , 0 , 0 , 0 , 0 } }, // #59 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 15, { 5 , 5 , 61, 0 , 0 , 0 } }, // #60 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 12, { 7 , 7 , 62, 0 , 0 , 0 } }, // #61 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 63, 29, 56, 0 , 0 , 0 } }, // #62 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 32, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #63 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 6 , { 67, 42, 3 , 0 , 0 , 0 } }, // #64 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 6 , { 11, 11, 3 , 68, 0 , 0 } }, // #65 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 17, 29, 30, 0 , 0 , 0 } }, // #66 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 10, { 3 , 0 , 0 , 0 , 0 , 0 } }, // #67 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 2 , { 2 , 3 , 0 , 0 , 0 , 0 } }, // #68 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 3 , { 5 , 5 , 0 , 70, 17, 56 } }, // #69 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 3 , { 5 , 5 , 0 , 71, 17, 56 } }, // #70 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 3 , { 5 , 5 , 0 , 70, 0 , 0 } }, // #71 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 3 , { 5 , 5 , 0 , 71, 0 , 0 } }, // #72 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 34, { 58, 5 , 0 , 0 , 0 , 0 } }, // #73 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 35, { 35, 5 , 0 , 0 , 0 , 0 } }, // #74 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 37, { 49, 3 , 0 , 0 , 0 , 0 } }, // #75 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 17, { 4 , 40, 0 , 0 , 0 , 0 } }, // #76 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 4 , 7 , 0 , 0 , 0 , 0 } }, // #77 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 27, { 2 , 13, 0 , 0 , 0 , 0 } }, // #78 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 10, { 11, 0 , 0 , 0 , 0 , 0 } }, // #79 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 35, 7 , 0 , 0 , 0 , 0 } }, // #80 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 11, 0 , 0 , 0 , 0 , 0 } }, // #81 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 16, 51, 29, 0 , 0 , 0 } }, // #82 [ref=5x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 45, 0 , 0 , 0 , 0 , 0 } }, // #83 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 35, 0 , 0 , 0 , 0 , 0 } }, // #84 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 16, 51, 70, 0 , 0 , 0 } }, // #85 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 2 , { 11, 3 , 0 , 0 , 0 , 0 } }, // #86 [ref=19x] + { InstDB::RWInfo::kCategoryGeneric , 4 , { 36, 7 , 0 , 0 , 0 , 0 } }, // #87 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 37, 9 , 0 , 0 , 0 , 0 } }, // #88 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 74, 0 , 0 , 0 , 0 , 0 } }, // #89 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 7 , 0 , 0 , 0 , 0 , 0 } }, // #90 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 34, { 75, 0 , 0 , 0 , 0 , 0 } }, // #91 [ref=30x] + { InstDB::RWInfo::kCategoryGeneric , 11, { 2 , 3 , 73, 0 , 0 , 0 } }, // #92 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 39, { 11, 0 , 0 , 0 , 0 , 0 } }, // #93 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 28, { 45, 0 , 0 , 0 , 0 , 0 } }, // #94 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 13, { 43, 0 , 0 , 0 , 0 , 0 } }, // #95 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 76, 44, 44, 0 , 0 , 0 } }, // #96 [ref=8x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 43, 0 , 0 , 0 , 0 , 0 } }, // #97 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 9 , 56, 17, 0 , 0 , 0 } }, // #98 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 15, { 76, 77, 78, 78, 78, 5 } }, // #99 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 15, { 4 , 79, 80, 80, 80, 5 } }, // #100 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 40, { 10, 5 , 7 , 0 , 0 , 0 } }, // #101 [ref=8x] + { InstDB::RWInfo::kCategoryGeneric , 41, { 10, 5 , 13, 0 , 0 , 0 } }, // #102 [ref=7x] + { InstDB::RWInfo::kCategoryGeneric , 42, { 10, 5 , 9 , 0 , 0 , 0 } }, // #103 [ref=9x] + { InstDB::RWInfo::kCategoryGeneric , 6 , { 11, 3 , 3 , 3 , 0 , 0 } }, // #104 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 6 , { 35, 3 , 3 , 0 , 0 , 0 } }, // #105 [ref=18x] + { InstDB::RWInfo::kCategoryGeneric , 40, { 11, 5 , 7 , 0 , 0 , 0 } }, // #106 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 41, { 35, 13, 13, 0 , 0 , 0 } }, // #107 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 42, { 11, 5 , 9 , 0 , 0 , 0 } }, // #108 [ref=1x] + { InstDB::RWInfo::kCategoryVmov1_2 , 48, { 0 , 0 , 0 , 0 , 0 , 0 } }, // #109 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 40, { 10, 5 , 5 , 0 , 0 , 0 } }, // #110 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 40, { 10, 83, 7 , 0 , 0 , 0 } }, // #111 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 41, { 10, 5 , 5 , 0 , 0 , 0 } }, // #112 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 49, { 10, 64, 3 , 0 , 0 , 0 } }, // #113 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 49, { 10, 3 , 3 , 0 , 0 , 0 } }, // #114 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 49, { 10, 83, 3 , 0 , 0 , 0 } }, // #115 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 42, { 10, 64, 9 , 0 , 0 , 0 } }, // #116 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 42, { 10, 5 , 5 , 0 , 0 , 0 } }, // #117 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 50, { 10, 5 , 5 , 0 , 0 , 0 } }, // #118 [ref=9x] + { InstDB::RWInfo::kCategoryGeneric , 52, { 10, 82, 0 , 0 , 0 , 0 } }, // #119 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 52, { 10, 3 , 0 , 0 , 0 , 0 } }, // #120 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 53, { 81, 44, 0 , 0 , 0 , 0 } }, // #121 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 6 , { 84, 3 , 3 , 0 , 0 , 0 } }, // #122 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 42, { 85, 5 , 5 , 0 , 0 , 0 } }, // #123 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 6 , { 2 , 3 , 3 , 0 , 0 , 0 } }, // #124 [ref=88x] + { InstDB::RWInfo::kCategoryGeneric , 40, { 4 , 64, 7 , 0 , 0 , 0 } }, // #125 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 42, { 4 , 83, 9 , 0 , 0 , 0 } }, // #126 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 40, { 6 , 7 , 7 , 0 , 0 , 0 } }, // #127 [ref=11x] + { InstDB::RWInfo::kCategoryGeneric , 41, { 4 , 5 , 5 , 0 , 0 , 0 } }, // #128 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 42, { 8 , 9 , 9 , 0 , 0 , 0 } }, // #129 [ref=11x] + { InstDB::RWInfo::kCategoryGeneric , 54, { 11, 3 , 3 , 3 , 0 , 0 } }, // #130 [ref=15x] + { InstDB::RWInfo::kCategoryGeneric , 55, { 35, 7 , 7 , 7 , 0 , 0 } }, // #131 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 56, { 45, 9 , 9 , 9 , 0 , 0 } }, // #132 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 41, { 4 , 5 , 13, 0 , 0 , 0 } }, // #133 [ref=6x] + { InstDB::RWInfo::kCategoryGeneric , 40, { 26, 7 , 7 , 0 , 0 , 0 } }, // #134 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 42, { 54, 9 , 9 , 0 , 0 , 0 } }, // #135 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 16, { 35, 3 , 0 , 0 , 0 , 0 } }, // #136 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 27, { 35, 13, 0 , 0 , 0 , 0 } }, // #137 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 5 , { 35, 9 , 0 , 0 , 0 , 0 } }, // #138 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 2 , 3 , 2 , 0 , 0 , 0 } }, // #139 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 2 , 3 , 2 , 0 , 0 , 0 } }, // #140 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 14, { 4 , 3 , 4 , 0 , 0 , 0 } }, // #141 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 40, { 10, 64, 7 , 0 , 0 , 0 } }, // #142 [ref=11x] + { InstDB::RWInfo::kCategoryGeneric , 41, { 10, 86, 13, 0 , 0 , 0 } }, // #143 [ref=7x] + { InstDB::RWInfo::kCategoryGeneric , 42, { 10, 83, 9 , 0 , 0 , 0 } }, // #144 [ref=13x] + { InstDB::RWInfo::kCategoryGeneric , 50, { 81, 82, 5 , 0 , 0 , 0 } }, // #145 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 50, { 11, 3 , 5 , 0 , 0 , 0 } }, // #146 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 57, { 43, 44, 82, 0 , 0 , 0 } }, // #147 [ref=4x] + { InstDB::RWInfo::kCategoryVmaskmov , 0 , { 0 , 0 , 0 , 0 , 0 , 0 } }, // #148 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 12, { 35, 0 , 0 , 0 , 0 , 0 } }, // #149 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 22, 0 , 0 , 0 , 0 , 0 } }, // #150 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 64, 64, 0 , 0 , 0 } }, // #151 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 12, { 10, 7 , 7 , 0 , 0 , 0 } }, // #152 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 7 , 7 , 0 , 0 , 0 } }, // #153 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 12, { 10, 64, 7 , 0 , 0 , 0 } }, // #154 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 64, 7 , 0 , 0 , 0 } }, // #155 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 86, 13, 0 , 0 , 0 } }, // #156 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 10, 83, 9 , 0 , 0 , 0 } }, // #157 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 87, 0 , 0 , 0 , 0 , 0 } }, // #158 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 60, { 88, 89, 3 , 3 , 0 , 0 } }, // #159 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 15, { 43, 77, 78, 78, 78, 5 } }, // #160 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 57, { 81, 82, 82, 0 , 0 , 0 } }, // #161 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 22, { 11, 3 , 3 , 0 , 0 , 0 } }, // #162 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 7 , { 49, 5 , 0 , 0 , 0 , 0 } }, // #163 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 61, { 10, 5 , 40, 0 , 0 , 0 } }, // #164 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 50, { 10, 5 , 5 , 5 , 0 , 0 } }, // #165 [ref=12x] + { InstDB::RWInfo::kCategoryGeneric , 65, { 10, 5 , 5 , 5 , 0 , 0 } }, // #166 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 66, { 10, 5 , 5 , 0 , 0 , 0 } }, // #167 [ref=12x] + { InstDB::RWInfo::kCategoryGeneric , 67, { 11, 3 , 5 , 0 , 0 , 0 } }, // #168 [ref=5x] + { InstDB::RWInfo::kCategoryGeneric , 68, { 11, 3 , 0 , 0 , 0 , 0 } }, // #169 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 69, { 11, 3 , 5 , 0 , 0 , 0 } }, // #170 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 22, { 11, 3 , 5 , 0 , 0 , 0 } }, // #171 [ref=1x] + { InstDB::RWInfo::kCategoryGenericEx , 6 , { 2 , 3 , 3 , 0 , 0 , 0 } }, // #172 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 90, 82, 5 , 0 , 0 , 0 } }, // #173 [ref=1x] + { InstDB::RWInfo::kCategoryGeneric , 50, { 4 , 5 , 5 , 0 , 0 , 0 } }, // #174 [ref=3x] + { InstDB::RWInfo::kCategoryGeneric , 0 , { 56, 17, 29, 0 , 0 , 0 } }, // #175 [ref=2x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 3 , 56, 17, 0 , 0 , 0 } }, // #176 [ref=4x] + { InstDB::RWInfo::kCategoryGeneric , 8 , { 11, 56, 17, 0 , 0 , 0 } } // #177 [ref=8x] }; const InstDB::RWInfoOp InstDB::rwInfoOp[] = { - { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kNone }, // #0 [ref=16519x] + { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kNone }, // #0 [ref=17086x] { 0x0000000000000003u, 0x0000000000000003u, 0x00, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kRegPhysId }, // #1 [ref=10x] - { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #2 [ref=232x] - { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #3 [ref=1078x] - { 0x000000000000FFFFu, 0x000000000000FFFFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #4 [ref=104x] - { 0x000000000000FFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #5 [ref=348x] + { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #2 [ref=280x] + { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #3 [ref=1132x] + { 0x000000000000FFFFu, 0x000000000000FFFFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #4 [ref=107x] + { 0x000000000000FFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #5 [ref=356x] { 0x00000000000000FFu, 0x00000000000000FFu, 0xFF, 0, { 0 }, OpRWFlags::kRW }, // #6 [ref=18x] { 0x00000000000000FFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #7 [ref=186x] { 0x000000000000000Fu, 0x000000000000000Fu, 0xFF, 0, { 0 }, OpRWFlags::kRW }, // #8 [ref=18x] { 0x000000000000000Fu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #9 [ref=135x] { 0x0000000000000000u, 0x000000000000FFFFu, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #10 [ref=184x] - { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #11 [ref=456x] + { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #11 [ref=461x] { 0x0000000000000003u, 0x0000000000000003u, 0xFF, 0, { 0 }, OpRWFlags::kRW }, // #12 [ref=1x] - { 0x0000000000000003u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #13 [ref=63x] + { 0x0000000000000003u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #13 [ref=65x] { 0x000000000000FFFFu, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #14 [ref=4x] { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kMemBaseWrite | OpRWFlags::kMemIndexWrite }, // #15 [ref=1x] { 0x0000000000000000u, 0x000000000000000Fu, 0x02, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #16 [ref=9x] { 0x000000000000000Fu, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #17 [ref=23x] { 0x00000000000000FFu, 0x00000000000000FFu, 0x00, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #18 [ref=2x] - { 0x0000000000000000u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kMemPhysId }, // #19 [ref=3x] + { 0xFFFFFFFFFFFFFFFFu, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kMemPhysId }, // #19 [ref=1x] { 0x0000000000000000u, 0x0000000000000000u, 0x06, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kMemBaseRW | OpRWFlags::kMemBasePostModify | OpRWFlags::kMemPhysId }, // #20 [ref=3x] { 0x0000000000000000u, 0x0000000000000000u, 0x07, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kMemBaseRW | OpRWFlags::kMemBasePostModify | OpRWFlags::kMemPhysId }, // #21 [ref=2x] - { 0x0000000000000000u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #22 [ref=7x] + { 0x0000000000000000u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #22 [ref=8x] { 0x00000000000000FFu, 0x00000000000000FFu, 0x02, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #23 [ref=1x] { 0x00000000000000FFu, 0x0000000000000000u, 0x01, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #24 [ref=1x] { 0x00000000000000FFu, 0x0000000000000000u, 0x03, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #25 [ref=1x] { 0x00000000000000FFu, 0x00000000000000FFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #26 [ref=21x] { 0x000000000000000Fu, 0x000000000000000Fu, 0x02, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #27 [ref=1x] - { 0x000000000000000Fu, 0x000000000000000Fu, 0x00, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #28 [ref=4x] + { 0x000000000000000Fu, 0x000000000000000Fu, 0x00, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #28 [ref=5x] { 0x000000000000000Fu, 0x0000000000000000u, 0x01, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #29 [ref=13x] { 0x000000000000000Fu, 0x0000000000000000u, 0x03, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #30 [ref=2x] { 0x0000000000000000u, 0x000000000000000Fu, 0x03, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #31 [ref=1x] @@ -5805,76 +6037,79 @@ const InstDB::RWInfoOp InstDB::rwInfoOp[] = { { 0x0000000000000001u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #40 [ref=28x] { 0x0000000000000000u, 0x0000000000000000u, 0x02, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #41 [ref=2x] { 0x0000000000000000u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #42 [ref=3x] - { 0xFFFFFFFFFFFFFFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #43 [ref=29x] - { 0x0000000000000000u, 0x000000000000000Fu, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #44 [ref=30x] - { 0x00000000000003FFu, 0x00000000000003FFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #45 [ref=22x] - { 0x00000000000003FFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #46 [ref=13x] - { 0x0000000000000000u, 0x00000000000003FFu, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #47 [ref=1x] - { 0x0000000000000000u, 0x0000000000000003u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #48 [ref=17x] - { 0x0000000000000000u, 0x0000000000000003u, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #49 [ref=2x] - { 0x0000000000000000u, 0x000000000000000Fu, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #50 [ref=8x] - { 0x0000000000000000u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #51 [ref=2x] - { 0x0000000000000003u, 0x0000000000000000u, 0x02, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #52 [ref=4x] - { 0x000000000000000Fu, 0x000000000000000Fu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #53 [ref=4x] - { 0x0000000000000000u, 0x0000000000000000u, 0x07, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kMemPhysId }, // #54 [ref=1x] - { 0x0000000000000000u, 0x0000000000000000u, 0x01, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #55 [ref=1x] - { 0x0000000000000000u, 0x0000000000000001u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #56 [ref=14x] - { 0x0000000000000000u, 0x0000000000000001u, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kRegPhysId }, // #57 [ref=1x] - { 0x0000000000000000u, 0x0000000000000000u, 0x01, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #58 [ref=3x] - { 0x0000000000000000u, 0x0000000000000000u, 0x07, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kMemPhysId }, // #59 [ref=3x] - { 0x000000000000000Fu, 0x0000000000000000u, 0x02, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #60 [ref=22x] - { 0x000000000000FF00u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #61 [ref=23x] - { 0x0000000000000000u, 0x000000000000FF00u, 0xFF, 0, { 0 }, OpRWFlags::kWrite }, // #62 [ref=1x] - { 0x0000000000000000u, 0x0000000000000000u, 0x07, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kMemBaseRW | OpRWFlags::kMemBasePostModify | OpRWFlags::kMemPhysId }, // #63 [ref=2x] - { 0x0000000000000000u, 0x0000000000000000u, 0x02, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #64 [ref=1x] - { 0x0000000000000000u, 0x0000000000000000u, 0x02, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #65 [ref=1x] - { 0x0000000000000000u, 0x0000000000000000u, 0x06, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kMemPhysId }, // #66 [ref=1x] - { 0x0000000000000000u, 0x000000000000000Fu, 0x01, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #67 [ref=5x] - { 0x0000000000000000u, 0x000000000000FFFFu, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #68 [ref=4x] - { 0x0000000000000000u, 0x0000000000000007u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #69 [ref=2x] - { 0x0000000000000001u, 0x0000000000000000u, 0x01, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #70 [ref=10x] - { 0x0000000000000001u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #71 [ref=1x] - { 0x0000000000000000u, 0x0000000000000001u, 0xFF, 0, { 0 }, OpRWFlags::kWrite }, // #72 [ref=30x] - { 0x0000000000000000u, 0xFFFFFFFFFFFFFFFFu, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #73 [ref=20x] - { 0xFFFFFFFFFFFFFFFFu, 0xFFFFFFFFFFFFFFFFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #74 [ref=7x] - { 0xFFFFFFFFFFFFFFFFu, 0x0000000000000000u, 0xFF, 4, { 0 }, OpRWFlags::kRead }, // #75 [ref=4x] - { 0xFFFFFFFFFFFFFFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kConsecutive }, // #76 [ref=12x] - { 0x000000000000FFFFu, 0x0000000000000000u, 0xFF, 4, { 0 }, OpRWFlags::kRead }, // #77 [ref=2x] - { 0x000000000000FFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kConsecutive }, // #78 [ref=6x] - { 0x0000000000000000u, 0x00000000FFFFFFFFu, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #79 [ref=10x] - { 0x00000000FFFFFFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #80 [ref=16x] - { 0x000000000000FFF0u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #81 [ref=18x] - { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kUnique | OpRWFlags::kZExt }, // #82 [ref=4x] - { 0x000000000000FFFFu, 0x000000000000FFFFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kUnique | OpRWFlags::kZExt }, // #83 [ref=4x] - { 0x000000000000FFFCu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #84 [ref=8x] - { 0x0000000000000000u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #85 [ref=1x] - { 0x0000000000000000u, 0x00000000000000FFu, 0xFF, 2, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #86 [ref=2x] - { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kConsecutive } // #87 [ref=2x] + { 0x0000000000000000u, 0xFFFFFFFFFFFFFFFFu, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #43 [ref=23x] + { 0xFFFFFFFFFFFFFFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #44 [ref=35x] + { 0x0000000000000000u, 0x000000000000000Fu, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #45 [ref=30x] + { 0x00000000000003FFu, 0x00000000000003FFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #46 [ref=22x] + { 0x00000000000003FFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #47 [ref=13x] + { 0x0000000000000000u, 0x00000000000003FFu, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #48 [ref=1x] + { 0x0000000000000000u, 0x0000000000000003u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #49 [ref=17x] + { 0x0000000000000000u, 0x0000000000000003u, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #50 [ref=2x] + { 0x0000000000000000u, 0x000000000000000Fu, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #51 [ref=8x] + { 0x0000000000000000u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #52 [ref=2x] + { 0x0000000000000003u, 0x0000000000000000u, 0x02, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #53 [ref=4x] + { 0x000000000000000Fu, 0x000000000000000Fu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #54 [ref=4x] + { 0x0000000000000000u, 0x0000000000000000u, 0x07, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kMemPhysId }, // #55 [ref=1x] + { 0x000000000000000Fu, 0x0000000000000000u, 0x02, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #56 [ref=23x] + { 0x0000000000000000u, 0x0000000000000000u, 0x01, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #57 [ref=2x] + { 0x0000000000000000u, 0x0000000000000001u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #58 [ref=14x] + { 0x0000000000000000u, 0x0000000000000001u, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kRegPhysId }, // #59 [ref=1x] + { 0x0000000000000000u, 0x0000000000000000u, 0x01, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #60 [ref=3x] + { 0x000000000000FFFFu, 0x000000000000FFFFu, 0x07, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kMemPhysId }, // #61 [ref=2x] + { 0x00000000000000FFu, 0x00000000000000FFu, 0x07, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kMemPhysId }, // #62 [ref=1x] + { 0x0000000000000000u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kMemPhysId }, // #63 [ref=2x] + { 0x000000000000FF00u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #64 [ref=23x] + { 0x0000000000000000u, 0x000000000000FF00u, 0xFF, 0, { 0 }, OpRWFlags::kWrite }, // #65 [ref=1x] + { 0x0000000000000000u, 0x0000000000000000u, 0x07, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kMemBaseRW | OpRWFlags::kMemBasePostModify | OpRWFlags::kMemPhysId }, // #66 [ref=2x] + { 0x0000000000000000u, 0x0000000000000000u, 0x02, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kRegPhysId | OpRWFlags::kZExt }, // #67 [ref=1x] + { 0x0000000000000000u, 0x0000000000000000u, 0x02, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #68 [ref=1x] + { 0x0000000000000000u, 0x0000000000000000u, 0x06, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kMemPhysId }, // #69 [ref=1x] + { 0x0000000000000000u, 0x000000000000000Fu, 0x01, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #70 [ref=5x] + { 0x0000000000000000u, 0x000000000000FFFFu, 0x00, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #71 [ref=4x] + { 0x0000000000000000u, 0x0000000000000007u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #72 [ref=2x] + { 0x0000000000000001u, 0x0000000000000000u, 0x01, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #73 [ref=10x] + { 0x0000000000000001u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kRegPhysId }, // #74 [ref=1x] + { 0x0000000000000000u, 0x0000000000000001u, 0xFF, 0, { 0 }, OpRWFlags::kWrite }, // #75 [ref=30x] + { 0xFFFFFFFFFFFFFFFFu, 0xFFFFFFFFFFFFFFFFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt }, // #76 [ref=10x] + { 0xFFFFFFFFFFFFFFFFu, 0x0000000000000000u, 0xFF, 4, { 0 }, OpRWFlags::kRead }, // #77 [ref=4x] + { 0xFFFFFFFFFFFFFFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kConsecutive }, // #78 [ref=12x] + { 0x000000000000FFFFu, 0x0000000000000000u, 0xFF, 4, { 0 }, OpRWFlags::kRead }, // #79 [ref=2x] + { 0x000000000000FFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead | OpRWFlags::kConsecutive }, // #80 [ref=6x] + { 0x0000000000000000u, 0x00000000FFFFFFFFu, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #81 [ref=10x] + { 0x00000000FFFFFFFFu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #82 [ref=18x] + { 0x000000000000FFF0u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #83 [ref=18x] + { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kUnique | OpRWFlags::kZExt }, // #84 [ref=4x] + { 0x000000000000FFFFu, 0x000000000000FFFFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kUnique | OpRWFlags::kZExt }, // #85 [ref=4x] + { 0x000000000000FFFCu, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kRead }, // #86 [ref=8x] + { 0x0000000000000000u, 0x0000000000000000u, 0x00, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt | OpRWFlags::kRegPhysId }, // #87 [ref=1x] + { 0x0000000000000000u, 0x00000000000000FFu, 0xFF, 2, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt }, // #88 [ref=2x] + { 0x0000000000000000u, 0x0000000000000000u, 0xFF, 0, { 0 }, OpRWFlags::kWrite | OpRWFlags::kZExt | OpRWFlags::kConsecutive }, // #89 [ref=2x] + { 0x00000000FFFFFFFFu, 0x00000000FFFFFFFFu, 0xFF, 0, { 0 }, OpRWFlags::kRW | OpRWFlags::kZExt } // #90 [ref=3x] }; const InstDB::RWInfoRm InstDB::rwInfoRm[] = { - { InstDB::RWInfoRm::kCategoryNone , 0x00, 0 , 0, 0 }, // #0 [ref=1997x] + { InstDB::RWInfoRm::kCategoryNone , 0x00, 0 , 0, 0 }, // #0 [ref=2083x] { InstDB::RWInfoRm::kCategoryConsistent, 0x03, 0 , InstDB::RWInfoRm::kFlagAmbiguous, 0 }, // #1 [ref=8x] { InstDB::RWInfoRm::kCategoryConsistent, 0x02, 0 , 0, 0 }, // #2 [ref=204x] { InstDB::RWInfoRm::kCategoryFixed , 0x02, 16, 0, 0 }, // #3 [ref=122x] { InstDB::RWInfoRm::kCategoryFixed , 0x02, 8 , 0, 0 }, // #4 [ref=66x] { InstDB::RWInfoRm::kCategoryFixed , 0x02, 4 , 0, 0 }, // #5 [ref=35x] - { InstDB::RWInfoRm::kCategoryConsistent, 0x04, 0 , 0, 0 }, // #6 [ref=300x] + { InstDB::RWInfoRm::kCategoryConsistent, 0x04, 0 , 0, 0 }, // #6 [ref=314x] { InstDB::RWInfoRm::kCategoryFixed , 0x01, 2 , 0, 0 }, // #7 [ref=9x] - { InstDB::RWInfoRm::kCategoryFixed , 0x00, 0 , 0, 0 }, // #8 [ref=63x] + { InstDB::RWInfoRm::kCategoryFixed , 0x00, 0 , 0, 0 }, // #8 [ref=68x] { InstDB::RWInfoRm::kCategoryFixed , 0x03, 0 , 0, 0 }, // #9 [ref=1x] { InstDB::RWInfoRm::kCategoryConsistent, 0x01, 0 , InstDB::RWInfoRm::kFlagAmbiguous, 0 }, // #10 [ref=21x] { InstDB::RWInfoRm::kCategoryConsistent, 0x01, 0 , 0, 0 }, // #11 [ref=14x] - { InstDB::RWInfoRm::kCategoryFixed , 0x00, 8 , 0, 0 }, // #12 [ref=22x] - { InstDB::RWInfoRm::kCategoryFixed , 0x00, 16, 0, 0 }, // #13 [ref=21x] - { InstDB::RWInfoRm::kCategoryConsistent, 0x02, 0 , InstDB::RWInfoRm::kFlagAmbiguous, 0 }, // #14 [ref=22x] - { InstDB::RWInfoRm::kCategoryFixed , 0x02, 1 , 0, 0 }, // #15 [ref=5x] - { InstDB::RWInfoRm::kCategoryFixed , 0x00, 64, 0, 0 }, // #16 [ref=5x] - { InstDB::RWInfoRm::kCategoryFixed , 0x01, 4 , 0, 0 }, // #17 [ref=6x] - { InstDB::RWInfoRm::kCategoryNone , 0x00, 0 , InstDB::RWInfoRm::kFlagAmbiguous, 0 }, // #18 [ref=26x] + { InstDB::RWInfoRm::kCategoryFixed , 0x00, 8 , 0, 0 }, // #12 [ref=23x] + { InstDB::RWInfoRm::kCategoryFixed , 0x00, 64, 0, 0 }, // #13 [ref=6x] + { InstDB::RWInfoRm::kCategoryNone , 0x00, 0 , InstDB::RWInfoRm::kFlagAmbiguous, 0 }, // #14 [ref=30x] + { InstDB::RWInfoRm::kCategoryFixed , 0x00, 16, 0, 0 }, // #15 [ref=23x] + { InstDB::RWInfoRm::kCategoryConsistent, 0x02, 0 , InstDB::RWInfoRm::kFlagAmbiguous, 0 }, // #16 [ref=22x] + { InstDB::RWInfoRm::kCategoryFixed , 0x02, 1 , 0, 0 }, // #17 [ref=5x] + { InstDB::RWInfoRm::kCategoryFixed , 0x01, 4 , 0, 0 }, // #18 [ref=6x] { InstDB::RWInfoRm::kCategoryFixed , 0x00, 10, 0, 0 }, // #19 [ref=2x] { InstDB::RWInfoRm::kCategoryNone , 0x01, 0 , InstDB::RWInfoRm::kFlagAmbiguous, 0 }, // #20 [ref=5x] - { InstDB::RWInfoRm::kCategoryFixed , 0x00, 2 , 0, 0 }, // #21 [ref=4x] + { InstDB::RWInfoRm::kCategoryFixed , 0x00, 2 , 0, 0 }, // #21 [ref=6x] { InstDB::RWInfoRm::kCategoryConsistent, 0x06, 0 , 0, 0 }, // #22 [ref=6x] { InstDB::RWInfoRm::kCategoryFixed , 0x03, 1 , 0, 0 }, // #23 [ref=1x] { InstDB::RWInfoRm::kCategoryFixed , 0x03, 4 , 0, 0 }, // #24 [ref=3x] @@ -5903,7 +6138,7 @@ const InstDB::RWInfoRm InstDB::rwInfoRm[] = { { InstDB::RWInfoRm::kCategoryQuarter , 0x02, 0 , 0, 0 }, // #47 [ref=9x] { InstDB::RWInfoRm::kCategoryHalf , 0x01, 0 , 0, 0 }, // #48 [ref=10x] { InstDB::RWInfoRm::kCategoryConsistent, 0x04, 0 , InstDB::RWInfoRm::kFlagAmbiguous, 0 }, // #49 [ref=6x] - { InstDB::RWInfoRm::kCategoryFixed , 0x04, 16, 0, 0 }, // #50 [ref=27x] + { InstDB::RWInfoRm::kCategoryFixed , 0x04, 16, 0, 0 }, // #50 [ref=30x] { InstDB::RWInfoRm::kCategoryFixed , 0x02, 64, 0, 0 }, // #51 [ref=6x] { InstDB::RWInfoRm::kCategoryFixed , 0x01, 16, 0, 0 }, // #52 [ref=6x] { InstDB::RWInfoRm::kCategoryFixed , 0x01, 32, 0, 0 }, // #53 [ref=4x] diff --git a/src/asmjit/x86/x86instdb_p.h b/src/asmjit/x86/x86instdb_p.h index fd61369..2d66897 100644 --- a/src/asmjit/x86/x86instdb_p.h +++ b/src/asmjit/x86/x86instdb_p.h @@ -126,6 +126,7 @@ enum EncodingId : uint32_t { kEncodingVexMri, //!< VEX|EVEX [MRI]. kEncodingVexMri_Lx, //!< VEX|EVEX [MRI] (propagates VEX|EVEX.L if YMM used). kEncodingVexMri_Vpextrw, //!< VEX|EVEX [MRI] (special case required by VPEXTRW instruction). + kEncodingVexMvr_Wx, //!< VEX|EVEX [MVR] (propagates VEX|EVEX.W if GPQ used). kEncodingVexRm, //!< VEX|EVEX [RM]. kEncodingVexRm_ZDI, //!< VEX|EVEX [RM]. kEncodingVexRm_Wx, //!< VEX|EVEX [RM] (propagates VEX|EVEX.W if GPQ used). diff --git a/test/asmjit_test_assembler.cpp b/test/asmjit_test_assembler.cpp index 17a9c3b..446b1e3 100644 --- a/test/asmjit_test_assembler.cpp +++ b/test/asmjit_test_assembler.cpp @@ -35,18 +35,28 @@ int main(int argc, char* argv[]) { unsigned((ASMJIT_LIBRARY_VERSION ) & 0xFF)); printf("Usage:\n"); - printf(" --help Show usage only\n"); - printf(" --arch= Select architecture to run ('all' by default)\n"); - printf(" --verbose Log all instruction tests [%s]\n", settings.verbose ? "x" : " "); - printf(" --validate Use instruction validation [%s]\n", settings.validate ? "x" : " "); + printf(" --help Show usage only\n"); + printf(" --verbose Show only assembling errors [%s]\n", settings.verbose ? "x" : " "); + printf(" --validate Use instruction validation [%s]\n", settings.validate ? "x" : " "); + printf(" --arch= Select architecture to run ('all' by default)\n"); printf("\n"); + printf("Architectures:\n"); +#if !defined(ASMJIT_NO_X86) + printf(" --arch=x86 32-bit X86 architecture (X86)\n"); + printf(" --arch=x64 64-bit X86 architecture (X86_64)\n"); +#endif +#if !defined(ASMJIT_AARCH64) + printf(" --arch=aarch64 64-bit ARM architecture (AArch64)\n"); +#endif + printf("\n"); if (cmdLine.hasArg("--help")) return 0; const char* arch = cmdLine.valueOf("--arch", "all"); bool x86Failed = false; bool x64Failed = false; + bool armFailed = false; bool aarch64Failed = false; #if !defined(ASMJIT_NO_X86) @@ -62,7 +72,7 @@ int main(int argc, char* argv[]) { aarch64Failed = !testA64Assembler(settings); #endif - bool failed = x86Failed || x64Failed || aarch64Failed; + bool failed = x86Failed || x64Failed || armFailed || aarch64Failed; if (failed) { if (x86Failed) @@ -71,6 +81,9 @@ int main(int argc, char* argv[]) { if (x64Failed) printf("** X64 test suite failed **\n"); + if (armFailed) + printf("** ARM test suite failed **\n"); + if (aarch64Failed) printf("** AArch64 test suite failed **\n"); diff --git a/test/asmjit_test_assembler.h b/test/asmjit_test_assembler.h index 7a37a47..54f8daf 100644 --- a/test/asmjit_test_assembler.h +++ b/test/asmjit_test_assembler.h @@ -52,7 +52,7 @@ public: assembler.addDiagnosticOptions(asmjit::DiagnosticOptions::kValidateAssembler); } - ASMJIT_NOINLINE bool testInstruction(const char* expectedOpcode, const char* s, uint32_t err) noexcept { + ASMJIT_NOINLINE bool testValidInstruction(const char* s, const char* expectedOpcode, asmjit::Error err) noexcept { count++; if (err) { @@ -80,6 +80,29 @@ public: prepare(); return true; } + + ASMJIT_NOINLINE bool testInvalidInstruction(const char* s, asmjit::Error expectedError, asmjit::Error err) noexcept { + count++; + + if (err == asmjit::kErrorOk) { + printf(" !! %s passed, but should have failed with <%s> error\n", s, asmjit::DebugUtils::errorAsString(expectedError)); + prepare(); + return false; + } + + if (err != asmjit::kErrorOk) { + printf(" !! %s failed with <%s>, but should have failed with <%s>\n", s, asmjit::DebugUtils::errorAsString(err), asmjit::DebugUtils::errorAsString(expectedError)); + prepare(); + return false; + } + + if (settings.verbose) + printf(" OK [%s] <- %s\n", asmjit::DebugUtils::errorAsString(err), s); + + passed++; + prepare(); + return true; + } }; #endif // ASMJIT_TEST_ASSEMBLER_H_INCLUDED diff --git a/test/asmjit_test_assembler_a64.cpp b/test/asmjit_test_assembler_a64.cpp index bbba4b6..2ae3081 100644 --- a/test/asmjit_test_assembler_a64.cpp +++ b/test/asmjit_test_assembler_a64.cpp @@ -17,7 +17,7 @@ using namespace asmjit; #define TEST_INSTRUCTION(OPCODE, ...) \ - tester.testInstruction(OPCODE, #__VA_ARGS__, tester.assembler.__VA_ARGS__) + tester.testValidInstruction(#__VA_ARGS__, OPCODE, tester.assembler.__VA_ARGS__) static void ASMJIT_NOINLINE testA64AssemblerBase(AssemblerTester& tester) noexcept { using namespace a64; diff --git a/test/asmjit_test_assembler_x64.cpp b/test/asmjit_test_assembler_x64.cpp index bedf796..b5dfb0a 100644 --- a/test/asmjit_test_assembler_x64.cpp +++ b/test/asmjit_test_assembler_x64.cpp @@ -17,11 +17,19 @@ using namespace asmjit; #define TEST_INSTRUCTION(OPCODE, ...) \ - tester.testInstruction(OPCODE, #__VA_ARGS__, tester.assembler.__VA_ARGS__) + tester.testValidInstruction(#__VA_ARGS__, OPCODE, tester.assembler.__VA_ARGS__) static void ASMJIT_NOINLINE testX64AssemblerBase(AssemblerTester& tester) noexcept { using namespace x86; + TEST_INSTRUCTION("0F38FC9C1180000000" , aadd(ptr(rcx, rdx, 0, 128), ebx)); + TEST_INSTRUCTION("0F38FC9C1180000000" , aadd(dword_ptr(rcx, rdx, 0, 128), ebx)); + TEST_INSTRUCTION("480F38FC9C1180000000" , aadd(ptr(rcx, rdx, 0, 128), rbx)); + TEST_INSTRUCTION("480F38FC9C1180000000" , aadd(qword_ptr(rcx, rdx, 0, 128), rbx)); + TEST_INSTRUCTION("660F38FC9C1180000000" , aand(ptr(rcx, rdx, 0, 128), ebx)); + TEST_INSTRUCTION("660F38FC9C1180000000" , aand(dword_ptr(rcx, rdx, 0, 128), ebx)); + TEST_INSTRUCTION("66480F38FC9C1180000000" , aand(ptr(rcx, rdx, 0, 128), rbx)); + TEST_INSTRUCTION("66480F38FC9C1180000000" , aand(qword_ptr(rcx, rdx, 0, 128), rbx)); TEST_INSTRUCTION("80D101" , adc(cl, 1)); TEST_INSTRUCTION("80D501" , adc(ch, 1)); TEST_INSTRUCTION("8094118000000001" , adc(byte_ptr(rcx, rdx, 0, 128), 1)); @@ -148,6 +156,14 @@ static void ASMJIT_NOINLINE testX64AssemblerBase(AssemblerTester TEST_INSTRUCTION("C4E2E8F2CB" , andn(rcx, rdx, rbx)); TEST_INSTRUCTION("C4E2E8F28C2B80000000" , andn(rcx, rdx, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E2E8F28C2B80000000" , andn(rcx, rdx, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("F20F38FC9C1180000000" , aor(ptr(rcx, rdx, 0, 128), ebx)); + TEST_INSTRUCTION("F20F38FC9C1180000000" , aor(dword_ptr(rcx, rdx, 0, 128), ebx)); + TEST_INSTRUCTION("F2480F38FC9C1180000000" , aor(ptr(rcx, rdx, 0, 128), rbx)); + TEST_INSTRUCTION("F2480F38FC9C1180000000" , aor(qword_ptr(rcx, rdx, 0, 128), rbx)); + TEST_INSTRUCTION("F30F38FC9C1180000000" , axor(ptr(rcx, rdx, 0, 128), ebx)); + TEST_INSTRUCTION("F30F38FC9C1180000000" , axor(dword_ptr(rcx, rdx, 0, 128), ebx)); + TEST_INSTRUCTION("F3480F38FC9C1180000000" , axor(ptr(rcx, rdx, 0, 128), rbx)); + TEST_INSTRUCTION("F3480F38FC9C1180000000" , axor(qword_ptr(rcx, rdx, 0, 128), rbx)); TEST_INSTRUCTION("C4E260F7CA" , bextr(ecx, edx, ebx)); TEST_INSTRUCTION("C4E258F78C1A80000000" , bextr(ecx, ptr(rdx, rbx, 0, 128), esp)); TEST_INSTRUCTION("C4E258F78C1A80000000" , bextr(ecx, dword_ptr(rdx, rbx, 0, 128), esp)); @@ -641,10 +657,70 @@ static void ASMJIT_NOINLINE testX64AssemblerBase(AssemblerTester TEST_INSTRUCTION("3B8C1A80000000" , cmp(ecx, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("483B8C1A80000000" , cmp(rcx, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("483B8C1A80000000" , cmp(rcx, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E259E69C1180000000" , cmpbexadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E69C1180000000" , cmpbexadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9E69C1180000000" , cmpbexadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9E69C1180000000" , cmpbexadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259E29C1180000000" , cmpbxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E29C1180000000" , cmpbxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9E29C1180000000" , cmpbxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9E29C1180000000" , cmpbxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259EE9C1180000000" , cmplexadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EE9C1180000000" , cmplexadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9EE9C1180000000" , cmplexadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9EE9C1180000000" , cmplexadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259EC9C1180000000" , cmplxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EC9C1180000000" , cmplxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9EC9C1180000000" , cmplxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9EC9C1180000000" , cmplxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259E79C1180000000" , cmpnbexadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E79C1180000000" , cmpnbexadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9E79C1180000000" , cmpnbexadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9E79C1180000000" , cmpnbexadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259E39C1180000000" , cmpnbxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E39C1180000000" , cmpnbxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9E39C1180000000" , cmpnbxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9E39C1180000000" , cmpnbxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259EF9C1180000000" , cmpnlexadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EF9C1180000000" , cmpnlexadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9EF9C1180000000" , cmpnlexadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9EF9C1180000000" , cmpnlexadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259ED9C1180000000" , cmpnlxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259ED9C1180000000" , cmpnlxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9ED9C1180000000" , cmpnlxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9ED9C1180000000" , cmpnlxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259E19C1180000000" , cmpnoxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E19C1180000000" , cmpnoxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9E19C1180000000" , cmpnoxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9E19C1180000000" , cmpnoxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259EB9C1180000000" , cmpnpxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EB9C1180000000" , cmpnpxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9EB9C1180000000" , cmpnpxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9EB9C1180000000" , cmpnpxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259E99C1180000000" , cmpnsxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E99C1180000000" , cmpnsxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9E99C1180000000" , cmpnsxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9E99C1180000000" , cmpnsxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259E59C1180000000" , cmpnzxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E59C1180000000" , cmpnzxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9E59C1180000000" , cmpnzxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9E59C1180000000" , cmpnzxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259E09C1180000000" , cmpoxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E09C1180000000" , cmpoxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9E09C1180000000" , cmpoxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9E09C1180000000" , cmpoxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E259EA9C1180000000" , cmppxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EA9C1180000000" , cmppxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9EA9C1180000000" , cmppxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9EA9C1180000000" , cmppxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); TEST_INSTRUCTION("A6" , cmps(byte_ptr(rsi), byte_ptr(rdi))); TEST_INSTRUCTION("66A7" , cmps(word_ptr(rsi), word_ptr(rdi))); TEST_INSTRUCTION("A7" , cmps(dword_ptr(rsi), dword_ptr(rdi))); TEST_INSTRUCTION("48A7" , cmps(qword_ptr(rsi), qword_ptr(rdi))); + TEST_INSTRUCTION("C4E259E89C1180000000" , cmpsxadd(ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E89C1180000000" , cmpsxadd(dword_ptr(rcx, rdx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E2D9E89C1180000000" , cmpsxadd(ptr(rcx, rdx, 0, 128), rbx, rsp)); + TEST_INSTRUCTION("C4E2D9E89C1180000000" , cmpsxadd(qword_ptr(rcx, rdx, 0, 128), rbx, rsp)); TEST_INSTRUCTION("0FB0D1" , cmpxchg(cl, dl, al)); TEST_INSTRUCTION("0FB0F1" , cmpxchg(cl, dh, al)); TEST_INSTRUCTION("0FB0D5" , cmpxchg(ch, dl, al)); @@ -754,12 +830,15 @@ static void ASMJIT_NOINLINE testX64AssemblerBase(AssemblerTester TEST_INSTRUCTION("486BC901" , imul(rcx, 1)); TEST_INSTRUCTION("480FAF8C1A80000000" , imul(rcx, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("480FAF8C1A80000000" , imul(rcx, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("666BC901" , imul(cx, cx, 1)); TEST_INSTRUCTION("666BCA01" , imul(cx, dx, 1)); TEST_INSTRUCTION("666B8C1A8000000001" , imul(cx, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("666B8C1A8000000001" , imul(cx, word_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("6BC901" , imul(ecx, ecx, 1)); TEST_INSTRUCTION("6BCA01" , imul(ecx, edx, 1)); TEST_INSTRUCTION("6B8C1A8000000001" , imul(ecx, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("6B8C1A8000000001" , imul(ecx, dword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("486BC901" , imul(rcx, rcx, 1)); TEST_INSTRUCTION("486BCA01" , imul(rcx, rdx, 1)); TEST_INSTRUCTION("486B8C1A8000000001" , imul(rcx, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("486B8C1A8000000001" , imul(rcx, qword_ptr(rdx, rbx, 0, 128), 1)); @@ -798,81 +877,6 @@ static void ASMJIT_NOINLINE testX64AssemblerBase(AssemblerTester TEST_INSTRUCTION("66CF" , iret()); TEST_INSTRUCTION("CF" , iretd()); TEST_INSTRUCTION("48CF" , iretq()); - TEST_INSTRUCTION("C5ED4ACB" , kaddb(k1, k2, k3)); - TEST_INSTRUCTION("C4E1ED4ACB" , kaddd(k1, k2, k3)); - TEST_INSTRUCTION("C4E1EC4ACB" , kaddq(k1, k2, k3)); - TEST_INSTRUCTION("C5EC4ACB" , kaddw(k1, k2, k3)); - TEST_INSTRUCTION("C5ED41CB" , kandb(k1, k2, k3)); - TEST_INSTRUCTION("C4E1ED41CB" , kandd(k1, k2, k3)); - TEST_INSTRUCTION("C5ED42CB" , kandnb(k1, k2, k3)); - TEST_INSTRUCTION("C4E1ED42CB" , kandnd(k1, k2, k3)); - TEST_INSTRUCTION("C4E1EC42CB" , kandnq(k1, k2, k3)); - TEST_INSTRUCTION("C5EC42CB" , kandnw(k1, k2, k3)); - TEST_INSTRUCTION("C4E1EC41CB" , kandq(k1, k2, k3)); - TEST_INSTRUCTION("C5EC41CB" , kandw(k1, k2, k3)); - TEST_INSTRUCTION("C5F992CA" , kmovb(k1, edx)); - TEST_INSTRUCTION("C5F990CA" , kmovb(k1, k2)); - TEST_INSTRUCTION("C5F9908C1A80000000" , kmovb(k1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F9908C1A80000000" , kmovb(k1, byte_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F993CA" , kmovb(ecx, k2)); - TEST_INSTRUCTION("C5F9919C1180000000" , kmovb(ptr(rcx, rdx, 0, 128), k3)); - TEST_INSTRUCTION("C5F9919C1180000000" , kmovb(byte_ptr(rcx, rdx, 0, 128), k3)); - TEST_INSTRUCTION("C5FB92CA" , kmovd(k1, edx)); - TEST_INSTRUCTION("C4E1F990CA" , kmovd(k1, k2)); - TEST_INSTRUCTION("C4E1F9908C1A80000000" , kmovd(k1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1F9908C1A80000000" , kmovd(k1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FB93CA" , kmovd(ecx, k2)); - TEST_INSTRUCTION("C4E1F9919C1180000000" , kmovd(ptr(rcx, rdx, 0, 128), k3)); - TEST_INSTRUCTION("C4E1F9919C1180000000" , kmovd(dword_ptr(rcx, rdx, 0, 128), k3)); - TEST_INSTRUCTION("C4E1FB92CA" , kmovq(k1, rdx)); - TEST_INSTRUCTION("C4E1F890CA" , kmovq(k1, k2)); - TEST_INSTRUCTION("C4E1F8908C1A80000000" , kmovq(k1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1F8908C1A80000000" , kmovq(k1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1FB93CA" , kmovq(rcx, k2)); - TEST_INSTRUCTION("C4E1F8919C1180000000" , kmovq(ptr(rcx, rdx, 0, 128), k3)); - TEST_INSTRUCTION("C4E1F8919C1180000000" , kmovq(qword_ptr(rcx, rdx, 0, 128), k3)); - TEST_INSTRUCTION("C5F892CA" , kmovw(k1, edx)); - TEST_INSTRUCTION("C5F890CA" , kmovw(k1, k2)); - TEST_INSTRUCTION("C5F8908C1A80000000" , kmovw(k1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F8908C1A80000000" , kmovw(k1, word_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F893CA" , kmovw(ecx, k2)); - TEST_INSTRUCTION("C5F8919C1180000000" , kmovw(ptr(rcx, rdx, 0, 128), k3)); - TEST_INSTRUCTION("C5F8919C1180000000" , kmovw(word_ptr(rcx, rdx, 0, 128), k3)); - TEST_INSTRUCTION("C5F944CA" , knotb(k1, k2)); - TEST_INSTRUCTION("C4E1F944CA" , knotd(k1, k2)); - TEST_INSTRUCTION("C4E1F844CA" , knotq(k1, k2)); - TEST_INSTRUCTION("C5F844CA" , knotw(k1, k2)); - TEST_INSTRUCTION("C5ED45CB" , korb(k1, k2, k3)); - TEST_INSTRUCTION("C4E1ED45CB" , kord(k1, k2, k3)); - TEST_INSTRUCTION("C4E1EC45CB" , korq(k1, k2, k3)); - TEST_INSTRUCTION("C5F998CA" , kortestb(k1, k2)); - TEST_INSTRUCTION("C4E1F998CA" , kortestd(k1, k2)); - TEST_INSTRUCTION("C4E1F898CA" , kortestq(k1, k2)); - TEST_INSTRUCTION("C5F898CA" , kortestw(k1, k2)); - TEST_INSTRUCTION("C5EC45CB" , korw(k1, k2, k3)); - TEST_INSTRUCTION("C4E37932CA01" , kshiftlb(k1, k2, 1)); - TEST_INSTRUCTION("C4E37933CA01" , kshiftld(k1, k2, 1)); - TEST_INSTRUCTION("C4E3F933CA01" , kshiftlq(k1, k2, 1)); - TEST_INSTRUCTION("C4E3F932CA01" , kshiftlw(k1, k2, 1)); - TEST_INSTRUCTION("C4E37930CA01" , kshiftrb(k1, k2, 1)); - TEST_INSTRUCTION("C4E37931CA01" , kshiftrd(k1, k2, 1)); - TEST_INSTRUCTION("C4E3F931CA01" , kshiftrq(k1, k2, 1)); - TEST_INSTRUCTION("C4E3F930CA01" , kshiftrw(k1, k2, 1)); - TEST_INSTRUCTION("C5F999CA" , ktestb(k1, k2)); - TEST_INSTRUCTION("C4E1F999CA" , ktestd(k1, k2)); - TEST_INSTRUCTION("C4E1F899CA" , ktestq(k1, k2)); - TEST_INSTRUCTION("C5F899CA" , ktestw(k1, k2)); - TEST_INSTRUCTION("C5ED4BCB" , kunpckbw(k1, k2, k3)); - TEST_INSTRUCTION("C4E1EC4BCB" , kunpckdq(k1, k2, k3)); - TEST_INSTRUCTION("C5EC4BCB" , kunpckwd(k1, k2, k3)); - TEST_INSTRUCTION("C5ED46CB" , kxnorb(k1, k2, k3)); - TEST_INSTRUCTION("C4E1ED46CB" , kxnord(k1, k2, k3)); - TEST_INSTRUCTION("C4E1EC46CB" , kxnorq(k1, k2, k3)); - TEST_INSTRUCTION("C5EC46CB" , kxnorw(k1, k2, k3)); - TEST_INSTRUCTION("C5ED47CB" , kxorb(k1, k2, k3)); - TEST_INSTRUCTION("C4E1ED47CB" , kxord(k1, k2, k3)); - TEST_INSTRUCTION("C4E1EC47CB" , kxorq(k1, k2, k3)); - TEST_INSTRUCTION("C5EC47CB" , kxorw(k1, k2, k3)); TEST_INSTRUCTION("9F" , lahf(ah)); TEST_INSTRUCTION("660F02CA" , lar(cx, dx)); TEST_INSTRUCTION("660F028C1A80000000" , lar(cx, ptr(rdx, rbx, 0, 128))); @@ -1208,6 +1212,8 @@ static void ASMJIT_NOINLINE testX64AssemblerBase(AssemblerTester TEST_INSTRUCTION("669D" , popf()); TEST_INSTRUCTION("9D" , popfq()); TEST_INSTRUCTION("0F0D841180000000" , prefetch(ptr(rcx, rdx, 0, 128))); + TEST_INSTRUCTION("0F18BC1180000000" , prefetchit0(ptr(rcx, rdx, 0, 128))); + TEST_INSTRUCTION("0F18B41180000000" , prefetchit1(ptr(rcx, rdx, 0, 128))); TEST_INSTRUCTION("0F18841180000000" , prefetchnta(ptr(rcx, rdx, 0, 128))); TEST_INSTRUCTION("0F188C1180000000" , prefetcht0(ptr(rcx, rdx, 0, 128))); TEST_INSTRUCTION("0F18941180000000" , prefetcht1(ptr(rcx, rdx, 0, 128))); @@ -3068,32 +3074,18 @@ static void ASMJIT_NOINLINE testX64AssemblerMMX_SSE(AssemblerTester& tester) noexcept { using namespace x86; - TEST_INSTRUCTION("62F25F489A4C1A08" , v4fmaddps(zmm1, zmm4, zmm5, zmm6, zmm7, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("62F25F489A4C1A08" , v4fmaddps(zmm1, zmm4, zmm5, zmm6, zmm7, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("62F25F089B4C1A08" , v4fmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("62F25F089B4C1A08" , v4fmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("62F25F48AA4C1A08" , v4fnmaddps(zmm1, zmm4, zmm5, zmm6, zmm7, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("62F25F48AA4C1A08" , v4fnmaddps(zmm1, zmm4, zmm5, zmm6, zmm7, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("62F25F08AB4C1A08" , v4fnmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("62F25F08AB4C1A08" , v4fnmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("C5E958CB" , vaddpd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C5E9588C2B80000000" , vaddpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E9588C2B80000000" , vaddpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5ED58CB" , vaddpd(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C5ED588C2B80000000" , vaddpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5ED588C2B80000000" , vaddpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F1ED4858CB" , vaddpd(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F1ED48584C2B02" , vaddpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F1ED48584C2B02" , vaddpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E858CB" , vaddps(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C5E8588C2B80000000" , vaddps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E8588C2B80000000" , vaddps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5EC58CB" , vaddps(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C5EC588C2B80000000" , vaddps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5EC588C2B80000000" , vaddps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F16C4858CB" , vaddps(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F16C48584C2B02" , vaddps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F16C48584C2B02" , vaddps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5EB58CB" , vaddsd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C5EB588C2B80000000" , vaddsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5EB588C2B80000000" , vaddsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); @@ -3118,114 +3110,54 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("C4E26DDECB" , vaesdec(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C4E26DDE8C2B80000000" , vaesdec(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E26DDE8C2B80000000" , vaesdec(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D48DECB" , vaesdec(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F26D48DE4C2B02" , vaesdec(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D48DE4C2B02" , vaesdec(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E269DFCB" , vaesdeclast(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C4E269DF8C2B80000000" , vaesdeclast(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E269DF8C2B80000000" , vaesdeclast(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E26DDFCB" , vaesdeclast(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C4E26DDF8C2B80000000" , vaesdeclast(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E26DDF8C2B80000000" , vaesdeclast(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D48DFCB" , vaesdeclast(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F26D48DF4C2B02" , vaesdeclast(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D48DF4C2B02" , vaesdeclast(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E269DCCB" , vaesenc(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C4E269DC8C2B80000000" , vaesenc(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E269DC8C2B80000000" , vaesenc(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E26DDCCB" , vaesenc(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C4E26DDC8C2B80000000" , vaesenc(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E26DDC8C2B80000000" , vaesenc(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D48DCCB" , vaesenc(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F26D48DC4C2B02" , vaesenc(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D48DC4C2B02" , vaesenc(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E269DDCB" , vaesenclast(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C4E269DD8C2B80000000" , vaesenclast(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E269DD8C2B80000000" , vaesenclast(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E26DDDCB" , vaesenclast(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C4E26DDD8C2B80000000" , vaesenclast(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E26DDD8C2B80000000" , vaesenclast(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D48DDCB" , vaesenclast(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F26D48DD4C2B02" , vaesenclast(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D48DD4C2B02" , vaesenclast(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E279DBCA" , vaesimc(xmm1, xmm2)); TEST_INSTRUCTION("C4E279DB8C1A80000000" , vaesimc(xmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("C4E279DB8C1A80000000" , vaesimc(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("C4E379DFCA01" , vaeskeygenassist(xmm1, xmm2, 1)); TEST_INSTRUCTION("C4E379DF8C1A8000000001" , vaeskeygenassist(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("C4E379DF8C1A8000000001" , vaeskeygenassist(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("62F36D0803CB01" , valignd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("62F36D08034C2B0801" , valignd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F36D08034C2B0801" , valignd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F36D2803CB01" , valignd(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("62F36D28034C2B0401" , valignd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F36D28034C2B0401" , valignd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F36D4803CB01" , valignd(zmm1, zmm2, zmm3, 1)); - TEST_INSTRUCTION("62F36D48034C2B0201" , valignd(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F36D48034C2B0201" , valignd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F3ED0803CB01" , valignq(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("62F3ED08034C2B0801" , valignq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F3ED08034C2B0801" , valignq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F3ED2803CB01" , valignq(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("62F3ED28034C2B0401" , valignq(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F3ED28034C2B0401" , valignq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F3ED4803CB01" , valignq(zmm1, zmm2, zmm3, 1)); - TEST_INSTRUCTION("62F3ED48034C2B0201" , valignq(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("62F3ED48034C2B0201" , valignq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("C5E955CB" , vandnpd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C5E9558C2B80000000" , vandnpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E9558C2B80000000" , vandnpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5ED55CB" , vandnpd(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C5ED558C2B80000000" , vandnpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5ED558C2B80000000" , vandnpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F1ED4855CB" , vandnpd(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F1ED48554C2B02" , vandnpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F1ED48554C2B02" , vandnpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E855CB" , vandnps(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C5E8558C2B80000000" , vandnps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E8558C2B80000000" , vandnps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5EC55CB" , vandnps(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C5EC558C2B80000000" , vandnps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5EC558C2B80000000" , vandnps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F16C4855CB" , vandnps(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F16C48554C2B02" , vandnps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F16C48554C2B02" , vandnps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E954CB" , vandpd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C5E9548C2B80000000" , vandpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E9548C2B80000000" , vandpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5ED54CB" , vandpd(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C5ED548C2B80000000" , vandpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5ED548C2B80000000" , vandpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F1ED4854CB" , vandpd(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F1ED48544C2B02" , vandpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F1ED48544C2B02" , vandpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E854CB" , vandps(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("C5E8548C2B80000000" , vandps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5E8548C2B80000000" , vandps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5EC54CB" , vandps(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("C5EC548C2B80000000" , vandps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C5EC548C2B80000000" , vandps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F16C4854CB" , vandps(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F16C48544C2B02" , vandps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F16C48544C2B02" , vandps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F2ED0865CB" , vblendmpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("62F2ED08654C2B08" , vblendmpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F2ED08654C2B08" , vblendmpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F2ED2865CB" , vblendmpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("62F2ED28654C2B04" , vblendmpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F2ED28654C2B04" , vblendmpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F2ED4865CB" , vblendmpd(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F2ED48654C2B02" , vblendmpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F2ED48654C2B02" , vblendmpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D0865CB" , vblendmps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("62F26D08654C2B08" , vblendmps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D08654C2B08" , vblendmps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D2865CB" , vblendmps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("62F26D28654C2B04" , vblendmps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D28654C2B04" , vblendmps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D4865CB" , vblendmps(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F26D48654C2B02" , vblendmps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F26D48654C2B02" , vblendmps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("C4E3690DCB01" , vblendpd(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("C4E3690D8C2B8000000001" , vblendpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("C4E3690D8C2B8000000001" , vblendpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); @@ -3252,6 +3184,2424 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("C4E36D4A8C2B8000000060" , vblendvps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); TEST_INSTRUCTION("C4E27D1A8C1A80000000" , vbroadcastf128(ymm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("C4E27D1A8C1A80000000" , vbroadcastf128(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D5A8C1A80000000" , vbroadcasti128(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D5A8C1A80000000" , vbroadcasti128(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D19CA" , vbroadcastsd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D198C1A80000000" , vbroadcastsd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D198C1A80000000" , vbroadcastsd(ymm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27918CA" , vbroadcastss(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279188C1A80000000" , vbroadcastss(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279188C1A80000000" , vbroadcastss(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D18CA" , vbroadcastss(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D188C1A80000000" , vbroadcastss(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D188C1A80000000" , vbroadcastss(ymm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5E9C2CB01" , vcmppd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5E9C28C2B8000000001" , vcmppd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9C28C2B8000000001" , vcmppd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5EDC2CB01" , vcmppd(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C5EDC28C2B8000000001" , vcmppd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5EDC28C2B8000000001" , vcmppd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E8C2CB01" , vcmpps(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5E8C28C2B8000000001" , vcmpps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E8C28C2B8000000001" , vcmpps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5ECC2CB01" , vcmpps(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C5ECC28C2B8000000001" , vcmpps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5ECC28C2B8000000001" , vcmpps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5EBC2CB01" , vcmpsd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5EBC28C2B8000000001" , vcmpsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5EBC28C2B8000000001" , vcmpsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5EAC2CB01" , vcmpss(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5EAC28C2B8000000001" , vcmpss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5EAC28C2B8000000001" , vcmpss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5F92FCA" , vcomisd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F92F8C1A80000000" , vcomisd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F92F8C1A80000000" , vcomisd(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F82FCA" , vcomiss(xmm1, xmm2)); + TEST_INSTRUCTION("C5F82F8C1A80000000" , vcomiss(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F82F8C1A80000000" , vcomiss(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FAE6CA" , vcvtdq2pd(xmm1, xmm2)); + TEST_INSTRUCTION("C5FAE68C1A80000000" , vcvtdq2pd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FAE68C1A80000000" , vcvtdq2pd(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FEE6CA" , vcvtdq2pd(ymm1, xmm2)); + TEST_INSTRUCTION("C5FEE68C1A80000000" , vcvtdq2pd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FEE68C1A80000000" , vcvtdq2pd(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F85BCA" , vcvtdq2ps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F85B8C1A80000000" , vcvtdq2ps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F85B8C1A80000000" , vcvtdq2ps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC5BCA" , vcvtdq2ps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC5B8C1A80000000" , vcvtdq2ps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC5B8C1A80000000" , vcvtdq2ps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FBE6CA" , vcvtpd2dq(xmm1, xmm2)); + TEST_INSTRUCTION("C5FFE6CA" , vcvtpd2dq(xmm1, ymm2)); + TEST_INSTRUCTION("C5FBE68C1A80000000" , vcvtpd2dq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FFE68C1A80000000" , vcvtpd2dq(xmm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F95ACA" , vcvtpd2ps(xmm1, xmm2)); + TEST_INSTRUCTION("C5FD5ACA" , vcvtpd2ps(xmm1, ymm2)); + TEST_INSTRUCTION("C5F95A8C1A80000000" , vcvtpd2ps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD5A8C1A80000000" , vcvtpd2ps(xmm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27913CA" , vcvtph2ps(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279138C1A80000000" , vcvtph2ps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279138C1A80000000" , vcvtph2ps(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D13CA" , vcvtph2ps(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D138C1A80000000" , vcvtph2ps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D138C1A80000000" , vcvtph2ps(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F95BCA" , vcvtps2dq(xmm1, xmm2)); + TEST_INSTRUCTION("C5F95B8C1A80000000" , vcvtps2dq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F95B8C1A80000000" , vcvtps2dq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD5BCA" , vcvtps2dq(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD5B8C1A80000000" , vcvtps2dq(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD5B8C1A80000000" , vcvtps2dq(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F85ACA" , vcvtps2pd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F85A8C1A80000000" , vcvtps2pd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F85A8C1A80000000" , vcvtps2pd(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC5ACA" , vcvtps2pd(ymm1, xmm2)); + TEST_INSTRUCTION("C5FC5A8C1A80000000" , vcvtps2pd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC5A8C1A80000000" , vcvtps2pd(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E3791DD101" , vcvtps2ph(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E3791D9C118000000001" , vcvtps2ph(ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E3791D9C118000000001" , vcvtps2ph(qword_ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E37D1DD101" , vcvtps2ph(xmm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D1D9C118000000001" , vcvtps2ph(ptr(rcx, rdx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37D1D9C118000000001" , vcvtps2ph(xmmword_ptr(rcx, rdx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C5FB2DCA" , vcvtsd2si(ecx, xmm2)); + TEST_INSTRUCTION("C5FB2D8C1A80000000" , vcvtsd2si(ecx, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FB2D8C1A80000000" , vcvtsd2si(ecx, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1FB2DCA" , vcvtsd2si(rcx, xmm2)); + TEST_INSTRUCTION("C4E1FB2D8C1A80000000" , vcvtsd2si(rcx, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1FB2D8C1A80000000" , vcvtsd2si(rcx, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5EB5ACB" , vcvtsd2ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5A8C2B80000000" , vcvtsd2ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB5A8C2B80000000" , vcvtsd2ss(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB2ACB" , vcvtsi2sd(xmm1, xmm2, ebx)); + TEST_INSTRUCTION("C4E1EB2ACB" , vcvtsi2sd(xmm1, xmm2, rbx)); + TEST_INSTRUCTION("C5EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E1EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA2ACB" , vcvtsi2ss(xmm1, xmm2, ebx)); + TEST_INSTRUCTION("C4E1EA2ACB" , vcvtsi2ss(xmm1, xmm2, rbx)); + TEST_INSTRUCTION("C5EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E1EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5ACB" , vcvtss2sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5A8C2B80000000" , vcvtss2sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5A8C2B80000000" , vcvtss2sd(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5FA2DCA" , vcvtss2si(ecx, xmm2)); + TEST_INSTRUCTION("C5FA2D8C1A80000000" , vcvtss2si(ecx, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA2D8C1A80000000" , vcvtss2si(ecx, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1FA2DCA" , vcvtss2si(rcx, xmm2)); + TEST_INSTRUCTION("C4E1FA2D8C1A80000000" , vcvtss2si(rcx, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1FA2D8C1A80000000" , vcvtss2si(rcx, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F9E6CA" , vcvttpd2dq(xmm1, xmm2)); + TEST_INSTRUCTION("C5FDE6CA" , vcvttpd2dq(xmm1, ymm2)); + TEST_INSTRUCTION("C5F9E68C1A80000000" , vcvttpd2dq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FDE68C1A80000000" , vcvttpd2dq(xmm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA5BCA" , vcvttps2dq(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA5B8C1A80000000" , vcvttps2dq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA5B8C1A80000000" , vcvttps2dq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FE5BCA" , vcvttps2dq(ymm1, ymm2)); + TEST_INSTRUCTION("C5FE5B8C1A80000000" , vcvttps2dq(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FE5B8C1A80000000" , vcvttps2dq(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FB2CCA" , vcvttsd2si(ecx, xmm2)); + TEST_INSTRUCTION("C5FB2C8C1A80000000" , vcvttsd2si(ecx, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FB2C8C1A80000000" , vcvttsd2si(ecx, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1FB2CCA" , vcvttsd2si(rcx, xmm2)); + TEST_INSTRUCTION("C4E1FB2C8C1A80000000" , vcvttsd2si(rcx, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1FB2C8C1A80000000" , vcvttsd2si(rcx, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA2CCA" , vcvttss2si(ecx, xmm2)); + TEST_INSTRUCTION("C5FA2C8C1A80000000" , vcvttss2si(ecx, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA2C8C1A80000000" , vcvttss2si(ecx, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1FA2CCA" , vcvttss2si(rcx, xmm2)); + TEST_INSTRUCTION("C4E1FA2C8C1A80000000" , vcvttss2si(rcx, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1FA2C8C1A80000000" , vcvttss2si(rcx, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5E95ECB" , vdivpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E95E8C2B80000000" , vdivpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E95E8C2B80000000" , vdivpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED5ECB" , vdivpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED5E8C2B80000000" , vdivpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED5E8C2B80000000" , vdivpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E85ECB" , vdivps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E85E8C2B80000000" , vdivps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E85E8C2B80000000" , vdivps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC5ECB" , vdivps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC5E8C2B80000000" , vdivps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC5E8C2B80000000" , vdivps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB5ECB" , vdivsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5E8C2B80000000" , vdivsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB5E8C2B80000000" , vdivsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5ECB" , vdivss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5E8C2B80000000" , vdivss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5E8C2B80000000" , vdivss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E36941CB01" , vdppd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369418C2B8000000001" , vdppd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369418C2B8000000001" , vdppd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36940CB01" , vdpps(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369408C2B8000000001" , vdpps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369408C2B8000000001" , vdpps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D40CB01" , vdpps(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D408C2B8000000001" , vdpps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D408C2B8000000001" , vdpps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D19D101" , vextractf128(xmm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D199C118000000001" , vextractf128(ptr(rcx, rdx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37D199C118000000001" , vextractf128(xmmword_ptr(rcx, rdx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37D39D101" , vextracti128(xmm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D399C118000000001" , vextracti128(ptr(rcx, rdx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37D399C118000000001" , vextracti128(xmmword_ptr(rcx, rdx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37917D101" , vextractps(ecx, xmm2, 1)); + TEST_INSTRUCTION("C4E379179C118000000001" , vextractps(ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E379179C118000000001" , vextractps(dword_ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E2E998CB" , vfmadd132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9988C2B80000000" , vfmadd132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9988C2B80000000" , vfmadd132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED98CB" , vfmadd132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED988C2B80000000" , vfmadd132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED988C2B80000000" , vfmadd132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26998CB" , vfmadd132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269988C2B80000000" , vfmadd132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269988C2B80000000" , vfmadd132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D98CB" , vfmadd132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D988C2B80000000" , vfmadd132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D988C2B80000000" , vfmadd132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E999CB" , vfmadd132sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9998C2B80000000" , vfmadd132sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9998C2B80000000" , vfmadd132sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26999CB" , vfmadd132ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269998C2B80000000" , vfmadd132ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269998C2B80000000" , vfmadd132ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A8CB" , vfmadd213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9A88C2B80000000" , vfmadd213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A88C2B80000000" , vfmadd213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA8CB" , vfmadd213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDA88C2B80000000" , vfmadd213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA88C2B80000000" , vfmadd213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269A8CB" , vfmadd213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269A88C2B80000000" , vfmadd213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269A88C2B80000000" , vfmadd213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DA8CB" , vfmadd213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DA88C2B80000000" , vfmadd213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DA88C2B80000000" , vfmadd213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A9CB" , vfmadd213sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9A98C2B80000000" , vfmadd213sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A98C2B80000000" , vfmadd213sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269A9CB" , vfmadd213ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269A98C2B80000000" , vfmadd213ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269A98C2B80000000" , vfmadd213ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B8CB" , vfmadd231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9B88C2B80000000" , vfmadd231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B88C2B80000000" , vfmadd231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB8CB" , vfmadd231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDB88C2B80000000" , vfmadd231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB88C2B80000000" , vfmadd231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269B8CB" , vfmadd231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269B88C2B80000000" , vfmadd231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269B88C2B80000000" , vfmadd231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DB8CB" , vfmadd231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DB88C2B80000000" , vfmadd231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DB88C2B80000000" , vfmadd231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B9CB" , vfmadd231sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9B98C2B80000000" , vfmadd231sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B98C2B80000000" , vfmadd231sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269B9CB" , vfmadd231ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269B98C2B80000000" , vfmadd231ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269B98C2B80000000" , vfmadd231ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E3E969CC30" , vfmaddpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E9698C358000000030" , vfmaddpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E9698C358000000030" , vfmaddpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E369698C2B8000000060" , vfmaddpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E369698C2B8000000060" , vfmaddpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED69CC30" , vfmaddpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED698C358000000030" , vfmaddpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED698C358000000030" , vfmaddpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D698C2B8000000060" , vfmaddpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D698C2B8000000060" , vfmaddpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E968CC30" , vfmaddps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E9688C358000000030" , vfmaddps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E9688C358000000030" , vfmaddps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E369688C2B8000000060" , vfmaddps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E369688C2B8000000060" , vfmaddps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED68CC30" , vfmaddps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED688C358000000030" , vfmaddps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED688C358000000030" , vfmaddps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D688C2B8000000060" , vfmaddps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D688C2B8000000060" , vfmaddps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E96BCC30" , vfmaddsd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96B8C358000000030" , vfmaddsd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E96B8C358000000030" , vfmaddsd(xmm1, xmm2, xmm3, qword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3696B8C2B8000000060" , vfmaddsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696B8C2B8000000060" , vfmaddsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3E96ACC30" , vfmaddss(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96A8C358000000030" , vfmaddss(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E96A8C358000000030" , vfmaddss(xmm1, xmm2, xmm3, dword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3696A8C2B8000000060" , vfmaddss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696A8C2B8000000060" , vfmaddss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E2E996CB" , vfmaddsub132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9968C2B80000000" , vfmaddsub132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9968C2B80000000" , vfmaddsub132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED96CB" , vfmaddsub132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED968C2B80000000" , vfmaddsub132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED968C2B80000000" , vfmaddsub132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26996CB" , vfmaddsub132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269968C2B80000000" , vfmaddsub132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269968C2B80000000" , vfmaddsub132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D96CB" , vfmaddsub132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D968C2B80000000" , vfmaddsub132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D968C2B80000000" , vfmaddsub132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A6CB" , vfmaddsub213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9A68C2B80000000" , vfmaddsub213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A68C2B80000000" , vfmaddsub213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA6CB" , vfmaddsub213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDA68C2B80000000" , vfmaddsub213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA68C2B80000000" , vfmaddsub213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269A6CB" , vfmaddsub213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269A68C2B80000000" , vfmaddsub213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269A68C2B80000000" , vfmaddsub213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DA6CB" , vfmaddsub213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DA68C2B80000000" , vfmaddsub213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DA68C2B80000000" , vfmaddsub213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B6CB" , vfmaddsub231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9B68C2B80000000" , vfmaddsub231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B68C2B80000000" , vfmaddsub231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB6CB" , vfmaddsub231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDB68C2B80000000" , vfmaddsub231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB68C2B80000000" , vfmaddsub231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269B6CB" , vfmaddsub231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269B68C2B80000000" , vfmaddsub231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269B68C2B80000000" , vfmaddsub231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DB6CB" , vfmaddsub231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DB68C2B80000000" , vfmaddsub231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DB68C2B80000000" , vfmaddsub231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E3E95DCC30" , vfmaddsubpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E95D8C358000000030" , vfmaddsubpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E95D8C358000000030" , vfmaddsubpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3695D8C2B8000000060" , vfmaddsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3695D8C2B8000000060" , vfmaddsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED5DCC30" , vfmaddsubpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED5D8C358000000030" , vfmaddsubpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED5D8C358000000030" , vfmaddsubpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D5D8C2B8000000060" , vfmaddsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D5D8C2B8000000060" , vfmaddsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E95CCC30" , vfmaddsubps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E95C8C358000000030" , vfmaddsubps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E95C8C358000000030" , vfmaddsubps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3695C8C2B8000000060" , vfmaddsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3695C8C2B8000000060" , vfmaddsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED5CCC30" , vfmaddsubps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED5C8C358000000030" , vfmaddsubps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED5C8C358000000030" , vfmaddsubps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D5C8C2B8000000060" , vfmaddsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D5C8C2B8000000060" , vfmaddsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E2E99ACB" , vfmsub132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99A8C2B80000000" , vfmsub132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E99A8C2B80000000" , vfmsub132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9ACB" , vfmsub132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED9A8C2B80000000" , vfmsub132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9A8C2B80000000" , vfmsub132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699ACB" , vfmsub132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699A8C2B80000000" , vfmsub132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699A8C2B80000000" , vfmsub132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D9ACB" , vfmsub132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D9A8C2B80000000" , vfmsub132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D9A8C2B80000000" , vfmsub132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E99BCB" , vfmsub132sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99B8C2B80000000" , vfmsub132sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E99B8C2B80000000" , vfmsub132sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699BCB" , vfmsub132ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699B8C2B80000000" , vfmsub132ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699B8C2B80000000" , vfmsub132ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AACB" , vfmsub213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AA8C2B80000000" , vfmsub213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AA8C2B80000000" , vfmsub213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAACB" , vfmsub213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDAA8C2B80000000" , vfmsub213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAA8C2B80000000" , vfmsub213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269AACB" , vfmsub213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AA8C2B80000000" , vfmsub213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269AA8C2B80000000" , vfmsub213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DAACB" , vfmsub213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DAA8C2B80000000" , vfmsub213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DAA8C2B80000000" , vfmsub213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9ABCB" , vfmsub213sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AB8C2B80000000" , vfmsub213sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AB8C2B80000000" , vfmsub213sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269ABCB" , vfmsub213ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AB8C2B80000000" , vfmsub213ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269AB8C2B80000000" , vfmsub213ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BACB" , vfmsub231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BA8C2B80000000" , vfmsub231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BA8C2B80000000" , vfmsub231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBACB" , vfmsub231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDBA8C2B80000000" , vfmsub231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBA8C2B80000000" , vfmsub231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BACB" , vfmsub231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BA8C2B80000000" , vfmsub231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BA8C2B80000000" , vfmsub231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DBACB" , vfmsub231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DBA8C2B80000000" , vfmsub231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DBA8C2B80000000" , vfmsub231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BBCB" , vfmsub231sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BB8C2B80000000" , vfmsub231sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BB8C2B80000000" , vfmsub231sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BBCB" , vfmsub231ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BB8C2B80000000" , vfmsub231ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BB8C2B80000000" , vfmsub231ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E997CB" , vfmsubadd132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9978C2B80000000" , vfmsubadd132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9978C2B80000000" , vfmsubadd132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED97CB" , vfmsubadd132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED978C2B80000000" , vfmsubadd132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED978C2B80000000" , vfmsubadd132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26997CB" , vfmsubadd132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269978C2B80000000" , vfmsubadd132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269978C2B80000000" , vfmsubadd132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D97CB" , vfmsubadd132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D978C2B80000000" , vfmsubadd132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D978C2B80000000" , vfmsubadd132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A7CB" , vfmsubadd213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9A78C2B80000000" , vfmsubadd213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A78C2B80000000" , vfmsubadd213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA7CB" , vfmsubadd213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDA78C2B80000000" , vfmsubadd213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA78C2B80000000" , vfmsubadd213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269A7CB" , vfmsubadd213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269A78C2B80000000" , vfmsubadd213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269A78C2B80000000" , vfmsubadd213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DA7CB" , vfmsubadd213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DA78C2B80000000" , vfmsubadd213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DA78C2B80000000" , vfmsubadd213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B7CB" , vfmsubadd231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9B78C2B80000000" , vfmsubadd231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B78C2B80000000" , vfmsubadd231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB7CB" , vfmsubadd231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDB78C2B80000000" , vfmsubadd231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB78C2B80000000" , vfmsubadd231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269B7CB" , vfmsubadd231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269B78C2B80000000" , vfmsubadd231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269B78C2B80000000" , vfmsubadd231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DB7CB" , vfmsubadd231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DB78C2B80000000" , vfmsubadd231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DB78C2B80000000" , vfmsubadd231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E3E95FCC30" , vfmsubaddpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E95F8C358000000030" , vfmsubaddpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E95F8C358000000030" , vfmsubaddpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3695F8C2B8000000060" , vfmsubaddpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3695F8C2B8000000060" , vfmsubaddpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED5FCC30" , vfmsubaddpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED5F8C358000000030" , vfmsubaddpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED5F8C358000000030" , vfmsubaddpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D5F8C2B8000000060" , vfmsubaddpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D5F8C2B8000000060" , vfmsubaddpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E95ECC30" , vfmsubaddps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E95E8C358000000030" , vfmsubaddps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E95E8C358000000030" , vfmsubaddps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3695E8C2B8000000060" , vfmsubaddps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3695E8C2B8000000060" , vfmsubaddps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED5ECC30" , vfmsubaddps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED5E8C358000000030" , vfmsubaddps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED5E8C358000000030" , vfmsubaddps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D5E8C2B8000000060" , vfmsubaddps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D5E8C2B8000000060" , vfmsubaddps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E96DCC30" , vfmsubpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96D8C358000000030" , vfmsubpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E96D8C358000000030" , vfmsubpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3696D8C2B8000000060" , vfmsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696D8C2B8000000060" , vfmsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED6DCC30" , vfmsubpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED6D8C358000000030" , vfmsubpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED6D8C358000000030" , vfmsubpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D6D8C2B8000000060" , vfmsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D6D8C2B8000000060" , vfmsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E96CCC30" , vfmsubps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96C8C358000000030" , vfmsubps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E96C8C358000000030" , vfmsubps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3696C8C2B8000000060" , vfmsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696C8C2B8000000060" , vfmsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED6CCC30" , vfmsubps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED6C8C358000000030" , vfmsubps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED6C8C358000000030" , vfmsubps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D6C8C2B8000000060" , vfmsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D6C8C2B8000000060" , vfmsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E96FCC30" , vfmsubsd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96F8C358000000030" , vfmsubsd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E96F8C358000000030" , vfmsubsd(xmm1, xmm2, xmm3, qword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3696F8C2B8000000060" , vfmsubsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696F8C2B8000000060" , vfmsubsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3E96ECC30" , vfmsubss(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96E8C358000000030" , vfmsubss(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E96E8C358000000030" , vfmsubss(xmm1, xmm2, xmm3, dword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3696E8C2B8000000060" , vfmsubss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696E8C2B8000000060" , vfmsubss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E2E99CCB" , vfnmadd132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99C8C2B80000000" , vfnmadd132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E99C8C2B80000000" , vfnmadd132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9CCB" , vfnmadd132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED9C8C2B80000000" , vfnmadd132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9C8C2B80000000" , vfnmadd132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699CCB" , vfnmadd132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699C8C2B80000000" , vfnmadd132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699C8C2B80000000" , vfnmadd132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D9CCB" , vfnmadd132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D9C8C2B80000000" , vfnmadd132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D9C8C2B80000000" , vfnmadd132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E99DCB" , vfnmadd132sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99D8C2B80000000" , vfnmadd132sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E99D8C2B80000000" , vfnmadd132sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699DCB" , vfnmadd132ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699D8C2B80000000" , vfnmadd132ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699D8C2B80000000" , vfnmadd132ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9ACCB" , vfnmadd213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AC8C2B80000000" , vfnmadd213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AC8C2B80000000" , vfnmadd213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDACCB" , vfnmadd213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDAC8C2B80000000" , vfnmadd213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAC8C2B80000000" , vfnmadd213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269ACCB" , vfnmadd213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AC8C2B80000000" , vfnmadd213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269AC8C2B80000000" , vfnmadd213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DACCB" , vfnmadd213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DAC8C2B80000000" , vfnmadd213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DAC8C2B80000000" , vfnmadd213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9ADCB" , vfnmadd213sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AD8C2B80000000" , vfnmadd213sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AD8C2B80000000" , vfnmadd213sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269ADCB" , vfnmadd213ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AD8C2B80000000" , vfnmadd213ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269AD8C2B80000000" , vfnmadd213ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BCCB" , vfnmadd231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BC8C2B80000000" , vfnmadd231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BC8C2B80000000" , vfnmadd231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBCCB" , vfnmadd231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDBC8C2B80000000" , vfnmadd231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBC8C2B80000000" , vfnmadd231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BCCB" , vfnmadd231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BC8C2B80000000" , vfnmadd231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BC8C2B80000000" , vfnmadd231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DBCCB" , vfnmadd231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DBC8C2B80000000" , vfnmadd231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DBC8C2B80000000" , vfnmadd231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BDCB" , vfnmadd231sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BD8C2B80000000" , vfnmadd231sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BD8C2B80000000" , vfnmadd231sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BDCB" , vfnmadd231ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BD8C2B80000000" , vfnmadd231ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BD8C2B80000000" , vfnmadd231ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E3E979CC30" , vfnmaddpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E9798C358000000030" , vfnmaddpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E9798C358000000030" , vfnmaddpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E369798C2B8000000060" , vfnmaddpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E369798C2B8000000060" , vfnmaddpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED79CC30" , vfnmaddpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED798C358000000030" , vfnmaddpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED798C358000000030" , vfnmaddpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D798C2B8000000060" , vfnmaddpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D798C2B8000000060" , vfnmaddpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E978CC30" , vfnmaddps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E9788C358000000030" , vfnmaddps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E9788C358000000030" , vfnmaddps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E369788C2B8000000060" , vfnmaddps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E369788C2B8000000060" , vfnmaddps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED78CC30" , vfnmaddps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED788C358000000030" , vfnmaddps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED788C358000000030" , vfnmaddps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D788C2B8000000060" , vfnmaddps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D788C2B8000000060" , vfnmaddps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E97BCC30" , vfnmaddsd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97B8C358000000030" , vfnmaddsd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E97B8C358000000030" , vfnmaddsd(xmm1, xmm2, xmm3, qword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3697B8C2B8000000060" , vfnmaddsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697B8C2B8000000060" , vfnmaddsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3E97ACC30" , vfnmaddss(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97A8C358000000030" , vfnmaddss(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E97A8C358000000030" , vfnmaddss(xmm1, xmm2, xmm3, dword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3697A8C2B8000000060" , vfnmaddss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697A8C2B8000000060" , vfnmaddss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E2E99ECB" , vfnmsub132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99E8C2B80000000" , vfnmsub132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E99E8C2B80000000" , vfnmsub132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9ECB" , vfnmsub132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED9E8C2B80000000" , vfnmsub132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9E8C2B80000000" , vfnmsub132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699ECB" , vfnmsub132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699E8C2B80000000" , vfnmsub132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699E8C2B80000000" , vfnmsub132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D9ECB" , vfnmsub132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D9E8C2B80000000" , vfnmsub132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D9E8C2B80000000" , vfnmsub132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E99FCB" , vfnmsub132sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99F8C2B80000000" , vfnmsub132sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E99F8C2B80000000" , vfnmsub132sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699FCB" , vfnmsub132ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699F8C2B80000000" , vfnmsub132ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2699F8C2B80000000" , vfnmsub132ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AECB" , vfnmsub213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AE8C2B80000000" , vfnmsub213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AE8C2B80000000" , vfnmsub213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAECB" , vfnmsub213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDAE8C2B80000000" , vfnmsub213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAE8C2B80000000" , vfnmsub213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269AECB" , vfnmsub213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AE8C2B80000000" , vfnmsub213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269AE8C2B80000000" , vfnmsub213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DAECB" , vfnmsub213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DAE8C2B80000000" , vfnmsub213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DAE8C2B80000000" , vfnmsub213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AFCB" , vfnmsub213sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AF8C2B80000000" , vfnmsub213sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AF8C2B80000000" , vfnmsub213sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269AFCB" , vfnmsub213ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AF8C2B80000000" , vfnmsub213ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269AF8C2B80000000" , vfnmsub213ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BECB" , vfnmsub231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BE8C2B80000000" , vfnmsub231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BE8C2B80000000" , vfnmsub231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBECB" , vfnmsub231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDBE8C2B80000000" , vfnmsub231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBE8C2B80000000" , vfnmsub231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BECB" , vfnmsub231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BE8C2B80000000" , vfnmsub231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BE8C2B80000000" , vfnmsub231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DBECB" , vfnmsub231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DBE8C2B80000000" , vfnmsub231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DBE8C2B80000000" , vfnmsub231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BFCB" , vfnmsub231sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BF8C2B80000000" , vfnmsub231sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BF8C2B80000000" , vfnmsub231sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BFCB" , vfnmsub231ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BF8C2B80000000" , vfnmsub231ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269BF8C2B80000000" , vfnmsub231ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E3E97DCC30" , vfnmsubpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97D8C358000000030" , vfnmsubpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E97D8C358000000030" , vfnmsubpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3697D8C2B8000000060" , vfnmsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697D8C2B8000000060" , vfnmsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED7DCC30" , vfnmsubpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED7D8C358000000030" , vfnmsubpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED7D8C358000000030" , vfnmsubpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D7D8C2B8000000060" , vfnmsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D7D8C2B8000000060" , vfnmsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E97CCC30" , vfnmsubps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97C8C358000000030" , vfnmsubps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E97C8C358000000030" , vfnmsubps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3697C8C2B8000000060" , vfnmsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697C8C2B8000000060" , vfnmsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED7CCC30" , vfnmsubps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED7C8C358000000030" , vfnmsubps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3ED7C8C358000000030" , vfnmsubps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E36D7C8C2B8000000060" , vfnmsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D7C8C2B8000000060" , vfnmsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E97FCC30" , vfnmsubsd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97F8C358000000030" , vfnmsubsd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E97F8C358000000030" , vfnmsubsd(xmm1, xmm2, xmm3, qword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3697F8C2B8000000060" , vfnmsubsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697F8C2B8000000060" , vfnmsubsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3E97ECC30" , vfnmsubss(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97E8C358000000030" , vfnmsubss(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3E97E8C358000000030" , vfnmsubss(xmm1, xmm2, xmm3, dword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("C4E3697E8C2B8000000060" , vfnmsubss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697E8C2B8000000060" , vfnmsubss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E2D9928C1A80000000" , vgatherdpd(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2DD928C1A80000000" , vgatherdpd(ymm1, ptr(rdx, xmm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E259928C1A80000000" , vgatherdps(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E25D928C1A80000000" , vgatherdps(ymm1, ptr(rdx, ymm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E2D9938C1A80000000" , vgatherqpd(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2DD938C1A80000000" , vgatherqpd(ymm1, ptr(rdx, ymm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E259938C1A80000000" , vgatherqps(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E25D938C1A80000000" , vgatherqps(xmm1, ptr(rdx, ymm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E3E9CFCB01" , vgf2p8affineinvqb(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3E9CF8C2B8000000001" , vgf2p8affineinvqb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9CF8C2B8000000001" , vgf2p8affineinvqb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3EDCFCB01" , vgf2p8affineinvqb(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E3EDCF8C2B8000000001" , vgf2p8affineinvqb(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3EDCF8C2B8000000001" , vgf2p8affineinvqb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9CECB01" , vgf2p8affineqb(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3E9CE8C2B8000000001" , vgf2p8affineqb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9CE8C2B8000000001" , vgf2p8affineqb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3EDCECB01" , vgf2p8affineqb(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E3EDCE8C2B8000000001" , vgf2p8affineqb(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3EDCE8C2B8000000001" , vgf2p8affineqb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E269CFCB" , vgf2p8mulb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269CF8C2B80000000" , vgf2p8mulb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269CF8C2B80000000" , vgf2p8mulb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DCFCB" , vgf2p8mulb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DCF8C2B80000000" , vgf2p8mulb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DCF8C2B80000000" , vgf2p8mulb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E97CCB" , vhaddpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E97C8C2B80000000" , vhaddpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E97C8C2B80000000" , vhaddpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED7CCB" , vhaddpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED7C8C2B80000000" , vhaddpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED7C8C2B80000000" , vhaddpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB7CCB" , vhaddps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB7C8C2B80000000" , vhaddps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB7C8C2B80000000" , vhaddps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EF7CCB" , vhaddps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EF7C8C2B80000000" , vhaddps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EF7C8C2B80000000" , vhaddps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E97DCB" , vhsubpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E97D8C2B80000000" , vhsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E97D8C2B80000000" , vhsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED7DCB" , vhsubpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED7D8C2B80000000" , vhsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED7D8C2B80000000" , vhsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB7DCB" , vhsubps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB7D8C2B80000000" , vhsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB7D8C2B80000000" , vhsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EF7DCB" , vhsubps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EF7D8C2B80000000" , vhsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EF7D8C2B80000000" , vhsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E36D18CB01" , vinsertf128(ymm1, ymm2, xmm3, 1)); + TEST_INSTRUCTION("C4E36D188C2B8000000001" , vinsertf128(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D188C2B8000000001" , vinsertf128(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D38CB01" , vinserti128(ymm1, ymm2, xmm3, 1)); + TEST_INSTRUCTION("C4E36D388C2B8000000001" , vinserti128(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D388C2B8000000001" , vinserti128(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36921CB01" , vinsertps(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369218C2B8000000001" , vinsertps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369218C2B8000000001" , vinsertps(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5FBF08C1A80000000" , vlddqu(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FBF08C1A80000000" , vlddqu(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FFF08C1A80000000" , vlddqu(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FFF08C1A80000000" , vlddqu(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F8AE941180000000" , vldmxcsr(ptr(rcx, rdx, 0, 128))); + TEST_INSTRUCTION("C5F8AE941180000000" , vldmxcsr(dword_ptr(rcx, rdx, 0, 128))); + TEST_INSTRUCTION("C5F9F7CA" , vmaskmovdqu(xmm1, xmm2, ptr(rdi))); + TEST_INSTRUCTION("C5F9F7CA" , vmaskmovdqu(xmm1, xmm2, xmmword_ptr(rdi))); + TEST_INSTRUCTION("C4E2612FA41180000000" , vmaskmovpd(ptr(rcx, rdx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2612FA41180000000" , vmaskmovpd(xmmword_ptr(rcx, rdx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2652FA41180000000" , vmaskmovpd(ptr(rcx, rdx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2652FA41180000000" , vmaskmovpd(ymmword_ptr(rcx, rdx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2692D8C2B80000000" , vmaskmovpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2692D8C2B80000000" , vmaskmovpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D2D8C2B80000000" , vmaskmovpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D2D8C2B80000000" , vmaskmovpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2612EA41180000000" , vmaskmovps(ptr(rcx, rdx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2612EA41180000000" , vmaskmovps(xmmword_ptr(rcx, rdx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2652EA41180000000" , vmaskmovps(ptr(rcx, rdx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2652EA41180000000" , vmaskmovps(ymmword_ptr(rcx, rdx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2692C8C2B80000000" , vmaskmovps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2692C8C2B80000000" , vmaskmovps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D2C8C2B80000000" , vmaskmovps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D2C8C2B80000000" , vmaskmovps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E95FCB" , vmaxpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E95F8C2B80000000" , vmaxpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E95F8C2B80000000" , vmaxpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED5FCB" , vmaxpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED5F8C2B80000000" , vmaxpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED5F8C2B80000000" , vmaxpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E85FCB" , vmaxps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E85F8C2B80000000" , vmaxps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E85F8C2B80000000" , vmaxps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC5FCB" , vmaxps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC5F8C2B80000000" , vmaxps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC5F8C2B80000000" , vmaxps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB5FCB" , vmaxsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5F8C2B80000000" , vmaxsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB5F8C2B80000000" , vmaxsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5FCB" , vmaxss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5F8C2B80000000" , vmaxss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5F8C2B80000000" , vmaxss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E95DCB" , vminpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E95D8C2B80000000" , vminpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E95D8C2B80000000" , vminpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED5DCB" , vminpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED5D8C2B80000000" , vminpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED5D8C2B80000000" , vminpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E85DCB" , vminps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E85D8C2B80000000" , vminps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E85D8C2B80000000" , vminps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC5DCB" , vminps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC5D8C2B80000000" , vminps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC5D8C2B80000000" , vminps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB5DCB" , vminsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5D8C2B80000000" , vminsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB5D8C2B80000000" , vminsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5DCB" , vminss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5D8C2B80000000" , vminss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5D8C2B80000000" , vminss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F928CA" , vmovapd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F9288C1A80000000" , vmovapd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F9288C1A80000000" , vmovapd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F9299C1180000000" , vmovapd(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9299C1180000000" , vmovapd(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FD28CA" , vmovapd(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD288C1A80000000" , vmovapd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD288C1A80000000" , vmovapd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD299C1180000000" , vmovapd(ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FD299C1180000000" , vmovapd(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5F828CA" , vmovaps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8288C1A80000000" , vmovaps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F8288C1A80000000" , vmovaps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F8299C1180000000" , vmovaps(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F8299C1180000000" , vmovaps(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FC28CA" , vmovaps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC288C1A80000000" , vmovaps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC288C1A80000000" , vmovaps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC299C1180000000" , vmovaps(ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FC299C1180000000" , vmovaps(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5F97ED1" , vmovd(ecx, xmm2)); + TEST_INSTRUCTION("C5F97E9C1180000000" , vmovd(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F97E9C1180000000" , vmovd(dword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F96ECA" , vmovd(xmm1, edx)); + TEST_INSTRUCTION("C5F96E8C1A80000000" , vmovd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F96E8C1A80000000" , vmovd(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FB12CA" , vmovddup(xmm1, xmm2)); + TEST_INSTRUCTION("C5FB128C1A80000000" , vmovddup(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FB128C1A80000000" , vmovddup(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FF12CA" , vmovddup(ymm1, ymm2)); + TEST_INSTRUCTION("C5FF128C1A80000000" , vmovddup(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FF128C1A80000000" , vmovddup(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F96FCA" , vmovdqa(xmm1, xmm2)); + TEST_INSTRUCTION("C5F96F8C1A80000000" , vmovdqa(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F96F8C1A80000000" , vmovdqa(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F97F9C1180000000" , vmovdqa(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F97F9C1180000000" , vmovdqa(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FD6FCA" , vmovdqa(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD6F8C1A80000000" , vmovdqa(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD6F8C1A80000000" , vmovdqa(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD7F9C1180000000" , vmovdqa(ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FD7F9C1180000000" , vmovdqa(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FA6FCA" , vmovdqu(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA6F8C1A80000000" , vmovdqu(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA6F8C1A80000000" , vmovdqu(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA7F9C1180000000" , vmovdqu(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FA7F9C1180000000" , vmovdqu(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FE6FCA" , vmovdqu(ymm1, ymm2)); + TEST_INSTRUCTION("C5FE6F8C1A80000000" , vmovdqu(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FE6F8C1A80000000" , vmovdqu(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FE7F9C1180000000" , vmovdqu(ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FE7F9C1180000000" , vmovdqu(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5E812CB" , vmovhlps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F9179C1180000000" , vmovhpd(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9179C1180000000" , vmovhpd(qword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5E9168C2B80000000" , vmovhpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9168C2B80000000" , vmovhpd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F8179C1180000000" , vmovhps(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F8179C1180000000" , vmovhps(qword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5E8168C2B80000000" , vmovhps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E8168C2B80000000" , vmovhps(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E816CB" , vmovlhps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F9139C1180000000" , vmovlpd(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9139C1180000000" , vmovlpd(qword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5E9128C2B80000000" , vmovlpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9128C2B80000000" , vmovlpd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F8139C1180000000" , vmovlps(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F8139C1180000000" , vmovlps(qword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5E8128C2B80000000" , vmovlps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E8128C2B80000000" , vmovlps(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F950CA" , vmovmskpd(ecx, xmm2)); + TEST_INSTRUCTION("C5FD50CA" , vmovmskpd(ecx, ymm2)); + TEST_INSTRUCTION("C5F850CA" , vmovmskps(ecx, xmm2)); + TEST_INSTRUCTION("C5FC50CA" , vmovmskps(ecx, ymm2)); + TEST_INSTRUCTION("C5F9E79C1180000000" , vmovntdq(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9E79C1180000000" , vmovntdq(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FDE79C1180000000" , vmovntdq(ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FDE79C1180000000" , vmovntdq(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C4E2792A8C1A80000000" , vmovntdqa(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E2792A8C1A80000000" , vmovntdqa(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D2A8C1A80000000" , vmovntdqa(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D2A8C1A80000000" , vmovntdqa(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F92B9C1180000000" , vmovntpd(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F92B9C1180000000" , vmovntpd(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FD2B9C1180000000" , vmovntpd(ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FD2B9C1180000000" , vmovntpd(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C4E1F97ED1" , vmovq(rcx, xmm2)); + TEST_INSTRUCTION("C5F9D69C1180000000" , vmovq(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9D69C1180000000" , vmovq(qword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C4E1F96ECA" , vmovq(xmm1, rdx)); + TEST_INSTRUCTION("C5FA7ECA" , vmovq(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA7E8C1A80000000" , vmovq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA7E8C1A80000000" , vmovq(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FB119C1180000000" , vmovsd(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FB119C1180000000" , vmovsd(qword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FB108C1A80000000" , vmovsd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FB108C1A80000000" , vmovsd(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5EB10CB" , vmovsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5FA16CA" , vmovshdup(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA168C1A80000000" , vmovshdup(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA168C1A80000000" , vmovshdup(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FE16CA" , vmovshdup(ymm1, ymm2)); + TEST_INSTRUCTION("C5FE168C1A80000000" , vmovshdup(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FE168C1A80000000" , vmovshdup(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA12CA" , vmovsldup(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA128C1A80000000" , vmovsldup(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA128C1A80000000" , vmovsldup(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FE12CA" , vmovsldup(ymm1, ymm2)); + TEST_INSTRUCTION("C5FE128C1A80000000" , vmovsldup(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FE128C1A80000000" , vmovsldup(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA119C1180000000" , vmovss(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FA119C1180000000" , vmovss(dword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FA108C1A80000000" , vmovss(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FA108C1A80000000" , vmovss(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5EA10CB" , vmovss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F910CA" , vmovupd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F9108C1A80000000" , vmovupd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F9108C1A80000000" , vmovupd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F9119C1180000000" , vmovupd(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9119C1180000000" , vmovupd(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FD10CA" , vmovupd(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD108C1A80000000" , vmovupd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD108C1A80000000" , vmovupd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD119C1180000000" , vmovupd(ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FD119C1180000000" , vmovupd(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5F810CA" , vmovups(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8108C1A80000000" , vmovups(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F8108C1A80000000" , vmovups(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F8119C1180000000" , vmovups(ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F8119C1180000000" , vmovups(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FC10CA" , vmovups(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC108C1A80000000" , vmovups(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC108C1A80000000" , vmovups(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC119C1180000000" , vmovups(ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FC119C1180000000" , vmovups(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); + TEST_INSTRUCTION("C4E36942CB01" , vmpsadbw(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369428C2B8000000001" , vmpsadbw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369428C2B8000000001" , vmpsadbw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D42CB01" , vmpsadbw(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D428C2B8000000001" , vmpsadbw(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D428C2B8000000001" , vmpsadbw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E959CB" , vmulpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9598C2B80000000" , vmulpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9598C2B80000000" , vmulpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED59CB" , vmulpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED598C2B80000000" , vmulpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED598C2B80000000" , vmulpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E859CB" , vmulps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8598C2B80000000" , vmulps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E8598C2B80000000" , vmulps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC59CB" , vmulps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC598C2B80000000" , vmulps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC598C2B80000000" , vmulps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB59CB" , vmulsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB598C2B80000000" , vmulsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB598C2B80000000" , vmulsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA59CB" , vmulss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA598C2B80000000" , vmulss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA598C2B80000000" , vmulss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E956CB" , vorpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9568C2B80000000" , vorpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9568C2B80000000" , vorpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED56CB" , vorpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED568C2B80000000" , vorpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED568C2B80000000" , vorpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E856CB" , vorps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8568C2B80000000" , vorps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E8568C2B80000000" , vorps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC56CB" , vorps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC568C2B80000000" , vorps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC568C2B80000000" , vorps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2791CCA" , vpabsb(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2791C8C1A80000000" , vpabsb(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E2791C8C1A80000000" , vpabsb(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D1CCA" , vpabsb(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D1C8C1A80000000" , vpabsb(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D1C8C1A80000000" , vpabsb(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E2791ECA" , vpabsd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2791E8C1A80000000" , vpabsd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E2791E8C1A80000000" , vpabsd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D1ECA" , vpabsd(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D1E8C1A80000000" , vpabsd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D1E8C1A80000000" , vpabsd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E2791DCA" , vpabsw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2791D8C1A80000000" , vpabsw(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E2791D8C1A80000000" , vpabsw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D1DCA" , vpabsw(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D1D8C1A80000000" , vpabsw(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D1D8C1A80000000" , vpabsw(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5E96BCB" , vpackssdw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E96B8C2B80000000" , vpackssdw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E96B8C2B80000000" , vpackssdw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED6BCB" , vpackssdw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED6B8C2B80000000" , vpackssdw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED6B8C2B80000000" , vpackssdw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E963CB" , vpacksswb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9638C2B80000000" , vpacksswb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9638C2B80000000" , vpacksswb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED63CB" , vpacksswb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED638C2B80000000" , vpacksswb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED638C2B80000000" , vpacksswb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2692BCB" , vpackusdw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2692B8C2B80000000" , vpackusdw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2692B8C2B80000000" , vpackusdw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D2BCB" , vpackusdw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D2B8C2B80000000" , vpackusdw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D2B8C2B80000000" , vpackusdw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E967CB" , vpackuswb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9678C2B80000000" , vpackuswb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9678C2B80000000" , vpackuswb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED67CB" , vpackuswb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED678C2B80000000" , vpackuswb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED678C2B80000000" , vpackuswb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FCCB" , vpaddb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FC8C2B80000000" , vpaddb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FC8C2B80000000" , vpaddb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFCCB" , vpaddb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFC8C2B80000000" , vpaddb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFC8C2B80000000" , vpaddb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FECB" , vpaddd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FE8C2B80000000" , vpaddd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FE8C2B80000000" , vpaddd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFECB" , vpaddd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFE8C2B80000000" , vpaddd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFE8C2B80000000" , vpaddd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D4CB" , vpaddq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9D48C2B80000000" , vpaddq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D48C2B80000000" , vpaddq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD4CB" , vpaddq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDD48C2B80000000" , vpaddq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD48C2B80000000" , vpaddq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9ECCB" , vpaddsb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EC8C2B80000000" , vpaddsb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EC8C2B80000000" , vpaddsb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDECCB" , vpaddsb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEC8C2B80000000" , vpaddsb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEC8C2B80000000" , vpaddsb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EDCB" , vpaddsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9ED8C2B80000000" , vpaddsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9ED8C2B80000000" , vpaddsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEDCB" , vpaddsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDED8C2B80000000" , vpaddsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDED8C2B80000000" , vpaddsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DCCB" , vpaddusb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DC8C2B80000000" , vpaddusb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DC8C2B80000000" , vpaddusb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDCCB" , vpaddusb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDC8C2B80000000" , vpaddusb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDC8C2B80000000" , vpaddusb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DDCB" , vpaddusw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DD8C2B80000000" , vpaddusw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DD8C2B80000000" , vpaddusw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDDCB" , vpaddusw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDD8C2B80000000" , vpaddusw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDD8C2B80000000" , vpaddusw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FDCB" , vpaddw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FD8C2B80000000" , vpaddw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FD8C2B80000000" , vpaddw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFDCB" , vpaddw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFD8C2B80000000" , vpaddw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFD8C2B80000000" , vpaddw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E3690FCB01" , vpalignr(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690F8C2B8000000001" , vpalignr(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690F8C2B8000000001" , vpalignr(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0FCB01" , vpalignr(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D0F8C2B8000000001" , vpalignr(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0F8C2B8000000001" , vpalignr(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9DBCB" , vpand(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DB8C2B80000000" , vpand(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DB8C2B80000000" , vpand(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDBCB" , vpand(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDB8C2B80000000" , vpand(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDB8C2B80000000" , vpand(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DFCB" , vpandn(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DF8C2B80000000" , vpandn(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DF8C2B80000000" , vpandn(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDFCB" , vpandn(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDF8C2B80000000" , vpandn(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDF8C2B80000000" , vpandn(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E0CB" , vpavgb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E08C2B80000000" , vpavgb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E08C2B80000000" , vpavgb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE0CB" , vpavgb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE08C2B80000000" , vpavgb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE08C2B80000000" , vpavgb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E3CB" , vpavgw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E38C2B80000000" , vpavgw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E38C2B80000000" , vpavgw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE3CB" , vpavgw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE38C2B80000000" , vpavgw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE38C2B80000000" , vpavgw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E36902CB01" , vpblendd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369028C2B8000000001" , vpblendd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369028C2B8000000001" , vpblendd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D02CB01" , vpblendd(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D028C2B8000000001" , vpblendd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D028C2B8000000001" , vpblendd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3694CCB40" , vpblendvb(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3694C8C2B8000000060" , vpblendvb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3694C8C2B8000000060" , vpblendvb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E36D4CCB40" , vpblendvb(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E36D4C8C2B8000000060" , vpblendvb(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D4C8C2B8000000060" , vpblendvb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3690ECB01" , vpblendw(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690E8C2B8000000001" , vpblendw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690E8C2B8000000001" , vpblendw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0ECB01" , vpblendw(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D0E8C2B8000000001" , vpblendw(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0E8C2B8000000001" , vpblendw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E27978CA" , vpbroadcastb(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279788C1A80000000" , vpbroadcastb(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279788C1A80000000" , vpbroadcastb(xmm1, byte_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D78CA" , vpbroadcastb(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D788C1A80000000" , vpbroadcastb(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D788C1A80000000" , vpbroadcastb(ymm1, byte_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27958CA" , vpbroadcastd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279588C1A80000000" , vpbroadcastd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279588C1A80000000" , vpbroadcastd(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D58CA" , vpbroadcastd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D588C1A80000000" , vpbroadcastd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D588C1A80000000" , vpbroadcastd(ymm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27959CA" , vpbroadcastq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279598C1A80000000" , vpbroadcastq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279598C1A80000000" , vpbroadcastq(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D59CA" , vpbroadcastq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D598C1A80000000" , vpbroadcastq(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D598C1A80000000" , vpbroadcastq(ymm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27979CA" , vpbroadcastw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279798C1A80000000" , vpbroadcastw(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279798C1A80000000" , vpbroadcastw(xmm1, word_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D79CA" , vpbroadcastw(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D798C1A80000000" , vpbroadcastw(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D798C1A80000000" , vpbroadcastw(ymm1, word_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E36944CB01" , vpclmulqdq(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369448C2B8000000001" , vpclmulqdq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369448C2B8000000001" , vpclmulqdq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D44CB01" , vpclmulqdq(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D448C2B8000000001" , vpclmulqdq(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D448C2B8000000001" , vpclmulqdq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E974CB" , vpcmpeqb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9748C2B80000000" , vpcmpeqb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9748C2B80000000" , vpcmpeqb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED74CB" , vpcmpeqb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED748C2B80000000" , vpcmpeqb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED748C2B80000000" , vpcmpeqb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E976CB" , vpcmpeqd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9768C2B80000000" , vpcmpeqd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9768C2B80000000" , vpcmpeqd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED76CB" , vpcmpeqd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED768C2B80000000" , vpcmpeqd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED768C2B80000000" , vpcmpeqd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26929CB" , vpcmpeqq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269298C2B80000000" , vpcmpeqq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269298C2B80000000" , vpcmpeqq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D29CB" , vpcmpeqq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D298C2B80000000" , vpcmpeqq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D298C2B80000000" , vpcmpeqq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E975CB" , vpcmpeqw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9758C2B80000000" , vpcmpeqw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9758C2B80000000" , vpcmpeqw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED75CB" , vpcmpeqw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED758C2B80000000" , vpcmpeqw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED758C2B80000000" , vpcmpeqw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E37961CA01" , vpcmpestri(xmm1, xmm2, 1, ecx, eax, edx)); + TEST_INSTRUCTION("C4E379618C1A8000000001" , vpcmpestri(xmm1, ptr(rdx, rbx, 0, 128), 1, ecx, eax, edx)); + TEST_INSTRUCTION("C4E379618C1A8000000001" , vpcmpestri(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1, ecx, eax, edx)); + TEST_INSTRUCTION("C4E37960CA01" , vpcmpestrm(xmm1, xmm2, 1, xmm0, eax, edx)); + TEST_INSTRUCTION("C4E379608C1A8000000001" , vpcmpestrm(xmm1, ptr(rdx, rbx, 0, 128), 1, xmm0, eax, edx)); + TEST_INSTRUCTION("C4E379608C1A8000000001" , vpcmpestrm(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1, xmm0, eax, edx)); + TEST_INSTRUCTION("C5E964CB" , vpcmpgtb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9648C2B80000000" , vpcmpgtb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9648C2B80000000" , vpcmpgtb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED64CB" , vpcmpgtb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED648C2B80000000" , vpcmpgtb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED648C2B80000000" , vpcmpgtb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E966CB" , vpcmpgtd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9668C2B80000000" , vpcmpgtd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9668C2B80000000" , vpcmpgtd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED66CB" , vpcmpgtd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED668C2B80000000" , vpcmpgtd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED668C2B80000000" , vpcmpgtd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26937CB" , vpcmpgtq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269378C2B80000000" , vpcmpgtq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269378C2B80000000" , vpcmpgtq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D37CB" , vpcmpgtq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D378C2B80000000" , vpcmpgtq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D378C2B80000000" , vpcmpgtq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E965CB" , vpcmpgtw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9658C2B80000000" , vpcmpgtw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9658C2B80000000" , vpcmpgtw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED65CB" , vpcmpgtw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED658C2B80000000" , vpcmpgtw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED658C2B80000000" , vpcmpgtw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E37963CA01" , vpcmpistri(xmm1, xmm2, 1, ecx)); + TEST_INSTRUCTION("C4E379638C1A8000000001" , vpcmpistri(xmm1, ptr(rdx, rbx, 0, 128), 1, ecx)); + TEST_INSTRUCTION("C4E379638C1A8000000001" , vpcmpistri(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1, ecx)); + TEST_INSTRUCTION("C4E37962CA01" , vpcmpistrm(xmm1, xmm2, 1, xmm0)); + TEST_INSTRUCTION("C4E379628C1A8000000001" , vpcmpistrm(xmm1, ptr(rdx, rbx, 0, 128), 1, xmm0)); + TEST_INSTRUCTION("C4E379628C1A8000000001" , vpcmpistrm(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1, xmm0)); + TEST_INSTRUCTION("C4E36D06CB01" , vperm2f128(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D068C2B8000000001" , vperm2f128(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D068C2B8000000001" , vperm2f128(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D46CB01" , vperm2i128(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D468C2B8000000001" , vperm2i128(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D468C2B8000000001" , vperm2i128(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E26D36CB" , vpermd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D368C2B80000000" , vpermd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D368C2B80000000" , vpermd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E36949CB41" , vpermil2pd(xmm1, xmm2, xmm3, xmm4, 1)); + TEST_INSTRUCTION("C4E369498C2B8000000061" , vpermil2pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6, 1)); + TEST_INSTRUCTION("C4E369498C2B8000000061" , vpermil2pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6, 1)); + TEST_INSTRUCTION("C4E3E9498C358000000031" , vpermil2pd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9498C358000000031" , vpermil2pd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D49CB41" , vpermil2pd(ymm1, ymm2, ymm3, ymm4, 1)); + TEST_INSTRUCTION("C4E36D498C2B8000000061" , vpermil2pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6, 1)); + TEST_INSTRUCTION("C4E36D498C2B8000000061" , vpermil2pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6, 1)); + TEST_INSTRUCTION("C4E3ED498C358000000031" , vpermil2pd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128), 1)); + TEST_INSTRUCTION("C4E3ED498C358000000031" , vpermil2pd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128), 1)); + TEST_INSTRUCTION("C4E36948CB41" , vpermil2ps(xmm1, xmm2, xmm3, xmm4, 1)); + TEST_INSTRUCTION("C4E369488C2B8000000061" , vpermil2ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6, 1)); + TEST_INSTRUCTION("C4E369488C2B8000000061" , vpermil2ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6, 1)); + TEST_INSTRUCTION("C4E3E9488C358000000031" , vpermil2ps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9488C358000000031" , vpermil2ps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D48CB41" , vpermil2ps(ymm1, ymm2, ymm3, ymm4, 1)); + TEST_INSTRUCTION("C4E36D488C2B8000000061" , vpermil2ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6, 1)); + TEST_INSTRUCTION("C4E36D488C2B8000000061" , vpermil2ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6, 1)); + TEST_INSTRUCTION("C4E3ED488C358000000031" , vpermil2ps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128), 1)); + TEST_INSTRUCTION("C4E3ED488C358000000031" , vpermil2ps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128), 1)); + TEST_INSTRUCTION("C4E2690DCB" , vpermilpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E37905CA01" , vpermilpd(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E2690D8C2B80000000" , vpermilpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2690D8C2B80000000" , vpermilpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E379058C1A8000000001" , vpermilpd(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E379058C1A8000000001" , vpermilpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E26D0DCB" , vpermilpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E37D05CA01" , vpermilpd(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E26D0D8C2B80000000" , vpermilpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D0D8C2B80000000" , vpermilpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E37D058C1A8000000001" , vpermilpd(ymm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D058C1A8000000001" , vpermilpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E2690CCB" , vpermilps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E37904CA01" , vpermilps(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E2690C8C2B80000000" , vpermilps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2690C8C2B80000000" , vpermilps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E379048C1A8000000001" , vpermilps(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E379048C1A8000000001" , vpermilps(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E26D0CCB" , vpermilps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E37D04CA01" , vpermilps(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E26D0C8C2B80000000" , vpermilps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D0C8C2B80000000" , vpermilps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E37D048C1A8000000001" , vpermilps(ymm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D048C1A8000000001" , vpermilps(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E3FD01CA01" , vpermpd(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E3FD018C1A8000000001" , vpermpd(ymm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E3FD018C1A8000000001" , vpermpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E26D16CB" , vpermps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D168C2B80000000" , vpermps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D168C2B80000000" , vpermps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E3FD00CA01" , vpermq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E3FD008C1A8000000001" , vpermq(ymm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E3FD008C1A8000000001" , vpermq(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37914D101" , vpextrb(ecx, xmm2, 1)); + TEST_INSTRUCTION("C4E379149C118000000001" , vpextrb(ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E379149C118000000001" , vpextrb(byte_ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E37916D101" , vpextrd(ecx, xmm2, 1)); + TEST_INSTRUCTION("C4E379169C118000000001" , vpextrd(ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E379169C118000000001" , vpextrd(dword_ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E3F916D101" , vpextrq(rcx, xmm2, 1)); + TEST_INSTRUCTION("C4E3F9169C118000000001" , vpextrq(ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E3F9169C118000000001" , vpextrq(qword_ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C5F9C5CA01" , vpextrw(ecx, xmm2, 1)); + TEST_INSTRUCTION("C4E379159C118000000001" , vpextrw(ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E379159C118000000001" , vpextrw(word_ptr(rcx, rdx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E259908C1A80000000" , vpgatherdd(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E25D908C1A80000000" , vpgatherdd(ymm1, ptr(rdx, ymm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E2D9908C1A80000000" , vpgatherdq(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2DD908C1A80000000" , vpgatherdq(ymm1, ptr(rdx, xmm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E259918C1A80000000" , vpgatherqd(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E25D918C1A80000000" , vpgatherqd(xmm1, ptr(rdx, ymm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2D9918C1A80000000" , vpgatherqq(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2DD918C1A80000000" , vpgatherqq(ymm1, ptr(rdx, ymm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E26902CB" , vphaddd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269028C2B80000000" , vphaddd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269028C2B80000000" , vphaddd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D02CB" , vphaddd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D028C2B80000000" , vphaddd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D028C2B80000000" , vphaddd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26903CB" , vphaddsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269038C2B80000000" , vphaddsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269038C2B80000000" , vphaddsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D03CB" , vphaddsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D038C2B80000000" , vphaddsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D038C2B80000000" , vphaddsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26901CB" , vphaddw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269018C2B80000000" , vphaddw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269018C2B80000000" , vphaddw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D01CB" , vphaddw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D018C2B80000000" , vphaddw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D018C2B80000000" , vphaddw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E27941CA" , vphminposuw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279418C1A80000000" , vphminposuw(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279418C1A80000000" , vphminposuw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E26906CB" , vphsubd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269068C2B80000000" , vphsubd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269068C2B80000000" , vphsubd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D06CB" , vphsubd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D068C2B80000000" , vphsubd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D068C2B80000000" , vphsubd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26907CB" , vphsubsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269078C2B80000000" , vphsubsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269078C2B80000000" , vphsubsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D07CB" , vphsubsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D078C2B80000000" , vphsubsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D078C2B80000000" , vphsubsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26905CB" , vphsubw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269058C2B80000000" , vphsubw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269058C2B80000000" , vphsubw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D05CB" , vphsubw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D058C2B80000000" , vphsubw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D058C2B80000000" , vphsubw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E36920CB01" , vpinsrb(xmm1, xmm2, ebx, 1)); + TEST_INSTRUCTION("C4E369208C2B8000000001" , vpinsrb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369208C2B8000000001" , vpinsrb(xmm1, xmm2, byte_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36922CB01" , vpinsrd(xmm1, xmm2, ebx, 1)); + TEST_INSTRUCTION("C4E369228C2B8000000001" , vpinsrd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369228C2B8000000001" , vpinsrd(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E922CB01" , vpinsrq(xmm1, xmm2, rbx, 1)); + TEST_INSTRUCTION("C4E3E9228C2B8000000001" , vpinsrq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9228C2B8000000001" , vpinsrq(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9C4CB01" , vpinsrw(xmm1, xmm2, ebx, 1)); + TEST_INSTRUCTION("C5E9C48C2B8000000001" , vpinsrw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9C48C2B8000000001" , vpinsrw(xmm1, xmm2, word_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E26904CB" , vpmaddubsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269048C2B80000000" , vpmaddubsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269048C2B80000000" , vpmaddubsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D04CB" , vpmaddubsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D048C2B80000000" , vpmaddubsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D048C2B80000000" , vpmaddubsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F5CB" , vpmaddwd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F58C2B80000000" , vpmaddwd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F58C2B80000000" , vpmaddwd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF5CB" , vpmaddwd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF58C2B80000000" , vpmaddwd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF58C2B80000000" , vpmaddwd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2618EA41180000000" , vpmaskmovd(ptr(rcx, rdx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2618EA41180000000" , vpmaskmovd(xmmword_ptr(rcx, rdx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2658EA41180000000" , vpmaskmovd(ptr(rcx, rdx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2658EA41180000000" , vpmaskmovd(ymmword_ptr(rcx, rdx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2698C8C2B80000000" , vpmaskmovd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2698C8C2B80000000" , vpmaskmovd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D8C8C2B80000000" , vpmaskmovd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D8C8C2B80000000" , vpmaskmovd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E18EA41180000000" , vpmaskmovq(ptr(rcx, rdx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2E18EA41180000000" , vpmaskmovq(xmmword_ptr(rcx, rdx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2E58EA41180000000" , vpmaskmovq(ptr(rcx, rdx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2E58EA41180000000" , vpmaskmovq(ymmword_ptr(rcx, rdx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2E98C8C2B80000000" , vpmaskmovq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E98C8C2B80000000" , vpmaskmovq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED8C8C2B80000000" , vpmaskmovq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED8C8C2B80000000" , vpmaskmovq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693CCB" , vpmaxsb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693C8C2B80000000" , vpmaxsb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693C8C2B80000000" , vpmaxsb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3CCB" , vpmaxsb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3C8C2B80000000" , vpmaxsb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3C8C2B80000000" , vpmaxsb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693DCB" , vpmaxsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693D8C2B80000000" , vpmaxsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693D8C2B80000000" , vpmaxsd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3DCB" , vpmaxsd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3D8C2B80000000" , vpmaxsd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3D8C2B80000000" , vpmaxsd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EECB" , vpmaxsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EE8C2B80000000" , vpmaxsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EE8C2B80000000" , vpmaxsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEECB" , vpmaxsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEE8C2B80000000" , vpmaxsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEE8C2B80000000" , vpmaxsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DECB" , vpmaxub(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DE8C2B80000000" , vpmaxub(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DE8C2B80000000" , vpmaxub(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDECB" , vpmaxub(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDE8C2B80000000" , vpmaxub(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDE8C2B80000000" , vpmaxub(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693FCB" , vpmaxud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693F8C2B80000000" , vpmaxud(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693F8C2B80000000" , vpmaxud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3FCB" , vpmaxud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3F8C2B80000000" , vpmaxud(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3F8C2B80000000" , vpmaxud(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693ECB" , vpmaxuw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693E8C2B80000000" , vpmaxuw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693E8C2B80000000" , vpmaxuw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3ECB" , vpmaxuw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3E8C2B80000000" , vpmaxuw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3E8C2B80000000" , vpmaxuw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26938CB" , vpminsb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269388C2B80000000" , vpminsb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269388C2B80000000" , vpminsb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D38CB" , vpminsb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D388C2B80000000" , vpminsb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D388C2B80000000" , vpminsb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26939CB" , vpminsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269398C2B80000000" , vpminsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269398C2B80000000" , vpminsd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D39CB" , vpminsd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D398C2B80000000" , vpminsd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D398C2B80000000" , vpminsd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EACB" , vpminsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EA8C2B80000000" , vpminsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EA8C2B80000000" , vpminsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEACB" , vpminsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEA8C2B80000000" , vpminsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEA8C2B80000000" , vpminsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DACB" , vpminub(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DA8C2B80000000" , vpminub(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9DA8C2B80000000" , vpminub(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDACB" , vpminub(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDA8C2B80000000" , vpminub(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDDA8C2B80000000" , vpminub(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693BCB" , vpminud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693B8C2B80000000" , vpminud(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693B8C2B80000000" , vpminud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3BCB" , vpminud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3B8C2B80000000" , vpminud(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3B8C2B80000000" , vpminud(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693ACB" , vpminuw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693A8C2B80000000" , vpminuw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2693A8C2B80000000" , vpminuw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3ACB" , vpminuw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3A8C2B80000000" , vpminuw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D3A8C2B80000000" , vpminuw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F9D7CA" , vpmovmskb(ecx, xmm2)); + TEST_INSTRUCTION("C5FDD7CA" , vpmovmskb(ecx, ymm2)); + TEST_INSTRUCTION("C4E27921CA" , vpmovsxbd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279218C1A80000000" , vpmovsxbd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279218C1A80000000" , vpmovsxbd(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D21CA" , vpmovsxbd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D218C1A80000000" , vpmovsxbd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D218C1A80000000" , vpmovsxbd(ymm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27922CA" , vpmovsxbq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279228C1A80000000" , vpmovsxbq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279228C1A80000000" , vpmovsxbq(xmm1, word_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D22CA" , vpmovsxbq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D228C1A80000000" , vpmovsxbq(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D228C1A80000000" , vpmovsxbq(ymm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27920CA" , vpmovsxbw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279208C1A80000000" , vpmovsxbw(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279208C1A80000000" , vpmovsxbw(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D20CA" , vpmovsxbw(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D208C1A80000000" , vpmovsxbw(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D208C1A80000000" , vpmovsxbw(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27925CA" , vpmovsxdq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279258C1A80000000" , vpmovsxdq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279258C1A80000000" , vpmovsxdq(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D25CA" , vpmovsxdq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D258C1A80000000" , vpmovsxdq(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D258C1A80000000" , vpmovsxdq(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27923CA" , vpmovsxwd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279238C1A80000000" , vpmovsxwd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279238C1A80000000" , vpmovsxwd(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D23CA" , vpmovsxwd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D238C1A80000000" , vpmovsxwd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D238C1A80000000" , vpmovsxwd(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27924CA" , vpmovsxwq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279248C1A80000000" , vpmovsxwq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279248C1A80000000" , vpmovsxwq(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D24CA" , vpmovsxwq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D248C1A80000000" , vpmovsxwq(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D248C1A80000000" , vpmovsxwq(ymm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27931CA" , vpmovzxbd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279318C1A80000000" , vpmovzxbd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279318C1A80000000" , vpmovzxbd(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D31CA" , vpmovzxbd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D318C1A80000000" , vpmovzxbd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D318C1A80000000" , vpmovzxbd(ymm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27932CA" , vpmovzxbq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279328C1A80000000" , vpmovzxbq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279328C1A80000000" , vpmovzxbq(xmm1, word_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D32CA" , vpmovzxbq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D328C1A80000000" , vpmovzxbq(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D328C1A80000000" , vpmovzxbq(ymm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27930CA" , vpmovzxbw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279308C1A80000000" , vpmovzxbw(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279308C1A80000000" , vpmovzxbw(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D30CA" , vpmovzxbw(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D308C1A80000000" , vpmovzxbw(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D308C1A80000000" , vpmovzxbw(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27935CA" , vpmovzxdq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279358C1A80000000" , vpmovzxdq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279358C1A80000000" , vpmovzxdq(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D35CA" , vpmovzxdq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D358C1A80000000" , vpmovzxdq(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D358C1A80000000" , vpmovzxdq(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27933CA" , vpmovzxwd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279338C1A80000000" , vpmovzxwd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279338C1A80000000" , vpmovzxwd(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D33CA" , vpmovzxwd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D338C1A80000000" , vpmovzxwd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D338C1A80000000" , vpmovzxwd(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27934CA" , vpmovzxwq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279348C1A80000000" , vpmovzxwq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279348C1A80000000" , vpmovzxwq(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D34CA" , vpmovzxwq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D348C1A80000000" , vpmovzxwq(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D348C1A80000000" , vpmovzxwq(ymm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E26928CB" , vpmuldq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269288C2B80000000" , vpmuldq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269288C2B80000000" , vpmuldq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D28CB" , vpmuldq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D288C2B80000000" , vpmuldq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D288C2B80000000" , vpmuldq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2690BCB" , vpmulhrsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2690B8C2B80000000" , vpmulhrsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2690B8C2B80000000" , vpmulhrsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D0BCB" , vpmulhrsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D0B8C2B80000000" , vpmulhrsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D0B8C2B80000000" , vpmulhrsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E4CB" , vpmulhuw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E48C2B80000000" , vpmulhuw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E48C2B80000000" , vpmulhuw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE4CB" , vpmulhuw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE48C2B80000000" , vpmulhuw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE48C2B80000000" , vpmulhuw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E5CB" , vpmulhw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E58C2B80000000" , vpmulhw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E58C2B80000000" , vpmulhw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE5CB" , vpmulhw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE58C2B80000000" , vpmulhw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE58C2B80000000" , vpmulhw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26940CB" , vpmulld(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269408C2B80000000" , vpmulld(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269408C2B80000000" , vpmulld(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D40CB" , vpmulld(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D408C2B80000000" , vpmulld(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D408C2B80000000" , vpmulld(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D5CB" , vpmullw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9D58C2B80000000" , vpmullw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D58C2B80000000" , vpmullw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD5CB" , vpmullw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDD58C2B80000000" , vpmullw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD58C2B80000000" , vpmullw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F4CB" , vpmuludq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F48C2B80000000" , vpmuludq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F48C2B80000000" , vpmuludq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF4CB" , vpmuludq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF48C2B80000000" , vpmuludq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF48C2B80000000" , vpmuludq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EBCB" , vpor(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EB8C2B80000000" , vpor(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EB8C2B80000000" , vpor(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEBCB" , vpor(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEB8C2B80000000" , vpor(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEB8C2B80000000" , vpor(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F6CB" , vpsadbw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F68C2B80000000" , vpsadbw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F68C2B80000000" , vpsadbw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF6CB" , vpsadbw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF68C2B80000000" , vpsadbw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF68C2B80000000" , vpsadbw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26900CB" , vpshufb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269008C2B80000000" , vpshufb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269008C2B80000000" , vpshufb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D00CB" , vpshufb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D008C2B80000000" , vpshufb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D008C2B80000000" , vpshufb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F970CA01" , vpshufd(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5F9708C1A8000000001" , vpshufd(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5F9708C1A8000000001" , vpshufd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FD70CA01" , vpshufd(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5FD708C1A8000000001" , vpshufd(ymm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FD708C1A8000000001" , vpshufd(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FA70CA01" , vpshufhw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5FA708C1A8000000001" , vpshufhw(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FA708C1A8000000001" , vpshufhw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FE70CA01" , vpshufhw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5FE708C1A8000000001" , vpshufhw(ymm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FE708C1A8000000001" , vpshufhw(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FB70CA01" , vpshuflw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5FB708C1A8000000001" , vpshuflw(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FB708C1A8000000001" , vpshuflw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FF70CA01" , vpshuflw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5FF708C1A8000000001" , vpshuflw(ymm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C5FF708C1A8000000001" , vpshuflw(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E26908CB" , vpsignb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269088C2B80000000" , vpsignb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269088C2B80000000" , vpsignb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D08CB" , vpsignb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D088C2B80000000" , vpsignb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D088C2B80000000" , vpsignb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2690ACB" , vpsignd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2690A8C2B80000000" , vpsignd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2690A8C2B80000000" , vpsignd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D0ACB" , vpsignd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D0A8C2B80000000" , vpsignd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D0A8C2B80000000" , vpsignd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26909CB" , vpsignw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269098C2B80000000" , vpsignw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269098C2B80000000" , vpsignw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D09CB" , vpsignw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D098C2B80000000" , vpsignw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D098C2B80000000" , vpsignw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F2CB" , vpslld(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F172F201" , vpslld(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9F28C2B80000000" , vpslld(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F28C2B80000000" , vpslld(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF2CB" , vpslld(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F572F201" , vpslld(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDF28C2B80000000" , vpslld(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF28C2B80000000" , vpslld(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F173FA01" , vpslldq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5F573FA01" , vpslldq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5E9F3CB" , vpsllq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F173F201" , vpsllq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9F38C2B80000000" , vpsllq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F38C2B80000000" , vpsllq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF3CB" , vpsllq(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F573F201" , vpsllq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDF38C2B80000000" , vpsllq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF38C2B80000000" , vpsllq(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26947CB" , vpsllvd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269478C2B80000000" , vpsllvd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269478C2B80000000" , vpsllvd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D47CB" , vpsllvd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D478C2B80000000" , vpsllvd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D478C2B80000000" , vpsllvd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E947CB" , vpsllvq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9478C2B80000000" , vpsllvq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9478C2B80000000" , vpsllvq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED47CB" , vpsllvq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED478C2B80000000" , vpsllvq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED478C2B80000000" , vpsllvq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F1CB" , vpsllw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F171F201" , vpsllw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9F18C2B80000000" , vpsllw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F18C2B80000000" , vpsllw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF1CB" , vpsllw(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F571F201" , vpsllw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDF18C2B80000000" , vpsllw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF18C2B80000000" , vpsllw(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E2CB" , vpsrad(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F172E201" , vpsrad(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9E28C2B80000000" , vpsrad(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E28C2B80000000" , vpsrad(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE2CB" , vpsrad(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F572E201" , vpsrad(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDE28C2B80000000" , vpsrad(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE28C2B80000000" , vpsrad(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26946CB" , vpsravd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269468C2B80000000" , vpsravd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269468C2B80000000" , vpsravd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D46CB" , vpsravd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D468C2B80000000" , vpsravd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D468C2B80000000" , vpsravd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E1CB" , vpsraw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F171E201" , vpsraw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9E18C2B80000000" , vpsraw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E18C2B80000000" , vpsraw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE1CB" , vpsraw(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F571E201" , vpsraw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDE18C2B80000000" , vpsraw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE18C2B80000000" , vpsraw(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D2CB" , vpsrld(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F172D201" , vpsrld(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9D28C2B80000000" , vpsrld(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D28C2B80000000" , vpsrld(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD2CB" , vpsrld(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F572D201" , vpsrld(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDD28C2B80000000" , vpsrld(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD28C2B80000000" , vpsrld(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F173DA01" , vpsrldq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5F573DA01" , vpsrldq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5E9D3CB" , vpsrlq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F173D201" , vpsrlq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9D38C2B80000000" , vpsrlq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D38C2B80000000" , vpsrlq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD3CB" , vpsrlq(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F573D201" , vpsrlq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDD38C2B80000000" , vpsrlq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD38C2B80000000" , vpsrlq(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26945CB" , vpsrlvd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269458C2B80000000" , vpsrlvd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269458C2B80000000" , vpsrlvd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D45CB" , vpsrlvd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D458C2B80000000" , vpsrlvd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26D458C2B80000000" , vpsrlvd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E945CB" , vpsrlvq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9458C2B80000000" , vpsrlvq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2E9458C2B80000000" , vpsrlvq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED45CB" , vpsrlvq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED458C2B80000000" , vpsrlvq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2ED458C2B80000000" , vpsrlvq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D1CB" , vpsrlw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F171D201" , vpsrlw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9D18C2B80000000" , vpsrlw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D18C2B80000000" , vpsrlw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD1CB" , vpsrlw(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F571D201" , vpsrlw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDD18C2B80000000" , vpsrlw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD18C2B80000000" , vpsrlw(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F8CB" , vpsubb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F88C2B80000000" , vpsubb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F88C2B80000000" , vpsubb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF8CB" , vpsubb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF88C2B80000000" , vpsubb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF88C2B80000000" , vpsubb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FACB" , vpsubd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FA8C2B80000000" , vpsubd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FA8C2B80000000" , vpsubd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFACB" , vpsubd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFA8C2B80000000" , vpsubd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFA8C2B80000000" , vpsubd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FBCB" , vpsubq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FB8C2B80000000" , vpsubq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9FB8C2B80000000" , vpsubq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFBCB" , vpsubq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFB8C2B80000000" , vpsubq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDFB8C2B80000000" , vpsubq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E8CB" , vpsubsb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E88C2B80000000" , vpsubsb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E88C2B80000000" , vpsubsb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE8CB" , vpsubsb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE88C2B80000000" , vpsubsb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE88C2B80000000" , vpsubsb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E9CB" , vpsubsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E98C2B80000000" , vpsubsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9E98C2B80000000" , vpsubsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE9CB" , vpsubsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE98C2B80000000" , vpsubsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDE98C2B80000000" , vpsubsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D8CB" , vpsubusb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9D88C2B80000000" , vpsubusb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D88C2B80000000" , vpsubusb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD8CB" , vpsubusb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDD88C2B80000000" , vpsubusb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD88C2B80000000" , vpsubusb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D9CB" , vpsubusw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9D98C2B80000000" , vpsubusw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9D98C2B80000000" , vpsubusw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD9CB" , vpsubusw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDD98C2B80000000" , vpsubusw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDD98C2B80000000" , vpsubusw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F9CB" , vpsubw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F98C2B80000000" , vpsubw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9F98C2B80000000" , vpsubw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF9CB" , vpsubw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF98C2B80000000" , vpsubw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDF98C2B80000000" , vpsubw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E27917CA" , vptest(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279178C1A80000000" , vptest(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279178C1A80000000" , vptest(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D17CA" , vptest(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D178C1A80000000" , vptest(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D178C1A80000000" , vptest(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5E968CB" , vpunpckhbw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9688C2B80000000" , vpunpckhbw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9688C2B80000000" , vpunpckhbw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED68CB" , vpunpckhbw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED688C2B80000000" , vpunpckhbw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED688C2B80000000" , vpunpckhbw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E96ACB" , vpunpckhdq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E96A8C2B80000000" , vpunpckhdq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E96A8C2B80000000" , vpunpckhdq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED6ACB" , vpunpckhdq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED6A8C2B80000000" , vpunpckhdq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED6A8C2B80000000" , vpunpckhdq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E96DCB" , vpunpckhqdq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E96D8C2B80000000" , vpunpckhqdq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E96D8C2B80000000" , vpunpckhqdq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED6DCB" , vpunpckhqdq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED6D8C2B80000000" , vpunpckhqdq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED6D8C2B80000000" , vpunpckhqdq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E969CB" , vpunpckhwd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9698C2B80000000" , vpunpckhwd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9698C2B80000000" , vpunpckhwd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED69CB" , vpunpckhwd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED698C2B80000000" , vpunpckhwd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED698C2B80000000" , vpunpckhwd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E960CB" , vpunpcklbw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9608C2B80000000" , vpunpcklbw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9608C2B80000000" , vpunpcklbw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED60CB" , vpunpcklbw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED608C2B80000000" , vpunpcklbw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED608C2B80000000" , vpunpcklbw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E962CB" , vpunpckldq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9628C2B80000000" , vpunpckldq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9628C2B80000000" , vpunpckldq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED62CB" , vpunpckldq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED628C2B80000000" , vpunpckldq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED628C2B80000000" , vpunpckldq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E96CCB" , vpunpcklqdq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E96C8C2B80000000" , vpunpcklqdq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E96C8C2B80000000" , vpunpcklqdq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED6CCB" , vpunpcklqdq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED6C8C2B80000000" , vpunpcklqdq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED6C8C2B80000000" , vpunpcklqdq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E961CB" , vpunpcklwd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9618C2B80000000" , vpunpcklwd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9618C2B80000000" , vpunpcklwd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED61CB" , vpunpcklwd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED618C2B80000000" , vpunpcklwd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED618C2B80000000" , vpunpcklwd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EFCB" , vpxor(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EF8C2B80000000" , vpxor(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9EF8C2B80000000" , vpxor(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEFCB" , vpxor(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEF8C2B80000000" , vpxor(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EDEF8C2B80000000" , vpxor(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F853CA" , vrcpps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8538C1A80000000" , vrcpps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F8538C1A80000000" , vrcpps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC53CA" , vrcpps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC538C1A80000000" , vrcpps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC538C1A80000000" , vrcpps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5EA53CB" , vrcpss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA538C2B80000000" , vrcpss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA538C2B80000000" , vrcpss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E37909CA01" , vroundpd(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E379098C1A8000000001" , vroundpd(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E379098C1A8000000001" , vroundpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D09CA01" , vroundpd(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D098C1A8000000001" , vroundpd(ymm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D098C1A8000000001" , vroundpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37908CA01" , vroundps(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E379088C1A8000000001" , vroundps(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E379088C1A8000000001" , vroundps(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D08CA01" , vroundps(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D088C1A8000000001" , vroundps(ymm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D088C1A8000000001" , vroundps(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690BCB01" , vroundsd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690B8C2B8000000001" , vroundsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690B8C2B8000000001" , vroundsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690ACB01" , vroundss(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690A8C2B8000000001" , vroundss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690A8C2B8000000001" , vroundss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5F852CA" , vrsqrtps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8528C1A80000000" , vrsqrtps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F8528C1A80000000" , vrsqrtps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC52CA" , vrsqrtps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC528C1A80000000" , vrsqrtps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC528C1A80000000" , vrsqrtps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5EA52CB" , vrsqrtss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA528C2B80000000" , vrsqrtss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA528C2B80000000" , vrsqrtss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9C6CB01" , vshufpd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5E9C68C2B8000000001" , vshufpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9C68C2B8000000001" , vshufpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5EDC6CB01" , vshufpd(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C5EDC68C2B8000000001" , vshufpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5EDC68C2B8000000001" , vshufpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E8C6CB01" , vshufps(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5E8C68C2B8000000001" , vshufps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5E8C68C2B8000000001" , vshufps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5ECC6CB01" , vshufps(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C5ECC68C2B8000000001" , vshufps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5ECC68C2B8000000001" , vshufps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C5F951CA" , vsqrtpd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F9518C1A80000000" , vsqrtpd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F9518C1A80000000" , vsqrtpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD51CA" , vsqrtpd(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD518C1A80000000" , vsqrtpd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FD518C1A80000000" , vsqrtpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F851CA" , vsqrtps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8518C1A80000000" , vsqrtps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F8518C1A80000000" , vsqrtps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC51CA" , vsqrtps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC518C1A80000000" , vsqrtps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FC518C1A80000000" , vsqrtps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5EB51CB" , vsqrtsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB518C2B80000000" , vsqrtsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB518C2B80000000" , vsqrtsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA51CB" , vsqrtss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA518C2B80000000" , vsqrtss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA518C2B80000000" , vsqrtss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5F8AE9C1180000000" , vstmxcsr(ptr(rcx, rdx, 0, 128))); + TEST_INSTRUCTION("C5F8AE9C1180000000" , vstmxcsr(dword_ptr(rcx, rdx, 0, 128))); + TEST_INSTRUCTION("C5E95CCB" , vsubpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E95C8C2B80000000" , vsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E95C8C2B80000000" , vsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED5CCB" , vsubpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED5C8C2B80000000" , vsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED5C8C2B80000000" , vsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E85CCB" , vsubps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E85C8C2B80000000" , vsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E85C8C2B80000000" , vsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC5CCB" , vsubps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC5C8C2B80000000" , vsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC5C8C2B80000000" , vsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB5CCB" , vsubsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5C8C2B80000000" , vsubsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EB5C8C2B80000000" , vsubsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5CCB" , vsubss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5C8C2B80000000" , vsubss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EA5C8C2B80000000" , vsubss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E2790FCA" , vtestpd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2790F8C1A80000000" , vtestpd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E2790F8C1A80000000" , vtestpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D0FCA" , vtestpd(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D0F8C1A80000000" , vtestpd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D0F8C1A80000000" , vtestpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E2790ECA" , vtestps(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2790E8C1A80000000" , vtestps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E2790E8C1A80000000" , vtestps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D0ECA" , vtestps(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D0E8C1A80000000" , vtestps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27D0E8C1A80000000" , vtestps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F92ECA" , vucomisd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F92E8C1A80000000" , vucomisd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F92E8C1A80000000" , vucomisd(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F82ECA" , vucomiss(xmm1, xmm2)); + TEST_INSTRUCTION("C5F82E8C1A80000000" , vucomiss(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F82E8C1A80000000" , vucomiss(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5E915CB" , vunpckhpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9158C2B80000000" , vunpckhpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9158C2B80000000" , vunpckhpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED15CB" , vunpckhpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED158C2B80000000" , vunpckhpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED158C2B80000000" , vunpckhpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E815CB" , vunpckhps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8158C2B80000000" , vunpckhps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E8158C2B80000000" , vunpckhps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC15CB" , vunpckhps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC158C2B80000000" , vunpckhps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC158C2B80000000" , vunpckhps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E914CB" , vunpcklpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9148C2B80000000" , vunpcklpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9148C2B80000000" , vunpcklpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED14CB" , vunpcklpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED148C2B80000000" , vunpcklpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED148C2B80000000" , vunpcklpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E814CB" , vunpcklps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8148C2B80000000" , vunpcklps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E8148C2B80000000" , vunpcklps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC14CB" , vunpcklps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC148C2B80000000" , vunpcklps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC148C2B80000000" , vunpcklps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E957CB" , vxorpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9578C2B80000000" , vxorpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E9578C2B80000000" , vxorpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED57CB" , vxorpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED578C2B80000000" , vxorpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5ED578C2B80000000" , vxorpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E857CB" , vxorps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8578C2B80000000" , vxorps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5E8578C2B80000000" , vxorps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC57CB" , vxorps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC578C2B80000000" , vxorps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5EC578C2B80000000" , vxorps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C5FC77" , vzeroall()); + TEST_INSTRUCTION("C5F877" , vzeroupper()); +} + +static void ASMJIT_NOINLINE testX64AssemblerAVX_NE_CONVERT(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E27AB18C1A80000000" , vbcstnebf162ps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27AB18C1A80000000" , vbcstnebf162ps(xmm1, word_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27EB18C1A80000000" , vbcstnebf162ps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27EB18C1A80000000" , vbcstnebf162ps(ymm1, word_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279B18C1A80000000" , vbcstnesh2ps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279B18C1A80000000" , vbcstnesh2ps(xmm1, word_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27DB18C1A80000000" , vbcstnesh2ps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27DB18C1A80000000" , vbcstnesh2ps(ymm1, word_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27AB08C1A80000000" , vcvtneebf162ps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27AB08C1A80000000" , vcvtneebf162ps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27EB08C1A80000000" , vcvtneebf162ps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27EB08C1A80000000" , vcvtneebf162ps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279B08C1A80000000" , vcvtneeph2ps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E279B08C1A80000000" , vcvtneeph2ps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27DB08C1A80000000" , vcvtneeph2ps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27DB08C1A80000000" , vcvtneeph2ps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27BB08C1A80000000" , vcvtneobf162ps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27BB08C1A80000000" , vcvtneobf162ps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27FB08C1A80000000" , vcvtneobf162ps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27FB08C1A80000000" , vcvtneobf162ps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E278B08C1A80000000" , vcvtneoph2ps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E278B08C1A80000000" , vcvtneoph2ps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27CB08C1A80000000" , vcvtneoph2ps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27CB08C1A80000000" , vcvtneoph2ps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27A72CA" , vex().vcvtneps2bf16(xmm1, xmm2)); + TEST_INSTRUCTION("C4E27E72CA" , vex().vcvtneps2bf16(xmm1, ymm2)); + TEST_INSTRUCTION("C4E27A728C1A80000000" , vex().vcvtneps2bf16(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E27E728C1A80000000" , vex().vcvtneps2bf16(xmm1, ymmword_ptr(rdx, rbx, 0, 128))); +} + +static void ASMJIT_NOINLINE testX64AssemblerAVX_VNNI(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E25150F4" , vex().vpdpbusd(xmm6, xmm5, xmm4)); + TEST_INSTRUCTION("C4E25550F4" , vex().vpdpbusd(ymm6, ymm5, ymm4)); + TEST_INSTRUCTION("C4E25151F4" , vex().vpdpbusds(xmm6, xmm5, xmm4)); + TEST_INSTRUCTION("C4E25551F4" , vex().vpdpbusds(ymm6, ymm5, ymm4)); + TEST_INSTRUCTION("C4E25152F4" , vex().vpdpwssd(xmm6, xmm5, xmm4)); + TEST_INSTRUCTION("C4E25552F4" , vex().vpdpwssd(ymm6, ymm5, ymm4)); + TEST_INSTRUCTION("C4E25153F4" , vex().vpdpwssds(xmm6, xmm5, xmm4)); + TEST_INSTRUCTION("C4E25553F4" , vex().vpdpwssds(ymm6, ymm5, ymm4)); +} + +static void ASMJIT_NOINLINE testX64AssemblerAVX_VNNI_INT8(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E26B50CB" , vpdpbssd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26B508C2B80000000" , vpdpbssd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26B508C2B80000000" , vpdpbssd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26F50CB" , vpdpbssd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26F508C2B80000000" , vpdpbssd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26F508C2B80000000" , vpdpbssd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26B51CB" , vpdpbssds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26B518C2B80000000" , vpdpbssds(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26B518C2B80000000" , vpdpbssds(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26F51CB" , vpdpbssds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26F518C2B80000000" , vpdpbssds(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26F518C2B80000000" , vpdpbssds(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26A50CB" , vpdpbsud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26A508C2B80000000" , vpdpbsud(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26A508C2B80000000" , vpdpbsud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26E50CB" , vpdpbsud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26E508C2B80000000" , vpdpbsud(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26E508C2B80000000" , vpdpbsud(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26A51CB" , vpdpbsuds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26A518C2B80000000" , vpdpbsuds(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26A518C2B80000000" , vpdpbsuds(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26E51CB" , vpdpbsuds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26E518C2B80000000" , vpdpbsuds(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26E518C2B80000000" , vpdpbsuds(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26850CB" , vpdpbuud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268508C2B80000000" , vpdpbuud(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E268508C2B80000000" , vpdpbuud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26C50CB" , vpdpbuud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26C508C2B80000000" , vpdpbuud(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26C508C2B80000000" , vpdpbuud(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26851CB" , vpdpbuuds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268518C2B80000000" , vpdpbuuds(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E268518C2B80000000" , vpdpbuuds(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26C51CB" , vpdpbuuds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26C518C2B80000000" , vpdpbuuds(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26C518C2B80000000" , vpdpbuuds(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); +} + +static void ASMJIT_NOINLINE testX64AssemblerAVX_VNNI_INT16(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E26AD2CB" , vpdpwsud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26AD28C2B80000000" , vpdpwsud(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26AD28C2B80000000" , vpdpwsud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26ED2CB" , vpdpwsud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26ED28C2B80000000" , vpdpwsud(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26ED28C2B80000000" , vpdpwsud(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26AD3CB" , vpdpwsuds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26AD38C2B80000000" , vpdpwsuds(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26AD38C2B80000000" , vpdpwsuds(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26ED3CB" , vpdpwsuds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26ED38C2B80000000" , vpdpwsuds(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26ED38C2B80000000" , vpdpwsuds(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269D2CB" , vpdpwusd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269D28C2B80000000" , vpdpwusd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269D28C2B80000000" , vpdpwusd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DD2CB" , vpdpwusd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DD28C2B80000000" , vpdpwusd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DD28C2B80000000" , vpdpwusd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269D3CB" , vpdpwusds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269D38C2B80000000" , vpdpwusds(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269D38C2B80000000" , vpdpwusds(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DD3CB" , vpdpwusds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DD38C2B80000000" , vpdpwusds(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26DD38C2B80000000" , vpdpwusds(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E268D2CB" , vpdpwuud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268D28C2B80000000" , vpdpwuud(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E268D28C2B80000000" , vpdpwuud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26CD2CB" , vpdpwuud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26CD28C2B80000000" , vpdpwuud(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26CD28C2B80000000" , vpdpwuud(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E268D3CB" , vpdpwuuds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268D38C2B80000000" , vpdpwuuds(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E268D38C2B80000000" , vpdpwuuds(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26CD3CB" , vpdpwuuds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26CD38C2B80000000" , vpdpwuuds(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26CD38C2B80000000" , vpdpwuuds(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); +} + +static void ASMJIT_NOINLINE testX64AssemblerAVX_SHA512(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E27FCCCA" , vsha512msg1(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27FCDCA" , vsha512msg2(ymm1, ymm2)); + TEST_INSTRUCTION("C4E26FCBCB" , vsha512rnds2(ymm1, ymm2, xmm3)); +} + +static void ASMJIT_NOINLINE testX64AssemblerAVX_SM3(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E268DACB" , vsm3msg1(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268DA8C2B80000000" , vsm3msg1(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E268DA8C2B80000000" , vsm3msg1(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269DACB" , vsm3msg2(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269DA8C2B80000000" , vsm3msg2(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E269DA8C2B80000000" , vsm3msg2(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E369DECB01" , vsm3rnds2(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369DE8C2B8000000001" , vsm3rnds2(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369DE8C2B8000000001" , vsm3rnds2(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); +} + +static void ASMJIT_NOINLINE testX64AssemblerAVX_SM4(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E26ADACB" , vsm4key4(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26ADA8C2B80000000" , vsm4key4(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26ADA8C2B80000000" , vsm4key4(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26EDACB" , vsm4key4(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26EDA8C2B80000000" , vsm4key4(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26EDA8C2B80000000" , vsm4key4(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26BDACB" , vsm4rnds4(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26BDA8C2B80000000" , vsm4rnds4(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26BDA8C2B80000000" , vsm4rnds4(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26FDACB" , vsm4rnds4(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26FDA8C2B80000000" , vsm4rnds4(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("C4E26FDA8C2B80000000" , vsm4rnds4(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); +} + +static void ASMJIT_NOINLINE testX64AssemblerXOP(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("8FE97881CA" , vfrczpd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978818C1A80000000" , vfrczpd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978818C1A80000000" , vfrczpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE97C81CA" , vfrczpd(ymm1, ymm2)); + TEST_INSTRUCTION("8FE97C818C1A80000000" , vfrczpd(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE97C818C1A80000000" , vfrczpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE97880CA" , vfrczps(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978808C1A80000000" , vfrczps(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978808C1A80000000" , vfrczps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE97C80CA" , vfrczps(ymm1, ymm2)); + TEST_INSTRUCTION("8FE97C808C1A80000000" , vfrczps(ymm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE97C808C1A80000000" , vfrczps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE97883CA" , vfrczsd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978838C1A80000000" , vfrczsd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978838C1A80000000" , vfrczsd(xmm1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE97882CA" , vfrczss(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978828C1A80000000" , vfrczss(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978828C1A80000000" , vfrczss(xmm1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE868A2CB40" , vpcmov(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8E8A28C358000000030" , vpcmov(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("8FE8E8A28C358000000030" , vpcmov(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("8FE868A28C2B8000000060" , vpcmov(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A28C2B8000000060" , vpcmov(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86CA2CB40" , vpcmov(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("8FE8ECA28C358000000030" , vpcmov(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("8FE8ECA28C358000000030" , vpcmov(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("8FE86CA28C2B8000000060" , vpcmov(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("8FE86CA28C2B8000000060" , vpcmov(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); + TEST_INSTRUCTION("8FE868CCCB01" , vpcomb(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868CC8C2B8000000001" , vpcomb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CC8C2B8000000001" , vpcomb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CECB01" , vpcomd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868CE8C2B8000000001" , vpcomd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CE8C2B8000000001" , vpcomd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CFCB01" , vpcomq(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868CF8C2B8000000001" , vpcomq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CF8C2B8000000001" , vpcomq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868ECCB01" , vpcomub(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868EC8C2B8000000001" , vpcomub(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EC8C2B8000000001" , vpcomub(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EECB01" , vpcomud(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868EE8C2B8000000001" , vpcomud(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EE8C2B8000000001" , vpcomud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EFCB01" , vpcomuq(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868EF8C2B8000000001" , vpcomuq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EF8C2B8000000001" , vpcomuq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EDCB01" , vpcomuw(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868ED8C2B8000000001" , vpcomuw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868ED8C2B8000000001" , vpcomuw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CDCB01" , vpcomw(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868CD8C2B8000000001" , vpcomw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CD8C2B8000000001" , vpcomw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("8FE978C2CA" , vphaddbd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C28C1A80000000" , vphaddbd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978C28C1A80000000" , vphaddbd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978C3CA" , vphaddbq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C38C1A80000000" , vphaddbq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978C38C1A80000000" , vphaddbq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978C1CA" , vphaddbw(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C18C1A80000000" , vphaddbw(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978C18C1A80000000" , vphaddbw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978CBCA" , vphadddq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978CB8C1A80000000" , vphadddq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978CB8C1A80000000" , vphadddq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D2CA" , vphaddubd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D28C1A80000000" , vphaddubd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D28C1A80000000" , vphaddubd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D3CA" , vphaddubq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D38C1A80000000" , vphaddubq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D38C1A80000000" , vphaddubq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D1CA" , vphaddubw(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D18C1A80000000" , vphaddubw(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D18C1A80000000" , vphaddubw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978DBCA" , vphaddudq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978DB8C1A80000000" , vphaddudq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978DB8C1A80000000" , vphaddudq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D6CA" , vphadduwd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D68C1A80000000" , vphadduwd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D68C1A80000000" , vphadduwd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D7CA" , vphadduwq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D78C1A80000000" , vphadduwq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978D78C1A80000000" , vphadduwq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978C6CA" , vphaddwd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C68C1A80000000" , vphaddwd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978C68C1A80000000" , vphaddwd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978C7CA" , vphaddwq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C78C1A80000000" , vphaddwq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978C78C1A80000000" , vphaddwq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978E1CA" , vphsubbw(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978E18C1A80000000" , vphsubbw(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978E18C1A80000000" , vphsubbw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978E3CA" , vphsubdq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978E38C1A80000000" , vphsubdq(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978E38C1A80000000" , vphsubdq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978E2CA" , vphsubwd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978E28C1A80000000" , vphsubwd(xmm1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE978E28C1A80000000" , vphsubwd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("8FE8689ECB40" , vpmacsdd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8689E8C2B8000000060" , vpmacsdd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8689E8C2B8000000060" , vpmacsdd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8689FCB40" , vpmacsdqh(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8689F8C2B8000000060" , vpmacsdqh(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8689F8C2B8000000060" , vpmacsdqh(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86897CB40" , vpmacsdql(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868978C2B8000000060" , vpmacsdql(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868978C2B8000000060" , vpmacsdql(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8688ECB40" , vpmacssdd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8688E8C2B8000000060" , vpmacssdd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8688E8C2B8000000060" , vpmacssdd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8688FCB40" , vpmacssdqh(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8688F8C2B8000000060" , vpmacssdqh(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8688F8C2B8000000060" , vpmacssdqh(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86887CB40" , vpmacssdql(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868878C2B8000000060" , vpmacssdql(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868878C2B8000000060" , vpmacssdql(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86886CB40" , vpmacsswd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868868C2B8000000060" , vpmacsswd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868868C2B8000000060" , vpmacsswd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86885CB40" , vpmacssww(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868858C2B8000000060" , vpmacssww(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868858C2B8000000060" , vpmacssww(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86896CB40" , vpmacswd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868968C2B8000000060" , vpmacswd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868968C2B8000000060" , vpmacswd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86895CB40" , vpmacsww(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868958C2B8000000060" , vpmacsww(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868958C2B8000000060" , vpmacsww(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A6CB40" , vpmadcsswd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868A68C2B8000000060" , vpmadcsswd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A68C2B8000000060" , vpmadcsswd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868B6CB40" , vpmadcswd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868B68C2B8000000060" , vpmadcswd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868B68C2B8000000060" , vpmadcswd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A3CB40" , vpperm(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8E8A38C358000000030" , vpperm(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("8FE8E8A38C358000000030" , vpperm(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); + TEST_INSTRUCTION("8FE868A38C2B8000000060" , vpperm(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A38C2B8000000060" , vpperm(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE96090CA" , vprotb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE878C0CA01" , vprotb(xmm1, xmm2, 1)); + TEST_INSTRUCTION("8FE9E8908C2B80000000" , vprotb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8908C2B80000000" , vprotb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958908C1A80000000" , vprotb(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C08C1A8000000001" , vprotb(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("8FE958908C1A80000000" , vprotb(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C08C1A8000000001" , vprotb(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("8FE96092CA" , vprotd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE878C2CA01" , vprotd(xmm1, xmm2, 1)); + TEST_INSTRUCTION("8FE9E8928C2B80000000" , vprotd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8928C2B80000000" , vprotd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958928C1A80000000" , vprotd(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C28C1A8000000001" , vprotd(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("8FE958928C1A80000000" , vprotd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C28C1A8000000001" , vprotd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("8FE96093CA" , vprotq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE878C3CA01" , vprotq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("8FE9E8938C2B80000000" , vprotq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8938C2B80000000" , vprotq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958938C1A80000000" , vprotq(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C38C1A8000000001" , vprotq(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("8FE958938C1A80000000" , vprotq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C38C1A8000000001" , vprotq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("8FE96091CA" , vprotw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE878C1CA01" , vprotw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("8FE9E8918C2B80000000" , vprotw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8918C2B80000000" , vprotw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958918C1A80000000" , vprotw(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C18C1A8000000001" , vprotw(xmm1, ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("8FE958918C1A80000000" , vprotw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C18C1A8000000001" , vprotw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); + TEST_INSTRUCTION("8FE96098CA" , vpshab(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8988C2B80000000" , vpshab(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8988C2B80000000" , vpshab(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958988C1A80000000" , vpshab(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958988C1A80000000" , vpshab(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE9609ACA" , vpshad(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E89A8C2B80000000" , vpshad(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E89A8C2B80000000" , vpshad(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9589A8C1A80000000" , vpshad(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE9589A8C1A80000000" , vpshad(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE9609BCA" , vpshaq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E89B8C2B80000000" , vpshaq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E89B8C2B80000000" , vpshaq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9589B8C1A80000000" , vpshaq(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE9589B8C1A80000000" , vpshaq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96099CA" , vpshaw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8998C2B80000000" , vpshaw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8998C2B80000000" , vpshaw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958998C1A80000000" , vpshaw(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958998C1A80000000" , vpshaw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96094CA" , vpshlb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8948C2B80000000" , vpshlb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8948C2B80000000" , vpshlb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958948C1A80000000" , vpshlb(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958948C1A80000000" , vpshlb(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96096CA" , vpshld(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8968C2B80000000" , vpshld(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8968C2B80000000" , vpshld(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958968C1A80000000" , vpshld(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958968C1A80000000" , vpshld(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96097CA" , vpshlq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8978C2B80000000" , vpshlq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8978C2B80000000" , vpshlq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958978C1A80000000" , vpshlq(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958978C1A80000000" , vpshlq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96095CA" , vpshlw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8958C2B80000000" , vpshlw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE9E8958C2B80000000" , vpshlw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("8FE958958C1A80000000" , vpshlw(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958958C1A80000000" , vpshlw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); +} + +static void ASMJIT_NOINLINE testX64AssemblerAVX512(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C5ED4ACB" , kaddb(k1, k2, k3)); + TEST_INSTRUCTION("C4E1ED4ACB" , kaddd(k1, k2, k3)); + TEST_INSTRUCTION("C4E1EC4ACB" , kaddq(k1, k2, k3)); + TEST_INSTRUCTION("C5EC4ACB" , kaddw(k1, k2, k3)); + TEST_INSTRUCTION("C5ED41CB" , kandb(k1, k2, k3)); + TEST_INSTRUCTION("C4E1ED41CB" , kandd(k1, k2, k3)); + TEST_INSTRUCTION("C5ED42CB" , kandnb(k1, k2, k3)); + TEST_INSTRUCTION("C4E1ED42CB" , kandnd(k1, k2, k3)); + TEST_INSTRUCTION("C4E1EC42CB" , kandnq(k1, k2, k3)); + TEST_INSTRUCTION("C5EC42CB" , kandnw(k1, k2, k3)); + TEST_INSTRUCTION("C4E1EC41CB" , kandq(k1, k2, k3)); + TEST_INSTRUCTION("C5EC41CB" , kandw(k1, k2, k3)); + TEST_INSTRUCTION("C5F992CA" , kmovb(k1, edx)); + TEST_INSTRUCTION("C5F990CA" , kmovb(k1, k2)); + TEST_INSTRUCTION("C5F9908C1A80000000" , kmovb(k1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F9908C1A80000000" , kmovb(k1, byte_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F993CA" , kmovb(ecx, k2)); + TEST_INSTRUCTION("C5F9919C1180000000" , kmovb(ptr(rcx, rdx, 0, 128), k3)); + TEST_INSTRUCTION("C5F9919C1180000000" , kmovb(byte_ptr(rcx, rdx, 0, 128), k3)); + TEST_INSTRUCTION("C5FB92CA" , kmovd(k1, edx)); + TEST_INSTRUCTION("C4E1F990CA" , kmovd(k1, k2)); + TEST_INSTRUCTION("C4E1F9908C1A80000000" , kmovd(k1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1F9908C1A80000000" , kmovd(k1, dword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5FB93CA" , kmovd(ecx, k2)); + TEST_INSTRUCTION("C4E1F9919C1180000000" , kmovd(ptr(rcx, rdx, 0, 128), k3)); + TEST_INSTRUCTION("C4E1F9919C1180000000" , kmovd(dword_ptr(rcx, rdx, 0, 128), k3)); + TEST_INSTRUCTION("C4E1FB92CA" , kmovq(k1, rdx)); + TEST_INSTRUCTION("C4E1F890CA" , kmovq(k1, k2)); + TEST_INSTRUCTION("C4E1F8908C1A80000000" , kmovq(k1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1F8908C1A80000000" , kmovq(k1, qword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C4E1FB93CA" , kmovq(rcx, k2)); + TEST_INSTRUCTION("C4E1F8919C1180000000" , kmovq(ptr(rcx, rdx, 0, 128), k3)); + TEST_INSTRUCTION("C4E1F8919C1180000000" , kmovq(qword_ptr(rcx, rdx, 0, 128), k3)); + TEST_INSTRUCTION("C5F892CA" , kmovw(k1, edx)); + TEST_INSTRUCTION("C5F890CA" , kmovw(k1, k2)); + TEST_INSTRUCTION("C5F8908C1A80000000" , kmovw(k1, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F8908C1A80000000" , kmovw(k1, word_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("C5F893CA" , kmovw(ecx, k2)); + TEST_INSTRUCTION("C5F8919C1180000000" , kmovw(ptr(rcx, rdx, 0, 128), k3)); + TEST_INSTRUCTION("C5F8919C1180000000" , kmovw(word_ptr(rcx, rdx, 0, 128), k3)); + TEST_INSTRUCTION("C5F944CA" , knotb(k1, k2)); + TEST_INSTRUCTION("C4E1F944CA" , knotd(k1, k2)); + TEST_INSTRUCTION("C4E1F844CA" , knotq(k1, k2)); + TEST_INSTRUCTION("C5F844CA" , knotw(k1, k2)); + TEST_INSTRUCTION("C5ED45CB" , korb(k1, k2, k3)); + TEST_INSTRUCTION("C4E1ED45CB" , kord(k1, k2, k3)); + TEST_INSTRUCTION("C4E1EC45CB" , korq(k1, k2, k3)); + TEST_INSTRUCTION("C5F998CA" , kortestb(k1, k2)); + TEST_INSTRUCTION("C4E1F998CA" , kortestd(k1, k2)); + TEST_INSTRUCTION("C4E1F898CA" , kortestq(k1, k2)); + TEST_INSTRUCTION("C5F898CA" , kortestw(k1, k2)); + TEST_INSTRUCTION("C5EC45CB" , korw(k1, k2, k3)); + TEST_INSTRUCTION("C4E37932CA01" , kshiftlb(k1, k2, 1)); + TEST_INSTRUCTION("C4E37933CA01" , kshiftld(k1, k2, 1)); + TEST_INSTRUCTION("C4E3F933CA01" , kshiftlq(k1, k2, 1)); + TEST_INSTRUCTION("C4E3F932CA01" , kshiftlw(k1, k2, 1)); + TEST_INSTRUCTION("C4E37930CA01" , kshiftrb(k1, k2, 1)); + TEST_INSTRUCTION("C4E37931CA01" , kshiftrd(k1, k2, 1)); + TEST_INSTRUCTION("C4E3F931CA01" , kshiftrq(k1, k2, 1)); + TEST_INSTRUCTION("C4E3F930CA01" , kshiftrw(k1, k2, 1)); + TEST_INSTRUCTION("C5F999CA" , ktestb(k1, k2)); + TEST_INSTRUCTION("C4E1F999CA" , ktestd(k1, k2)); + TEST_INSTRUCTION("C4E1F899CA" , ktestq(k1, k2)); + TEST_INSTRUCTION("C5F899CA" , ktestw(k1, k2)); + TEST_INSTRUCTION("C5ED4BCB" , kunpckbw(k1, k2, k3)); + TEST_INSTRUCTION("C4E1EC4BCB" , kunpckdq(k1, k2, k3)); + TEST_INSTRUCTION("C5EC4BCB" , kunpckwd(k1, k2, k3)); + TEST_INSTRUCTION("C5ED46CB" , kxnorb(k1, k2, k3)); + TEST_INSTRUCTION("C4E1ED46CB" , kxnord(k1, k2, k3)); + TEST_INSTRUCTION("C4E1EC46CB" , kxnorq(k1, k2, k3)); + TEST_INSTRUCTION("C5EC46CB" , kxnorw(k1, k2, k3)); + TEST_INSTRUCTION("C5ED47CB" , kxorb(k1, k2, k3)); + TEST_INSTRUCTION("C4E1ED47CB" , kxord(k1, k2, k3)); + TEST_INSTRUCTION("C4E1EC47CB" , kxorq(k1, k2, k3)); + TEST_INSTRUCTION("C5EC47CB" , kxorw(k1, k2, k3)); + TEST_INSTRUCTION("62F25F489A4C1A08" , v4fmaddps(zmm1, zmm4, zmm5, zmm6, zmm7, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("62F25F489A4C1A08" , v4fmaddps(zmm1, zmm4, zmm5, zmm6, zmm7, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("62F25F089B4C1A08" , v4fmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("62F25F089B4C1A08" , v4fmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("62F25F48AA4C1A08" , v4fnmaddps(zmm1, zmm4, zmm5, zmm6, zmm7, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("62F25F48AA4C1A08" , v4fnmaddps(zmm1, zmm4, zmm5, zmm6, zmm7, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("62F25F08AB4C1A08" , v4fnmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("62F25F08AB4C1A08" , v4fnmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, xmmword_ptr(rdx, rbx, 0, 128))); + TEST_INSTRUCTION("62F1ED4858CB" , vaddpd(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F1ED48584C2B02" , vaddpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F1ED48584C2B02" , vaddpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F16C4858CB" , vaddps(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F16C48584C2B02" , vaddps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F16C48584C2B02" , vaddps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D48DECB" , vaesdec(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F26D48DE4C2B02" , vaesdec(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D48DE4C2B02" , vaesdec(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D48DFCB" , vaesdeclast(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F26D48DF4C2B02" , vaesdeclast(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D48DF4C2B02" , vaesdeclast(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D48DCCB" , vaesenc(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F26D48DC4C2B02" , vaesenc(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D48DC4C2B02" , vaesenc(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D48DDCB" , vaesenclast(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F26D48DD4C2B02" , vaesenclast(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D48DD4C2B02" , vaesenclast(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F36D0803CB01" , valignd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("62F36D08034C2B0801" , valignd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F36D08034C2B0801" , valignd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F36D2803CB01" , valignd(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("62F36D28034C2B0401" , valignd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F36D28034C2B0401" , valignd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F36D4803CB01" , valignd(zmm1, zmm2, zmm3, 1)); + TEST_INSTRUCTION("62F36D48034C2B0201" , valignd(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F36D48034C2B0201" , valignd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F3ED0803CB01" , valignq(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("62F3ED08034C2B0801" , valignq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F3ED08034C2B0801" , valignq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F3ED2803CB01" , valignq(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("62F3ED28034C2B0401" , valignq(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F3ED28034C2B0401" , valignq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F3ED4803CB01" , valignq(zmm1, zmm2, zmm3, 1)); + TEST_INSTRUCTION("62F3ED48034C2B0201" , valignq(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F3ED48034C2B0201" , valignq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F1ED4855CB" , vandnpd(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F1ED48554C2B02" , vandnpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F1ED48554C2B02" , vandnpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F16C4855CB" , vandnps(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F16C48554C2B02" , vandnps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F16C48554C2B02" , vandnps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F1ED4854CB" , vandpd(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F1ED48544C2B02" , vandpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F1ED48544C2B02" , vandpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F16C4854CB" , vandps(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F16C48544C2B02" , vandps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F16C48544C2B02" , vandps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F2ED0865CB" , vblendmpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("62F2ED08654C2B08" , vblendmpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F2ED08654C2B08" , vblendmpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F2ED2865CB" , vblendmpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("62F2ED28654C2B04" , vblendmpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F2ED28654C2B04" , vblendmpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F2ED4865CB" , vblendmpd(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F2ED48654C2B02" , vblendmpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F2ED48654C2B02" , vblendmpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D0865CB" , vblendmps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("62F26D08654C2B08" , vblendmps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D08654C2B08" , vblendmps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D2865CB" , vblendmps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("62F26D28654C2B04" , vblendmps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D28654C2B04" , vblendmps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D4865CB" , vblendmps(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F26D48654C2B02" , vblendmps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F26D48654C2B02" , vblendmps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F27D2819CA" , vbroadcastf32x2(ymm1, xmm2)); TEST_INSTRUCTION("62F27D28194C1A10" , vbroadcastf32x2(ymm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D28194C1A10" , vbroadcastf32x2(ymm1, qword_ptr(rdx, rbx, 0, 128))); @@ -3270,8 +5620,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD481A4C1A08" , vbroadcastf64x2(zmm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD481B4C1A04" , vbroadcastf64x4(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD481B4C1A04" , vbroadcastf64x4(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D5A8C1A80000000" , vbroadcasti128(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D5A8C1A80000000" , vbroadcasti128(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D0859CA" , vbroadcasti32x2(xmm1, xmm2)); TEST_INSTRUCTION("62F27D08594C1A10" , vbroadcasti32x2(xmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D08594C1A10" , vbroadcasti32x2(xmm1, qword_ptr(rdx, rbx, 0, 128))); @@ -3293,69 +5641,36 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD485A4C1A08" , vbroadcasti64x2(zmm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD485B4C1A04" , vbroadcasti64x4(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD485B4C1A04" , vbroadcasti64x4(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D19CA" , vbroadcastsd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D198C1A80000000" , vbroadcastsd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D198C1A80000000" , vbroadcastsd(ymm1, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD4819CA" , vbroadcastsd(zmm1, xmm2)); TEST_INSTRUCTION("62F2FD48194C1A10" , vbroadcastsd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD48194C1A10" , vbroadcastsd(zmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27918CA" , vbroadcastss(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279188C1A80000000" , vbroadcastss(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279188C1A80000000" , vbroadcastss(xmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D18CA" , vbroadcastss(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D188C1A80000000" , vbroadcastss(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D188C1A80000000" , vbroadcastss(ymm1, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4818CA" , vbroadcastss(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48184C1A20" , vbroadcastss(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48184C1A20" , vbroadcastss(zmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5E9C2CB01" , vcmppd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5E9C28C2B8000000001" , vcmppd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C28C2B8000000001" , vcmppd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED08C2CB01" , vcmppd(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F1ED08C24C2B0801" , vcmppd(k1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED08C24C2B0801" , vcmppd(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5EDC2CB01" , vcmppd(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C5EDC28C2B8000000001" , vcmppd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5EDC28C2B8000000001" , vcmppd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED28C2CB01" , vcmppd(k1, ymm2, ymm3, 1)); TEST_INSTRUCTION("62F1ED28C24C2B0401" , vcmppd(k1, ymm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED28C24C2B0401" , vcmppd(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED48C2CB01" , vcmppd(k1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F1ED48C24C2B0201" , vcmppd(k1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED48C24C2B0201" , vcmppd(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E8C2CB01" , vcmpps(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5E8C28C2B8000000001" , vcmpps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E8C28C2B8000000001" , vcmpps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16C08C2CB01" , vcmpps(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F16C08C24C2B0801" , vcmpps(k1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16C08C24C2B0801" , vcmpps(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5ECC2CB01" , vcmpps(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C5ECC28C2B8000000001" , vcmpps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5ECC28C2B8000000001" , vcmpps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16C28C2CB01" , vcmpps(k1, ymm2, ymm3, 1)); TEST_INSTRUCTION("62F16C28C24C2B0401" , vcmpps(k1, ymm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16C28C24C2B0401" , vcmpps(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16C48C2CB01" , vcmpps(k1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F16C48C24C2B0201" , vcmpps(k1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16C48C24C2B0201" , vcmpps(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5EBC2CB01" , vcmpsd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5EBC28C2B8000000001" , vcmpsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5EBC28C2B8000000001" , vcmpsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1EF08C2CB01" , vcmpsd(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F1EF08C24C2B1001" , vcmpsd(k1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1EF08C24C2B1001" , vcmpsd(k1, xmm2, qword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5EAC2CB01" , vcmpss(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5EAC28C2B8000000001" , vcmpss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5EAC28C2B8000000001" , vcmpss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16E08C2CB01" , vcmpss(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F16E08C24C2B2001" , vcmpss(k1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16E08C24C2B2001" , vcmpss(k1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5F92FCA" , vcomisd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F92F8C1A80000000" , vcomisd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F92F8C1A80000000" , vcomisd(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F82FCA" , vcomiss(xmm1, xmm2)); - TEST_INSTRUCTION("C5F82F8C1A80000000" , vcomiss(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F82F8C1A80000000" , vcomiss(xmm1, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD088AD1" , vcompresspd(xmm1, xmm2)); TEST_INSTRUCTION("62F2FD088A5C1110" , vcompresspd(ptr(rcx, rdx, 0, 128), xmm3)); TEST_INSTRUCTION("62F2FD088A5C1110" , vcompresspd(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); @@ -3374,21 +5689,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27D488AD1" , vcompressps(zmm1, zmm2)); TEST_INSTRUCTION("62F27D488A5C1120" , vcompressps(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F27D488A5C1120" , vcompressps(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5FAE6CA" , vcvtdq2pd(xmm1, xmm2)); - TEST_INSTRUCTION("C5FAE68C1A80000000" , vcvtdq2pd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FAE68C1A80000000" , vcvtdq2pd(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FEE6CA" , vcvtdq2pd(ymm1, xmm2)); - TEST_INSTRUCTION("C5FEE68C1A80000000" , vcvtdq2pd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FEE68C1A80000000" , vcvtdq2pd(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E48E6CA" , vcvtdq2pd(zmm1, ymm2)); TEST_INSTRUCTION("62F17E48E64C1A04" , vcvtdq2pd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E48E64C1A04" , vcvtdq2pd(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F85BCA" , vcvtdq2ps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F85B8C1A80000000" , vcvtdq2ps(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F85B8C1A80000000" , vcvtdq2ps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC5BCA" , vcvtdq2ps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC5B8C1A80000000" , vcvtdq2ps(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC5B8C1A80000000" , vcvtdq2ps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C485BCA" , vcvtdq2ps(zmm1, zmm2)); TEST_INSTRUCTION("62F17C485B4C1A02" , vcvtdq2ps(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C485B4C1A02" , vcvtdq2ps(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); @@ -3408,17 +5711,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27E4872CA" , vcvtneps2bf16(ymm1, zmm2)); TEST_INSTRUCTION("62F27E48724C1A02" , vcvtneps2bf16(ymm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27E48724C1A02" , vcvtneps2bf16(ymm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FBE6CA" , vcvtpd2dq(xmm1, xmm2)); - TEST_INSTRUCTION("C5FFE6CA" , vcvtpd2dq(xmm1, ymm2)); - TEST_INSTRUCTION("C5FBE68C1A80000000" , vcvtpd2dq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FFE68C1A80000000" , vcvtpd2dq(xmm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FF48E6CA" , vcvtpd2dq(ymm1, zmm2)); TEST_INSTRUCTION("62F1FF48E64C1A02" , vcvtpd2dq(ymm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FF48E64C1A02" , vcvtpd2dq(ymm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F95ACA" , vcvtpd2ps(xmm1, xmm2)); - TEST_INSTRUCTION("C5FD5ACA" , vcvtpd2ps(xmm1, ymm2)); - TEST_INSTRUCTION("C5F95A8C1A80000000" , vcvtpd2ps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD5A8C1A80000000" , vcvtpd2ps(xmm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD485ACA" , vcvtpd2ps(ymm1, zmm2)); TEST_INSTRUCTION("62F1FD485A4C1A02" , vcvtpd2ps(ymm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD485A4C1A02" , vcvtpd2ps(ymm1, zmmword_ptr(rdx, rbx, 0, 128))); @@ -3447,39 +5742,15 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1FD4879CA" , vcvtpd2uqq(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48794C1A02" , vcvtpd2uqq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD48794C1A02" , vcvtpd2uqq(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27913CA" , vcvtph2ps(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279138C1A80000000" , vcvtph2ps(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279138C1A80000000" , vcvtph2ps(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D13CA" , vcvtph2ps(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D138C1A80000000" , vcvtph2ps(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D138C1A80000000" , vcvtph2ps(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4813CA" , vcvtph2ps(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48134C1A04" , vcvtph2ps(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48134C1A04" , vcvtph2ps(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F95BCA" , vcvtps2dq(xmm1, xmm2)); - TEST_INSTRUCTION("C5F95B8C1A80000000" , vcvtps2dq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F95B8C1A80000000" , vcvtps2dq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD5BCA" , vcvtps2dq(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD5B8C1A80000000" , vcvtps2dq(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD5B8C1A80000000" , vcvtps2dq(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17D485BCA" , vcvtps2dq(zmm1, zmm2)); TEST_INSTRUCTION("62F17D485B4C1A02" , vcvtps2dq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17D485B4C1A02" , vcvtps2dq(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F85ACA" , vcvtps2pd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F85A8C1A80000000" , vcvtps2pd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F85A8C1A80000000" , vcvtps2pd(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC5ACA" , vcvtps2pd(ymm1, xmm2)); - TEST_INSTRUCTION("C5FC5A8C1A80000000" , vcvtps2pd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC5A8C1A80000000" , vcvtps2pd(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C485ACA" , vcvtps2pd(zmm1, ymm2)); TEST_INSTRUCTION("62F17C485A4C1A04" , vcvtps2pd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C485A4C1A04" , vcvtps2pd(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E3791DD101" , vcvtps2ph(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E3791D9C118000000001" , vcvtps2ph(ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E3791D9C118000000001" , vcvtps2ph(qword_ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E37D1DD101" , vcvtps2ph(xmm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D1D9C118000000001" , vcvtps2ph(ptr(rcx, rdx, 0, 128), ymm3, 1)); - TEST_INSTRUCTION("C4E37D1D9C118000000001" , vcvtps2ph(xmmword_ptr(rcx, rdx, 0, 128), ymm3, 1)); TEST_INSTRUCTION("62F37D481DD101" , vcvtps2ph(ymm1, zmm2, 1)); TEST_INSTRUCTION("62F37D481D5C110401" , vcvtps2ph(ptr(rcx, rdx, 0, 128), zmm3, 1)); TEST_INSTRUCTION("62F37D481D5C110401" , vcvtps2ph(ymmword_ptr(rcx, rdx, 0, 128), zmm3, 1)); @@ -3526,50 +5797,18 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1FC485BCA" , vcvtqq2ps(ymm1, zmm2)); TEST_INSTRUCTION("62F1FC485B4C1A02" , vcvtqq2ps(ymm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FC485B4C1A02" , vcvtqq2ps(ymm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FB2DCA" , vcvtsd2si(ecx, xmm2)); - TEST_INSTRUCTION("C5FB2D8C1A80000000" , vcvtsd2si(ecx, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FB2D8C1A80000000" , vcvtsd2si(ecx, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1FB2DCA" , vcvtsd2si(rcx, xmm2)); - TEST_INSTRUCTION("C4E1FB2D8C1A80000000" , vcvtsd2si(rcx, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1FB2D8C1A80000000" , vcvtsd2si(rcx, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5EB5ACB" , vcvtsd2ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5A8C2B80000000" , vcvtsd2ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB5A8C2B80000000" , vcvtsd2ss(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F17F0879CA" , vcvtsd2usi(ecx, xmm2)); TEST_INSTRUCTION("62F17F08794C1A10" , vcvtsd2usi(ecx, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17F08794C1A10" , vcvtsd2usi(ecx, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FF0879CA" , vcvtsd2usi(rcx, xmm2)); TEST_INSTRUCTION("62F1FF08794C1A10" , vcvtsd2usi(rcx, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FF08794C1A10" , vcvtsd2usi(rcx, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5EB2ACB" , vcvtsi2sd(xmm1, xmm2, ebx)); - TEST_INSTRUCTION("C4E1EB2ACB" , vcvtsi2sd(xmm1, xmm2, rbx)); - TEST_INSTRUCTION("C5EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E1EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA2ACB" , vcvtsi2ss(xmm1, xmm2, ebx)); - TEST_INSTRUCTION("C4E1EA2ACB" , vcvtsi2ss(xmm1, xmm2, rbx)); - TEST_INSTRUCTION("C5EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E1EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5ACB" , vcvtss2sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5A8C2B80000000" , vcvtss2sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5A8C2B80000000" , vcvtss2sd(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5FA2DCA" , vcvtss2si(ecx, xmm2)); - TEST_INSTRUCTION("C5FA2D8C1A80000000" , vcvtss2si(ecx, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA2D8C1A80000000" , vcvtss2si(ecx, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1FA2DCA" , vcvtss2si(rcx, xmm2)); - TEST_INSTRUCTION("C4E1FA2D8C1A80000000" , vcvtss2si(rcx, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1FA2D8C1A80000000" , vcvtss2si(rcx, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E0879CA" , vcvtss2usi(ecx, xmm2)); TEST_INSTRUCTION("62F17E08794C1A20" , vcvtss2usi(ecx, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E08794C1A20" , vcvtss2usi(ecx, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FE0879CA" , vcvtss2usi(rcx, xmm2)); TEST_INSTRUCTION("62F1FE08794C1A20" , vcvtss2usi(rcx, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FE08794C1A20" , vcvtss2usi(rcx, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F9E6CA" , vcvttpd2dq(xmm1, xmm2)); - TEST_INSTRUCTION("C5FDE6CA" , vcvttpd2dq(xmm1, ymm2)); - TEST_INSTRUCTION("C5F9E68C1A80000000" , vcvttpd2dq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FDE68C1A80000000" , vcvttpd2dq(xmm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD48E6CA" , vcvttpd2dq(ymm1, zmm2)); TEST_INSTRUCTION("62F1FD48E64C1A02" , vcvttpd2dq(ymm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD48E64C1A02" , vcvttpd2dq(ymm1, zmmword_ptr(rdx, rbx, 0, 128))); @@ -3598,12 +5837,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1FD4878CA" , vcvttpd2uqq(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48784C1A02" , vcvttpd2uqq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD48784C1A02" , vcvttpd2uqq(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA5BCA" , vcvttps2dq(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA5B8C1A80000000" , vcvttps2dq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA5B8C1A80000000" , vcvttps2dq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FE5BCA" , vcvttps2dq(ymm1, ymm2)); - TEST_INSTRUCTION("C5FE5B8C1A80000000" , vcvttps2dq(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FE5B8C1A80000000" , vcvttps2dq(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E485BCA" , vcvttps2dq(zmm1, zmm2)); TEST_INSTRUCTION("62F17E485B4C1A02" , vcvttps2dq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E485B4C1A02" , vcvttps2dq(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); @@ -3634,24 +5867,12 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F17D4878CA" , vcvttps2uqq(zmm1, ymm2)); TEST_INSTRUCTION("62F17D48784C1A04" , vcvttps2uqq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17D48784C1A04" , vcvttps2uqq(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FB2CCA" , vcvttsd2si(ecx, xmm2)); - TEST_INSTRUCTION("C5FB2C8C1A80000000" , vcvttsd2si(ecx, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FB2C8C1A80000000" , vcvttsd2si(ecx, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1FB2CCA" , vcvttsd2si(rcx, xmm2)); - TEST_INSTRUCTION("C4E1FB2C8C1A80000000" , vcvttsd2si(rcx, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1FB2C8C1A80000000" , vcvttsd2si(rcx, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17F0878CA" , vcvttsd2usi(ecx, xmm2)); TEST_INSTRUCTION("62F17F08784C1A10" , vcvttsd2usi(ecx, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17F08784C1A10" , vcvttsd2usi(ecx, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FF0878CA" , vcvttsd2usi(rcx, xmm2)); TEST_INSTRUCTION("62F1FF08784C1A10" , vcvttsd2usi(rcx, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FF08784C1A10" , vcvttsd2usi(rcx, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA2CCA" , vcvttss2si(ecx, xmm2)); - TEST_INSTRUCTION("C5FA2C8C1A80000000" , vcvttss2si(ecx, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA2C8C1A80000000" , vcvttss2si(ecx, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1FA2CCA" , vcvttss2si(rcx, xmm2)); - TEST_INSTRUCTION("C4E1FA2C8C1A80000000" , vcvttss2si(rcx, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E1FA2C8C1A80000000" , vcvttss2si(rcx, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E0878CA" , vcvttss2usi(ecx, xmm2)); TEST_INSTRUCTION("62F17E08784C1A20" , vcvttss2usi(ecx, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E08784C1A20" , vcvttss2usi(ecx, dword_ptr(rdx, rbx, 0, 128))); @@ -3711,30 +5932,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D4842CB01" , vdbpsadbw(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F36D48424C2B0201" , vdbpsadbw(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D48424C2B0201" , vdbpsadbw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E95ECB" , vdivpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E95E8C2B80000000" , vdivpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E95E8C2B80000000" , vdivpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED5ECB" , vdivpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED5E8C2B80000000" , vdivpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED5E8C2B80000000" , vdivpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F1ED485ECB" , vdivpd(zmm1, zmm2, zmm3)); - TEST_INSTRUCTION("62F1ED485E4C2B02" , vdivpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("62F1ED485E4C2B02" , vdivpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E85ECB" , vdivps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E85E8C2B80000000" , vdivps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E85E8C2B80000000" , vdivps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC5ECB" , vdivps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC5E8C2B80000000" , vdivps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC5E8C2B80000000" , vdivps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C485ECB" , vdivps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C485E4C2B02" , vdivps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C485E4C2B02" , vdivps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB5ECB" , vdivsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5E8C2B80000000" , vdivsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB5E8C2B80000000" , vdivsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5ECB" , vdivss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5E8C2B80000000" , vdivss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5E8C2B80000000" , vdivss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26E0852CB" , vdpbf16ps(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26E08524C2B08" , vdpbf16ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26E08524C2B08" , vdpbf16ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -3744,15 +5944,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26E4852CB" , vdpbf16ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26E48524C2B02" , vdpbf16ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26E48524C2B02" , vdpbf16ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E36941CB01" , vdppd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369418C2B8000000001" , vdppd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369418C2B8000000001" , vdppd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36940CB01" , vdpps(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369408C2B8000000001" , vdpps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369408C2B8000000001" , vdpps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D40CB01" , vdpps(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D408C2B8000000001" , vdpps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D408C2B8000000001" , vdpps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); + TEST_INSTRUCTION("62F1ED485ECB" , vdivpd(zmm1, zmm2, zmm3)); + TEST_INSTRUCTION("62F1ED485E4C2B02" , vdivpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); + TEST_INSTRUCTION("62F1ED485E4C2B02" , vdivpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2FD48C8CA" , vexp2pd(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48C84C1A02" , vexp2pd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD48C84C1A02" , vexp2pd(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); @@ -3777,9 +5971,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27D4888CA" , vexpandps(zmm1, zmm2)); TEST_INSTRUCTION("62F27D48884C1A20" , vexpandps(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48884C1A20" , vexpandps(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E37D19D101" , vextractf128(xmm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D199C118000000001" , vextractf128(ptr(rcx, rdx, 0, 128), ymm3, 1)); - TEST_INSTRUCTION("C4E37D199C118000000001" , vextractf128(xmmword_ptr(rcx, rdx, 0, 128), ymm3, 1)); TEST_INSTRUCTION("62F37D2819D101" , vextractf32x4(xmm1, ymm2, 1)); TEST_INSTRUCTION("62F37D4819D101" , vextractf32x4(xmm1, zmm2, 1)); TEST_INSTRUCTION("62F37D28195C110801" , vextractf32x4(ptr(rcx, rdx, 0, 128), ymm3, 1)); @@ -3798,9 +5989,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3FD481BD101" , vextractf64x4(ymm1, zmm2, 1)); TEST_INSTRUCTION("62F3FD481B5C110401" , vextractf64x4(ptr(rcx, rdx, 0, 128), zmm3, 1)); TEST_INSTRUCTION("62F3FD481B5C110401" , vextractf64x4(ymmword_ptr(rcx, rdx, 0, 128), zmm3, 1)); - TEST_INSTRUCTION("C4E37D39D101" , vextracti128(xmm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D399C118000000001" , vextracti128(ptr(rcx, rdx, 0, 128), ymm3, 1)); - TEST_INSTRUCTION("C4E37D399C118000000001" , vextracti128(xmmword_ptr(rcx, rdx, 0, 128), ymm3, 1)); TEST_INSTRUCTION("62F37D2839D101" , vextracti32x4(xmm1, ymm2, 1)); TEST_INSTRUCTION("62F37D4839D101" , vextracti32x4(xmm1, zmm2, 1)); TEST_INSTRUCTION("62F37D28395C110801" , vextracti32x4(ptr(rcx, rdx, 0, 128), ymm3, 1)); @@ -3819,9 +6007,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3FD483BD101" , vextracti64x4(ymm1, zmm2, 1)); TEST_INSTRUCTION("62F3FD483B5C110401" , vextracti64x4(ptr(rcx, rdx, 0, 128), zmm3, 1)); TEST_INSTRUCTION("62F3FD483B5C110401" , vextracti64x4(ymmword_ptr(rcx, rdx, 0, 128), zmm3, 1)); - TEST_INSTRUCTION("C4E37917D101" , vextractps(ecx, xmm2, 1)); - TEST_INSTRUCTION("C4E379179C118000000001" , vextractps(ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E379179C118000000001" , vextractps(dword_ptr(rcx, rdx, 0, 128), xmm3, 1)); TEST_INSTRUCTION("62F3ED0854CB01" , vfixupimmpd(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F3ED08544C2B0801" , vfixupimmpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED08544C2B0801" , vfixupimmpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); @@ -3846,562 +6031,114 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D0855CB01" , vfixupimmss(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08554C2B2001" , vfixupimmss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08554C2B2001" , vfixupimmss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E2E998CB" , vfmadd132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9988C2B80000000" , vfmadd132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9988C2B80000000" , vfmadd132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED98CB" , vfmadd132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED988C2B80000000" , vfmadd132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED988C2B80000000" , vfmadd132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED4898CB" , vfmadd132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48984C2B02" , vfmadd132pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48984C2B02" , vfmadd132pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26998CB" , vfmadd132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269988C2B80000000" , vfmadd132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269988C2B80000000" , vfmadd132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D98CB" , vfmadd132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D988C2B80000000" , vfmadd132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D988C2B80000000" , vfmadd132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4898CB" , vfmadd132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48984C2B02" , vfmadd132ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48984C2B02" , vfmadd132ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E999CB" , vfmadd132sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9998C2B80000000" , vfmadd132sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9998C2B80000000" , vfmadd132sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26999CB" , vfmadd132ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269998C2B80000000" , vfmadd132ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269998C2B80000000" , vfmadd132ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A8CB" , vfmadd213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9A88C2B80000000" , vfmadd213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A88C2B80000000" , vfmadd213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA8CB" , vfmadd213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDA88C2B80000000" , vfmadd213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA88C2B80000000" , vfmadd213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48A8CB" , vfmadd213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48A84C2B02" , vfmadd213pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48A84C2B02" , vfmadd213pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269A8CB" , vfmadd213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269A88C2B80000000" , vfmadd213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269A88C2B80000000" , vfmadd213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DA8CB" , vfmadd213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DA88C2B80000000" , vfmadd213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DA88C2B80000000" , vfmadd213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48A8CB" , vfmadd213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48A84C2B02" , vfmadd213ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48A84C2B02" , vfmadd213ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A9CB" , vfmadd213sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9A98C2B80000000" , vfmadd213sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A98C2B80000000" , vfmadd213sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269A9CB" , vfmadd213ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269A98C2B80000000" , vfmadd213ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269A98C2B80000000" , vfmadd213ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B8CB" , vfmadd231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9B88C2B80000000" , vfmadd231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B88C2B80000000" , vfmadd231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB8CB" , vfmadd231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDB88C2B80000000" , vfmadd231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB88C2B80000000" , vfmadd231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48B8CB" , vfmadd231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48B84C2B02" , vfmadd231pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48B84C2B02" , vfmadd231pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269B8CB" , vfmadd231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269B88C2B80000000" , vfmadd231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269B88C2B80000000" , vfmadd231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DB8CB" , vfmadd231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DB88C2B80000000" , vfmadd231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DB88C2B80000000" , vfmadd231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48B8CB" , vfmadd231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48B84C2B02" , vfmadd231ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48B84C2B02" , vfmadd231ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B9CB" , vfmadd231sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9B98C2B80000000" , vfmadd231sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B98C2B80000000" , vfmadd231sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269B9CB" , vfmadd231ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269B98C2B80000000" , vfmadd231ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269B98C2B80000000" , vfmadd231ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E3E969CC30" , vfmaddpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E9698C358000000030" , vfmaddpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E9698C358000000030" , vfmaddpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E369698C2B8000000060" , vfmaddpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E369698C2B8000000060" , vfmaddpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED69CC30" , vfmaddpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED698C358000000030" , vfmaddpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED698C358000000030" , vfmaddpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D698C2B8000000060" , vfmaddpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D698C2B8000000060" , vfmaddpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E968CC30" , vfmaddps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E9688C358000000030" , vfmaddps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E9688C358000000030" , vfmaddps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E369688C2B8000000060" , vfmaddps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E369688C2B8000000060" , vfmaddps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED68CC30" , vfmaddps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED688C358000000030" , vfmaddps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED688C358000000030" , vfmaddps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D688C2B8000000060" , vfmaddps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D688C2B8000000060" , vfmaddps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E96BCC30" , vfmaddsd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96B8C358000000030" , vfmaddsd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E96B8C358000000030" , vfmaddsd(xmm1, xmm2, xmm3, qword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3696B8C2B8000000060" , vfmaddsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696B8C2B8000000060" , vfmaddsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3E96ACC30" , vfmaddss(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96A8C358000000030" , vfmaddss(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E96A8C358000000030" , vfmaddss(xmm1, xmm2, xmm3, dword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3696A8C2B8000000060" , vfmaddss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696A8C2B8000000060" , vfmaddss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E2E996CB" , vfmaddsub132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9968C2B80000000" , vfmaddsub132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9968C2B80000000" , vfmaddsub132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED96CB" , vfmaddsub132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED968C2B80000000" , vfmaddsub132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED968C2B80000000" , vfmaddsub132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED4896CB" , vfmaddsub132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48964C2B02" , vfmaddsub132pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48964C2B02" , vfmaddsub132pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26996CB" , vfmaddsub132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269968C2B80000000" , vfmaddsub132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269968C2B80000000" , vfmaddsub132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D96CB" , vfmaddsub132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D968C2B80000000" , vfmaddsub132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D968C2B80000000" , vfmaddsub132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4896CB" , vfmaddsub132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48964C2B02" , vfmaddsub132ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48964C2B02" , vfmaddsub132ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A6CB" , vfmaddsub213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9A68C2B80000000" , vfmaddsub213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A68C2B80000000" , vfmaddsub213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA6CB" , vfmaddsub213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDA68C2B80000000" , vfmaddsub213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA68C2B80000000" , vfmaddsub213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48A6CB" , vfmaddsub213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48A64C2B02" , vfmaddsub213pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48A64C2B02" , vfmaddsub213pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269A6CB" , vfmaddsub213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269A68C2B80000000" , vfmaddsub213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269A68C2B80000000" , vfmaddsub213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DA6CB" , vfmaddsub213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DA68C2B80000000" , vfmaddsub213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DA68C2B80000000" , vfmaddsub213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48A6CB" , vfmaddsub213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48A64C2B02" , vfmaddsub213ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48A64C2B02" , vfmaddsub213ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B6CB" , vfmaddsub231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9B68C2B80000000" , vfmaddsub231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B68C2B80000000" , vfmaddsub231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB6CB" , vfmaddsub231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDB68C2B80000000" , vfmaddsub231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB68C2B80000000" , vfmaddsub231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48B6CB" , vfmaddsub231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48B64C2B02" , vfmaddsub231pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48B64C2B02" , vfmaddsub231pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269B6CB" , vfmaddsub231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269B68C2B80000000" , vfmaddsub231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269B68C2B80000000" , vfmaddsub231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DB6CB" , vfmaddsub231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DB68C2B80000000" , vfmaddsub231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DB68C2B80000000" , vfmaddsub231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48B6CB" , vfmaddsub231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48B64C2B02" , vfmaddsub231ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48B64C2B02" , vfmaddsub231ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E3E95DCC30" , vfmaddsubpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E95D8C358000000030" , vfmaddsubpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E95D8C358000000030" , vfmaddsubpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3695D8C2B8000000060" , vfmaddsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3695D8C2B8000000060" , vfmaddsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED5DCC30" , vfmaddsubpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED5D8C358000000030" , vfmaddsubpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED5D8C358000000030" , vfmaddsubpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D5D8C2B8000000060" , vfmaddsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D5D8C2B8000000060" , vfmaddsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E95CCC30" , vfmaddsubps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E95C8C358000000030" , vfmaddsubps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E95C8C358000000030" , vfmaddsubps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3695C8C2B8000000060" , vfmaddsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3695C8C2B8000000060" , vfmaddsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED5CCC30" , vfmaddsubps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED5C8C358000000030" , vfmaddsubps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED5C8C358000000030" , vfmaddsubps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D5C8C2B8000000060" , vfmaddsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D5C8C2B8000000060" , vfmaddsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E2E99ACB" , vfmsub132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99A8C2B80000000" , vfmsub132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E99A8C2B80000000" , vfmsub132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9ACB" , vfmsub132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED9A8C2B80000000" , vfmsub132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9A8C2B80000000" , vfmsub132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED489ACB" , vfmsub132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED489A4C2B02" , vfmsub132pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED489A4C2B02" , vfmsub132pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699ACB" , vfmsub132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699A8C2B80000000" , vfmsub132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699A8C2B80000000" , vfmsub132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D9ACB" , vfmsub132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D9A8C2B80000000" , vfmsub132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D9A8C2B80000000" , vfmsub132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D489ACB" , vfmsub132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D489A4C2B02" , vfmsub132ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D489A4C2B02" , vfmsub132ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E99BCB" , vfmsub132sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99B8C2B80000000" , vfmsub132sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E99B8C2B80000000" , vfmsub132sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699BCB" , vfmsub132ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699B8C2B80000000" , vfmsub132ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699B8C2B80000000" , vfmsub132ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AACB" , vfmsub213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AA8C2B80000000" , vfmsub213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AA8C2B80000000" , vfmsub213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAACB" , vfmsub213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDAA8C2B80000000" , vfmsub213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAA8C2B80000000" , vfmsub213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48AACB" , vfmsub213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48AA4C2B02" , vfmsub213pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48AA4C2B02" , vfmsub213pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269AACB" , vfmsub213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AA8C2B80000000" , vfmsub213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269AA8C2B80000000" , vfmsub213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DAACB" , vfmsub213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DAA8C2B80000000" , vfmsub213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DAA8C2B80000000" , vfmsub213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48AACB" , vfmsub213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48AA4C2B02" , vfmsub213ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48AA4C2B02" , vfmsub213ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9ABCB" , vfmsub213sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AB8C2B80000000" , vfmsub213sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AB8C2B80000000" , vfmsub213sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269ABCB" , vfmsub213ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AB8C2B80000000" , vfmsub213ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269AB8C2B80000000" , vfmsub213ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BACB" , vfmsub231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BA8C2B80000000" , vfmsub231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BA8C2B80000000" , vfmsub231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBACB" , vfmsub231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDBA8C2B80000000" , vfmsub231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBA8C2B80000000" , vfmsub231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48BACB" , vfmsub231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48BA4C2B02" , vfmsub231pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48BA4C2B02" , vfmsub231pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BACB" , vfmsub231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BA8C2B80000000" , vfmsub231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BA8C2B80000000" , vfmsub231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DBACB" , vfmsub231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DBA8C2B80000000" , vfmsub231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DBA8C2B80000000" , vfmsub231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48BACB" , vfmsub231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48BA4C2B02" , vfmsub231ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48BA4C2B02" , vfmsub231ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BBCB" , vfmsub231sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BB8C2B80000000" , vfmsub231sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BB8C2B80000000" , vfmsub231sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BBCB" , vfmsub231ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BB8C2B80000000" , vfmsub231ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BB8C2B80000000" , vfmsub231ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E997CB" , vfmsubadd132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9978C2B80000000" , vfmsubadd132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9978C2B80000000" , vfmsubadd132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED97CB" , vfmsubadd132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED978C2B80000000" , vfmsubadd132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED978C2B80000000" , vfmsubadd132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED4897CB" , vfmsubadd132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48974C2B02" , vfmsubadd132pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48974C2B02" , vfmsubadd132pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26997CB" , vfmsubadd132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269978C2B80000000" , vfmsubadd132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269978C2B80000000" , vfmsubadd132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D97CB" , vfmsubadd132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D978C2B80000000" , vfmsubadd132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D978C2B80000000" , vfmsubadd132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4897CB" , vfmsubadd132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48974C2B02" , vfmsubadd132ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48974C2B02" , vfmsubadd132ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A7CB" , vfmsubadd213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9A78C2B80000000" , vfmsubadd213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A78C2B80000000" , vfmsubadd213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA7CB" , vfmsubadd213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDA78C2B80000000" , vfmsubadd213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA78C2B80000000" , vfmsubadd213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48A7CB" , vfmsubadd213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48A74C2B02" , vfmsubadd213pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48A74C2B02" , vfmsubadd213pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269A7CB" , vfmsubadd213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269A78C2B80000000" , vfmsubadd213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269A78C2B80000000" , vfmsubadd213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DA7CB" , vfmsubadd213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DA78C2B80000000" , vfmsubadd213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DA78C2B80000000" , vfmsubadd213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48A7CB" , vfmsubadd213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48A74C2B02" , vfmsubadd213ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48A74C2B02" , vfmsubadd213ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B7CB" , vfmsubadd231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9B78C2B80000000" , vfmsubadd231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B78C2B80000000" , vfmsubadd231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB7CB" , vfmsubadd231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDB78C2B80000000" , vfmsubadd231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB78C2B80000000" , vfmsubadd231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48B7CB" , vfmsubadd231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48B74C2B02" , vfmsubadd231pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48B74C2B02" , vfmsubadd231pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269B7CB" , vfmsubadd231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269B78C2B80000000" , vfmsubadd231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269B78C2B80000000" , vfmsubadd231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DB7CB" , vfmsubadd231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DB78C2B80000000" , vfmsubadd231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DB78C2B80000000" , vfmsubadd231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48B7CB" , vfmsubadd231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48B74C2B02" , vfmsubadd231ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48B74C2B02" , vfmsubadd231ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E3E95FCC30" , vfmsubaddpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E95F8C358000000030" , vfmsubaddpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E95F8C358000000030" , vfmsubaddpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3695F8C2B8000000060" , vfmsubaddpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3695F8C2B8000000060" , vfmsubaddpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED5FCC30" , vfmsubaddpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED5F8C358000000030" , vfmsubaddpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED5F8C358000000030" , vfmsubaddpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D5F8C2B8000000060" , vfmsubaddpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D5F8C2B8000000060" , vfmsubaddpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E95ECC30" , vfmsubaddps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E95E8C358000000030" , vfmsubaddps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E95E8C358000000030" , vfmsubaddps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3695E8C2B8000000060" , vfmsubaddps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3695E8C2B8000000060" , vfmsubaddps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED5ECC30" , vfmsubaddps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED5E8C358000000030" , vfmsubaddps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED5E8C358000000030" , vfmsubaddps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D5E8C2B8000000060" , vfmsubaddps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D5E8C2B8000000060" , vfmsubaddps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E96DCC30" , vfmsubpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96D8C358000000030" , vfmsubpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E96D8C358000000030" , vfmsubpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3696D8C2B8000000060" , vfmsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696D8C2B8000000060" , vfmsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED6DCC30" , vfmsubpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED6D8C358000000030" , vfmsubpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED6D8C358000000030" , vfmsubpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D6D8C2B8000000060" , vfmsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D6D8C2B8000000060" , vfmsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E96CCC30" , vfmsubps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96C8C358000000030" , vfmsubps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E96C8C358000000030" , vfmsubps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3696C8C2B8000000060" , vfmsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696C8C2B8000000060" , vfmsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED6CCC30" , vfmsubps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED6C8C358000000030" , vfmsubps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED6C8C358000000030" , vfmsubps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D6C8C2B8000000060" , vfmsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D6C8C2B8000000060" , vfmsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E96FCC30" , vfmsubsd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96F8C358000000030" , vfmsubsd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E96F8C358000000030" , vfmsubsd(xmm1, xmm2, xmm3, qword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3696F8C2B8000000060" , vfmsubsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696F8C2B8000000060" , vfmsubsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3E96ECC30" , vfmsubss(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96E8C358000000030" , vfmsubss(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E96E8C358000000030" , vfmsubss(xmm1, xmm2, xmm3, dword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3696E8C2B8000000060" , vfmsubss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696E8C2B8000000060" , vfmsubss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E2E99CCB" , vfnmadd132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99C8C2B80000000" , vfnmadd132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E99C8C2B80000000" , vfnmadd132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9CCB" , vfnmadd132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED9C8C2B80000000" , vfnmadd132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9C8C2B80000000" , vfnmadd132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED489CCB" , vfnmadd132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED489C4C2B02" , vfnmadd132pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED489C4C2B02" , vfnmadd132pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699CCB" , vfnmadd132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699C8C2B80000000" , vfnmadd132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699C8C2B80000000" , vfnmadd132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D9CCB" , vfnmadd132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D9C8C2B80000000" , vfnmadd132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D9C8C2B80000000" , vfnmadd132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D489CCB" , vfnmadd132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D489C4C2B02" , vfnmadd132ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D489C4C2B02" , vfnmadd132ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E99DCB" , vfnmadd132sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99D8C2B80000000" , vfnmadd132sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E99D8C2B80000000" , vfnmadd132sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699DCB" , vfnmadd132ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699D8C2B80000000" , vfnmadd132ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699D8C2B80000000" , vfnmadd132ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9ACCB" , vfnmadd213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AC8C2B80000000" , vfnmadd213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AC8C2B80000000" , vfnmadd213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDACCB" , vfnmadd213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDAC8C2B80000000" , vfnmadd213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAC8C2B80000000" , vfnmadd213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48ACCB" , vfnmadd213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48AC4C2B02" , vfnmadd213pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48AC4C2B02" , vfnmadd213pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269ACCB" , vfnmadd213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AC8C2B80000000" , vfnmadd213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269AC8C2B80000000" , vfnmadd213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DACCB" , vfnmadd213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DAC8C2B80000000" , vfnmadd213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DAC8C2B80000000" , vfnmadd213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48ACCB" , vfnmadd213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48AC4C2B02" , vfnmadd213ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48AC4C2B02" , vfnmadd213ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9ADCB" , vfnmadd213sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AD8C2B80000000" , vfnmadd213sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AD8C2B80000000" , vfnmadd213sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269ADCB" , vfnmadd213ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AD8C2B80000000" , vfnmadd213ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269AD8C2B80000000" , vfnmadd213ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BCCB" , vfnmadd231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BC8C2B80000000" , vfnmadd231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BC8C2B80000000" , vfnmadd231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBCCB" , vfnmadd231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDBC8C2B80000000" , vfnmadd231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBC8C2B80000000" , vfnmadd231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48BCCB" , vfnmadd231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48BC4C2B02" , vfnmadd231pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48BC4C2B02" , vfnmadd231pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BCCB" , vfnmadd231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BC8C2B80000000" , vfnmadd231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BC8C2B80000000" , vfnmadd231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DBCCB" , vfnmadd231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DBC8C2B80000000" , vfnmadd231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DBC8C2B80000000" , vfnmadd231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48BCCB" , vfnmadd231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48BC4C2B02" , vfnmadd231ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48BC4C2B02" , vfnmadd231ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BDCB" , vfnmadd231sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BD8C2B80000000" , vfnmadd231sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BD8C2B80000000" , vfnmadd231sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BDCB" , vfnmadd231ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BD8C2B80000000" , vfnmadd231ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BD8C2B80000000" , vfnmadd231ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E3E979CC30" , vfnmaddpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E9798C358000000030" , vfnmaddpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E9798C358000000030" , vfnmaddpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E369798C2B8000000060" , vfnmaddpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E369798C2B8000000060" , vfnmaddpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED79CC30" , vfnmaddpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED798C358000000030" , vfnmaddpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED798C358000000030" , vfnmaddpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D798C2B8000000060" , vfnmaddpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D798C2B8000000060" , vfnmaddpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E978CC30" , vfnmaddps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E9788C358000000030" , vfnmaddps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E9788C358000000030" , vfnmaddps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E369788C2B8000000060" , vfnmaddps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E369788C2B8000000060" , vfnmaddps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED78CC30" , vfnmaddps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED788C358000000030" , vfnmaddps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED788C358000000030" , vfnmaddps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D788C2B8000000060" , vfnmaddps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D788C2B8000000060" , vfnmaddps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E97BCC30" , vfnmaddsd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97B8C358000000030" , vfnmaddsd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E97B8C358000000030" , vfnmaddsd(xmm1, xmm2, xmm3, qword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3697B8C2B8000000060" , vfnmaddsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697B8C2B8000000060" , vfnmaddsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3E97ACC30" , vfnmaddss(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97A8C358000000030" , vfnmaddss(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E97A8C358000000030" , vfnmaddss(xmm1, xmm2, xmm3, dword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3697A8C2B8000000060" , vfnmaddss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697A8C2B8000000060" , vfnmaddss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E2E99ECB" , vfnmsub132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99E8C2B80000000" , vfnmsub132pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E99E8C2B80000000" , vfnmsub132pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9ECB" , vfnmsub132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED9E8C2B80000000" , vfnmsub132pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9E8C2B80000000" , vfnmsub132pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED489ECB" , vfnmsub132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED489E4C2B02" , vfnmsub132pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED489E4C2B02" , vfnmsub132pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699ECB" , vfnmsub132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699E8C2B80000000" , vfnmsub132ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699E8C2B80000000" , vfnmsub132ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D9ECB" , vfnmsub132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D9E8C2B80000000" , vfnmsub132ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D9E8C2B80000000" , vfnmsub132ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D489ECB" , vfnmsub132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D489E4C2B02" , vfnmsub132ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D489E4C2B02" , vfnmsub132ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E99FCB" , vfnmsub132sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99F8C2B80000000" , vfnmsub132sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E99F8C2B80000000" , vfnmsub132sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699FCB" , vfnmsub132ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699F8C2B80000000" , vfnmsub132ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2699F8C2B80000000" , vfnmsub132ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AECB" , vfnmsub213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AE8C2B80000000" , vfnmsub213pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AE8C2B80000000" , vfnmsub213pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAECB" , vfnmsub213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDAE8C2B80000000" , vfnmsub213pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAE8C2B80000000" , vfnmsub213pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48AECB" , vfnmsub213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48AE4C2B02" , vfnmsub213pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48AE4C2B02" , vfnmsub213pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269AECB" , vfnmsub213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AE8C2B80000000" , vfnmsub213ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269AE8C2B80000000" , vfnmsub213ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DAECB" , vfnmsub213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DAE8C2B80000000" , vfnmsub213ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DAE8C2B80000000" , vfnmsub213ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48AECB" , vfnmsub213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48AE4C2B02" , vfnmsub213ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48AE4C2B02" , vfnmsub213ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AFCB" , vfnmsub213sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AF8C2B80000000" , vfnmsub213sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AF8C2B80000000" , vfnmsub213sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269AFCB" , vfnmsub213ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AF8C2B80000000" , vfnmsub213ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269AF8C2B80000000" , vfnmsub213ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BECB" , vfnmsub231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BE8C2B80000000" , vfnmsub231pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BE8C2B80000000" , vfnmsub231pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBECB" , vfnmsub231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDBE8C2B80000000" , vfnmsub231pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBE8C2B80000000" , vfnmsub231pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48BECB" , vfnmsub231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48BE4C2B02" , vfnmsub231pd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48BE4C2B02" , vfnmsub231pd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BECB" , vfnmsub231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BE8C2B80000000" , vfnmsub231ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BE8C2B80000000" , vfnmsub231ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DBECB" , vfnmsub231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DBE8C2B80000000" , vfnmsub231ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DBE8C2B80000000" , vfnmsub231ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48BECB" , vfnmsub231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48BE4C2B02" , vfnmsub231ps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48BE4C2B02" , vfnmsub231ps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BFCB" , vfnmsub231sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BF8C2B80000000" , vfnmsub231sd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BF8C2B80000000" , vfnmsub231sd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BFCB" , vfnmsub231ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BF8C2B80000000" , vfnmsub231ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269BF8C2B80000000" , vfnmsub231ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E3E97DCC30" , vfnmsubpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97D8C358000000030" , vfnmsubpd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E97D8C358000000030" , vfnmsubpd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3697D8C2B8000000060" , vfnmsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697D8C2B8000000060" , vfnmsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED7DCC30" , vfnmsubpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED7D8C358000000030" , vfnmsubpd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED7D8C358000000030" , vfnmsubpd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D7D8C2B8000000060" , vfnmsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D7D8C2B8000000060" , vfnmsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E97CCC30" , vfnmsubps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97C8C358000000030" , vfnmsubps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E97C8C358000000030" , vfnmsubps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3697C8C2B8000000060" , vfnmsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697C8C2B8000000060" , vfnmsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED7CCC30" , vfnmsubps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED7C8C358000000030" , vfnmsubps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3ED7C8C358000000030" , vfnmsubps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E36D7C8C2B8000000060" , vfnmsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D7C8C2B8000000060" , vfnmsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E97FCC30" , vfnmsubsd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97F8C358000000030" , vfnmsubsd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E97F8C358000000030" , vfnmsubsd(xmm1, xmm2, xmm3, qword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3697F8C2B8000000060" , vfnmsubsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697F8C2B8000000060" , vfnmsubsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3E97ECC30" , vfnmsubss(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97E8C358000000030" , vfnmsubss(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3E97E8C358000000030" , vfnmsubss(xmm1, xmm2, xmm3, dword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("C4E3697E8C2B8000000060" , vfnmsubss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697E8C2B8000000060" , vfnmsubss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), xmm6)); TEST_INSTRUCTION("62F3FD0866CA01" , vfpclasspd(k1, xmm2, 1)); TEST_INSTRUCTION("62F3FD2866CA01" , vfpclasspd(k1, ymm2, 1)); TEST_INSTRUCTION("62F3FD4866CA01" , vfpclasspd(k1, zmm2, 1)); @@ -4420,31 +6157,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F37D0867CA01" , vfpclassss(k1, xmm2, 1)); TEST_INSTRUCTION("62F37D08674C1A2001" , vfpclassss(k1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F37D08674C1A2001" , vfpclassss(k1, dword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("8FE97881CA" , vfrczpd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978818C1A80000000" , vfrczpd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978818C1A80000000" , vfrczpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE97C81CA" , vfrczpd(ymm1, ymm2)); - TEST_INSTRUCTION("8FE97C818C1A80000000" , vfrczpd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE97C818C1A80000000" , vfrczpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE97880CA" , vfrczps(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978808C1A80000000" , vfrczps(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978808C1A80000000" , vfrczps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE97C80CA" , vfrczps(ymm1, ymm2)); - TEST_INSTRUCTION("8FE97C808C1A80000000" , vfrczps(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE97C808C1A80000000" , vfrczps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE97883CA" , vfrczsd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978838C1A80000000" , vfrczsd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978838C1A80000000" , vfrczsd(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE97882CA" , vfrczss(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978828C1A80000000" , vfrczss(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978828C1A80000000" , vfrczss(xmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2D9928C1A80000000" , vgatherdpd(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E2DD928C1A80000000" , vgatherdpd(ymm1, ptr(rdx, xmm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F2FD09924C1A10" , k(k1).vgatherdpd(xmm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD29924C1A10" , k(k1).vgatherdpd(ymm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD49924C1A10" , k(k1).vgatherdpd(zmm1, ptr(rdx, ymm3, 0, 128))); - TEST_INSTRUCTION("C4E259928C1A80000000" , vgatherdps(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E25D928C1A80000000" , vgatherdps(ymm1, ptr(rdx, ymm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F27D09924C1A20" , k(k1).vgatherdps(xmm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F27D29924C1A20" , k(k1).vgatherdps(ymm1, ptr(rdx, ymm3, 0, 128))); TEST_INSTRUCTION("62F27D49924C1A20" , k(k1).vgatherdps(zmm1, ptr(rdx, zmm3, 0, 128))); @@ -4456,13 +6171,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27D49C6541120" , k(k1).vgatherpf1dps(ptr(rcx, zmm2, 0, 128))); TEST_INSTRUCTION("62F2FD49C7541110" , k(k1).vgatherpf1qpd(ptr(rcx, zmm2, 0, 128))); TEST_INSTRUCTION("62F27D49C7541120" , k(k1).vgatherpf1qps(ptr(rcx, zmm2, 0, 128))); - TEST_INSTRUCTION("C4E2D9938C1A80000000" , vgatherqpd(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E2DD938C1A80000000" , vgatherqpd(ymm1, ptr(rdx, ymm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F2FD09934C1A10" , k(k1).vgatherqpd(xmm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD29934C1A10" , k(k1).vgatherqpd(ymm1, ptr(rdx, ymm3, 0, 128))); TEST_INSTRUCTION("62F2FD49934C1A10" , k(k1).vgatherqpd(zmm1, ptr(rdx, zmm3, 0, 128))); - TEST_INSTRUCTION("C4E259938C1A80000000" , vgatherqps(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E25D938C1A80000000" , vgatherqps(xmm1, ptr(rdx, ymm3, 0, 128), xmm4)); TEST_INSTRUCTION("62F27D09934C1A20" , k(k1).vgatherqps(xmm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F27D29934C1A20" , k(k1).vgatherqps(xmm1, ptr(rdx, ymm3, 0, 128))); TEST_INSTRUCTION("62F27D49934C1A20" , k(k1).vgatherqps(ymm1, ptr(rdx, zmm3, 0, 128))); @@ -4514,60 +6225,15 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D0827CB01" , vgetmantss(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08274C2B2001" , vgetmantss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08274C2B2001" , vgetmantss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9CFCB01" , vgf2p8affineinvqb(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3E9CF8C2B8000000001" , vgf2p8affineinvqb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9CF8C2B8000000001" , vgf2p8affineinvqb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3EDCFCB01" , vgf2p8affineinvqb(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E3EDCF8C2B8000000001" , vgf2p8affineinvqb(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3EDCF8C2B8000000001" , vgf2p8affineinvqb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48CFCB01" , vgf2p8affineinvqb(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48CF4C2B0201" , vgf2p8affineinvqb(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48CF4C2B0201" , vgf2p8affineinvqb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9CECB01" , vgf2p8affineqb(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3E9CE8C2B8000000001" , vgf2p8affineqb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9CE8C2B8000000001" , vgf2p8affineqb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3EDCECB01" , vgf2p8affineqb(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E3EDCE8C2B8000000001" , vgf2p8affineqb(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3EDCE8C2B8000000001" , vgf2p8affineqb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48CECB01" , vgf2p8affineqb(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48CE4C2B0201" , vgf2p8affineqb(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48CE4C2B0201" , vgf2p8affineqb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E269CFCB" , vgf2p8mulb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269CF8C2B80000000" , vgf2p8mulb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269CF8C2B80000000" , vgf2p8mulb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DCFCB" , vgf2p8mulb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DCF8C2B80000000" , vgf2p8mulb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26DCF8C2B80000000" , vgf2p8mulb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48CFCB" , vgf2p8mulb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48CF4C2B02" , vgf2p8mulb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48CF4C2B02" , vgf2p8mulb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E97CCB" , vhaddpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E97C8C2B80000000" , vhaddpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E97C8C2B80000000" , vhaddpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED7CCB" , vhaddpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED7C8C2B80000000" , vhaddpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED7C8C2B80000000" , vhaddpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB7CCB" , vhaddps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB7C8C2B80000000" , vhaddps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB7C8C2B80000000" , vhaddps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EF7CCB" , vhaddps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EF7C8C2B80000000" , vhaddps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EF7C8C2B80000000" , vhaddps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E97DCB" , vhsubpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E97D8C2B80000000" , vhsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E97D8C2B80000000" , vhsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED7DCB" , vhsubpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED7D8C2B80000000" , vhsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED7D8C2B80000000" , vhsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB7DCB" , vhsubps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB7D8C2B80000000" , vhsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB7D8C2B80000000" , vhsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EF7DCB" , vhsubps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EF7D8C2B80000000" , vhsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EF7D8C2B80000000" , vhsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E36D18CB01" , vinsertf128(ymm1, ymm2, xmm3, 1)); - TEST_INSTRUCTION("C4E36D188C2B8000000001" , vinsertf128(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D188C2B8000000001" , vinsertf128(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D2818CB01" , vinsertf32x4(ymm1, ymm2, xmm3, 1)); TEST_INSTRUCTION("62F36D28184C2B0801" , vinsertf32x4(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D28184C2B0801" , vinsertf32x4(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); @@ -4586,9 +6252,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED481ACB01" , vinsertf64x4(zmm1, zmm2, ymm3, 1)); TEST_INSTRUCTION("62F3ED481A4C2B0401" , vinsertf64x4(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED481A4C2B0401" , vinsertf64x4(zmm1, zmm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D38CB01" , vinserti128(ymm1, ymm2, xmm3, 1)); - TEST_INSTRUCTION("C4E36D388C2B8000000001" , vinserti128(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D388C2B8000000001" , vinserti128(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D2838CB01" , vinserti32x4(ymm1, ymm2, xmm3, 1)); TEST_INSTRUCTION("62F36D28384C2B0801" , vinserti32x4(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D28384C2B0801" , vinserti32x4(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); @@ -4607,136 +6270,31 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED483ACB01" , vinserti64x4(zmm1, zmm2, ymm3, 1)); TEST_INSTRUCTION("62F3ED483A4C2B0401" , vinserti64x4(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED483A4C2B0401" , vinserti64x4(zmm1, zmm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36921CB01" , vinsertps(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369218C2B8000000001" , vinsertps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369218C2B8000000001" , vinsertps(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5FBF08C1A80000000" , vlddqu(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FBF08C1A80000000" , vlddqu(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FFF08C1A80000000" , vlddqu(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FFF08C1A80000000" , vlddqu(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F8AE941180000000" , vldmxcsr(ptr(rcx, rdx, 0, 128))); - TEST_INSTRUCTION("C5F8AE941180000000" , vldmxcsr(dword_ptr(rcx, rdx, 0, 128))); - TEST_INSTRUCTION("C5F9F7CA" , vmaskmovdqu(xmm1, xmm2, ptr(rdi))); - TEST_INSTRUCTION("C5F9F7CA" , vmaskmovdqu(xmm1, xmm2, xmmword_ptr(rdi))); - TEST_INSTRUCTION("C4E2612FA41180000000" , vmaskmovpd(ptr(rcx, rdx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2612FA41180000000" , vmaskmovpd(xmmword_ptr(rcx, rdx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2652FA41180000000" , vmaskmovpd(ptr(rcx, rdx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2652FA41180000000" , vmaskmovpd(ymmword_ptr(rcx, rdx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2692D8C2B80000000" , vmaskmovpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2692D8C2B80000000" , vmaskmovpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D2D8C2B80000000" , vmaskmovpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D2D8C2B80000000" , vmaskmovpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2612EA41180000000" , vmaskmovps(ptr(rcx, rdx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2612EA41180000000" , vmaskmovps(xmmword_ptr(rcx, rdx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2652EA41180000000" , vmaskmovps(ptr(rcx, rdx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2652EA41180000000" , vmaskmovps(ymmword_ptr(rcx, rdx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2692C8C2B80000000" , vmaskmovps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2692C8C2B80000000" , vmaskmovps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D2C8C2B80000000" , vmaskmovps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D2C8C2B80000000" , vmaskmovps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E95FCB" , vmaxpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E95F8C2B80000000" , vmaxpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E95F8C2B80000000" , vmaxpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED5FCB" , vmaxpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED5F8C2B80000000" , vmaxpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED5F8C2B80000000" , vmaxpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED485FCB" , vmaxpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED485F4C2B02" , vmaxpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED485F4C2B02" , vmaxpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E85FCB" , vmaxps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E85F8C2B80000000" , vmaxps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E85F8C2B80000000" , vmaxps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC5FCB" , vmaxps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC5F8C2B80000000" , vmaxps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC5F8C2B80000000" , vmaxps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C485FCB" , vmaxps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C485F4C2B02" , vmaxps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C485F4C2B02" , vmaxps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB5FCB" , vmaxsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5F8C2B80000000" , vmaxsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB5F8C2B80000000" , vmaxsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5FCB" , vmaxss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5F8C2B80000000" , vmaxss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5F8C2B80000000" , vmaxss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E95DCB" , vminpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E95D8C2B80000000" , vminpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E95D8C2B80000000" , vminpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED5DCB" , vminpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED5D8C2B80000000" , vminpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED5D8C2B80000000" , vminpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED485DCB" , vminpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED485D4C2B02" , vminpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED485D4C2B02" , vminpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E85DCB" , vminps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E85D8C2B80000000" , vminps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E85D8C2B80000000" , vminps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC5DCB" , vminps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC5D8C2B80000000" , vminps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC5D8C2B80000000" , vminps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C485DCB" , vminps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C485D4C2B02" , vminps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C485D4C2B02" , vminps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB5DCB" , vminsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5D8C2B80000000" , vminsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB5D8C2B80000000" , vminsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5DCB" , vminss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5D8C2B80000000" , vminss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5D8C2B80000000" , vminss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5F928CA" , vmovapd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F9288C1A80000000" , vmovapd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F9288C1A80000000" , vmovapd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F9299C1180000000" , vmovapd(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9299C1180000000" , vmovapd(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FD28CA" , vmovapd(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD288C1A80000000" , vmovapd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD288C1A80000000" , vmovapd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD299C1180000000" , vmovapd(ptr(rcx, rdx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FD299C1180000000" , vmovapd(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); TEST_INSTRUCTION("62F1FD4828CA" , vmovapd(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48284C1A02" , vmovapd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD48284C1A02" , vmovapd(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD48295C1102" , vmovapd(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F1FD48295C1102" , vmovapd(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5F828CA" , vmovaps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8288C1A80000000" , vmovaps(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F8288C1A80000000" , vmovaps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F8299C1180000000" , vmovaps(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F8299C1180000000" , vmovaps(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FC28CA" , vmovaps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC288C1A80000000" , vmovaps(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC288C1A80000000" , vmovaps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC299C1180000000" , vmovaps(ptr(rcx, rdx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FC299C1180000000" , vmovaps(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); TEST_INSTRUCTION("62F17C4828CA" , vmovaps(zmm1, zmm2)); TEST_INSTRUCTION("62F17C48284C1A02" , vmovaps(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C48284C1A02" , vmovaps(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C48295C1102" , vmovaps(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F17C48295C1102" , vmovaps(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5F97ED1" , vmovd(ecx, xmm2)); - TEST_INSTRUCTION("C5F97E9C1180000000" , vmovd(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F97E9C1180000000" , vmovd(dword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F96ECA" , vmovd(xmm1, edx)); - TEST_INSTRUCTION("C5F96E8C1A80000000" , vmovd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F96E8C1A80000000" , vmovd(xmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FB12CA" , vmovddup(xmm1, xmm2)); - TEST_INSTRUCTION("C5FB128C1A80000000" , vmovddup(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FB128C1A80000000" , vmovddup(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FF12CA" , vmovddup(ymm1, ymm2)); - TEST_INSTRUCTION("C5FF128C1A80000000" , vmovddup(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FF128C1A80000000" , vmovddup(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FF4812CA" , vmovddup(zmm1, zmm2)); TEST_INSTRUCTION("62F1FF48124C1A02" , vmovddup(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FF48124C1A02" , vmovddup(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F96FCA" , vmovdqa(xmm1, xmm2)); - TEST_INSTRUCTION("C5F96F8C1A80000000" , vmovdqa(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F96F8C1A80000000" , vmovdqa(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F97F9C1180000000" , vmovdqa(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F97F9C1180000000" , vmovdqa(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FD6FCA" , vmovdqa(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD6F8C1A80000000" , vmovdqa(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD6F8C1A80000000" , vmovdqa(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD7F9C1180000000" , vmovdqa(ptr(rcx, rdx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FD7F9C1180000000" , vmovdqa(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); TEST_INSTRUCTION("62F17D086FCA" , vmovdqa32(xmm1, xmm2)); TEST_INSTRUCTION("62F17D086F4C1A08" , vmovdqa32(xmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17D086F4C1A08" , vmovdqa32(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); @@ -4767,16 +6325,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1FD486F4C1A02" , vmovdqa64(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD487F5C1102" , vmovdqa64(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F1FD487F5C1102" , vmovdqa64(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5FA6FCA" , vmovdqu(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA6F8C1A80000000" , vmovdqu(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA6F8C1A80000000" , vmovdqu(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA7F9C1180000000" , vmovdqu(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FA7F9C1180000000" , vmovdqu(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FE6FCA" , vmovdqu(ymm1, ymm2)); - TEST_INSTRUCTION("C5FE6F8C1A80000000" , vmovdqu(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FE6F8C1A80000000" , vmovdqu(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FE7F9C1180000000" , vmovdqu(ptr(rcx, rdx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FE7F9C1180000000" , vmovdqu(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); TEST_INSTRUCTION("62F1FF086FCA" , vmovdqu16(xmm1, xmm2)); TEST_INSTRUCTION("62F1FF086F4C1A08" , vmovdqu16(xmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FF086F4C1A08" , vmovdqu16(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); @@ -4837,162 +6385,43 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F17F486F4C1A02" , vmovdqu8(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17F487F5C1102" , vmovdqu8(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F17F487F5C1102" , vmovdqu8(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5E812CB" , vmovhlps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F9179C1180000000" , vmovhpd(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9179C1180000000" , vmovhpd(qword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5E9168C2B80000000" , vmovhpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9168C2B80000000" , vmovhpd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5F8179C1180000000" , vmovhps(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F8179C1180000000" , vmovhps(qword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5E8168C2B80000000" , vmovhps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E8168C2B80000000" , vmovhps(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E816CB" , vmovlhps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F9139C1180000000" , vmovlpd(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9139C1180000000" , vmovlpd(qword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5E9128C2B80000000" , vmovlpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9128C2B80000000" , vmovlpd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5F8139C1180000000" , vmovlps(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F8139C1180000000" , vmovlps(qword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5E8128C2B80000000" , vmovlps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E8128C2B80000000" , vmovlps(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5F950CA" , vmovmskpd(ecx, xmm2)); - TEST_INSTRUCTION("C5FD50CA" , vmovmskpd(ecx, ymm2)); - TEST_INSTRUCTION("C5F850CA" , vmovmskps(ecx, xmm2)); - TEST_INSTRUCTION("C5FC50CA" , vmovmskps(ecx, ymm2)); - TEST_INSTRUCTION("C5F9E79C1180000000" , vmovntdq(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9E79C1180000000" , vmovntdq(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FDE79C1180000000" , vmovntdq(ptr(rcx, rdx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FDE79C1180000000" , vmovntdq(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); TEST_INSTRUCTION("62F17D48E75C1102" , vmovntdq(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F17D48E75C1102" , vmovntdq(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C4E2792A8C1A80000000" , vmovntdqa(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2792A8C1A80000000" , vmovntdqa(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D2A8C1A80000000" , vmovntdqa(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D2A8C1A80000000" , vmovntdqa(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D482A4C1A02" , vmovntdqa(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D482A4C1A02" , vmovntdqa(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F92B9C1180000000" , vmovntpd(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F92B9C1180000000" , vmovntpd(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FD2B9C1180000000" , vmovntpd(ptr(rcx, rdx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FD2B9C1180000000" , vmovntpd(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); TEST_INSTRUCTION("62F1FD482B5C1102" , vmovntpd(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F1FD482B5C1102" , vmovntpd(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); + TEST_INSTRUCTION("62F17C482B5C1102" , vmovntps(ptr(rcx, rdx, 0, 128), zmm3)); + TEST_INSTRUCTION("62F17C482B5C1102" , vmovntps(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("C5F82B9C1180000000" , vmovntps(ptr(rcx, rdx, 0, 128), xmm3)); TEST_INSTRUCTION("C5F82B9C1180000000" , vmovntps(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); TEST_INSTRUCTION("C5FC2B9C1180000000" , vmovntps(ptr(rcx, rdx, 0, 128), ymm3)); TEST_INSTRUCTION("C5FC2B9C1180000000" , vmovntps(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); - TEST_INSTRUCTION("62F17C482B5C1102" , vmovntps(ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("62F17C482B5C1102" , vmovntps(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C4E1F97ED1" , vmovq(rcx, xmm2)); - TEST_INSTRUCTION("C5F9D69C1180000000" , vmovq(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9D69C1180000000" , vmovq(qword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C4E1F96ECA" , vmovq(xmm1, rdx)); - TEST_INSTRUCTION("C5FA7ECA" , vmovq(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA7E8C1A80000000" , vmovq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA7E8C1A80000000" , vmovq(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FB119C1180000000" , vmovsd(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FB119C1180000000" , vmovsd(qword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FB108C1A80000000" , vmovsd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FB108C1A80000000" , vmovsd(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5EB10CB" , vmovsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5FA16CA" , vmovshdup(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA168C1A80000000" , vmovshdup(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA168C1A80000000" , vmovshdup(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FE16CA" , vmovshdup(ymm1, ymm2)); - TEST_INSTRUCTION("C5FE168C1A80000000" , vmovshdup(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FE168C1A80000000" , vmovshdup(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E4816CA" , vmovshdup(zmm1, zmm2)); TEST_INSTRUCTION("62F17E48164C1A02" , vmovshdup(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E48164C1A02" , vmovshdup(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA12CA" , vmovsldup(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA128C1A80000000" , vmovsldup(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA128C1A80000000" , vmovsldup(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FE12CA" , vmovsldup(ymm1, ymm2)); - TEST_INSTRUCTION("C5FE128C1A80000000" , vmovsldup(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FE128C1A80000000" , vmovsldup(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E4812CA" , vmovsldup(zmm1, zmm2)); TEST_INSTRUCTION("62F17E48124C1A02" , vmovsldup(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17E48124C1A02" , vmovsldup(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA119C1180000000" , vmovss(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FA119C1180000000" , vmovss(dword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FA108C1A80000000" , vmovss(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FA108C1A80000000" , vmovss(xmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5EA10CB" , vmovss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F910CA" , vmovupd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F9108C1A80000000" , vmovupd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F9108C1A80000000" , vmovupd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F9119C1180000000" , vmovupd(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9119C1180000000" , vmovupd(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FD10CA" , vmovupd(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD108C1A80000000" , vmovupd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD108C1A80000000" , vmovupd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD119C1180000000" , vmovupd(ptr(rcx, rdx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FD119C1180000000" , vmovupd(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); TEST_INSTRUCTION("62F1FD4810CA" , vmovupd(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48104C1A02" , vmovupd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD48104C1A02" , vmovupd(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD48115C1102" , vmovupd(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F1FD48115C1102" , vmovupd(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5F810CA" , vmovups(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8108C1A80000000" , vmovups(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F8108C1A80000000" , vmovups(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F8119C1180000000" , vmovups(ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F8119C1180000000" , vmovups(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FC10CA" , vmovups(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC108C1A80000000" , vmovups(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC108C1A80000000" , vmovups(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC119C1180000000" , vmovups(ptr(rcx, rdx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FC119C1180000000" , vmovups(ymmword_ptr(rcx, rdx, 0, 128), ymm3)); TEST_INSTRUCTION("62F17C4810CA" , vmovups(zmm1, zmm2)); TEST_INSTRUCTION("62F17C48104C1A02" , vmovups(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C48104C1A02" , vmovups(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C48115C1102" , vmovups(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F17C48115C1102" , vmovups(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C4E36942CB01" , vmpsadbw(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369428C2B8000000001" , vmpsadbw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369428C2B8000000001" , vmpsadbw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D42CB01" , vmpsadbw(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D428C2B8000000001" , vmpsadbw(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D428C2B8000000001" , vmpsadbw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E959CB" , vmulpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9598C2B80000000" , vmulpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9598C2B80000000" , vmulpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED59CB" , vmulpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED598C2B80000000" , vmulpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED598C2B80000000" , vmulpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED4859CB" , vmulpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48594C2B02" , vmulpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48594C2B02" , vmulpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E859CB" , vmulps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8598C2B80000000" , vmulps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E8598C2B80000000" , vmulps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC59CB" , vmulps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC598C2B80000000" , vmulps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC598C2B80000000" , vmulps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C4859CB" , vmulps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48594C2B02" , vmulps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C48594C2B02" , vmulps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB59CB" , vmulsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB598C2B80000000" , vmulsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB598C2B80000000" , vmulsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA59CB" , vmulss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA598C2B80000000" , vmulss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA598C2B80000000" , vmulss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E956CB" , vorpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9568C2B80000000" , vorpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9568C2B80000000" , vorpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED56CB" , vorpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED568C2B80000000" , vorpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED568C2B80000000" , vorpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED4856CB" , vorpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48564C2B02" , vorpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48564C2B02" , vorpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E856CB" , vorps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8568C2B80000000" , vorps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E8568C2B80000000" , vorps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC56CB" , vorps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC568C2B80000000" , vorps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC568C2B80000000" , vorps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C4856CB" , vorps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48564C2B02" , vorps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C48564C2B02" , vorps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -5018,21 +6447,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F25F48524C1A08" , vp4dpwssd(zmm1, zmm4, zmm5, zmm6, zmm7, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F25F48534C1A08" , vp4dpwssds(zmm1, zmm4, zmm5, zmm6, zmm7, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F25F48534C1A08" , vp4dpwssds(zmm1, zmm4, zmm5, zmm6, zmm7, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2791CCA" , vpabsb(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2791C8C1A80000000" , vpabsb(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2791C8C1A80000000" , vpabsb(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D1CCA" , vpabsb(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D1C8C1A80000000" , vpabsb(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D1C8C1A80000000" , vpabsb(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D481CCA" , vpabsb(zmm1, zmm2)); TEST_INSTRUCTION("62F27D481C4C1A02" , vpabsb(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D481C4C1A02" , vpabsb(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2791ECA" , vpabsd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2791E8C1A80000000" , vpabsd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2791E8C1A80000000" , vpabsd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D1ECA" , vpabsd(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D1E8C1A80000000" , vpabsd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D1E8C1A80000000" , vpabsd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D481ECA" , vpabsd(zmm1, zmm2)); TEST_INSTRUCTION("62F27D481E4C1A02" , vpabsd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D481E4C1A02" , vpabsd(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); @@ -5045,138 +6462,48 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD481FCA" , vpabsq(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD481F4C1A02" , vpabsq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD481F4C1A02" , vpabsq(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2791DCA" , vpabsw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2791D8C1A80000000" , vpabsw(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2791D8C1A80000000" , vpabsw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D1DCA" , vpabsw(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D1D8C1A80000000" , vpabsw(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D1D8C1A80000000" , vpabsw(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D481DCA" , vpabsw(zmm1, zmm2)); TEST_INSTRUCTION("62F27D481D4C1A02" , vpabsw(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D481D4C1A02" , vpabsw(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5E96BCB" , vpackssdw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E96B8C2B80000000" , vpackssdw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E96B8C2B80000000" , vpackssdw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED6BCB" , vpackssdw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED6B8C2B80000000" , vpackssdw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED6B8C2B80000000" , vpackssdw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D486BCB" , vpackssdw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D486B4C2B02" , vpackssdw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D486B4C2B02" , vpackssdw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E963CB" , vpacksswb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9638C2B80000000" , vpacksswb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9638C2B80000000" , vpacksswb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED63CB" , vpacksswb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED638C2B80000000" , vpacksswb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED638C2B80000000" , vpacksswb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4863CB" , vpacksswb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48634C2B02" , vpacksswb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48634C2B02" , vpacksswb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2692BCB" , vpackusdw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2692B8C2B80000000" , vpackusdw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2692B8C2B80000000" , vpackusdw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D2BCB" , vpackusdw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D2B8C2B80000000" , vpackusdw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D2B8C2B80000000" , vpackusdw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D482BCB" , vpackusdw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D482B4C2B02" , vpackusdw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D482B4C2B02" , vpackusdw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E967CB" , vpackuswb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9678C2B80000000" , vpackuswb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9678C2B80000000" , vpackuswb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED67CB" , vpackuswb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED678C2B80000000" , vpackuswb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED678C2B80000000" , vpackuswb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4867CB" , vpackuswb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48674C2B02" , vpackuswb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48674C2B02" , vpackuswb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FCCB" , vpaddb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FC8C2B80000000" , vpaddb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FC8C2B80000000" , vpaddb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFCCB" , vpaddb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFC8C2B80000000" , vpaddb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFC8C2B80000000" , vpaddb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48FCCB" , vpaddb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48FC4C2B02" , vpaddb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48FC4C2B02" , vpaddb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FECB" , vpaddd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FE8C2B80000000" , vpaddd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FE8C2B80000000" , vpaddd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFECB" , vpaddd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFE8C2B80000000" , vpaddd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFE8C2B80000000" , vpaddd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48FECB" , vpaddd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48FE4C2B02" , vpaddd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48FE4C2B02" , vpaddd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D4CB" , vpaddq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9D48C2B80000000" , vpaddq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D48C2B80000000" , vpaddq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD4CB" , vpaddq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDD48C2B80000000" , vpaddq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD48C2B80000000" , vpaddq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48D4CB" , vpaddq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48D44C2B02" , vpaddq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48D44C2B02" , vpaddq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9ECCB" , vpaddsb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EC8C2B80000000" , vpaddsb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9EC8C2B80000000" , vpaddsb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDECCB" , vpaddsb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEC8C2B80000000" , vpaddsb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEC8C2B80000000" , vpaddsb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48ECCB" , vpaddsb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48EC4C2B02" , vpaddsb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48EC4C2B02" , vpaddsb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9EDCB" , vpaddsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9ED8C2B80000000" , vpaddsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9ED8C2B80000000" , vpaddsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEDCB" , vpaddsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDED8C2B80000000" , vpaddsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDED8C2B80000000" , vpaddsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48EDCB" , vpaddsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48ED4C2B02" , vpaddsw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48ED4C2B02" , vpaddsw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DCCB" , vpaddusb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DC8C2B80000000" , vpaddusb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DC8C2B80000000" , vpaddusb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDCCB" , vpaddusb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDC8C2B80000000" , vpaddusb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDC8C2B80000000" , vpaddusb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48DCCB" , vpaddusb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DC4C2B02" , vpaddusb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48DC4C2B02" , vpaddusb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DDCB" , vpaddusw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DD8C2B80000000" , vpaddusw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DD8C2B80000000" , vpaddusw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDDCB" , vpaddusw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDD8C2B80000000" , vpaddusw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDD8C2B80000000" , vpaddusw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48DDCB" , vpaddusw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DD4C2B02" , vpaddusw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48DD4C2B02" , vpaddusw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FDCB" , vpaddw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FD8C2B80000000" , vpaddw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FD8C2B80000000" , vpaddw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFDCB" , vpaddw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFD8C2B80000000" , vpaddw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFD8C2B80000000" , vpaddw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48FDCB" , vpaddw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48FD4C2B02" , vpaddw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48FD4C2B02" , vpaddw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E3690FCB01" , vpalignr(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690F8C2B8000000001" , vpalignr(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690F8C2B8000000001" , vpalignr(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0FCB01" , vpalignr(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D0F8C2B8000000001" , vpalignr(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0F8C2B8000000001" , vpalignr(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D480FCB01" , vpalignr(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F36D480F4C2B0201" , vpalignr(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D480F4C2B0201" , vpalignr(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9DBCB" , vpand(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DB8C2B80000000" , vpand(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DB8C2B80000000" , vpand(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDBCB" , vpand(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDB8C2B80000000" , vpand(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDB8C2B80000000" , vpand(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08DBCB" , vpandd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08DB4C2B08" , vpandd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08DB4C2B08" , vpandd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -5186,12 +6513,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48DBCB" , vpandd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DB4C2B02" , vpandd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48DB4C2B02" , vpandd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DFCB" , vpandn(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DF8C2B80000000" , vpandn(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DF8C2B80000000" , vpandn(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDFCB" , vpandn(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDF8C2B80000000" , vpandn(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDF8C2B80000000" , vpandn(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08DFCB" , vpandnd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08DF4C2B08" , vpandnd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08DF4C2B08" , vpandnd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -5219,30 +6540,12 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48DBCB" , vpandq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48DB4C2B02" , vpandq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48DB4C2B02" , vpandq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E0CB" , vpavgb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E08C2B80000000" , vpavgb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E08C2B80000000" , vpavgb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE0CB" , vpavgb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE08C2B80000000" , vpavgb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE08C2B80000000" , vpavgb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E0CB" , vpavgb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E04C2B02" , vpavgb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E04C2B02" , vpavgb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E3CB" , vpavgw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E38C2B80000000" , vpavgw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E38C2B80000000" , vpavgw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE3CB" , vpavgw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE38C2B80000000" , vpavgw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE38C2B80000000" , vpavgw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E3CB" , vpavgw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E34C2B02" , vpavgw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E34C2B02" , vpavgw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E36902CB01" , vpblendd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369028C2B8000000001" , vpblendd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369028C2B8000000001" , vpblendd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D02CB01" , vpblendd(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D028C2B8000000001" , vpblendd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D028C2B8000000001" , vpblendd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F26D0866CB" , vpblendmb(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D08664C2B08" , vpblendmb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D08664C2B08" , vpblendmb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -5279,38 +6582,14 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4866CB" , vpblendmw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48664C2B02" , vpblendmw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48664C2B02" , vpblendmw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E3694CCB40" , vpblendvb(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3694C8C2B8000000060" , vpblendvb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3694C8C2B8000000060" , vpblendvb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E36D4CCB40" , vpblendvb(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E36D4C8C2B8000000060" , vpblendvb(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D4C8C2B8000000060" , vpblendvb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3690ECB01" , vpblendw(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690E8C2B8000000001" , vpblendw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690E8C2B8000000001" , vpblendw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0ECB01" , vpblendw(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D0E8C2B8000000001" , vpblendw(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0E8C2B8000000001" , vpblendw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F27D087ACA" , vpbroadcastb(xmm1, edx)); - TEST_INSTRUCTION("C4E27978CA" , vpbroadcastb(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279788C1A80000000" , vpbroadcastb(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279788C1A80000000" , vpbroadcastb(xmm1, byte_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D287ACA" , vpbroadcastb(ymm1, edx)); - TEST_INSTRUCTION("C4E27D78CA" , vpbroadcastb(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D788C1A80000000" , vpbroadcastb(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D788C1A80000000" , vpbroadcastb(ymm1, byte_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D487ACA" , vpbroadcastb(zmm1, edx)); TEST_INSTRUCTION("62F27D4878CA" , vpbroadcastb(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48788C1A80000000" , vpbroadcastb(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48788C1A80000000" , vpbroadcastb(zmm1, byte_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D087CCA" , vpbroadcastd(xmm1, edx)); - TEST_INSTRUCTION("C4E27958CA" , vpbroadcastd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279588C1A80000000" , vpbroadcastd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279588C1A80000000" , vpbroadcastd(xmm1, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D287CCA" , vpbroadcastd(ymm1, edx)); - TEST_INSTRUCTION("C4E27D58CA" , vpbroadcastd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D588C1A80000000" , vpbroadcastd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D588C1A80000000" , vpbroadcastd(ymm1, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D487CCA" , vpbroadcastd(zmm1, edx)); TEST_INSTRUCTION("62F27D4858CA" , vpbroadcastd(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48584C1A20" , vpbroadcastd(zmm1, ptr(rdx, rbx, 0, 128))); @@ -5322,48 +6601,20 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27E283ACA" , vpbroadcastmw2d(ymm1, k2)); TEST_INSTRUCTION("62F27E483ACA" , vpbroadcastmw2d(zmm1, k2)); TEST_INSTRUCTION("62F2FD087CCA" , vpbroadcastq(xmm1, rdx)); - TEST_INSTRUCTION("C4E27959CA" , vpbroadcastq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279598C1A80000000" , vpbroadcastq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279598C1A80000000" , vpbroadcastq(xmm1, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD287CCA" , vpbroadcastq(ymm1, rdx)); - TEST_INSTRUCTION("C4E27D59CA" , vpbroadcastq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D598C1A80000000" , vpbroadcastq(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D598C1A80000000" , vpbroadcastq(ymm1, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD487CCA" , vpbroadcastq(zmm1, rdx)); TEST_INSTRUCTION("62F2FD4859CA" , vpbroadcastq(zmm1, xmm2)); TEST_INSTRUCTION("62F2FD48594C1A10" , vpbroadcastq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD48594C1A10" , vpbroadcastq(zmm1, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D087BCA" , vpbroadcastw(xmm1, edx)); - TEST_INSTRUCTION("C4E27979CA" , vpbroadcastw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279798C1A80000000" , vpbroadcastw(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279798C1A80000000" , vpbroadcastw(xmm1, word_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D287BCA" , vpbroadcastw(ymm1, edx)); - TEST_INSTRUCTION("C4E27D79CA" , vpbroadcastw(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D798C1A80000000" , vpbroadcastw(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D798C1A80000000" , vpbroadcastw(ymm1, word_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D487BCA" , vpbroadcastw(zmm1, edx)); TEST_INSTRUCTION("62F27D4879CA" , vpbroadcastw(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48794C1A40" , vpbroadcastw(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48794C1A40" , vpbroadcastw(zmm1, word_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E36944CB01" , vpclmulqdq(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369448C2B8000000001" , vpclmulqdq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369448C2B8000000001" , vpclmulqdq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D44CB01" , vpclmulqdq(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D448C2B8000000001" , vpclmulqdq(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D448C2B8000000001" , vpclmulqdq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D4844CB01" , vpclmulqdq(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F36D48444C2B0201" , vpclmulqdq(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D48444C2B0201" , vpclmulqdq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868A2CB40" , vpcmov(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8E8A28C358000000030" , vpcmov(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("8FE8E8A28C358000000030" , vpcmov(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("8FE868A28C2B8000000060" , vpcmov(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868A28C2B8000000060" , vpcmov(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86CA2CB40" , vpcmov(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("8FE8ECA28C358000000030" , vpcmov(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("8FE8ECA28C358000000030" , vpcmov(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("8FE86CA28C2B8000000060" , vpcmov(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6)); - TEST_INSTRUCTION("8FE86CA28C2B8000000060" , vpcmov(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6)); TEST_INSTRUCTION("62F36D083FCB01" , vpcmpb(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D083F4C2B0801" , vpcmpb(k1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D083F4C2B0801" , vpcmpb(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); @@ -5382,138 +6633,78 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D481FCB01" , vpcmpd(k1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F36D481F4C2B0201" , vpcmpd(k1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D481F4C2B0201" , vpcmpd(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E974CB" , vpcmpeqb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9748C2B80000000" , vpcmpeqb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9748C2B80000000" , vpcmpeqb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D0874CB" , vpcmpeqb(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08744C2B08" , vpcmpeqb(k1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08744C2B08" , vpcmpeqb(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED74CB" , vpcmpeqb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED748C2B80000000" , vpcmpeqb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED748C2B80000000" , vpcmpeqb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D2874CB" , vpcmpeqb(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28744C2B04" , vpcmpeqb(k1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D28744C2B04" , vpcmpeqb(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4874CB" , vpcmpeqb(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48744C2B02" , vpcmpeqb(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48744C2B02" , vpcmpeqb(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E976CB" , vpcmpeqd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9768C2B80000000" , vpcmpeqd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9768C2B80000000" , vpcmpeqd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D0876CB" , vpcmpeqd(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08764C2B08" , vpcmpeqd(k1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08764C2B08" , vpcmpeqd(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED76CB" , vpcmpeqd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED768C2B80000000" , vpcmpeqd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED768C2B80000000" , vpcmpeqd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D2876CB" , vpcmpeqd(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28764C2B04" , vpcmpeqd(k1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D28764C2B04" , vpcmpeqd(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4876CB" , vpcmpeqd(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48764C2B02" , vpcmpeqd(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48764C2B02" , vpcmpeqd(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26929CB" , vpcmpeqq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269298C2B80000000" , vpcmpeqq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269298C2B80000000" , vpcmpeqq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED0829CB" , vpcmpeqq(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F2ED08294C2B08" , vpcmpeqq(k1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED08294C2B08" , vpcmpeqq(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D29CB" , vpcmpeqq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D298C2B80000000" , vpcmpeqq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D298C2B80000000" , vpcmpeqq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED2829CB" , vpcmpeqq(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F2ED28294C2B04" , vpcmpeqq(k1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED28294C2B04" , vpcmpeqq(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED4829CB" , vpcmpeqq(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48294C2B02" , vpcmpeqq(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48294C2B02" , vpcmpeqq(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E975CB" , vpcmpeqw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9758C2B80000000" , vpcmpeqw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9758C2B80000000" , vpcmpeqw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D0875CB" , vpcmpeqw(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08754C2B08" , vpcmpeqw(k1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08754C2B08" , vpcmpeqw(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED75CB" , vpcmpeqw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED758C2B80000000" , vpcmpeqw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED758C2B80000000" , vpcmpeqw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D2875CB" , vpcmpeqw(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28754C2B04" , vpcmpeqw(k1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D28754C2B04" , vpcmpeqw(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4875CB" , vpcmpeqw(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48754C2B02" , vpcmpeqw(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48754C2B02" , vpcmpeqw(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E37961CA01" , vpcmpestri(xmm1, xmm2, 1, ecx, eax, edx)); - TEST_INSTRUCTION("C4E379618C1A8000000001" , vpcmpestri(xmm1, ptr(rdx, rbx, 0, 128), 1, ecx, eax, edx)); - TEST_INSTRUCTION("C4E379618C1A8000000001" , vpcmpestri(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1, ecx, eax, edx)); - TEST_INSTRUCTION("C4E37960CA01" , vpcmpestrm(xmm1, xmm2, 1, xmm0, eax, edx)); - TEST_INSTRUCTION("C4E379608C1A8000000001" , vpcmpestrm(xmm1, ptr(rdx, rbx, 0, 128), 1, xmm0, eax, edx)); - TEST_INSTRUCTION("C4E379608C1A8000000001" , vpcmpestrm(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1, xmm0, eax, edx)); - TEST_INSTRUCTION("C5E964CB" , vpcmpgtb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9648C2B80000000" , vpcmpgtb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9648C2B80000000" , vpcmpgtb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D0864CB" , vpcmpgtb(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08644C2B08" , vpcmpgtb(k1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08644C2B08" , vpcmpgtb(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED64CB" , vpcmpgtb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED648C2B80000000" , vpcmpgtb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED648C2B80000000" , vpcmpgtb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D2864CB" , vpcmpgtb(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28644C2B04" , vpcmpgtb(k1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D28644C2B04" , vpcmpgtb(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4864CB" , vpcmpgtb(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48644C2B02" , vpcmpgtb(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48644C2B02" , vpcmpgtb(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E966CB" , vpcmpgtd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9668C2B80000000" , vpcmpgtd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9668C2B80000000" , vpcmpgtd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D0866CB" , vpcmpgtd(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08664C2B08" , vpcmpgtd(k1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08664C2B08" , vpcmpgtd(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED66CB" , vpcmpgtd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED668C2B80000000" , vpcmpgtd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED668C2B80000000" , vpcmpgtd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D2866CB" , vpcmpgtd(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28664C2B04" , vpcmpgtd(k1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D28664C2B04" , vpcmpgtd(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4866CB" , vpcmpgtd(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48664C2B02" , vpcmpgtd(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48664C2B02" , vpcmpgtd(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26937CB" , vpcmpgtq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269378C2B80000000" , vpcmpgtq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269378C2B80000000" , vpcmpgtq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED0837CB" , vpcmpgtq(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F2ED08374C2B08" , vpcmpgtq(k1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED08374C2B08" , vpcmpgtq(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D37CB" , vpcmpgtq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D378C2B80000000" , vpcmpgtq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D378C2B80000000" , vpcmpgtq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED2837CB" , vpcmpgtq(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F2ED28374C2B04" , vpcmpgtq(k1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED28374C2B04" , vpcmpgtq(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED4837CB" , vpcmpgtq(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48374C2B02" , vpcmpgtq(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48374C2B02" , vpcmpgtq(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E965CB" , vpcmpgtw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9658C2B80000000" , vpcmpgtw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9658C2B80000000" , vpcmpgtw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D0865CB" , vpcmpgtw(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08654C2B08" , vpcmpgtw(k1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08654C2B08" , vpcmpgtw(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED65CB" , vpcmpgtw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED658C2B80000000" , vpcmpgtw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED658C2B80000000" , vpcmpgtw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D2865CB" , vpcmpgtw(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28654C2B04" , vpcmpgtw(k1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D28654C2B04" , vpcmpgtw(k1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4865CB" , vpcmpgtw(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48654C2B02" , vpcmpgtw(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48654C2B02" , vpcmpgtw(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E37963CA01" , vpcmpistri(xmm1, xmm2, 1, ecx)); - TEST_INSTRUCTION("C4E379638C1A8000000001" , vpcmpistri(xmm1, ptr(rdx, rbx, 0, 128), 1, ecx)); - TEST_INSTRUCTION("C4E379638C1A8000000001" , vpcmpistri(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1, ecx)); - TEST_INSTRUCTION("C4E37962CA01" , vpcmpistrm(xmm1, xmm2, 1, xmm0)); - TEST_INSTRUCTION("C4E379628C1A8000000001" , vpcmpistrm(xmm1, ptr(rdx, rbx, 0, 128), 1, xmm0)); - TEST_INSTRUCTION("C4E379628C1A8000000001" , vpcmpistrm(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1, xmm0)); TEST_INSTRUCTION("62F3ED081FCB01" , vpcmpq(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F3ED081F4C2B0801" , vpcmpq(k1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED081F4C2B0801" , vpcmpq(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); @@ -5568,12 +6759,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED483FCB01" , vpcmpw(k1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED483F4C2B0201" , vpcmpw(k1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED483F4C2B0201" , vpcmpw(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CCCB01" , vpcomb(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868CC8C2B8000000001" , vpcomb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CC8C2B8000000001" , vpcomb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CECB01" , vpcomd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868CE8C2B8000000001" , vpcomd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CE8C2B8000000001" , vpcomd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F27D0863D1" , vpcompressb(xmm1, xmm2)); TEST_INSTRUCTION("62F27D08639C1180000000" , vpcompressb(ptr(rcx, rdx, 0, 128), xmm3)); TEST_INSTRUCTION("62F27D08639C1180000000" , vpcompressb(xmmword_ptr(rcx, rdx, 0, 128), xmm3)); @@ -5610,24 +6795,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD4863D1" , vpcompressw(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48635C1140" , vpcompressw(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F2FD48635C1140" , vpcompressw(zmmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("8FE868CFCB01" , vpcomq(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868CF8C2B8000000001" , vpcomq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CF8C2B8000000001" , vpcomq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868ECCB01" , vpcomub(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868EC8C2B8000000001" , vpcomub(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EC8C2B8000000001" , vpcomub(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EECB01" , vpcomud(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868EE8C2B8000000001" , vpcomud(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EE8C2B8000000001" , vpcomud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EFCB01" , vpcomuq(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868EF8C2B8000000001" , vpcomuq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EF8C2B8000000001" , vpcomuq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EDCB01" , vpcomuw(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868ED8C2B8000000001" , vpcomuw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868ED8C2B8000000001" , vpcomuw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CDCB01" , vpcomw(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868CD8C2B8000000001" , vpcomw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CD8C2B8000000001" , vpcomw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F27D08C4CA" , vpconflictd(xmm1, xmm2)); TEST_INSTRUCTION("62F27D08C44C1A08" , vpconflictd(xmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D08C44C1A08" , vpconflictd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); @@ -5682,12 +6849,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D4853CB" , vpdpwssds(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48534C2B02" , vpdpwssds(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48534C2B02" , vpdpwssds(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E36D06CB01" , vperm2f128(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D068C2B8000000001" , vperm2f128(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D068C2B8000000001" , vperm2f128(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D46CB01" , vperm2i128(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D468C2B8000000001" , vperm2i128(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D468C2B8000000001" , vperm2i128(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F26D088DCB" , vpermb(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D088D4C2B08" , vpermb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D088D4C2B08" , vpermb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -5697,9 +6858,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D488DCB" , vpermb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D488D4C2B02" , vpermb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D488D4C2B02" , vpermb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D36CB" , vpermd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D368C2B80000000" , vpermd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D368C2B80000000" , vpermd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4836CB" , vpermd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48364C2B02" , vpermd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48364C2B02" , vpermd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -5757,65 +6915,18 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4875CB" , vpermi2w(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48754C2B02" , vpermi2w(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48754C2B02" , vpermi2w(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E36949CB41" , vpermil2pd(xmm1, xmm2, xmm3, xmm4, 1)); - TEST_INSTRUCTION("C4E369498C2B8000000061" , vpermil2pd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6, 1)); - TEST_INSTRUCTION("C4E369498C2B8000000061" , vpermil2pd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6, 1)); - TEST_INSTRUCTION("C4E3E9498C358000000031" , vpermil2pd(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9498C358000000031" , vpermil2pd(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D49CB41" , vpermil2pd(ymm1, ymm2, ymm3, ymm4, 1)); - TEST_INSTRUCTION("C4E36D498C2B8000000061" , vpermil2pd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6, 1)); - TEST_INSTRUCTION("C4E36D498C2B8000000061" , vpermil2pd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6, 1)); - TEST_INSTRUCTION("C4E3ED498C358000000031" , vpermil2pd(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128), 1)); - TEST_INSTRUCTION("C4E3ED498C358000000031" , vpermil2pd(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128), 1)); - TEST_INSTRUCTION("C4E36948CB41" , vpermil2ps(xmm1, xmm2, xmm3, xmm4, 1)); - TEST_INSTRUCTION("C4E369488C2B8000000061" , vpermil2ps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6, 1)); - TEST_INSTRUCTION("C4E369488C2B8000000061" , vpermil2ps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6, 1)); - TEST_INSTRUCTION("C4E3E9488C358000000031" , vpermil2ps(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9488C358000000031" , vpermil2ps(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D48CB41" , vpermil2ps(ymm1, ymm2, ymm3, ymm4, 1)); - TEST_INSTRUCTION("C4E36D488C2B8000000061" , vpermil2ps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), ymm6, 1)); - TEST_INSTRUCTION("C4E36D488C2B8000000061" , vpermil2ps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), ymm6, 1)); - TEST_INSTRUCTION("C4E3ED488C358000000031" , vpermil2ps(ymm1, ymm2, ymm3, ptr(rbp, rsi, 0, 128), 1)); - TEST_INSTRUCTION("C4E3ED488C358000000031" , vpermil2ps(ymm1, ymm2, ymm3, ymmword_ptr(rbp, rsi, 0, 128), 1)); - TEST_INSTRUCTION("C4E2690DCB" , vpermilpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E37905CA01" , vpermilpd(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E2690D8C2B80000000" , vpermilpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2690D8C2B80000000" , vpermilpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E379058C1A8000000001" , vpermilpd(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E379058C1A8000000001" , vpermilpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26D0DCB" , vpermilpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E37D05CA01" , vpermilpd(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E26D0D8C2B80000000" , vpermilpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D0D8C2B80000000" , vpermilpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E37D058C1A8000000001" , vpermilpd(ymm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D058C1A8000000001" , vpermilpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F2ED480DCB" , vpermilpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F3FD4805CA01" , vpermilpd(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F2ED480D4C2B02" , vpermilpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED480D4C2B02" , vpermilpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F3FD48054C1A0201" , vpermilpd(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F3FD48054C1A0201" , vpermilpd(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E2690CCB" , vpermilps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E37904CA01" , vpermilps(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E2690C8C2B80000000" , vpermilps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2690C8C2B80000000" , vpermilps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E379048C1A8000000001" , vpermilps(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E379048C1A8000000001" , vpermilps(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26D0CCB" , vpermilps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E37D04CA01" , vpermilps(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E26D0C8C2B80000000" , vpermilps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D0C8C2B80000000" , vpermilps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E37D048C1A8000000001" , vpermilps(ymm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D048C1A8000000001" , vpermilps(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F26D480CCB" , vpermilps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F37D4804CA01" , vpermilps(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F26D480C4C2B02" , vpermilps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D480C4C2B02" , vpermilps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F37D48044C1A0201" , vpermilps(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F37D48044C1A0201" , vpermilps(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E3FD01CA01" , vpermpd(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E3FD018C1A8000000001" , vpermpd(ymm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E3FD018C1A8000000001" , vpermpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F2ED2816CB" , vpermpd(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("62F2ED28164C2B04" , vpermpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED28164C2B04" , vpermpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); @@ -5825,15 +6936,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED48164C2B02" , vpermpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F3FD48014C1A0201" , vpermpd(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F3FD48014C1A0201" , vpermpd(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26D16CB" , vpermps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D168C2B80000000" , vpermps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D168C2B80000000" , vpermps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4816CB" , vpermps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48164C2B02" , vpermps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48164C2B02" , vpermps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E3FD00CA01" , vpermq(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E3FD008C1A8000000001" , vpermq(ymm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E3FD008C1A8000000001" , vpermq(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F2ED2836CB" , vpermq(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("62F2ED28364C2B04" , vpermq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED28364C2B04" , vpermq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); @@ -5942,134 +7047,18 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD4862CA" , vpexpandw(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48624C1A40" , vpexpandw(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD48624C1A40" , vpexpandw(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E37914D101" , vpextrb(ecx, xmm2, 1)); - TEST_INSTRUCTION("C4E379149C118000000001" , vpextrb(ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E379149C118000000001" , vpextrb(byte_ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E37916D101" , vpextrd(ecx, xmm2, 1)); - TEST_INSTRUCTION("C4E379169C118000000001" , vpextrd(ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E379169C118000000001" , vpextrd(dword_ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E3F916D101" , vpextrq(rcx, xmm2, 1)); - TEST_INSTRUCTION("C4E3F9169C118000000001" , vpextrq(ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E3F9169C118000000001" , vpextrq(qword_ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C5F9C5CA01" , vpextrw(ecx, xmm2, 1)); - TEST_INSTRUCTION("C4E379159C118000000001" , vpextrw(ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E379159C118000000001" , vpextrw(word_ptr(rcx, rdx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E259908C1A80000000" , vpgatherdd(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E25D908C1A80000000" , vpgatherdd(ymm1, ptr(rdx, ymm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F27D09904C1A20" , k(k1).vpgatherdd(xmm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F27D29904C1A20" , k(k1).vpgatherdd(ymm1, ptr(rdx, ymm3, 0, 128))); TEST_INSTRUCTION("62F27D49904C1A20" , k(k1).vpgatherdd(zmm1, ptr(rdx, zmm3, 0, 128))); - TEST_INSTRUCTION("C4E2D9908C1A80000000" , vpgatherdq(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E2DD908C1A80000000" , vpgatherdq(ymm1, ptr(rdx, xmm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F2FD09904C1A10" , k(k1).vpgatherdq(xmm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD29904C1A10" , k(k1).vpgatherdq(ymm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD49904C1A10" , k(k1).vpgatherdq(zmm1, ptr(rdx, ymm3, 0, 128))); - TEST_INSTRUCTION("C4E259918C1A80000000" , vpgatherqd(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E25D918C1A80000000" , vpgatherqd(xmm1, ptr(rdx, ymm3, 0, 128), xmm4)); TEST_INSTRUCTION("62F27D09914C1A20" , k(k1).vpgatherqd(xmm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F27D29914C1A20" , k(k1).vpgatherqd(xmm1, ptr(rdx, ymm3, 0, 128))); TEST_INSTRUCTION("62F27D49914C1A20" , k(k1).vpgatherqd(ymm1, ptr(rdx, zmm3, 0, 128))); - TEST_INSTRUCTION("C4E2D9918C1A80000000" , vpgatherqq(xmm1, ptr(rdx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E2DD918C1A80000000" , vpgatherqq(ymm1, ptr(rdx, ymm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F2FD09914C1A10" , k(k1).vpgatherqq(xmm1, ptr(rdx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD29914C1A10" , k(k1).vpgatherqq(ymm1, ptr(rdx, ymm3, 0, 128))); TEST_INSTRUCTION("62F2FD49914C1A10" , k(k1).vpgatherqq(zmm1, ptr(rdx, zmm3, 0, 128))); - TEST_INSTRUCTION("8FE978C2CA" , vphaddbd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C28C1A80000000" , vphaddbd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978C28C1A80000000" , vphaddbd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978C3CA" , vphaddbq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C38C1A80000000" , vphaddbq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978C38C1A80000000" , vphaddbq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978C1CA" , vphaddbw(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C18C1A80000000" , vphaddbw(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978C18C1A80000000" , vphaddbw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E26902CB" , vphaddd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269028C2B80000000" , vphaddd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269028C2B80000000" , vphaddd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D02CB" , vphaddd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D028C2B80000000" , vphaddd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D028C2B80000000" , vphaddd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE978CBCA" , vphadddq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978CB8C1A80000000" , vphadddq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978CB8C1A80000000" , vphadddq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E26903CB" , vphaddsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269038C2B80000000" , vphaddsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269038C2B80000000" , vphaddsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D03CB" , vphaddsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D038C2B80000000" , vphaddsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D038C2B80000000" , vphaddsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE978D2CA" , vphaddubd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D28C1A80000000" , vphaddubd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978D28C1A80000000" , vphaddubd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978D3CA" , vphaddubq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D38C1A80000000" , vphaddubq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978D38C1A80000000" , vphaddubq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978D1CA" , vphaddubw(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D18C1A80000000" , vphaddubw(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978D18C1A80000000" , vphaddubw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978DBCA" , vphaddudq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978DB8C1A80000000" , vphaddudq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978DB8C1A80000000" , vphaddudq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978D6CA" , vphadduwd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D68C1A80000000" , vphadduwd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978D68C1A80000000" , vphadduwd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978D7CA" , vphadduwq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D78C1A80000000" , vphadduwq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978D78C1A80000000" , vphadduwq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E26901CB" , vphaddw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269018C2B80000000" , vphaddw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269018C2B80000000" , vphaddw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D01CB" , vphaddw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D018C2B80000000" , vphaddw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D018C2B80000000" , vphaddw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE978C6CA" , vphaddwd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C68C1A80000000" , vphaddwd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978C68C1A80000000" , vphaddwd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978C7CA" , vphaddwq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C78C1A80000000" , vphaddwq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978C78C1A80000000" , vphaddwq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27941CA" , vphminposuw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279418C1A80000000" , vphminposuw(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279418C1A80000000" , vphminposuw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978E1CA" , vphsubbw(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978E18C1A80000000" , vphsubbw(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978E18C1A80000000" , vphsubbw(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E26906CB" , vphsubd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269068C2B80000000" , vphsubd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269068C2B80000000" , vphsubd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D06CB" , vphsubd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D068C2B80000000" , vphsubd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D068C2B80000000" , vphsubd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE978E3CA" , vphsubdq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978E38C1A80000000" , vphsubdq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978E38C1A80000000" , vphsubdq(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E26907CB" , vphsubsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269078C2B80000000" , vphsubsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269078C2B80000000" , vphsubsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D07CB" , vphsubsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D078C2B80000000" , vphsubsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D078C2B80000000" , vphsubsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26905CB" , vphsubw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269058C2B80000000" , vphsubw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269058C2B80000000" , vphsubw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D05CB" , vphsubw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D058C2B80000000" , vphsubw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D058C2B80000000" , vphsubw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE978E2CA" , vphsubwd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978E28C1A80000000" , vphsubwd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE978E28C1A80000000" , vphsubwd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E36920CB01" , vpinsrb(xmm1, xmm2, ebx, 1)); - TEST_INSTRUCTION("C4E369208C2B8000000001" , vpinsrb(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369208C2B8000000001" , vpinsrb(xmm1, xmm2, byte_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36922CB01" , vpinsrd(xmm1, xmm2, ebx, 1)); - TEST_INSTRUCTION("C4E369228C2B8000000001" , vpinsrd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369228C2B8000000001" , vpinsrd(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E922CB01" , vpinsrq(xmm1, xmm2, rbx, 1)); - TEST_INSTRUCTION("C4E3E9228C2B8000000001" , vpinsrq(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9228C2B8000000001" , vpinsrq(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C4CB01" , vpinsrw(xmm1, xmm2, ebx, 1)); - TEST_INSTRUCTION("C5E9C48C2B8000000001" , vpinsrw(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C48C2B8000000001" , vpinsrw(xmm1, xmm2, word_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F27D0844CA" , vplzcntd(xmm1, xmm2)); TEST_INSTRUCTION("62F27D08444C1A08" , vplzcntd(xmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D08444C1A08" , vplzcntd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); @@ -6088,42 +7077,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD4844CA" , vplzcntq(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48444C1A02" , vplzcntq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD48444C1A02" , vplzcntq(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("8FE8689ECB40" , vpmacsdd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8689E8C2B8000000060" , vpmacsdd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8689E8C2B8000000060" , vpmacsdd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8689FCB40" , vpmacsdqh(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8689F8C2B8000000060" , vpmacsdqh(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8689F8C2B8000000060" , vpmacsdqh(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86897CB40" , vpmacsdql(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868978C2B8000000060" , vpmacsdql(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868978C2B8000000060" , vpmacsdql(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8688ECB40" , vpmacssdd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8688E8C2B8000000060" , vpmacssdd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8688E8C2B8000000060" , vpmacssdd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8688FCB40" , vpmacssdqh(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8688F8C2B8000000060" , vpmacssdqh(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8688F8C2B8000000060" , vpmacssdqh(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86887CB40" , vpmacssdql(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868878C2B8000000060" , vpmacssdql(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868878C2B8000000060" , vpmacssdql(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86886CB40" , vpmacsswd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868868C2B8000000060" , vpmacsswd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868868C2B8000000060" , vpmacsswd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86885CB40" , vpmacssww(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868858C2B8000000060" , vpmacssww(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868858C2B8000000060" , vpmacssww(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86896CB40" , vpmacswd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868968C2B8000000060" , vpmacswd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868968C2B8000000060" , vpmacswd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86895CB40" , vpmacsww(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868958C2B8000000060" , vpmacsww(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868958C2B8000000060" , vpmacsww(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868A6CB40" , vpmadcsswd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868A68C2B8000000060" , vpmadcsswd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868A68C2B8000000060" , vpmadcsswd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868B6CB40" , vpmadcswd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868B68C2B8000000060" , vpmadcswd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868B68C2B8000000060" , vpmadcswd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); TEST_INSTRUCTION("62F2ED08B5CB" , vpmadd52huq(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F2ED08B54C2B08" , vpmadd52huq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED08B54C2B08" , vpmadd52huq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -6142,55 +7095,15 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED48B4CB" , vpmadd52luq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48B44C2B02" , vpmadd52luq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48B44C2B02" , vpmadd52luq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26904CB" , vpmaddubsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269048C2B80000000" , vpmaddubsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269048C2B80000000" , vpmaddubsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D04CB" , vpmaddubsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D048C2B80000000" , vpmaddubsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D048C2B80000000" , vpmaddubsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4804CB" , vpmaddubsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48044C2B02" , vpmaddubsw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48044C2B02" , vpmaddubsw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F5CB" , vpmaddwd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F58C2B80000000" , vpmaddwd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F58C2B80000000" , vpmaddwd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF5CB" , vpmaddwd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF58C2B80000000" , vpmaddwd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF58C2B80000000" , vpmaddwd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48F5CB" , vpmaddwd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48F54C2B02" , vpmaddwd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48F54C2B02" , vpmaddwd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2618EA41180000000" , vpmaskmovd(ptr(rcx, rdx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2618EA41180000000" , vpmaskmovd(xmmword_ptr(rcx, rdx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2658EA41180000000" , vpmaskmovd(ptr(rcx, rdx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2658EA41180000000" , vpmaskmovd(ymmword_ptr(rcx, rdx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2698C8C2B80000000" , vpmaskmovd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2698C8C2B80000000" , vpmaskmovd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D8C8C2B80000000" , vpmaskmovd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D8C8C2B80000000" , vpmaskmovd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E18EA41180000000" , vpmaskmovq(ptr(rcx, rdx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2E18EA41180000000" , vpmaskmovq(xmmword_ptr(rcx, rdx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2E58EA41180000000" , vpmaskmovq(ptr(rcx, rdx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2E58EA41180000000" , vpmaskmovq(ymmword_ptr(rcx, rdx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2E98C8C2B80000000" , vpmaskmovq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E98C8C2B80000000" , vpmaskmovq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED8C8C2B80000000" , vpmaskmovq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED8C8C2B80000000" , vpmaskmovq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693CCB" , vpmaxsb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693C8C2B80000000" , vpmaxsb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693C8C2B80000000" , vpmaxsb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3CCB" , vpmaxsb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3C8C2B80000000" , vpmaxsb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3C8C2B80000000" , vpmaxsb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483CCB" , vpmaxsb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483C4C2B02" , vpmaxsb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483C4C2B02" , vpmaxsb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693DCB" , vpmaxsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693D8C2B80000000" , vpmaxsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693D8C2B80000000" , vpmaxsd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3DCB" , vpmaxsd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3D8C2B80000000" , vpmaxsd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3D8C2B80000000" , vpmaxsd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483DCB" , vpmaxsd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483D4C2B02" , vpmaxsd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483D4C2B02" , vpmaxsd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -6203,30 +7116,12 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED483DCB" , vpmaxsq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED483D4C2B02" , vpmaxsq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED483D4C2B02" , vpmaxsq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9EECB" , vpmaxsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EE8C2B80000000" , vpmaxsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9EE8C2B80000000" , vpmaxsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEECB" , vpmaxsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEE8C2B80000000" , vpmaxsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEE8C2B80000000" , vpmaxsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48EECB" , vpmaxsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48EE4C2B02" , vpmaxsw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48EE4C2B02" , vpmaxsw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DECB" , vpmaxub(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DE8C2B80000000" , vpmaxub(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DE8C2B80000000" , vpmaxub(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDECB" , vpmaxub(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDE8C2B80000000" , vpmaxub(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDE8C2B80000000" , vpmaxub(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48DECB" , vpmaxub(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DE4C2B02" , vpmaxub(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48DE4C2B02" , vpmaxub(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693FCB" , vpmaxud(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693F8C2B80000000" , vpmaxud(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693F8C2B80000000" , vpmaxud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3FCB" , vpmaxud(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3F8C2B80000000" , vpmaxud(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3F8C2B80000000" , vpmaxud(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483FCB" , vpmaxud(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483F4C2B02" , vpmaxud(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483F4C2B02" , vpmaxud(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -6239,30 +7134,12 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED483FCB" , vpmaxuq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED483F4C2B02" , vpmaxuq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED483F4C2B02" , vpmaxuq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693ECB" , vpmaxuw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693E8C2B80000000" , vpmaxuw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693E8C2B80000000" , vpmaxuw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3ECB" , vpmaxuw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3E8C2B80000000" , vpmaxuw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3E8C2B80000000" , vpmaxuw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483ECB" , vpmaxuw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483E4C2B02" , vpmaxuw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483E4C2B02" , vpmaxuw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26938CB" , vpminsb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269388C2B80000000" , vpminsb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269388C2B80000000" , vpminsb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D38CB" , vpminsb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D388C2B80000000" , vpminsb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D388C2B80000000" , vpminsb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4838CB" , vpminsb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48384C2B02" , vpminsb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48384C2B02" , vpminsb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26939CB" , vpminsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269398C2B80000000" , vpminsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269398C2B80000000" , vpminsd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D39CB" , vpminsd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D398C2B80000000" , vpminsd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D398C2B80000000" , vpminsd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4839CB" , vpminsd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48394C2B02" , vpminsd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48394C2B02" , vpminsd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -6275,30 +7152,12 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4839CB" , vpminsq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48394C2B02" , vpminsq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48394C2B02" , vpminsq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9EACB" , vpminsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EA8C2B80000000" , vpminsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9EA8C2B80000000" , vpminsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEACB" , vpminsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEA8C2B80000000" , vpminsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEA8C2B80000000" , vpminsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48EACB" , vpminsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48EA4C2B02" , vpminsw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48EA4C2B02" , vpminsw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DACB" , vpminub(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DA8C2B80000000" , vpminub(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9DA8C2B80000000" , vpminub(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDACB" , vpminub(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDA8C2B80000000" , vpminub(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDDA8C2B80000000" , vpminub(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48DACB" , vpminub(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DA4C2B02" , vpminub(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48DA4C2B02" , vpminub(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693BCB" , vpminud(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693B8C2B80000000" , vpminud(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693B8C2B80000000" , vpminud(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3BCB" , vpminud(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3B8C2B80000000" , vpminud(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3B8C2B80000000" , vpminud(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483BCB" , vpminud(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483B4C2B02" , vpminud(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483B4C2B02" , vpminud(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -6311,12 +7170,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED483BCB" , vpminuq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED483B4C2B02" , vpminuq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED483B4C2B02" , vpminuq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693ACB" , vpminuw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693A8C2B80000000" , vpminuw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2693A8C2B80000000" , vpminuw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3ACB" , vpminuw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3A8C2B80000000" , vpminuw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D3A8C2B80000000" , vpminuw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483ACB" , vpminuw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483A4C2B02" , vpminuw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D483A4C2B02" , vpminuw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -6356,8 +7209,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FE0828CA" , vpmovm2w(xmm1, k2)); TEST_INSTRUCTION("62F2FE2828CA" , vpmovm2w(ymm1, k2)); TEST_INSTRUCTION("62F2FE4828CA" , vpmovm2w(zmm1, k2)); - TEST_INSTRUCTION("C5F9D7CA" , vpmovmskb(ecx, xmm2)); - TEST_INSTRUCTION("C5FDD7CA" , vpmovmskb(ecx, ymm2)); TEST_INSTRUCTION("62F2FE0839CA" , vpmovq2m(k1, xmm2)); TEST_INSTRUCTION("62F2FE2839CA" , vpmovq2m(k1, ymm2)); TEST_INSTRUCTION("62F2FE4839CA" , vpmovq2m(k1, zmm2)); @@ -6442,57 +7293,21 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27E4820D1" , vpmovswb(ymm1, zmm2)); TEST_INSTRUCTION("62F27E48205C1104" , vpmovswb(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F27E48205C1104" , vpmovswb(ymmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C4E27921CA" , vpmovsxbd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279218C1A80000000" , vpmovsxbd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279218C1A80000000" , vpmovsxbd(xmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D21CA" , vpmovsxbd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D218C1A80000000" , vpmovsxbd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D218C1A80000000" , vpmovsxbd(ymm1, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4821CA" , vpmovsxbd(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48214C1A08" , vpmovsxbd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48214C1A08" , vpmovsxbd(zmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27922CA" , vpmovsxbq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279228C1A80000000" , vpmovsxbq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279228C1A80000000" , vpmovsxbq(xmm1, word_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D22CA" , vpmovsxbq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D228C1A80000000" , vpmovsxbq(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D228C1A80000000" , vpmovsxbq(ymm1, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4822CA" , vpmovsxbq(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48224C1A10" , vpmovsxbq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48224C1A10" , vpmovsxbq(zmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27920CA" , vpmovsxbw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279208C1A80000000" , vpmovsxbw(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279208C1A80000000" , vpmovsxbw(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D20CA" , vpmovsxbw(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D208C1A80000000" , vpmovsxbw(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D208C1A80000000" , vpmovsxbw(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4820CA" , vpmovsxbw(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48204C1A04" , vpmovsxbw(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48204C1A04" , vpmovsxbw(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27925CA" , vpmovsxdq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279258C1A80000000" , vpmovsxdq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279258C1A80000000" , vpmovsxdq(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D25CA" , vpmovsxdq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D258C1A80000000" , vpmovsxdq(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D258C1A80000000" , vpmovsxdq(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4825CA" , vpmovsxdq(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48254C1A04" , vpmovsxdq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48254C1A04" , vpmovsxdq(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27923CA" , vpmovsxwd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279238C1A80000000" , vpmovsxwd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279238C1A80000000" , vpmovsxwd(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D23CA" , vpmovsxwd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D238C1A80000000" , vpmovsxwd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D238C1A80000000" , vpmovsxwd(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4823CA" , vpmovsxwd(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48234C1A04" , vpmovsxwd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48234C1A04" , vpmovsxwd(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27924CA" , vpmovsxwq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279248C1A80000000" , vpmovsxwq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279248C1A80000000" , vpmovsxwq(xmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D24CA" , vpmovsxwq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D248C1A80000000" , vpmovsxwq(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D248C1A80000000" , vpmovsxwq(ymm1, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4824CA" , vpmovsxwq(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48244C1A08" , vpmovsxwq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48244C1A08" , vpmovsxwq(zmm1, xmmword_ptr(rdx, rbx, 0, 128))); @@ -6562,102 +7377,36 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27E4830D1" , vpmovwb(ymm1, zmm2)); TEST_INSTRUCTION("62F27E48305C1104" , vpmovwb(ptr(rcx, rdx, 0, 128), zmm3)); TEST_INSTRUCTION("62F27E48305C1104" , vpmovwb(ymmword_ptr(rcx, rdx, 0, 128), zmm3)); - TEST_INSTRUCTION("C4E27931CA" , vpmovzxbd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279318C1A80000000" , vpmovzxbd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279318C1A80000000" , vpmovzxbd(xmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D31CA" , vpmovzxbd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D318C1A80000000" , vpmovzxbd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D318C1A80000000" , vpmovzxbd(ymm1, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4831CA" , vpmovzxbd(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48314C1A08" , vpmovzxbd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48314C1A08" , vpmovzxbd(zmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27932CA" , vpmovzxbq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279328C1A80000000" , vpmovzxbq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279328C1A80000000" , vpmovzxbq(xmm1, word_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D32CA" , vpmovzxbq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D328C1A80000000" , vpmovzxbq(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D328C1A80000000" , vpmovzxbq(ymm1, dword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4832CA" , vpmovzxbq(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48324C1A10" , vpmovzxbq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48324C1A10" , vpmovzxbq(zmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27930CA" , vpmovzxbw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279308C1A80000000" , vpmovzxbw(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279308C1A80000000" , vpmovzxbw(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D30CA" , vpmovzxbw(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D308C1A80000000" , vpmovzxbw(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D308C1A80000000" , vpmovzxbw(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4830CA" , vpmovzxbw(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48304C1A04" , vpmovzxbw(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48304C1A04" , vpmovzxbw(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27935CA" , vpmovzxdq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279358C1A80000000" , vpmovzxdq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279358C1A80000000" , vpmovzxdq(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D35CA" , vpmovzxdq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D358C1A80000000" , vpmovzxdq(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D358C1A80000000" , vpmovzxdq(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4835CA" , vpmovzxdq(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48354C1A04" , vpmovzxdq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48354C1A04" , vpmovzxdq(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27933CA" , vpmovzxwd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279338C1A80000000" , vpmovzxwd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279338C1A80000000" , vpmovzxwd(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D33CA" , vpmovzxwd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D338C1A80000000" , vpmovzxwd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D338C1A80000000" , vpmovzxwd(ymm1, xmmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4833CA" , vpmovzxwd(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48334C1A04" , vpmovzxwd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48334C1A04" , vpmovzxwd(zmm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27934CA" , vpmovzxwq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279348C1A80000000" , vpmovzxwq(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279348C1A80000000" , vpmovzxwq(xmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D34CA" , vpmovzxwq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D348C1A80000000" , vpmovzxwq(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D348C1A80000000" , vpmovzxwq(ymm1, qword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D4834CA" , vpmovzxwq(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48344C1A08" , vpmovzxwq(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F27D48344C1A08" , vpmovzxwq(zmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E26928CB" , vpmuldq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269288C2B80000000" , vpmuldq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269288C2B80000000" , vpmuldq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D28CB" , vpmuldq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D288C2B80000000" , vpmuldq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D288C2B80000000" , vpmuldq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED4828CB" , vpmuldq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48284C2B02" , vpmuldq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48284C2B02" , vpmuldq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2690BCB" , vpmulhrsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2690B8C2B80000000" , vpmulhrsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2690B8C2B80000000" , vpmulhrsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D0BCB" , vpmulhrsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D0B8C2B80000000" , vpmulhrsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D0B8C2B80000000" , vpmulhrsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D480BCB" , vpmulhrsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D480B4C2B02" , vpmulhrsw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D480B4C2B02" , vpmulhrsw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E4CB" , vpmulhuw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E48C2B80000000" , vpmulhuw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E48C2B80000000" , vpmulhuw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE4CB" , vpmulhuw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE48C2B80000000" , vpmulhuw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE48C2B80000000" , vpmulhuw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E4CB" , vpmulhuw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E44C2B02" , vpmulhuw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E44C2B02" , vpmulhuw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E5CB" , vpmulhw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E58C2B80000000" , vpmulhw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E58C2B80000000" , vpmulhw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE5CB" , vpmulhw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE58C2B80000000" , vpmulhw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE58C2B80000000" , vpmulhw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E5CB" , vpmulhw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E54C2B02" , vpmulhw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E54C2B02" , vpmulhw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26940CB" , vpmulld(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269408C2B80000000" , vpmulld(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269408C2B80000000" , vpmulld(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D40CB" , vpmulld(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D408C2B80000000" , vpmulld(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D408C2B80000000" , vpmulld(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4840CB" , vpmulld(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48404C2B02" , vpmulld(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48404C2B02" , vpmulld(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -6670,12 +7419,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4840CB" , vpmullq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48404C2B02" , vpmullq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48404C2B02" , vpmullq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D5CB" , vpmullw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9D58C2B80000000" , vpmullw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D58C2B80000000" , vpmullw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD5CB" , vpmullw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDD58C2B80000000" , vpmullw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD58C2B80000000" , vpmullw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48D5CB" , vpmullw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48D54C2B02" , vpmullw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48D54C2B02" , vpmullw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -6688,12 +7431,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4883CB" , vpmultishiftqb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48834C2B02" , vpmultishiftqb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48834C2B02" , vpmultishiftqb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F4CB" , vpmuludq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F48C2B80000000" , vpmuludq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F48C2B80000000" , vpmuludq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF4CB" , vpmuludq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF48C2B80000000" , vpmuludq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF48C2B80000000" , vpmuludq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48F4CB" , vpmuludq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48F44C2B02" , vpmuludq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48F44C2B02" , vpmuludq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -6733,12 +7470,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD4854CA" , vpopcntw(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48544C1A02" , vpopcntw(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD48544C1A02" , vpopcntw(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5E9EBCB" , vpor(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EB8C2B80000000" , vpor(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9EB8C2B80000000" , vpor(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEBCB" , vpor(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEB8C2B80000000" , vpor(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEB8C2B80000000" , vpor(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08EBCB" , vpord(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08EB4C2B08" , vpord(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08EB4C2B08" , vpord(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -6757,11 +7488,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48EBCB" , vporq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48EB4C2B02" , vporq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48EB4C2B02" , vporq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE868A3CB40" , vpperm(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8E8A38C358000000030" , vpperm(xmm1, xmm2, xmm3, ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("8FE8E8A38C358000000030" , vpperm(xmm1, xmm2, xmm3, xmmword_ptr(rbp, rsi, 0, 128))); - TEST_INSTRUCTION("8FE868A38C2B8000000060" , vpperm(xmm1, xmm2, ptr(rbx, rbp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868A38C2B8000000060" , vpperm(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), xmm6)); TEST_INSTRUCTION("62F1750872CA01" , vprold(xmm1, xmm2, 1)); TEST_INSTRUCTION("62F17508724C1A0801" , vprold(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17508724C1A0801" , vprold(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); @@ -6834,44 +7560,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4814CB" , vprorvq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48144C2B02" , vprorvq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48144C2B02" , vprorvq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE96090CA" , vprotb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE878C0CA01" , vprotb(xmm1, xmm2, 1)); - TEST_INSTRUCTION("8FE9E8908C2B80000000" , vprotb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8908C2B80000000" , vprotb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958908C1A80000000" , vprotb(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C08C1A8000000001" , vprotb(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("8FE958908C1A80000000" , vprotb(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C08C1A8000000001" , vprotb(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("8FE96092CA" , vprotd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE878C2CA01" , vprotd(xmm1, xmm2, 1)); - TEST_INSTRUCTION("8FE9E8928C2B80000000" , vprotd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8928C2B80000000" , vprotd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958928C1A80000000" , vprotd(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C28C1A8000000001" , vprotd(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("8FE958928C1A80000000" , vprotd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C28C1A8000000001" , vprotd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("8FE96093CA" , vprotq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE878C3CA01" , vprotq(xmm1, xmm2, 1)); - TEST_INSTRUCTION("8FE9E8938C2B80000000" , vprotq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8938C2B80000000" , vprotq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958938C1A80000000" , vprotq(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C38C1A8000000001" , vprotq(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("8FE958938C1A80000000" , vprotq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C38C1A8000000001" , vprotq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("8FE96091CA" , vprotw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE878C1CA01" , vprotw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("8FE9E8918C2B80000000" , vprotw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8918C2B80000000" , vprotw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958918C1A80000000" , vprotw(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C18C1A8000000001" , vprotw(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("8FE958918C1A80000000" , vprotw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C18C1A8000000001" , vprotw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9F6CB" , vpsadbw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F68C2B80000000" , vpsadbw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F68C2B80000000" , vpsadbw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF6CB" , vpsadbw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF68C2B80000000" , vpsadbw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF68C2B80000000" , vpsadbw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48F6CB" , vpsadbw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48F64C2B02" , vpsadbw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48F64C2B02" , vpsadbw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -6887,36 +7575,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD09A15C1110" , k(k1).vpscatterqq(ptr(rcx, xmm2, 0, 128), xmm3)); TEST_INSTRUCTION("62F2FD29A15C1110" , k(k1).vpscatterqq(ptr(rcx, ymm2, 0, 128), ymm3)); TEST_INSTRUCTION("62F2FD49A15C1110" , k(k1).vpscatterqq(ptr(rcx, zmm2, 0, 128), zmm3)); - TEST_INSTRUCTION("8FE96098CA" , vpshab(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8988C2B80000000" , vpshab(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8988C2B80000000" , vpshab(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958988C1A80000000" , vpshab(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958988C1A80000000" , vpshab(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE9609ACA" , vpshad(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E89A8C2B80000000" , vpshad(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E89A8C2B80000000" , vpshad(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9589A8C1A80000000" , vpshad(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE9589A8C1A80000000" , vpshad(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE9609BCA" , vpshaq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E89B8C2B80000000" , vpshaq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E89B8C2B80000000" , vpshaq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9589B8C1A80000000" , vpshaq(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE9589B8C1A80000000" , vpshaq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE96099CA" , vpshaw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8998C2B80000000" , vpshaw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8998C2B80000000" , vpshaw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958998C1A80000000" , vpshaw(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958998C1A80000000" , vpshaw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE96094CA" , vpshlb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8948C2B80000000" , vpshlb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8948C2B80000000" , vpshlb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958948C1A80000000" , vpshlb(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958948C1A80000000" , vpshlb(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE96096CA" , vpshld(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8968C2B80000000" , vpshld(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8968C2B80000000" , vpshld(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958968C1A80000000" , vpshld(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958968C1A80000000" , vpshld(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); TEST_INSTRUCTION("62F36D0871CB01" , vpshldd(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08714C2B0801" , vpshldd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08714C2B0801" , vpshldd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); @@ -6971,16 +7629,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED4870CB01" , vpshldw(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48704C2B0201" , vpshldw(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48704C2B0201" , vpshldw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("8FE96097CA" , vpshlq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8978C2B80000000" , vpshlq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8978C2B80000000" , vpshlq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958978C1A80000000" , vpshlq(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958978C1A80000000" , vpshlq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE96095CA" , vpshlw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8958C2B80000000" , vpshlw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE9E8958C2B80000000" , vpshlw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("8FE958958C1A80000000" , vpshlw(xmm1, ptr(rdx, rbx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958958C1A80000000" , vpshlw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), xmm4)); TEST_INSTRUCTION("62F36D0873CB01" , vpshrdd(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08734C2B0801" , vpshrdd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08734C2B0801" , vpshrdd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); @@ -7035,12 +7683,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED4872CB01" , vpshrdw(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48724C2B0201" , vpshrdw(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48724C2B0201" , vpshrdw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E26900CB" , vpshufb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269008C2B80000000" , vpshufb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269008C2B80000000" , vpshufb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D00CB" , vpshufb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D008C2B80000000" , vpshufb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D008C2B80000000" , vpshufb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4800CB" , vpshufb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48004C2B02" , vpshufb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48004C2B02" , vpshufb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -7053,59 +7695,15 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D488FCB" , vpshufbitqmb(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D488F4C2B02" , vpshufbitqmb(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D488F4C2B02" , vpshufbitqmb(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5F970CA01" , vpshufd(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5F9708C1A8000000001" , vpshufd(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5F9708C1A8000000001" , vpshufd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FD70CA01" , vpshufd(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5FD708C1A8000000001" , vpshufd(ymm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FD708C1A8000000001" , vpshufd(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17D4870CA01" , vpshufd(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17D48704C1A0201" , vpshufd(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17D48704C1A0201" , vpshufd(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FA70CA01" , vpshufhw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5FA708C1A8000000001" , vpshufhw(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FA708C1A8000000001" , vpshufhw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FE70CA01" , vpshufhw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5FE708C1A8000000001" , vpshufhw(ymm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FE708C1A8000000001" , vpshufhw(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17E4870CA01" , vpshufhw(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17E48704C1A0201" , vpshufhw(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17E48704C1A0201" , vpshufhw(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FB70CA01" , vpshuflw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5FB708C1A8000000001" , vpshuflw(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FB708C1A8000000001" , vpshuflw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FF70CA01" , vpshuflw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5FF708C1A8000000001" , vpshuflw(ymm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5FF708C1A8000000001" , vpshuflw(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17F4870CA01" , vpshuflw(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17F48704C1A0201" , vpshuflw(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17F48704C1A0201" , vpshuflw(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26908CB" , vpsignb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269088C2B80000000" , vpsignb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269088C2B80000000" , vpsignb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D08CB" , vpsignb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D088C2B80000000" , vpsignb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D088C2B80000000" , vpsignb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2690ACB" , vpsignd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2690A8C2B80000000" , vpsignd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2690A8C2B80000000" , vpsignd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D0ACB" , vpsignd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D0A8C2B80000000" , vpsignd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D0A8C2B80000000" , vpsignd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26909CB" , vpsignw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269098C2B80000000" , vpsignw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269098C2B80000000" , vpsignw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D09CB" , vpsignw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D098C2B80000000" , vpsignw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D098C2B80000000" , vpsignw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F2CB" , vpslld(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F172F201" , vpslld(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9F28C2B80000000" , vpslld(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F28C2B80000000" , vpslld(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF2CB" , vpslld(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F572F201" , vpslld(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDF28C2B80000000" , vpslld(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF28C2B80000000" , vpslld(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1750872741A0801" , vpslld(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1750872741A0801" , vpslld(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1752872741A0401" , vpslld(ymm1, ptr(rdx, rbx, 0, 128), 1)); @@ -7116,23 +7714,13 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48F24C2B08" , vpslld(zmm1, zmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1754872741A0201" , vpslld(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1754872741A0201" , vpslld(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5F173FA01" , vpslldq(xmm1, xmm2, 1)); TEST_INSTRUCTION("62F17508737C1A0801" , vpslldq(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17508737C1A0801" , vpslldq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5F573FA01" , vpslldq(ymm1, ymm2, 1)); TEST_INSTRUCTION("62F17528737C1A0401" , vpslldq(ymm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17528737C1A0401" , vpslldq(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1754873FA01" , vpslldq(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17548737C1A0201" , vpslldq(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17548737C1A0201" , vpslldq(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9F3CB" , vpsllq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F173F201" , vpsllq(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9F38C2B80000000" , vpsllq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F38C2B80000000" , vpsllq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF3CB" , vpsllq(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F573F201" , vpsllq(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDF38C2B80000000" , vpsllq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF38C2B80000000" , vpsllq(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1F50873741A0801" , vpsllq(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1F50873741A0801" , vpsllq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1F52873741A0401" , vpsllq(ymm1, ptr(rdx, rbx, 0, 128), 1)); @@ -7143,21 +7731,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48F34C2B08" , vpsllq(zmm1, zmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1F54873741A0201" , vpsllq(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1F54873741A0201" , vpsllq(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26947CB" , vpsllvd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269478C2B80000000" , vpsllvd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269478C2B80000000" , vpsllvd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D47CB" , vpsllvd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D478C2B80000000" , vpsllvd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D478C2B80000000" , vpsllvd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4847CB" , vpsllvd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48474C2B02" , vpsllvd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48474C2B02" , vpsllvd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E947CB" , vpsllvq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9478C2B80000000" , vpsllvq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9478C2B80000000" , vpsllvq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED47CB" , vpsllvq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED478C2B80000000" , vpsllvq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED478C2B80000000" , vpsllvq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED4847CB" , vpsllvq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48474C2B02" , vpsllvq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48474C2B02" , vpsllvq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -7170,14 +7746,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4812CB" , vpsllvw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48124C2B02" , vpsllvw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48124C2B02" , vpsllvw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F1CB" , vpsllw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F171F201" , vpsllw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9F18C2B80000000" , vpsllw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F18C2B80000000" , vpsllw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF1CB" , vpsllw(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F571F201" , vpsllw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDF18C2B80000000" , vpsllw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF18C2B80000000" , vpsllw(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1750871741A0801" , vpsllw(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1750871741A0801" , vpsllw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1752871741A0401" , vpsllw(ymm1, ptr(rdx, rbx, 0, 128), 1)); @@ -7188,14 +7756,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48F14C2B08" , vpsllw(zmm1, zmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1754871741A0201" , vpsllw(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1754871741A0201" , vpsllw(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9E2CB" , vpsrad(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F172E201" , vpsrad(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9E28C2B80000000" , vpsrad(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E28C2B80000000" , vpsrad(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE2CB" , vpsrad(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F572E201" , vpsrad(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDE28C2B80000000" , vpsrad(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE28C2B80000000" , vpsrad(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1750872641A0801" , vpsrad(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1750872641A0801" , vpsrad(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1752872641A0401" , vpsrad(ymm1, ptr(rdx, rbx, 0, 128), 1)); @@ -7224,12 +7784,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48E24C2B08" , vpsraq(zmm1, zmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1F54872641A0201" , vpsraq(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1F54872641A0201" , vpsraq(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26946CB" , vpsravd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269468C2B80000000" , vpsravd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269468C2B80000000" , vpsravd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D46CB" , vpsravd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D468C2B80000000" , vpsravd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D468C2B80000000" , vpsravd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4846CB" , vpsravd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48464C2B02" , vpsravd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48464C2B02" , vpsravd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -7251,14 +7805,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4811CB" , vpsravw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48114C2B02" , vpsravw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48114C2B02" , vpsravw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E1CB" , vpsraw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F171E201" , vpsraw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9E18C2B80000000" , vpsraw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E18C2B80000000" , vpsraw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE1CB" , vpsraw(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F571E201" , vpsraw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDE18C2B80000000" , vpsraw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE18C2B80000000" , vpsraw(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1750871641A0801" , vpsraw(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1750871641A0801" , vpsraw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1752871641A0401" , vpsraw(ymm1, ptr(rdx, rbx, 0, 128), 1)); @@ -7269,14 +7815,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48E14C2B08" , vpsraw(zmm1, zmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1754871641A0201" , vpsraw(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1754871641A0201" , vpsraw(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9D2CB" , vpsrld(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F172D201" , vpsrld(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9D28C2B80000000" , vpsrld(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D28C2B80000000" , vpsrld(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD2CB" , vpsrld(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F572D201" , vpsrld(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDD28C2B80000000" , vpsrld(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD28C2B80000000" , vpsrld(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1750872541A0801" , vpsrld(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1750872541A0801" , vpsrld(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1752872541A0401" , vpsrld(ymm1, ptr(rdx, rbx, 0, 128), 1)); @@ -7287,23 +7825,13 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48D24C2B08" , vpsrld(zmm1, zmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1754872541A0201" , vpsrld(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1754872541A0201" , vpsrld(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5F173DA01" , vpsrldq(xmm1, xmm2, 1)); TEST_INSTRUCTION("62F17508735C1A0801" , vpsrldq(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17508735C1A0801" , vpsrldq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5F573DA01" , vpsrldq(ymm1, ymm2, 1)); TEST_INSTRUCTION("62F17528735C1A0401" , vpsrldq(ymm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17528735C1A0401" , vpsrldq(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1754873DA01" , vpsrldq(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17548735C1A0201" , vpsrldq(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F17548735C1A0201" , vpsrldq(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9D3CB" , vpsrlq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F173D201" , vpsrlq(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9D38C2B80000000" , vpsrlq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D38C2B80000000" , vpsrlq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD3CB" , vpsrlq(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F573D201" , vpsrlq(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDD38C2B80000000" , vpsrlq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD38C2B80000000" , vpsrlq(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1F50873541A0801" , vpsrlq(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1F50873541A0801" , vpsrlq(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1F52873541A0401" , vpsrlq(ymm1, ptr(rdx, rbx, 0, 128), 1)); @@ -7314,21 +7842,9 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48D34C2B08" , vpsrlq(zmm1, zmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1F54873541A0201" , vpsrlq(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1F54873541A0201" , vpsrlq(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26945CB" , vpsrlvd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269458C2B80000000" , vpsrlvd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E269458C2B80000000" , vpsrlvd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D45CB" , vpsrlvd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D458C2B80000000" , vpsrlvd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E26D458C2B80000000" , vpsrlvd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D4845CB" , vpsrlvd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48454C2B02" , vpsrlvd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D48454C2B02" , vpsrlvd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E945CB" , vpsrlvq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9458C2B80000000" , vpsrlvq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2E9458C2B80000000" , vpsrlvq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED45CB" , vpsrlvq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED458C2B80000000" , vpsrlvq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2ED458C2B80000000" , vpsrlvq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED4845CB" , vpsrlvq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48454C2B02" , vpsrlvq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48454C2B02" , vpsrlvq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -7341,14 +7857,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4810CB" , vpsrlvw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48104C2B02" , vpsrlvw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED48104C2B02" , vpsrlvw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D1CB" , vpsrlw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F171D201" , vpsrlw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9D18C2B80000000" , vpsrlw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D18C2B80000000" , vpsrlw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD1CB" , vpsrlw(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F571D201" , vpsrlw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDD18C2B80000000" , vpsrlw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD18C2B80000000" , vpsrlw(ymm1, ymm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1750871541A0801" , vpsrlw(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1750871541A0801" , vpsrlw(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1752871541A0401" , vpsrlw(ymm1, ptr(rdx, rbx, 0, 128), 1)); @@ -7359,75 +7867,27 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48D14C2B08" , vpsrlw(zmm1, zmm2, xmmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1754871541A0201" , vpsrlw(zmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F1754871541A0201" , vpsrlw(zmm1, zmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9F8CB" , vpsubb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F88C2B80000000" , vpsubb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F88C2B80000000" , vpsubb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF8CB" , vpsubb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF88C2B80000000" , vpsubb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF88C2B80000000" , vpsubb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48F8CB" , vpsubb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48F84C2B02" , vpsubb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48F84C2B02" , vpsubb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FACB" , vpsubd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FA8C2B80000000" , vpsubd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FA8C2B80000000" , vpsubd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFACB" , vpsubd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFA8C2B80000000" , vpsubd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFA8C2B80000000" , vpsubd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48FACB" , vpsubd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48FA4C2B02" , vpsubd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48FA4C2B02" , vpsubd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FBCB" , vpsubq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FB8C2B80000000" , vpsubq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9FB8C2B80000000" , vpsubq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFBCB" , vpsubq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFB8C2B80000000" , vpsubq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDFB8C2B80000000" , vpsubq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48FBCB" , vpsubq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48FB4C2B02" , vpsubq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48FB4C2B02" , vpsubq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E8CB" , vpsubsb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E88C2B80000000" , vpsubsb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E88C2B80000000" , vpsubsb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE8CB" , vpsubsb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE88C2B80000000" , vpsubsb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE88C2B80000000" , vpsubsb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E8CB" , vpsubsb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E84C2B02" , vpsubsb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E84C2B02" , vpsubsb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E9CB" , vpsubsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E98C2B80000000" , vpsubsw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9E98C2B80000000" , vpsubsw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE9CB" , vpsubsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE98C2B80000000" , vpsubsw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDE98C2B80000000" , vpsubsw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E9CB" , vpsubsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E94C2B02" , vpsubsw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48E94C2B02" , vpsubsw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D8CB" , vpsubusb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9D88C2B80000000" , vpsubusb(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D88C2B80000000" , vpsubusb(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD8CB" , vpsubusb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDD88C2B80000000" , vpsubusb(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD88C2B80000000" , vpsubusb(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48D8CB" , vpsubusb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48D84C2B02" , vpsubusb(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48D84C2B02" , vpsubusb(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D9CB" , vpsubusw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9D98C2B80000000" , vpsubusw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9D98C2B80000000" , vpsubusw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD9CB" , vpsubusw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDD98C2B80000000" , vpsubusw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDD98C2B80000000" , vpsubusw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48D9CB" , vpsubusw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48D94C2B02" , vpsubusw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48D94C2B02" , vpsubusw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F9CB" , vpsubw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F98C2B80000000" , vpsubw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9F98C2B80000000" , vpsubw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF9CB" , vpsubw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF98C2B80000000" , vpsubw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDF98C2B80000000" , vpsubw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48F9CB" , vpsubw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48F94C2B02" , vpsubw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48F94C2B02" , vpsubw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); @@ -7449,12 +7909,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED4825CB01" , vpternlogq(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48254C2B0201" , vpternlogq(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48254C2B0201" , vpternlogq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E27917CA" , vptest(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279178C1A80000000" , vptest(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E279178C1A80000000" , vptest(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D17CA" , vptest(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D178C1A80000000" , vptest(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D178C1A80000000" , vptest(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F26D0826CB" , vptestmb(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D08264C2B08" , vptestmb(k1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D08264C2B08" , vptestmb(k1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -7527,84 +7981,30 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2EE4826CB" , vptestnmw(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F2EE48264C2B02" , vptestnmw(k1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2EE48264C2B02" , vptestnmw(k1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E968CB" , vpunpckhbw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9688C2B80000000" , vpunpckhbw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9688C2B80000000" , vpunpckhbw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED68CB" , vpunpckhbw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED688C2B80000000" , vpunpckhbw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED688C2B80000000" , vpunpckhbw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4868CB" , vpunpckhbw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48684C2B02" , vpunpckhbw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48684C2B02" , vpunpckhbw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E96ACB" , vpunpckhdq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E96A8C2B80000000" , vpunpckhdq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E96A8C2B80000000" , vpunpckhdq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED6ACB" , vpunpckhdq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED6A8C2B80000000" , vpunpckhdq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED6A8C2B80000000" , vpunpckhdq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D486ACB" , vpunpckhdq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D486A4C2B02" , vpunpckhdq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D486A4C2B02" , vpunpckhdq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E96DCB" , vpunpckhqdq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E96D8C2B80000000" , vpunpckhqdq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E96D8C2B80000000" , vpunpckhqdq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED6DCB" , vpunpckhqdq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED6D8C2B80000000" , vpunpckhqdq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED6D8C2B80000000" , vpunpckhqdq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED486DCB" , vpunpckhqdq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED486D4C2B02" , vpunpckhqdq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED486D4C2B02" , vpunpckhqdq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E969CB" , vpunpckhwd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9698C2B80000000" , vpunpckhwd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9698C2B80000000" , vpunpckhwd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED69CB" , vpunpckhwd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED698C2B80000000" , vpunpckhwd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED698C2B80000000" , vpunpckhwd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4869CB" , vpunpckhwd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48694C2B02" , vpunpckhwd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48694C2B02" , vpunpckhwd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E960CB" , vpunpcklbw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9608C2B80000000" , vpunpcklbw(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9608C2B80000000" , vpunpcklbw(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED60CB" , vpunpcklbw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED608C2B80000000" , vpunpcklbw(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED608C2B80000000" , vpunpcklbw(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4860CB" , vpunpcklbw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48604C2B02" , vpunpcklbw(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48604C2B02" , vpunpcklbw(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E962CB" , vpunpckldq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9628C2B80000000" , vpunpckldq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9628C2B80000000" , vpunpckldq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED62CB" , vpunpckldq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED628C2B80000000" , vpunpckldq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED628C2B80000000" , vpunpckldq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4862CB" , vpunpckldq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48624C2B02" , vpunpckldq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48624C2B02" , vpunpckldq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E96CCB" , vpunpcklqdq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E96C8C2B80000000" , vpunpcklqdq(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E96C8C2B80000000" , vpunpcklqdq(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED6CCB" , vpunpcklqdq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED6C8C2B80000000" , vpunpcklqdq(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED6C8C2B80000000" , vpunpcklqdq(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED486CCB" , vpunpcklqdq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED486C4C2B02" , vpunpcklqdq(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED486C4C2B02" , vpunpcklqdq(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E961CB" , vpunpcklwd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9618C2B80000000" , vpunpcklwd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9618C2B80000000" , vpunpcklwd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED61CB" , vpunpcklwd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED618C2B80000000" , vpunpcklwd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED618C2B80000000" , vpunpcklwd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D4861CB" , vpunpcklwd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48614C2B02" , vpunpcklwd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D48614C2B02" , vpunpcklwd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9EFCB" , vpxor(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EF8C2B80000000" , vpxor(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9EF8C2B80000000" , vpxor(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEFCB" , vpxor(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEF8C2B80000000" , vpxor(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EDEF8C2B80000000" , vpxor(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08EFCB" , vpxord(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08EF4C2B08" , vpxord(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16D08EF4C2B08" , vpxord(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -7683,15 +8083,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D08CBCB" , vrcp28ss(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D08CB4C2B20" , vrcp28ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D08CB4C2B20" , vrcp28ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5F853CA" , vrcpps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8538C1A80000000" , vrcpps(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F8538C1A80000000" , vrcpps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC53CA" , vrcpps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC538C1A80000000" , vrcpps(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC538C1A80000000" , vrcpps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5EA53CB" , vrcpss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA538C2B80000000" , vrcpss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA538C2B80000000" , vrcpss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F3FD0856CA01" , vreducepd(xmm1, xmm2, 1)); TEST_INSTRUCTION("62F3FD08564C1A0801" , vreducepd(xmm1, ptr(rdx, rbx, 0, 128), 1)); TEST_INSTRUCTION("62F3FD08564C1A0801" , vreducepd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); @@ -7740,24 +8131,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D080ACB01" , vrndscaless(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D080A4C2B2001" , vrndscaless(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F36D080A4C2B2001" , vrndscaless(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E37909CA01" , vroundpd(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E379098C1A8000000001" , vroundpd(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E379098C1A8000000001" , vroundpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D09CA01" , vroundpd(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D098C1A8000000001" , vroundpd(ymm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D098C1A8000000001" , vroundpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37908CA01" , vroundps(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E379088C1A8000000001" , vroundps(xmm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E379088C1A8000000001" , vroundps(xmm1, xmmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D08CA01" , vroundps(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D088C1A8000000001" , vroundps(ymm1, ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D088C1A8000000001" , vroundps(ymm1, ymmword_ptr(rdx, rbx, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690BCB01" , vroundsd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690B8C2B8000000001" , vroundsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690B8C2B8000000001" , vroundsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690ACB01" , vroundss(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690A8C2B8000000001" , vroundss(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690A8C2B8000000001" , vroundss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F2FD084ECA" , vrsqrt14pd(xmm1, xmm2)); TEST_INSTRUCTION("62F2FD084E4C1A08" , vrsqrt14pd(xmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F2FD084E4C1A08" , vrsqrt14pd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); @@ -7794,15 +8167,6 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D08CDCB" , vrsqrt28ss(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D08CD4C2B20" , vrsqrt28ss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F26D08CD4C2B20" , vrsqrt28ss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5F852CA" , vrsqrtps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8528C1A80000000" , vrsqrtps(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F8528C1A80000000" , vrsqrtps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC52CA" , vrsqrtps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC528C1A80000000" , vrsqrtps(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC528C1A80000000" , vrsqrtps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5EA52CB" , vrsqrtss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA528C2B80000000" , vrsqrtss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA528C2B80000000" , vrsqrtss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED082CCB" , vscalefpd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F2ED082C4C2B08" , vscalefpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F2ED082C4C2B08" , vscalefpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); @@ -7871,148 +8235,42 @@ static void ASMJIT_NOINLINE testX64AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED4843CB01" , vshufi64x2(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48434C2B0201" , vshufi64x2(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48434C2B0201" , vshufi64x2(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C6CB01" , vshufpd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5E9C68C2B8000000001" , vshufpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C68C2B8000000001" , vshufpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5EDC6CB01" , vshufpd(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C5EDC68C2B8000000001" , vshufpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5EDC68C2B8000000001" , vshufpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED48C6CB01" , vshufpd(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F1ED48C64C2B0201" , vshufpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED48C64C2B0201" , vshufpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E8C6CB01" , vshufps(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5E8C68C2B8000000001" , vshufps(xmm1, xmm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5E8C68C2B8000000001" , vshufps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5ECC6CB01" , vshufps(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C5ECC68C2B8000000001" , vshufps(ymm1, ymm2, ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5ECC68C2B8000000001" , vshufps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16C48C6CB01" , vshufps(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F16C48C64C2B0201" , vshufps(zmm1, zmm2, ptr(rbx, rbp, 0, 128), 1)); TEST_INSTRUCTION("62F16C48C64C2B0201" , vshufps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128), 1)); - TEST_INSTRUCTION("C5F951CA" , vsqrtpd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F9518C1A80000000" , vsqrtpd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F9518C1A80000000" , vsqrtpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD51CA" , vsqrtpd(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD518C1A80000000" , vsqrtpd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FD518C1A80000000" , vsqrtpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD4851CA" , vsqrtpd(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48514C1A02" , vsqrtpd(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F1FD48514C1A02" , vsqrtpd(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F851CA" , vsqrtps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8518C1A80000000" , vsqrtps(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F8518C1A80000000" , vsqrtps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC51CA" , vsqrtps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC518C1A80000000" , vsqrtps(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5FC518C1A80000000" , vsqrtps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C4851CA" , vsqrtps(zmm1, zmm2)); TEST_INSTRUCTION("62F17C48514C1A02" , vsqrtps(zmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("62F17C48514C1A02" , vsqrtps(zmm1, zmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5EB51CB" , vsqrtsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB518C2B80000000" , vsqrtsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB518C2B80000000" , vsqrtsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA51CB" , vsqrtss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA518C2B80000000" , vsqrtss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA518C2B80000000" , vsqrtss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5F8AE9C1180000000" , vstmxcsr(ptr(rcx, rdx, 0, 128))); - TEST_INSTRUCTION("C5F8AE9C1180000000" , vstmxcsr(dword_ptr(rcx, rdx, 0, 128))); - TEST_INSTRUCTION("C5E95CCB" , vsubpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E95C8C2B80000000" , vsubpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E95C8C2B80000000" , vsubpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED5CCB" , vsubpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED5C8C2B80000000" , vsubpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED5C8C2B80000000" , vsubpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED485CCB" , vsubpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED485C4C2B02" , vsubpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED485C4C2B02" , vsubpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E85CCB" , vsubps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E85C8C2B80000000" , vsubps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E85C8C2B80000000" , vsubps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC5CCB" , vsubps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC5C8C2B80000000" , vsubps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC5C8C2B80000000" , vsubps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C485CCB" , vsubps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C485C4C2B02" , vsubps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C485C4C2B02" , vsubps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB5CCB" , vsubsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5C8C2B80000000" , vsubsd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EB5C8C2B80000000" , vsubsd(xmm1, xmm2, qword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5CCB" , vsubss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5C8C2B80000000" , vsubss(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EA5C8C2B80000000" , vsubss(xmm1, xmm2, dword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C4E2790FCA" , vtestpd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2790F8C1A80000000" , vtestpd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2790F8C1A80000000" , vtestpd(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D0FCA" , vtestpd(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D0F8C1A80000000" , vtestpd(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D0F8C1A80000000" , vtestpd(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2790ECA" , vtestps(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2790E8C1A80000000" , vtestps(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E2790E8C1A80000000" , vtestps(xmm1, xmmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D0ECA" , vtestps(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D0E8C1A80000000" , vtestps(ymm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C4E27D0E8C1A80000000" , vtestps(ymm1, ymmword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F92ECA" , vucomisd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F92E8C1A80000000" , vucomisd(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F92E8C1A80000000" , vucomisd(xmm1, qword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F82ECA" , vucomiss(xmm1, xmm2)); - TEST_INSTRUCTION("C5F82E8C1A80000000" , vucomiss(xmm1, ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5F82E8C1A80000000" , vucomiss(xmm1, dword_ptr(rdx, rbx, 0, 128))); - TEST_INSTRUCTION("C5E915CB" , vunpckhpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9158C2B80000000" , vunpckhpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9158C2B80000000" , vunpckhpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED15CB" , vunpckhpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED158C2B80000000" , vunpckhpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED158C2B80000000" , vunpckhpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED4815CB" , vunpckhpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48154C2B02" , vunpckhpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48154C2B02" , vunpckhpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E815CB" , vunpckhps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8158C2B80000000" , vunpckhps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E8158C2B80000000" , vunpckhps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC15CB" , vunpckhps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC158C2B80000000" , vunpckhps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC158C2B80000000" , vunpckhps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C4815CB" , vunpckhps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48154C2B02" , vunpckhps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C48154C2B02" , vunpckhps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E914CB" , vunpcklpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9148C2B80000000" , vunpcklpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9148C2B80000000" , vunpcklpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED14CB" , vunpcklpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED148C2B80000000" , vunpcklpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED148C2B80000000" , vunpcklpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED4814CB" , vunpcklpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48144C2B02" , vunpcklpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48144C2B02" , vunpcklpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E814CB" , vunpcklps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8148C2B80000000" , vunpcklps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E8148C2B80000000" , vunpcklps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC14CB" , vunpcklps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC148C2B80000000" , vunpcklps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC148C2B80000000" , vunpcklps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C4814CB" , vunpcklps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48144C2B02" , vunpcklps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C48144C2B02" , vunpcklps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E957CB" , vxorpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9578C2B80000000" , vxorpd(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E9578C2B80000000" , vxorpd(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED57CB" , vxorpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED578C2B80000000" , vxorpd(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5ED578C2B80000000" , vxorpd(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED4857CB" , vxorpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48574C2B02" , vxorpd(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F1ED48574C2B02" , vxorpd(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E857CB" , vxorps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8578C2B80000000" , vxorps(xmm1, xmm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5E8578C2B80000000" , vxorps(xmm1, xmm2, xmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC57CB" , vxorps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC578C2B80000000" , vxorps(ymm1, ymm2, ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5EC578C2B80000000" , vxorps(ymm1, ymm2, ymmword_ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C4857CB" , vxorps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48574C2B02" , vxorps(zmm1, zmm2, ptr(rbx, rbp, 0, 128))); TEST_INSTRUCTION("62F16C48574C2B02" , vxorps(zmm1, zmm2, zmmword_ptr(rbx, rbp, 0, 128))); - TEST_INSTRUCTION("C5FC77" , vzeroall()); - TEST_INSTRUCTION("C5F877" , vzeroupper()); } static void ASMJIT_NOINLINE testX64AssemblerAVX512_FP16(AssemblerTester& tester) noexcept { @@ -17641,11 +17899,14 @@ static void ASMJIT_NOINLINE testX64AssemblerAMX(AssemblerTester& TEST_INSTRUCTION("C4E27849841180000000" , ldtilecfg(zmmword_ptr(rcx, rdx, 0, 128))); TEST_INSTRUCTION("C4E27949841180000000" , sttilecfg(ptr(rcx, rdx, 0, 128))); TEST_INSTRUCTION("C4E27949841180000000" , sttilecfg(zmmword_ptr(rcx, rdx, 0, 128))); + TEST_INSTRUCTION("C4E2616CCA" , tcmmimfp16ps(tmm1, tmm2, tmm3)); + TEST_INSTRUCTION("C4E2606CCA" , tcmmrlfp16ps(tmm1, tmm2, tmm3)); TEST_INSTRUCTION("C4E2625CCA" , tdpbf16ps(tmm1, tmm2, tmm3)); TEST_INSTRUCTION("C4E2635ECA" , tdpbssd(tmm1, tmm2, tmm3)); TEST_INSTRUCTION("C4E2625ECA" , tdpbsud(tmm1, tmm2, tmm3)); TEST_INSTRUCTION("C4E2615ECA" , tdpbusd(tmm1, tmm2, tmm3)); TEST_INSTRUCTION("C4E2605ECA" , tdpbuud(tmm1, tmm2, tmm3)); + TEST_INSTRUCTION("C4E2635CCA" , tdpfp16ps(tmm1, tmm2, tmm3)); TEST_INSTRUCTION("C4E27B4B8C1A80000000" , tileloadd(tmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("C4E2794B8C1A80000000" , tileloaddt1(tmm1, ptr(rdx, rbx, 0, 128))); TEST_INSTRUCTION("C4E27849C0" , tilerelease()); @@ -17799,10 +18060,6 @@ static void ASMJIT_NOINLINE testX64AssemblerExtras(AssemblerTester& tester) noexcept { using namespace x86; TEST_INSTRUCTION("37" , aaa(ax)); TEST_INSTRUCTION("D501" , aad(ax, 1)); + TEST_INSTRUCTION("0F38FC9C1180000000" , aadd(ptr(ecx, edx, 0, 128), ebx)); + TEST_INSTRUCTION("0F38FC9C1180000000" , aadd(dword_ptr(ecx, edx, 0, 128), ebx)); TEST_INSTRUCTION("D401" , aam(ax, 1)); + TEST_INSTRUCTION("660F38FC9C1180000000" , aand(ptr(ecx, edx, 0, 128), ebx)); + TEST_INSTRUCTION("660F38FC9C1180000000" , aand(dword_ptr(ecx, edx, 0, 128), ebx)); TEST_INSTRUCTION("3F" , aas(ax)); TEST_INSTRUCTION("80D101" , adc(cl, 1)); TEST_INSTRUCTION("80D501" , adc(ch, 1)); @@ -119,9 +126,13 @@ static void ASMJIT_NOINLINE testX86AssemblerBase(AssemblerTester TEST_INSTRUCTION("C4E268F2CB" , andn(ecx, edx, ebx)); TEST_INSTRUCTION("C4E268F28C2B80000000" , andn(ecx, edx, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("C4E268F28C2B80000000" , andn(ecx, edx, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("F20F38FC9C1180000000" , aor(ptr(ecx, edx, 0, 128), ebx)); + TEST_INSTRUCTION("F20F38FC9C1180000000" , aor(dword_ptr(ecx, edx, 0, 128), ebx)); TEST_INSTRUCTION("63D1" , arpl(cx, dx)); TEST_INSTRUCTION("639C1180000000" , arpl(ptr(ecx, edx, 0, 128), bx)); TEST_INSTRUCTION("639C1180000000" , arpl(word_ptr(ecx, edx, 0, 128), bx)); + TEST_INSTRUCTION("F30F38FC9C1180000000" , axor(ptr(ecx, edx, 0, 128), ebx)); + TEST_INSTRUCTION("F30F38FC9C1180000000" , axor(dword_ptr(ecx, edx, 0, 128), ebx)); TEST_INSTRUCTION("C4E260F7CA" , bextr(ecx, edx, ebx)); TEST_INSTRUCTION("C4E258F78C1A80000000" , bextr(ecx, ptr(edx, ebx, 0, 128), esp)); TEST_INSTRUCTION("C4E258F78C1A80000000" , bextr(ecx, dword_ptr(edx, ebx, 0, 128), esp)); @@ -457,9 +468,39 @@ static void ASMJIT_NOINLINE testX86AssemblerBase(AssemblerTester TEST_INSTRUCTION("663B8C1A80000000" , cmp(cx, word_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("3B8C1A80000000" , cmp(ecx, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("3B8C1A80000000" , cmp(ecx, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E259E69C1180000000" , cmpbexadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E69C1180000000" , cmpbexadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E29C1180000000" , cmpbxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E29C1180000000" , cmpbxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EE9C1180000000" , cmplexadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EE9C1180000000" , cmplexadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EC9C1180000000" , cmplxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EC9C1180000000" , cmplxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E79C1180000000" , cmpnbexadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E79C1180000000" , cmpnbexadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E39C1180000000" , cmpnbxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E39C1180000000" , cmpnbxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EF9C1180000000" , cmpnlexadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EF9C1180000000" , cmpnlexadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259ED9C1180000000" , cmpnlxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259ED9C1180000000" , cmpnlxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E19C1180000000" , cmpnoxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E19C1180000000" , cmpnoxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EB9C1180000000" , cmpnpxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EB9C1180000000" , cmpnpxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E99C1180000000" , cmpnsxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E99C1180000000" , cmpnsxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E59C1180000000" , cmpnzxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E59C1180000000" , cmpnzxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E09C1180000000" , cmpoxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E09C1180000000" , cmpoxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EA9C1180000000" , cmppxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259EA9C1180000000" , cmppxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); TEST_INSTRUCTION("A6" , cmps(byte_ptr(esi), byte_ptr(edi))); TEST_INSTRUCTION("66A7" , cmps(word_ptr(esi), word_ptr(edi))); TEST_INSTRUCTION("A7" , cmps(dword_ptr(esi), dword_ptr(edi))); + TEST_INSTRUCTION("C4E259E89C1180000000" , cmpsxadd(ptr(ecx, edx, 0, 128), ebx, esp)); + TEST_INSTRUCTION("C4E259E89C1180000000" , cmpsxadd(dword_ptr(ecx, edx, 0, 128), ebx, esp)); TEST_INSTRUCTION("0FB0D1" , cmpxchg(cl, dl, al)); TEST_INSTRUCTION("0FB0F1" , cmpxchg(cl, dh, al)); TEST_INSTRUCTION("0FB0D5" , cmpxchg(ch, dl, al)); @@ -545,9 +586,11 @@ static void ASMJIT_NOINLINE testX86AssemblerBase(AssemblerTester TEST_INSTRUCTION("6BC901" , imul(ecx, 1)); TEST_INSTRUCTION("0FAF8C1A80000000" , imul(ecx, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("0FAF8C1A80000000" , imul(ecx, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("666BC901" , imul(cx, cx, 1)); TEST_INSTRUCTION("666BCA01" , imul(cx, dx, 1)); TEST_INSTRUCTION("666B8C1A8000000001" , imul(cx, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("666B8C1A8000000001" , imul(cx, word_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("6BC901" , imul(ecx, ecx, 1)); TEST_INSTRUCTION("6BCA01" , imul(ecx, edx, 1)); TEST_INSTRUCTION("6B8C1A8000000001" , imul(ecx, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("6B8C1A8000000001" , imul(ecx, dword_ptr(edx, ebx, 0, 128), 1)); @@ -2533,6 +2576,2365 @@ static void ASMJIT_NOINLINE testX86AssemblerMMX_SSE(AssemblerTester& tester) noexcept { using namespace x86; + TEST_INSTRUCTION("C5E958CB" , vaddpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9588C2B80000000" , vaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9588C2B80000000" , vaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED58CB" , vaddpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED588C2B80000000" , vaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED588C2B80000000" , vaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E858CB" , vaddps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8588C2B80000000" , vaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8588C2B80000000" , vaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC58CB" , vaddps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC588C2B80000000" , vaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC588C2B80000000" , vaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB58CB" , vaddsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB588C2B80000000" , vaddsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB588C2B80000000" , vaddsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA58CB" , vaddss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA588C2B80000000" , vaddss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA588C2B80000000" , vaddss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D0CB" , vaddsubpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9D08C2B80000000" , vaddsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D08C2B80000000" , vaddsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD0CB" , vaddsubpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDD08C2B80000000" , vaddsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD08C2B80000000" , vaddsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EBD0CB" , vaddsubps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EBD08C2B80000000" , vaddsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EBD08C2B80000000" , vaddsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EFD0CB" , vaddsubps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EFD08C2B80000000" , vaddsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EFD08C2B80000000" , vaddsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DECB" , vaesdec(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269DE8C2B80000000" , vaesdec(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DE8C2B80000000" , vaesdec(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DDECB" , vaesdec(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DDE8C2B80000000" , vaesdec(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DDE8C2B80000000" , vaesdec(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DFCB" , vaesdeclast(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269DF8C2B80000000" , vaesdeclast(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DF8C2B80000000" , vaesdeclast(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DDFCB" , vaesdeclast(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DDF8C2B80000000" , vaesdeclast(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DDF8C2B80000000" , vaesdeclast(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DCCB" , vaesenc(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269DC8C2B80000000" , vaesenc(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DC8C2B80000000" , vaesenc(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DDCCB" , vaesenc(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DDC8C2B80000000" , vaesenc(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DDC8C2B80000000" , vaesenc(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DDCB" , vaesenclast(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269DD8C2B80000000" , vaesenclast(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DD8C2B80000000" , vaesenclast(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DDDCB" , vaesenclast(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DDD8C2B80000000" , vaesenclast(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DDD8C2B80000000" , vaesenclast(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E279DBCA" , vaesimc(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279DB8C1A80000000" , vaesimc(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279DB8C1A80000000" , vaesimc(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E379DFCA01" , vaeskeygenassist(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E379DF8C1A8000000001" , vaeskeygenassist(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E379DF8C1A8000000001" , vaeskeygenassist(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5E955CB" , vandnpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9558C2B80000000" , vandnpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9558C2B80000000" , vandnpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED55CB" , vandnpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED558C2B80000000" , vandnpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED558C2B80000000" , vandnpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E855CB" , vandnps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8558C2B80000000" , vandnps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8558C2B80000000" , vandnps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC55CB" , vandnps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC558C2B80000000" , vandnps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC558C2B80000000" , vandnps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E954CB" , vandpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9548C2B80000000" , vandpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9548C2B80000000" , vandpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED54CB" , vandpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED548C2B80000000" , vandpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED548C2B80000000" , vandpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E854CB" , vandps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8548C2B80000000" , vandps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8548C2B80000000" , vandps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC54CB" , vandps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC548C2B80000000" , vandps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC548C2B80000000" , vandps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E3690DCB01" , vblendpd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690D8C2B8000000001" , vblendpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690D8C2B8000000001" , vblendpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0DCB01" , vblendpd(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D0D8C2B8000000001" , vblendpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0D8C2B8000000001" , vblendpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690CCB01" , vblendps(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690C8C2B8000000001" , vblendps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690C8C2B8000000001" , vblendps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0CCB01" , vblendps(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D0C8C2B8000000001" , vblendps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0C8C2B8000000001" , vblendps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3694BCB40" , vblendvpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3694B8C2B8000000060" , vblendvpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3694B8C2B8000000060" , vblendvpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E36D4BCB40" , vblendvpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E36D4B8C2B8000000060" , vblendvpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D4B8C2B8000000060" , vblendvpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3694ACB40" , vblendvps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3694A8C2B8000000060" , vblendvps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3694A8C2B8000000060" , vblendvps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E36D4ACB40" , vblendvps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E36D4A8C2B8000000060" , vblendvps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D4A8C2B8000000060" , vblendvps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E27D1A8C1A80000000" , vbroadcastf128(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D1A8C1A80000000" , vbroadcastf128(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D5A8C1A80000000" , vbroadcasti128(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D5A8C1A80000000" , vbroadcasti128(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D19CA" , vbroadcastsd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D198C1A80000000" , vbroadcastsd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D198C1A80000000" , vbroadcastsd(ymm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27918CA" , vbroadcastss(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279188C1A80000000" , vbroadcastss(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279188C1A80000000" , vbroadcastss(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D18CA" , vbroadcastss(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D188C1A80000000" , vbroadcastss(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D188C1A80000000" , vbroadcastss(ymm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5E9C2CB01" , vcmppd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5E9C28C2B8000000001" , vcmppd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9C28C2B8000000001" , vcmppd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5EDC2CB01" , vcmppd(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C5EDC28C2B8000000001" , vcmppd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5EDC28C2B8000000001" , vcmppd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E8C2CB01" , vcmpps(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5E8C28C2B8000000001" , vcmpps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E8C28C2B8000000001" , vcmpps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5ECC2CB01" , vcmpps(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C5ECC28C2B8000000001" , vcmpps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5ECC28C2B8000000001" , vcmpps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5EBC2CB01" , vcmpsd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5EBC28C2B8000000001" , vcmpsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5EBC28C2B8000000001" , vcmpsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5EAC2CB01" , vcmpss(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5EAC28C2B8000000001" , vcmpss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5EAC28C2B8000000001" , vcmpss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5F92FCA" , vcomisd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F92F8C1A80000000" , vcomisd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F92F8C1A80000000" , vcomisd(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F82FCA" , vcomiss(xmm1, xmm2)); + TEST_INSTRUCTION("C5F82F8C1A80000000" , vcomiss(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F82F8C1A80000000" , vcomiss(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FAE6CA" , vcvtdq2pd(xmm1, xmm2)); + TEST_INSTRUCTION("C5FAE68C1A80000000" , vcvtdq2pd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FAE68C1A80000000" , vcvtdq2pd(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FEE6CA" , vcvtdq2pd(ymm1, xmm2)); + TEST_INSTRUCTION("C5FEE68C1A80000000" , vcvtdq2pd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FEE68C1A80000000" , vcvtdq2pd(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F85BCA" , vcvtdq2ps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F85B8C1A80000000" , vcvtdq2ps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F85B8C1A80000000" , vcvtdq2ps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC5BCA" , vcvtdq2ps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC5B8C1A80000000" , vcvtdq2ps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC5B8C1A80000000" , vcvtdq2ps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FBE6CA" , vcvtpd2dq(xmm1, xmm2)); + TEST_INSTRUCTION("C5FFE6CA" , vcvtpd2dq(xmm1, ymm2)); + TEST_INSTRUCTION("C5FBE68C1A80000000" , vcvtpd2dq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FFE68C1A80000000" , vcvtpd2dq(xmm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F95ACA" , vcvtpd2ps(xmm1, xmm2)); + TEST_INSTRUCTION("C5FD5ACA" , vcvtpd2ps(xmm1, ymm2)); + TEST_INSTRUCTION("C5F95A8C1A80000000" , vcvtpd2ps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD5A8C1A80000000" , vcvtpd2ps(xmm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27913CA" , vcvtph2ps(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279138C1A80000000" , vcvtph2ps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279138C1A80000000" , vcvtph2ps(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D13CA" , vcvtph2ps(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D138C1A80000000" , vcvtph2ps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D138C1A80000000" , vcvtph2ps(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F95BCA" , vcvtps2dq(xmm1, xmm2)); + TEST_INSTRUCTION("C5F95B8C1A80000000" , vcvtps2dq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F95B8C1A80000000" , vcvtps2dq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD5BCA" , vcvtps2dq(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD5B8C1A80000000" , vcvtps2dq(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD5B8C1A80000000" , vcvtps2dq(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F85ACA" , vcvtps2pd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F85A8C1A80000000" , vcvtps2pd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F85A8C1A80000000" , vcvtps2pd(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC5ACA" , vcvtps2pd(ymm1, xmm2)); + TEST_INSTRUCTION("C5FC5A8C1A80000000" , vcvtps2pd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC5A8C1A80000000" , vcvtps2pd(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E3791DD101" , vcvtps2ph(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E3791D9C118000000001" , vcvtps2ph(ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E3791D9C118000000001" , vcvtps2ph(qword_ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E37D1DD101" , vcvtps2ph(xmm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D1D9C118000000001" , vcvtps2ph(ptr(ecx, edx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37D1D9C118000000001" , vcvtps2ph(xmmword_ptr(ecx, edx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C5FB2DCA" , vcvtsd2si(ecx, xmm2)); + TEST_INSTRUCTION("C5FB2D8C1A80000000" , vcvtsd2si(ecx, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FB2D8C1A80000000" , vcvtsd2si(ecx, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5EB5ACB" , vcvtsd2ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5A8C2B80000000" , vcvtsd2ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB5A8C2B80000000" , vcvtsd2ss(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB2ACB" , vcvtsi2sd(xmm1, xmm2, ebx)); + TEST_INSTRUCTION("C5EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA2ACB" , vcvtsi2ss(xmm1, xmm2, ebx)); + TEST_INSTRUCTION("C5EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5ACB" , vcvtss2sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5A8C2B80000000" , vcvtss2sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5A8C2B80000000" , vcvtss2sd(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5FA2DCA" , vcvtss2si(ecx, xmm2)); + TEST_INSTRUCTION("C5FA2D8C1A80000000" , vcvtss2si(ecx, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA2D8C1A80000000" , vcvtss2si(ecx, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F9E6CA" , vcvttpd2dq(xmm1, xmm2)); + TEST_INSTRUCTION("C5FDE6CA" , vcvttpd2dq(xmm1, ymm2)); + TEST_INSTRUCTION("C5F9E68C1A80000000" , vcvttpd2dq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FDE68C1A80000000" , vcvttpd2dq(xmm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA5BCA" , vcvttps2dq(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA5B8C1A80000000" , vcvttps2dq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA5B8C1A80000000" , vcvttps2dq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FE5BCA" , vcvttps2dq(ymm1, ymm2)); + TEST_INSTRUCTION("C5FE5B8C1A80000000" , vcvttps2dq(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FE5B8C1A80000000" , vcvttps2dq(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FB2CCA" , vcvttsd2si(ecx, xmm2)); + TEST_INSTRUCTION("C5FB2C8C1A80000000" , vcvttsd2si(ecx, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FB2C8C1A80000000" , vcvttsd2si(ecx, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA2CCA" , vcvttss2si(ecx, xmm2)); + TEST_INSTRUCTION("C5FA2C8C1A80000000" , vcvttss2si(ecx, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA2C8C1A80000000" , vcvttss2si(ecx, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5E95ECB" , vdivpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E95E8C2B80000000" , vdivpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E95E8C2B80000000" , vdivpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED5ECB" , vdivpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED5E8C2B80000000" , vdivpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED5E8C2B80000000" , vdivpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E85ECB" , vdivps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E85E8C2B80000000" , vdivps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E85E8C2B80000000" , vdivps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC5ECB" , vdivps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC5E8C2B80000000" , vdivps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC5E8C2B80000000" , vdivps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB5ECB" , vdivsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5E8C2B80000000" , vdivsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB5E8C2B80000000" , vdivsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5ECB" , vdivss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5E8C2B80000000" , vdivss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5E8C2B80000000" , vdivss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E36941CB01" , vdppd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369418C2B8000000001" , vdppd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369418C2B8000000001" , vdppd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36940CB01" , vdpps(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369408C2B8000000001" , vdpps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369408C2B8000000001" , vdpps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D40CB01" , vdpps(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D408C2B8000000001" , vdpps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D408C2B8000000001" , vdpps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D19D101" , vextractf128(xmm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D199C118000000001" , vextractf128(ptr(ecx, edx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37D199C118000000001" , vextractf128(xmmword_ptr(ecx, edx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37D39D101" , vextracti128(xmm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D399C118000000001" , vextracti128(ptr(ecx, edx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37D399C118000000001" , vextracti128(xmmword_ptr(ecx, edx, 0, 128), ymm3, 1)); + TEST_INSTRUCTION("C4E37917D101" , vextractps(ecx, xmm2, 1)); + TEST_INSTRUCTION("C4E379179C118000000001" , vextractps(ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E379179C118000000001" , vextractps(dword_ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E2E998CB" , vfmadd132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9988C2B80000000" , vfmadd132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9988C2B80000000" , vfmadd132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED98CB" , vfmadd132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED988C2B80000000" , vfmadd132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED988C2B80000000" , vfmadd132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26998CB" , vfmadd132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269988C2B80000000" , vfmadd132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269988C2B80000000" , vfmadd132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D98CB" , vfmadd132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D988C2B80000000" , vfmadd132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D988C2B80000000" , vfmadd132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E999CB" , vfmadd132sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9998C2B80000000" , vfmadd132sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9998C2B80000000" , vfmadd132sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26999CB" , vfmadd132ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269998C2B80000000" , vfmadd132ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269998C2B80000000" , vfmadd132ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A8CB" , vfmadd213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9A88C2B80000000" , vfmadd213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A88C2B80000000" , vfmadd213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA8CB" , vfmadd213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDA88C2B80000000" , vfmadd213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA88C2B80000000" , vfmadd213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269A8CB" , vfmadd213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269A88C2B80000000" , vfmadd213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269A88C2B80000000" , vfmadd213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DA8CB" , vfmadd213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DA88C2B80000000" , vfmadd213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DA88C2B80000000" , vfmadd213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A9CB" , vfmadd213sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9A98C2B80000000" , vfmadd213sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A98C2B80000000" , vfmadd213sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269A9CB" , vfmadd213ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269A98C2B80000000" , vfmadd213ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269A98C2B80000000" , vfmadd213ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B8CB" , vfmadd231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9B88C2B80000000" , vfmadd231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B88C2B80000000" , vfmadd231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB8CB" , vfmadd231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDB88C2B80000000" , vfmadd231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB88C2B80000000" , vfmadd231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269B8CB" , vfmadd231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269B88C2B80000000" , vfmadd231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269B88C2B80000000" , vfmadd231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DB8CB" , vfmadd231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DB88C2B80000000" , vfmadd231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DB88C2B80000000" , vfmadd231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B9CB" , vfmadd231sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9B98C2B80000000" , vfmadd231sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B98C2B80000000" , vfmadd231sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269B9CB" , vfmadd231ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269B98C2B80000000" , vfmadd231ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269B98C2B80000000" , vfmadd231ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E3E969CC30" , vfmaddpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E9698C358000000030" , vfmaddpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E9698C358000000030" , vfmaddpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E369698C2B8000000060" , vfmaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E369698C2B8000000060" , vfmaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED69CC30" , vfmaddpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED698C358000000030" , vfmaddpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED698C358000000030" , vfmaddpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D698C2B8000000060" , vfmaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D698C2B8000000060" , vfmaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E968CC30" , vfmaddps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E9688C358000000030" , vfmaddps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E9688C358000000030" , vfmaddps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E369688C2B8000000060" , vfmaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E369688C2B8000000060" , vfmaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED68CC30" , vfmaddps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED688C358000000030" , vfmaddps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED688C358000000030" , vfmaddps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D688C2B8000000060" , vfmaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D688C2B8000000060" , vfmaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E96BCC30" , vfmaddsd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96B8C358000000030" , vfmaddsd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E96B8C358000000030" , vfmaddsd(xmm1, xmm2, xmm3, qword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3696B8C2B8000000060" , vfmaddsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696B8C2B8000000060" , vfmaddsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3E96ACC30" , vfmaddss(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96A8C358000000030" , vfmaddss(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E96A8C358000000030" , vfmaddss(xmm1, xmm2, xmm3, dword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3696A8C2B8000000060" , vfmaddss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696A8C2B8000000060" , vfmaddss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E2E996CB" , vfmaddsub132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9968C2B80000000" , vfmaddsub132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9968C2B80000000" , vfmaddsub132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED96CB" , vfmaddsub132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED968C2B80000000" , vfmaddsub132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED968C2B80000000" , vfmaddsub132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26996CB" , vfmaddsub132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269968C2B80000000" , vfmaddsub132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269968C2B80000000" , vfmaddsub132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D96CB" , vfmaddsub132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D968C2B80000000" , vfmaddsub132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D968C2B80000000" , vfmaddsub132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A6CB" , vfmaddsub213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9A68C2B80000000" , vfmaddsub213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A68C2B80000000" , vfmaddsub213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA6CB" , vfmaddsub213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDA68C2B80000000" , vfmaddsub213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA68C2B80000000" , vfmaddsub213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269A6CB" , vfmaddsub213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269A68C2B80000000" , vfmaddsub213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269A68C2B80000000" , vfmaddsub213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DA6CB" , vfmaddsub213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DA68C2B80000000" , vfmaddsub213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DA68C2B80000000" , vfmaddsub213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B6CB" , vfmaddsub231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9B68C2B80000000" , vfmaddsub231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B68C2B80000000" , vfmaddsub231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB6CB" , vfmaddsub231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDB68C2B80000000" , vfmaddsub231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB68C2B80000000" , vfmaddsub231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269B6CB" , vfmaddsub231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269B68C2B80000000" , vfmaddsub231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269B68C2B80000000" , vfmaddsub231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DB6CB" , vfmaddsub231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DB68C2B80000000" , vfmaddsub231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DB68C2B80000000" , vfmaddsub231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E3E95DCC30" , vfmaddsubpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E95D8C358000000030" , vfmaddsubpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E95D8C358000000030" , vfmaddsubpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3695D8C2B8000000060" , vfmaddsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3695D8C2B8000000060" , vfmaddsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED5DCC30" , vfmaddsubpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED5D8C358000000030" , vfmaddsubpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED5D8C358000000030" , vfmaddsubpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D5D8C2B8000000060" , vfmaddsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D5D8C2B8000000060" , vfmaddsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E95CCC30" , vfmaddsubps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E95C8C358000000030" , vfmaddsubps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E95C8C358000000030" , vfmaddsubps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3695C8C2B8000000060" , vfmaddsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3695C8C2B8000000060" , vfmaddsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED5CCC30" , vfmaddsubps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED5C8C358000000030" , vfmaddsubps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED5C8C358000000030" , vfmaddsubps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D5C8C2B8000000060" , vfmaddsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D5C8C2B8000000060" , vfmaddsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E2E99ACB" , vfmsub132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99A8C2B80000000" , vfmsub132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E99A8C2B80000000" , vfmsub132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9ACB" , vfmsub132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED9A8C2B80000000" , vfmsub132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9A8C2B80000000" , vfmsub132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699ACB" , vfmsub132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699A8C2B80000000" , vfmsub132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699A8C2B80000000" , vfmsub132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D9ACB" , vfmsub132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D9A8C2B80000000" , vfmsub132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D9A8C2B80000000" , vfmsub132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E99BCB" , vfmsub132sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99B8C2B80000000" , vfmsub132sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E99B8C2B80000000" , vfmsub132sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699BCB" , vfmsub132ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699B8C2B80000000" , vfmsub132ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699B8C2B80000000" , vfmsub132ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AACB" , vfmsub213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AA8C2B80000000" , vfmsub213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AA8C2B80000000" , vfmsub213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAACB" , vfmsub213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDAA8C2B80000000" , vfmsub213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAA8C2B80000000" , vfmsub213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269AACB" , vfmsub213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AA8C2B80000000" , vfmsub213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269AA8C2B80000000" , vfmsub213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DAACB" , vfmsub213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DAA8C2B80000000" , vfmsub213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DAA8C2B80000000" , vfmsub213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9ABCB" , vfmsub213sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AB8C2B80000000" , vfmsub213sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AB8C2B80000000" , vfmsub213sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269ABCB" , vfmsub213ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AB8C2B80000000" , vfmsub213ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269AB8C2B80000000" , vfmsub213ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BACB" , vfmsub231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BA8C2B80000000" , vfmsub231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BA8C2B80000000" , vfmsub231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBACB" , vfmsub231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDBA8C2B80000000" , vfmsub231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBA8C2B80000000" , vfmsub231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BACB" , vfmsub231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BA8C2B80000000" , vfmsub231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BA8C2B80000000" , vfmsub231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DBACB" , vfmsub231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DBA8C2B80000000" , vfmsub231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DBA8C2B80000000" , vfmsub231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BBCB" , vfmsub231sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BB8C2B80000000" , vfmsub231sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BB8C2B80000000" , vfmsub231sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BBCB" , vfmsub231ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BB8C2B80000000" , vfmsub231ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BB8C2B80000000" , vfmsub231ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E997CB" , vfmsubadd132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9978C2B80000000" , vfmsubadd132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9978C2B80000000" , vfmsubadd132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED97CB" , vfmsubadd132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED978C2B80000000" , vfmsubadd132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED978C2B80000000" , vfmsubadd132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26997CB" , vfmsubadd132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269978C2B80000000" , vfmsubadd132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269978C2B80000000" , vfmsubadd132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D97CB" , vfmsubadd132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D978C2B80000000" , vfmsubadd132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D978C2B80000000" , vfmsubadd132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A7CB" , vfmsubadd213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9A78C2B80000000" , vfmsubadd213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9A78C2B80000000" , vfmsubadd213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA7CB" , vfmsubadd213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDA78C2B80000000" , vfmsubadd213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDA78C2B80000000" , vfmsubadd213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269A7CB" , vfmsubadd213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269A78C2B80000000" , vfmsubadd213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269A78C2B80000000" , vfmsubadd213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DA7CB" , vfmsubadd213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DA78C2B80000000" , vfmsubadd213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DA78C2B80000000" , vfmsubadd213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B7CB" , vfmsubadd231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9B78C2B80000000" , vfmsubadd231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9B78C2B80000000" , vfmsubadd231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB7CB" , vfmsubadd231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDB78C2B80000000" , vfmsubadd231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDB78C2B80000000" , vfmsubadd231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269B7CB" , vfmsubadd231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269B78C2B80000000" , vfmsubadd231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269B78C2B80000000" , vfmsubadd231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DB7CB" , vfmsubadd231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DB78C2B80000000" , vfmsubadd231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DB78C2B80000000" , vfmsubadd231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E3E95FCC30" , vfmsubaddpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E95F8C358000000030" , vfmsubaddpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E95F8C358000000030" , vfmsubaddpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3695F8C2B8000000060" , vfmsubaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3695F8C2B8000000060" , vfmsubaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED5FCC30" , vfmsubaddpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED5F8C358000000030" , vfmsubaddpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED5F8C358000000030" , vfmsubaddpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D5F8C2B8000000060" , vfmsubaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D5F8C2B8000000060" , vfmsubaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E95ECC30" , vfmsubaddps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E95E8C358000000030" , vfmsubaddps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E95E8C358000000030" , vfmsubaddps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3695E8C2B8000000060" , vfmsubaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3695E8C2B8000000060" , vfmsubaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED5ECC30" , vfmsubaddps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED5E8C358000000030" , vfmsubaddps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED5E8C358000000030" , vfmsubaddps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D5E8C2B8000000060" , vfmsubaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D5E8C2B8000000060" , vfmsubaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E96DCC30" , vfmsubpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96D8C358000000030" , vfmsubpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E96D8C358000000030" , vfmsubpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3696D8C2B8000000060" , vfmsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696D8C2B8000000060" , vfmsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED6DCC30" , vfmsubpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED6D8C358000000030" , vfmsubpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED6D8C358000000030" , vfmsubpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D6D8C2B8000000060" , vfmsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D6D8C2B8000000060" , vfmsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E96CCC30" , vfmsubps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96C8C358000000030" , vfmsubps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E96C8C358000000030" , vfmsubps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3696C8C2B8000000060" , vfmsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696C8C2B8000000060" , vfmsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED6CCC30" , vfmsubps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED6C8C358000000030" , vfmsubps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED6C8C358000000030" , vfmsubps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D6C8C2B8000000060" , vfmsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D6C8C2B8000000060" , vfmsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E96FCC30" , vfmsubsd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96F8C358000000030" , vfmsubsd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E96F8C358000000030" , vfmsubsd(xmm1, xmm2, xmm3, qword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3696F8C2B8000000060" , vfmsubsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696F8C2B8000000060" , vfmsubsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3E96ECC30" , vfmsubss(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E96E8C358000000030" , vfmsubss(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E96E8C358000000030" , vfmsubss(xmm1, xmm2, xmm3, dword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3696E8C2B8000000060" , vfmsubss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3696E8C2B8000000060" , vfmsubss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E2E99CCB" , vfnmadd132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99C8C2B80000000" , vfnmadd132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E99C8C2B80000000" , vfnmadd132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9CCB" , vfnmadd132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED9C8C2B80000000" , vfnmadd132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9C8C2B80000000" , vfnmadd132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699CCB" , vfnmadd132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699C8C2B80000000" , vfnmadd132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699C8C2B80000000" , vfnmadd132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D9CCB" , vfnmadd132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D9C8C2B80000000" , vfnmadd132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D9C8C2B80000000" , vfnmadd132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E99DCB" , vfnmadd132sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99D8C2B80000000" , vfnmadd132sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E99D8C2B80000000" , vfnmadd132sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699DCB" , vfnmadd132ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699D8C2B80000000" , vfnmadd132ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699D8C2B80000000" , vfnmadd132ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9ACCB" , vfnmadd213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AC8C2B80000000" , vfnmadd213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AC8C2B80000000" , vfnmadd213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDACCB" , vfnmadd213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDAC8C2B80000000" , vfnmadd213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAC8C2B80000000" , vfnmadd213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269ACCB" , vfnmadd213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AC8C2B80000000" , vfnmadd213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269AC8C2B80000000" , vfnmadd213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DACCB" , vfnmadd213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DAC8C2B80000000" , vfnmadd213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DAC8C2B80000000" , vfnmadd213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9ADCB" , vfnmadd213sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AD8C2B80000000" , vfnmadd213sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AD8C2B80000000" , vfnmadd213sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269ADCB" , vfnmadd213ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AD8C2B80000000" , vfnmadd213ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269AD8C2B80000000" , vfnmadd213ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BCCB" , vfnmadd231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BC8C2B80000000" , vfnmadd231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BC8C2B80000000" , vfnmadd231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBCCB" , vfnmadd231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDBC8C2B80000000" , vfnmadd231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBC8C2B80000000" , vfnmadd231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BCCB" , vfnmadd231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BC8C2B80000000" , vfnmadd231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BC8C2B80000000" , vfnmadd231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DBCCB" , vfnmadd231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DBC8C2B80000000" , vfnmadd231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DBC8C2B80000000" , vfnmadd231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BDCB" , vfnmadd231sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BD8C2B80000000" , vfnmadd231sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BD8C2B80000000" , vfnmadd231sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BDCB" , vfnmadd231ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BD8C2B80000000" , vfnmadd231ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BD8C2B80000000" , vfnmadd231ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E3E979CC30" , vfnmaddpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E9798C358000000030" , vfnmaddpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E9798C358000000030" , vfnmaddpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E369798C2B8000000060" , vfnmaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E369798C2B8000000060" , vfnmaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED79CC30" , vfnmaddpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED798C358000000030" , vfnmaddpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED798C358000000030" , vfnmaddpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D798C2B8000000060" , vfnmaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D798C2B8000000060" , vfnmaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E978CC30" , vfnmaddps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E9788C358000000030" , vfnmaddps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E9788C358000000030" , vfnmaddps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E369788C2B8000000060" , vfnmaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E369788C2B8000000060" , vfnmaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED78CC30" , vfnmaddps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED788C358000000030" , vfnmaddps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED788C358000000030" , vfnmaddps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D788C2B8000000060" , vfnmaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D788C2B8000000060" , vfnmaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E97BCC30" , vfnmaddsd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97B8C358000000030" , vfnmaddsd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E97B8C358000000030" , vfnmaddsd(xmm1, xmm2, xmm3, qword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3697B8C2B8000000060" , vfnmaddsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697B8C2B8000000060" , vfnmaddsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3E97ACC30" , vfnmaddss(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97A8C358000000030" , vfnmaddss(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E97A8C358000000030" , vfnmaddss(xmm1, xmm2, xmm3, dword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3697A8C2B8000000060" , vfnmaddss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697A8C2B8000000060" , vfnmaddss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E2E99ECB" , vfnmsub132pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99E8C2B80000000" , vfnmsub132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E99E8C2B80000000" , vfnmsub132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9ECB" , vfnmsub132pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED9E8C2B80000000" , vfnmsub132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED9E8C2B80000000" , vfnmsub132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699ECB" , vfnmsub132ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699E8C2B80000000" , vfnmsub132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699E8C2B80000000" , vfnmsub132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D9ECB" , vfnmsub132ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D9E8C2B80000000" , vfnmsub132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D9E8C2B80000000" , vfnmsub132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E99FCB" , vfnmsub132sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E99F8C2B80000000" , vfnmsub132sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E99F8C2B80000000" , vfnmsub132sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699FCB" , vfnmsub132ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2699F8C2B80000000" , vfnmsub132ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2699F8C2B80000000" , vfnmsub132ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AECB" , vfnmsub213pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AE8C2B80000000" , vfnmsub213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AE8C2B80000000" , vfnmsub213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAECB" , vfnmsub213pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDAE8C2B80000000" , vfnmsub213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDAE8C2B80000000" , vfnmsub213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269AECB" , vfnmsub213ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AE8C2B80000000" , vfnmsub213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269AE8C2B80000000" , vfnmsub213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DAECB" , vfnmsub213ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DAE8C2B80000000" , vfnmsub213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DAE8C2B80000000" , vfnmsub213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AFCB" , vfnmsub213sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9AF8C2B80000000" , vfnmsub213sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9AF8C2B80000000" , vfnmsub213sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269AFCB" , vfnmsub213ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269AF8C2B80000000" , vfnmsub213ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269AF8C2B80000000" , vfnmsub213ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BECB" , vfnmsub231pd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BE8C2B80000000" , vfnmsub231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BE8C2B80000000" , vfnmsub231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBECB" , vfnmsub231pd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2EDBE8C2B80000000" , vfnmsub231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2EDBE8C2B80000000" , vfnmsub231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BECB" , vfnmsub231ps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BE8C2B80000000" , vfnmsub231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BE8C2B80000000" , vfnmsub231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DBECB" , vfnmsub231ps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DBE8C2B80000000" , vfnmsub231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DBE8C2B80000000" , vfnmsub231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BFCB" , vfnmsub231sd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9BF8C2B80000000" , vfnmsub231sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9BF8C2B80000000" , vfnmsub231sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BFCB" , vfnmsub231ss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269BF8C2B80000000" , vfnmsub231ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269BF8C2B80000000" , vfnmsub231ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E3E97DCC30" , vfnmsubpd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97D8C358000000030" , vfnmsubpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E97D8C358000000030" , vfnmsubpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3697D8C2B8000000060" , vfnmsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697D8C2B8000000060" , vfnmsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED7DCC30" , vfnmsubpd(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED7D8C358000000030" , vfnmsubpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED7D8C358000000030" , vfnmsubpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D7D8C2B8000000060" , vfnmsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D7D8C2B8000000060" , vfnmsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E97CCC30" , vfnmsubps(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97C8C358000000030" , vfnmsubps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E97C8C358000000030" , vfnmsubps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3697C8C2B8000000060" , vfnmsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697C8C2B8000000060" , vfnmsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3ED7CCC30" , vfnmsubps(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E3ED7C8C358000000030" , vfnmsubps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3ED7C8C358000000030" , vfnmsubps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E36D7C8C2B8000000060" , vfnmsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D7C8C2B8000000060" , vfnmsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3E97FCC30" , vfnmsubsd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97F8C358000000030" , vfnmsubsd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E97F8C358000000030" , vfnmsubsd(xmm1, xmm2, xmm3, qword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3697F8C2B8000000060" , vfnmsubsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697F8C2B8000000060" , vfnmsubsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3E97ECC30" , vfnmsubss(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3E97E8C358000000030" , vfnmsubss(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3E97E8C358000000030" , vfnmsubss(xmm1, xmm2, xmm3, dword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("C4E3697E8C2B8000000060" , vfnmsubss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3697E8C2B8000000060" , vfnmsubss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E2D9928C1A80000000" , vgatherdpd(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2DD928C1A80000000" , vgatherdpd(ymm1, ptr(edx, xmm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E259928C1A80000000" , vgatherdps(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E25D928C1A80000000" , vgatherdps(ymm1, ptr(edx, ymm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E2D9938C1A80000000" , vgatherqpd(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2DD938C1A80000000" , vgatherqpd(ymm1, ptr(edx, ymm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E259938C1A80000000" , vgatherqps(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E25D938C1A80000000" , vgatherqps(xmm1, ptr(edx, ymm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E3E9CFCB01" , vgf2p8affineinvqb(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3E9CF8C2B8000000001" , vgf2p8affineinvqb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9CF8C2B8000000001" , vgf2p8affineinvqb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3EDCFCB01" , vgf2p8affineinvqb(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E3EDCF8C2B8000000001" , vgf2p8affineinvqb(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3EDCF8C2B8000000001" , vgf2p8affineinvqb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9CECB01" , vgf2p8affineqb(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3E9CE8C2B8000000001" , vgf2p8affineqb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9CE8C2B8000000001" , vgf2p8affineqb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3EDCECB01" , vgf2p8affineqb(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E3EDCE8C2B8000000001" , vgf2p8affineqb(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3EDCE8C2B8000000001" , vgf2p8affineqb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E269CFCB" , vgf2p8mulb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269CF8C2B80000000" , vgf2p8mulb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269CF8C2B80000000" , vgf2p8mulb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DCFCB" , vgf2p8mulb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DCF8C2B80000000" , vgf2p8mulb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DCF8C2B80000000" , vgf2p8mulb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E97CCB" , vhaddpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E97C8C2B80000000" , vhaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E97C8C2B80000000" , vhaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED7CCB" , vhaddpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED7C8C2B80000000" , vhaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED7C8C2B80000000" , vhaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB7CCB" , vhaddps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB7C8C2B80000000" , vhaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB7C8C2B80000000" , vhaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EF7CCB" , vhaddps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EF7C8C2B80000000" , vhaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EF7C8C2B80000000" , vhaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E97DCB" , vhsubpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E97D8C2B80000000" , vhsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E97D8C2B80000000" , vhsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED7DCB" , vhsubpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED7D8C2B80000000" , vhsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED7D8C2B80000000" , vhsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB7DCB" , vhsubps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB7D8C2B80000000" , vhsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB7D8C2B80000000" , vhsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EF7DCB" , vhsubps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EF7D8C2B80000000" , vhsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EF7D8C2B80000000" , vhsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E36D18CB01" , vinsertf128(ymm1, ymm2, xmm3, 1)); + TEST_INSTRUCTION("C4E36D188C2B8000000001" , vinsertf128(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D188C2B8000000001" , vinsertf128(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D38CB01" , vinserti128(ymm1, ymm2, xmm3, 1)); + TEST_INSTRUCTION("C4E36D388C2B8000000001" , vinserti128(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D388C2B8000000001" , vinserti128(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36921CB01" , vinsertps(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369218C2B8000000001" , vinsertps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369218C2B8000000001" , vinsertps(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5FBF08C1A80000000" , vlddqu(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FBF08C1A80000000" , vlddqu(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FFF08C1A80000000" , vlddqu(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FFF08C1A80000000" , vlddqu(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F8AE941180000000" , vldmxcsr(ptr(ecx, edx, 0, 128))); + TEST_INSTRUCTION("C5F8AE941180000000" , vldmxcsr(dword_ptr(ecx, edx, 0, 128))); + TEST_INSTRUCTION("C5F9F7CA" , vmaskmovdqu(xmm1, xmm2, ptr(edi))); + TEST_INSTRUCTION("C5F9F7CA" , vmaskmovdqu(xmm1, xmm2, xmmword_ptr(edi))); + TEST_INSTRUCTION("C4E2612FA41180000000" , vmaskmovpd(ptr(ecx, edx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2612FA41180000000" , vmaskmovpd(xmmword_ptr(ecx, edx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2652FA41180000000" , vmaskmovpd(ptr(ecx, edx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2652FA41180000000" , vmaskmovpd(ymmword_ptr(ecx, edx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2692D8C2B80000000" , vmaskmovpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2692D8C2B80000000" , vmaskmovpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D2D8C2B80000000" , vmaskmovpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D2D8C2B80000000" , vmaskmovpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2612EA41180000000" , vmaskmovps(ptr(ecx, edx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2612EA41180000000" , vmaskmovps(xmmword_ptr(ecx, edx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2652EA41180000000" , vmaskmovps(ptr(ecx, edx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2652EA41180000000" , vmaskmovps(ymmword_ptr(ecx, edx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2692C8C2B80000000" , vmaskmovps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2692C8C2B80000000" , vmaskmovps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D2C8C2B80000000" , vmaskmovps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D2C8C2B80000000" , vmaskmovps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E95FCB" , vmaxpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E95F8C2B80000000" , vmaxpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E95F8C2B80000000" , vmaxpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED5FCB" , vmaxpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED5F8C2B80000000" , vmaxpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED5F8C2B80000000" , vmaxpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E85FCB" , vmaxps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E85F8C2B80000000" , vmaxps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E85F8C2B80000000" , vmaxps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC5FCB" , vmaxps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC5F8C2B80000000" , vmaxps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC5F8C2B80000000" , vmaxps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB5FCB" , vmaxsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5F8C2B80000000" , vmaxsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB5F8C2B80000000" , vmaxsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5FCB" , vmaxss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5F8C2B80000000" , vmaxss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5F8C2B80000000" , vmaxss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E95DCB" , vminpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E95D8C2B80000000" , vminpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E95D8C2B80000000" , vminpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED5DCB" , vminpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED5D8C2B80000000" , vminpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED5D8C2B80000000" , vminpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E85DCB" , vminps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E85D8C2B80000000" , vminps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E85D8C2B80000000" , vminps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC5DCB" , vminps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC5D8C2B80000000" , vminps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC5D8C2B80000000" , vminps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB5DCB" , vminsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5D8C2B80000000" , vminsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB5D8C2B80000000" , vminsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5DCB" , vminss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5D8C2B80000000" , vminss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5D8C2B80000000" , vminss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F928CA" , vmovapd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F9288C1A80000000" , vmovapd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F9288C1A80000000" , vmovapd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F9299C1180000000" , vmovapd(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9299C1180000000" , vmovapd(xmmword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FD28CA" , vmovapd(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD288C1A80000000" , vmovapd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD288C1A80000000" , vmovapd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD299C1180000000" , vmovapd(ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FD299C1180000000" , vmovapd(ymmword_ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5F828CA" , vmovaps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8288C1A80000000" , vmovaps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F8288C1A80000000" , vmovaps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F8299C1180000000" , vmovaps(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F8299C1180000000" , vmovaps(xmmword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FC28CA" , vmovaps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC288C1A80000000" , vmovaps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC288C1A80000000" , vmovaps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC299C1180000000" , vmovaps(ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FC299C1180000000" , vmovaps(ymmword_ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5F97ED1" , vmovd(ecx, xmm2)); + TEST_INSTRUCTION("C5F97E9C1180000000" , vmovd(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F97E9C1180000000" , vmovd(dword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F96ECA" , vmovd(xmm1, edx)); + TEST_INSTRUCTION("C5F96E8C1A80000000" , vmovd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F96E8C1A80000000" , vmovd(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FB12CA" , vmovddup(xmm1, xmm2)); + TEST_INSTRUCTION("C5FB128C1A80000000" , vmovddup(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FB128C1A80000000" , vmovddup(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FF12CA" , vmovddup(ymm1, ymm2)); + TEST_INSTRUCTION("C5FF128C1A80000000" , vmovddup(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FF128C1A80000000" , vmovddup(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F96FCA" , vmovdqa(xmm1, xmm2)); + TEST_INSTRUCTION("C5F96F8C1A80000000" , vmovdqa(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F96F8C1A80000000" , vmovdqa(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F97F9C1180000000" , vmovdqa(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F97F9C1180000000" , vmovdqa(xmmword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FD6FCA" , vmovdqa(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD6F8C1A80000000" , vmovdqa(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD6F8C1A80000000" , vmovdqa(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD7F9C1180000000" , vmovdqa(ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FD7F9C1180000000" , vmovdqa(ymmword_ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FA6FCA" , vmovdqu(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA6F8C1A80000000" , vmovdqu(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA6F8C1A80000000" , vmovdqu(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA7F9C1180000000" , vmovdqu(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FA7F9C1180000000" , vmovdqu(xmmword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FE6FCA" , vmovdqu(ymm1, ymm2)); + TEST_INSTRUCTION("C5FE6F8C1A80000000" , vmovdqu(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FE6F8C1A80000000" , vmovdqu(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FE7F9C1180000000" , vmovdqu(ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FE7F9C1180000000" , vmovdqu(ymmword_ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5E812CB" , vmovhlps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F9179C1180000000" , vmovhpd(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9179C1180000000" , vmovhpd(qword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5E9168C2B80000000" , vmovhpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9168C2B80000000" , vmovhpd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F8179C1180000000" , vmovhps(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F8179C1180000000" , vmovhps(qword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5E8168C2B80000000" , vmovhps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8168C2B80000000" , vmovhps(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E816CB" , vmovlhps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F9139C1180000000" , vmovlpd(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9139C1180000000" , vmovlpd(qword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5E9128C2B80000000" , vmovlpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9128C2B80000000" , vmovlpd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F8139C1180000000" , vmovlps(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F8139C1180000000" , vmovlps(qword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5E8128C2B80000000" , vmovlps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8128C2B80000000" , vmovlps(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F950CA" , vmovmskpd(ecx, xmm2)); + TEST_INSTRUCTION("C5FD50CA" , vmovmskpd(ecx, ymm2)); + TEST_INSTRUCTION("C5F850CA" , vmovmskps(ecx, xmm2)); + TEST_INSTRUCTION("C5FC50CA" , vmovmskps(ecx, ymm2)); + TEST_INSTRUCTION("C5F9E79C1180000000" , vmovntdq(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9E79C1180000000" , vmovntdq(xmmword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FDE79C1180000000" , vmovntdq(ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FDE79C1180000000" , vmovntdq(ymmword_ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C4E2792A8C1A80000000" , vmovntdqa(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E2792A8C1A80000000" , vmovntdqa(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D2A8C1A80000000" , vmovntdqa(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D2A8C1A80000000" , vmovntdqa(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F92B9C1180000000" , vmovntpd(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F92B9C1180000000" , vmovntpd(xmmword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FD2B9C1180000000" , vmovntpd(ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FD2B9C1180000000" , vmovntpd(ymmword_ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5F82B9C1180000000" , vmovntps(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F82B9C1180000000" , vmovntps(xmmword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FC2B9C1180000000" , vmovntps(ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FC2B9C1180000000" , vmovntps(ymmword_ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FA7ECA" , vmovq(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA7E8C1A80000000" , vmovq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA7E8C1A80000000" , vmovq(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F9D69C1180000000" , vmovq(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9D69C1180000000" , vmovq(qword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FB119C1180000000" , vmovsd(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FB119C1180000000" , vmovsd(qword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FB108C1A80000000" , vmovsd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FB108C1A80000000" , vmovsd(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5EB10CB" , vmovsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5FA16CA" , vmovshdup(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA168C1A80000000" , vmovshdup(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA168C1A80000000" , vmovshdup(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FE16CA" , vmovshdup(ymm1, ymm2)); + TEST_INSTRUCTION("C5FE168C1A80000000" , vmovshdup(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FE168C1A80000000" , vmovshdup(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA12CA" , vmovsldup(xmm1, xmm2)); + TEST_INSTRUCTION("C5FA128C1A80000000" , vmovsldup(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA128C1A80000000" , vmovsldup(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FE12CA" , vmovsldup(ymm1, ymm2)); + TEST_INSTRUCTION("C5FE128C1A80000000" , vmovsldup(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FE128C1A80000000" , vmovsldup(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA119C1180000000" , vmovss(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FA119C1180000000" , vmovss(dword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FA108C1A80000000" , vmovss(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FA108C1A80000000" , vmovss(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5EA10CB" , vmovss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F910CA" , vmovupd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F9108C1A80000000" , vmovupd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F9108C1A80000000" , vmovupd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F9119C1180000000" , vmovupd(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F9119C1180000000" , vmovupd(xmmword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FD10CA" , vmovupd(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD108C1A80000000" , vmovupd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD108C1A80000000" , vmovupd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD119C1180000000" , vmovupd(ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FD119C1180000000" , vmovupd(ymmword_ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5F810CA" , vmovups(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8108C1A80000000" , vmovups(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F8108C1A80000000" , vmovups(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F8119C1180000000" , vmovups(ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5F8119C1180000000" , vmovups(xmmword_ptr(ecx, edx, 0, 128), xmm3)); + TEST_INSTRUCTION("C5FC10CA" , vmovups(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC108C1A80000000" , vmovups(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC108C1A80000000" , vmovups(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC119C1180000000" , vmovups(ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C5FC119C1180000000" , vmovups(ymmword_ptr(ecx, edx, 0, 128), ymm3)); + TEST_INSTRUCTION("C4E36942CB01" , vmpsadbw(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369428C2B8000000001" , vmpsadbw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369428C2B8000000001" , vmpsadbw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D42CB01" , vmpsadbw(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D428C2B8000000001" , vmpsadbw(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D428C2B8000000001" , vmpsadbw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E959CB" , vmulpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9598C2B80000000" , vmulpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9598C2B80000000" , vmulpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED59CB" , vmulpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED598C2B80000000" , vmulpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED598C2B80000000" , vmulpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E859CB" , vmulps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8598C2B80000000" , vmulps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8598C2B80000000" , vmulps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC59CB" , vmulps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC598C2B80000000" , vmulps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC598C2B80000000" , vmulps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB59CB" , vmulsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB598C2B80000000" , vmulsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB598C2B80000000" , vmulsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA59CB" , vmulss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA598C2B80000000" , vmulss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA598C2B80000000" , vmulss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E956CB" , vorpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9568C2B80000000" , vorpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9568C2B80000000" , vorpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED56CB" , vorpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED568C2B80000000" , vorpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED568C2B80000000" , vorpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E856CB" , vorps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8568C2B80000000" , vorps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8568C2B80000000" , vorps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC56CB" , vorps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC568C2B80000000" , vorps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC568C2B80000000" , vorps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2791CCA" , vpabsb(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2791C8C1A80000000" , vpabsb(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E2791C8C1A80000000" , vpabsb(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D1CCA" , vpabsb(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D1C8C1A80000000" , vpabsb(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D1C8C1A80000000" , vpabsb(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E2791ECA" , vpabsd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2791E8C1A80000000" , vpabsd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E2791E8C1A80000000" , vpabsd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D1ECA" , vpabsd(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D1E8C1A80000000" , vpabsd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D1E8C1A80000000" , vpabsd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E2791DCA" , vpabsw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2791D8C1A80000000" , vpabsw(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E2791D8C1A80000000" , vpabsw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D1DCA" , vpabsw(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D1D8C1A80000000" , vpabsw(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D1D8C1A80000000" , vpabsw(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5E96BCB" , vpackssdw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E96B8C2B80000000" , vpackssdw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E96B8C2B80000000" , vpackssdw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED6BCB" , vpackssdw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED6B8C2B80000000" , vpackssdw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED6B8C2B80000000" , vpackssdw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E963CB" , vpacksswb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9638C2B80000000" , vpacksswb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9638C2B80000000" , vpacksswb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED63CB" , vpacksswb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED638C2B80000000" , vpacksswb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED638C2B80000000" , vpacksswb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2692BCB" , vpackusdw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2692B8C2B80000000" , vpackusdw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2692B8C2B80000000" , vpackusdw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D2BCB" , vpackusdw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D2B8C2B80000000" , vpackusdw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D2B8C2B80000000" , vpackusdw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E967CB" , vpackuswb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9678C2B80000000" , vpackuswb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9678C2B80000000" , vpackuswb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED67CB" , vpackuswb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED678C2B80000000" , vpackuswb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED678C2B80000000" , vpackuswb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FCCB" , vpaddb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FC8C2B80000000" , vpaddb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FC8C2B80000000" , vpaddb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFCCB" , vpaddb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFC8C2B80000000" , vpaddb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFC8C2B80000000" , vpaddb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FECB" , vpaddd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FE8C2B80000000" , vpaddd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FE8C2B80000000" , vpaddd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFECB" , vpaddd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFE8C2B80000000" , vpaddd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFE8C2B80000000" , vpaddd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D4CB" , vpaddq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9D48C2B80000000" , vpaddq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D48C2B80000000" , vpaddq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD4CB" , vpaddq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDD48C2B80000000" , vpaddq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD48C2B80000000" , vpaddq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9ECCB" , vpaddsb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EC8C2B80000000" , vpaddsb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EC8C2B80000000" , vpaddsb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDECCB" , vpaddsb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEC8C2B80000000" , vpaddsb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEC8C2B80000000" , vpaddsb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EDCB" , vpaddsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9ED8C2B80000000" , vpaddsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9ED8C2B80000000" , vpaddsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEDCB" , vpaddsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDED8C2B80000000" , vpaddsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDED8C2B80000000" , vpaddsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DCCB" , vpaddusb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DC8C2B80000000" , vpaddusb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DC8C2B80000000" , vpaddusb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDCCB" , vpaddusb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDC8C2B80000000" , vpaddusb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDC8C2B80000000" , vpaddusb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DDCB" , vpaddusw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DD8C2B80000000" , vpaddusw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DD8C2B80000000" , vpaddusw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDDCB" , vpaddusw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDD8C2B80000000" , vpaddusw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDD8C2B80000000" , vpaddusw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FDCB" , vpaddw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FD8C2B80000000" , vpaddw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FD8C2B80000000" , vpaddw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFDCB" , vpaddw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFD8C2B80000000" , vpaddw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFD8C2B80000000" , vpaddw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E3690FCB01" , vpalignr(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690F8C2B8000000001" , vpalignr(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690F8C2B8000000001" , vpalignr(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0FCB01" , vpalignr(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D0F8C2B8000000001" , vpalignr(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0F8C2B8000000001" , vpalignr(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9DBCB" , vpand(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DB8C2B80000000" , vpand(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DB8C2B80000000" , vpand(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDBCB" , vpand(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDB8C2B80000000" , vpand(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDB8C2B80000000" , vpand(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DFCB" , vpandn(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DF8C2B80000000" , vpandn(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DF8C2B80000000" , vpandn(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDFCB" , vpandn(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDF8C2B80000000" , vpandn(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDF8C2B80000000" , vpandn(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E0CB" , vpavgb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E08C2B80000000" , vpavgb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E08C2B80000000" , vpavgb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE0CB" , vpavgb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE08C2B80000000" , vpavgb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE08C2B80000000" , vpavgb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E3CB" , vpavgw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E38C2B80000000" , vpavgw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E38C2B80000000" , vpavgw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE3CB" , vpavgw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE38C2B80000000" , vpavgw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE38C2B80000000" , vpavgw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E36902CB01" , vpblendd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369028C2B8000000001" , vpblendd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369028C2B8000000001" , vpblendd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D02CB01" , vpblendd(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D028C2B8000000001" , vpblendd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D028C2B8000000001" , vpblendd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3694CCB40" , vpblendvb(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("C4E3694C8C2B8000000060" , vpblendvb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E3694C8C2B8000000060" , vpblendvb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("C4E36D4CCB40" , vpblendvb(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("C4E36D4C8C2B8000000060" , vpblendvb(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E36D4C8C2B8000000060" , vpblendvb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("C4E3690ECB01" , vpblendw(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690E8C2B8000000001" , vpblendw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690E8C2B8000000001" , vpblendw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0ECB01" , vpblendw(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D0E8C2B8000000001" , vpblendw(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D0E8C2B8000000001" , vpblendw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E27978CA" , vpbroadcastb(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279788C1A80000000" , vpbroadcastb(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279788C1A80000000" , vpbroadcastb(xmm1, byte_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D78CA" , vpbroadcastb(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D788C1A80000000" , vpbroadcastb(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D788C1A80000000" , vpbroadcastb(ymm1, byte_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27958CA" , vpbroadcastd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279588C1A80000000" , vpbroadcastd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279588C1A80000000" , vpbroadcastd(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D58CA" , vpbroadcastd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D588C1A80000000" , vpbroadcastd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D588C1A80000000" , vpbroadcastd(ymm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27959CA" , vpbroadcastq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279598C1A80000000" , vpbroadcastq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279598C1A80000000" , vpbroadcastq(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D59CA" , vpbroadcastq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D598C1A80000000" , vpbroadcastq(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D598C1A80000000" , vpbroadcastq(ymm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27979CA" , vpbroadcastw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279798C1A80000000" , vpbroadcastw(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279798C1A80000000" , vpbroadcastw(xmm1, word_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D79CA" , vpbroadcastw(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D798C1A80000000" , vpbroadcastw(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D798C1A80000000" , vpbroadcastw(ymm1, word_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E36944CB01" , vpclmulqdq(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369448C2B8000000001" , vpclmulqdq(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369448C2B8000000001" , vpclmulqdq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D44CB01" , vpclmulqdq(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D448C2B8000000001" , vpclmulqdq(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D448C2B8000000001" , vpclmulqdq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E974CB" , vpcmpeqb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9748C2B80000000" , vpcmpeqb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9748C2B80000000" , vpcmpeqb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED74CB" , vpcmpeqb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED748C2B80000000" , vpcmpeqb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED748C2B80000000" , vpcmpeqb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E976CB" , vpcmpeqd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9768C2B80000000" , vpcmpeqd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9768C2B80000000" , vpcmpeqd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED76CB" , vpcmpeqd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED768C2B80000000" , vpcmpeqd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED768C2B80000000" , vpcmpeqd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26929CB" , vpcmpeqq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269298C2B80000000" , vpcmpeqq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269298C2B80000000" , vpcmpeqq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D29CB" , vpcmpeqq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D298C2B80000000" , vpcmpeqq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D298C2B80000000" , vpcmpeqq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E975CB" , vpcmpeqw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9758C2B80000000" , vpcmpeqw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9758C2B80000000" , vpcmpeqw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED75CB" , vpcmpeqw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED758C2B80000000" , vpcmpeqw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED758C2B80000000" , vpcmpeqw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E37961CA01" , vpcmpestri(xmm1, xmm2, 1, ecx, eax, edx)); + TEST_INSTRUCTION("C4E379618C1A8000000001" , vpcmpestri(xmm1, ptr(edx, ebx, 0, 128), 1, ecx, eax, edx)); + TEST_INSTRUCTION("C4E379618C1A8000000001" , vpcmpestri(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1, ecx, eax, edx)); + TEST_INSTRUCTION("C4E37960CA01" , vpcmpestrm(xmm1, xmm2, 1, xmm0, eax, edx)); + TEST_INSTRUCTION("C4E379608C1A8000000001" , vpcmpestrm(xmm1, ptr(edx, ebx, 0, 128), 1, xmm0, eax, edx)); + TEST_INSTRUCTION("C4E379608C1A8000000001" , vpcmpestrm(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1, xmm0, eax, edx)); + TEST_INSTRUCTION("C5E964CB" , vpcmpgtb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9648C2B80000000" , vpcmpgtb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9648C2B80000000" , vpcmpgtb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED64CB" , vpcmpgtb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED648C2B80000000" , vpcmpgtb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED648C2B80000000" , vpcmpgtb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E966CB" , vpcmpgtd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9668C2B80000000" , vpcmpgtd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9668C2B80000000" , vpcmpgtd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED66CB" , vpcmpgtd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED668C2B80000000" , vpcmpgtd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED668C2B80000000" , vpcmpgtd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26937CB" , vpcmpgtq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269378C2B80000000" , vpcmpgtq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269378C2B80000000" , vpcmpgtq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D37CB" , vpcmpgtq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D378C2B80000000" , vpcmpgtq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D378C2B80000000" , vpcmpgtq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E965CB" , vpcmpgtw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9658C2B80000000" , vpcmpgtw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9658C2B80000000" , vpcmpgtw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED65CB" , vpcmpgtw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED658C2B80000000" , vpcmpgtw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED658C2B80000000" , vpcmpgtw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E37963CA01" , vpcmpistri(xmm1, xmm2, 1, ecx)); + TEST_INSTRUCTION("C4E379638C1A8000000001" , vpcmpistri(xmm1, ptr(edx, ebx, 0, 128), 1, ecx)); + TEST_INSTRUCTION("C4E379638C1A8000000001" , vpcmpistri(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1, ecx)); + TEST_INSTRUCTION("C4E37962CA01" , vpcmpistrm(xmm1, xmm2, 1, xmm0)); + TEST_INSTRUCTION("C4E379628C1A8000000001" , vpcmpistrm(xmm1, ptr(edx, ebx, 0, 128), 1, xmm0)); + TEST_INSTRUCTION("C4E379628C1A8000000001" , vpcmpistrm(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1, xmm0)); + TEST_INSTRUCTION("C4E36D06CB01" , vperm2f128(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D068C2B8000000001" , vperm2f128(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D068C2B8000000001" , vperm2f128(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D46CB01" , vperm2i128(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C4E36D468C2B8000000001" , vperm2i128(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D468C2B8000000001" , vperm2i128(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E26D36CB" , vpermd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D368C2B80000000" , vpermd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D368C2B80000000" , vpermd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E36949CB41" , vpermil2pd(xmm1, xmm2, xmm3, xmm4, 1)); + TEST_INSTRUCTION("C4E369498C2B8000000061" , vpermil2pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6, 1)); + TEST_INSTRUCTION("C4E369498C2B8000000061" , vpermil2pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6, 1)); + TEST_INSTRUCTION("C4E3E9498C358000000031" , vpermil2pd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9498C358000000031" , vpermil2pd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D49CB41" , vpermil2pd(ymm1, ymm2, ymm3, ymm4, 1)); + TEST_INSTRUCTION("C4E36D498C2B8000000061" , vpermil2pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6, 1)); + TEST_INSTRUCTION("C4E36D498C2B8000000061" , vpermil2pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6, 1)); + TEST_INSTRUCTION("C4E3ED498C358000000031" , vpermil2pd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128), 1)); + TEST_INSTRUCTION("C4E3ED498C358000000031" , vpermil2pd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128), 1)); + TEST_INSTRUCTION("C4E36948CB41" , vpermil2ps(xmm1, xmm2, xmm3, xmm4, 1)); + TEST_INSTRUCTION("C4E369488C2B8000000061" , vpermil2ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6, 1)); + TEST_INSTRUCTION("C4E369488C2B8000000061" , vpermil2ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6, 1)); + TEST_INSTRUCTION("C4E3E9488C358000000031" , vpermil2ps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128), 1)); + TEST_INSTRUCTION("C4E3E9488C358000000031" , vpermil2ps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128), 1)); + TEST_INSTRUCTION("C4E36D48CB41" , vpermil2ps(ymm1, ymm2, ymm3, ymm4, 1)); + TEST_INSTRUCTION("C4E36D488C2B8000000061" , vpermil2ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6, 1)); + TEST_INSTRUCTION("C4E36D488C2B8000000061" , vpermil2ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6, 1)); + TEST_INSTRUCTION("C4E3ED488C358000000031" , vpermil2ps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128), 1)); + TEST_INSTRUCTION("C4E3ED488C358000000031" , vpermil2ps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128), 1)); + TEST_INSTRUCTION("C4E2690DCB" , vpermilpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E37905CA01" , vpermilpd(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E2690D8C2B80000000" , vpermilpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2690D8C2B80000000" , vpermilpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E379058C1A8000000001" , vpermilpd(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E379058C1A8000000001" , vpermilpd(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E26D0DCB" , vpermilpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E37D05CA01" , vpermilpd(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E26D0D8C2B80000000" , vpermilpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D0D8C2B80000000" , vpermilpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E37D058C1A8000000001" , vpermilpd(ymm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D058C1A8000000001" , vpermilpd(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E2690CCB" , vpermilps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E37904CA01" , vpermilps(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E2690C8C2B80000000" , vpermilps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2690C8C2B80000000" , vpermilps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E379048C1A8000000001" , vpermilps(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E379048C1A8000000001" , vpermilps(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E26D0CCB" , vpermilps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E37D04CA01" , vpermilps(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E26D0C8C2B80000000" , vpermilps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D0C8C2B80000000" , vpermilps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E37D048C1A8000000001" , vpermilps(ymm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D048C1A8000000001" , vpermilps(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E3FD01CA01" , vpermpd(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E3FD018C1A8000000001" , vpermpd(ymm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E3FD018C1A8000000001" , vpermpd(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E26D16CB" , vpermps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D168C2B80000000" , vpermps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D168C2B80000000" , vpermps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E3FD00CA01" , vpermq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E3FD008C1A8000000001" , vpermq(ymm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E3FD008C1A8000000001" , vpermq(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37914D101" , vpextrb(ecx, xmm2, 1)); + TEST_INSTRUCTION("C4E379149C118000000001" , vpextrb(ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E379149C118000000001" , vpextrb(byte_ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E37916D101" , vpextrd(ecx, xmm2, 1)); + TEST_INSTRUCTION("C4E379169C118000000001" , vpextrd(ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E379169C118000000001" , vpextrd(dword_ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C5F9C5CA01" , vpextrw(ecx, xmm2, 1)); + TEST_INSTRUCTION("C4E379159C118000000001" , vpextrw(ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E379159C118000000001" , vpextrw(word_ptr(ecx, edx, 0, 128), xmm3, 1)); + TEST_INSTRUCTION("C4E259908C1A80000000" , vpgatherdd(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E25D908C1A80000000" , vpgatherdd(ymm1, ptr(edx, ymm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E2D9908C1A80000000" , vpgatherdq(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2DD908C1A80000000" , vpgatherdq(ymm1, ptr(edx, xmm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E259918C1A80000000" , vpgatherqd(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E25D918C1A80000000" , vpgatherqd(xmm1, ptr(edx, ymm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2D9918C1A80000000" , vpgatherqq(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); + TEST_INSTRUCTION("C4E2DD918C1A80000000" , vpgatherqq(ymm1, ptr(edx, ymm3, 0, 128), ymm4)); + TEST_INSTRUCTION("C4E26902CB" , vphaddd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269028C2B80000000" , vphaddd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269028C2B80000000" , vphaddd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D02CB" , vphaddd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D028C2B80000000" , vphaddd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D028C2B80000000" , vphaddd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26903CB" , vphaddsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269038C2B80000000" , vphaddsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269038C2B80000000" , vphaddsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D03CB" , vphaddsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D038C2B80000000" , vphaddsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D038C2B80000000" , vphaddsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26901CB" , vphaddw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269018C2B80000000" , vphaddw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269018C2B80000000" , vphaddw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D01CB" , vphaddw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D018C2B80000000" , vphaddw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D018C2B80000000" , vphaddw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E27941CA" , vphminposuw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279418C1A80000000" , vphminposuw(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279418C1A80000000" , vphminposuw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E26906CB" , vphsubd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269068C2B80000000" , vphsubd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269068C2B80000000" , vphsubd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D06CB" , vphsubd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D068C2B80000000" , vphsubd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D068C2B80000000" , vphsubd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26907CB" , vphsubsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269078C2B80000000" , vphsubsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269078C2B80000000" , vphsubsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D07CB" , vphsubsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D078C2B80000000" , vphsubsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D078C2B80000000" , vphsubsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26905CB" , vphsubw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269058C2B80000000" , vphsubw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269058C2B80000000" , vphsubw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D05CB" , vphsubw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D058C2B80000000" , vphsubw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D058C2B80000000" , vphsubw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E36920CB01" , vpinsrb(xmm1, xmm2, ebx, 1)); + TEST_INSTRUCTION("C4E369208C2B8000000001" , vpinsrb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369208C2B8000000001" , vpinsrb(xmm1, xmm2, byte_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E36922CB01" , vpinsrd(xmm1, xmm2, ebx, 1)); + TEST_INSTRUCTION("C4E369228C2B8000000001" , vpinsrd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369228C2B8000000001" , vpinsrd(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9C4CB01" , vpinsrw(xmm1, xmm2, ebx, 1)); + TEST_INSTRUCTION("C5E9C48C2B8000000001" , vpinsrw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9C48C2B8000000001" , vpinsrw(xmm1, xmm2, word_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E26904CB" , vpmaddubsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269048C2B80000000" , vpmaddubsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269048C2B80000000" , vpmaddubsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D04CB" , vpmaddubsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D048C2B80000000" , vpmaddubsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D048C2B80000000" , vpmaddubsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F5CB" , vpmaddwd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F58C2B80000000" , vpmaddwd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F58C2B80000000" , vpmaddwd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF5CB" , vpmaddwd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF58C2B80000000" , vpmaddwd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF58C2B80000000" , vpmaddwd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2618EA41180000000" , vpmaskmovd(ptr(ecx, edx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2618EA41180000000" , vpmaskmovd(xmmword_ptr(ecx, edx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2658EA41180000000" , vpmaskmovd(ptr(ecx, edx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2658EA41180000000" , vpmaskmovd(ymmword_ptr(ecx, edx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2698C8C2B80000000" , vpmaskmovd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2698C8C2B80000000" , vpmaskmovd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D8C8C2B80000000" , vpmaskmovd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D8C8C2B80000000" , vpmaskmovd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E18EA41180000000" , vpmaskmovq(ptr(ecx, edx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2E18EA41180000000" , vpmaskmovq(xmmword_ptr(ecx, edx, 0, 128), xmm3, xmm4)); + TEST_INSTRUCTION("C4E2E58EA41180000000" , vpmaskmovq(ptr(ecx, edx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2E58EA41180000000" , vpmaskmovq(ymmword_ptr(ecx, edx, 0, 128), ymm3, ymm4)); + TEST_INSTRUCTION("C4E2E98C8C2B80000000" , vpmaskmovq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E98C8C2B80000000" , vpmaskmovq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED8C8C2B80000000" , vpmaskmovq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED8C8C2B80000000" , vpmaskmovq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693CCB" , vpmaxsb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693C8C2B80000000" , vpmaxsb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693C8C2B80000000" , vpmaxsb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3CCB" , vpmaxsb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3C8C2B80000000" , vpmaxsb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3C8C2B80000000" , vpmaxsb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693DCB" , vpmaxsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693D8C2B80000000" , vpmaxsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693D8C2B80000000" , vpmaxsd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3DCB" , vpmaxsd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3D8C2B80000000" , vpmaxsd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3D8C2B80000000" , vpmaxsd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EECB" , vpmaxsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EE8C2B80000000" , vpmaxsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EE8C2B80000000" , vpmaxsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEECB" , vpmaxsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEE8C2B80000000" , vpmaxsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEE8C2B80000000" , vpmaxsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DECB" , vpmaxub(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DE8C2B80000000" , vpmaxub(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DE8C2B80000000" , vpmaxub(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDECB" , vpmaxub(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDE8C2B80000000" , vpmaxub(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDE8C2B80000000" , vpmaxub(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693FCB" , vpmaxud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693F8C2B80000000" , vpmaxud(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693F8C2B80000000" , vpmaxud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3FCB" , vpmaxud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3F8C2B80000000" , vpmaxud(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3F8C2B80000000" , vpmaxud(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693ECB" , vpmaxuw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693E8C2B80000000" , vpmaxuw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693E8C2B80000000" , vpmaxuw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3ECB" , vpmaxuw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3E8C2B80000000" , vpmaxuw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3E8C2B80000000" , vpmaxuw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26938CB" , vpminsb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269388C2B80000000" , vpminsb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269388C2B80000000" , vpminsb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D38CB" , vpminsb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D388C2B80000000" , vpminsb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D388C2B80000000" , vpminsb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26939CB" , vpminsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269398C2B80000000" , vpminsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269398C2B80000000" , vpminsd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D39CB" , vpminsd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D398C2B80000000" , vpminsd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D398C2B80000000" , vpminsd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EACB" , vpminsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EA8C2B80000000" , vpminsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EA8C2B80000000" , vpminsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEACB" , vpminsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEA8C2B80000000" , vpminsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEA8C2B80000000" , vpminsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DACB" , vpminub(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9DA8C2B80000000" , vpminub(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9DA8C2B80000000" , vpminub(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDACB" , vpminub(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDDA8C2B80000000" , vpminub(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDDA8C2B80000000" , vpminub(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693BCB" , vpminud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693B8C2B80000000" , vpminud(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693B8C2B80000000" , vpminud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3BCB" , vpminud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3B8C2B80000000" , vpminud(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3B8C2B80000000" , vpminud(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693ACB" , vpminuw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2693A8C2B80000000" , vpminuw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2693A8C2B80000000" , vpminuw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3ACB" , vpminuw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D3A8C2B80000000" , vpminuw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D3A8C2B80000000" , vpminuw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F9D7CA" , vpmovmskb(ecx, xmm2)); + TEST_INSTRUCTION("C5FDD7CA" , vpmovmskb(ecx, ymm2)); + TEST_INSTRUCTION("C4E27921CA" , vpmovsxbd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279218C1A80000000" , vpmovsxbd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279218C1A80000000" , vpmovsxbd(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D21CA" , vpmovsxbd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D218C1A80000000" , vpmovsxbd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D218C1A80000000" , vpmovsxbd(ymm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27922CA" , vpmovsxbq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279228C1A80000000" , vpmovsxbq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279228C1A80000000" , vpmovsxbq(xmm1, word_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D22CA" , vpmovsxbq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D228C1A80000000" , vpmovsxbq(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D228C1A80000000" , vpmovsxbq(ymm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27920CA" , vpmovsxbw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279208C1A80000000" , vpmovsxbw(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279208C1A80000000" , vpmovsxbw(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D20CA" , vpmovsxbw(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D208C1A80000000" , vpmovsxbw(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D208C1A80000000" , vpmovsxbw(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27925CA" , vpmovsxdq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279258C1A80000000" , vpmovsxdq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279258C1A80000000" , vpmovsxdq(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D25CA" , vpmovsxdq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D258C1A80000000" , vpmovsxdq(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D258C1A80000000" , vpmovsxdq(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27923CA" , vpmovsxwd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279238C1A80000000" , vpmovsxwd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279238C1A80000000" , vpmovsxwd(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D23CA" , vpmovsxwd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D238C1A80000000" , vpmovsxwd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D238C1A80000000" , vpmovsxwd(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27924CA" , vpmovsxwq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279248C1A80000000" , vpmovsxwq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279248C1A80000000" , vpmovsxwq(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D24CA" , vpmovsxwq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D248C1A80000000" , vpmovsxwq(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D248C1A80000000" , vpmovsxwq(ymm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27931CA" , vpmovzxbd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279318C1A80000000" , vpmovzxbd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279318C1A80000000" , vpmovzxbd(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D31CA" , vpmovzxbd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D318C1A80000000" , vpmovzxbd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D318C1A80000000" , vpmovzxbd(ymm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27932CA" , vpmovzxbq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279328C1A80000000" , vpmovzxbq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279328C1A80000000" , vpmovzxbq(xmm1, word_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D32CA" , vpmovzxbq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D328C1A80000000" , vpmovzxbq(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D328C1A80000000" , vpmovzxbq(ymm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27930CA" , vpmovzxbw(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279308C1A80000000" , vpmovzxbw(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279308C1A80000000" , vpmovzxbw(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D30CA" , vpmovzxbw(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D308C1A80000000" , vpmovzxbw(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D308C1A80000000" , vpmovzxbw(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27935CA" , vpmovzxdq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279358C1A80000000" , vpmovzxdq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279358C1A80000000" , vpmovzxdq(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D35CA" , vpmovzxdq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D358C1A80000000" , vpmovzxdq(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D358C1A80000000" , vpmovzxdq(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27933CA" , vpmovzxwd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279338C1A80000000" , vpmovzxwd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279338C1A80000000" , vpmovzxwd(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D33CA" , vpmovzxwd(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D338C1A80000000" , vpmovzxwd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D338C1A80000000" , vpmovzxwd(ymm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27934CA" , vpmovzxwq(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279348C1A80000000" , vpmovzxwq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279348C1A80000000" , vpmovzxwq(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D34CA" , vpmovzxwq(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27D348C1A80000000" , vpmovzxwq(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D348C1A80000000" , vpmovzxwq(ymm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E26928CB" , vpmuldq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269288C2B80000000" , vpmuldq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269288C2B80000000" , vpmuldq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D28CB" , vpmuldq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D288C2B80000000" , vpmuldq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D288C2B80000000" , vpmuldq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2690BCB" , vpmulhrsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2690B8C2B80000000" , vpmulhrsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2690B8C2B80000000" , vpmulhrsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D0BCB" , vpmulhrsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D0B8C2B80000000" , vpmulhrsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D0B8C2B80000000" , vpmulhrsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E4CB" , vpmulhuw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E48C2B80000000" , vpmulhuw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E48C2B80000000" , vpmulhuw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE4CB" , vpmulhuw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE48C2B80000000" , vpmulhuw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE48C2B80000000" , vpmulhuw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E5CB" , vpmulhw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E58C2B80000000" , vpmulhw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E58C2B80000000" , vpmulhw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE5CB" , vpmulhw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE58C2B80000000" , vpmulhw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE58C2B80000000" , vpmulhw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26940CB" , vpmulld(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269408C2B80000000" , vpmulld(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269408C2B80000000" , vpmulld(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D40CB" , vpmulld(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D408C2B80000000" , vpmulld(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D408C2B80000000" , vpmulld(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D5CB" , vpmullw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9D58C2B80000000" , vpmullw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D58C2B80000000" , vpmullw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD5CB" , vpmullw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDD58C2B80000000" , vpmullw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD58C2B80000000" , vpmullw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F4CB" , vpmuludq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F48C2B80000000" , vpmuludq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F48C2B80000000" , vpmuludq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF4CB" , vpmuludq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF48C2B80000000" , vpmuludq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF48C2B80000000" , vpmuludq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EBCB" , vpor(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EB8C2B80000000" , vpor(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EB8C2B80000000" , vpor(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEBCB" , vpor(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEB8C2B80000000" , vpor(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEB8C2B80000000" , vpor(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F6CB" , vpsadbw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F68C2B80000000" , vpsadbw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F68C2B80000000" , vpsadbw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF6CB" , vpsadbw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF68C2B80000000" , vpsadbw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF68C2B80000000" , vpsadbw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26900CB" , vpshufb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269008C2B80000000" , vpshufb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269008C2B80000000" , vpshufb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D00CB" , vpshufb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D008C2B80000000" , vpshufb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D008C2B80000000" , vpshufb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F970CA01" , vpshufd(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5F9708C1A8000000001" , vpshufd(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5F9708C1A8000000001" , vpshufd(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FD70CA01" , vpshufd(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5FD708C1A8000000001" , vpshufd(ymm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FD708C1A8000000001" , vpshufd(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FA70CA01" , vpshufhw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5FA708C1A8000000001" , vpshufhw(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FA708C1A8000000001" , vpshufhw(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FE70CA01" , vpshufhw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5FE708C1A8000000001" , vpshufhw(ymm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FE708C1A8000000001" , vpshufhw(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FB70CA01" , vpshuflw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5FB708C1A8000000001" , vpshuflw(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FB708C1A8000000001" , vpshuflw(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FF70CA01" , vpshuflw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5FF708C1A8000000001" , vpshuflw(ymm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C5FF708C1A8000000001" , vpshuflw(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E26908CB" , vpsignb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269088C2B80000000" , vpsignb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269088C2B80000000" , vpsignb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D08CB" , vpsignb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D088C2B80000000" , vpsignb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D088C2B80000000" , vpsignb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2690ACB" , vpsignd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2690A8C2B80000000" , vpsignd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2690A8C2B80000000" , vpsignd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D0ACB" , vpsignd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D0A8C2B80000000" , vpsignd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D0A8C2B80000000" , vpsignd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26909CB" , vpsignw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269098C2B80000000" , vpsignw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269098C2B80000000" , vpsignw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D09CB" , vpsignw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D098C2B80000000" , vpsignw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D098C2B80000000" , vpsignw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F2CB" , vpslld(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F172F201" , vpslld(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9F28C2B80000000" , vpslld(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F28C2B80000000" , vpslld(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF2CB" , vpslld(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F572F201" , vpslld(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDF28C2B80000000" , vpslld(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF28C2B80000000" , vpslld(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F173FA01" , vpslldq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5F573FA01" , vpslldq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5E9F3CB" , vpsllq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F173F201" , vpsllq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9F38C2B80000000" , vpsllq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F38C2B80000000" , vpsllq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF3CB" , vpsllq(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F573F201" , vpsllq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDF38C2B80000000" , vpsllq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF38C2B80000000" , vpsllq(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26947CB" , vpsllvd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269478C2B80000000" , vpsllvd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269478C2B80000000" , vpsllvd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D47CB" , vpsllvd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D478C2B80000000" , vpsllvd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D478C2B80000000" , vpsllvd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E947CB" , vpsllvq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9478C2B80000000" , vpsllvq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9478C2B80000000" , vpsllvq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED47CB" , vpsllvq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED478C2B80000000" , vpsllvq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED478C2B80000000" , vpsllvq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F1CB" , vpsllw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F171F201" , vpsllw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9F18C2B80000000" , vpsllw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F18C2B80000000" , vpsllw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF1CB" , vpsllw(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F571F201" , vpsllw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDF18C2B80000000" , vpsllw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF18C2B80000000" , vpsllw(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E2CB" , vpsrad(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F172E201" , vpsrad(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9E28C2B80000000" , vpsrad(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E28C2B80000000" , vpsrad(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE2CB" , vpsrad(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F572E201" , vpsrad(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDE28C2B80000000" , vpsrad(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE28C2B80000000" , vpsrad(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26946CB" , vpsravd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269468C2B80000000" , vpsravd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269468C2B80000000" , vpsravd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D46CB" , vpsravd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D468C2B80000000" , vpsravd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D468C2B80000000" , vpsravd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E1CB" , vpsraw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F171E201" , vpsraw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9E18C2B80000000" , vpsraw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E18C2B80000000" , vpsraw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE1CB" , vpsraw(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F571E201" , vpsraw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDE18C2B80000000" , vpsraw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE18C2B80000000" , vpsraw(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D2CB" , vpsrld(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F172D201" , vpsrld(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9D28C2B80000000" , vpsrld(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D28C2B80000000" , vpsrld(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD2CB" , vpsrld(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F572D201" , vpsrld(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDD28C2B80000000" , vpsrld(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD28C2B80000000" , vpsrld(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F173DA01" , vpsrldq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5F573DA01" , vpsrldq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5E9D3CB" , vpsrlq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F173D201" , vpsrlq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9D38C2B80000000" , vpsrlq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D38C2B80000000" , vpsrlq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD3CB" , vpsrlq(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F573D201" , vpsrlq(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDD38C2B80000000" , vpsrlq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD38C2B80000000" , vpsrlq(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26945CB" , vpsrlvd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269458C2B80000000" , vpsrlvd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269458C2B80000000" , vpsrlvd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D45CB" , vpsrlvd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26D458C2B80000000" , vpsrlvd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26D458C2B80000000" , vpsrlvd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E945CB" , vpsrlvq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E2E9458C2B80000000" , vpsrlvq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2E9458C2B80000000" , vpsrlvq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED45CB" , vpsrlvq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E2ED458C2B80000000" , vpsrlvq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2ED458C2B80000000" , vpsrlvq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D1CB" , vpsrlw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5F171D201" , vpsrlw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C5E9D18C2B80000000" , vpsrlw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D18C2B80000000" , vpsrlw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD1CB" , vpsrlw(ymm1, ymm2, xmm3)); + TEST_INSTRUCTION("C5F571D201" , vpsrlw(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C5EDD18C2B80000000" , vpsrlw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD18C2B80000000" , vpsrlw(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F8CB" , vpsubb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F88C2B80000000" , vpsubb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F88C2B80000000" , vpsubb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF8CB" , vpsubb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF88C2B80000000" , vpsubb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF88C2B80000000" , vpsubb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FACB" , vpsubd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FA8C2B80000000" , vpsubd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FA8C2B80000000" , vpsubd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFACB" , vpsubd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFA8C2B80000000" , vpsubd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFA8C2B80000000" , vpsubd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FBCB" , vpsubq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9FB8C2B80000000" , vpsubq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9FB8C2B80000000" , vpsubq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFBCB" , vpsubq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDFB8C2B80000000" , vpsubq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDFB8C2B80000000" , vpsubq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E8CB" , vpsubsb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E88C2B80000000" , vpsubsb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E88C2B80000000" , vpsubsb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE8CB" , vpsubsb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE88C2B80000000" , vpsubsb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE88C2B80000000" , vpsubsb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E9CB" , vpsubsw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9E98C2B80000000" , vpsubsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9E98C2B80000000" , vpsubsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE9CB" , vpsubsw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDE98C2B80000000" , vpsubsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDE98C2B80000000" , vpsubsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D8CB" , vpsubusb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9D88C2B80000000" , vpsubusb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D88C2B80000000" , vpsubusb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD8CB" , vpsubusb(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDD88C2B80000000" , vpsubusb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD88C2B80000000" , vpsubusb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D9CB" , vpsubusw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9D98C2B80000000" , vpsubusw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9D98C2B80000000" , vpsubusw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD9CB" , vpsubusw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDD98C2B80000000" , vpsubusw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDD98C2B80000000" , vpsubusw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F9CB" , vpsubw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9F98C2B80000000" , vpsubw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9F98C2B80000000" , vpsubw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF9CB" , vpsubw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDF98C2B80000000" , vpsubw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDF98C2B80000000" , vpsubw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E27917CA" , vptest(xmm1, xmm2)); + TEST_INSTRUCTION("C4E279178C1A80000000" , vptest(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279178C1A80000000" , vptest(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D17CA" , vptest(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D178C1A80000000" , vptest(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D178C1A80000000" , vptest(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5E968CB" , vpunpckhbw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9688C2B80000000" , vpunpckhbw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9688C2B80000000" , vpunpckhbw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED68CB" , vpunpckhbw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED688C2B80000000" , vpunpckhbw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED688C2B80000000" , vpunpckhbw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E96ACB" , vpunpckhdq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E96A8C2B80000000" , vpunpckhdq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E96A8C2B80000000" , vpunpckhdq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED6ACB" , vpunpckhdq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED6A8C2B80000000" , vpunpckhdq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED6A8C2B80000000" , vpunpckhdq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E96DCB" , vpunpckhqdq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E96D8C2B80000000" , vpunpckhqdq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E96D8C2B80000000" , vpunpckhqdq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED6DCB" , vpunpckhqdq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED6D8C2B80000000" , vpunpckhqdq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED6D8C2B80000000" , vpunpckhqdq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E969CB" , vpunpckhwd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9698C2B80000000" , vpunpckhwd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9698C2B80000000" , vpunpckhwd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED69CB" , vpunpckhwd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED698C2B80000000" , vpunpckhwd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED698C2B80000000" , vpunpckhwd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E960CB" , vpunpcklbw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9608C2B80000000" , vpunpcklbw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9608C2B80000000" , vpunpcklbw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED60CB" , vpunpcklbw(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED608C2B80000000" , vpunpcklbw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED608C2B80000000" , vpunpcklbw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E962CB" , vpunpckldq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9628C2B80000000" , vpunpckldq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9628C2B80000000" , vpunpckldq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED62CB" , vpunpckldq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED628C2B80000000" , vpunpckldq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED628C2B80000000" , vpunpckldq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E96CCB" , vpunpcklqdq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E96C8C2B80000000" , vpunpcklqdq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E96C8C2B80000000" , vpunpcklqdq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED6CCB" , vpunpcklqdq(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED6C8C2B80000000" , vpunpcklqdq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED6C8C2B80000000" , vpunpcklqdq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E961CB" , vpunpcklwd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9618C2B80000000" , vpunpcklwd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9618C2B80000000" , vpunpcklwd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED61CB" , vpunpcklwd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED618C2B80000000" , vpunpcklwd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED618C2B80000000" , vpunpcklwd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EFCB" , vpxor(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9EF8C2B80000000" , vpxor(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9EF8C2B80000000" , vpxor(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEFCB" , vpxor(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EDEF8C2B80000000" , vpxor(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EDEF8C2B80000000" , vpxor(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F853CA" , vrcpps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8538C1A80000000" , vrcpps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F8538C1A80000000" , vrcpps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC53CA" , vrcpps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC538C1A80000000" , vrcpps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC538C1A80000000" , vrcpps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5EA53CB" , vrcpss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA538C2B80000000" , vrcpss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA538C2B80000000" , vrcpss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E37909CA01" , vroundpd(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E379098C1A8000000001" , vroundpd(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E379098C1A8000000001" , vroundpd(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D09CA01" , vroundpd(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D098C1A8000000001" , vroundpd(ymm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D098C1A8000000001" , vroundpd(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37908CA01" , vroundps(xmm1, xmm2, 1)); + TEST_INSTRUCTION("C4E379088C1A8000000001" , vroundps(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E379088C1A8000000001" , vroundps(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D08CA01" , vroundps(ymm1, ymm2, 1)); + TEST_INSTRUCTION("C4E37D088C1A8000000001" , vroundps(ymm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E37D088C1A8000000001" , vroundps(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690BCB01" , vroundsd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690B8C2B8000000001" , vroundsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690B8C2B8000000001" , vroundsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690ACB01" , vroundss(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E3690A8C2B8000000001" , vroundss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E3690A8C2B8000000001" , vroundss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5F852CA" , vrsqrtps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8528C1A80000000" , vrsqrtps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F8528C1A80000000" , vrsqrtps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC52CA" , vrsqrtps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC528C1A80000000" , vrsqrtps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC528C1A80000000" , vrsqrtps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5EA52CB" , vrsqrtss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA528C2B80000000" , vrsqrtss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA528C2B80000000" , vrsqrtss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9C6CB01" , vshufpd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5E9C68C2B8000000001" , vshufpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E9C68C2B8000000001" , vshufpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5EDC6CB01" , vshufpd(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C5EDC68C2B8000000001" , vshufpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5EDC68C2B8000000001" , vshufpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E8C6CB01" , vshufps(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C5E8C68C2B8000000001" , vshufps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5E8C68C2B8000000001" , vshufps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5ECC6CB01" , vshufps(ymm1, ymm2, ymm3, 1)); + TEST_INSTRUCTION("C5ECC68C2B8000000001" , vshufps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5ECC68C2B8000000001" , vshufps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C5F951CA" , vsqrtpd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F9518C1A80000000" , vsqrtpd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F9518C1A80000000" , vsqrtpd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD51CA" , vsqrtpd(ymm1, ymm2)); + TEST_INSTRUCTION("C5FD518C1A80000000" , vsqrtpd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FD518C1A80000000" , vsqrtpd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F851CA" , vsqrtps(xmm1, xmm2)); + TEST_INSTRUCTION("C5F8518C1A80000000" , vsqrtps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F8518C1A80000000" , vsqrtps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC51CA" , vsqrtps(ymm1, ymm2)); + TEST_INSTRUCTION("C5FC518C1A80000000" , vsqrtps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5FC518C1A80000000" , vsqrtps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5EB51CB" , vsqrtsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB518C2B80000000" , vsqrtsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB518C2B80000000" , vsqrtsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA51CB" , vsqrtss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA518C2B80000000" , vsqrtss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA518C2B80000000" , vsqrtss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5F8AE9C1180000000" , vstmxcsr(ptr(ecx, edx, 0, 128))); + TEST_INSTRUCTION("C5F8AE9C1180000000" , vstmxcsr(dword_ptr(ecx, edx, 0, 128))); + TEST_INSTRUCTION("C5E95CCB" , vsubpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E95C8C2B80000000" , vsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E95C8C2B80000000" , vsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED5CCB" , vsubpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED5C8C2B80000000" , vsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED5C8C2B80000000" , vsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E85CCB" , vsubps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E85C8C2B80000000" , vsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E85C8C2B80000000" , vsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC5CCB" , vsubps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC5C8C2B80000000" , vsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC5C8C2B80000000" , vsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB5CCB" , vsubsd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EB5C8C2B80000000" , vsubsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EB5C8C2B80000000" , vsubsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5CCB" , vsubss(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5EA5C8C2B80000000" , vsubss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EA5C8C2B80000000" , vsubss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E2790FCA" , vtestpd(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2790F8C1A80000000" , vtestpd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E2790F8C1A80000000" , vtestpd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D0FCA" , vtestpd(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D0F8C1A80000000" , vtestpd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D0F8C1A80000000" , vtestpd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E2790ECA" , vtestps(xmm1, xmm2)); + TEST_INSTRUCTION("C4E2790E8C1A80000000" , vtestps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E2790E8C1A80000000" , vtestps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D0ECA" , vtestps(ymm1, ymm2)); + TEST_INSTRUCTION("C4E27D0E8C1A80000000" , vtestps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27D0E8C1A80000000" , vtestps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F92ECA" , vucomisd(xmm1, xmm2)); + TEST_INSTRUCTION("C5F92E8C1A80000000" , vucomisd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F92E8C1A80000000" , vucomisd(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F82ECA" , vucomiss(xmm1, xmm2)); + TEST_INSTRUCTION("C5F82E8C1A80000000" , vucomiss(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5F82E8C1A80000000" , vucomiss(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C5E915CB" , vunpckhpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9158C2B80000000" , vunpckhpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9158C2B80000000" , vunpckhpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED15CB" , vunpckhpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED158C2B80000000" , vunpckhpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED158C2B80000000" , vunpckhpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E815CB" , vunpckhps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8158C2B80000000" , vunpckhps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8158C2B80000000" , vunpckhps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC15CB" , vunpckhps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC158C2B80000000" , vunpckhps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC158C2B80000000" , vunpckhps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E914CB" , vunpcklpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9148C2B80000000" , vunpcklpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9148C2B80000000" , vunpcklpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED14CB" , vunpcklpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED148C2B80000000" , vunpcklpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED148C2B80000000" , vunpcklpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E814CB" , vunpcklps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8148C2B80000000" , vunpcklps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8148C2B80000000" , vunpcklps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC14CB" , vunpcklps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC148C2B80000000" , vunpcklps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC148C2B80000000" , vunpcklps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E957CB" , vxorpd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E9578C2B80000000" , vxorpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E9578C2B80000000" , vxorpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED57CB" , vxorpd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5ED578C2B80000000" , vxorpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5ED578C2B80000000" , vxorpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E857CB" , vxorps(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C5E8578C2B80000000" , vxorps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5E8578C2B80000000" , vxorps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC57CB" , vxorps(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C5EC578C2B80000000" , vxorps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5EC578C2B80000000" , vxorps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C5FC77" , vzeroall()); + TEST_INSTRUCTION("C5F877" , vzeroupper()); +} + +static void ASMJIT_NOINLINE testX86AssemblerAVX_NE_CONVERT(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E27AB18C1A80000000" , vbcstnebf162ps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27AB18C1A80000000" , vbcstnebf162ps(xmm1, word_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27EB18C1A80000000" , vbcstnebf162ps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27EB18C1A80000000" , vbcstnebf162ps(ymm1, word_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279B18C1A80000000" , vbcstnesh2ps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279B18C1A80000000" , vbcstnesh2ps(xmm1, word_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27DB18C1A80000000" , vbcstnesh2ps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27DB18C1A80000000" , vbcstnesh2ps(ymm1, word_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27AB08C1A80000000" , vcvtneebf162ps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27AB08C1A80000000" , vcvtneebf162ps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27EB08C1A80000000" , vcvtneebf162ps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27EB08C1A80000000" , vcvtneebf162ps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279B08C1A80000000" , vcvtneeph2ps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E279B08C1A80000000" , vcvtneeph2ps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27DB08C1A80000000" , vcvtneeph2ps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27DB08C1A80000000" , vcvtneeph2ps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27BB08C1A80000000" , vcvtneobf162ps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27BB08C1A80000000" , vcvtneobf162ps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27FB08C1A80000000" , vcvtneobf162ps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27FB08C1A80000000" , vcvtneobf162ps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E278B08C1A80000000" , vcvtneoph2ps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E278B08C1A80000000" , vcvtneoph2ps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27CB08C1A80000000" , vcvtneoph2ps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27CB08C1A80000000" , vcvtneoph2ps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27A72CA" , vex().vcvtneps2bf16(xmm1, xmm2)); + TEST_INSTRUCTION("C4E27E72CA" , vex().vcvtneps2bf16(xmm1, ymm2)); + TEST_INSTRUCTION("C4E27A728C1A80000000" , vex().vcvtneps2bf16(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("C4E27E728C1A80000000" , vex().vcvtneps2bf16(xmm1, ymmword_ptr(edx, ebx, 0, 128))); +} + +static void ASMJIT_NOINLINE testX86AssemblerAVX_VNNI(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E25150F4" , vex().vpdpbusd(xmm6, xmm5, xmm4)); + TEST_INSTRUCTION("C4E25550F4" , vex().vpdpbusd(ymm6, ymm5, ymm4)); + TEST_INSTRUCTION("C4E25151F4" , vex().vpdpbusds(xmm6, xmm5, xmm4)); + TEST_INSTRUCTION("C4E25551F4" , vex().vpdpbusds(ymm6, ymm5, ymm4)); + TEST_INSTRUCTION("C4E25152F4" , vex().vpdpwssd(xmm6, xmm5, xmm4)); + TEST_INSTRUCTION("C4E25552F4" , vex().vpdpwssd(ymm6, ymm5, ymm4)); + TEST_INSTRUCTION("C4E25153F4" , vex().vpdpwssds(xmm6, xmm5, xmm4)); + TEST_INSTRUCTION("C4E25553F4" , vex().vpdpwssds(ymm6, ymm5, ymm4)); +} + +static void ASMJIT_NOINLINE testX86AssemblerAVX_VNNI_INT8(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E26B50CB" , vpdpbssd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26B508C2B80000000" , vpdpbssd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26B508C2B80000000" , vpdpbssd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26F50CB" , vpdpbssd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26F508C2B80000000" , vpdpbssd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26F508C2B80000000" , vpdpbssd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26B51CB" , vpdpbssds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26B518C2B80000000" , vpdpbssds(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26B518C2B80000000" , vpdpbssds(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26F51CB" , vpdpbssds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26F518C2B80000000" , vpdpbssds(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26F518C2B80000000" , vpdpbssds(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26A50CB" , vpdpbsud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26A508C2B80000000" , vpdpbsud(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26A508C2B80000000" , vpdpbsud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26E50CB" , vpdpbsud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26E508C2B80000000" , vpdpbsud(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26E508C2B80000000" , vpdpbsud(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26A51CB" , vpdpbsuds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26A518C2B80000000" , vpdpbsuds(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26A518C2B80000000" , vpdpbsuds(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26E51CB" , vpdpbsuds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26E518C2B80000000" , vpdpbsuds(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26E518C2B80000000" , vpdpbsuds(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26850CB" , vpdpbuud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268508C2B80000000" , vpdpbuud(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E268508C2B80000000" , vpdpbuud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26C50CB" , vpdpbuud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26C508C2B80000000" , vpdpbuud(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26C508C2B80000000" , vpdpbuud(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26851CB" , vpdpbuuds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268518C2B80000000" , vpdpbuuds(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E268518C2B80000000" , vpdpbuuds(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26C51CB" , vpdpbuuds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26C518C2B80000000" , vpdpbuuds(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26C518C2B80000000" , vpdpbuuds(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); +} + +static void ASMJIT_NOINLINE testX86AssemblerAVX_VNNI_INT16(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E26AD2CB" , vpdpwsud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26AD28C2B80000000" , vpdpwsud(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26AD28C2B80000000" , vpdpwsud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26ED2CB" , vpdpwsud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26ED28C2B80000000" , vpdpwsud(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26ED28C2B80000000" , vpdpwsud(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26AD3CB" , vpdpwsuds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26AD38C2B80000000" , vpdpwsuds(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26AD38C2B80000000" , vpdpwsuds(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26ED3CB" , vpdpwsuds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26ED38C2B80000000" , vpdpwsuds(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26ED38C2B80000000" , vpdpwsuds(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269D2CB" , vpdpwusd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269D28C2B80000000" , vpdpwusd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269D28C2B80000000" , vpdpwusd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DD2CB" , vpdpwusd(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DD28C2B80000000" , vpdpwusd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DD28C2B80000000" , vpdpwusd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269D3CB" , vpdpwusds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269D38C2B80000000" , vpdpwusds(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269D38C2B80000000" , vpdpwusds(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DD3CB" , vpdpwusds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26DD38C2B80000000" , vpdpwusds(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26DD38C2B80000000" , vpdpwusds(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E268D2CB" , vpdpwuud(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268D28C2B80000000" , vpdpwuud(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E268D28C2B80000000" , vpdpwuud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26CD2CB" , vpdpwuud(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26CD28C2B80000000" , vpdpwuud(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26CD28C2B80000000" , vpdpwuud(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E268D3CB" , vpdpwuuds(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268D38C2B80000000" , vpdpwuuds(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E268D38C2B80000000" , vpdpwuuds(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26CD3CB" , vpdpwuuds(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26CD38C2B80000000" , vpdpwuuds(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26CD38C2B80000000" , vpdpwuuds(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); +} + +static void ASMJIT_NOINLINE testX86AssemblerAVX_SHA512(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E27FCCCA" , vsha512msg1(ymm1, xmm2)); + TEST_INSTRUCTION("C4E27FCDCA" , vsha512msg2(ymm1, ymm2)); + TEST_INSTRUCTION("C4E26FCBCB" , vsha512rnds2(ymm1, ymm2, xmm3)); +} + +static void ASMJIT_NOINLINE testX86AssemblerAVX_SM3(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E268DACB" , vsm3msg1(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E268DA8C2B80000000" , vsm3msg1(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E268DA8C2B80000000" , vsm3msg1(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DACB" , vsm3msg2(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E269DA8C2B80000000" , vsm3msg2(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E269DA8C2B80000000" , vsm3msg2(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E369DECB01" , vsm3rnds2(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("C4E369DE8C2B8000000001" , vsm3rnds2(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("C4E369DE8C2B8000000001" , vsm3rnds2(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); +} + +static void ASMJIT_NOINLINE testX86AssemblerAVX_SM4(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("C4E26ADACB" , vsm4key4(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26ADA8C2B80000000" , vsm4key4(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26ADA8C2B80000000" , vsm4key4(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26EDACB" , vsm4key4(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26EDA8C2B80000000" , vsm4key4(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26EDA8C2B80000000" , vsm4key4(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26BDACB" , vsm4rnds4(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("C4E26BDA8C2B80000000" , vsm4rnds4(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26BDA8C2B80000000" , vsm4rnds4(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26FDACB" , vsm4rnds4(ymm1, ymm2, ymm3)); + TEST_INSTRUCTION("C4E26FDA8C2B80000000" , vsm4rnds4(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("C4E26FDA8C2B80000000" , vsm4rnds4(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); +} + +static void ASMJIT_NOINLINE testX86AssemblerXOP(AssemblerTester& tester) noexcept { + using namespace x86; + + TEST_INSTRUCTION("8FE97881CA" , vfrczpd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978818C1A80000000" , vfrczpd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978818C1A80000000" , vfrczpd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE97C81CA" , vfrczpd(ymm1, ymm2)); + TEST_INSTRUCTION("8FE97C818C1A80000000" , vfrczpd(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE97C818C1A80000000" , vfrczpd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE97880CA" , vfrczps(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978808C1A80000000" , vfrczps(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978808C1A80000000" , vfrczps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE97C80CA" , vfrczps(ymm1, ymm2)); + TEST_INSTRUCTION("8FE97C808C1A80000000" , vfrczps(ymm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE97C808C1A80000000" , vfrczps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE97883CA" , vfrczsd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978838C1A80000000" , vfrczsd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978838C1A80000000" , vfrczsd(xmm1, qword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE97882CA" , vfrczss(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978828C1A80000000" , vfrczss(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978828C1A80000000" , vfrczss(xmm1, dword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE868A2CB40" , vpcmov(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8E8A28C358000000030" , vpcmov(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("8FE8E8A28C358000000030" , vpcmov(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("8FE868A28C2B8000000060" , vpcmov(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A28C2B8000000060" , vpcmov(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86CA2CB40" , vpcmov(ymm1, ymm2, ymm3, ymm4)); + TEST_INSTRUCTION("8FE8ECA28C358000000030" , vpcmov(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("8FE8ECA28C358000000030" , vpcmov(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("8FE86CA28C2B8000000060" , vpcmov(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("8FE86CA28C2B8000000060" , vpcmov(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); + TEST_INSTRUCTION("8FE868CCCB01" , vpcomb(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868CC8C2B8000000001" , vpcomb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CC8C2B8000000001" , vpcomb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CECB01" , vpcomd(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868CE8C2B8000000001" , vpcomd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CE8C2B8000000001" , vpcomd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CFCB01" , vpcomq(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868CF8C2B8000000001" , vpcomq(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CF8C2B8000000001" , vpcomq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868ECCB01" , vpcomub(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868EC8C2B8000000001" , vpcomub(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EC8C2B8000000001" , vpcomub(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EECB01" , vpcomud(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868EE8C2B8000000001" , vpcomud(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EE8C2B8000000001" , vpcomud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EFCB01" , vpcomuq(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868EF8C2B8000000001" , vpcomuq(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EF8C2B8000000001" , vpcomuq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868EDCB01" , vpcomuw(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868ED8C2B8000000001" , vpcomuw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868ED8C2B8000000001" , vpcomuw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CDCB01" , vpcomw(xmm1, xmm2, xmm3, 1)); + TEST_INSTRUCTION("8FE868CD8C2B8000000001" , vpcomw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE868CD8C2B8000000001" , vpcomw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); + TEST_INSTRUCTION("8FE978C2CA" , vphaddbd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C28C1A80000000" , vphaddbd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978C28C1A80000000" , vphaddbd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978C3CA" , vphaddbq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C38C1A80000000" , vphaddbq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978C38C1A80000000" , vphaddbq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978C1CA" , vphaddbw(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C18C1A80000000" , vphaddbw(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978C18C1A80000000" , vphaddbw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978CBCA" , vphadddq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978CB8C1A80000000" , vphadddq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978CB8C1A80000000" , vphadddq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D2CA" , vphaddubd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D28C1A80000000" , vphaddubd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D28C1A80000000" , vphaddubd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D3CA" , vphaddubq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D38C1A80000000" , vphaddubq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D38C1A80000000" , vphaddubq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D1CA" , vphaddubw(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D18C1A80000000" , vphaddubw(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D18C1A80000000" , vphaddubw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978DBCA" , vphaddudq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978DB8C1A80000000" , vphaddudq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978DB8C1A80000000" , vphaddudq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D6CA" , vphadduwd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D68C1A80000000" , vphadduwd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D68C1A80000000" , vphadduwd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D7CA" , vphadduwq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978D78C1A80000000" , vphadduwq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978D78C1A80000000" , vphadduwq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978C6CA" , vphaddwd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C68C1A80000000" , vphaddwd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978C68C1A80000000" , vphaddwd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978C7CA" , vphaddwq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978C78C1A80000000" , vphaddwq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978C78C1A80000000" , vphaddwq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978E1CA" , vphsubbw(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978E18C1A80000000" , vphsubbw(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978E18C1A80000000" , vphsubbw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978E3CA" , vphsubdq(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978E38C1A80000000" , vphsubdq(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978E38C1A80000000" , vphsubdq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978E2CA" , vphsubwd(xmm1, xmm2)); + TEST_INSTRUCTION("8FE978E28C1A80000000" , vphsubwd(xmm1, ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE978E28C1A80000000" , vphsubwd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); + TEST_INSTRUCTION("8FE8689ECB40" , vpmacsdd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8689E8C2B8000000060" , vpmacsdd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8689E8C2B8000000060" , vpmacsdd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8689FCB40" , vpmacsdqh(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8689F8C2B8000000060" , vpmacsdqh(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8689F8C2B8000000060" , vpmacsdqh(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86897CB40" , vpmacsdql(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868978C2B8000000060" , vpmacsdql(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868978C2B8000000060" , vpmacsdql(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8688ECB40" , vpmacssdd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8688E8C2B8000000060" , vpmacssdd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8688E8C2B8000000060" , vpmacssdd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8688FCB40" , vpmacssdqh(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8688F8C2B8000000060" , vpmacssdqh(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE8688F8C2B8000000060" , vpmacssdqh(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86887CB40" , vpmacssdql(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868878C2B8000000060" , vpmacssdql(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868878C2B8000000060" , vpmacssdql(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86886CB40" , vpmacsswd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868868C2B8000000060" , vpmacsswd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868868C2B8000000060" , vpmacsswd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86885CB40" , vpmacssww(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868858C2B8000000060" , vpmacssww(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868858C2B8000000060" , vpmacssww(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86896CB40" , vpmacswd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868968C2B8000000060" , vpmacswd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868968C2B8000000060" , vpmacswd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE86895CB40" , vpmacsww(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868958C2B8000000060" , vpmacsww(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868958C2B8000000060" , vpmacsww(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A6CB40" , vpmadcsswd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868A68C2B8000000060" , vpmadcsswd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A68C2B8000000060" , vpmadcsswd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868B6CB40" , vpmadcswd(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE868B68C2B8000000060" , vpmadcswd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868B68C2B8000000060" , vpmadcswd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A3CB40" , vpperm(xmm1, xmm2, xmm3, xmm4)); + TEST_INSTRUCTION("8FE8E8A38C358000000030" , vpperm(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("8FE8E8A38C358000000030" , vpperm(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); + TEST_INSTRUCTION("8FE868A38C2B8000000060" , vpperm(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE868A38C2B8000000060" , vpperm(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); + TEST_INSTRUCTION("8FE96090CA" , vprotb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE878C0CA01" , vprotb(xmm1, xmm2, 1)); + TEST_INSTRUCTION("8FE9E8908C2B80000000" , vprotb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8908C2B80000000" , vprotb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958908C1A80000000" , vprotb(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C08C1A8000000001" , vprotb(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("8FE958908C1A80000000" , vprotb(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C08C1A8000000001" , vprotb(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("8FE96092CA" , vprotd(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE878C2CA01" , vprotd(xmm1, xmm2, 1)); + TEST_INSTRUCTION("8FE9E8928C2B80000000" , vprotd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8928C2B80000000" , vprotd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958928C1A80000000" , vprotd(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C28C1A8000000001" , vprotd(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("8FE958928C1A80000000" , vprotd(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C28C1A8000000001" , vprotd(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("8FE96093CA" , vprotq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE878C3CA01" , vprotq(xmm1, xmm2, 1)); + TEST_INSTRUCTION("8FE9E8938C2B80000000" , vprotq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8938C2B80000000" , vprotq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958938C1A80000000" , vprotq(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C38C1A8000000001" , vprotq(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("8FE958938C1A80000000" , vprotq(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C38C1A8000000001" , vprotq(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("8FE96091CA" , vprotw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE878C1CA01" , vprotw(xmm1, xmm2, 1)); + TEST_INSTRUCTION("8FE9E8918C2B80000000" , vprotw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8918C2B80000000" , vprotw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958918C1A80000000" , vprotw(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C18C1A8000000001" , vprotw(xmm1, ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("8FE958918C1A80000000" , vprotw(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE878C18C1A8000000001" , vprotw(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); + TEST_INSTRUCTION("8FE96098CA" , vpshab(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8988C2B80000000" , vpshab(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8988C2B80000000" , vpshab(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958988C1A80000000" , vpshab(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958988C1A80000000" , vpshab(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE9609ACA" , vpshad(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E89A8C2B80000000" , vpshad(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E89A8C2B80000000" , vpshad(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9589A8C1A80000000" , vpshad(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE9589A8C1A80000000" , vpshad(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE9609BCA" , vpshaq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E89B8C2B80000000" , vpshaq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E89B8C2B80000000" , vpshaq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9589B8C1A80000000" , vpshaq(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE9589B8C1A80000000" , vpshaq(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96099CA" , vpshaw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8998C2B80000000" , vpshaw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8998C2B80000000" , vpshaw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958998C1A80000000" , vpshaw(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958998C1A80000000" , vpshaw(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96094CA" , vpshlb(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8948C2B80000000" , vpshlb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8948C2B80000000" , vpshlb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958948C1A80000000" , vpshlb(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958948C1A80000000" , vpshlb(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96096CA" , vpshld(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8968C2B80000000" , vpshld(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8968C2B80000000" , vpshld(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958968C1A80000000" , vpshld(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958968C1A80000000" , vpshld(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96097CA" , vpshlq(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8978C2B80000000" , vpshlq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8978C2B80000000" , vpshlq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958978C1A80000000" , vpshlq(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958978C1A80000000" , vpshlq(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE96095CA" , vpshlw(xmm1, xmm2, xmm3)); + TEST_INSTRUCTION("8FE9E8958C2B80000000" , vpshlw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE9E8958C2B80000000" , vpshlw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); + TEST_INSTRUCTION("8FE958958C1A80000000" , vpshlw(xmm1, ptr(edx, ebx, 0, 128), xmm4)); + TEST_INSTRUCTION("8FE958958C1A80000000" , vpshlw(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); +} + +static void ASMJIT_NOINLINE testX86AssemblerAVX512(AssemblerTester& tester) noexcept { + using namespace x86; + TEST_INSTRUCTION("C5ED4ACB" , kaddb(k1, k2, k3)); TEST_INSTRUCTION("C4E1ED4ACB" , kaddd(k1, k2, k3)); TEST_INSTRUCTION("C4E1EC4ACB" , kaddq(k1, k2, k3)); @@ -2614,84 +5016,24 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F25F48AA4C1A08" , v4fnmaddps(zmm1, zmm4, zmm5, zmm6, zmm7, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F25F08AB4C1A08" , v4fnmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F25F08AB4C1A08" , v4fnmaddss(xmm1, xmm4, xmm5, xmm6, xmm7, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5E958CB" , vaddpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9588C2B80000000" , vaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9588C2B80000000" , vaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED58CB" , vaddpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED588C2B80000000" , vaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED588C2B80000000" , vaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED4858CB" , vaddpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48584C2B02" , vaddpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48584C2B02" , vaddpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E858CB" , vaddps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8588C2B80000000" , vaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8588C2B80000000" , vaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC58CB" , vaddps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC588C2B80000000" , vaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC588C2B80000000" , vaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C4858CB" , vaddps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48584C2B02" , vaddps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C48584C2B02" , vaddps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB58CB" , vaddsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB588C2B80000000" , vaddsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB588C2B80000000" , vaddsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA58CB" , vaddss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA588C2B80000000" , vaddss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA588C2B80000000" , vaddss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D0CB" , vaddsubpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9D08C2B80000000" , vaddsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D08C2B80000000" , vaddsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD0CB" , vaddsubpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDD08C2B80000000" , vaddsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD08C2B80000000" , vaddsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EBD0CB" , vaddsubps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EBD08C2B80000000" , vaddsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EBD08C2B80000000" , vaddsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EFD0CB" , vaddsubps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EFD08C2B80000000" , vaddsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EFD08C2B80000000" , vaddsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269DECB" , vaesdec(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269DE8C2B80000000" , vaesdec(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269DE8C2B80000000" , vaesdec(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DDECB" , vaesdec(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DDE8C2B80000000" , vaesdec(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DDE8C2B80000000" , vaesdec(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48DECB" , vaesdec(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48DE4C2B02" , vaesdec(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48DE4C2B02" , vaesdec(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269DFCB" , vaesdeclast(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269DF8C2B80000000" , vaesdeclast(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269DF8C2B80000000" , vaesdeclast(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DDFCB" , vaesdeclast(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DDF8C2B80000000" , vaesdeclast(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DDF8C2B80000000" , vaesdeclast(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48DFCB" , vaesdeclast(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48DF4C2B02" , vaesdeclast(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48DF4C2B02" , vaesdeclast(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269DCCB" , vaesenc(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269DC8C2B80000000" , vaesenc(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269DC8C2B80000000" , vaesenc(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DDCCB" , vaesenc(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DDC8C2B80000000" , vaesenc(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DDC8C2B80000000" , vaesenc(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48DCCB" , vaesenc(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48DC4C2B02" , vaesenc(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48DC4C2B02" , vaesenc(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269DDCB" , vaesenclast(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269DD8C2B80000000" , vaesenclast(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269DD8C2B80000000" , vaesenclast(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DDDCB" , vaesenclast(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DDD8C2B80000000" , vaesenclast(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DDD8C2B80000000" , vaesenclast(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48DDCB" , vaesenclast(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48DD4C2B02" , vaesenclast(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48DD4C2B02" , vaesenclast(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E279DBCA" , vaesimc(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279DB8C1A80000000" , vaesimc(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279DB8C1A80000000" , vaesimc(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E379DFCA01" , vaeskeygenassist(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E379DF8C1A8000000001" , vaeskeygenassist(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E379DF8C1A8000000001" , vaeskeygenassist(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F36D0803CB01" , valignd(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08034C2B0801" , valignd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08034C2B0801" , valignd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); @@ -2710,39 +5052,15 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED4803CB01" , valignq(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48034C2B0201" , valignq(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48034C2B0201" , valignq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E955CB" , vandnpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9558C2B80000000" , vandnpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9558C2B80000000" , vandnpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED55CB" , vandnpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED558C2B80000000" , vandnpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED558C2B80000000" , vandnpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED4855CB" , vandnpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48554C2B02" , vandnpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48554C2B02" , vandnpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E855CB" , vandnps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8558C2B80000000" , vandnps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8558C2B80000000" , vandnps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC55CB" , vandnps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC558C2B80000000" , vandnps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC558C2B80000000" , vandnps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C4855CB" , vandnps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48554C2B02" , vandnps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C48554C2B02" , vandnps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E954CB" , vandpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9548C2B80000000" , vandpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9548C2B80000000" , vandpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED54CB" , vandpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED548C2B80000000" , vandpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED548C2B80000000" , vandpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED4854CB" , vandpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48544C2B02" , vandpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48544C2B02" , vandpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E854CB" , vandps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8548C2B80000000" , vandps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8548C2B80000000" , vandps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC54CB" , vandps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC548C2B80000000" , vandps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC548C2B80000000" , vandps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C4854CB" , vandps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48544C2B02" , vandps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C48544C2B02" , vandps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -2764,32 +5082,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D4865CB" , vblendmps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48654C2B02" , vblendmps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48654C2B02" , vblendmps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E3690DCB01" , vblendpd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690D8C2B8000000001" , vblendpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690D8C2B8000000001" , vblendpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0DCB01" , vblendpd(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D0D8C2B8000000001" , vblendpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0D8C2B8000000001" , vblendpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690CCB01" , vblendps(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690C8C2B8000000001" , vblendps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690C8C2B8000000001" , vblendps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0CCB01" , vblendps(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D0C8C2B8000000001" , vblendps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0C8C2B8000000001" , vblendps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3694BCB40" , vblendvpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3694B8C2B8000000060" , vblendvpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3694B8C2B8000000060" , vblendvpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E36D4BCB40" , vblendvpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E36D4B8C2B8000000060" , vblendvpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D4B8C2B8000000060" , vblendvpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3694ACB40" , vblendvps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3694A8C2B8000000060" , vblendvps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3694A8C2B8000000060" , vblendvps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E36D4ACB40" , vblendvps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E36D4A8C2B8000000060" , vblendvps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D4A8C2B8000000060" , vblendvps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E27D1A8C1A80000000" , vbroadcastf128(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D1A8C1A80000000" , vbroadcastf128(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D2819CA" , vbroadcastf32x2(ymm1, xmm2)); TEST_INSTRUCTION("62F27D28194C1A10" , vbroadcastf32x2(ymm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D28194C1A10" , vbroadcastf32x2(ymm1, qword_ptr(edx, ebx, 0, 128))); @@ -2808,8 +5100,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD481A4C1A08" , vbroadcastf64x2(zmm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD481B4C1A04" , vbroadcastf64x4(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD481B4C1A04" , vbroadcastf64x4(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D5A8C1A80000000" , vbroadcasti128(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D5A8C1A80000000" , vbroadcasti128(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D0859CA" , vbroadcasti32x2(xmm1, xmm2)); TEST_INSTRUCTION("62F27D08594C1A10" , vbroadcasti32x2(xmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D08594C1A10" , vbroadcasti32x2(xmm1, qword_ptr(edx, ebx, 0, 128))); @@ -2831,69 +5121,36 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD485A4C1A08" , vbroadcasti64x2(zmm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD485B4C1A04" , vbroadcasti64x4(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD485B4C1A04" , vbroadcasti64x4(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D19CA" , vbroadcastsd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D198C1A80000000" , vbroadcastsd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D198C1A80000000" , vbroadcastsd(ymm1, qword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD4819CA" , vbroadcastsd(zmm1, xmm2)); TEST_INSTRUCTION("62F2FD48194C1A10" , vbroadcastsd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD48194C1A10" , vbroadcastsd(zmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27918CA" , vbroadcastss(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279188C1A80000000" , vbroadcastss(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279188C1A80000000" , vbroadcastss(xmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D18CA" , vbroadcastss(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D188C1A80000000" , vbroadcastss(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D188C1A80000000" , vbroadcastss(ymm1, dword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4818CA" , vbroadcastss(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48184C1A20" , vbroadcastss(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48184C1A20" , vbroadcastss(zmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5E9C2CB01" , vcmppd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5E9C28C2B8000000001" , vcmppd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C28C2B8000000001" , vcmppd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED08C2CB01" , vcmppd(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F1ED08C24C2B0801" , vcmppd(k1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED08C24C2B0801" , vcmppd(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5EDC2CB01" , vcmppd(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C5EDC28C2B8000000001" , vcmppd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5EDC28C2B8000000001" , vcmppd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED28C2CB01" , vcmppd(k1, ymm2, ymm3, 1)); TEST_INSTRUCTION("62F1ED28C24C2B0401" , vcmppd(k1, ymm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED28C24C2B0401" , vcmppd(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED48C2CB01" , vcmppd(k1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F1ED48C24C2B0201" , vcmppd(k1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F1ED48C24C2B0201" , vcmppd(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E8C2CB01" , vcmpps(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5E8C28C2B8000000001" , vcmpps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E8C28C2B8000000001" , vcmpps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F16C08C2CB01" , vcmpps(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F16C08C24C2B0801" , vcmpps(k1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F16C08C24C2B0801" , vcmpps(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5ECC2CB01" , vcmpps(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C5ECC28C2B8000000001" , vcmpps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5ECC28C2B8000000001" , vcmpps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F16C28C2CB01" , vcmpps(k1, ymm2, ymm3, 1)); TEST_INSTRUCTION("62F16C28C24C2B0401" , vcmpps(k1, ymm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F16C28C24C2B0401" , vcmpps(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F16C48C2CB01" , vcmpps(k1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F16C48C24C2B0201" , vcmpps(k1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F16C48C24C2B0201" , vcmpps(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5EBC2CB01" , vcmpsd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5EBC28C2B8000000001" , vcmpsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5EBC28C2B8000000001" , vcmpsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F1EF08C2CB01" , vcmpsd(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F1EF08C24C2B1001" , vcmpsd(k1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F1EF08C24C2B1001" , vcmpsd(k1, xmm2, qword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5EAC2CB01" , vcmpss(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5EAC28C2B8000000001" , vcmpss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5EAC28C2B8000000001" , vcmpss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F16E08C2CB01" , vcmpss(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F16E08C24C2B2001" , vcmpss(k1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F16E08C24C2B2001" , vcmpss(k1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5F92FCA" , vcomisd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F92F8C1A80000000" , vcomisd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F92F8C1A80000000" , vcomisd(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F82FCA" , vcomiss(xmm1, xmm2)); - TEST_INSTRUCTION("C5F82F8C1A80000000" , vcomiss(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F82F8C1A80000000" , vcomiss(xmm1, dword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD088AD1" , vcompresspd(xmm1, xmm2)); TEST_INSTRUCTION("62F2FD088A5C1110" , vcompresspd(ptr(ecx, edx, 0, 128), xmm3)); TEST_INSTRUCTION("62F2FD088A5C1110" , vcompresspd(xmmword_ptr(ecx, edx, 0, 128), xmm3)); @@ -2912,21 +5169,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27D488AD1" , vcompressps(zmm1, zmm2)); TEST_INSTRUCTION("62F27D488A5C1120" , vcompressps(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F27D488A5C1120" , vcompressps(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5FAE6CA" , vcvtdq2pd(xmm1, xmm2)); - TEST_INSTRUCTION("C5FAE68C1A80000000" , vcvtdq2pd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FAE68C1A80000000" , vcvtdq2pd(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FEE6CA" , vcvtdq2pd(ymm1, xmm2)); - TEST_INSTRUCTION("C5FEE68C1A80000000" , vcvtdq2pd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FEE68C1A80000000" , vcvtdq2pd(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E48E6CA" , vcvtdq2pd(zmm1, ymm2)); TEST_INSTRUCTION("62F17E48E64C1A04" , vcvtdq2pd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E48E64C1A04" , vcvtdq2pd(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F85BCA" , vcvtdq2ps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F85B8C1A80000000" , vcvtdq2ps(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F85B8C1A80000000" , vcvtdq2ps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC5BCA" , vcvtdq2ps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC5B8C1A80000000" , vcvtdq2ps(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC5B8C1A80000000" , vcvtdq2ps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C485BCA" , vcvtdq2ps(zmm1, zmm2)); TEST_INSTRUCTION("62F17C485B4C1A02" , vcvtdq2ps(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C485B4C1A02" , vcvtdq2ps(zmm1, zmmword_ptr(edx, ebx, 0, 128))); @@ -2946,17 +5191,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27E4872CA" , vcvtneps2bf16(ymm1, zmm2)); TEST_INSTRUCTION("62F27E48724C1A02" , vcvtneps2bf16(ymm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27E48724C1A02" , vcvtneps2bf16(ymm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FBE6CA" , vcvtpd2dq(xmm1, xmm2)); - TEST_INSTRUCTION("C5FFE6CA" , vcvtpd2dq(xmm1, ymm2)); - TEST_INSTRUCTION("C5FBE68C1A80000000" , vcvtpd2dq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FFE68C1A80000000" , vcvtpd2dq(xmm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FF48E6CA" , vcvtpd2dq(ymm1, zmm2)); TEST_INSTRUCTION("62F1FF48E64C1A02" , vcvtpd2dq(ymm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FF48E64C1A02" , vcvtpd2dq(ymm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F95ACA" , vcvtpd2ps(xmm1, xmm2)); - TEST_INSTRUCTION("C5FD5ACA" , vcvtpd2ps(xmm1, ymm2)); - TEST_INSTRUCTION("C5F95A8C1A80000000" , vcvtpd2ps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD5A8C1A80000000" , vcvtpd2ps(xmm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD485ACA" , vcvtpd2ps(ymm1, zmm2)); TEST_INSTRUCTION("62F1FD485A4C1A02" , vcvtpd2ps(ymm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD485A4C1A02" , vcvtpd2ps(ymm1, zmmword_ptr(edx, ebx, 0, 128))); @@ -2985,39 +5222,15 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1FD4879CA" , vcvtpd2uqq(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48794C1A02" , vcvtpd2uqq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD48794C1A02" , vcvtpd2uqq(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27913CA" , vcvtph2ps(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279138C1A80000000" , vcvtph2ps(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279138C1A80000000" , vcvtph2ps(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D13CA" , vcvtph2ps(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D138C1A80000000" , vcvtph2ps(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D138C1A80000000" , vcvtph2ps(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4813CA" , vcvtph2ps(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48134C1A04" , vcvtph2ps(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48134C1A04" , vcvtph2ps(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F95BCA" , vcvtps2dq(xmm1, xmm2)); - TEST_INSTRUCTION("C5F95B8C1A80000000" , vcvtps2dq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F95B8C1A80000000" , vcvtps2dq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD5BCA" , vcvtps2dq(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD5B8C1A80000000" , vcvtps2dq(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD5B8C1A80000000" , vcvtps2dq(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17D485BCA" , vcvtps2dq(zmm1, zmm2)); TEST_INSTRUCTION("62F17D485B4C1A02" , vcvtps2dq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17D485B4C1A02" , vcvtps2dq(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F85ACA" , vcvtps2pd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F85A8C1A80000000" , vcvtps2pd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F85A8C1A80000000" , vcvtps2pd(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC5ACA" , vcvtps2pd(ymm1, xmm2)); - TEST_INSTRUCTION("C5FC5A8C1A80000000" , vcvtps2pd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC5A8C1A80000000" , vcvtps2pd(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C485ACA" , vcvtps2pd(zmm1, ymm2)); TEST_INSTRUCTION("62F17C485A4C1A04" , vcvtps2pd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C485A4C1A04" , vcvtps2pd(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E3791DD101" , vcvtps2ph(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E3791D9C118000000001" , vcvtps2ph(ptr(ecx, edx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E3791D9C118000000001" , vcvtps2ph(qword_ptr(ecx, edx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E37D1DD101" , vcvtps2ph(xmm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D1D9C118000000001" , vcvtps2ph(ptr(ecx, edx, 0, 128), ymm3, 1)); - TEST_INSTRUCTION("C4E37D1D9C118000000001" , vcvtps2ph(xmmword_ptr(ecx, edx, 0, 128), ymm3, 1)); TEST_INSTRUCTION("62F37D481DD101" , vcvtps2ph(ymm1, zmm2, 1)); TEST_INSTRUCTION("62F37D481D5C110401" , vcvtps2ph(ptr(ecx, edx, 0, 128), zmm3, 1)); TEST_INSTRUCTION("62F37D481D5C110401" , vcvtps2ph(ymmword_ptr(ecx, edx, 0, 128), zmm3, 1)); @@ -3064,36 +5277,12 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1FC485BCA" , vcvtqq2ps(ymm1, zmm2)); TEST_INSTRUCTION("62F1FC485B4C1A02" , vcvtqq2ps(ymm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FC485B4C1A02" , vcvtqq2ps(ymm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FB2DCA" , vcvtsd2si(ecx, xmm2)); - TEST_INSTRUCTION("C5FB2D8C1A80000000" , vcvtsd2si(ecx, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FB2D8C1A80000000" , vcvtsd2si(ecx, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5EB5ACB" , vcvtsd2ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5A8C2B80000000" , vcvtsd2ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB5A8C2B80000000" , vcvtsd2ss(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F17F0879CA" , vcvtsd2usi(ecx, xmm2)); TEST_INSTRUCTION("62F17F08794C1A10" , vcvtsd2usi(ecx, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17F08794C1A10" , vcvtsd2usi(ecx, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5EB2ACB" , vcvtsi2sd(xmm1, xmm2, ebx)); - TEST_INSTRUCTION("C5EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E1EB2A8C2B80000000" , vcvtsi2sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA2ACB" , vcvtsi2ss(xmm1, xmm2, ebx)); - TEST_INSTRUCTION("C5EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E1EA2A8C2B80000000" , vcvtsi2ss(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5ACB" , vcvtss2sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5A8C2B80000000" , vcvtss2sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5A8C2B80000000" , vcvtss2sd(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5FA2DCA" , vcvtss2si(ecx, xmm2)); - TEST_INSTRUCTION("C5FA2D8C1A80000000" , vcvtss2si(ecx, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA2D8C1A80000000" , vcvtss2si(ecx, dword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E0879CA" , vcvtss2usi(ecx, xmm2)); TEST_INSTRUCTION("62F17E08794C1A20" , vcvtss2usi(ecx, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E08794C1A20" , vcvtss2usi(ecx, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F9E6CA" , vcvttpd2dq(xmm1, xmm2)); - TEST_INSTRUCTION("C5FDE6CA" , vcvttpd2dq(xmm1, ymm2)); - TEST_INSTRUCTION("C5F9E68C1A80000000" , vcvttpd2dq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FDE68C1A80000000" , vcvttpd2dq(xmm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD48E6CA" , vcvttpd2dq(ymm1, zmm2)); TEST_INSTRUCTION("62F1FD48E64C1A02" , vcvttpd2dq(ymm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD48E64C1A02" , vcvttpd2dq(ymm1, zmmword_ptr(edx, ebx, 0, 128))); @@ -3122,12 +5311,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1FD4878CA" , vcvttpd2uqq(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48784C1A02" , vcvttpd2uqq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD48784C1A02" , vcvttpd2uqq(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA5BCA" , vcvttps2dq(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA5B8C1A80000000" , vcvttps2dq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA5B8C1A80000000" , vcvttps2dq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FE5BCA" , vcvttps2dq(ymm1, ymm2)); - TEST_INSTRUCTION("C5FE5B8C1A80000000" , vcvttps2dq(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FE5B8C1A80000000" , vcvttps2dq(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E485BCA" , vcvttps2dq(zmm1, zmm2)); TEST_INSTRUCTION("62F17E485B4C1A02" , vcvttps2dq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E485B4C1A02" , vcvttps2dq(zmm1, zmmword_ptr(edx, ebx, 0, 128))); @@ -3158,15 +5341,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F17D4878CA" , vcvttps2uqq(zmm1, ymm2)); TEST_INSTRUCTION("62F17D48784C1A04" , vcvttps2uqq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17D48784C1A04" , vcvttps2uqq(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FB2CCA" , vcvttsd2si(ecx, xmm2)); - TEST_INSTRUCTION("C5FB2C8C1A80000000" , vcvttsd2si(ecx, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FB2C8C1A80000000" , vcvttsd2si(ecx, qword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17F0878CA" , vcvttsd2usi(ecx, xmm2)); TEST_INSTRUCTION("62F17F08784C1A10" , vcvttsd2usi(ecx, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17F08784C1A10" , vcvttsd2usi(ecx, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA2CCA" , vcvttss2si(ecx, xmm2)); - TEST_INSTRUCTION("C5FA2C8C1A80000000" , vcvttss2si(ecx, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA2C8C1A80000000" , vcvttss2si(ecx, dword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E0878CA" , vcvttss2usi(ecx, xmm2)); TEST_INSTRUCTION("62F17E08784C1A20" , vcvttss2usi(ecx, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E08784C1A20" , vcvttss2usi(ecx, dword_ptr(edx, ebx, 0, 128))); @@ -3207,11 +5384,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16F087BCB" , vcvtusi2sd(xmm1, xmm2, ebx)); TEST_INSTRUCTION("62F16F087B4C2B20" , vcvtusi2sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16F087B4C2B20" , vcvtusi2sd(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("62F1EF087B4C2B10" , vcvtusi2sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16E087BCB" , vcvtusi2ss(xmm1, xmm2, ebx)); TEST_INSTRUCTION("62F16E087B4C2B20" , vcvtusi2ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16E087B4C2B20" , vcvtusi2ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("62F1EE087B4C2B10" , vcvtusi2ss(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F36D0842CB01" , vdbpsadbw(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08424C2B0801" , vdbpsadbw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08424C2B0801" , vdbpsadbw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); @@ -3221,30 +5396,12 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D4842CB01" , vdbpsadbw(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F36D48424C2B0201" , vdbpsadbw(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D48424C2B0201" , vdbpsadbw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E95ECB" , vdivpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E95E8C2B80000000" , vdivpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E95E8C2B80000000" , vdivpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED5ECB" , vdivpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED5E8C2B80000000" , vdivpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED5E8C2B80000000" , vdivpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED485ECB" , vdivpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED485E4C2B02" , vdivpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED485E4C2B02" , vdivpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E85ECB" , vdivps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E85E8C2B80000000" , vdivps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E85E8C2B80000000" , vdivps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC5ECB" , vdivps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC5E8C2B80000000" , vdivps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC5E8C2B80000000" , vdivps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C485ECB" , vdivps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C485E4C2B02" , vdivps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C485E4C2B02" , vdivps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB5ECB" , vdivsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5E8C2B80000000" , vdivsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB5E8C2B80000000" , vdivsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5ECB" , vdivss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5E8C2B80000000" , vdivss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5E8C2B80000000" , vdivss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26E0852CB" , vdpbf16ps(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26E08524C2B08" , vdpbf16ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26E08524C2B08" , vdpbf16ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -3254,15 +5411,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26E4852CB" , vdpbf16ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26E48524C2B02" , vdpbf16ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26E48524C2B02" , vdpbf16ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E36941CB01" , vdppd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369418C2B8000000001" , vdppd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369418C2B8000000001" , vdppd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36940CB01" , vdpps(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369408C2B8000000001" , vdpps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369408C2B8000000001" , vdpps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D40CB01" , vdpps(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D408C2B8000000001" , vdpps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D408C2B8000000001" , vdpps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F2FD48C8CA" , vexp2pd(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48C84C1A02" , vexp2pd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD48C84C1A02" , vexp2pd(zmm1, zmmword_ptr(edx, ebx, 0, 128))); @@ -3287,9 +5435,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27D4888CA" , vexpandps(zmm1, zmm2)); TEST_INSTRUCTION("62F27D48884C1A20" , vexpandps(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48884C1A20" , vexpandps(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E37D19D101" , vextractf128(xmm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D199C118000000001" , vextractf128(ptr(ecx, edx, 0, 128), ymm3, 1)); - TEST_INSTRUCTION("C4E37D199C118000000001" , vextractf128(xmmword_ptr(ecx, edx, 0, 128), ymm3, 1)); TEST_INSTRUCTION("62F37D2819D101" , vextractf32x4(xmm1, ymm2, 1)); TEST_INSTRUCTION("62F37D4819D101" , vextractf32x4(xmm1, zmm2, 1)); TEST_INSTRUCTION("62F37D28195C110801" , vextractf32x4(ptr(ecx, edx, 0, 128), ymm3, 1)); @@ -3308,9 +5453,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3FD481BD101" , vextractf64x4(ymm1, zmm2, 1)); TEST_INSTRUCTION("62F3FD481B5C110401" , vextractf64x4(ptr(ecx, edx, 0, 128), zmm3, 1)); TEST_INSTRUCTION("62F3FD481B5C110401" , vextractf64x4(ymmword_ptr(ecx, edx, 0, 128), zmm3, 1)); - TEST_INSTRUCTION("C4E37D39D101" , vextracti128(xmm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D399C118000000001" , vextracti128(ptr(ecx, edx, 0, 128), ymm3, 1)); - TEST_INSTRUCTION("C4E37D399C118000000001" , vextracti128(xmmword_ptr(ecx, edx, 0, 128), ymm3, 1)); TEST_INSTRUCTION("62F37D2839D101" , vextracti32x4(xmm1, ymm2, 1)); TEST_INSTRUCTION("62F37D4839D101" , vextracti32x4(xmm1, zmm2, 1)); TEST_INSTRUCTION("62F37D28395C110801" , vextracti32x4(ptr(ecx, edx, 0, 128), ymm3, 1)); @@ -3329,9 +5471,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3FD483BD101" , vextracti64x4(ymm1, zmm2, 1)); TEST_INSTRUCTION("62F3FD483B5C110401" , vextracti64x4(ptr(ecx, edx, 0, 128), zmm3, 1)); TEST_INSTRUCTION("62F3FD483B5C110401" , vextracti64x4(ymmword_ptr(ecx, edx, 0, 128), zmm3, 1)); - TEST_INSTRUCTION("C4E37917D101" , vextractps(ecx, xmm2, 1)); - TEST_INSTRUCTION("C4E379179C118000000001" , vextractps(ptr(ecx, edx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E379179C118000000001" , vextractps(dword_ptr(ecx, edx, 0, 128), xmm3, 1)); TEST_INSTRUCTION("62F3ED0854CB01" , vfixupimmpd(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F3ED08544C2B0801" , vfixupimmpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED08544C2B0801" , vfixupimmpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); @@ -3356,562 +5495,114 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D0855CB01" , vfixupimmss(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08554C2B2001" , vfixupimmss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08554C2B2001" , vfixupimmss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E2E998CB" , vfmadd132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9988C2B80000000" , vfmadd132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9988C2B80000000" , vfmadd132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED98CB" , vfmadd132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED988C2B80000000" , vfmadd132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED988C2B80000000" , vfmadd132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED4898CB" , vfmadd132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48984C2B02" , vfmadd132pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48984C2B02" , vfmadd132pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26998CB" , vfmadd132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269988C2B80000000" , vfmadd132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269988C2B80000000" , vfmadd132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D98CB" , vfmadd132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D988C2B80000000" , vfmadd132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D988C2B80000000" , vfmadd132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4898CB" , vfmadd132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48984C2B02" , vfmadd132ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48984C2B02" , vfmadd132ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E999CB" , vfmadd132sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9998C2B80000000" , vfmadd132sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9998C2B80000000" , vfmadd132sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26999CB" , vfmadd132ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269998C2B80000000" , vfmadd132ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269998C2B80000000" , vfmadd132ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A8CB" , vfmadd213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9A88C2B80000000" , vfmadd213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A88C2B80000000" , vfmadd213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA8CB" , vfmadd213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDA88C2B80000000" , vfmadd213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA88C2B80000000" , vfmadd213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48A8CB" , vfmadd213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48A84C2B02" , vfmadd213pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48A84C2B02" , vfmadd213pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269A8CB" , vfmadd213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269A88C2B80000000" , vfmadd213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269A88C2B80000000" , vfmadd213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DA8CB" , vfmadd213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DA88C2B80000000" , vfmadd213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DA88C2B80000000" , vfmadd213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48A8CB" , vfmadd213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48A84C2B02" , vfmadd213ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48A84C2B02" , vfmadd213ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A9CB" , vfmadd213sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9A98C2B80000000" , vfmadd213sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A98C2B80000000" , vfmadd213sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269A9CB" , vfmadd213ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269A98C2B80000000" , vfmadd213ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269A98C2B80000000" , vfmadd213ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B8CB" , vfmadd231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9B88C2B80000000" , vfmadd231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B88C2B80000000" , vfmadd231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB8CB" , vfmadd231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDB88C2B80000000" , vfmadd231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB88C2B80000000" , vfmadd231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48B8CB" , vfmadd231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48B84C2B02" , vfmadd231pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48B84C2B02" , vfmadd231pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269B8CB" , vfmadd231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269B88C2B80000000" , vfmadd231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269B88C2B80000000" , vfmadd231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DB8CB" , vfmadd231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DB88C2B80000000" , vfmadd231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DB88C2B80000000" , vfmadd231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48B8CB" , vfmadd231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48B84C2B02" , vfmadd231ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48B84C2B02" , vfmadd231ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B9CB" , vfmadd231sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9B98C2B80000000" , vfmadd231sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B98C2B80000000" , vfmadd231sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269B9CB" , vfmadd231ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269B98C2B80000000" , vfmadd231ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269B98C2B80000000" , vfmadd231ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E3E969CC30" , vfmaddpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E9698C358000000030" , vfmaddpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E9698C358000000030" , vfmaddpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E369698C2B8000000060" , vfmaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E369698C2B8000000060" , vfmaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED69CC30" , vfmaddpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED698C358000000030" , vfmaddpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED698C358000000030" , vfmaddpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D698C2B8000000060" , vfmaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D698C2B8000000060" , vfmaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E968CC30" , vfmaddps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E9688C358000000030" , vfmaddps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E9688C358000000030" , vfmaddps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E369688C2B8000000060" , vfmaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E369688C2B8000000060" , vfmaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED68CC30" , vfmaddps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED688C358000000030" , vfmaddps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED688C358000000030" , vfmaddps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D688C2B8000000060" , vfmaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D688C2B8000000060" , vfmaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E96BCC30" , vfmaddsd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96B8C358000000030" , vfmaddsd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E96B8C358000000030" , vfmaddsd(xmm1, xmm2, xmm3, qword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3696B8C2B8000000060" , vfmaddsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696B8C2B8000000060" , vfmaddsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3E96ACC30" , vfmaddss(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96A8C358000000030" , vfmaddss(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E96A8C358000000030" , vfmaddss(xmm1, xmm2, xmm3, dword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3696A8C2B8000000060" , vfmaddss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696A8C2B8000000060" , vfmaddss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E2E996CB" , vfmaddsub132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9968C2B80000000" , vfmaddsub132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9968C2B80000000" , vfmaddsub132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED96CB" , vfmaddsub132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED968C2B80000000" , vfmaddsub132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED968C2B80000000" , vfmaddsub132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED4896CB" , vfmaddsub132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48964C2B02" , vfmaddsub132pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48964C2B02" , vfmaddsub132pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26996CB" , vfmaddsub132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269968C2B80000000" , vfmaddsub132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269968C2B80000000" , vfmaddsub132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D96CB" , vfmaddsub132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D968C2B80000000" , vfmaddsub132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D968C2B80000000" , vfmaddsub132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4896CB" , vfmaddsub132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48964C2B02" , vfmaddsub132ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48964C2B02" , vfmaddsub132ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A6CB" , vfmaddsub213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9A68C2B80000000" , vfmaddsub213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A68C2B80000000" , vfmaddsub213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA6CB" , vfmaddsub213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDA68C2B80000000" , vfmaddsub213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA68C2B80000000" , vfmaddsub213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48A6CB" , vfmaddsub213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48A64C2B02" , vfmaddsub213pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48A64C2B02" , vfmaddsub213pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269A6CB" , vfmaddsub213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269A68C2B80000000" , vfmaddsub213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269A68C2B80000000" , vfmaddsub213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DA6CB" , vfmaddsub213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DA68C2B80000000" , vfmaddsub213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DA68C2B80000000" , vfmaddsub213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48A6CB" , vfmaddsub213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48A64C2B02" , vfmaddsub213ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48A64C2B02" , vfmaddsub213ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B6CB" , vfmaddsub231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9B68C2B80000000" , vfmaddsub231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B68C2B80000000" , vfmaddsub231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB6CB" , vfmaddsub231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDB68C2B80000000" , vfmaddsub231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB68C2B80000000" , vfmaddsub231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48B6CB" , vfmaddsub231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48B64C2B02" , vfmaddsub231pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48B64C2B02" , vfmaddsub231pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269B6CB" , vfmaddsub231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269B68C2B80000000" , vfmaddsub231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269B68C2B80000000" , vfmaddsub231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DB6CB" , vfmaddsub231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DB68C2B80000000" , vfmaddsub231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DB68C2B80000000" , vfmaddsub231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48B6CB" , vfmaddsub231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48B64C2B02" , vfmaddsub231ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48B64C2B02" , vfmaddsub231ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E3E95DCC30" , vfmaddsubpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E95D8C358000000030" , vfmaddsubpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E95D8C358000000030" , vfmaddsubpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3695D8C2B8000000060" , vfmaddsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3695D8C2B8000000060" , vfmaddsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED5DCC30" , vfmaddsubpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED5D8C358000000030" , vfmaddsubpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED5D8C358000000030" , vfmaddsubpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D5D8C2B8000000060" , vfmaddsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D5D8C2B8000000060" , vfmaddsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E95CCC30" , vfmaddsubps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E95C8C358000000030" , vfmaddsubps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E95C8C358000000030" , vfmaddsubps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3695C8C2B8000000060" , vfmaddsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3695C8C2B8000000060" , vfmaddsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED5CCC30" , vfmaddsubps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED5C8C358000000030" , vfmaddsubps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED5C8C358000000030" , vfmaddsubps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D5C8C2B8000000060" , vfmaddsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D5C8C2B8000000060" , vfmaddsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E2E99ACB" , vfmsub132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99A8C2B80000000" , vfmsub132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E99A8C2B80000000" , vfmsub132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9ACB" , vfmsub132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED9A8C2B80000000" , vfmsub132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9A8C2B80000000" , vfmsub132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED489ACB" , vfmsub132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED489A4C2B02" , vfmsub132pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED489A4C2B02" , vfmsub132pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699ACB" , vfmsub132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699A8C2B80000000" , vfmsub132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699A8C2B80000000" , vfmsub132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D9ACB" , vfmsub132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D9A8C2B80000000" , vfmsub132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D9A8C2B80000000" , vfmsub132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D489ACB" , vfmsub132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D489A4C2B02" , vfmsub132ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D489A4C2B02" , vfmsub132ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E99BCB" , vfmsub132sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99B8C2B80000000" , vfmsub132sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E99B8C2B80000000" , vfmsub132sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699BCB" , vfmsub132ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699B8C2B80000000" , vfmsub132ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699B8C2B80000000" , vfmsub132ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AACB" , vfmsub213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AA8C2B80000000" , vfmsub213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AA8C2B80000000" , vfmsub213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAACB" , vfmsub213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDAA8C2B80000000" , vfmsub213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAA8C2B80000000" , vfmsub213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48AACB" , vfmsub213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48AA4C2B02" , vfmsub213pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48AA4C2B02" , vfmsub213pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269AACB" , vfmsub213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AA8C2B80000000" , vfmsub213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269AA8C2B80000000" , vfmsub213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DAACB" , vfmsub213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DAA8C2B80000000" , vfmsub213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DAA8C2B80000000" , vfmsub213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48AACB" , vfmsub213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48AA4C2B02" , vfmsub213ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48AA4C2B02" , vfmsub213ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9ABCB" , vfmsub213sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AB8C2B80000000" , vfmsub213sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AB8C2B80000000" , vfmsub213sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269ABCB" , vfmsub213ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AB8C2B80000000" , vfmsub213ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269AB8C2B80000000" , vfmsub213ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BACB" , vfmsub231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BA8C2B80000000" , vfmsub231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BA8C2B80000000" , vfmsub231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBACB" , vfmsub231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDBA8C2B80000000" , vfmsub231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBA8C2B80000000" , vfmsub231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48BACB" , vfmsub231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48BA4C2B02" , vfmsub231pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48BA4C2B02" , vfmsub231pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BACB" , vfmsub231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BA8C2B80000000" , vfmsub231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BA8C2B80000000" , vfmsub231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DBACB" , vfmsub231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DBA8C2B80000000" , vfmsub231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DBA8C2B80000000" , vfmsub231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48BACB" , vfmsub231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48BA4C2B02" , vfmsub231ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48BA4C2B02" , vfmsub231ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BBCB" , vfmsub231sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BB8C2B80000000" , vfmsub231sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BB8C2B80000000" , vfmsub231sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BBCB" , vfmsub231ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BB8C2B80000000" , vfmsub231ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BB8C2B80000000" , vfmsub231ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E997CB" , vfmsubadd132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9978C2B80000000" , vfmsubadd132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9978C2B80000000" , vfmsubadd132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED97CB" , vfmsubadd132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED978C2B80000000" , vfmsubadd132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED978C2B80000000" , vfmsubadd132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED4897CB" , vfmsubadd132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48974C2B02" , vfmsubadd132pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48974C2B02" , vfmsubadd132pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26997CB" , vfmsubadd132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269978C2B80000000" , vfmsubadd132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269978C2B80000000" , vfmsubadd132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D97CB" , vfmsubadd132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D978C2B80000000" , vfmsubadd132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D978C2B80000000" , vfmsubadd132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4897CB" , vfmsubadd132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48974C2B02" , vfmsubadd132ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48974C2B02" , vfmsubadd132ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A7CB" , vfmsubadd213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9A78C2B80000000" , vfmsubadd213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9A78C2B80000000" , vfmsubadd213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA7CB" , vfmsubadd213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDA78C2B80000000" , vfmsubadd213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDA78C2B80000000" , vfmsubadd213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48A7CB" , vfmsubadd213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48A74C2B02" , vfmsubadd213pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48A74C2B02" , vfmsubadd213pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269A7CB" , vfmsubadd213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269A78C2B80000000" , vfmsubadd213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269A78C2B80000000" , vfmsubadd213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DA7CB" , vfmsubadd213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DA78C2B80000000" , vfmsubadd213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DA78C2B80000000" , vfmsubadd213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48A7CB" , vfmsubadd213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48A74C2B02" , vfmsubadd213ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48A74C2B02" , vfmsubadd213ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B7CB" , vfmsubadd231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9B78C2B80000000" , vfmsubadd231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9B78C2B80000000" , vfmsubadd231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB7CB" , vfmsubadd231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDB78C2B80000000" , vfmsubadd231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDB78C2B80000000" , vfmsubadd231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48B7CB" , vfmsubadd231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48B74C2B02" , vfmsubadd231pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48B74C2B02" , vfmsubadd231pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269B7CB" , vfmsubadd231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269B78C2B80000000" , vfmsubadd231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269B78C2B80000000" , vfmsubadd231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DB7CB" , vfmsubadd231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DB78C2B80000000" , vfmsubadd231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DB78C2B80000000" , vfmsubadd231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48B7CB" , vfmsubadd231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48B74C2B02" , vfmsubadd231ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48B74C2B02" , vfmsubadd231ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E3E95FCC30" , vfmsubaddpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E95F8C358000000030" , vfmsubaddpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E95F8C358000000030" , vfmsubaddpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3695F8C2B8000000060" , vfmsubaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3695F8C2B8000000060" , vfmsubaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED5FCC30" , vfmsubaddpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED5F8C358000000030" , vfmsubaddpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED5F8C358000000030" , vfmsubaddpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D5F8C2B8000000060" , vfmsubaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D5F8C2B8000000060" , vfmsubaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E95ECC30" , vfmsubaddps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E95E8C358000000030" , vfmsubaddps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E95E8C358000000030" , vfmsubaddps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3695E8C2B8000000060" , vfmsubaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3695E8C2B8000000060" , vfmsubaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED5ECC30" , vfmsubaddps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED5E8C358000000030" , vfmsubaddps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED5E8C358000000030" , vfmsubaddps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D5E8C2B8000000060" , vfmsubaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D5E8C2B8000000060" , vfmsubaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E96DCC30" , vfmsubpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96D8C358000000030" , vfmsubpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E96D8C358000000030" , vfmsubpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3696D8C2B8000000060" , vfmsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696D8C2B8000000060" , vfmsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED6DCC30" , vfmsubpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED6D8C358000000030" , vfmsubpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED6D8C358000000030" , vfmsubpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D6D8C2B8000000060" , vfmsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D6D8C2B8000000060" , vfmsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E96CCC30" , vfmsubps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96C8C358000000030" , vfmsubps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E96C8C358000000030" , vfmsubps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3696C8C2B8000000060" , vfmsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696C8C2B8000000060" , vfmsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED6CCC30" , vfmsubps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED6C8C358000000030" , vfmsubps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED6C8C358000000030" , vfmsubps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D6C8C2B8000000060" , vfmsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D6C8C2B8000000060" , vfmsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E96FCC30" , vfmsubsd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96F8C358000000030" , vfmsubsd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E96F8C358000000030" , vfmsubsd(xmm1, xmm2, xmm3, qword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3696F8C2B8000000060" , vfmsubsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696F8C2B8000000060" , vfmsubsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3E96ECC30" , vfmsubss(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E96E8C358000000030" , vfmsubss(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E96E8C358000000030" , vfmsubss(xmm1, xmm2, xmm3, dword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3696E8C2B8000000060" , vfmsubss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3696E8C2B8000000060" , vfmsubss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E2E99CCB" , vfnmadd132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99C8C2B80000000" , vfnmadd132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E99C8C2B80000000" , vfnmadd132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9CCB" , vfnmadd132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED9C8C2B80000000" , vfnmadd132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9C8C2B80000000" , vfnmadd132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED489CCB" , vfnmadd132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED489C4C2B02" , vfnmadd132pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED489C4C2B02" , vfnmadd132pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699CCB" , vfnmadd132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699C8C2B80000000" , vfnmadd132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699C8C2B80000000" , vfnmadd132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D9CCB" , vfnmadd132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D9C8C2B80000000" , vfnmadd132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D9C8C2B80000000" , vfnmadd132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D489CCB" , vfnmadd132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D489C4C2B02" , vfnmadd132ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D489C4C2B02" , vfnmadd132ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E99DCB" , vfnmadd132sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99D8C2B80000000" , vfnmadd132sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E99D8C2B80000000" , vfnmadd132sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699DCB" , vfnmadd132ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699D8C2B80000000" , vfnmadd132ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699D8C2B80000000" , vfnmadd132ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9ACCB" , vfnmadd213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AC8C2B80000000" , vfnmadd213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AC8C2B80000000" , vfnmadd213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDACCB" , vfnmadd213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDAC8C2B80000000" , vfnmadd213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAC8C2B80000000" , vfnmadd213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48ACCB" , vfnmadd213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48AC4C2B02" , vfnmadd213pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48AC4C2B02" , vfnmadd213pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269ACCB" , vfnmadd213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AC8C2B80000000" , vfnmadd213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269AC8C2B80000000" , vfnmadd213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DACCB" , vfnmadd213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DAC8C2B80000000" , vfnmadd213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DAC8C2B80000000" , vfnmadd213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48ACCB" , vfnmadd213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48AC4C2B02" , vfnmadd213ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48AC4C2B02" , vfnmadd213ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9ADCB" , vfnmadd213sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AD8C2B80000000" , vfnmadd213sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AD8C2B80000000" , vfnmadd213sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269ADCB" , vfnmadd213ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AD8C2B80000000" , vfnmadd213ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269AD8C2B80000000" , vfnmadd213ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BCCB" , vfnmadd231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BC8C2B80000000" , vfnmadd231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BC8C2B80000000" , vfnmadd231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBCCB" , vfnmadd231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDBC8C2B80000000" , vfnmadd231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBC8C2B80000000" , vfnmadd231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48BCCB" , vfnmadd231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48BC4C2B02" , vfnmadd231pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48BC4C2B02" , vfnmadd231pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BCCB" , vfnmadd231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BC8C2B80000000" , vfnmadd231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BC8C2B80000000" , vfnmadd231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DBCCB" , vfnmadd231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DBC8C2B80000000" , vfnmadd231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DBC8C2B80000000" , vfnmadd231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48BCCB" , vfnmadd231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48BC4C2B02" , vfnmadd231ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48BC4C2B02" , vfnmadd231ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BDCB" , vfnmadd231sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BD8C2B80000000" , vfnmadd231sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BD8C2B80000000" , vfnmadd231sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BDCB" , vfnmadd231ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BD8C2B80000000" , vfnmadd231ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BD8C2B80000000" , vfnmadd231ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E3E979CC30" , vfnmaddpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E9798C358000000030" , vfnmaddpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E9798C358000000030" , vfnmaddpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E369798C2B8000000060" , vfnmaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E369798C2B8000000060" , vfnmaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED79CC30" , vfnmaddpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED798C358000000030" , vfnmaddpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED798C358000000030" , vfnmaddpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D798C2B8000000060" , vfnmaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D798C2B8000000060" , vfnmaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E978CC30" , vfnmaddps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E9788C358000000030" , vfnmaddps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E9788C358000000030" , vfnmaddps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E369788C2B8000000060" , vfnmaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E369788C2B8000000060" , vfnmaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED78CC30" , vfnmaddps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED788C358000000030" , vfnmaddps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED788C358000000030" , vfnmaddps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D788C2B8000000060" , vfnmaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D788C2B8000000060" , vfnmaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E97BCC30" , vfnmaddsd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97B8C358000000030" , vfnmaddsd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E97B8C358000000030" , vfnmaddsd(xmm1, xmm2, xmm3, qword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3697B8C2B8000000060" , vfnmaddsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697B8C2B8000000060" , vfnmaddsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3E97ACC30" , vfnmaddss(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97A8C358000000030" , vfnmaddss(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E97A8C358000000030" , vfnmaddss(xmm1, xmm2, xmm3, dword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3697A8C2B8000000060" , vfnmaddss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697A8C2B8000000060" , vfnmaddss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E2E99ECB" , vfnmsub132pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99E8C2B80000000" , vfnmsub132pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E99E8C2B80000000" , vfnmsub132pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9ECB" , vfnmsub132pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED9E8C2B80000000" , vfnmsub132pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED9E8C2B80000000" , vfnmsub132pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED489ECB" , vfnmsub132pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED489E4C2B02" , vfnmsub132pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED489E4C2B02" , vfnmsub132pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699ECB" , vfnmsub132ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699E8C2B80000000" , vfnmsub132ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699E8C2B80000000" , vfnmsub132ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D9ECB" , vfnmsub132ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D9E8C2B80000000" , vfnmsub132ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D9E8C2B80000000" , vfnmsub132ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D489ECB" , vfnmsub132ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D489E4C2B02" , vfnmsub132ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D489E4C2B02" , vfnmsub132ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E99FCB" , vfnmsub132sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E99F8C2B80000000" , vfnmsub132sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E99F8C2B80000000" , vfnmsub132sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699FCB" , vfnmsub132ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2699F8C2B80000000" , vfnmsub132ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2699F8C2B80000000" , vfnmsub132ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AECB" , vfnmsub213pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AE8C2B80000000" , vfnmsub213pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AE8C2B80000000" , vfnmsub213pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAECB" , vfnmsub213pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDAE8C2B80000000" , vfnmsub213pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDAE8C2B80000000" , vfnmsub213pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48AECB" , vfnmsub213pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48AE4C2B02" , vfnmsub213pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48AE4C2B02" , vfnmsub213pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269AECB" , vfnmsub213ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AE8C2B80000000" , vfnmsub213ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269AE8C2B80000000" , vfnmsub213ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DAECB" , vfnmsub213ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DAE8C2B80000000" , vfnmsub213ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DAE8C2B80000000" , vfnmsub213ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48AECB" , vfnmsub213ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48AE4C2B02" , vfnmsub213ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48AE4C2B02" , vfnmsub213ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AFCB" , vfnmsub213sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9AF8C2B80000000" , vfnmsub213sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9AF8C2B80000000" , vfnmsub213sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269AFCB" , vfnmsub213ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269AF8C2B80000000" , vfnmsub213ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269AF8C2B80000000" , vfnmsub213ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BECB" , vfnmsub231pd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BE8C2B80000000" , vfnmsub231pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BE8C2B80000000" , vfnmsub231pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBECB" , vfnmsub231pd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2EDBE8C2B80000000" , vfnmsub231pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2EDBE8C2B80000000" , vfnmsub231pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48BECB" , vfnmsub231pd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48BE4C2B02" , vfnmsub231pd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48BE4C2B02" , vfnmsub231pd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BECB" , vfnmsub231ps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BE8C2B80000000" , vfnmsub231ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BE8C2B80000000" , vfnmsub231ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DBECB" , vfnmsub231ps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DBE8C2B80000000" , vfnmsub231ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DBE8C2B80000000" , vfnmsub231ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48BECB" , vfnmsub231ps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48BE4C2B02" , vfnmsub231ps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48BE4C2B02" , vfnmsub231ps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BFCB" , vfnmsub231sd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9BF8C2B80000000" , vfnmsub231sd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9BF8C2B80000000" , vfnmsub231sd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BFCB" , vfnmsub231ss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269BF8C2B80000000" , vfnmsub231ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269BF8C2B80000000" , vfnmsub231ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E3E97DCC30" , vfnmsubpd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97D8C358000000030" , vfnmsubpd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E97D8C358000000030" , vfnmsubpd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3697D8C2B8000000060" , vfnmsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697D8C2B8000000060" , vfnmsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED7DCC30" , vfnmsubpd(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED7D8C358000000030" , vfnmsubpd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED7D8C358000000030" , vfnmsubpd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D7D8C2B8000000060" , vfnmsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D7D8C2B8000000060" , vfnmsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E97CCC30" , vfnmsubps(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97C8C358000000030" , vfnmsubps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E97C8C358000000030" , vfnmsubps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3697C8C2B8000000060" , vfnmsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697C8C2B8000000060" , vfnmsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3ED7CCC30" , vfnmsubps(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E3ED7C8C358000000030" , vfnmsubps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3ED7C8C358000000030" , vfnmsubps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E36D7C8C2B8000000060" , vfnmsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D7C8C2B8000000060" , vfnmsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3E97FCC30" , vfnmsubsd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97F8C358000000030" , vfnmsubsd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E97F8C358000000030" , vfnmsubsd(xmm1, xmm2, xmm3, qword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3697F8C2B8000000060" , vfnmsubsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697F8C2B8000000060" , vfnmsubsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3E97ECC30" , vfnmsubss(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3E97E8C358000000030" , vfnmsubss(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3E97E8C358000000030" , vfnmsubss(xmm1, xmm2, xmm3, dword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("C4E3697E8C2B8000000060" , vfnmsubss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3697E8C2B8000000060" , vfnmsubss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), xmm6)); TEST_INSTRUCTION("62F3FD0866CA01" , vfpclasspd(k1, xmm2, 1)); TEST_INSTRUCTION("62F3FD2866CA01" , vfpclasspd(k1, ymm2, 1)); TEST_INSTRUCTION("62F3FD4866CA01" , vfpclasspd(k1, zmm2, 1)); @@ -3930,31 +5621,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F37D0867CA01" , vfpclassss(k1, xmm2, 1)); TEST_INSTRUCTION("62F37D08674C1A2001" , vfpclassss(k1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F37D08674C1A2001" , vfpclassss(k1, dword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("8FE97881CA" , vfrczpd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978818C1A80000000" , vfrczpd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978818C1A80000000" , vfrczpd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE97C81CA" , vfrczpd(ymm1, ymm2)); - TEST_INSTRUCTION("8FE97C818C1A80000000" , vfrczpd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE97C818C1A80000000" , vfrczpd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE97880CA" , vfrczps(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978808C1A80000000" , vfrczps(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978808C1A80000000" , vfrczps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE97C80CA" , vfrczps(ymm1, ymm2)); - TEST_INSTRUCTION("8FE97C808C1A80000000" , vfrczps(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE97C808C1A80000000" , vfrczps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE97883CA" , vfrczsd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978838C1A80000000" , vfrczsd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978838C1A80000000" , vfrczsd(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE97882CA" , vfrczss(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978828C1A80000000" , vfrczss(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978828C1A80000000" , vfrczss(xmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2D9928C1A80000000" , vgatherdpd(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E2DD928C1A80000000" , vgatherdpd(ymm1, ptr(edx, xmm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F2FD09924C1A10" , k(k1).vgatherdpd(xmm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD29924C1A10" , k(k1).vgatherdpd(ymm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD49924C1A10" , k(k1).vgatherdpd(zmm1, ptr(edx, ymm3, 0, 128))); - TEST_INSTRUCTION("C4E259928C1A80000000" , vgatherdps(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E25D928C1A80000000" , vgatherdps(ymm1, ptr(edx, ymm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F27D09924C1A20" , k(k1).vgatherdps(xmm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F27D29924C1A20" , k(k1).vgatherdps(ymm1, ptr(edx, ymm3, 0, 128))); TEST_INSTRUCTION("62F27D49924C1A20" , k(k1).vgatherdps(zmm1, ptr(edx, zmm3, 0, 128))); @@ -3966,13 +5635,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27D49C6541120" , k(k1).vgatherpf1dps(ptr(ecx, zmm2, 0, 128))); TEST_INSTRUCTION("62F2FD49C7541110" , k(k1).vgatherpf1qpd(ptr(ecx, zmm2, 0, 128))); TEST_INSTRUCTION("62F27D49C7541120" , k(k1).vgatherpf1qps(ptr(ecx, zmm2, 0, 128))); - TEST_INSTRUCTION("C4E2D9938C1A80000000" , vgatherqpd(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E2DD938C1A80000000" , vgatherqpd(ymm1, ptr(edx, ymm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F2FD09934C1A10" , k(k1).vgatherqpd(xmm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD29934C1A10" , k(k1).vgatherqpd(ymm1, ptr(edx, ymm3, 0, 128))); TEST_INSTRUCTION("62F2FD49934C1A10" , k(k1).vgatherqpd(zmm1, ptr(edx, zmm3, 0, 128))); - TEST_INSTRUCTION("C4E259938C1A80000000" , vgatherqps(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E25D938C1A80000000" , vgatherqps(xmm1, ptr(edx, ymm3, 0, 128), xmm4)); TEST_INSTRUCTION("62F27D09934C1A20" , k(k1).vgatherqps(xmm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F27D29934C1A20" , k(k1).vgatherqps(xmm1, ptr(edx, ymm3, 0, 128))); TEST_INSTRUCTION("62F27D49934C1A20" , k(k1).vgatherqps(ymm1, ptr(edx, zmm3, 0, 128))); @@ -4024,60 +5689,15 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D0827CB01" , vgetmantss(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08274C2B2001" , vgetmantss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08274C2B2001" , vgetmantss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9CFCB01" , vgf2p8affineinvqb(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3E9CF8C2B8000000001" , vgf2p8affineinvqb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9CF8C2B8000000001" , vgf2p8affineinvqb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3EDCFCB01" , vgf2p8affineinvqb(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E3EDCF8C2B8000000001" , vgf2p8affineinvqb(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3EDCF8C2B8000000001" , vgf2p8affineinvqb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48CFCB01" , vgf2p8affineinvqb(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48CF4C2B0201" , vgf2p8affineinvqb(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48CF4C2B0201" , vgf2p8affineinvqb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9CECB01" , vgf2p8affineqb(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3E9CE8C2B8000000001" , vgf2p8affineqb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9CE8C2B8000000001" , vgf2p8affineqb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3EDCECB01" , vgf2p8affineqb(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E3EDCE8C2B8000000001" , vgf2p8affineqb(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3EDCE8C2B8000000001" , vgf2p8affineqb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48CECB01" , vgf2p8affineqb(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48CE4C2B0201" , vgf2p8affineqb(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48CE4C2B0201" , vgf2p8affineqb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E269CFCB" , vgf2p8mulb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269CF8C2B80000000" , vgf2p8mulb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269CF8C2B80000000" , vgf2p8mulb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DCFCB" , vgf2p8mulb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26DCF8C2B80000000" , vgf2p8mulb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26DCF8C2B80000000" , vgf2p8mulb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48CFCB" , vgf2p8mulb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48CF4C2B02" , vgf2p8mulb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48CF4C2B02" , vgf2p8mulb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E97CCB" , vhaddpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E97C8C2B80000000" , vhaddpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E97C8C2B80000000" , vhaddpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED7CCB" , vhaddpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED7C8C2B80000000" , vhaddpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED7C8C2B80000000" , vhaddpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB7CCB" , vhaddps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB7C8C2B80000000" , vhaddps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB7C8C2B80000000" , vhaddps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EF7CCB" , vhaddps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EF7C8C2B80000000" , vhaddps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EF7C8C2B80000000" , vhaddps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E97DCB" , vhsubpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E97D8C2B80000000" , vhsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E97D8C2B80000000" , vhsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED7DCB" , vhsubpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED7D8C2B80000000" , vhsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED7D8C2B80000000" , vhsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB7DCB" , vhsubps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB7D8C2B80000000" , vhsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB7D8C2B80000000" , vhsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EF7DCB" , vhsubps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EF7D8C2B80000000" , vhsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EF7D8C2B80000000" , vhsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E36D18CB01" , vinsertf128(ymm1, ymm2, xmm3, 1)); - TEST_INSTRUCTION("C4E36D188C2B8000000001" , vinsertf128(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D188C2B8000000001" , vinsertf128(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D2818CB01" , vinsertf32x4(ymm1, ymm2, xmm3, 1)); TEST_INSTRUCTION("62F36D28184C2B0801" , vinsertf32x4(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D28184C2B0801" , vinsertf32x4(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); @@ -4096,9 +5716,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED481ACB01" , vinsertf64x4(zmm1, zmm2, ymm3, 1)); TEST_INSTRUCTION("62F3ED481A4C2B0401" , vinsertf64x4(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED481A4C2B0401" , vinsertf64x4(zmm1, zmm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D38CB01" , vinserti128(ymm1, ymm2, xmm3, 1)); - TEST_INSTRUCTION("C4E36D388C2B8000000001" , vinserti128(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D388C2B8000000001" , vinserti128(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D2838CB01" , vinserti32x4(ymm1, ymm2, xmm3, 1)); TEST_INSTRUCTION("62F36D28384C2B0801" , vinserti32x4(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D28384C2B0801" , vinserti32x4(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); @@ -4117,136 +5734,31 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED483ACB01" , vinserti64x4(zmm1, zmm2, ymm3, 1)); TEST_INSTRUCTION("62F3ED483A4C2B0401" , vinserti64x4(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED483A4C2B0401" , vinserti64x4(zmm1, zmm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36921CB01" , vinsertps(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369218C2B8000000001" , vinsertps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369218C2B8000000001" , vinsertps(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5FBF08C1A80000000" , vlddqu(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FBF08C1A80000000" , vlddqu(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FFF08C1A80000000" , vlddqu(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FFF08C1A80000000" , vlddqu(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F8AE941180000000" , vldmxcsr(ptr(ecx, edx, 0, 128))); - TEST_INSTRUCTION("C5F8AE941180000000" , vldmxcsr(dword_ptr(ecx, edx, 0, 128))); - TEST_INSTRUCTION("C5F9F7CA" , vmaskmovdqu(xmm1, xmm2, ptr(edi))); - TEST_INSTRUCTION("C5F9F7CA" , vmaskmovdqu(xmm1, xmm2, xmmword_ptr(edi))); - TEST_INSTRUCTION("C4E2612FA41180000000" , vmaskmovpd(ptr(ecx, edx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2612FA41180000000" , vmaskmovpd(xmmword_ptr(ecx, edx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2652FA41180000000" , vmaskmovpd(ptr(ecx, edx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2652FA41180000000" , vmaskmovpd(ymmword_ptr(ecx, edx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2692D8C2B80000000" , vmaskmovpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2692D8C2B80000000" , vmaskmovpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D2D8C2B80000000" , vmaskmovpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D2D8C2B80000000" , vmaskmovpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2612EA41180000000" , vmaskmovps(ptr(ecx, edx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2612EA41180000000" , vmaskmovps(xmmword_ptr(ecx, edx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2652EA41180000000" , vmaskmovps(ptr(ecx, edx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2652EA41180000000" , vmaskmovps(ymmword_ptr(ecx, edx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2692C8C2B80000000" , vmaskmovps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2692C8C2B80000000" , vmaskmovps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D2C8C2B80000000" , vmaskmovps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D2C8C2B80000000" , vmaskmovps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E95FCB" , vmaxpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E95F8C2B80000000" , vmaxpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E95F8C2B80000000" , vmaxpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED5FCB" , vmaxpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED5F8C2B80000000" , vmaxpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED5F8C2B80000000" , vmaxpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED485FCB" , vmaxpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED485F4C2B02" , vmaxpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED485F4C2B02" , vmaxpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E85FCB" , vmaxps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E85F8C2B80000000" , vmaxps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E85F8C2B80000000" , vmaxps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC5FCB" , vmaxps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC5F8C2B80000000" , vmaxps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC5F8C2B80000000" , vmaxps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C485FCB" , vmaxps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C485F4C2B02" , vmaxps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C485F4C2B02" , vmaxps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB5FCB" , vmaxsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5F8C2B80000000" , vmaxsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB5F8C2B80000000" , vmaxsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5FCB" , vmaxss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5F8C2B80000000" , vmaxss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5F8C2B80000000" , vmaxss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E95DCB" , vminpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E95D8C2B80000000" , vminpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E95D8C2B80000000" , vminpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED5DCB" , vminpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED5D8C2B80000000" , vminpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED5D8C2B80000000" , vminpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED485DCB" , vminpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED485D4C2B02" , vminpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED485D4C2B02" , vminpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E85DCB" , vminps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E85D8C2B80000000" , vminps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E85D8C2B80000000" , vminps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC5DCB" , vminps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC5D8C2B80000000" , vminps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC5D8C2B80000000" , vminps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C485DCB" , vminps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C485D4C2B02" , vminps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C485D4C2B02" , vminps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB5DCB" , vminsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5D8C2B80000000" , vminsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB5D8C2B80000000" , vminsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5DCB" , vminss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5D8C2B80000000" , vminss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5D8C2B80000000" , vminss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5F928CA" , vmovapd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F9288C1A80000000" , vmovapd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F9288C1A80000000" , vmovapd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F9299C1180000000" , vmovapd(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9299C1180000000" , vmovapd(xmmword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FD28CA" , vmovapd(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD288C1A80000000" , vmovapd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD288C1A80000000" , vmovapd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD299C1180000000" , vmovapd(ptr(ecx, edx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FD299C1180000000" , vmovapd(ymmword_ptr(ecx, edx, 0, 128), ymm3)); TEST_INSTRUCTION("62F1FD4828CA" , vmovapd(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48284C1A02" , vmovapd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD48284C1A02" , vmovapd(zmm1, zmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD48295C1102" , vmovapd(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F1FD48295C1102" , vmovapd(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5F828CA" , vmovaps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8288C1A80000000" , vmovaps(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F8288C1A80000000" , vmovaps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F8299C1180000000" , vmovaps(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F8299C1180000000" , vmovaps(xmmword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FC28CA" , vmovaps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC288C1A80000000" , vmovaps(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC288C1A80000000" , vmovaps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC299C1180000000" , vmovaps(ptr(ecx, edx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FC299C1180000000" , vmovaps(ymmword_ptr(ecx, edx, 0, 128), ymm3)); TEST_INSTRUCTION("62F17C4828CA" , vmovaps(zmm1, zmm2)); TEST_INSTRUCTION("62F17C48284C1A02" , vmovaps(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C48284C1A02" , vmovaps(zmm1, zmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C48295C1102" , vmovaps(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F17C48295C1102" , vmovaps(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5F97ED1" , vmovd(ecx, xmm2)); - TEST_INSTRUCTION("C5F97E9C1180000000" , vmovd(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F97E9C1180000000" , vmovd(dword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F96ECA" , vmovd(xmm1, edx)); - TEST_INSTRUCTION("C5F96E8C1A80000000" , vmovd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F96E8C1A80000000" , vmovd(xmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FB12CA" , vmovddup(xmm1, xmm2)); - TEST_INSTRUCTION("C5FB128C1A80000000" , vmovddup(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FB128C1A80000000" , vmovddup(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FF12CA" , vmovddup(ymm1, ymm2)); - TEST_INSTRUCTION("C5FF128C1A80000000" , vmovddup(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FF128C1A80000000" , vmovddup(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FF4812CA" , vmovddup(zmm1, zmm2)); TEST_INSTRUCTION("62F1FF48124C1A02" , vmovddup(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FF48124C1A02" , vmovddup(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F96FCA" , vmovdqa(xmm1, xmm2)); - TEST_INSTRUCTION("C5F96F8C1A80000000" , vmovdqa(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F96F8C1A80000000" , vmovdqa(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F97F9C1180000000" , vmovdqa(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F97F9C1180000000" , vmovdqa(xmmword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FD6FCA" , vmovdqa(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD6F8C1A80000000" , vmovdqa(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD6F8C1A80000000" , vmovdqa(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD7F9C1180000000" , vmovdqa(ptr(ecx, edx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FD7F9C1180000000" , vmovdqa(ymmword_ptr(ecx, edx, 0, 128), ymm3)); TEST_INSTRUCTION("62F17D086FCA" , vmovdqa32(xmm1, xmm2)); TEST_INSTRUCTION("62F17D086F4C1A08" , vmovdqa32(xmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17D086F4C1A08" , vmovdqa32(xmm1, xmmword_ptr(edx, ebx, 0, 128))); @@ -4277,16 +5789,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1FD486F4C1A02" , vmovdqa64(zmm1, zmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD487F5C1102" , vmovdqa64(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F1FD487F5C1102" , vmovdqa64(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5FA6FCA" , vmovdqu(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA6F8C1A80000000" , vmovdqu(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA6F8C1A80000000" , vmovdqu(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA7F9C1180000000" , vmovdqu(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FA7F9C1180000000" , vmovdqu(xmmword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FE6FCA" , vmovdqu(ymm1, ymm2)); - TEST_INSTRUCTION("C5FE6F8C1A80000000" , vmovdqu(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FE6F8C1A80000000" , vmovdqu(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FE7F9C1180000000" , vmovdqu(ptr(ecx, edx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FE7F9C1180000000" , vmovdqu(ymmword_ptr(ecx, edx, 0, 128), ymm3)); TEST_INSTRUCTION("62F1FF086FCA" , vmovdqu16(xmm1, xmm2)); TEST_INSTRUCTION("62F1FF086F4C1A08" , vmovdqu16(xmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FF086F4C1A08" , vmovdqu16(xmm1, xmmword_ptr(edx, ebx, 0, 128))); @@ -4347,160 +5849,39 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F17F486F4C1A02" , vmovdqu8(zmm1, zmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17F487F5C1102" , vmovdqu8(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F17F487F5C1102" , vmovdqu8(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5E812CB" , vmovhlps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F9179C1180000000" , vmovhpd(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9179C1180000000" , vmovhpd(qword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5E9168C2B80000000" , vmovhpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9168C2B80000000" , vmovhpd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5F8179C1180000000" , vmovhps(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F8179C1180000000" , vmovhps(qword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5E8168C2B80000000" , vmovhps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8168C2B80000000" , vmovhps(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E816CB" , vmovlhps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F9139C1180000000" , vmovlpd(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9139C1180000000" , vmovlpd(qword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5E9128C2B80000000" , vmovlpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9128C2B80000000" , vmovlpd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5F8139C1180000000" , vmovlps(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F8139C1180000000" , vmovlps(qword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5E8128C2B80000000" , vmovlps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8128C2B80000000" , vmovlps(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5F950CA" , vmovmskpd(ecx, xmm2)); - TEST_INSTRUCTION("C5FD50CA" , vmovmskpd(ecx, ymm2)); - TEST_INSTRUCTION("C5F850CA" , vmovmskps(ecx, xmm2)); - TEST_INSTRUCTION("C5FC50CA" , vmovmskps(ecx, ymm2)); - TEST_INSTRUCTION("C5F9E79C1180000000" , vmovntdq(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9E79C1180000000" , vmovntdq(xmmword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FDE79C1180000000" , vmovntdq(ptr(ecx, edx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FDE79C1180000000" , vmovntdq(ymmword_ptr(ecx, edx, 0, 128), ymm3)); TEST_INSTRUCTION("62F17D48E75C1102" , vmovntdq(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F17D48E75C1102" , vmovntdq(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C4E2792A8C1A80000000" , vmovntdqa(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2792A8C1A80000000" , vmovntdqa(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D2A8C1A80000000" , vmovntdqa(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D2A8C1A80000000" , vmovntdqa(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D482A4C1A02" , vmovntdqa(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D482A4C1A02" , vmovntdqa(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F92B9C1180000000" , vmovntpd(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F92B9C1180000000" , vmovntpd(xmmword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FD2B9C1180000000" , vmovntpd(ptr(ecx, edx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FD2B9C1180000000" , vmovntpd(ymmword_ptr(ecx, edx, 0, 128), ymm3)); TEST_INSTRUCTION("62F1FD482B5C1102" , vmovntpd(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F1FD482B5C1102" , vmovntpd(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5F82B9C1180000000" , vmovntps(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F82B9C1180000000" , vmovntps(xmmword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FC2B9C1180000000" , vmovntps(ptr(ecx, edx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FC2B9C1180000000" , vmovntps(ymmword_ptr(ecx, edx, 0, 128), ymm3)); TEST_INSTRUCTION("62F17C482B5C1102" , vmovntps(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F17C482B5C1102" , vmovntps(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5FA7ECA" , vmovq(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA7E8C1A80000000" , vmovq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA7E8C1A80000000" , vmovq(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F9D69C1180000000" , vmovq(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9D69C1180000000" , vmovq(qword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FB119C1180000000" , vmovsd(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FB119C1180000000" , vmovsd(qword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FB108C1A80000000" , vmovsd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FB108C1A80000000" , vmovsd(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5EB10CB" , vmovsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5FA16CA" , vmovshdup(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA168C1A80000000" , vmovshdup(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA168C1A80000000" , vmovshdup(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FE16CA" , vmovshdup(ymm1, ymm2)); - TEST_INSTRUCTION("C5FE168C1A80000000" , vmovshdup(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FE168C1A80000000" , vmovshdup(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E4816CA" , vmovshdup(zmm1, zmm2)); TEST_INSTRUCTION("62F17E48164C1A02" , vmovshdup(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E48164C1A02" , vmovshdup(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA12CA" , vmovsldup(xmm1, xmm2)); - TEST_INSTRUCTION("C5FA128C1A80000000" , vmovsldup(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA128C1A80000000" , vmovsldup(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FE12CA" , vmovsldup(ymm1, ymm2)); - TEST_INSTRUCTION("C5FE128C1A80000000" , vmovsldup(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FE128C1A80000000" , vmovsldup(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E4812CA" , vmovsldup(zmm1, zmm2)); TEST_INSTRUCTION("62F17E48124C1A02" , vmovsldup(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17E48124C1A02" , vmovsldup(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA119C1180000000" , vmovss(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FA119C1180000000" , vmovss(dword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FA108C1A80000000" , vmovss(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FA108C1A80000000" , vmovss(xmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5EA10CB" , vmovss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F910CA" , vmovupd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F9108C1A80000000" , vmovupd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F9108C1A80000000" , vmovupd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F9119C1180000000" , vmovupd(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F9119C1180000000" , vmovupd(xmmword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FD10CA" , vmovupd(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD108C1A80000000" , vmovupd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD108C1A80000000" , vmovupd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD119C1180000000" , vmovupd(ptr(ecx, edx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FD119C1180000000" , vmovupd(ymmword_ptr(ecx, edx, 0, 128), ymm3)); TEST_INSTRUCTION("62F1FD4810CA" , vmovupd(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48104C1A02" , vmovupd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD48104C1A02" , vmovupd(zmm1, zmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD48115C1102" , vmovupd(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F1FD48115C1102" , vmovupd(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C5F810CA" , vmovups(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8108C1A80000000" , vmovups(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F8108C1A80000000" , vmovups(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F8119C1180000000" , vmovups(ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5F8119C1180000000" , vmovups(xmmword_ptr(ecx, edx, 0, 128), xmm3)); - TEST_INSTRUCTION("C5FC10CA" , vmovups(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC108C1A80000000" , vmovups(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC108C1A80000000" , vmovups(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC119C1180000000" , vmovups(ptr(ecx, edx, 0, 128), ymm3)); - TEST_INSTRUCTION("C5FC119C1180000000" , vmovups(ymmword_ptr(ecx, edx, 0, 128), ymm3)); TEST_INSTRUCTION("62F17C4810CA" , vmovups(zmm1, zmm2)); TEST_INSTRUCTION("62F17C48104C1A02" , vmovups(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C48104C1A02" , vmovups(zmm1, zmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C48115C1102" , vmovups(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F17C48115C1102" , vmovups(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C4E36942CB01" , vmpsadbw(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369428C2B8000000001" , vmpsadbw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369428C2B8000000001" , vmpsadbw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D42CB01" , vmpsadbw(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D428C2B8000000001" , vmpsadbw(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D428C2B8000000001" , vmpsadbw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E959CB" , vmulpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9598C2B80000000" , vmulpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9598C2B80000000" , vmulpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED59CB" , vmulpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED598C2B80000000" , vmulpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED598C2B80000000" , vmulpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED4859CB" , vmulpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48594C2B02" , vmulpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48594C2B02" , vmulpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E859CB" , vmulps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8598C2B80000000" , vmulps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8598C2B80000000" , vmulps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC59CB" , vmulps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC598C2B80000000" , vmulps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC598C2B80000000" , vmulps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C4859CB" , vmulps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48594C2B02" , vmulps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C48594C2B02" , vmulps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB59CB" , vmulsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB598C2B80000000" , vmulsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB598C2B80000000" , vmulsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA59CB" , vmulss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA598C2B80000000" , vmulss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA598C2B80000000" , vmulss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E956CB" , vorpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9568C2B80000000" , vorpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9568C2B80000000" , vorpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED56CB" , vorpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED568C2B80000000" , vorpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED568C2B80000000" , vorpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED4856CB" , vorpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48564C2B02" , vorpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48564C2B02" , vorpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E856CB" , vorps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8568C2B80000000" , vorps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8568C2B80000000" , vorps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC56CB" , vorps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC568C2B80000000" , vorps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC568C2B80000000" , vorps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C4856CB" , vorps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48564C2B02" , vorps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C48564C2B02" , vorps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -4526,21 +5907,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F25F48524C1A08" , vp4dpwssd(zmm1, zmm4, zmm5, zmm6, zmm7, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F25F48534C1A08" , vp4dpwssds(zmm1, zmm4, zmm5, zmm6, zmm7, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F25F48534C1A08" , vp4dpwssds(zmm1, zmm4, zmm5, zmm6, zmm7, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2791CCA" , vpabsb(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2791C8C1A80000000" , vpabsb(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2791C8C1A80000000" , vpabsb(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D1CCA" , vpabsb(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D1C8C1A80000000" , vpabsb(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D1C8C1A80000000" , vpabsb(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D481CCA" , vpabsb(zmm1, zmm2)); TEST_INSTRUCTION("62F27D481C4C1A02" , vpabsb(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D481C4C1A02" , vpabsb(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2791ECA" , vpabsd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2791E8C1A80000000" , vpabsd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2791E8C1A80000000" , vpabsd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D1ECA" , vpabsd(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D1E8C1A80000000" , vpabsd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D1E8C1A80000000" , vpabsd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D481ECA" , vpabsd(zmm1, zmm2)); TEST_INSTRUCTION("62F27D481E4C1A02" , vpabsd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D481E4C1A02" , vpabsd(zmm1, zmmword_ptr(edx, ebx, 0, 128))); @@ -4553,138 +5922,48 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD481FCA" , vpabsq(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD481F4C1A02" , vpabsq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD481F4C1A02" , vpabsq(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2791DCA" , vpabsw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2791D8C1A80000000" , vpabsw(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2791D8C1A80000000" , vpabsw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D1DCA" , vpabsw(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D1D8C1A80000000" , vpabsw(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D1D8C1A80000000" , vpabsw(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D481DCA" , vpabsw(zmm1, zmm2)); TEST_INSTRUCTION("62F27D481D4C1A02" , vpabsw(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D481D4C1A02" , vpabsw(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5E96BCB" , vpackssdw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E96B8C2B80000000" , vpackssdw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E96B8C2B80000000" , vpackssdw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED6BCB" , vpackssdw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED6B8C2B80000000" , vpackssdw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED6B8C2B80000000" , vpackssdw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D486BCB" , vpackssdw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D486B4C2B02" , vpackssdw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D486B4C2B02" , vpackssdw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E963CB" , vpacksswb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9638C2B80000000" , vpacksswb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9638C2B80000000" , vpacksswb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED63CB" , vpacksswb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED638C2B80000000" , vpacksswb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED638C2B80000000" , vpacksswb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4863CB" , vpacksswb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48634C2B02" , vpacksswb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48634C2B02" , vpacksswb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2692BCB" , vpackusdw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2692B8C2B80000000" , vpackusdw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2692B8C2B80000000" , vpackusdw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D2BCB" , vpackusdw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D2B8C2B80000000" , vpackusdw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D2B8C2B80000000" , vpackusdw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D482BCB" , vpackusdw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D482B4C2B02" , vpackusdw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D482B4C2B02" , vpackusdw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E967CB" , vpackuswb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9678C2B80000000" , vpackuswb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9678C2B80000000" , vpackuswb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED67CB" , vpackuswb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED678C2B80000000" , vpackuswb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED678C2B80000000" , vpackuswb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4867CB" , vpackuswb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48674C2B02" , vpackuswb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48674C2B02" , vpackuswb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FCCB" , vpaddb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FC8C2B80000000" , vpaddb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FC8C2B80000000" , vpaddb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFCCB" , vpaddb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFC8C2B80000000" , vpaddb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFC8C2B80000000" , vpaddb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48FCCB" , vpaddb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48FC4C2B02" , vpaddb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48FC4C2B02" , vpaddb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FECB" , vpaddd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FE8C2B80000000" , vpaddd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FE8C2B80000000" , vpaddd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFECB" , vpaddd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFE8C2B80000000" , vpaddd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFE8C2B80000000" , vpaddd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48FECB" , vpaddd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48FE4C2B02" , vpaddd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48FE4C2B02" , vpaddd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D4CB" , vpaddq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9D48C2B80000000" , vpaddq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D48C2B80000000" , vpaddq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD4CB" , vpaddq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDD48C2B80000000" , vpaddq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD48C2B80000000" , vpaddq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48D4CB" , vpaddq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48D44C2B02" , vpaddq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48D44C2B02" , vpaddq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9ECCB" , vpaddsb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EC8C2B80000000" , vpaddsb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9EC8C2B80000000" , vpaddsb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDECCB" , vpaddsb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEC8C2B80000000" , vpaddsb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEC8C2B80000000" , vpaddsb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48ECCB" , vpaddsb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48EC4C2B02" , vpaddsb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48EC4C2B02" , vpaddsb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9EDCB" , vpaddsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9ED8C2B80000000" , vpaddsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9ED8C2B80000000" , vpaddsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEDCB" , vpaddsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDED8C2B80000000" , vpaddsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDED8C2B80000000" , vpaddsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48EDCB" , vpaddsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48ED4C2B02" , vpaddsw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48ED4C2B02" , vpaddsw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DCCB" , vpaddusb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DC8C2B80000000" , vpaddusb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DC8C2B80000000" , vpaddusb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDCCB" , vpaddusb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDC8C2B80000000" , vpaddusb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDC8C2B80000000" , vpaddusb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48DCCB" , vpaddusb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DC4C2B02" , vpaddusb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48DC4C2B02" , vpaddusb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DDCB" , vpaddusw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DD8C2B80000000" , vpaddusw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DD8C2B80000000" , vpaddusw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDDCB" , vpaddusw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDD8C2B80000000" , vpaddusw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDD8C2B80000000" , vpaddusw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48DDCB" , vpaddusw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DD4C2B02" , vpaddusw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48DD4C2B02" , vpaddusw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FDCB" , vpaddw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FD8C2B80000000" , vpaddw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FD8C2B80000000" , vpaddw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFDCB" , vpaddw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFD8C2B80000000" , vpaddw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFD8C2B80000000" , vpaddw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48FDCB" , vpaddw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48FD4C2B02" , vpaddw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48FD4C2B02" , vpaddw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E3690FCB01" , vpalignr(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690F8C2B8000000001" , vpalignr(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690F8C2B8000000001" , vpalignr(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0FCB01" , vpalignr(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D0F8C2B8000000001" , vpalignr(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0F8C2B8000000001" , vpalignr(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D480FCB01" , vpalignr(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F36D480F4C2B0201" , vpalignr(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D480F4C2B0201" , vpalignr(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9DBCB" , vpand(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DB8C2B80000000" , vpand(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DB8C2B80000000" , vpand(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDBCB" , vpand(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDB8C2B80000000" , vpand(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDB8C2B80000000" , vpand(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08DBCB" , vpandd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08DB4C2B08" , vpandd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08DB4C2B08" , vpandd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -4694,12 +5973,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48DBCB" , vpandd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DB4C2B02" , vpandd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48DB4C2B02" , vpandd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DFCB" , vpandn(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DF8C2B80000000" , vpandn(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DF8C2B80000000" , vpandn(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDFCB" , vpandn(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDF8C2B80000000" , vpandn(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDF8C2B80000000" , vpandn(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08DFCB" , vpandnd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08DF4C2B08" , vpandnd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08DF4C2B08" , vpandnd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -4727,30 +6000,12 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48DBCB" , vpandq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48DB4C2B02" , vpandq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48DB4C2B02" , vpandq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E0CB" , vpavgb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E08C2B80000000" , vpavgb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E08C2B80000000" , vpavgb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE0CB" , vpavgb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE08C2B80000000" , vpavgb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE08C2B80000000" , vpavgb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E0CB" , vpavgb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E04C2B02" , vpavgb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E04C2B02" , vpavgb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E3CB" , vpavgw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E38C2B80000000" , vpavgw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E38C2B80000000" , vpavgw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE3CB" , vpavgw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE38C2B80000000" , vpavgw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE38C2B80000000" , vpavgw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E3CB" , vpavgw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E34C2B02" , vpavgw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E34C2B02" , vpavgw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E36902CB01" , vpblendd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369028C2B8000000001" , vpblendd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369028C2B8000000001" , vpblendd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D02CB01" , vpblendd(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D028C2B8000000001" , vpblendd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D028C2B8000000001" , vpblendd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F26D0866CB" , vpblendmb(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D08664C2B08" , vpblendmb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D08664C2B08" , vpblendmb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -4787,38 +6042,14 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4866CB" , vpblendmw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48664C2B02" , vpblendmw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48664C2B02" , vpblendmw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E3694CCB40" , vpblendvb(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("C4E3694C8C2B8000000060" , vpblendvb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E3694C8C2B8000000060" , vpblendvb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("C4E36D4CCB40" , vpblendvb(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("C4E36D4C8C2B8000000060" , vpblendvb(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E36D4C8C2B8000000060" , vpblendvb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("C4E3690ECB01" , vpblendw(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690E8C2B8000000001" , vpblendw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690E8C2B8000000001" , vpblendw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0ECB01" , vpblendw(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D0E8C2B8000000001" , vpblendw(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D0E8C2B8000000001" , vpblendw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F27D087ACA" , vpbroadcastb(xmm1, edx)); - TEST_INSTRUCTION("C4E27978CA" , vpbroadcastb(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279788C1A80000000" , vpbroadcastb(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279788C1A80000000" , vpbroadcastb(xmm1, byte_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D287ACA" , vpbroadcastb(ymm1, edx)); - TEST_INSTRUCTION("C4E27D78CA" , vpbroadcastb(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D788C1A80000000" , vpbroadcastb(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D788C1A80000000" , vpbroadcastb(ymm1, byte_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D487ACA" , vpbroadcastb(zmm1, edx)); TEST_INSTRUCTION("62F27D4878CA" , vpbroadcastb(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48788C1A80000000" , vpbroadcastb(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48788C1A80000000" , vpbroadcastb(zmm1, byte_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D087CCA" , vpbroadcastd(xmm1, edx)); - TEST_INSTRUCTION("C4E27958CA" , vpbroadcastd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279588C1A80000000" , vpbroadcastd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279588C1A80000000" , vpbroadcastd(xmm1, dword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D287CCA" , vpbroadcastd(ymm1, edx)); - TEST_INSTRUCTION("C4E27D58CA" , vpbroadcastd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D588C1A80000000" , vpbroadcastd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D588C1A80000000" , vpbroadcastd(ymm1, dword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D487CCA" , vpbroadcastd(zmm1, edx)); TEST_INSTRUCTION("62F27D4858CA" , vpbroadcastd(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48584C1A20" , vpbroadcastd(zmm1, ptr(edx, ebx, 0, 128))); @@ -4829,46 +6060,18 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27E083ACA" , vpbroadcastmw2d(xmm1, k2)); TEST_INSTRUCTION("62F27E283ACA" , vpbroadcastmw2d(ymm1, k2)); TEST_INSTRUCTION("62F27E483ACA" , vpbroadcastmw2d(zmm1, k2)); - TEST_INSTRUCTION("C4E27959CA" , vpbroadcastq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279598C1A80000000" , vpbroadcastq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279598C1A80000000" , vpbroadcastq(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D59CA" , vpbroadcastq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D598C1A80000000" , vpbroadcastq(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D598C1A80000000" , vpbroadcastq(ymm1, qword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD4859CA" , vpbroadcastq(zmm1, xmm2)); TEST_INSTRUCTION("62F2FD48594C1A10" , vpbroadcastq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD48594C1A10" , vpbroadcastq(zmm1, qword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D087BCA" , vpbroadcastw(xmm1, edx)); - TEST_INSTRUCTION("C4E27979CA" , vpbroadcastw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279798C1A80000000" , vpbroadcastw(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279798C1A80000000" , vpbroadcastw(xmm1, word_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D287BCA" , vpbroadcastw(ymm1, edx)); - TEST_INSTRUCTION("C4E27D79CA" , vpbroadcastw(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D798C1A80000000" , vpbroadcastw(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D798C1A80000000" , vpbroadcastw(ymm1, word_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D487BCA" , vpbroadcastw(zmm1, edx)); TEST_INSTRUCTION("62F27D4879CA" , vpbroadcastw(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48794C1A40" , vpbroadcastw(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48794C1A40" , vpbroadcastw(zmm1, word_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E36944CB01" , vpclmulqdq(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E369448C2B8000000001" , vpclmulqdq(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369448C2B8000000001" , vpclmulqdq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D44CB01" , vpclmulqdq(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D448C2B8000000001" , vpclmulqdq(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D448C2B8000000001" , vpclmulqdq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D4844CB01" , vpclmulqdq(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F36D48444C2B0201" , vpclmulqdq(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D48444C2B0201" , vpclmulqdq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868A2CB40" , vpcmov(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8E8A28C358000000030" , vpcmov(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("8FE8E8A28C358000000030" , vpcmov(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("8FE868A28C2B8000000060" , vpcmov(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868A28C2B8000000060" , vpcmov(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86CA2CB40" , vpcmov(ymm1, ymm2, ymm3, ymm4)); - TEST_INSTRUCTION("8FE8ECA28C358000000030" , vpcmov(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("8FE8ECA28C358000000030" , vpcmov(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("8FE86CA28C2B8000000060" , vpcmov(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6)); - TEST_INSTRUCTION("8FE86CA28C2B8000000060" , vpcmov(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6)); TEST_INSTRUCTION("62F36D083FCB01" , vpcmpb(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D083F4C2B0801" , vpcmpb(k1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D083F4C2B0801" , vpcmpb(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); @@ -4887,138 +6090,78 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D481FCB01" , vpcmpd(k1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F36D481F4C2B0201" , vpcmpd(k1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D481F4C2B0201" , vpcmpd(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E974CB" , vpcmpeqb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9748C2B80000000" , vpcmpeqb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9748C2B80000000" , vpcmpeqb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D0874CB" , vpcmpeqb(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08744C2B08" , vpcmpeqb(k1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08744C2B08" , vpcmpeqb(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED74CB" , vpcmpeqb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED748C2B80000000" , vpcmpeqb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED748C2B80000000" , vpcmpeqb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D2874CB" , vpcmpeqb(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28744C2B04" , vpcmpeqb(k1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D28744C2B04" , vpcmpeqb(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4874CB" , vpcmpeqb(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48744C2B02" , vpcmpeqb(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48744C2B02" , vpcmpeqb(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E976CB" , vpcmpeqd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9768C2B80000000" , vpcmpeqd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9768C2B80000000" , vpcmpeqd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D0876CB" , vpcmpeqd(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08764C2B08" , vpcmpeqd(k1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08764C2B08" , vpcmpeqd(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED76CB" , vpcmpeqd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED768C2B80000000" , vpcmpeqd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED768C2B80000000" , vpcmpeqd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D2876CB" , vpcmpeqd(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28764C2B04" , vpcmpeqd(k1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D28764C2B04" , vpcmpeqd(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4876CB" , vpcmpeqd(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48764C2B02" , vpcmpeqd(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48764C2B02" , vpcmpeqd(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26929CB" , vpcmpeqq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269298C2B80000000" , vpcmpeqq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269298C2B80000000" , vpcmpeqq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED0829CB" , vpcmpeqq(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F2ED08294C2B08" , vpcmpeqq(k1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED08294C2B08" , vpcmpeqq(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D29CB" , vpcmpeqq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D298C2B80000000" , vpcmpeqq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D298C2B80000000" , vpcmpeqq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED2829CB" , vpcmpeqq(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F2ED28294C2B04" , vpcmpeqq(k1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED28294C2B04" , vpcmpeqq(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED4829CB" , vpcmpeqq(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48294C2B02" , vpcmpeqq(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48294C2B02" , vpcmpeqq(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E975CB" , vpcmpeqw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9758C2B80000000" , vpcmpeqw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9758C2B80000000" , vpcmpeqw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D0875CB" , vpcmpeqw(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08754C2B08" , vpcmpeqw(k1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08754C2B08" , vpcmpeqw(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED75CB" , vpcmpeqw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED758C2B80000000" , vpcmpeqw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED758C2B80000000" , vpcmpeqw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D2875CB" , vpcmpeqw(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28754C2B04" , vpcmpeqw(k1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D28754C2B04" , vpcmpeqw(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4875CB" , vpcmpeqw(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48754C2B02" , vpcmpeqw(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48754C2B02" , vpcmpeqw(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E37961CA01" , vpcmpestri(xmm1, xmm2, 1, ecx, eax, edx)); - TEST_INSTRUCTION("C4E379618C1A8000000001" , vpcmpestri(xmm1, ptr(edx, ebx, 0, 128), 1, ecx, eax, edx)); - TEST_INSTRUCTION("C4E379618C1A8000000001" , vpcmpestri(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1, ecx, eax, edx)); - TEST_INSTRUCTION("C4E37960CA01" , vpcmpestrm(xmm1, xmm2, 1, xmm0, eax, edx)); - TEST_INSTRUCTION("C4E379608C1A8000000001" , vpcmpestrm(xmm1, ptr(edx, ebx, 0, 128), 1, xmm0, eax, edx)); - TEST_INSTRUCTION("C4E379608C1A8000000001" , vpcmpestrm(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1, xmm0, eax, edx)); - TEST_INSTRUCTION("C5E964CB" , vpcmpgtb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9648C2B80000000" , vpcmpgtb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9648C2B80000000" , vpcmpgtb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D0864CB" , vpcmpgtb(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08644C2B08" , vpcmpgtb(k1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08644C2B08" , vpcmpgtb(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED64CB" , vpcmpgtb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED648C2B80000000" , vpcmpgtb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED648C2B80000000" , vpcmpgtb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D2864CB" , vpcmpgtb(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28644C2B04" , vpcmpgtb(k1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D28644C2B04" , vpcmpgtb(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4864CB" , vpcmpgtb(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48644C2B02" , vpcmpgtb(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48644C2B02" , vpcmpgtb(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E966CB" , vpcmpgtd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9668C2B80000000" , vpcmpgtd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9668C2B80000000" , vpcmpgtd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D0866CB" , vpcmpgtd(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08664C2B08" , vpcmpgtd(k1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08664C2B08" , vpcmpgtd(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED66CB" , vpcmpgtd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED668C2B80000000" , vpcmpgtd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED668C2B80000000" , vpcmpgtd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D2866CB" , vpcmpgtd(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28664C2B04" , vpcmpgtd(k1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D28664C2B04" , vpcmpgtd(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4866CB" , vpcmpgtd(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48664C2B02" , vpcmpgtd(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48664C2B02" , vpcmpgtd(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26937CB" , vpcmpgtq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269378C2B80000000" , vpcmpgtq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269378C2B80000000" , vpcmpgtq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED0837CB" , vpcmpgtq(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F2ED08374C2B08" , vpcmpgtq(k1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED08374C2B08" , vpcmpgtq(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D37CB" , vpcmpgtq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D378C2B80000000" , vpcmpgtq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D378C2B80000000" , vpcmpgtq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED2837CB" , vpcmpgtq(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F2ED28374C2B04" , vpcmpgtq(k1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED28374C2B04" , vpcmpgtq(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED4837CB" , vpcmpgtq(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48374C2B02" , vpcmpgtq(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48374C2B02" , vpcmpgtq(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E965CB" , vpcmpgtw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9658C2B80000000" , vpcmpgtw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9658C2B80000000" , vpcmpgtw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D0865CB" , vpcmpgtw(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08654C2B08" , vpcmpgtw(k1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08654C2B08" , vpcmpgtw(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED65CB" , vpcmpgtw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED658C2B80000000" , vpcmpgtw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED658C2B80000000" , vpcmpgtw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D2865CB" , vpcmpgtw(k1, ymm2, ymm3)); TEST_INSTRUCTION("62F16D28654C2B04" , vpcmpgtw(k1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D28654C2B04" , vpcmpgtw(k1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4865CB" , vpcmpgtw(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48654C2B02" , vpcmpgtw(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48654C2B02" , vpcmpgtw(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E37963CA01" , vpcmpistri(xmm1, xmm2, 1, ecx)); - TEST_INSTRUCTION("C4E379638C1A8000000001" , vpcmpistri(xmm1, ptr(edx, ebx, 0, 128), 1, ecx)); - TEST_INSTRUCTION("C4E379638C1A8000000001" , vpcmpistri(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1, ecx)); - TEST_INSTRUCTION("C4E37962CA01" , vpcmpistrm(xmm1, xmm2, 1, xmm0)); - TEST_INSTRUCTION("C4E379628C1A8000000001" , vpcmpistrm(xmm1, ptr(edx, ebx, 0, 128), 1, xmm0)); - TEST_INSTRUCTION("C4E379628C1A8000000001" , vpcmpistrm(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1, xmm0)); TEST_INSTRUCTION("62F3ED081FCB01" , vpcmpq(k1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F3ED081F4C2B0801" , vpcmpq(k1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED081F4C2B0801" , vpcmpq(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); @@ -5073,12 +6216,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED483FCB01" , vpcmpw(k1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED483F4C2B0201" , vpcmpw(k1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED483F4C2B0201" , vpcmpw(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CCCB01" , vpcomb(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868CC8C2B8000000001" , vpcomb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CC8C2B8000000001" , vpcomb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CECB01" , vpcomd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868CE8C2B8000000001" , vpcomd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CE8C2B8000000001" , vpcomd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F27D0863D1" , vpcompressb(xmm1, xmm2)); TEST_INSTRUCTION("62F27D08639C1180000000" , vpcompressb(ptr(ecx, edx, 0, 128), xmm3)); TEST_INSTRUCTION("62F27D08639C1180000000" , vpcompressb(xmmword_ptr(ecx, edx, 0, 128), xmm3)); @@ -5115,24 +6252,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD4863D1" , vpcompressw(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48635C1140" , vpcompressw(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F2FD48635C1140" , vpcompressw(zmmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("8FE868CFCB01" , vpcomq(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868CF8C2B8000000001" , vpcomq(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CF8C2B8000000001" , vpcomq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868ECCB01" , vpcomub(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868EC8C2B8000000001" , vpcomub(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EC8C2B8000000001" , vpcomub(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EECB01" , vpcomud(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868EE8C2B8000000001" , vpcomud(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EE8C2B8000000001" , vpcomud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EFCB01" , vpcomuq(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868EF8C2B8000000001" , vpcomuq(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EF8C2B8000000001" , vpcomuq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868EDCB01" , vpcomuw(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868ED8C2B8000000001" , vpcomuw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868ED8C2B8000000001" , vpcomuw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CDCB01" , vpcomw(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("8FE868CD8C2B8000000001" , vpcomw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE868CD8C2B8000000001" , vpcomw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F27D08C4CA" , vpconflictd(xmm1, xmm2)); TEST_INSTRUCTION("62F27D08C44C1A08" , vpconflictd(xmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D08C44C1A08" , vpconflictd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); @@ -5187,12 +6306,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D4853CB" , vpdpwssds(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48534C2B02" , vpdpwssds(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48534C2B02" , vpdpwssds(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E36D06CB01" , vperm2f128(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D068C2B8000000001" , vperm2f128(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D068C2B8000000001" , vperm2f128(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D46CB01" , vperm2i128(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C4E36D468C2B8000000001" , vperm2i128(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D468C2B8000000001" , vperm2i128(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F26D088DCB" , vpermb(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D088D4C2B08" , vpermb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D088D4C2B08" , vpermb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -5202,9 +6315,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D488DCB" , vpermb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D488D4C2B02" , vpermb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D488D4C2B02" , vpermb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D36CB" , vpermd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D368C2B80000000" , vpermd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D368C2B80000000" , vpermd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4836CB" , vpermd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48364C2B02" , vpermd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48364C2B02" , vpermd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -5262,65 +6372,18 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4875CB" , vpermi2w(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48754C2B02" , vpermi2w(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48754C2B02" , vpermi2w(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E36949CB41" , vpermil2pd(xmm1, xmm2, xmm3, xmm4, 1)); - TEST_INSTRUCTION("C4E369498C2B8000000061" , vpermil2pd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6, 1)); - TEST_INSTRUCTION("C4E369498C2B8000000061" , vpermil2pd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6, 1)); - TEST_INSTRUCTION("C4E3E9498C358000000031" , vpermil2pd(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9498C358000000031" , vpermil2pd(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D49CB41" , vpermil2pd(ymm1, ymm2, ymm3, ymm4, 1)); - TEST_INSTRUCTION("C4E36D498C2B8000000061" , vpermil2pd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6, 1)); - TEST_INSTRUCTION("C4E36D498C2B8000000061" , vpermil2pd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6, 1)); - TEST_INSTRUCTION("C4E3ED498C358000000031" , vpermil2pd(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128), 1)); - TEST_INSTRUCTION("C4E3ED498C358000000031" , vpermil2pd(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128), 1)); - TEST_INSTRUCTION("C4E36948CB41" , vpermil2ps(xmm1, xmm2, xmm3, xmm4, 1)); - TEST_INSTRUCTION("C4E369488C2B8000000061" , vpermil2ps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6, 1)); - TEST_INSTRUCTION("C4E369488C2B8000000061" , vpermil2ps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6, 1)); - TEST_INSTRUCTION("C4E3E9488C358000000031" , vpermil2ps(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128), 1)); - TEST_INSTRUCTION("C4E3E9488C358000000031" , vpermil2ps(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128), 1)); - TEST_INSTRUCTION("C4E36D48CB41" , vpermil2ps(ymm1, ymm2, ymm3, ymm4, 1)); - TEST_INSTRUCTION("C4E36D488C2B8000000061" , vpermil2ps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), ymm6, 1)); - TEST_INSTRUCTION("C4E36D488C2B8000000061" , vpermil2ps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), ymm6, 1)); - TEST_INSTRUCTION("C4E3ED488C358000000031" , vpermil2ps(ymm1, ymm2, ymm3, ptr(ebp, esi, 0, 128), 1)); - TEST_INSTRUCTION("C4E3ED488C358000000031" , vpermil2ps(ymm1, ymm2, ymm3, ymmword_ptr(ebp, esi, 0, 128), 1)); - TEST_INSTRUCTION("C4E2690DCB" , vpermilpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E37905CA01" , vpermilpd(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E2690D8C2B80000000" , vpermilpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2690D8C2B80000000" , vpermilpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E379058C1A8000000001" , vpermilpd(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E379058C1A8000000001" , vpermilpd(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26D0DCB" , vpermilpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E37D05CA01" , vpermilpd(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E26D0D8C2B80000000" , vpermilpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D0D8C2B80000000" , vpermilpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E37D058C1A8000000001" , vpermilpd(ymm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D058C1A8000000001" , vpermilpd(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F2ED480DCB" , vpermilpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F3FD4805CA01" , vpermilpd(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F2ED480D4C2B02" , vpermilpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED480D4C2B02" , vpermilpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F3FD48054C1A0201" , vpermilpd(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F3FD48054C1A0201" , vpermilpd(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E2690CCB" , vpermilps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E37904CA01" , vpermilps(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E2690C8C2B80000000" , vpermilps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2690C8C2B80000000" , vpermilps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E379048C1A8000000001" , vpermilps(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E379048C1A8000000001" , vpermilps(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26D0CCB" , vpermilps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E37D04CA01" , vpermilps(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E26D0C8C2B80000000" , vpermilps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D0C8C2B80000000" , vpermilps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E37D048C1A8000000001" , vpermilps(ymm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D048C1A8000000001" , vpermilps(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F26D480CCB" , vpermilps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F37D4804CA01" , vpermilps(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F26D480C4C2B02" , vpermilps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D480C4C2B02" , vpermilps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F37D48044C1A0201" , vpermilps(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F37D48044C1A0201" , vpermilps(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E3FD01CA01" , vpermpd(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E3FD018C1A8000000001" , vpermpd(ymm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E3FD018C1A8000000001" , vpermpd(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F2ED2816CB" , vpermpd(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("62F2ED28164C2B04" , vpermpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED28164C2B04" , vpermpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); @@ -5330,15 +6393,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED48164C2B02" , vpermpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F3FD48014C1A0201" , vpermpd(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F3FD48014C1A0201" , vpermpd(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26D16CB" , vpermps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D168C2B80000000" , vpermps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D168C2B80000000" , vpermps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4816CB" , vpermps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48164C2B02" , vpermps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48164C2B02" , vpermps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E3FD00CA01" , vpermq(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E3FD008C1A8000000001" , vpermq(ymm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E3FD008C1A8000000001" , vpermq(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F2ED2836CB" , vpermq(ymm1, ymm2, ymm3)); TEST_INSTRUCTION("62F2ED28364C2B04" , vpermq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED28364C2B04" , vpermq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); @@ -5447,128 +6504,18 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD4862CA" , vpexpandw(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48624C1A40" , vpexpandw(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD48624C1A40" , vpexpandw(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E37914D101" , vpextrb(ecx, xmm2, 1)); - TEST_INSTRUCTION("C4E379149C118000000001" , vpextrb(ptr(ecx, edx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E379149C118000000001" , vpextrb(byte_ptr(ecx, edx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E37916D101" , vpextrd(ecx, xmm2, 1)); - TEST_INSTRUCTION("C4E379169C118000000001" , vpextrd(ptr(ecx, edx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E379169C118000000001" , vpextrd(dword_ptr(ecx, edx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C5F9C5CA01" , vpextrw(ecx, xmm2, 1)); - TEST_INSTRUCTION("C4E379159C118000000001" , vpextrw(ptr(ecx, edx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E379159C118000000001" , vpextrw(word_ptr(ecx, edx, 0, 128), xmm3, 1)); - TEST_INSTRUCTION("C4E259908C1A80000000" , vpgatherdd(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E25D908C1A80000000" , vpgatherdd(ymm1, ptr(edx, ymm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F27D09904C1A20" , k(k1).vpgatherdd(xmm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F27D29904C1A20" , k(k1).vpgatherdd(ymm1, ptr(edx, ymm3, 0, 128))); TEST_INSTRUCTION("62F27D49904C1A20" , k(k1).vpgatherdd(zmm1, ptr(edx, zmm3, 0, 128))); - TEST_INSTRUCTION("C4E2D9908C1A80000000" , vpgatherdq(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E2DD908C1A80000000" , vpgatherdq(ymm1, ptr(edx, xmm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F2FD09904C1A10" , k(k1).vpgatherdq(xmm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD29904C1A10" , k(k1).vpgatherdq(ymm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD49904C1A10" , k(k1).vpgatherdq(zmm1, ptr(edx, ymm3, 0, 128))); - TEST_INSTRUCTION("C4E259918C1A80000000" , vpgatherqd(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E25D918C1A80000000" , vpgatherqd(xmm1, ptr(edx, ymm3, 0, 128), xmm4)); TEST_INSTRUCTION("62F27D09914C1A20" , k(k1).vpgatherqd(xmm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F27D29914C1A20" , k(k1).vpgatherqd(xmm1, ptr(edx, ymm3, 0, 128))); TEST_INSTRUCTION("62F27D49914C1A20" , k(k1).vpgatherqd(ymm1, ptr(edx, zmm3, 0, 128))); - TEST_INSTRUCTION("C4E2D9918C1A80000000" , vpgatherqq(xmm1, ptr(edx, xmm3, 0, 128), xmm4)); - TEST_INSTRUCTION("C4E2DD918C1A80000000" , vpgatherqq(ymm1, ptr(edx, ymm3, 0, 128), ymm4)); TEST_INSTRUCTION("62F2FD09914C1A10" , k(k1).vpgatherqq(xmm1, ptr(edx, xmm3, 0, 128))); TEST_INSTRUCTION("62F2FD29914C1A10" , k(k1).vpgatherqq(ymm1, ptr(edx, ymm3, 0, 128))); TEST_INSTRUCTION("62F2FD49914C1A10" , k(k1).vpgatherqq(zmm1, ptr(edx, zmm3, 0, 128))); - TEST_INSTRUCTION("8FE978C2CA" , vphaddbd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C28C1A80000000" , vphaddbd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978C28C1A80000000" , vphaddbd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978C3CA" , vphaddbq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C38C1A80000000" , vphaddbq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978C38C1A80000000" , vphaddbq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978C1CA" , vphaddbw(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C18C1A80000000" , vphaddbw(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978C18C1A80000000" , vphaddbw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E26902CB" , vphaddd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269028C2B80000000" , vphaddd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269028C2B80000000" , vphaddd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D02CB" , vphaddd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D028C2B80000000" , vphaddd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D028C2B80000000" , vphaddd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE978CBCA" , vphadddq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978CB8C1A80000000" , vphadddq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978CB8C1A80000000" , vphadddq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E26903CB" , vphaddsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269038C2B80000000" , vphaddsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269038C2B80000000" , vphaddsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D03CB" , vphaddsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D038C2B80000000" , vphaddsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D038C2B80000000" , vphaddsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE978D2CA" , vphaddubd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D28C1A80000000" , vphaddubd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978D28C1A80000000" , vphaddubd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978D3CA" , vphaddubq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D38C1A80000000" , vphaddubq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978D38C1A80000000" , vphaddubq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978D1CA" , vphaddubw(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D18C1A80000000" , vphaddubw(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978D18C1A80000000" , vphaddubw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978DBCA" , vphaddudq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978DB8C1A80000000" , vphaddudq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978DB8C1A80000000" , vphaddudq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978D6CA" , vphadduwd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D68C1A80000000" , vphadduwd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978D68C1A80000000" , vphadduwd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978D7CA" , vphadduwq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978D78C1A80000000" , vphadduwq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978D78C1A80000000" , vphadduwq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E26901CB" , vphaddw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269018C2B80000000" , vphaddw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269018C2B80000000" , vphaddw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D01CB" , vphaddw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D018C2B80000000" , vphaddw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D018C2B80000000" , vphaddw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE978C6CA" , vphaddwd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C68C1A80000000" , vphaddwd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978C68C1A80000000" , vphaddwd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978C7CA" , vphaddwq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978C78C1A80000000" , vphaddwq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978C78C1A80000000" , vphaddwq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27941CA" , vphminposuw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279418C1A80000000" , vphminposuw(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279418C1A80000000" , vphminposuw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978E1CA" , vphsubbw(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978E18C1A80000000" , vphsubbw(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978E18C1A80000000" , vphsubbw(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E26906CB" , vphsubd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269068C2B80000000" , vphsubd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269068C2B80000000" , vphsubd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D06CB" , vphsubd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D068C2B80000000" , vphsubd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D068C2B80000000" , vphsubd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE978E3CA" , vphsubdq(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978E38C1A80000000" , vphsubdq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978E38C1A80000000" , vphsubdq(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E26907CB" , vphsubsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269078C2B80000000" , vphsubsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269078C2B80000000" , vphsubsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D07CB" , vphsubsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D078C2B80000000" , vphsubsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D078C2B80000000" , vphsubsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26905CB" , vphsubw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269058C2B80000000" , vphsubw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269058C2B80000000" , vphsubw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D05CB" , vphsubw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D058C2B80000000" , vphsubw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D058C2B80000000" , vphsubw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE978E2CA" , vphsubwd(xmm1, xmm2)); - TEST_INSTRUCTION("8FE978E28C1A80000000" , vphsubwd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE978E28C1A80000000" , vphsubwd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E36920CB01" , vpinsrb(xmm1, xmm2, ebx, 1)); - TEST_INSTRUCTION("C4E369208C2B8000000001" , vpinsrb(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369208C2B8000000001" , vpinsrb(xmm1, xmm2, byte_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E36922CB01" , vpinsrd(xmm1, xmm2, ebx, 1)); - TEST_INSTRUCTION("C4E369228C2B8000000001" , vpinsrd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E369228C2B8000000001" , vpinsrd(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C4CB01" , vpinsrw(xmm1, xmm2, ebx, 1)); - TEST_INSTRUCTION("C5E9C48C2B8000000001" , vpinsrw(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C48C2B8000000001" , vpinsrw(xmm1, xmm2, word_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F27D0844CA" , vplzcntd(xmm1, xmm2)); TEST_INSTRUCTION("62F27D08444C1A08" , vplzcntd(xmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D08444C1A08" , vplzcntd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); @@ -5587,42 +6534,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD4844CA" , vplzcntq(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48444C1A02" , vplzcntq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD48444C1A02" , vplzcntq(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("8FE8689ECB40" , vpmacsdd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8689E8C2B8000000060" , vpmacsdd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8689E8C2B8000000060" , vpmacsdd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8689FCB40" , vpmacsdqh(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8689F8C2B8000000060" , vpmacsdqh(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8689F8C2B8000000060" , vpmacsdqh(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86897CB40" , vpmacsdql(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868978C2B8000000060" , vpmacsdql(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868978C2B8000000060" , vpmacsdql(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8688ECB40" , vpmacssdd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8688E8C2B8000000060" , vpmacssdd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8688E8C2B8000000060" , vpmacssdd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8688FCB40" , vpmacssdqh(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8688F8C2B8000000060" , vpmacssdqh(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE8688F8C2B8000000060" , vpmacssdqh(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86887CB40" , vpmacssdql(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868878C2B8000000060" , vpmacssdql(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868878C2B8000000060" , vpmacssdql(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86886CB40" , vpmacsswd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868868C2B8000000060" , vpmacsswd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868868C2B8000000060" , vpmacsswd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86885CB40" , vpmacssww(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868858C2B8000000060" , vpmacssww(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868858C2B8000000060" , vpmacssww(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86896CB40" , vpmacswd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868968C2B8000000060" , vpmacswd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868968C2B8000000060" , vpmacswd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE86895CB40" , vpmacsww(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868958C2B8000000060" , vpmacsww(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868958C2B8000000060" , vpmacsww(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868A6CB40" , vpmadcsswd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868A68C2B8000000060" , vpmadcsswd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868A68C2B8000000060" , vpmadcsswd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868B6CB40" , vpmadcswd(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE868B68C2B8000000060" , vpmadcswd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868B68C2B8000000060" , vpmadcswd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); TEST_INSTRUCTION("62F2ED08B5CB" , vpmadd52huq(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F2ED08B54C2B08" , vpmadd52huq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED08B54C2B08" , vpmadd52huq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -5641,55 +6552,15 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED48B4CB" , vpmadd52luq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48B44C2B02" , vpmadd52luq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48B44C2B02" , vpmadd52luq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26904CB" , vpmaddubsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269048C2B80000000" , vpmaddubsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269048C2B80000000" , vpmaddubsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D04CB" , vpmaddubsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D048C2B80000000" , vpmaddubsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D048C2B80000000" , vpmaddubsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4804CB" , vpmaddubsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48044C2B02" , vpmaddubsw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48044C2B02" , vpmaddubsw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F5CB" , vpmaddwd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F58C2B80000000" , vpmaddwd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F58C2B80000000" , vpmaddwd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF5CB" , vpmaddwd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF58C2B80000000" , vpmaddwd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF58C2B80000000" , vpmaddwd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48F5CB" , vpmaddwd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48F54C2B02" , vpmaddwd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48F54C2B02" , vpmaddwd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2618EA41180000000" , vpmaskmovd(ptr(ecx, edx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2618EA41180000000" , vpmaskmovd(xmmword_ptr(ecx, edx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2658EA41180000000" , vpmaskmovd(ptr(ecx, edx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2658EA41180000000" , vpmaskmovd(ymmword_ptr(ecx, edx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2698C8C2B80000000" , vpmaskmovd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2698C8C2B80000000" , vpmaskmovd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D8C8C2B80000000" , vpmaskmovd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D8C8C2B80000000" , vpmaskmovd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E18EA41180000000" , vpmaskmovq(ptr(ecx, edx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2E18EA41180000000" , vpmaskmovq(xmmword_ptr(ecx, edx, 0, 128), xmm3, xmm4)); - TEST_INSTRUCTION("C4E2E58EA41180000000" , vpmaskmovq(ptr(ecx, edx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2E58EA41180000000" , vpmaskmovq(ymmword_ptr(ecx, edx, 0, 128), ymm3, ymm4)); - TEST_INSTRUCTION("C4E2E98C8C2B80000000" , vpmaskmovq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E98C8C2B80000000" , vpmaskmovq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED8C8C2B80000000" , vpmaskmovq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED8C8C2B80000000" , vpmaskmovq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693CCB" , vpmaxsb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693C8C2B80000000" , vpmaxsb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693C8C2B80000000" , vpmaxsb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3CCB" , vpmaxsb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3C8C2B80000000" , vpmaxsb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3C8C2B80000000" , vpmaxsb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483CCB" , vpmaxsb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483C4C2B02" , vpmaxsb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483C4C2B02" , vpmaxsb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693DCB" , vpmaxsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693D8C2B80000000" , vpmaxsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693D8C2B80000000" , vpmaxsd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3DCB" , vpmaxsd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3D8C2B80000000" , vpmaxsd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3D8C2B80000000" , vpmaxsd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483DCB" , vpmaxsd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483D4C2B02" , vpmaxsd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483D4C2B02" , vpmaxsd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -5702,30 +6573,12 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED483DCB" , vpmaxsq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED483D4C2B02" , vpmaxsq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED483D4C2B02" , vpmaxsq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9EECB" , vpmaxsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EE8C2B80000000" , vpmaxsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9EE8C2B80000000" , vpmaxsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEECB" , vpmaxsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEE8C2B80000000" , vpmaxsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEE8C2B80000000" , vpmaxsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48EECB" , vpmaxsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48EE4C2B02" , vpmaxsw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48EE4C2B02" , vpmaxsw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DECB" , vpmaxub(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DE8C2B80000000" , vpmaxub(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DE8C2B80000000" , vpmaxub(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDECB" , vpmaxub(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDE8C2B80000000" , vpmaxub(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDE8C2B80000000" , vpmaxub(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48DECB" , vpmaxub(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DE4C2B02" , vpmaxub(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48DE4C2B02" , vpmaxub(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693FCB" , vpmaxud(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693F8C2B80000000" , vpmaxud(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693F8C2B80000000" , vpmaxud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3FCB" , vpmaxud(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3F8C2B80000000" , vpmaxud(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3F8C2B80000000" , vpmaxud(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483FCB" , vpmaxud(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483F4C2B02" , vpmaxud(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483F4C2B02" , vpmaxud(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -5738,30 +6591,12 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED483FCB" , vpmaxuq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED483F4C2B02" , vpmaxuq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED483F4C2B02" , vpmaxuq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693ECB" , vpmaxuw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693E8C2B80000000" , vpmaxuw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693E8C2B80000000" , vpmaxuw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3ECB" , vpmaxuw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3E8C2B80000000" , vpmaxuw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3E8C2B80000000" , vpmaxuw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483ECB" , vpmaxuw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483E4C2B02" , vpmaxuw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483E4C2B02" , vpmaxuw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26938CB" , vpminsb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269388C2B80000000" , vpminsb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269388C2B80000000" , vpminsb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D38CB" , vpminsb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D388C2B80000000" , vpminsb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D388C2B80000000" , vpminsb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4838CB" , vpminsb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48384C2B02" , vpminsb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48384C2B02" , vpminsb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26939CB" , vpminsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269398C2B80000000" , vpminsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269398C2B80000000" , vpminsd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D39CB" , vpminsd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D398C2B80000000" , vpminsd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D398C2B80000000" , vpminsd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4839CB" , vpminsd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48394C2B02" , vpminsd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48394C2B02" , vpminsd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -5774,30 +6609,12 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4839CB" , vpminsq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48394C2B02" , vpminsq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48394C2B02" , vpminsq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9EACB" , vpminsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EA8C2B80000000" , vpminsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9EA8C2B80000000" , vpminsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEACB" , vpminsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEA8C2B80000000" , vpminsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEA8C2B80000000" , vpminsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48EACB" , vpminsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48EA4C2B02" , vpminsw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48EA4C2B02" , vpminsw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DACB" , vpminub(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9DA8C2B80000000" , vpminub(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9DA8C2B80000000" , vpminub(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDACB" , vpminub(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDDA8C2B80000000" , vpminub(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDDA8C2B80000000" , vpminub(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48DACB" , vpminub(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48DA4C2B02" , vpminub(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48DA4C2B02" , vpminub(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693BCB" , vpminud(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693B8C2B80000000" , vpminud(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693B8C2B80000000" , vpminud(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3BCB" , vpminud(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3B8C2B80000000" , vpminud(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3B8C2B80000000" , vpminud(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483BCB" , vpminud(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483B4C2B02" , vpminud(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483B4C2B02" , vpminud(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -5810,12 +6627,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED483BCB" , vpminuq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED483B4C2B02" , vpminuq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED483B4C2B02" , vpminuq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693ACB" , vpminuw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2693A8C2B80000000" , vpminuw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2693A8C2B80000000" , vpminuw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3ACB" , vpminuw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D3A8C2B80000000" , vpminuw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D3A8C2B80000000" , vpminuw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483ACB" , vpminuw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D483A4C2B02" , vpminuw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D483A4C2B02" , vpminuw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -5855,8 +6666,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FE0828CA" , vpmovm2w(xmm1, k2)); TEST_INSTRUCTION("62F2FE2828CA" , vpmovm2w(ymm1, k2)); TEST_INSTRUCTION("62F2FE4828CA" , vpmovm2w(zmm1, k2)); - TEST_INSTRUCTION("C5F9D7CA" , vpmovmskb(ecx, xmm2)); - TEST_INSTRUCTION("C5FDD7CA" , vpmovmskb(ecx, ymm2)); TEST_INSTRUCTION("62F2FE0839CA" , vpmovq2m(k1, xmm2)); TEST_INSTRUCTION("62F2FE2839CA" , vpmovq2m(k1, ymm2)); TEST_INSTRUCTION("62F2FE4839CA" , vpmovq2m(k1, zmm2)); @@ -5941,57 +6750,21 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27E4820D1" , vpmovswb(ymm1, zmm2)); TEST_INSTRUCTION("62F27E48205C1104" , vpmovswb(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F27E48205C1104" , vpmovswb(ymmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C4E27921CA" , vpmovsxbd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279218C1A80000000" , vpmovsxbd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279218C1A80000000" , vpmovsxbd(xmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D21CA" , vpmovsxbd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D218C1A80000000" , vpmovsxbd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D218C1A80000000" , vpmovsxbd(ymm1, qword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4821CA" , vpmovsxbd(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48214C1A08" , vpmovsxbd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48214C1A08" , vpmovsxbd(zmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27922CA" , vpmovsxbq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279228C1A80000000" , vpmovsxbq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279228C1A80000000" , vpmovsxbq(xmm1, word_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D22CA" , vpmovsxbq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D228C1A80000000" , vpmovsxbq(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D228C1A80000000" , vpmovsxbq(ymm1, dword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4822CA" , vpmovsxbq(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48224C1A10" , vpmovsxbq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48224C1A10" , vpmovsxbq(zmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27920CA" , vpmovsxbw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279208C1A80000000" , vpmovsxbw(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279208C1A80000000" , vpmovsxbw(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D20CA" , vpmovsxbw(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D208C1A80000000" , vpmovsxbw(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D208C1A80000000" , vpmovsxbw(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4820CA" , vpmovsxbw(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48204C1A04" , vpmovsxbw(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48204C1A04" , vpmovsxbw(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27925CA" , vpmovsxdq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279258C1A80000000" , vpmovsxdq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279258C1A80000000" , vpmovsxdq(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D25CA" , vpmovsxdq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D258C1A80000000" , vpmovsxdq(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D258C1A80000000" , vpmovsxdq(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4825CA" , vpmovsxdq(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48254C1A04" , vpmovsxdq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48254C1A04" , vpmovsxdq(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27923CA" , vpmovsxwd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279238C1A80000000" , vpmovsxwd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279238C1A80000000" , vpmovsxwd(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D23CA" , vpmovsxwd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D238C1A80000000" , vpmovsxwd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D238C1A80000000" , vpmovsxwd(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4823CA" , vpmovsxwd(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48234C1A04" , vpmovsxwd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48234C1A04" , vpmovsxwd(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27924CA" , vpmovsxwq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279248C1A80000000" , vpmovsxwq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279248C1A80000000" , vpmovsxwq(xmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D24CA" , vpmovsxwq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D248C1A80000000" , vpmovsxwq(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D248C1A80000000" , vpmovsxwq(ymm1, qword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4824CA" , vpmovsxwq(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48244C1A08" , vpmovsxwq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48244C1A08" , vpmovsxwq(zmm1, xmmword_ptr(edx, ebx, 0, 128))); @@ -6061,102 +6834,36 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F27E4830D1" , vpmovwb(ymm1, zmm2)); TEST_INSTRUCTION("62F27E48305C1104" , vpmovwb(ptr(ecx, edx, 0, 128), zmm3)); TEST_INSTRUCTION("62F27E48305C1104" , vpmovwb(ymmword_ptr(ecx, edx, 0, 128), zmm3)); - TEST_INSTRUCTION("C4E27931CA" , vpmovzxbd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279318C1A80000000" , vpmovzxbd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279318C1A80000000" , vpmovzxbd(xmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D31CA" , vpmovzxbd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D318C1A80000000" , vpmovzxbd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D318C1A80000000" , vpmovzxbd(ymm1, qword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4831CA" , vpmovzxbd(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48314C1A08" , vpmovzxbd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48314C1A08" , vpmovzxbd(zmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27932CA" , vpmovzxbq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279328C1A80000000" , vpmovzxbq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279328C1A80000000" , vpmovzxbq(xmm1, word_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D32CA" , vpmovzxbq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D328C1A80000000" , vpmovzxbq(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D328C1A80000000" , vpmovzxbq(ymm1, dword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4832CA" , vpmovzxbq(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48324C1A10" , vpmovzxbq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48324C1A10" , vpmovzxbq(zmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27930CA" , vpmovzxbw(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279308C1A80000000" , vpmovzxbw(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279308C1A80000000" , vpmovzxbw(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D30CA" , vpmovzxbw(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D308C1A80000000" , vpmovzxbw(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D308C1A80000000" , vpmovzxbw(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4830CA" , vpmovzxbw(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48304C1A04" , vpmovzxbw(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48304C1A04" , vpmovzxbw(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27935CA" , vpmovzxdq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279358C1A80000000" , vpmovzxdq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279358C1A80000000" , vpmovzxdq(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D35CA" , vpmovzxdq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D358C1A80000000" , vpmovzxdq(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D358C1A80000000" , vpmovzxdq(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4835CA" , vpmovzxdq(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48354C1A04" , vpmovzxdq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48354C1A04" , vpmovzxdq(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27933CA" , vpmovzxwd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279338C1A80000000" , vpmovzxwd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279338C1A80000000" , vpmovzxwd(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D33CA" , vpmovzxwd(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D338C1A80000000" , vpmovzxwd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D338C1A80000000" , vpmovzxwd(ymm1, xmmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4833CA" , vpmovzxwd(zmm1, ymm2)); TEST_INSTRUCTION("62F27D48334C1A04" , vpmovzxwd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48334C1A04" , vpmovzxwd(zmm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27934CA" , vpmovzxwq(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279348C1A80000000" , vpmovzxwq(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279348C1A80000000" , vpmovzxwq(xmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D34CA" , vpmovzxwq(ymm1, xmm2)); - TEST_INSTRUCTION("C4E27D348C1A80000000" , vpmovzxwq(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D348C1A80000000" , vpmovzxwq(ymm1, qword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D4834CA" , vpmovzxwq(zmm1, xmm2)); TEST_INSTRUCTION("62F27D48344C1A08" , vpmovzxwq(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F27D48344C1A08" , vpmovzxwq(zmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E26928CB" , vpmuldq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269288C2B80000000" , vpmuldq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269288C2B80000000" , vpmuldq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D28CB" , vpmuldq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D288C2B80000000" , vpmuldq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D288C2B80000000" , vpmuldq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED4828CB" , vpmuldq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48284C2B02" , vpmuldq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48284C2B02" , vpmuldq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2690BCB" , vpmulhrsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2690B8C2B80000000" , vpmulhrsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2690B8C2B80000000" , vpmulhrsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D0BCB" , vpmulhrsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D0B8C2B80000000" , vpmulhrsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D0B8C2B80000000" , vpmulhrsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D480BCB" , vpmulhrsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D480B4C2B02" , vpmulhrsw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D480B4C2B02" , vpmulhrsw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E4CB" , vpmulhuw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E48C2B80000000" , vpmulhuw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E48C2B80000000" , vpmulhuw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE4CB" , vpmulhuw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE48C2B80000000" , vpmulhuw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE48C2B80000000" , vpmulhuw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E4CB" , vpmulhuw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E44C2B02" , vpmulhuw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E44C2B02" , vpmulhuw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E5CB" , vpmulhw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E58C2B80000000" , vpmulhw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E58C2B80000000" , vpmulhw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE5CB" , vpmulhw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE58C2B80000000" , vpmulhw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE58C2B80000000" , vpmulhw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E5CB" , vpmulhw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E54C2B02" , vpmulhw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E54C2B02" , vpmulhw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26940CB" , vpmulld(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269408C2B80000000" , vpmulld(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269408C2B80000000" , vpmulld(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D40CB" , vpmulld(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D408C2B80000000" , vpmulld(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D408C2B80000000" , vpmulld(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4840CB" , vpmulld(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48404C2B02" , vpmulld(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48404C2B02" , vpmulld(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -6169,12 +6876,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4840CB" , vpmullq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48404C2B02" , vpmullq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48404C2B02" , vpmullq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D5CB" , vpmullw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9D58C2B80000000" , vpmullw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D58C2B80000000" , vpmullw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD5CB" , vpmullw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDD58C2B80000000" , vpmullw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD58C2B80000000" , vpmullw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48D5CB" , vpmullw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48D54C2B02" , vpmullw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48D54C2B02" , vpmullw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -6187,12 +6888,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4883CB" , vpmultishiftqb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48834C2B02" , vpmultishiftqb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48834C2B02" , vpmultishiftqb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F4CB" , vpmuludq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F48C2B80000000" , vpmuludq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F48C2B80000000" , vpmuludq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF4CB" , vpmuludq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF48C2B80000000" , vpmuludq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF48C2B80000000" , vpmuludq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48F4CB" , vpmuludq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48F44C2B02" , vpmuludq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48F44C2B02" , vpmuludq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -6232,12 +6927,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD4854CA" , vpopcntw(zmm1, zmm2)); TEST_INSTRUCTION("62F2FD48544C1A02" , vpopcntw(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD48544C1A02" , vpopcntw(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5E9EBCB" , vpor(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EB8C2B80000000" , vpor(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9EB8C2B80000000" , vpor(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEBCB" , vpor(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEB8C2B80000000" , vpor(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEB8C2B80000000" , vpor(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08EBCB" , vpord(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08EB4C2B08" , vpord(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08EB4C2B08" , vpord(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -6256,11 +6945,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48EBCB" , vporq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48EB4C2B02" , vporq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48EB4C2B02" , vporq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE868A3CB40" , vpperm(xmm1, xmm2, xmm3, xmm4)); - TEST_INSTRUCTION("8FE8E8A38C358000000030" , vpperm(xmm1, xmm2, xmm3, ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("8FE8E8A38C358000000030" , vpperm(xmm1, xmm2, xmm3, xmmword_ptr(ebp, esi, 0, 128))); - TEST_INSTRUCTION("8FE868A38C2B8000000060" , vpperm(xmm1, xmm2, ptr(ebx, ebp, 0, 128), xmm6)); - TEST_INSTRUCTION("8FE868A38C2B8000000060" , vpperm(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), xmm6)); TEST_INSTRUCTION("62F1750872CA01" , vprold(xmm1, xmm2, 1)); TEST_INSTRUCTION("62F17508724C1A0801" , vprold(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17508724C1A0801" , vprold(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); @@ -6333,44 +7017,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4814CB" , vprorvq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48144C2B02" , vprorvq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48144C2B02" , vprorvq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE96090CA" , vprotb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE878C0CA01" , vprotb(xmm1, xmm2, 1)); - TEST_INSTRUCTION("8FE9E8908C2B80000000" , vprotb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8908C2B80000000" , vprotb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958908C1A80000000" , vprotb(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C08C1A8000000001" , vprotb(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("8FE958908C1A80000000" , vprotb(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C08C1A8000000001" , vprotb(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("8FE96092CA" , vprotd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE878C2CA01" , vprotd(xmm1, xmm2, 1)); - TEST_INSTRUCTION("8FE9E8928C2B80000000" , vprotd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8928C2B80000000" , vprotd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958928C1A80000000" , vprotd(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C28C1A8000000001" , vprotd(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("8FE958928C1A80000000" , vprotd(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C28C1A8000000001" , vprotd(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("8FE96093CA" , vprotq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE878C3CA01" , vprotq(xmm1, xmm2, 1)); - TEST_INSTRUCTION("8FE9E8938C2B80000000" , vprotq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8938C2B80000000" , vprotq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958938C1A80000000" , vprotq(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C38C1A8000000001" , vprotq(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("8FE958938C1A80000000" , vprotq(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C38C1A8000000001" , vprotq(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("8FE96091CA" , vprotw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE878C1CA01" , vprotw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("8FE9E8918C2B80000000" , vprotw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8918C2B80000000" , vprotw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958918C1A80000000" , vprotw(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C18C1A8000000001" , vprotw(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("8FE958918C1A80000000" , vprotw(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE878C18C1A8000000001" , vprotw(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9F6CB" , vpsadbw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F68C2B80000000" , vpsadbw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F68C2B80000000" , vpsadbw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF6CB" , vpsadbw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF68C2B80000000" , vpsadbw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF68C2B80000000" , vpsadbw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48F6CB" , vpsadbw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48F64C2B02" , vpsadbw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48F64C2B02" , vpsadbw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -6386,36 +7032,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2FD09A15C1110" , k(k1).vpscatterqq(ptr(ecx, xmm2, 0, 128), xmm3)); TEST_INSTRUCTION("62F2FD29A15C1110" , k(k1).vpscatterqq(ptr(ecx, ymm2, 0, 128), ymm3)); TEST_INSTRUCTION("62F2FD49A15C1110" , k(k1).vpscatterqq(ptr(ecx, zmm2, 0, 128), zmm3)); - TEST_INSTRUCTION("8FE96098CA" , vpshab(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8988C2B80000000" , vpshab(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8988C2B80000000" , vpshab(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958988C1A80000000" , vpshab(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958988C1A80000000" , vpshab(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE9609ACA" , vpshad(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E89A8C2B80000000" , vpshad(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E89A8C2B80000000" , vpshad(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9589A8C1A80000000" , vpshad(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE9589A8C1A80000000" , vpshad(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE9609BCA" , vpshaq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E89B8C2B80000000" , vpshaq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E89B8C2B80000000" , vpshaq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9589B8C1A80000000" , vpshaq(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE9589B8C1A80000000" , vpshaq(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE96099CA" , vpshaw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8998C2B80000000" , vpshaw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8998C2B80000000" , vpshaw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958998C1A80000000" , vpshaw(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958998C1A80000000" , vpshaw(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE96094CA" , vpshlb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8948C2B80000000" , vpshlb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8948C2B80000000" , vpshlb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958948C1A80000000" , vpshlb(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958948C1A80000000" , vpshlb(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE96096CA" , vpshld(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8968C2B80000000" , vpshld(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8968C2B80000000" , vpshld(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958968C1A80000000" , vpshld(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958968C1A80000000" , vpshld(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); TEST_INSTRUCTION("62F36D0871CB01" , vpshldd(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08714C2B0801" , vpshldd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08714C2B0801" , vpshldd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); @@ -6470,16 +7086,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED4870CB01" , vpshldw(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48704C2B0201" , vpshldw(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48704C2B0201" , vpshldw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("8FE96097CA" , vpshlq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8978C2B80000000" , vpshlq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8978C2B80000000" , vpshlq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958978C1A80000000" , vpshlq(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958978C1A80000000" , vpshlq(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE96095CA" , vpshlw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("8FE9E8958C2B80000000" , vpshlw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE9E8958C2B80000000" , vpshlw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("8FE958958C1A80000000" , vpshlw(xmm1, ptr(edx, ebx, 0, 128), xmm4)); - TEST_INSTRUCTION("8FE958958C1A80000000" , vpshlw(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4)); TEST_INSTRUCTION("62F36D0873CB01" , vpshrdd(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D08734C2B0801" , vpshrdd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D08734C2B0801" , vpshrdd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); @@ -6534,12 +7140,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED4872CB01" , vpshrdw(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48724C2B0201" , vpshrdw(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48724C2B0201" , vpshrdw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E26900CB" , vpshufb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269008C2B80000000" , vpshufb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269008C2B80000000" , vpshufb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D00CB" , vpshufb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D008C2B80000000" , vpshufb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D008C2B80000000" , vpshufb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4800CB" , vpshufb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48004C2B02" , vpshufb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48004C2B02" , vpshufb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -6552,59 +7152,15 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D488FCB" , vpshufbitqmb(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D488F4C2B02" , vpshufbitqmb(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D488F4C2B02" , vpshufbitqmb(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5F970CA01" , vpshufd(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5F9708C1A8000000001" , vpshufd(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5F9708C1A8000000001" , vpshufd(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FD70CA01" , vpshufd(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5FD708C1A8000000001" , vpshufd(ymm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FD708C1A8000000001" , vpshufd(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17D4870CA01" , vpshufd(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17D48704C1A0201" , vpshufd(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17D48704C1A0201" , vpshufd(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FA70CA01" , vpshufhw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5FA708C1A8000000001" , vpshufhw(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FA708C1A8000000001" , vpshufhw(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FE70CA01" , vpshufhw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5FE708C1A8000000001" , vpshufhw(ymm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FE708C1A8000000001" , vpshufhw(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17E4870CA01" , vpshufhw(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17E48704C1A0201" , vpshufhw(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17E48704C1A0201" , vpshufhw(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FB70CA01" , vpshuflw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5FB708C1A8000000001" , vpshuflw(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FB708C1A8000000001" , vpshuflw(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FF70CA01" , vpshuflw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5FF708C1A8000000001" , vpshuflw(ymm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5FF708C1A8000000001" , vpshuflw(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17F4870CA01" , vpshuflw(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17F48704C1A0201" , vpshuflw(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17F48704C1A0201" , vpshuflw(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26908CB" , vpsignb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269088C2B80000000" , vpsignb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269088C2B80000000" , vpsignb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D08CB" , vpsignb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D088C2B80000000" , vpsignb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D088C2B80000000" , vpsignb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2690ACB" , vpsignd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2690A8C2B80000000" , vpsignd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2690A8C2B80000000" , vpsignd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D0ACB" , vpsignd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D0A8C2B80000000" , vpsignd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D0A8C2B80000000" , vpsignd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26909CB" , vpsignw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269098C2B80000000" , vpsignw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269098C2B80000000" , vpsignw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D09CB" , vpsignw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D098C2B80000000" , vpsignw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D098C2B80000000" , vpsignw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F2CB" , vpslld(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F172F201" , vpslld(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9F28C2B80000000" , vpslld(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F28C2B80000000" , vpslld(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF2CB" , vpslld(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F572F201" , vpslld(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDF28C2B80000000" , vpslld(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF28C2B80000000" , vpslld(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1750872741A0801" , vpslld(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1750872741A0801" , vpslld(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1752872741A0401" , vpslld(ymm1, ptr(edx, ebx, 0, 128), 1)); @@ -6615,23 +7171,13 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48F24C2B08" , vpslld(zmm1, zmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1754872741A0201" , vpslld(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1754872741A0201" , vpslld(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5F173FA01" , vpslldq(xmm1, xmm2, 1)); TEST_INSTRUCTION("62F17508737C1A0801" , vpslldq(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17508737C1A0801" , vpslldq(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5F573FA01" , vpslldq(ymm1, ymm2, 1)); TEST_INSTRUCTION("62F17528737C1A0401" , vpslldq(ymm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17528737C1A0401" , vpslldq(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1754873FA01" , vpslldq(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17548737C1A0201" , vpslldq(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17548737C1A0201" , vpslldq(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9F3CB" , vpsllq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F173F201" , vpsllq(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9F38C2B80000000" , vpsllq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F38C2B80000000" , vpsllq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF3CB" , vpsllq(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F573F201" , vpsllq(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDF38C2B80000000" , vpsllq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF38C2B80000000" , vpsllq(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1F50873741A0801" , vpsllq(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1F50873741A0801" , vpsllq(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1F52873741A0401" , vpsllq(ymm1, ptr(edx, ebx, 0, 128), 1)); @@ -6642,21 +7188,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48F34C2B08" , vpsllq(zmm1, zmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1F54873741A0201" , vpsllq(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1F54873741A0201" , vpsllq(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26947CB" , vpsllvd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269478C2B80000000" , vpsllvd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269478C2B80000000" , vpsllvd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D47CB" , vpsllvd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D478C2B80000000" , vpsllvd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D478C2B80000000" , vpsllvd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4847CB" , vpsllvd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48474C2B02" , vpsllvd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48474C2B02" , vpsllvd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E947CB" , vpsllvq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9478C2B80000000" , vpsllvq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9478C2B80000000" , vpsllvq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED47CB" , vpsllvq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED478C2B80000000" , vpsllvq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED478C2B80000000" , vpsllvq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED4847CB" , vpsllvq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48474C2B02" , vpsllvq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48474C2B02" , vpsllvq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -6669,14 +7203,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4812CB" , vpsllvw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48124C2B02" , vpsllvw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48124C2B02" , vpsllvw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F1CB" , vpsllw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F171F201" , vpsllw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9F18C2B80000000" , vpsllw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F18C2B80000000" , vpsllw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF1CB" , vpsllw(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F571F201" , vpsllw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDF18C2B80000000" , vpsllw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF18C2B80000000" , vpsllw(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1750871741A0801" , vpsllw(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1750871741A0801" , vpsllw(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1752871741A0401" , vpsllw(ymm1, ptr(edx, ebx, 0, 128), 1)); @@ -6687,14 +7213,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48F14C2B08" , vpsllw(zmm1, zmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1754871741A0201" , vpsllw(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1754871741A0201" , vpsllw(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9E2CB" , vpsrad(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F172E201" , vpsrad(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9E28C2B80000000" , vpsrad(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E28C2B80000000" , vpsrad(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE2CB" , vpsrad(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F572E201" , vpsrad(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDE28C2B80000000" , vpsrad(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE28C2B80000000" , vpsrad(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1750872641A0801" , vpsrad(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1750872641A0801" , vpsrad(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1752872641A0401" , vpsrad(ymm1, ptr(edx, ebx, 0, 128), 1)); @@ -6723,12 +7241,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48E24C2B08" , vpsraq(zmm1, zmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1F54872641A0201" , vpsraq(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1F54872641A0201" , vpsraq(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26946CB" , vpsravd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269468C2B80000000" , vpsravd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269468C2B80000000" , vpsravd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D46CB" , vpsravd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D468C2B80000000" , vpsravd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D468C2B80000000" , vpsravd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4846CB" , vpsravd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48464C2B02" , vpsravd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48464C2B02" , vpsravd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -6750,14 +7262,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4811CB" , vpsravw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48114C2B02" , vpsravw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48114C2B02" , vpsravw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E1CB" , vpsraw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F171E201" , vpsraw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9E18C2B80000000" , vpsraw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E18C2B80000000" , vpsraw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE1CB" , vpsraw(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F571E201" , vpsraw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDE18C2B80000000" , vpsraw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE18C2B80000000" , vpsraw(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1750871641A0801" , vpsraw(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1750871641A0801" , vpsraw(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1752871641A0401" , vpsraw(ymm1, ptr(edx, ebx, 0, 128), 1)); @@ -6768,14 +7272,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48E14C2B08" , vpsraw(zmm1, zmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1754871641A0201" , vpsraw(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1754871641A0201" , vpsraw(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9D2CB" , vpsrld(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F172D201" , vpsrld(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9D28C2B80000000" , vpsrld(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D28C2B80000000" , vpsrld(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD2CB" , vpsrld(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F572D201" , vpsrld(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDD28C2B80000000" , vpsrld(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD28C2B80000000" , vpsrld(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1750872541A0801" , vpsrld(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1750872541A0801" , vpsrld(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1752872541A0401" , vpsrld(ymm1, ptr(edx, ebx, 0, 128), 1)); @@ -6786,23 +7282,13 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48D24C2B08" , vpsrld(zmm1, zmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1754872541A0201" , vpsrld(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1754872541A0201" , vpsrld(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5F173DA01" , vpsrldq(xmm1, xmm2, 1)); TEST_INSTRUCTION("62F17508735C1A0801" , vpsrldq(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17508735C1A0801" , vpsrldq(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5F573DA01" , vpsrldq(ymm1, ymm2, 1)); TEST_INSTRUCTION("62F17528735C1A0401" , vpsrldq(ymm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17528735C1A0401" , vpsrldq(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1754873DA01" , vpsrldq(zmm1, zmm2, 1)); TEST_INSTRUCTION("62F17548735C1A0201" , vpsrldq(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F17548735C1A0201" , vpsrldq(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9D3CB" , vpsrlq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F173D201" , vpsrlq(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9D38C2B80000000" , vpsrlq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D38C2B80000000" , vpsrlq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD3CB" , vpsrlq(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F573D201" , vpsrlq(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDD38C2B80000000" , vpsrlq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD38C2B80000000" , vpsrlq(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1F50873541A0801" , vpsrlq(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1F50873541A0801" , vpsrlq(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1F52873541A0401" , vpsrlq(ymm1, ptr(edx, ebx, 0, 128), 1)); @@ -6813,21 +7299,9 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F1ED48D34C2B08" , vpsrlq(zmm1, zmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1F54873541A0201" , vpsrlq(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1F54873541A0201" , vpsrlq(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E26945CB" , vpsrlvd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E269458C2B80000000" , vpsrlvd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E269458C2B80000000" , vpsrlvd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D45CB" , vpsrlvd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E26D458C2B80000000" , vpsrlvd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E26D458C2B80000000" , vpsrlvd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D4845CB" , vpsrlvd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F26D48454C2B02" , vpsrlvd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D48454C2B02" , vpsrlvd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E945CB" , vpsrlvq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C4E2E9458C2B80000000" , vpsrlvq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2E9458C2B80000000" , vpsrlvq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED45CB" , vpsrlvq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C4E2ED458C2B80000000" , vpsrlvq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2ED458C2B80000000" , vpsrlvq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED4845CB" , vpsrlvq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48454C2B02" , vpsrlvq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48454C2B02" , vpsrlvq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -6840,14 +7314,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2ED4810CB" , vpsrlvw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F2ED48104C2B02" , vpsrlvw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED48104C2B02" , vpsrlvw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D1CB" , vpsrlw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5F171D201" , vpsrlw(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C5E9D18C2B80000000" , vpsrlw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D18C2B80000000" , vpsrlw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD1CB" , vpsrlw(ymm1, ymm2, xmm3)); - TEST_INSTRUCTION("C5F571D201" , vpsrlw(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C5EDD18C2B80000000" , vpsrlw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD18C2B80000000" , vpsrlw(ymm1, ymm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1750871541A0801" , vpsrlw(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1750871541A0801" , vpsrlw(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1752871541A0401" , vpsrlw(ymm1, ptr(edx, ebx, 0, 128), 1)); @@ -6858,75 +7324,27 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F16D48D14C2B08" , vpsrlw(zmm1, zmm2, xmmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1754871541A0201" , vpsrlw(zmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F1754871541A0201" , vpsrlw(zmm1, zmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C5E9F8CB" , vpsubb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F88C2B80000000" , vpsubb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F88C2B80000000" , vpsubb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF8CB" , vpsubb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF88C2B80000000" , vpsubb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF88C2B80000000" , vpsubb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48F8CB" , vpsubb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48F84C2B02" , vpsubb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48F84C2B02" , vpsubb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FACB" , vpsubd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FA8C2B80000000" , vpsubd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FA8C2B80000000" , vpsubd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFACB" , vpsubd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFA8C2B80000000" , vpsubd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFA8C2B80000000" , vpsubd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48FACB" , vpsubd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48FA4C2B02" , vpsubd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48FA4C2B02" , vpsubd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FBCB" , vpsubq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9FB8C2B80000000" , vpsubq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9FB8C2B80000000" , vpsubq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFBCB" , vpsubq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDFB8C2B80000000" , vpsubq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDFB8C2B80000000" , vpsubq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48FBCB" , vpsubq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48FB4C2B02" , vpsubq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48FB4C2B02" , vpsubq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E8CB" , vpsubsb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E88C2B80000000" , vpsubsb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E88C2B80000000" , vpsubsb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE8CB" , vpsubsb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE88C2B80000000" , vpsubsb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE88C2B80000000" , vpsubsb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E8CB" , vpsubsb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E84C2B02" , vpsubsb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E84C2B02" , vpsubsb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E9CB" , vpsubsw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9E98C2B80000000" , vpsubsw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9E98C2B80000000" , vpsubsw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE9CB" , vpsubsw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDE98C2B80000000" , vpsubsw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDE98C2B80000000" , vpsubsw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E9CB" , vpsubsw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48E94C2B02" , vpsubsw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48E94C2B02" , vpsubsw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D8CB" , vpsubusb(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9D88C2B80000000" , vpsubusb(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D88C2B80000000" , vpsubusb(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD8CB" , vpsubusb(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDD88C2B80000000" , vpsubusb(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD88C2B80000000" , vpsubusb(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48D8CB" , vpsubusb(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48D84C2B02" , vpsubusb(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48D84C2B02" , vpsubusb(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D9CB" , vpsubusw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9D98C2B80000000" , vpsubusw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9D98C2B80000000" , vpsubusw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD9CB" , vpsubusw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDD98C2B80000000" , vpsubusw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDD98C2B80000000" , vpsubusw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48D9CB" , vpsubusw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48D94C2B02" , vpsubusw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48D94C2B02" , vpsubusw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F9CB" , vpsubw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9F98C2B80000000" , vpsubw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9F98C2B80000000" , vpsubw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF9CB" , vpsubw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDF98C2B80000000" , vpsubw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDF98C2B80000000" , vpsubw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48F9CB" , vpsubw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48F94C2B02" , vpsubw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48F94C2B02" , vpsubw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); @@ -6948,12 +7366,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED4825CB01" , vpternlogq(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48254C2B0201" , vpternlogq(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48254C2B0201" , vpternlogq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E27917CA" , vptest(xmm1, xmm2)); - TEST_INSTRUCTION("C4E279178C1A80000000" , vptest(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E279178C1A80000000" , vptest(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D17CA" , vptest(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D178C1A80000000" , vptest(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D178C1A80000000" , vptest(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F26D0826CB" , vptestmb(k1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D08264C2B08" , vptestmb(k1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D08264C2B08" , vptestmb(k1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -7026,84 +7438,30 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F2EE4826CB" , vptestnmw(k1, zmm2, zmm3)); TEST_INSTRUCTION("62F2EE48264C2B02" , vptestnmw(k1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2EE48264C2B02" , vptestnmw(k1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E968CB" , vpunpckhbw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9688C2B80000000" , vpunpckhbw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9688C2B80000000" , vpunpckhbw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED68CB" , vpunpckhbw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED688C2B80000000" , vpunpckhbw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED688C2B80000000" , vpunpckhbw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4868CB" , vpunpckhbw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48684C2B02" , vpunpckhbw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48684C2B02" , vpunpckhbw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E96ACB" , vpunpckhdq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E96A8C2B80000000" , vpunpckhdq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E96A8C2B80000000" , vpunpckhdq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED6ACB" , vpunpckhdq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED6A8C2B80000000" , vpunpckhdq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED6A8C2B80000000" , vpunpckhdq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D486ACB" , vpunpckhdq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D486A4C2B02" , vpunpckhdq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D486A4C2B02" , vpunpckhdq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E96DCB" , vpunpckhqdq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E96D8C2B80000000" , vpunpckhqdq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E96D8C2B80000000" , vpunpckhqdq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED6DCB" , vpunpckhqdq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED6D8C2B80000000" , vpunpckhqdq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED6D8C2B80000000" , vpunpckhqdq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED486DCB" , vpunpckhqdq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED486D4C2B02" , vpunpckhqdq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED486D4C2B02" , vpunpckhqdq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E969CB" , vpunpckhwd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9698C2B80000000" , vpunpckhwd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9698C2B80000000" , vpunpckhwd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED69CB" , vpunpckhwd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED698C2B80000000" , vpunpckhwd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED698C2B80000000" , vpunpckhwd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4869CB" , vpunpckhwd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48694C2B02" , vpunpckhwd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48694C2B02" , vpunpckhwd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E960CB" , vpunpcklbw(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9608C2B80000000" , vpunpcklbw(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9608C2B80000000" , vpunpcklbw(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED60CB" , vpunpcklbw(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED608C2B80000000" , vpunpcklbw(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED608C2B80000000" , vpunpcklbw(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4860CB" , vpunpcklbw(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48604C2B02" , vpunpcklbw(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48604C2B02" , vpunpcklbw(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E962CB" , vpunpckldq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9628C2B80000000" , vpunpckldq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9628C2B80000000" , vpunpckldq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED62CB" , vpunpckldq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED628C2B80000000" , vpunpckldq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED628C2B80000000" , vpunpckldq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4862CB" , vpunpckldq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48624C2B02" , vpunpckldq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48624C2B02" , vpunpckldq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E96CCB" , vpunpcklqdq(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E96C8C2B80000000" , vpunpcklqdq(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E96C8C2B80000000" , vpunpcklqdq(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED6CCB" , vpunpcklqdq(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED6C8C2B80000000" , vpunpcklqdq(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED6C8C2B80000000" , vpunpcklqdq(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED486CCB" , vpunpcklqdq(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED486C4C2B02" , vpunpcklqdq(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED486C4C2B02" , vpunpcklqdq(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E961CB" , vpunpcklwd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9618C2B80000000" , vpunpcklwd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9618C2B80000000" , vpunpcklwd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED61CB" , vpunpcklwd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED618C2B80000000" , vpunpcklwd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED618C2B80000000" , vpunpcklwd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D4861CB" , vpunpcklwd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16D48614C2B02" , vpunpcklwd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D48614C2B02" , vpunpcklwd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9EFCB" , vpxor(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9EF8C2B80000000" , vpxor(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9EF8C2B80000000" , vpxor(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEFCB" , vpxor(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EDEF8C2B80000000" , vpxor(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EDEF8C2B80000000" , vpxor(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08EFCB" , vpxord(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F16D08EF4C2B08" , vpxord(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16D08EF4C2B08" , vpxord(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -7182,15 +7540,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D08CBCB" , vrcp28ss(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D08CB4C2B20" , vrcp28ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D08CB4C2B20" , vrcp28ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5F853CA" , vrcpps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8538C1A80000000" , vrcpps(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F8538C1A80000000" , vrcpps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC53CA" , vrcpps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC538C1A80000000" , vrcpps(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC538C1A80000000" , vrcpps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5EA53CB" , vrcpss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA538C2B80000000" , vrcpss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA538C2B80000000" , vrcpss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F3FD0856CA01" , vreducepd(xmm1, xmm2, 1)); TEST_INSTRUCTION("62F3FD08564C1A0801" , vreducepd(xmm1, ptr(edx, ebx, 0, 128), 1)); TEST_INSTRUCTION("62F3FD08564C1A0801" , vreducepd(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); @@ -7239,24 +7588,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F36D080ACB01" , vrndscaless(xmm1, xmm2, xmm3, 1)); TEST_INSTRUCTION("62F36D080A4C2B2001" , vrndscaless(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F36D080A4C2B2001" , vrndscaless(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E37909CA01" , vroundpd(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E379098C1A8000000001" , vroundpd(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E379098C1A8000000001" , vroundpd(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D09CA01" , vroundpd(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D098C1A8000000001" , vroundpd(ymm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D098C1A8000000001" , vroundpd(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37908CA01" , vroundps(xmm1, xmm2, 1)); - TEST_INSTRUCTION("C4E379088C1A8000000001" , vroundps(xmm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E379088C1A8000000001" , vroundps(xmm1, xmmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D08CA01" , vroundps(ymm1, ymm2, 1)); - TEST_INSTRUCTION("C4E37D088C1A8000000001" , vroundps(ymm1, ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E37D088C1A8000000001" , vroundps(ymm1, ymmword_ptr(edx, ebx, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690BCB01" , vroundsd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690B8C2B8000000001" , vroundsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690B8C2B8000000001" , vroundsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690ACB01" , vroundss(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C4E3690A8C2B8000000001" , vroundss(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C4E3690A8C2B8000000001" , vroundss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F2FD084ECA" , vrsqrt14pd(xmm1, xmm2)); TEST_INSTRUCTION("62F2FD084E4C1A08" , vrsqrt14pd(xmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F2FD084E4C1A08" , vrsqrt14pd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); @@ -7293,15 +7624,6 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F26D08CDCB" , vrsqrt28ss(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F26D08CD4C2B20" , vrsqrt28ss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F26D08CD4C2B20" , vrsqrt28ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5F852CA" , vrsqrtps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8528C1A80000000" , vrsqrtps(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F8528C1A80000000" , vrsqrtps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC52CA" , vrsqrtps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC528C1A80000000" , vrsqrtps(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC528C1A80000000" , vrsqrtps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5EA52CB" , vrsqrtss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA528C2B80000000" , vrsqrtss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA528C2B80000000" , vrsqrtss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED082CCB" , vscalefpd(xmm1, xmm2, xmm3)); TEST_INSTRUCTION("62F2ED082C4C2B08" , vscalefpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F2ED082C4C2B08" , vscalefpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); @@ -7370,148 +7692,37 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester& TEST_INSTRUCTION("62F3ED4843CB01" , vshufi64x2(zmm1, zmm2, zmm3, 1)); TEST_INSTRUCTION("62F3ED48434C2B0201" , vshufi64x2(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); TEST_INSTRUCTION("62F3ED48434C2B0201" , vshufi64x2(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C6CB01" , vshufpd(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5E9C68C2B8000000001" , vshufpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E9C68C2B8000000001" , vshufpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5EDC6CB01" , vshufpd(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C5EDC68C2B8000000001" , vshufpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5EDC68C2B8000000001" , vshufpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("62F1ED48C6CB01" , vshufpd(zmm1, zmm2, zmm3, 1)); - TEST_INSTRUCTION("62F1ED48C64C2B0201" , vshufpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("62F1ED48C64C2B0201" , vshufpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E8C6CB01" , vshufps(xmm1, xmm2, xmm3, 1)); - TEST_INSTRUCTION("C5E8C68C2B8000000001" , vshufps(xmm1, xmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5E8C68C2B8000000001" , vshufps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5ECC6CB01" , vshufps(ymm1, ymm2, ymm3, 1)); - TEST_INSTRUCTION("C5ECC68C2B8000000001" , vshufps(ymm1, ymm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5ECC68C2B8000000001" , vshufps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("62F16C48C6CB01" , vshufps(zmm1, zmm2, zmm3, 1)); - TEST_INSTRUCTION("62F16C48C64C2B0201" , vshufps(zmm1, zmm2, ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("62F16C48C64C2B0201" , vshufps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128), 1)); - TEST_INSTRUCTION("C5F951CA" , vsqrtpd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F9518C1A80000000" , vsqrtpd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F9518C1A80000000" , vsqrtpd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD51CA" , vsqrtpd(ymm1, ymm2)); - TEST_INSTRUCTION("C5FD518C1A80000000" , vsqrtpd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FD518C1A80000000" , vsqrtpd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD4851CA" , vsqrtpd(zmm1, zmm2)); TEST_INSTRUCTION("62F1FD48514C1A02" , vsqrtpd(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F1FD48514C1A02" , vsqrtpd(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F851CA" , vsqrtps(xmm1, xmm2)); - TEST_INSTRUCTION("C5F8518C1A80000000" , vsqrtps(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F8518C1A80000000" , vsqrtps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC51CA" , vsqrtps(ymm1, ymm2)); - TEST_INSTRUCTION("C5FC518C1A80000000" , vsqrtps(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5FC518C1A80000000" , vsqrtps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C4851CA" , vsqrtps(zmm1, zmm2)); TEST_INSTRUCTION("62F17C48514C1A02" , vsqrtps(zmm1, ptr(edx, ebx, 0, 128))); TEST_INSTRUCTION("62F17C48514C1A02" , vsqrtps(zmm1, zmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5EB51CB" , vsqrtsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB518C2B80000000" , vsqrtsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB518C2B80000000" , vsqrtsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA51CB" , vsqrtss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA518C2B80000000" , vsqrtss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA518C2B80000000" , vsqrtss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5F8AE9C1180000000" , vstmxcsr(ptr(ecx, edx, 0, 128))); - TEST_INSTRUCTION("C5F8AE9C1180000000" , vstmxcsr(dword_ptr(ecx, edx, 0, 128))); - TEST_INSTRUCTION("C5E95CCB" , vsubpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E95C8C2B80000000" , vsubpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E95C8C2B80000000" , vsubpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED5CCB" , vsubpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED5C8C2B80000000" , vsubpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED5C8C2B80000000" , vsubpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED485CCB" , vsubpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED485C4C2B02" , vsubpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED485C4C2B02" , vsubpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E85CCB" , vsubps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E85C8C2B80000000" , vsubps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E85C8C2B80000000" , vsubps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC5CCB" , vsubps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC5C8C2B80000000" , vsubps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC5C8C2B80000000" , vsubps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C485CCB" , vsubps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C485C4C2B02" , vsubps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C485C4C2B02" , vsubps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB5CCB" , vsubsd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EB5C8C2B80000000" , vsubsd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EB5C8C2B80000000" , vsubsd(xmm1, xmm2, qword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5CCB" , vsubss(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5EA5C8C2B80000000" , vsubss(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EA5C8C2B80000000" , vsubss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C4E2790FCA" , vtestpd(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2790F8C1A80000000" , vtestpd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2790F8C1A80000000" , vtestpd(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D0FCA" , vtestpd(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D0F8C1A80000000" , vtestpd(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D0F8C1A80000000" , vtestpd(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2790ECA" , vtestps(xmm1, xmm2)); - TEST_INSTRUCTION("C4E2790E8C1A80000000" , vtestps(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E2790E8C1A80000000" , vtestps(xmm1, xmmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D0ECA" , vtestps(ymm1, ymm2)); - TEST_INSTRUCTION("C4E27D0E8C1A80000000" , vtestps(ymm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C4E27D0E8C1A80000000" , vtestps(ymm1, ymmword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F92ECA" , vucomisd(xmm1, xmm2)); - TEST_INSTRUCTION("C5F92E8C1A80000000" , vucomisd(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F92E8C1A80000000" , vucomisd(xmm1, qword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F82ECA" , vucomiss(xmm1, xmm2)); - TEST_INSTRUCTION("C5F82E8C1A80000000" , vucomiss(xmm1, ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5F82E8C1A80000000" , vucomiss(xmm1, dword_ptr(edx, ebx, 0, 128))); - TEST_INSTRUCTION("C5E915CB" , vunpckhpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9158C2B80000000" , vunpckhpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9158C2B80000000" , vunpckhpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED15CB" , vunpckhpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED158C2B80000000" , vunpckhpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED158C2B80000000" , vunpckhpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED4815CB" , vunpckhpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48154C2B02" , vunpckhpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48154C2B02" , vunpckhpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E815CB" , vunpckhps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8158C2B80000000" , vunpckhps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8158C2B80000000" , vunpckhps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC15CB" , vunpckhps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC158C2B80000000" , vunpckhps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC158C2B80000000" , vunpckhps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C4815CB" , vunpckhps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48154C2B02" , vunpckhps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C48154C2B02" , vunpckhps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E914CB" , vunpcklpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9148C2B80000000" , vunpcklpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9148C2B80000000" , vunpcklpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED14CB" , vunpcklpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED148C2B80000000" , vunpcklpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED148C2B80000000" , vunpcklpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED4814CB" , vunpcklpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48144C2B02" , vunpcklpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48144C2B02" , vunpcklpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E814CB" , vunpcklps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8148C2B80000000" , vunpcklps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8148C2B80000000" , vunpcklps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC14CB" , vunpcklps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC148C2B80000000" , vunpcklps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC148C2B80000000" , vunpcklps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C4814CB" , vunpcklps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48144C2B02" , vunpcklps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C48144C2B02" , vunpcklps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E957CB" , vxorpd(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E9578C2B80000000" , vxorpd(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E9578C2B80000000" , vxorpd(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED57CB" , vxorpd(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5ED578C2B80000000" , vxorpd(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5ED578C2B80000000" , vxorpd(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED4857CB" , vxorpd(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F1ED48574C2B02" , vxorpd(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F1ED48574C2B02" , vxorpd(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E857CB" , vxorps(xmm1, xmm2, xmm3)); - TEST_INSTRUCTION("C5E8578C2B80000000" , vxorps(xmm1, xmm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5E8578C2B80000000" , vxorps(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC57CB" , vxorps(ymm1, ymm2, ymm3)); - TEST_INSTRUCTION("C5EC578C2B80000000" , vxorps(ymm1, ymm2, ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5EC578C2B80000000" , vxorps(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C4857CB" , vxorps(zmm1, zmm2, zmm3)); TEST_INSTRUCTION("62F16C48574C2B02" , vxorps(zmm1, zmm2, ptr(ebx, ebp, 0, 128))); TEST_INSTRUCTION("62F16C48574C2B02" , vxorps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128))); - TEST_INSTRUCTION("C5FC77" , vzeroall()); - TEST_INSTRUCTION("C5F877" , vzeroupper()); + } static void ASMJIT_NOINLINE testX86AssemblerAVX512_FP16(AssemblerTester& tester) noexcept { @@ -8279,6 +8490,17 @@ static void ASMJIT_NOINLINE testX86AssemblerExtras(AssemblerTester& tester) noexcept { + using namespace x86; + + FAIL_INSTRUCTION(kErrorInvalidInstruction , movs(byte_ptr(eax), byte_ptr(esi))); + FAIL_INSTRUCTION(kErrorInvalidInstruction , movs(word_ptr(eax), word_ptr(esi))); + FAIL_INSTRUCTION(kErrorInvalidInstruction , movs(dword_ptr(eax), dword_ptr(esi))); +} +*/ + bool testX86Assembler(const TestSettings& settings) noexcept { using namespace x86; @@ -8288,13 +8510,25 @@ bool testX86Assembler(const TestSettings& settings) noexcept { testX86AssemblerBase(tester); testX86AssemblerMMX_SSE(tester); testX86AssemblerAVX(tester); + testX86AssemblerAVX_NE_CONVERT(tester); + testX86AssemblerAVX_VNNI(tester); + testX86AssemblerAVX_VNNI_INT8(tester); + testX86AssemblerAVX_VNNI_INT16(tester); + testX86AssemblerAVX_SHA512(tester); + testX86AssemblerAVX_SM3(tester); + testX86AssemblerAVX_SM4(tester); + testX86AssemblerXOP(tester); + testX86AssemblerAVX512(tester); testX86AssemblerAVX512_FP16(tester); testX86AssemblerExtras(tester); + // testX86AssemblerFailures(tester); + tester.printSummary(); return tester.didPass(); } +#undef FAIL_INSTRUCTION #undef TEST_INSTRUCTION #endif // !ASMJIT_NO_X86 diff --git a/test/asmjit_test_perf.cpp b/test/asmjit_test_perf.cpp index ab96594..20fbbf4 100644 --- a/test/asmjit_test_perf.cpp +++ b/test/asmjit_test_perf.cpp @@ -30,9 +30,19 @@ int main(int argc, char* argv[]) { unsigned((ASMJIT_LIBRARY_VERSION ) & 0xFF)); printf("Usage:\n"); - printf(" --help Show usage only\n"); - printf(" --quick Decrease the number of iterations to make tests quicker\n"); - printf(" --arch= Select architecture to run ('all' by default)\n"); + printf(" --help Show usage only\n"); + printf(" --quick Decrease the number of iterations to make tests quicker\n"); + printf(" --arch= Select architecture(s) to run ('all' by default)\n"); + printf("\n"); + + printf("Architectures:\n"); +#if !defined(ASMJIT_NO_X86) + printf(" --arch=x86 32-bit X86 architecture (X86)\n"); + printf(" --arch=x64 64-bit X86 architecture (X86_64)\n"); +#endif +#if !defined(ASMJIT_AARCH64) + printf(" --arch=aarch64 64-bit ARM architecture (AArch64)\n"); +#endif printf("\n"); if (cmdLine.hasArg("--help")) diff --git a/test/asmjit_test_perf.h b/test/asmjit_test_perf.h index e96d729..f637013 100644 --- a/test/asmjit_test_perf.h +++ b/test/asmjit_test_perf.h @@ -41,6 +41,7 @@ static uint32_t calculateInstructionCount(asmjit::CodeHolder& code, asmjit::Arch node = node->next(); } + code.reset(); return count; } #endif diff --git a/test/asmjit_test_perf_x86.cpp b/test/asmjit_test_perf_x86.cpp index d634c30..462a0b3 100644 --- a/test/asmjit_test_perf_x86.cpp +++ b/test/asmjit_test_perf_x86.cpp @@ -670,9 +670,9 @@ static void generateSseSequenceInternal( cc.cvtpi2ps(xmmA, m); cc.cvtsi2ss(xmmA, m); cc.cvtss2si(gpd, m); - if (cc.is64Bit()) cc.cvtss2si(gpq, m); + cc.cvtss2si(gpz, m); cc.cvttss2si(gpd, m); - if (cc.is64Bit()) cc.cvttss2si(gpq, m); + cc.cvttss2si(gpz, m); cc.divps(xmmA, m); cc.divss(xmmA, m); cc.maxps(xmmA, m); @@ -729,16 +729,16 @@ static void generateSseSequenceInternal( cc.cvtps2dq(xmmA, m); cc.cvtps2pd(xmmA, m); cc.cvtsd2si(gpd, m); - if (cc.is64Bit()) cc.cvtsd2si(gpq, m); + cc.cvtsd2si(gpz, m); cc.cvtsd2ss(xmmA, m); cc.cvtsi2sd(xmmA, m); cc.cvtss2sd(xmmA, m); cc.cvtss2si(gpd, m); - if (cc.is64Bit()) cc.cvtss2si(gpq, m); + cc.cvtss2si(gpz, m); cc.cvttpd2dq(xmmA, m); cc.cvttps2dq(xmmA, m); cc.cvttsd2si(gpd, m); - if (cc.is64Bit()) cc.cvttsd2si(gpq, m); + cc.cvttsd2si(gpz, m); cc.divpd(xmmA, m); cc.divsd(xmmA, m); cc.maxpd(xmmA, m); diff --git a/tools/gencommons.js b/tools/gencommons.js new file mode 100644 index 0000000..569fbf6 --- /dev/null +++ b/tools/gencommons.js @@ -0,0 +1,23 @@ +// This file is part of AsmJit project +// +// See asmjit.h or LICENSE.md for license and copyright information +// SPDX-License-Identifier: Zlib + +let VERBOSE = false; + +function DEBUG(msg) { + if (VERBOSE) + console.log(msg); +} +exports.DEBUG = DEBUG; + +function WARN(msg) { + console.log(msg); +} +exports.WARN = WARN; + +function FATAL(msg) { + console.log(`FATAL ERROR: ${msg}`); + throw new Error(msg); +} +exports.FATAL = FATAL; diff --git a/tools/gencxx.js b/tools/gencxx.js new file mode 100644 index 0000000..f1a2b57 --- /dev/null +++ b/tools/gencxx.js @@ -0,0 +1,270 @@ +// This file is part of AsmJit project +// +// See asmjit.h or LICENSE.md for license and copyright information +// SPDX-License-Identifier: Zlib + +// C++ code generation helpers. +const commons = require("./gencommons.js"); +const FATAL = commons.FATAL; + +// Utilities to convert primitives to C++ code. +class Utils { + static toHex(val, pad) { + if (val < 0) + val = 0xFFFFFFFF + val + 1; + + let s = val.toString(16); + if (pad != null && s.length < pad) + s = "0".repeat(pad - s.length) + s; + + return "0x" + s.toUpperCase(); + } + + static capitalize(s) { + s = String(s); + return !s ? s : s[0].toUpperCase() + s.substr(1); + } + + static camelCase(s) { + if (s == null || s === "") + return s; + + s = String(s); + if (/^[A-Z]+$/.test(s)) + return s.toLowerCase(); + else + return s[0].toLowerCase() + s.substr(1); + } + + static normalizeSymbolName(s) { + switch (s) { + case "and": + case "or": + case "xor": + return s + "_"; + default: + return s; + } + } + + static indent(s, indentation) { + if (typeof indentation === "number") + indentation = " ".repeat(indentation); + + var lines = s.split(/\r?\n/g); + if (indentation) { + for (var i = 0; i < lines.length; i++) { + var line = lines[i]; + if (line) + lines[i] = indentation + line; + } + } + + return lines.join("\n"); + } +} +exports.Utils = Utils; + +// A node that represents a C++ construct. +class Node { + constructor(kind) { + this.kind = kind; + } +}; +exports.Node = Node; + +// A single line of C++ code that declares a variable with optional initialization. +class Var extends Node { + constructor(type, name, init) { + super("var"); + + this.type = type; + this.name = name; + this.init = init || ""; + } + + toString() { + let s = this.type + " " + this.name; + if (this.init) + s += " = " + this.init; + return s + ";\n"; + } +}; +exports.Var = Var; + +// A single line of C++ code, which should not contain any branch or a variable declaration. +class Line extends Node { + constructor(code) { + super("line"); + + this.code = code; + } + + toString() { + return String(this.code) + "\n"; + } +}; +exports.Line = Line; + +// A block containing an array of `Node` items (may contain nested blocks, etc...). +class Block extends Node { + constructor(nodes) { + super("block"); + + this.nodes = nodes || []; + } + + isEmpty() { + return this.nodes.length === 0; + } + + appendNode(node) { + if (!(node instanceof Node)) + FATAL("Block.appendNode(): Node must be an instance of Node"); + + this.nodes.push(node); + return this; + } + + prependNode(node) { + if (!(node instanceof Node)) + FATAL("Block.prependNode(): Node must be an instance of Node"); + + this.nodes.unshift(node); + return this; + } + + insertNode(index, node) { + if (!(node instanceof Node)) + FATAL("Block.insertNode(): Node must be an instance of Node"); + + if (index >= this.nodes.length) + this.nodes.push(node); + else + this.nodes.splice(index, 0, node); + + return this; + } + + addVarDecl(type, name, init) { + let node = type; + + if (!(node instanceof Var)) + node = new Var(type, name, init); + + let i = 0; + while (i < this.nodes.length) { + const n = this.nodes[i]; + if (n.kind === "var" && n.name === node.name && n.init === node.init) + return this; + + if (n.kind !== "var") + break; + + i++; + } + + this.insertNode(i, node); + return this; + } + + addLine(code) { + if (typeof code !== "string") + FATAL("Block.addLine(): Line must be string"); + + this.nodes.push(new Line(code)); + return this; + } + + prependEmptyLine() { + if (!this.isEmpty()) + this.nodes.splice(0, 0, new Line("")); + return this; + } + + addEmptyLine() { + if (!this.isEmpty()) + this.nodes.push(new Line("")); + return this; + } + + toString() { + let s = ""; + for (let node of this.nodes) + s += String(node); + return s; + } +} +exports.Block = Block; + +// A C++ 'condition' (if statement) and its 'body' if it's taken. +class If extends Node { + constructor(cond, body) { + super("if"); + + if (body == null) + body = new Block(); + + if (!(body instanceof Block)) + FATAL("If() - body must be a Block"); + + this.cond = cond; + this.body = body; + } + + toString() { + const cond = String(this.cond); + const body = String(this.body); + + return `if (${cond}) {\n` + Utils.indent(body, 2) + `}\n`; + } +} +exports.If = If; + +//! A C++ switch statement. +class Case extends Node { + constructor(cond, body) { + super("case"); + + this.cond = cond; + this.body = body || new Block(); + } + + toString() { + let s = ""; + for (let node of this.body.nodes) + s += String(node) + + if (this.cond !== "default") + return `case ${this.cond}: {\n` + Utils.indent(s, 2) + `}\n`; + else + return `default: {\n` + Utils.indent(s, 2) + `}\n`; + } +}; +exports.Case = Case; + +class Switch extends Node { + constructor(expression, cases) { + super("switch"); + + this.expression = expression; + this.cases = cases || []; + } + + addCase(cond, body) { + this.cases.push(new Case(cond, body)); + return this; + } + + toString() { + let s = ""; + for (let c of this.cases) { + if (s) + s += "\n"; + s += String(c); + } + + return `switch (${this.expression}) {\n` + Utils.indent(s, 2) + `}\n`; + } +} +exports.Switch = Switch; diff --git a/tools/tablegen-arm.js b/tools/tablegen-a64.js similarity index 95% rename from tools/tablegen-arm.js rename to tools/tablegen-a64.js index e73ee85..d24369e 100644 --- a/tools/tablegen-arm.js +++ b/tools/tablegen-a64.js @@ -1,17 +1,12 @@ -// [AsmJit] -// Machine Code Generation for C++. +// This file is part of AsmJit project // -// [License] -// ZLIB - See LICENSE.md file in the package. - -// ============================================================================ -// tablegen-arm.js -// ============================================================================ +// See asmjit.h or LICENSE.md for license and copyright information +// SPDX-License-Identifier: Zlib "use strict"; -const { executionAsyncResource } = require("async_hooks"); const core = require("./tablegen.js"); +const commons = require("./gencommons.js"); const hasOwn = Object.prototype.hasOwnProperty; const asmdb = core.asmdb; @@ -19,7 +14,7 @@ const kIndent = core.kIndent; const IndexedArray = core.IndexedArray; const StringUtils = core.StringUtils; -const FAIL = core.FAIL; +const FATAL = commons.FATAL; // ============================================================================ // [ArmDB] @@ -170,7 +165,7 @@ class ArmTableGen extends core.TableGen { } if (this.insts.length === 0 || this.insts.length !== StringUtils.countOf(stringData, "INST(")) - FAIL("ARMTableGen.parse(): Invalid parsing regexp (no data parsed)"); + FATAL("ARMTableGen.parse(): Invalid parsing regexp (no data parsed)"); console.log("Number of Instructions: " + this.insts.length); } diff --git a/tools/tablegen-a64.sh b/tools/tablegen-a64.sh new file mode 100755 index 0000000..2cbd85e --- /dev/null +++ b/tools/tablegen-a64.sh @@ -0,0 +1,3 @@ +#!/bin/sh + +node ./tablegen-a64.js diff --git a/tools/tablegen-arm.sh b/tools/tablegen-arm.sh deleted file mode 100755 index 8545c1e..0000000 --- a/tools/tablegen-arm.sh +++ /dev/null @@ -1,3 +0,0 @@ -#!/bin/sh - -node ./tablegen-arm.js diff --git a/tools/tablegen-x86.js b/tools/tablegen-x86.js index 2ffedf5..89872fc 100644 --- a/tools/tablegen-x86.js +++ b/tools/tablegen-x86.js @@ -3,23 +3,15 @@ // See asmjit.h or LICENSE.md for license and copyright information // SPDX-License-Identifier: Zlib -// ============================================================================ -// tablegen-x86.js -// -// The purpose of this script is to fetch all instructions' names into a single -// string and to optimize common patterns that appear in instruction data. It -// prevents relocation of small strings (instruction names) that has to be done -// by a linker to make all pointers the binary application/library uses valid. -// This approach decreases the final size of AsmJit binary and relocation data. -// -// NOTE: This script relies on 'asmdb' package. Either install it by using -// node.js package manager (npm) or by copying/symlinking the whole asmdb -// directory as [asmjit]/tools/asmdb. -// ============================================================================ - "use strict"; +const fs = require("fs"); +const path = require("path"); + +const cxx = require("./gencxx.js"); +const commons = require("./gencommons.js"); const core = require("./tablegen.js"); + const asmdb = core.asmdb; const kIndent = core.kIndent; @@ -33,56 +25,28 @@ const IndexedArray = core.IndexedArray; const hasOwn = Object.prototype.hasOwnProperty; const disclaimer = StringUtils.disclaimer; -const FAIL = core.FAIL; -const DEBUG = core.DEBUG; +const DEBUG = commons.DEBUG; +const FATAL = commons.FATAL; const decToHex = StringUtils.decToHex; +function readJSON(fileName) { + const content = fs.readFileSync(fileName); + return JSON.parse(content); +} + +const x86data = readJSON(path.join(__dirname, "..", "db", asmdb.x86.dbName)); + +// TODO: Fix these regressions: +// cvtsi2ss +// enqcmd + // ============================================================================ // [tablegen.x86.x86isa] // ============================================================================ // Create the X86 database and add some special cases recognized by AsmJit. -const x86isa = new asmdb.x86.ISA({ - instructions: [ - // Imul in [reg, imm] form is encoded as [reg, reg, imm]. - ["imul", "r16, ib" , "RMI" , "66 6B /r ib" , "ANY OF=W SF=W ZF=U AF=U PF=U CF=W"], - ["imul", "r32, ib" , "RMI" , "6B /r ib" , "ANY OF=W SF=W ZF=U AF=U PF=U CF=W"], - ["imul", "r64, ib" , "RMI" , "REX.W 6B /r ib", "X64 OF=W SF=W ZF=U AF=U PF=U CF=W"], - ["imul", "r16, iw/uw" , "RMI" , "66 69 /r iw" , "ANY OF=W SF=W ZF=U AF=U PF=U CF=W"], - ["imul", "r32, id/ud" , "RMI" , "69 /r id" , "ANY OF=W SF=W ZF=U AF=U PF=U CF=W"], - ["imul", "r64, id" , "RMI" , "REX.W 69 /r id", "X64 OF=W SF=W ZF=U AF=U PF=U CF=W"], - - // Movabs (X64 only). - ["movabs", "W:r64, iq/uq" , "I" , "REX.W B8+r iq", "X64"], - ["movabs", "w:al, moff8" , "NONE", "A0" , "X64"], - ["movabs", "w:ax, moff16" , "NONE", "66 A1" , "X64"], - ["movabs", "W:eax, moff32", "NONE", "A1" , "X64"], - ["movabs", "W:rax, moff64", "NONE", "REX.W A1" , "X64"], - ["movabs", "W:moff8, al" , "NONE", "A2" , "X64"], - ["movabs", "W:moff16, ax" , "NONE", "66 A3" , "X64"], - ["movabs", "W:moff32, eax", "NONE", "A3" , "X64"], - ["movabs", "W:moff64, rax", "NONE", "REX.W A3" , "X64"] - ] -}); - -// Remapped instructions contain mapping between instructions that AsmJit expects -// and instructions provided by asmdb. In general, AsmJit uses string instructions -// (like cmps, movs, etc...) without the suffix, so we just remap these and keep -// all others. -const RemappedInsts = { - __proto__: null, - - "cmpsd": { names: ["cmpsd"] , rep: false }, - "movsd": { names: ["movsd"] , rep: false }, - "cmps" : { names: ["cmpsb", "cmpsw", "cmpsd", "cmpsq"], rep: true }, - "movs" : { names: ["movsb", "movsw", "movsd", "movsq"], rep: true }, - "lods" : { names: ["lodsb", "lodsw", "lodsd", "lodsq"], rep: null }, - "scas" : { names: ["scasb", "scasw", "scasd", "scasq"], rep: null }, - "stos" : { names: ["stosb", "stosw", "stosd", "stosq"], rep: null }, - "ins" : { names: ["insb" , "insw" , "insd" ] , rep: null }, - "outs" : { names: ["outsb", "outsw", "outsd"] , rep: null } -}; +const x86isa = new asmdb.x86.ISA(x86data); // ============================================================================ // [tablegen.x86.Filter] @@ -95,7 +59,7 @@ class Filter { for (var i = 0; i < instArray.length; i++) { const inst = instArray[i]; - if (inst.attributes.AltForm) + if (inst.altForm) continue; const s = inst.operands.map((op) => { return op.isImm() ? "imm" : op.toString(); }).join(", "); @@ -113,7 +77,7 @@ class Filter { const result = []; for (var i = 0; i < instArray.length; i++) { const inst = instArray[i]; - if (inst.attributes.AltForm) + if (inst.altForm) continue; result.push(inst); } @@ -167,7 +131,28 @@ class GenUtils { } static cpuFeaturesOf(dbInsts) { - return ArrayUtils.sorted(dbInsts.unionCpuFeatures()); + function cmp(a, b) { + if (a.startsWith("AVX512") && !b.startsWith("AVX512")) + return 1; + if (b.startsWith("AVX512") && !a.startsWith("AVX512")) + return -1; + + if (a.startsWith("AVX") && !b.startsWith("AVX")) + return 1; + if (b.startsWith("AVX") && !a.startsWith("AVX")) + return -1; + + if (a === "FPU" && b !== "FPU") + return 1; + if (b === "FPU" && a !== "FPU") + return -1; + + return a < b ? -1 : a === b ? 0 : 1; + } + + const features = Object.getOwnPropertyNames(dbInsts.unionCpuFeatures()); + features.sort(cmp); + return features; } static assignVexEvexCompatibilityFlags(f, dbInsts) { @@ -261,16 +246,16 @@ class GenUtils { const dbInst = dbInsts[i]; const operands = dbInst.operands; - if (dbInst.attributes.Lock ) f.Lock = true; - if (dbInst.attributes.XAcquire ) f.XAcquire = true; - if (dbInst.attributes.XRelease ) f.XRelease = true; - if (dbInst.attributes.BND ) f.Rep = true; - if (dbInst.attributes.REP ) f.Rep = true; - if (dbInst.attributes.REPNE ) f.Rep = true; - if (dbInst.attributes.RepIgnored ) f.RepIgnored = true; - if (dbInst.attributes.ImplicitZeroing) f.Avx512ImplicitZ = true; + if (dbInst.prefixes.lock ) f.Lock = true; + if (dbInst.prefixes.xacquire ) f.XAcquire = true; + if (dbInst.prefixes.xrelease ) f.XRelease = true; + if (dbInst.prefixes.bnd ) f.Rep = true; + if (dbInst.prefixes.rep ) f.Rep = true; + if (dbInst.prefixes.repne ) f.Rep = true; + if (dbInst.prefixes.repIgnore ) f.RepIgnored = true; + if (dbInst.k === "zeroing" ) f.Avx512ImplicitZ = true; - if (dbInst.fpu) { + if (dbInst.category.FPU) { for (var j = 0; j < operands.length; j++) { const op = operands[j]; if (op.memSize === 16) f.FpuM16 = true; @@ -280,7 +265,7 @@ class GenUtils { } } - if (dbInst.attributes.Tsib) + if (dbInst.tsib) f.Tsib = true; if (dbInst.vsibReg) @@ -289,12 +274,11 @@ class GenUtils { if (dbInst.prefix === "VEX" || dbInst.prefix === "XOP") f.Vex = true; + if (dbInst.encodingPreference === "EVEX") + f.PreferEvex = true; + if (dbInst.prefix === "EVEX") { f.Evex = true; - - if (dbInst.extensions["AVX512_VNNI"]) - f.PreferEvex = true; - if (dbInst.kmask) f.Avx512K = true; if (dbInst.zmask) f.Avx512Z = true; @@ -418,7 +402,7 @@ class GenUtils { } } - static fixedRegOf(reg) { + static fixedRegOfRegName(reg) { switch (reg) { case "es" : return 1; case "cs" : return 2; @@ -447,11 +431,23 @@ class GenUtils { } } + static fixedRegOf(op) { + if (op.isReg()) { + return GenUtils.fixedRegOfRegName(op.reg); + } + else if (op.isMem() && op.memRegOnly) { + return GenUtils.fixedRegOfRegName(op.memRegOnly); + } + else { + return -1; + } + } + static controlFlow(dbInsts) { - if (dbInsts.checkAttribute("Control", "Jump")) return "Jump"; - if (dbInsts.checkAttribute("Control", "Call")) return "Call"; - if (dbInsts.checkAttribute("Control", "Branch")) return "Branch"; - if (dbInsts.checkAttribute("Control", "Return")) return "Return"; + if (dbInsts.checkAttribute("control", "jump")) return "Jump"; + if (dbInsts.checkAttribute("control", "call")) return "Call"; + if (dbInsts.checkAttribute("control", "branch")) return "Branch"; + if (dbInsts.checkAttribute("control", "return")) return "Return"; return "Regular"; } } @@ -473,16 +469,7 @@ class X86TableGen extends core.TableGen { // Get instructions (dbInsts) having the same name as understood by AsmJit. query(name) { - const remapped = RemappedInsts[name]; - if (!remapped) return x86isa.query(name); - - const dbInsts = x86isa.query(remapped.names); - const rep = remapped.rep; - if (rep === null) return dbInsts; - - return dbInsts.filter((inst) => { - return rep === !!(inst.attributes.REP || inst.attributes.REPNE); - }); + return x86isa.query(name); } // -------------------------------------------------------------------------- @@ -514,7 +501,7 @@ class X86TableGen extends core.TableGen { const dbInsts = this.query(name); if (name && !dbInsts.length) - FAIL(`Instruction '${name}' not found in asmdb`); + FATAL(`Instruction '${name}' not found in asmdb`); const flags = GenUtils.flagsOf(dbInsts); const controlFlow = GenUtils.controlFlow(dbInsts); @@ -547,7 +534,7 @@ class X86TableGen extends core.TableGen { } if (this.insts.length === 0) - FAIL("X86TableGen.parse(): Invalid parsing regexp (no data parsed)"); + FATAL("X86TableGen.parse(): Invalid parsing regexp (no data parsed)"); console.log("Number of Instructions: " + this.insts.length); } @@ -830,7 +817,7 @@ class IdEnum extends core.IdEnum { var text = ""; var features = GenUtils.cpuFeaturesOf(dbInsts); - const priorityFeatures = ["AVX_VNNI"]; + const priorityFeatures = ["AVX_VNNI", "AVX_VNNI_INT8", "AVX_IFMA", "AVX_NE_CONVERT"]; if (features.length) { text += "{"; @@ -968,7 +955,7 @@ class AltOpcodeTable extends core.Task { components[2] = "00"; } else { - FAIL(`Failed to process opcode '${opcode}'`); + FATAL(`Failed to process opcode '${opcode}'`); } const newOpcode = joinOpcodeComponents(components); @@ -1035,7 +1022,7 @@ function StringifyOpArray(a, map) { else if (hasOwn.call(map, op)) mapped = map[op]; else - FAIL(`UNHANDLED OPERAND '${op}'`); + FATAL(`UNHANDLED OPERAND '${op}'`); s += (s ? " | " : "") + mapped; } return s ? s : "0"; @@ -1252,14 +1239,14 @@ class ISignature extends Array { mergeWith(other) { // If both architectures are the same, it's fine to merge. - var ok = this.x86 === other.x86 && this.x64 === other.x64; + const sameArch = this.x86 === other.x86 && this.x64 === other.x64; // If the first arch is [X86|X64] and the second [X64] it's also fine. - if (!ok && this.x86 && this.x64 && !other.x86 && other.x64) - ok = true; + // if (!ok && this.x86 && this.x64 && !other.x86 && other.x64) + // ok = true; // It's not ok if both signatures have different number of implicit operands. - if (!ok || this.implicit !== other.implicit) + if (!sameArch || this.implicit !== other.implicit) return false; // It's not ok if both signatures have different number of operands. @@ -1267,8 +1254,8 @@ class ISignature extends Array { if (len !== other.length) return false; - var xorIndex = -1; - for (var i = 0; i < len; i++) { + let xorIndex = -1; + for (let i = 0; i < len; i++) { const xor = this[i].xor(other[i]); if (xor === null) continue; @@ -1279,12 +1266,9 @@ class ISignature extends Array { } // Bail if mergeWidth at operand-level failed. - if (xorIndex !== -1 && !this[xorIndex].mergeWith(other[xorIndex])) + if (xorIndex === -1 || !this[xorIndex].mergeWith(other[xorIndex])) return false; - this.x86 = this.x86 || other.x86; - this.x64 = this.x64 || other.x64; - return true; } @@ -1295,7 +1279,7 @@ class ISignature extends Array { class SignatureArray extends Array { // Iterate over all signatures and check which operands don't need explicit memory size. - calcImplicitMemSize() { + calcImplicitMemSize(instName) { // Calculates a hash-value (aka key) of all register operands specified by `regOps` in `inst`. function keyOf(inst, regOps) { var s = ""; @@ -1410,6 +1394,8 @@ class SignatureArray extends Array { // then keep this implicit as it won't do any harm. These instructions // cannot be mixed and it will make implicit the 32-bit one in cases // where X64 introduced 64-bit ones like `cvtsi2ss`. + if (!/^(bndcl|bndcn|bndcu|ptwrite|(v)?cvtsi2ss|(v)?cvtsi2sd|vcvtusi2ss|vcvtusi2sd)$/.test(instName)) + implicit = false; } else { implicit = false; @@ -1422,8 +1408,9 @@ class SignatureArray extends Array { // Patch all instructions to accept implicit-size memory operand. for (bIndex = 0; bIndex < sameSizeSet.length; bIndex++) { const bInst = sameSizeSet[bIndex]; - if (implicit) + if (implicit) { bInst[memPos].flags.mem = true; + } if (!implicit) DEBUG(`${this.name}: Explicit: ${bInst}`); @@ -1592,7 +1579,9 @@ class InstSignatureTable extends core.Task { } makeSignatures(dbInsts) { + const instName = dbInsts.length ? dbInsts[0].name : ""; const signatures = new SignatureArray(); + for (var i = 0; i < dbInsts.length; i++) { const inst = dbInsts[i]; const ops = inst.operands; @@ -1676,29 +1665,9 @@ class InstSignatureTable extends core.Task { op.flags.implicit = true; } - const seg = iop.memSeg; + const seg = iop.memSegment; if (seg) { switch (inst.name) { - case "cmpsb": op.flags.m8 = true; break; - case "cmpsw": op.flags.m16 = true; break; - case "cmpsd": op.flags.m32 = true; break; - case "cmpsq": op.flags.m64 = true; break; - case "lodsb": op.flags.m8 = true; break; - case "lodsw": op.flags.m16 = true; break; - case "lodsd": op.flags.m32 = true; break; - case "lodsq": op.flags.m64 = true; break; - case "movsb": op.flags.m8 = true; break; - case "movsw": op.flags.m16 = true; break; - case "movsd": op.flags.m32 = true; break; - case "movsq": op.flags.m64 = true; break; - case "scasb": op.flags.m8 = true; break; - case "scasw": op.flags.m16 = true; break; - case "scasd": op.flags.m32 = true; break; - case "scasq": op.flags.m64 = true; break; - case "stosb": op.flags.m8 = true; break; - case "stosw": op.flags.m16 = true; break; - case "stosd": op.flags.m32 = true; break; - case "stosq": op.flags.m64 = true; break; case "insb": op.flags.m8 = true; break; case "insw": op.flags.m16 = true; break; case "insd": op.flags.m32 = true; break; @@ -1718,6 +1687,9 @@ class InstSignatureTable extends core.Task { default: console.log(`UNKNOWN MEM IN INSTRUCTION '${inst.name}'`); break; } + if (iop.memRegOnly) + reg = iop.memRegOnly; + if (seg === "ds") op.flags.memDS = true; if (seg === "es") op.flags.memES = true; if (reg === "reg") { op.flags.memBase = true; } @@ -1730,30 +1702,37 @@ class InstSignatureTable extends core.Task { else if (reg) { if (reg == "r8") { op.flags["r8lo"] = true; - op.flags["r8hi"] = true; + + if (!inst.w || inst.w === "W0") + op.flags["r8hi"] = true; } else { op.flags[reg] = true; } } + if (mem) { op.flags[mem] = true; - // HACK: Allow LEA|CL*|PREFETCH* to use any memory size. - if (/^(cldemote|clwb|clflush\w*|lea|prefetch\w*)$/.test(inst.name)) { + // HACK: Allow LEA to use any memory size. + if (/^(lea)$/.test(inst.name)) { op.flags.mem = true; Object.assign(op.flags, MemOp); } // HACK: These instructions specify explicit memory size, but it's just informational. - if (inst.name === "enqcmd" || inst.name === "enqcmds" || inst.name === "movdir64b") + if (/^(call|enqcmd|enqcmds|lcall|ljmp|movdir64b)$/.test(inst.name)) { op.flags.mem = true; - + } } + if (imm) { if (iop.immSign === "any" || iop.immSign === "signed" ) op.flags["i" + imm] = true; if (iop.immSign === "any" || iop.immSign === "unsigned") op.flags["u" + imm] = true; } - if (rel) op.flags["rel" + rel] = true; + + if (rel) { + op.flags["rel" + rel] = true; + } row.push(op); } @@ -1764,8 +1743,8 @@ class InstSignatureTable extends core.Task { } } - if (signatures.length && GenUtils.canUseImplicitMemSize(dbInsts[0].name)) - signatures.calcImplicitMemSize(); + if (signatures.length && GenUtils.canUseImplicitMemSize(instName)) + signatures.calcImplicitMemSize(instName); signatures.compact(); return signatures; @@ -1868,7 +1847,7 @@ class AdditionalInfoTable extends core.Task { if (dbInst.name === "mov") continue; - const specialRegs = dbInst.specialRegs; + const regs = dbInst.io; // Mov is a special case, moving to/from control regs makes flags undefined, // which we don't want to have in `X86InstDB::operationData`. This is, thus, @@ -1876,28 +1855,28 @@ class AdditionalInfoTable extends core.Task { if (dbInst.name === "mov") continue; - for (var specialReg in specialRegs) { + for (var reg in regs) { var flag = ""; - switch (specialReg) { - case "FLAGS.CF": flag = "CF"; break; - case "FLAGS.OF": flag = "OF"; break; - case "FLAGS.SF": flag = "SF"; break; - case "FLAGS.ZF": flag = "ZF"; break; - case "FLAGS.AF": flag = "AF"; break; - case "FLAGS.PF": flag = "PF"; break; - case "FLAGS.DF": flag = "DF"; break; - case "FLAGS.IF": flag = "IF"; break; - //case "FLAGS.TF": flag = "TF"; break; - case "FLAGS.AC": flag = "AC"; break; - case "X86SW.C0": flag = "C0"; break; - case "X86SW.C1": flag = "C1"; break; - case "X86SW.C2": flag = "C2"; break; - case "X86SW.C3": flag = "C3"; break; + switch (reg) { + case "CF": flag = "CF"; break; + case "OF": flag = "OF"; break; + case "SF": flag = "SF"; break; + case "ZF": flag = "ZF"; break; + case "AF": flag = "AF"; break; + case "PF": flag = "PF"; break; + case "DF": flag = "DF"; break; + case "IF": flag = "IF"; break; + //case "TF": flag = "TF"; break; + case "AC": flag = "AC"; break; + case "C0": flag = "C0"; break; + case "C1": flag = "C1"; break; + case "C2": flag = "C2"; break; + case "C3": flag = "C3"; break; default: continue; } - switch (specialRegs[specialReg]) { + switch (regs[reg]) { case "R": r[flag] = true; break; @@ -2132,7 +2111,7 @@ class InstRWInfoTable extends core.Task { for (var j = start; j <= end; j++) { const bytePos = j >> 3; if (bytePos < 0 || bytePos >= arr.length) - FAIL(`Range ${start}:${end} cannot be used to create a byte-mask`); + FATAL(`Range ${start}:${end} cannot be used to create a byte-mask`); arr[bytePos] = 1; } } @@ -2163,7 +2142,7 @@ class InstRWInfoTable extends core.Task { access: op.read && op.write ? "X" : op.read ? "R" : op.write ? "W" : "?", clc: 0, flags: {}, - fixed: GenUtils.fixedRegOf(op.reg), + fixed: GenUtils.fixedRegOf(op), index: op.rwxIndex, width: op.rwxWidth }; @@ -2197,10 +2176,7 @@ class InstRWInfoTable extends core.Task { // NOTE: Avoid push/pop here as PUSH/POP has many variations for segment registers, // which would set 'd.fixed' field even for GP variation of the instuction. if (instName !== "push" && instName !== "pop") { - if (op.isReg()) - d.fixed = GenUtils.fixedRegOf(op.reg); - else - d.fixed = GenUtils.fixedRegOf(op.mem); + d.fixed = GenUtils.fixedRegOf(op); } switch (instName) { @@ -2232,7 +2208,7 @@ class InstRWInfoTable extends core.Task { } if (d.fixed !== -1) { - if (op.memSeg) + if (op.memSegment) d.flags.MemPhysId = true; else d.flags.RegPhysId = true; @@ -2320,7 +2296,7 @@ class InstRWInfoTable extends core.Task { if (queryRwByData(dbInsts, this.rwCategoryByData[k])) return { category: k, rwOps: nullOps() }; - // FAILURE: Missing data to categorize this instruction. + // FATALURE: Missing data to categorize this instruction. if (name) { const items = dumpRwToData(dbInsts) console.log(`RW: ${dbInsts.length ? dbInsts[0].name : ""}:`); @@ -2410,7 +2386,7 @@ class InstRWInfoTable extends core.Task { if (/^(punpcklbw|punpckldq|punpcklwd)$/.test(dbInst.name)) return "None"; - return StringUtils.capitalize(dbInst.name); + return cxx.Utils.capitalize(dbInst.name); } } diff --git a/tools/tablegen.js b/tools/tablegen.js index 4763a72..98faa36 100644 --- a/tools/tablegen.js +++ b/tools/tablegen.js @@ -12,31 +12,22 @@ "use strict"; -const VERBOSE = false; - // ============================================================================ // [Imports] // ============================================================================ const fs = require("fs"); + +const commons = require("./gencommons.js"); +const cxx = require("./gencxx.js"); +const asmdb = require("../db"); + +exports.asmdb = asmdb; +exports.exp = asmdb.base.exp; + const hasOwn = Object.prototype.hasOwnProperty; -const asmdb = (function() { - // Try to import a local 'asmdb' package, if available. - try { - return require("./asmdb"); - } - catch (ex) { - if (ex.code !== "MODULE_NOT_FOUND") { - console.log(`FATAL ERROR: ${ex.message}`); - throw ex; - } - } - - // Try to import global 'asmdb' package as local package is not available. - return require("asmdb"); -})(); -exports.asmdb = asmdb; +const FATAL = commons.FATAL; // ============================================================================ // [Constants] @@ -50,27 +41,6 @@ exports.kIndent = kIndent; exports.kJustify = kJustify; exports.kAsmJitRoot = kAsmJitRoot; -// ============================================================================ -// [Debugging] -// ============================================================================ - -function DEBUG(msg) { - if (VERBOSE) - console.log(msg); -} -exports.DEBUG = DEBUG; - -function WARN(msg) { - console.log(msg); -} -exports.WARN = WARN; - -function FAIL(msg) { - console.log(`FATAL ERROR: ${msg}`); - throw new Error(msg); -} -exports.FAIL = FAIL; - // ============================================================================ // [Lang] // ============================================================================ @@ -162,7 +132,7 @@ class StringUtils { static countOf(s, pattern) { if (!pattern) - FAIL(`Pattern cannot be empty`); + FATAL(`Pattern cannot be empty`); var n = 0; var pos = 0; @@ -175,11 +145,6 @@ class StringUtils { return n; } - static capitalize(s) { - s = String(s); - return !s ? s : s[0].toUpperCase() + s.substr(1); - } - static trimLeft(s) { return s.replace(/^\s+/, ""); } static trimRight(s) { return s.replace(/\s+$/, ""); } @@ -262,11 +227,15 @@ class StringUtils { } static indent(s, indentation) { + if (typeof indentation === "number") + indentation = " ".repeat(indentation); + var lines = s.split(/\r?\n/g); if (indentation) { for (var i = 0; i < lines.length; i++) { var line = lines[i]; - if (line) lines[i] = indentation + line; + if (line) + lines[i] = indentation + line; } } @@ -278,10 +247,10 @@ class StringUtils { var iEnd = s.indexOf(end); if (iStart === -1) - FAIL(`StringUtils.extract(): Couldn't locate start mark '${start}'`); + FATAL(`StringUtils.extract(): Couldn't locate start mark '${start}'`); if (iEnd === -1) - FAIL(`StringUtils.extract(): Couldn't locate end mark '${end}'`); + FATAL(`StringUtils.extract(): Couldn't locate end mark '${end}'`); return s.substring(iStart + start.length, iEnd).trim(); } @@ -291,10 +260,10 @@ class StringUtils { var iEnd = s.indexOf(end); if (iStart === -1) - FAIL(`StringUtils.inject(): Couldn't locate start mark '${start}'`); + FATAL(`StringUtils.inject(): Couldn't locate start mark '${start}'`); if (iEnd === -1) - FAIL(`StringUtils.inject(): Couldn't locate end mark '${end}'`); + FATAL(`StringUtils.inject(): Couldn't locate end mark '${end}'`); var nIndent = 0; while (iStart > 0 && s[iStart-1] === " ") { @@ -443,8 +412,8 @@ class CxxUtils { if (!fn) fn = nop; - var out = ""; - for (var k in obj) { + let out = ""; + for (let k in obj) { if (obj[k]) out += (out ? " | " : "") + fn(k); } @@ -536,7 +505,7 @@ class IndexedString { format(indent, justify) { if (this.size === -1) - FAIL(`IndexedString.format(): not indexed yet, call index()`); + FATAL(`IndexedString.format(): not indexed yet, call index()`); const array = this.array; if (!justify) justify = 0; @@ -564,16 +533,16 @@ class IndexedString { getSize() { if (this.size === -1) - FAIL(`IndexedString.getSize(): Not indexed yet, call index()`); + FATAL(`IndexedString.getSize(): Not indexed yet, call index()`); return this.size; } getIndex(k) { if (this.size === -1) - FAIL(`IndexedString.getIndex(): Not indexed yet, call index()`); + FATAL(`IndexedString.getIndex(): Not indexed yet, call index()`); if (!hasOwn.call(this.map, k)) - FAIL(`IndexedString.getIndex(): Key '${k}' not found.`); + FATAL(`IndexedString.getIndex(): Key '${k}' not found.`); return this.map[k]; } @@ -585,23 +554,13 @@ exports.IndexedString = IndexedString; // [InstructionNameData] // ============================================================================ -function decimalToHexString(number, pad) { - if (number < 0) - number = 0xFFFFFFFF + number + 1; - - let s = number.toString(16).toUpperCase(); - if (pad) - s = s.padStart(pad, "0") - return s; -} - function charTo5Bit(c) { if (c >= 'a' && c <= 'z') return 1 + (c.charCodeAt(0) - 'a'.charCodeAt(0)); else if (c >= '0' && c <= '4') return 1 + 26 + (c.charCodeAt(0) - '0'.charCodeAt(0)); else - FAIL(`Character '${c}' cannot be encoded into a 5-bit string`); + FATAL(`Character '${c}' cannot be encoded into a 5-bit string`); } class InstructionNameData { @@ -746,11 +705,11 @@ class InstructionNameData { formatIndexTable(tableName) { if (this.size === -1) - FAIL(`IndexedString.formatIndexTable(): Not indexed yet, call index()`); + FATAL(`IndexedString.formatIndexTable(): Not indexed yet, call index()`); let s = ""; for (let i = 0; i < this.primaryTable.length; i++) { - s += "0x" + decimalToHexString(this.primaryTable[i], 8); + s += cxx.Utils.toHex(this.primaryTable[i], 8); s += i !== this.primaryTable.length - 1 ? "," : " "; s += " // " + this.indexComment[i] + "\n"; } @@ -760,7 +719,7 @@ class InstructionNameData { formatStringTable(tableName) { if (this.size === -1) - FAIL(`IndexedString.formatStringTable(): Not indexed yet, call index()`); + FATAL(`IndexedString.formatStringTable(): Not indexed yet, call index()`); let s = ""; for (let i = 0; i < this.stringTable.length; i += 80) { @@ -775,17 +734,17 @@ class InstructionNameData { getSize() { if (this.size === -1) - FAIL(`IndexedString.getSize(): Not indexed yet, call index()`); + FATAL(`IndexedString.getSize(): Not indexed yet, call index()`); return this.primaryTable.length * 4 + this.stringTable.length; } getIndex(k) { if (this.size === -1) - FAIL(`IndexedString.getIndex(): Not indexed yet, call index()`); + FATAL(`IndexedString.getIndex(): Not indexed yet, call index()`); if (!hasOwn.call(this.map, k)) - FAIL(`IndexedString.getIndex(): Key '${k}' not found.`); + FATAL(`IndexedString.getIndex(): Key '${k}' not found.`); return this.map[k]; } @@ -855,7 +814,7 @@ class Task { } run() { - FAIL("Task.run(): Must be reimplemented"); + FATAL("Task.run(): Must be reimplemented"); } } exports.Task = Task; @@ -917,7 +876,7 @@ class TableGen { dataOfFile(file) { const obj = this.files[file]; if (!obj) - FAIL(`TableGen.dataOfFile(): File '${file}' not loaded`); + FATAL(`TableGen.dataOfFile(): File '${file}' not loaded`); return obj.data; } @@ -938,7 +897,7 @@ class TableGen { } if (!done) - FAIL(`TableGen.inject(): Cannot find '${key}'`); + FATAL(`TableGen.inject(): Cannot find '${key}'`); if (size) this.tableSizes[key] = size; @@ -952,14 +911,14 @@ class TableGen { addTask(task) { if (!task.name) - FAIL(`TableGen.addModule(): Module must have a name`); + FATAL(`TableGen.addModule(): Module must have a name`); if (this.taskMap[task.name]) - FAIL(`TableGen.addModule(): Module '${task.name}' already added`); + FATAL(`TableGen.addModule(): Module '${task.name}' already added`); task.deps.forEach((dependency) => { if (!this.taskMap[dependency]) - FAIL(`TableGen.addModule(): Dependency '${dependency}' of module '${task.name}' doesn't exist`); + FATAL(`TableGen.addModule(): Dependency '${dependency}' of module '${task.name}' doesn't exist`); }); this.tasks.push(task); @@ -1004,7 +963,7 @@ class TableGen { addInst(inst) { if (this.instMap[inst.name]) - FAIL(`TableGen.addInst(): Instruction '${inst.name}' already added`); + FATAL(`TableGen.addInst(): Instruction '${inst.name}' already added`); inst.id = this.insts.length; this.insts.push(inst); @@ -1068,7 +1027,7 @@ class IdEnum extends Task { } comment(name) { - FAIL("IdEnum.comment(): Must be reimplemented"); + FATAL("IdEnum.comment(): Must be reimplemented"); } run() { @@ -1121,7 +1080,7 @@ class NameTable extends Task { const index = name.charCodeAt(0) - 'a'.charCodeAt(0); if (index < 0 || index >= 26) - FAIL(`TableGen.generateNameData(): Invalid lookup character '${name[0]}' of '${name}'`); + FATAL(`TableGen.generateNameData(): Invalid lookup character '${name[0]}' of '${name}'`); if (instFirst[index] === undefined) instFirst[index] = `Inst::kId${inst.enum}`; diff --git a/tools/tablegen.sh b/tools/tablegen.sh index b2c9cac..bd835c7 100755 --- a/tools/tablegen.sh +++ b/tools/tablegen.sh @@ -1,4 +1,4 @@ #!/usr/bin/env sh set -e -node ./tablegen-arm.js $@ +node ./tablegen-a64.js $@ node ./tablegen-x86.js $@