From cecc73f2979e9704c81a2c2ec79a7475b31c56ac Mon Sep 17 00:00:00 2001
From: kobalicek <kobalicek.petr@gmail.com>
Date: Sat, 10 May 2025 15:23:57 +0200
Subject: [PATCH] [doc] Minor documentation update

---
 src/asmjit/core/inst.h     | 5 ++---
 src/asmjit/x86/x86instdb.h | 7 +++++--
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/asmjit/core/inst.h b/src/asmjit/core/inst.h
index d2b1d80..f857f2e 100644
--- a/src/asmjit/core/inst.h
+++ b/src/asmjit/core/inst.h
@@ -437,9 +437,8 @@ enum class OpRWFlags : uint32_t {
   //!
   //! This flag is used by all architectures to describe instructions that use consecutive registers, where only the
   //! first one is encoded in the instruction, and the others are just a sequence that starts with the first one. On
-  //! X86/X86_64 architecture this is used by instructions such as V4FMADDPS, V4FMADDSS, V4FNMADDPS, V4FNMADDSS,
-  //! VP4DPWSSD, VP4DPWSSDS, VP2INTERSECTD, and VP2INTERSECTQ. On ARM/AArch64 this is used by vector load and store
-  //! instructions that can load or store multiple registers at once.
+  //! X86/X86_64 architecture this is used by instructions such as VP2INTERSECTD and VP2INTERSECTQ. On ARM/AArch64
+  //! this is used by vector load and store instructions that can load or store multiple registers at once.
   kConsecutive = 0x00000008u,
 
   //! The `extendByteMask()` represents a zero extension.
diff --git a/src/asmjit/x86/x86instdb.h b/src/asmjit/x86/x86instdb.h
index 00623e2..dd282b2 100644
--- a/src/asmjit/x86/x86instdb.h
+++ b/src/asmjit/x86/x86instdb.h
@@ -292,8 +292,7 @@ enum class InstFlags : uint32_t {
 
   //! Instruction uses consecutive registers.
   //!
-  //! Used by V4FMADDPS, V4FMADDSS, V4FNMADDPS, V4FNMADDSS, VP4DPWSSD, VP4DPWSSDS, VP2INTERSECTD, and VP2INTERSECTQ
-  //! instructions
+  //! Used by VP2INTERSECTD and VP2INTERSECTQ instructions.
   kConsecutiveRegs = 0x20000000u
 };
 ASMJIT_DEFINE_ENUM_FLAGS(InstFlags)
@@ -532,10 +531,14 @@ struct InstInfo {
   //! Returns a hint that can be used when both inputs are the same register.
   ASMJIT_INLINE_NODEBUG InstSameRegHint sameRegHint() const noexcept { return commonInfo().sameRegHint(); }
 
+  //! Returns the beginning of the instruction signature list relative to \ref _instSignatureTable.
   ASMJIT_INLINE_NODEBUG uint32_t signatureIndex() const noexcept { return commonInfo().signatureIndex(); }
+  //! Returns the number of instruction signature entries.
   ASMJIT_INLINE_NODEBUG uint32_t signatureCount() const noexcept { return commonInfo().signatureCount(); }
 
+  //! Returns the beginning of instruction signature data (relative to \ref _instSignatureTable).
   ASMJIT_INLINE_NODEBUG const InstSignature* signatureData() const noexcept { return commonInfo().signatureData(); }
+  //! Returns the end of instruction signature data (relative to \ref _instSignatureTable).
   ASMJIT_INLINE_NODEBUG const InstSignature* signatureEnd() const noexcept { return commonInfo().signatureEnd(); }
 
   //! \}