diff --git a/src/asmjit/x86/x86operand.cpp b/src/asmjit/x86/x86operand.cpp
index ec24880..3e64494 100644
--- a/src/asmjit/x86/x86operand.cpp
+++ b/src/asmjit/x86/x86operand.cpp
@@ -140,6 +140,18 @@ UNIT(x86_operand) {
   EXPECT(zmm6.cloneAs(xmm14) == xmm6);
   EXPECT(zmm6.cloneAs(ymm15) == ymm6);
 
+  EXPECT(xmm7.xmm() == xmm7);
+  EXPECT(xmm7.ymm() == ymm7);
+  EXPECT(xmm7.zmm() == zmm7);
+
+  EXPECT(ymm7.xmm() == xmm7);
+  EXPECT(ymm7.ymm() == ymm7);
+  EXPECT(ymm7.zmm() == zmm7);
+
+  EXPECT(zmm7.xmm() == xmm7);
+  EXPECT(zmm7.ymm() == ymm7);
+  EXPECT(zmm7.zmm() == zmm7);
+
   INFO("Checking x86::FpMm register properties");
   EXPECT(Mm().isReg() == true);
   EXPECT(mm2.isReg() == true);
diff --git a/src/asmjit/x86/x86operand.h b/src/asmjit/x86/x86operand.h
index fd6d4f6..50a8739 100644
--- a/src/asmjit/x86/x86operand.h
+++ b/src/asmjit/x86/x86operand.h
@@ -381,9 +381,9 @@ inline GpbHi Gp::r8Hi() const noexcept { return GpbHi(id()); }
 inline Gpw Gp::r16() const noexcept { return Gpw(id()); }
 inline Gpd Gp::r32() const noexcept { return Gpd(id()); }
 inline Gpq Gp::r64() const noexcept { return Gpq(id()); }
-inline Xmm Vec::xmm() const noexcept { return Xmm(*this, id()); }
-inline Ymm Vec::ymm() const noexcept { return Ymm(*this, id()); }
-inline Zmm Vec::zmm() const noexcept { return Zmm(*this, id()); }
+inline Xmm Vec::xmm() const noexcept { return Xmm(id()); }
+inline Ymm Vec::ymm() const noexcept { return Ymm(id()); }
+inline Zmm Vec::zmm() const noexcept { return Zmm(id()); }
 //! \endcond
 
 // ============================================================================