mirror of
https://github.com/asmjit/asmjit.git
synced 2025-12-17 04:24:37 +03:00
[ABI] Refactored AsmJit to use strong-typed enums, this breaks both API and ABI
[ABI] Added ABI version as an inline namespace, which forms asmjit::_abi_MAJOR_MINOR
[ABI] Added support for AVX512_FP16, 16-bit broadcast, and AVX512_FP16 tests
[ABI] Added initial support for consecutive registers into instruction database and register allocator
[ABI] Added a possibility to use temporary memory in CodeHolder's zone
[ABI] Compiler::setArg() is now deprecated, use FuncNode::setArg()
[Bug] Fixed correct RW information of instructions that only support implicit zeroing with {k}
[Bug] Fixed broadcast to be able to broadcast bcst16 operands
This commit is contained in:
@@ -1,25 +1,7 @@
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// AsmJit - Machine code generation for C++
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// This file is part of AsmJit project <https://asmjit.com>
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//
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// * Official AsmJit Home Page: https://asmjit.com
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// * Official Github Repository: https://github.com/asmjit/asmjit
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//
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// Copyright (c) 2008-2020 The AsmJit Authors
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//
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// This software is provided 'as-is', without any express or implied
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// warranty. In no event will the authors be held liable for any damages
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// arising from the use of this software.
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//
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// Permission is granted to anyone to use this software for any purpose,
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// including commercial applications, and to alter it and redistribute it
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// freely, subject to the following restrictions:
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//
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// 1. The origin of this software must not be misrepresented; you must not
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// claim that you wrote the original software. If you use this software
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// in a product, an acknowledgment in the product documentation would be
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// appreciated but is not required.
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// 2. Altered source versions must be plainly marked as such, and must not be
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// misrepresented as being the original software.
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// 3. This notice may not be removed or altered from any source distribution.
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// See asmjit.h or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#include <asmjit/core.h>
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@@ -35,7 +17,7 @@ static char accessLetter(bool r, bool w) noexcept {
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return r && w ? 'X' : r ? 'R' : w ? 'W' : '_';
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}
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static void printInfo(uint32_t arch, const BaseInst& inst, const Operand_* operands, size_t opCount) {
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static void printInfo(Arch arch, const BaseInst& inst, const Operand_* operands, size_t opCount) {
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StringTmp<512> sb;
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// Read & Write Information
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@@ -45,7 +27,7 @@ static void printInfo(uint32_t arch, const BaseInst& inst, const Operand_* opera
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InstAPI::queryRWInfo(arch, inst, operands, opCount, &rw);
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#ifndef ASMJIT_NO_LOGGING
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Formatter::formatInstruction(sb, 0, nullptr, arch, inst, operands, opCount);
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Formatter::formatInstruction(sb, FormatFlags::kNone, nullptr, arch, inst, operands, opCount);
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#else
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sb.append("<Logging-Not-Available>");
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#endif
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@@ -77,34 +59,37 @@ static void printInfo(uint32_t arch, const BaseInst& inst, const Operand_* opera
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sb.append("\n");
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}
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if (rw.readFlags() | rw.writeFlags()) {
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// CPU Flags (Read/Write)
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// ----------------------
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if ((rw.readFlags() | rw.writeFlags()) != CpuRWFlags::kNone) {
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sb.append(" Flags: \n");
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struct FlagMap {
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uint32_t flag;
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CpuRWFlags flag;
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char name[4];
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};
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static const FlagMap flagMap[] = {
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{ x86::Status::kCF, "CF" },
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{ x86::Status::kOF, "OF" },
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{ x86::Status::kSF, "SF" },
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{ x86::Status::kZF, "ZF" },
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{ x86::Status::kAF, "AF" },
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{ x86::Status::kPF, "PF" },
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{ x86::Status::kDF, "DF" },
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{ x86::Status::kIF, "IF" },
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{ x86::Status::kAC, "AC" },
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{ x86::Status::kC0, "C0" },
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{ x86::Status::kC1, "C1" },
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{ x86::Status::kC2, "C2" },
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{ x86::Status::kC3, "C3" }
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{ CpuRWFlags::kX86_CF, "CF" },
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{ CpuRWFlags::kX86_OF, "OF" },
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{ CpuRWFlags::kX86_SF, "SF" },
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{ CpuRWFlags::kX86_ZF, "ZF" },
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{ CpuRWFlags::kX86_AF, "AF" },
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{ CpuRWFlags::kX86_PF, "PF" },
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{ CpuRWFlags::kX86_DF, "DF" },
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{ CpuRWFlags::kX86_IF, "IF" },
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{ CpuRWFlags::kX86_AC, "AC" },
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{ CpuRWFlags::kX86_C0, "C0" },
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{ CpuRWFlags::kX86_C1, "C1" },
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{ CpuRWFlags::kX86_C2, "C2" },
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{ CpuRWFlags::kX86_C3, "C3" }
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};
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sb.append(" ");
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for (uint32_t f = 0; f < 13; f++) {
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char c = accessLetter((rw.readFlags() & flagMap[f].flag) != 0,
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(rw.writeFlags() & flagMap[f].flag) != 0);
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char c = accessLetter((rw.readFlags() & flagMap[f].flag) != CpuRWFlags::kNone,
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(rw.writeFlags() & flagMap[f].flag) != CpuRWFlags::kNone);
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if (c != '_')
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sb.appendFormat("%s=%c ", flagMap[f].name, c);
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}
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@@ -115,7 +100,7 @@ static void printInfo(uint32_t arch, const BaseInst& inst, const Operand_* opera
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// CPU Features
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// ------------
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BaseFeatures features;
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CpuFeatures features;
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InstAPI::queryFeatures(arch, inst, operands, opCount, &features);
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#ifndef ASMJIT_NO_LOGGING
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@@ -124,7 +109,7 @@ static void printInfo(uint32_t arch, const BaseInst& inst, const Operand_* opera
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sb.append(" ");
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bool first = true;
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BaseFeatures::Iterator it(features.iterator());
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CpuFeatures::Iterator it(features.iterator());
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while (it.hasNext()) {
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uint32_t featureId = uint32_t(it.next());
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if (!first)
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@@ -140,7 +125,7 @@ static void printInfo(uint32_t arch, const BaseInst& inst, const Operand_* opera
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}
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template<typename... Args>
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static void printInfoSimple(uint32_t arch, uint32_t instId, uint32_t options, Args&&... args) {
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static void printInfoSimple(Arch arch,InstId instId, InstOptions options, Args&&... args) {
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BaseInst inst(instId);
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inst.addOptions(options);
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Operand_ opArray[] = { std::forward<Args>(args)... };
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@@ -148,7 +133,7 @@ static void printInfoSimple(uint32_t arch, uint32_t instId, uint32_t options, Ar
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}
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template<typename... Args>
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static void printInfoExtra(uint32_t arch, uint32_t instId, uint32_t options, const BaseReg& extraReg, Args&&... args) {
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static void printInfoExtra(Arch arch, InstId instId, InstOptions options, const BaseReg& extraReg, Args&&... args) {
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BaseInst inst(instId);
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inst.addOptions(options);
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inst.setExtraReg(extraReg);
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@@ -159,27 +144,27 @@ static void printInfoExtra(uint32_t arch, uint32_t instId, uint32_t options, con
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static void testX86Arch() {
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#if !defined(ASMJIT_NO_X86)
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using namespace x86;
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uint32_t arch = Environment::kArchX64;
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Arch arch = Arch::kX64;
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printInfoSimple(arch, Inst::kIdAdd, 0, eax, ebx);
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printInfoSimple(arch, Inst::kIdLods, 0, eax, dword_ptr(rsi));
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printInfoSimple(arch, Inst::kIdAdd, InstOptions::kNone, eax, ebx);
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printInfoSimple(arch, Inst::kIdLods, InstOptions::kNone, eax, dword_ptr(rsi));
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printInfoSimple(arch, Inst::kIdPshufd, 0, xmm0, xmm1, imm(0));
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printInfoSimple(arch, Inst::kIdPabsb, 0, mm1, mm2);
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printInfoSimple(arch, Inst::kIdPabsb, 0, xmm1, xmm2);
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printInfoSimple(arch, Inst::kIdPextrw, 0, eax, mm1, imm(0));
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printInfoSimple(arch, Inst::kIdPextrw, 0, eax, xmm1, imm(0));
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printInfoSimple(arch, Inst::kIdPextrw, 0, ptr(rax), xmm1, imm(0));
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printInfoSimple(arch, Inst::kIdPshufd, InstOptions::kNone, xmm0, xmm1, imm(0));
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printInfoSimple(arch, Inst::kIdPabsb, InstOptions::kNone, mm1, mm2);
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printInfoSimple(arch, Inst::kIdPabsb, InstOptions::kNone, xmm1, xmm2);
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printInfoSimple(arch, Inst::kIdPextrw, InstOptions::kNone, eax, mm1, imm(0));
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printInfoSimple(arch, Inst::kIdPextrw, InstOptions::kNone, eax, xmm1, imm(0));
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printInfoSimple(arch, Inst::kIdPextrw, InstOptions::kNone, ptr(rax), xmm1, imm(0));
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printInfoSimple(arch, Inst::kIdVpdpbusd, 0, xmm0, xmm1, xmm2);
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printInfoSimple(arch, Inst::kIdVpdpbusd, Inst::kOptionVex, xmm0, xmm1, xmm2);
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printInfoSimple(arch, Inst::kIdVpdpbusd, InstOptions::kNone, xmm0, xmm1, xmm2);
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printInfoSimple(arch, Inst::kIdVpdpbusd, InstOptions::kX86_Vex, xmm0, xmm1, xmm2);
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printInfoSimple(arch, Inst::kIdVaddpd, 0, ymm0, ymm1, ymm2);
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printInfoSimple(arch, Inst::kIdVaddpd, 0, ymm0, ymm30, ymm31);
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printInfoSimple(arch, Inst::kIdVaddpd, 0, zmm0, zmm1, zmm2);
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printInfoSimple(arch, Inst::kIdVaddpd, InstOptions::kNone, ymm0, ymm1, ymm2);
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printInfoSimple(arch, Inst::kIdVaddpd, InstOptions::kNone, ymm0, ymm30, ymm31);
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printInfoSimple(arch, Inst::kIdVaddpd, InstOptions::kNone, zmm0, zmm1, zmm2);
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printInfoExtra(arch, Inst::kIdVaddpd, 0, k1, zmm0, zmm1, zmm2);
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printInfoExtra(arch, Inst::kIdVaddpd, Inst::kOptionZMask, k1, zmm0, zmm1, zmm2);
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printInfoExtra(arch, Inst::kIdVaddpd, InstOptions::kNone, k1, zmm0, zmm1, zmm2);
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printInfoExtra(arch, Inst::kIdVaddpd, InstOptions::kX86_ZMask, k1, zmm0, zmm1, zmm2);
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#endif
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}
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