diff --git a/src/app/test/genopcode.h b/src/app/test/genopcode.h index 16c6b65..408e858 100644 --- a/src/app/test/genopcode.h +++ b/src/app/test/genopcode.h @@ -13,7 +13,7 @@ namespace asmgen { -enum { kGenOpCodeInstCount = 2656 }; +enum { kGenOpCodeInstCount = 2670 }; // Generate all instructions asmjit can emit. static void opcode(asmjit::X86Assembler& a) { @@ -50,7 +50,9 @@ static void opcode(asmjit::X86Assembler& a) { // Base. a.adc(al, 1); + a.adc(ah, 1); a.adc(bl, 1); + a.adc(bh, 1); a.adc(ax, 1); a.adc(bx, 1); a.adc(eax, 1); @@ -61,7 +63,9 @@ static void opcode(asmjit::X86Assembler& a) { a.adc(intptr_gp0, gp1); a.adc(intptr_gp0, 0); a.add(al, 1); + a.add(ah, 1); a.add(bl, 1); + a.add(bh, 1); a.add(ax, 1); a.add(bx, 1); a.add(eax, 1); @@ -72,7 +76,9 @@ static void opcode(asmjit::X86Assembler& a) { a.add(intptr_gp0, gp1); a.add(intptr_gp0, 0); a.and_(al, 1); + a.and_(ah, 1); a.and_(bl, 1); + a.and_(bh, 1); a.and_(ax, 1); a.and_(bx, 1); a.and_(eax, 1); @@ -107,7 +113,9 @@ static void opcode(asmjit::X86Assembler& a) { a.cld(); a.cmc(); a.cmp(al, 1); + a.cmp(ah, 1); a.cmp(bl, 1); + a.cmp(bh, 1); a.cmp(ax, 1); a.cmp(bx, 1); a.cmp(eax, 1); @@ -158,7 +166,9 @@ static void opcode(asmjit::X86Assembler& a) { a.not_(gp0); a.not_(intptr_gp0); a.or_(al, 1); + a.or_(ah, 1); a.or_(bl, 1); + a.or_(bh, 1); a.or_(ax, 1); a.or_(bx, 1); a.or_(eax, 1); @@ -202,7 +212,9 @@ static void opcode(asmjit::X86Assembler& a) { a.ror(intptr_gp0, 0); a.ror(intptr_gp0, 1); a.sbb(al, 1); + a.sbb(ah, 1); a.sbb(bl, 1); + a.sbb(bh, 1); a.sbb(ax, 1); a.sbb(bx, 1); a.sbb(eax, 1); @@ -247,7 +259,9 @@ static void opcode(asmjit::X86Assembler& a) { a.stc(); a.std(); a.sub(al, 1); + a.sub(ah, 1); a.sub(bl, 1); + a.sub(bh, 1); a.sub(ax, 1); a.sub(bx, 1); a.sub(eax, 1); @@ -268,7 +282,9 @@ static void opcode(asmjit::X86Assembler& a) { a.xchg(intptr_gp0, gp1); a.xchg(gp0, intptr_gp1); a.xor_(al, 1); + a.xor_(ah, 1); a.xor_(bl, 1); + a.xor_(bh, 1); a.xor_(ax, 1); a.xor_(bx, 1); a.xor_(eax, 1); diff --git a/src/asmjit/x86/x86assembler.cpp b/src/asmjit/x86/x86assembler.cpp index b100c99..f402264 100644 --- a/src/asmjit/x86/x86assembler.cpp +++ b/src/asmjit/x86/x86assembler.cpp @@ -1192,7 +1192,7 @@ _Prepare: case kX86InstEncodingIdX86Arith: if (encoded == ENC_OPS(Reg, Reg, None)) { - opCode +=(o0->getSize() != 1) + 2; + opCode += (o0->getSize() != 1) + 2; ADD_66H_P_BY_SIZE(o0->getSize()); ADD_REX_W_BY_SIZE(o0->getSize()); @@ -1202,7 +1202,7 @@ _Prepare: } if (encoded == ENC_OPS(Reg, Mem, None)) { - opCode +=(o0->getSize() != 1) + 2; + opCode += (o0->getSize() != 1) + 2; ADD_66H_P_BY_SIZE(o0->getSize()); ADD_REX_W_BY_SIZE(o0->getSize()); @@ -3480,7 +3480,7 @@ _EmitX86Op: if (Arch == kArchX64) { uint32_t rex = x86RexFromOpCodeAndOptions(opCode, options); - if (rex) { + if (rex & ~static_cast(_kX86InstOptionNoRex)) { rex |= kX86ByteRex; EMIT_BYTE(rex); @@ -3508,7 +3508,7 @@ _EmitX86OpWithOpReg: rex += (opReg >> 3); // Rex.B (0x01). - if (rex) { + if (rex & ~static_cast(_kX86InstOptionNoRex)) { rex |= kX86ByteRex; opReg &= 0x7; EMIT_BYTE(rex); @@ -3539,7 +3539,7 @@ _EmitX86R: rex += static_cast(opReg & 0x08) >> 1; // Rex.R (0x04). rex += static_cast(rmReg) >> 3; // Rex.B (0x01). - if (rex) { + if (rex & ~static_cast(_kX86InstOptionNoRex)) { rex |= kX86ByteRex; opReg &= 0x7; rmReg &= 0x7; @@ -3597,7 +3597,7 @@ _EmitX86M: rex += static_cast(mIndex - 8 < 8) << 1; // Rex.X (0x02). rex += static_cast(mBase - 8 < 8); // Rex.B (0x01). - if (rex) { + if (rex & ~static_cast(_kX86InstOptionNoRex)) { rex |= kX86ByteRex; opReg &= 0x7; EMIT_BYTE(rex); diff --git a/src/asmjit/x86/x86operand.h b/src/asmjit/x86/x86operand.h index 1faed37..124cd6f 100644 --- a/src/asmjit/x86/x86operand.h +++ b/src/asmjit/x86/x86operand.h @@ -666,7 +666,7 @@ struct X86Reg : public Reg { //! Get whether the register is Gp register. ASMJIT_INLINE bool isGp() const { return _vreg.type <= kX86RegTypeGpq; } //! Get whether the register is Gp byte (8-bit) register. - ASMJIT_INLINE bool isGpb() const { return _vreg.type <= kX86RegTypeGpbHi; } + ASMJIT_INLINE bool isGpb() const { return _vreg.type <= _kX86RegTypePatchedGpbHi; } //! Get whether the register is Gp lo-byte (8-bit) register. ASMJIT_INLINE bool isGpbLo() const { return _vreg.type == kX86RegTypeGpbLo; } //! Get whether the register is Gp hi-byte (8-bit) register.