mirror of
https://github.com/asmjit/asmjit.git
synced 2025-12-18 13:04:36 +03:00
[abi] AsmJit v1.18 - performance and memory footprint improvements
* Refactored the whole codebase to use snake_case convention to
name functions and variables, including member variables.
Class naming is unchanged and each starts with upper-case
character. The intention of this change is to make the source
code more readable and consistent across multiple projects
where AsmJit is currently used.
* Refactored support.h to make it more shareable across projects.
* x86::Vec now inherits from UniVec
* minor changes in JitAllocator and WriteScope in order to make
the size of WriteScope smaller
* added ZoneStatistics and Zone::statistics() getter
* improved x86::EmitHelper to use tables instead of choose() and
other mechanisms to pick between SSE and AVX instructions
* Refactored the whole codebase to use snake_case convention for
for functions names, function parameter names, struct members,
and variables
* Added a non-owning asmjit::Span<T> type and use into public API
to hide the usage of ZoneVector in CodeHolder, Builder, and
Compiler. Users now only get Span (with data and size), which
doesn't require users to know about ZoneVector
* Removed RAWorkId from RATiedReg in favor of RAWorkReg*
* Removed GEN from LiveInfo as it's not needed by CFG construction
to save memory (GEN was merged with LIVE-IN bits). The remaining
LIVE-IN, LIVE-OUT, and KILL bits are enough, however KILL bits may
be removed in the future as KILL bits are not needed after LIVE-IN
and LIVE-OUT converged
* Optimized the representation of LIVE-IN, LIVE-OUT, and KILL bits
per block. Now only registers that live across multiple basic
blocks are included here, which means that virtual registers that
only live in a single block are not included and won't be overhead
during liveness analysis. This optimization alone can make liveness
analysis 90% faster depending on the code generated (more virtual
registers that only live in a single basic block -> more gains)
* Optimized building liveness information bits per block. The new
code uses an optimized algorithm to prevent too many traversals
and uses a more optimized code for a case in which not too many
registers are used (it avoids array operations if the number of
all virtual registers within the function fits a single BitWord)
* Optimized code that computes which virtual register is only used
in a single basic block - this aims to optimize register allocator
in the future by using a designed code path for allocating regs
only used in a single basic block
* Reduced the information required for each live-span, which is used
by bin-packing. Now the struct is 8 bytes, which is good for a lot
of optimizations C++ compiler can do
* Added UniCompiler (ujit) which can be used to share code paths
between X86, X86_64, and AArch64 code generation (experimental).
This commit is contained in:
@@ -17,12 +17,12 @@
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using namespace asmjit;
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#define TEST_INSTRUCTION(OPCODE, ...) \
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tester.testValidInstruction(#__VA_ARGS__, OPCODE, tester.assembler.__VA_ARGS__)
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tester.test_valid_instruction(#__VA_ARGS__, OPCODE, tester.assembler.__VA_ARGS__)
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#define FAIL_INSTRUCTION(ExpectedError, ...) \
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tester.testInvalidInstruction(#__VA_ARGS__, ExpectedError, tester.assembler.__VA_ARGS__)
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tester.test_invalid_instruction(#__VA_ARGS__, ExpectedError, tester.assembler.__VA_ARGS__)
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static void ASMJIT_NOINLINE testX86AssemblerBase(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_base(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("37" , aaa(ax));
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@@ -1166,7 +1166,7 @@ static void ASMJIT_NOINLINE testX86AssemblerBase(AssemblerTester<x86::Assembler>
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TEST_INSTRUCTION("338C1A80000000" , xor_(ecx, dword_ptr(edx, ebx, 0, 128)));
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}
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static void ASMJIT_NOINLINE testX86AssemblerBaseExt(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_base_ext(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("0F38FC9C1180000000" , aadd(ptr(ecx, edx, 0, 128), ebx));
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@@ -1454,7 +1454,7 @@ static void ASMJIT_NOINLINE testX86AssemblerBaseExt(AssemblerTester<x86::Assembl
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TEST_INSTRUCTION("0F01D6" , xtest());
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}
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static void ASMJIT_NOINLINE testX86AssemblerMMX_SSE(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_mmx_sse(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("660F58CA" , addpd(xmm1, xmm2));
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@@ -2578,7 +2578,7 @@ static void ASMJIT_NOINLINE testX86AssemblerMMX_SSE(AssemblerTester<x86::Assembl
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TEST_INSTRUCTION("0F578C1A80000000" , xorps(xmm1, xmmword_ptr(edx, ebx, 0, 128)));
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C5E958CB" , vaddpd(xmm1, xmm2, xmm3));
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@@ -4107,7 +4107,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX(AssemblerTester<x86::Assembler>&
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TEST_INSTRUCTION("C5F877" , vzeroupper());
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX_NE_CONVERT(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx_ne_convert(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C4E27AB18C1A80000000" , vbcstnebf162ps(xmm1, ptr(edx, ebx, 0, 128)));
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@@ -4140,7 +4140,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX_NE_CONVERT(AssemblerTester<x86::
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TEST_INSTRUCTION("C4E27E728C1A80000000" , vex().vcvtneps2bf16(xmm1, ymmword_ptr(edx, ebx, 0, 128)));
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX_VNNI(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx_vnni(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C4E25150F4" , vex().vpdpbusd(xmm6, xmm5, xmm4));
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@@ -4153,7 +4153,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX_VNNI(AssemblerTester<x86::Assemb
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TEST_INSTRUCTION("C4E25553F4" , vex().vpdpwssds(ymm6, ymm5, ymm4));
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX_VNNI_INT8(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx_vnni_int8(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C4E26B50CB" , vpdpbssd(xmm1, xmm2, xmm3));
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@@ -4194,7 +4194,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX_VNNI_INT8(AssemblerTester<x86::A
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TEST_INSTRUCTION("C4E26C518C2B80000000" , vpdpbuuds(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128)));
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX_VNNI_INT16(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx_vnni_int16(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C4E26AD2CB" , vpdpwsud(xmm1, xmm2, xmm3));
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@@ -4235,7 +4235,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX_VNNI_INT16(AssemblerTester<x86::
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TEST_INSTRUCTION("C4E26CD38C2B80000000" , vpdpwuuds(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128)));
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX_SHA512(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx_sha512(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C4E27FCCCA" , vsha512msg1(ymm1, xmm2));
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@@ -4243,7 +4243,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX_SHA512(AssemblerTester<x86::Asse
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TEST_INSTRUCTION("C4E26FCBCB" , vsha512rnds2(ymm1, ymm2, xmm3));
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX_SM3(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx_sm3(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C4E268DACB" , vsm3msg1(xmm1, xmm2, xmm3));
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@@ -4257,7 +4257,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX_SM3(AssemblerTester<x86::Assembl
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TEST_INSTRUCTION("C4E369DE8C2B8000000001" , vsm3rnds2(xmm1, xmm2, xmmword_ptr(ebx, ebp, 0, 128), 1));
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX_SM4(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx_sm4(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C4E26ADACB" , vsm4key4(xmm1, xmm2, xmm3));
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@@ -4274,7 +4274,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX_SM4(AssemblerTester<x86::Assembl
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TEST_INSTRUCTION("C4E26FDA8C2B80000000" , vsm4rnds4(ymm1, ymm2, ymmword_ptr(ebx, ebp, 0, 128)));
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}
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static void ASMJIT_NOINLINE testX86AssemblerFMA(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_fma(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C4E2E998CB" , vfmadd132pd(xmm1, xmm2, xmm3));
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@@ -4567,7 +4567,7 @@ static void ASMJIT_NOINLINE testX86AssemblerFMA(AssemblerTester<x86::Assembler>&
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TEST_INSTRUCTION("C4E269BF8C2B80000000" , vfnmsub231ss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128)));
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}
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static void ASMJIT_NOINLINE testX86AssemblerFMA4(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_fma4(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C4E3E969CC30" , vfmaddpd(xmm1, xmm2, xmm3, xmm4));
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@@ -4732,7 +4732,7 @@ static void ASMJIT_NOINLINE testX86AssemblerFMA4(AssemblerTester<x86::Assembler>
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TEST_INSTRUCTION("C4E3697E8C2B8000000060" , vfnmsubss(xmm1, xmm2, dword_ptr(ebx, ebp, 0, 128), xmm6));
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}
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static void ASMJIT_NOINLINE testX86AssemblerXOP(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_xop(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("8FE97881CA" , vfrczpd(xmm1, xmm2));
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@@ -4947,7 +4947,7 @@ static void ASMJIT_NOINLINE testX86AssemblerXOP(AssemblerTester<x86::Assembler>&
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TEST_INSTRUCTION("8FE958958C1A80000000" , vpshlw(xmm1, xmmword_ptr(edx, ebx, 0, 128), xmm4));
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX512(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx512(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("C5ED4ACB" , kaddb(k1, k2, k3));
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@@ -7680,7 +7680,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX512(AssemblerTester<x86::Assemble
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TEST_INSTRUCTION("62F16C48574C2B02" , vxorps(zmm1, zmm2, zmmword_ptr(ebx, ebp, 0, 128)));
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}
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static void ASMJIT_NOINLINE testX86AssemblerAVX512_FP16(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_avx512_FP16(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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TEST_INSTRUCTION("62F5560810F4" , vmovsh(xmm6, xmm5, xmm4));
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@@ -8324,7 +8324,7 @@ static void ASMJIT_NOINLINE testX86AssemblerAVX512_FP16(AssemblerTester<x86::Ass
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TEST_INSTRUCTION("62F6568FD77280" , k(k7).z().vfmulcsh(xmm6, xmm5, dword_ptr(edx, -512)));
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}
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static void ASMJIT_NOINLINE testX86AssemblerExtras(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_extra(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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// Extended X86 tests.
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@@ -8447,7 +8447,7 @@ static void ASMJIT_NOINLINE testX86AssemblerExtras(AssemblerTester<x86::Assemble
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/*
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// TODO: Failures can be enabled once the assembler always validates.
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static void ASMJIT_NOINLINE testX86AssemblerFailures(AssemblerTester<x86::Assembler>& tester) noexcept {
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static void ASMJIT_NOINLINE test_x86_assembler_failures(AssemblerTester<x86::Assembler>& tester) noexcept {
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using namespace x86;
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FAIL_INSTRUCTION(kErrorInvalidInstruction , movs(byte_ptr(eax), byte_ptr(esi)));
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@@ -8456,34 +8456,34 @@ static void ASMJIT_NOINLINE testX86AssemblerFailures(AssemblerTester<x86::Assemb
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}
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*/
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bool testX86Assembler(const TestSettings& settings) noexcept {
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bool test_x86_assembler(const TestSettings& settings) noexcept {
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using namespace x86;
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AssemblerTester<Assembler> tester(Arch::kX86, settings);
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tester.printHeader("X86");
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tester.print_header("X86");
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testX86AssemblerBase(tester);
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testX86AssemblerBaseExt(tester);
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testX86AssemblerMMX_SSE(tester);
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testX86AssemblerAVX(tester);
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testX86AssemblerAVX_NE_CONVERT(tester);
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testX86AssemblerAVX_VNNI(tester);
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testX86AssemblerAVX_VNNI_INT8(tester);
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testX86AssemblerAVX_VNNI_INT16(tester);
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testX86AssemblerAVX_SHA512(tester);
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testX86AssemblerAVX_SM3(tester);
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testX86AssemblerAVX_SM4(tester);
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testX86AssemblerFMA(tester);
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testX86AssemblerFMA4(tester);
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testX86AssemblerXOP(tester);
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testX86AssemblerAVX512(tester);
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testX86AssemblerAVX512_FP16(tester);
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testX86AssemblerExtras(tester);
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test_x86_assembler_base(tester);
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test_x86_assembler_base_ext(tester);
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test_x86_assembler_mmx_sse(tester);
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test_x86_assembler_avx(tester);
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test_x86_assembler_avx_ne_convert(tester);
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test_x86_assembler_avx_vnni(tester);
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test_x86_assembler_avx_vnni_int8(tester);
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test_x86_assembler_avx_vnni_int16(tester);
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test_x86_assembler_avx_sha512(tester);
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test_x86_assembler_avx_sm3(tester);
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test_x86_assembler_avx_sm4(tester);
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test_x86_assembler_fma(tester);
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test_x86_assembler_fma4(tester);
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test_x86_assembler_xop(tester);
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test_x86_assembler_avx512(tester);
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test_x86_assembler_avx512_FP16(tester);
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test_x86_assembler_extra(tester);
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// testX86AssemblerFailures(tester);
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// test_x86_assembler_failures(tester);
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tester.printSummary();
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return tester.didPass();
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tester.print_summary();
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return tester.did_pass();
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}
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#undef FAIL_INSTRUCTION
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