diff --git a/CMakeLists.txt b/CMakeLists.txt index 71a402d..1939d51 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -263,6 +263,8 @@ AsmJit_AddSource(ASMJIT_SRC asmjit/x86 x86inst.h x86operand.cpp x86operand.h + x86regs.cpp + x86regs.h x86util.cpp x86util.h ) diff --git a/src/asmjit/base/operand.h b/src/asmjit/base/operand.h index 8caec88..3dd11b3 100644 --- a/src/asmjit/base/operand.h +++ b/src/asmjit/base/operand.h @@ -180,6 +180,19 @@ struct Operand { // [Structs] // -------------------------------------------------------------------------- + // \internal + // + // Register operand structure, allows to do register initialization at + // compile time instead of doing it "non-deterministically" at runtime. + struct InitRegOp { + uint8_t op; + uint8_t size; + uint16_t code; + uint32_t id; + uint32_t vType; + uint32_t vUnused; + }; + //! \internal //! //! Base operand data. @@ -538,11 +551,13 @@ struct BaseReg : public Operand { //! Create a dummy base register. ASMJIT_INLINE BaseReg() : Operand(NoInit) { _init_packed_op_sz_w0_id(kOperandTypeReg, 0, (kInvalidReg << 8) + kInvalidReg, kInvalidValue); + _init_packed_d2_d3(kVarTypeInvalid, 0); } //! Create a new base register. ASMJIT_INLINE BaseReg(uint32_t type, uint32_t index, uint32_t size) : Operand(NoInit) { _init_packed_op_sz_w0_id(kOperandTypeReg, size, (type << 8) + index, kInvalidValue); + _init_packed_d2_d3(kVarTypeInvalid, 0); } //! Create a new reference to `other`. diff --git a/src/asmjit/x86.h b/src/asmjit/x86.h index d47614f..936bb95 100644 --- a/src/asmjit/x86.h +++ b/src/asmjit/x86.h @@ -17,6 +17,7 @@ #include "x86/x86func.h" #include "x86/x86inst.h" #include "x86/x86operand.h" +#include "x86/x86regs.h" #include "x86/x86util.h" // [Guard] diff --git a/src/asmjit/x86/x86assembler.h b/src/asmjit/x86/x86assembler.h index 4d93d63..d6146a4 100644 --- a/src/asmjit/x86/x86assembler.h +++ b/src/asmjit/x86/x86assembler.h @@ -12,6 +12,7 @@ #include "../base/assembler.h" #include "../x86/x86inst.h" #include "../x86/x86operand.h" +#include "../x86/x86regs.h" #include "../x86/x86util.h" // [Api-Begin] diff --git a/src/asmjit/x86/x86operand.cpp b/src/asmjit/x86/x86operand.cpp index 21f11f2..76b6bf1 100644 --- a/src/asmjit/x86/x86operand.cpp +++ b/src/asmjit/x86/x86operand.cpp @@ -54,144 +54,6 @@ const VarInfo _varInfo[] = { #undef D #undef C -// ============================================================================ -// [asmjit::x86x64::Registers] -// ============================================================================ - -const GpReg noGpReg(kInvalidReg, kInvalidReg, 0); - -const GpReg al(kRegTypeGpbLo, kRegIndexAx, 1); -const GpReg cl(kRegTypeGpbLo, kRegIndexCx, 1); -const GpReg dl(kRegTypeGpbLo, kRegIndexDx, 1); -const GpReg bl(kRegTypeGpbLo, kRegIndexBx, 1); -const GpReg spl(kRegTypeGpbLo, kRegIndexSp, 1); -const GpReg bpl(kRegTypeGpbLo, kRegIndexBp, 1); -const GpReg sil(kRegTypeGpbLo, kRegIndexSi, 1); -const GpReg dil(kRegTypeGpbLo, kRegIndexDi, 1); -const GpReg r8b(kRegTypeGpbLo, 8, 1); -const GpReg r9b(kRegTypeGpbLo, 9, 1); -const GpReg r10b(kRegTypeGpbLo, 10, 1); -const GpReg r11b(kRegTypeGpbLo, 11, 1); -const GpReg r12b(kRegTypeGpbLo, 12, 1); -const GpReg r13b(kRegTypeGpbLo, 13, 1); -const GpReg r14b(kRegTypeGpbLo, 14, 1); -const GpReg r15b(kRegTypeGpbLo, 15, 1); - -const GpReg ah(kRegTypeGpbHi, kRegIndexAx, 1); -const GpReg ch(kRegTypeGpbHi, kRegIndexCx, 1); -const GpReg dh(kRegTypeGpbHi, kRegIndexDx, 1); -const GpReg bh(kRegTypeGpbHi, kRegIndexBx, 1); - -const GpReg ax(kRegTypeGpw, kRegIndexAx, 2); -const GpReg cx(kRegTypeGpw, kRegIndexCx, 2); -const GpReg dx(kRegTypeGpw, kRegIndexDx, 2); -const GpReg bx(kRegTypeGpw, kRegIndexBx, 2); -const GpReg sp(kRegTypeGpw, kRegIndexSp, 2); -const GpReg bp(kRegTypeGpw, kRegIndexBp, 2); -const GpReg si(kRegTypeGpw, kRegIndexSi, 2); -const GpReg di(kRegTypeGpw, kRegIndexDi, 2); -const GpReg r8w(kRegTypeGpw, 8, 2); -const GpReg r9w(kRegTypeGpw, 9, 2); -const GpReg r10w(kRegTypeGpw, 10, 2); -const GpReg r11w(kRegTypeGpw, 11, 2); -const GpReg r12w(kRegTypeGpw, 12, 2); -const GpReg r13w(kRegTypeGpw, 13, 2); -const GpReg r14w(kRegTypeGpw, 14, 2); -const GpReg r15w(kRegTypeGpw, 15, 2); - -const GpReg eax(kRegTypeGpd, kRegIndexAx, 4); -const GpReg ecx(kRegTypeGpd, kRegIndexCx, 4); -const GpReg edx(kRegTypeGpd, kRegIndexDx, 4); -const GpReg ebx(kRegTypeGpd, kRegIndexBx, 4); -const GpReg esp(kRegTypeGpd, kRegIndexSp, 4); -const GpReg ebp(kRegTypeGpd, kRegIndexBp, 4); -const GpReg esi(kRegTypeGpd, kRegIndexSi, 4); -const GpReg edi(kRegTypeGpd, kRegIndexDi, 4); -const GpReg r8d(kRegTypeGpd, 8, 4); -const GpReg r9d(kRegTypeGpd, 9, 4); -const GpReg r10d(kRegTypeGpd, 10, 4); -const GpReg r11d(kRegTypeGpd, 11, 4); -const GpReg r12d(kRegTypeGpd, 12, 4); -const GpReg r13d(kRegTypeGpd, 13, 4); -const GpReg r14d(kRegTypeGpd, 14, 4); -const GpReg r15d(kRegTypeGpd, 15, 4); - -const GpReg rax(kRegTypeGpq, kRegIndexAx, 8); -const GpReg rcx(kRegTypeGpq, kRegIndexCx, 8); -const GpReg rdx(kRegTypeGpq, kRegIndexDx, 8); -const GpReg rbx(kRegTypeGpq, kRegIndexBx, 8); -const GpReg rsp(kRegTypeGpq, kRegIndexSp, 8); -const GpReg rbp(kRegTypeGpq, kRegIndexBp, 8); -const GpReg rsi(kRegTypeGpq, kRegIndexSi, 8); -const GpReg rdi(kRegTypeGpq, kRegIndexDi, 8); -const GpReg r8(kRegTypeGpq, 8, 8); -const GpReg r9(kRegTypeGpq, 9, 8); -const GpReg r10(kRegTypeGpq, 10, 8); -const GpReg r11(kRegTypeGpq, 11, 8); -const GpReg r12(kRegTypeGpq, 12, 8); -const GpReg r13(kRegTypeGpq, 13, 8); -const GpReg r14(kRegTypeGpq, 14, 8); -const GpReg r15(kRegTypeGpq, 15, 8); - -const FpReg fp0(kRegTypeFp, 0, 10); -const FpReg fp1(kRegTypeFp, 1, 10); -const FpReg fp2(kRegTypeFp, 2, 10); -const FpReg fp3(kRegTypeFp, 3, 10); -const FpReg fp4(kRegTypeFp, 4, 10); -const FpReg fp5(kRegTypeFp, 5, 10); -const FpReg fp6(kRegTypeFp, 6, 10); -const FpReg fp7(kRegTypeFp, 7, 10); - -const MmReg mm0(kRegTypeMm, 0, 8); -const MmReg mm1(kRegTypeMm, 1, 8); -const MmReg mm2(kRegTypeMm, 2, 8); -const MmReg mm3(kRegTypeMm, 3, 8); -const MmReg mm4(kRegTypeMm, 4, 8); -const MmReg mm5(kRegTypeMm, 5, 8); -const MmReg mm6(kRegTypeMm, 6, 8); -const MmReg mm7(kRegTypeMm, 7, 8); - -const XmmReg xmm0(kRegTypeXmm, 0, 16); -const XmmReg xmm1(kRegTypeXmm, 1, 16); -const XmmReg xmm2(kRegTypeXmm, 2, 16); -const XmmReg xmm3(kRegTypeXmm, 3, 16); -const XmmReg xmm4(kRegTypeXmm, 4, 16); -const XmmReg xmm5(kRegTypeXmm, 5, 16); -const XmmReg xmm6(kRegTypeXmm, 6, 16); -const XmmReg xmm7(kRegTypeXmm, 7, 16); -const XmmReg xmm8(kRegTypeXmm, 8, 16); -const XmmReg xmm9(kRegTypeXmm, 9, 16); -const XmmReg xmm10(kRegTypeXmm, 10, 16); -const XmmReg xmm11(kRegTypeXmm, 11, 16); -const XmmReg xmm12(kRegTypeXmm, 12, 16); -const XmmReg xmm13(kRegTypeXmm, 13, 16); -const XmmReg xmm14(kRegTypeXmm, 14, 16); -const XmmReg xmm15(kRegTypeXmm, 15, 16); - -const YmmReg ymm0(kRegTypeYmm, 0, 32); -const YmmReg ymm1(kRegTypeYmm, 1, 32); -const YmmReg ymm2(kRegTypeYmm, 2, 32); -const YmmReg ymm3(kRegTypeYmm, 3, 32); -const YmmReg ymm4(kRegTypeYmm, 4, 32); -const YmmReg ymm5(kRegTypeYmm, 5, 32); -const YmmReg ymm6(kRegTypeYmm, 6, 32); -const YmmReg ymm7(kRegTypeYmm, 7, 32); -const YmmReg ymm8(kRegTypeYmm, 8, 32); -const YmmReg ymm9(kRegTypeYmm, 9, 32); -const YmmReg ymm10(kRegTypeYmm, 10, 32); -const YmmReg ymm11(kRegTypeYmm, 11, 32); -const YmmReg ymm12(kRegTypeYmm, 12, 32); -const YmmReg ymm13(kRegTypeYmm, 13, 32); -const YmmReg ymm14(kRegTypeYmm, 14, 32); -const YmmReg ymm15(kRegTypeYmm, 15, 32); - -const SegReg cs(kRegTypeSeg, kSegCs, 2); -const SegReg ss(kRegTypeSeg, kSegSs, 2); -const SegReg ds(kRegTypeSeg, kSegDs, 2); -const SegReg es(kRegTypeSeg, kSegEs, 2); -const SegReg fs(kRegTypeSeg, kSegFs, 2); -const SegReg gs(kRegTypeSeg, kSegGs, 2); - // ============================================================================ // [asmjit::Mem - abs[]] // ============================================================================ @@ -272,15 +134,6 @@ const uint8_t _varMapping[kVarTypeCount] = { /* 20: kVarTypeYmmPd */ kVarTypeYmmPd }; -const GpReg zax(kRegTypeGpd, kRegIndexAx, 4); -const GpReg zcx(kRegTypeGpd, kRegIndexCx, 4); -const GpReg zdx(kRegTypeGpd, kRegIndexDx, 4); -const GpReg zbx(kRegTypeGpd, kRegIndexBx, 4); -const GpReg zsp(kRegTypeGpd, kRegIndexSp, 4); -const GpReg zbp(kRegTypeGpd, kRegIndexBp, 4); -const GpReg zsi(kRegTypeGpd, kRegIndexSi, 4); -const GpReg zdi(kRegTypeGpd, kRegIndexDi, 4); - } // x86 namespace } // asmjit namespace @@ -318,15 +171,6 @@ const uint8_t _varMapping[kVarTypeCount] = { /* 20: kVarTypeYmmPd */ kVarTypeYmmPd }; -const GpReg zax(kRegTypeGpq, kRegIndexAx, 8); -const GpReg zcx(kRegTypeGpq, kRegIndexCx, 8); -const GpReg zdx(kRegTypeGpq, kRegIndexDx, 8); -const GpReg zbx(kRegTypeGpq, kRegIndexBx, 8); -const GpReg zsp(kRegTypeGpq, kRegIndexSp, 8); -const GpReg zbp(kRegTypeGpq, kRegIndexBp, 8); -const GpReg zsi(kRegTypeGpq, kRegIndexSi, 8); -const GpReg zdi(kRegTypeGpq, kRegIndexDi, 8); - } // x64 namespace } // asmjit namespace diff --git a/src/asmjit/x86/x86operand.h b/src/asmjit/x86/x86operand.h index 8a54efe..46765d4 100644 --- a/src/asmjit/x86/x86operand.h +++ b/src/asmjit/x86/x86operand.h @@ -15,6 +15,7 @@ #include "../base/intutil.h" #include "../base/operand.h" #include "../base/vectypes.h" +#include "../x86/x86regs.h" // [Api-Begin] #include "../apibegin.h" @@ -63,144 +64,6 @@ typedef Vec256Data YmmData; //! \internal ASMJIT_VAR const VarInfo _varInfo[]; -// ============================================================================ -// [asmjit::x86x64::kRegClass] -// ============================================================================ - -//! X86/X64 variable class. -ASMJIT_ENUM(kRegClass) { - // kRegClassGp defined earlier. - - //! X86/X64 Fp register class. - kRegClassFp = 1, - //! X86/X64 Mm register class. - kRegClassMm = 2, - //! X86/X64 Xmm/Ymm/Zmm register class. - kRegClassXyz = 3, - - //! Count of X86/X64 register classes. - kRegClassCount = 4 -}; - -// ============================================================================ -// [asmjit::x86x64::kRegCount] -// ============================================================================ - -//! X86/X64 registers count. -ASMJIT_ENUM(kRegCount) { - //! Count of Fp registers (8). - kRegCountFp = 8, - //! Count of Mm registers (8). - kRegCountMm = 8, - //! Count of segment registers (6). - kRegCountSeg = 6 -}; - -// ============================================================================ -// [asmjit::x86x64::kRegType] -// ============================================================================ - -//! X86/X64 register type. -ASMJIT_ENUM(kRegType) { - //! Gpb-lo register (AL, BL, CL, DL, ...). - kRegTypeGpbLo = 0x01, - //! Gpb-hi register (AH, BH, CH, DH only). - kRegTypeGpbHi = 0x02, - - //! \internal - //! - //! Gpb-hi register patched to native index (4-7). - kRegTypePatchedGpbHi = kRegTypeGpbLo | kRegTypeGpbHi, - - //! Gpw register. - kRegTypeGpw = 0x10, - //! Gpd register. - kRegTypeGpd = 0x20, - //! Gpq register. - kRegTypeGpq = 0x30, - - //! Fp register. - kRegTypeFp = 0x50, - //! Mm register. - kRegTypeMm = 0x60, - - //! Xmm register. - kRegTypeXmm = 0x70, - //! Ymm register. - kRegTypeYmm = 0x80, - //! Zmm register. - kRegTypeZmm = 0x90, - - //! Segment register. - kRegTypeSeg = 0xF0 -}; - -// ============================================================================ -// [asmjit::x86x64::kRegIndex] -// ============================================================================ - -//! X86/X64 register indexes. -//! -//! \note Register indexes have been reduced to only support general purpose -//! registers. There is no need to have enumerations with number suffix that -//! expands to the exactly same value as the suffix value itself. -ASMJIT_ENUM(kRegIndex) { - //! Index of Al/Ah/Ax/Eax/Rax registers. - kRegIndexAx = 0, - //! Index of Cl/Ch/Cx/Ecx/Rcx registers. - kRegIndexCx = 1, - //! Index of Dl/Dh/Dx/Edx/Rdx registers. - kRegIndexDx = 2, - //! Index of Bl/Bh/Bx/Ebx/Rbx registers. - kRegIndexBx = 3, - //! Index of Spl/Sp/Esp/Rsp registers. - kRegIndexSp = 4, - //! Index of Bpl/Bp/Ebp/Rbp registers. - kRegIndexBp = 5, - //! Index of Sil/Si/Esi/Rsi registers. - kRegIndexSi = 6, - //! Index of Dil/Di/Edi/Rdi registers. - kRegIndexDi = 7, - //! Index of R8b/R8w/R8d/R8 registers (64-bit only). - kRegIndexR8 = 8, - //! Index of R9B/R9w/R9d/R9 registers (64-bit only). - kRegIndexR9 = 9, - //! Index of R10B/R10w/R10D/R10 registers (64-bit only). - kRegIndexR10 = 10, - //! Index of R11B/R11w/R11d/R11 registers (64-bit only). - kRegIndexR11 = 11, - //! Index of R12B/R12w/R12d/R12 registers (64-bit only). - kRegIndexR12 = 12, - //! Index of R13B/R13w/R13d/R13 registers (64-bit only). - kRegIndexR13 = 13, - //! Index of R14B/R14w/R14d/R14 registers (64-bit only). - kRegIndexR14 = 14, - //! Index of R15B/R15w/R15d/R15 registers (64-bit only). - kRegIndexR15 = 15 -}; - -// ============================================================================ -// [asmjit::x86x64::kSeg] -// ============================================================================ - -//! X86/X64 segment codes. -ASMJIT_ENUM(kSeg) { - //! No segment. - kSegDefault = 0, - //! Es segment. - kSegEs = 1, - //! Cs segment. - kSegCs = 2, - //! Ss segment. - kSegSs = 3, - //! Ds segment. - kSegDs = 4, - //! Fs segment. - kSegFs = 5, - //! Gs segment. - kSegGs = 6 -}; - // ============================================================================ // [asmjit::x86x64::kMemVSib] // ============================================================================ @@ -1438,141 +1301,6 @@ struct YmmVar : public X86Var { // [asmjit::x86x64::Registers] // ============================================================================ -//! No Gp register, can be used only within `Mem` operand. -ASMJIT_VAR const GpReg noGpReg; - -ASMJIT_VAR const GpReg al; //!< 8-bit Gpb-lo register. -ASMJIT_VAR const GpReg cl; //!< 8-bit Gpb-lo register. -ASMJIT_VAR const GpReg dl; //!< 8-bit Gpb-lo register. -ASMJIT_VAR const GpReg bl; //!< 8-bit Gpb-lo register. -ASMJIT_VAR const GpReg spl; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg bpl; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg sil; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg dil; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg r8b; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg r9b; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg r10b; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg r11b; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg r12b; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg r13b; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg r14b; //!< 8-bit Gpb-lo register (X64). -ASMJIT_VAR const GpReg r15b; //!< 8-bit Gpb-lo register (X64). - -ASMJIT_VAR const GpReg ah; //!< 8-bit Gpb-hi register. -ASMJIT_VAR const GpReg ch; //!< 8-bit Gpb-hi register. -ASMJIT_VAR const GpReg dh; //!< 8-bit Gpb-hi register. -ASMJIT_VAR const GpReg bh; //!< 8-bit Gpb-hi register. - -ASMJIT_VAR const GpReg ax; //!< 16-bit Gpw register. -ASMJIT_VAR const GpReg cx; //!< 16-bit Gpw register. -ASMJIT_VAR const GpReg dx; //!< 16-bit Gpw register. -ASMJIT_VAR const GpReg bx; //!< 16-bit Gpw register. -ASMJIT_VAR const GpReg sp; //!< 16-bit Gpw register. -ASMJIT_VAR const GpReg bp; //!< 16-bit Gpw register. -ASMJIT_VAR const GpReg si; //!< 16-bit Gpw register. -ASMJIT_VAR const GpReg di; //!< 16-bit Gpw register. -ASMJIT_VAR const GpReg r8w; //!< 16-bit Gpw register (X64). -ASMJIT_VAR const GpReg r9w; //!< 16-bit Gpw register (X64). -ASMJIT_VAR const GpReg r10w; //!< 16-bit Gpw register (X64). -ASMJIT_VAR const GpReg r11w; //!< 16-bit Gpw register (X64). -ASMJIT_VAR const GpReg r12w; //!< 16-bit Gpw register (X64). -ASMJIT_VAR const GpReg r13w; //!< 16-bit Gpw register (X64). -ASMJIT_VAR const GpReg r14w; //!< 16-bit Gpw register (X64). -ASMJIT_VAR const GpReg r15w; //!< 16-bit Gpw register (X64). - -ASMJIT_VAR const GpReg eax; //!< 32-bit Gpd register. -ASMJIT_VAR const GpReg ecx; //!< 32-bit Gpd register. -ASMJIT_VAR const GpReg edx; //!< 32-bit Gpd register. -ASMJIT_VAR const GpReg ebx; //!< 32-bit Gpd register. -ASMJIT_VAR const GpReg esp; //!< 32-bit Gpd register. -ASMJIT_VAR const GpReg ebp; //!< 32-bit Gpd register. -ASMJIT_VAR const GpReg esi; //!< 32-bit Gpd register. -ASMJIT_VAR const GpReg edi; //!< 32-bit Gpd register. -ASMJIT_VAR const GpReg r8d; //!< 32-bit Gpd register (X64). -ASMJIT_VAR const GpReg r9d; //!< 32-bit Gpd register (X64). -ASMJIT_VAR const GpReg r10d; //!< 32-bit Gpd register (X64). -ASMJIT_VAR const GpReg r11d; //!< 32-bit Gpd register (X64). -ASMJIT_VAR const GpReg r12d; //!< 32-bit Gpd register (X64). -ASMJIT_VAR const GpReg r13d; //!< 32-bit Gpd register (X64). -ASMJIT_VAR const GpReg r14d; //!< 32-bit Gpd register (X64). -ASMJIT_VAR const GpReg r15d; //!< 32-bit Gpd register (X64). - -ASMJIT_VAR const GpReg rax; //!< 64-bit Gpq register (X64). -ASMJIT_VAR const GpReg rcx; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg rdx; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg rbx; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg rsp; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg rbp; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg rsi; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg rdi; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg r8; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg r9; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg r10; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg r11; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg r12; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg r13; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg r14; //!< 64-bit Gpq register (X64) -ASMJIT_VAR const GpReg r15; //!< 64-bit Gpq register (X64) - -ASMJIT_VAR const FpReg fp0; //!< 80-bit Fp register. -ASMJIT_VAR const FpReg fp1; //!< 80-bit Fp register. -ASMJIT_VAR const FpReg fp2; //!< 80-bit Fp register. -ASMJIT_VAR const FpReg fp3; //!< 80-bit Fp register. -ASMJIT_VAR const FpReg fp4; //!< 80-bit Fp register. -ASMJIT_VAR const FpReg fp5; //!< 80-bit Fp register. -ASMJIT_VAR const FpReg fp6; //!< 80-bit Fp register. -ASMJIT_VAR const FpReg fp7; //!< 80-bit Fp register. - -ASMJIT_VAR const MmReg mm0; //!< 64-bit Mm register. -ASMJIT_VAR const MmReg mm1; //!< 64-bit Mm register. -ASMJIT_VAR const MmReg mm2; //!< 64-bit Mm register. -ASMJIT_VAR const MmReg mm3; //!< 64-bit Mm register. -ASMJIT_VAR const MmReg mm4; //!< 64-bit Mm register. -ASMJIT_VAR const MmReg mm5; //!< 64-bit Mm register. -ASMJIT_VAR const MmReg mm6; //!< 64-bit Mm register. -ASMJIT_VAR const MmReg mm7; //!< 64-bit Mm register. - -ASMJIT_VAR const XmmReg xmm0; //!< 128-bit Xmm register. -ASMJIT_VAR const XmmReg xmm1; //!< 128-bit Xmm register. -ASMJIT_VAR const XmmReg xmm2; //!< 128-bit Xmm register. -ASMJIT_VAR const XmmReg xmm3; //!< 128-bit Xmm register. -ASMJIT_VAR const XmmReg xmm4; //!< 128-bit Xmm register. -ASMJIT_VAR const XmmReg xmm5; //!< 128-bit Xmm register. -ASMJIT_VAR const XmmReg xmm6; //!< 128-bit Xmm register. -ASMJIT_VAR const XmmReg xmm7; //!< 128-bit Xmm register. -ASMJIT_VAR const XmmReg xmm8; //!< 128-bit Xmm register (X64). -ASMJIT_VAR const XmmReg xmm9; //!< 128-bit Xmm register (X64). -ASMJIT_VAR const XmmReg xmm10; //!< 128-bit Xmm register (X64). -ASMJIT_VAR const XmmReg xmm11; //!< 128-bit Xmm register (X64). -ASMJIT_VAR const XmmReg xmm12; //!< 128-bit Xmm register (X64). -ASMJIT_VAR const XmmReg xmm13; //!< 128-bit Xmm register (X64). -ASMJIT_VAR const XmmReg xmm14; //!< 128-bit Xmm register (X64). -ASMJIT_VAR const XmmReg xmm15; //!< 128-bit Xmm register (X64). - -ASMJIT_VAR const YmmReg ymm0; //!< 256-bit Ymm register. -ASMJIT_VAR const YmmReg ymm1; //!< 256-bit Ymm register. -ASMJIT_VAR const YmmReg ymm2; //!< 256-bit Ymm register. -ASMJIT_VAR const YmmReg ymm3; //!< 256-bit Ymm register. -ASMJIT_VAR const YmmReg ymm4; //!< 256-bit Ymm register. -ASMJIT_VAR const YmmReg ymm5; //!< 256-bit Ymm register. -ASMJIT_VAR const YmmReg ymm6; //!< 256-bit Ymm register. -ASMJIT_VAR const YmmReg ymm7; //!< 256-bit Ymm register. -ASMJIT_VAR const YmmReg ymm8; //!< 256-bit Ymm register (X64). -ASMJIT_VAR const YmmReg ymm9; //!< 256-bit Ymm register (X64). -ASMJIT_VAR const YmmReg ymm10; //!< 256-bit Ymm register (X64). -ASMJIT_VAR const YmmReg ymm11; //!< 256-bit Ymm register (X64). -ASMJIT_VAR const YmmReg ymm12; //!< 256-bit Ymm register (X64). -ASMJIT_VAR const YmmReg ymm13; //!< 256-bit Ymm register (X64). -ASMJIT_VAR const YmmReg ymm14; //!< 256-bit Ymm register (X64). -ASMJIT_VAR const YmmReg ymm15; //!< 256-bit Ymm register (X64). - -ASMJIT_VAR const SegReg cs; //!< Cs segment register. -ASMJIT_VAR const SegReg ss; //!< Ss segment register. -ASMJIT_VAR const SegReg ds; //!< Ds segment register. -ASMJIT_VAR const SegReg es; //!< Es segment register. -ASMJIT_VAR const SegReg fs; //!< Fs segment register. -ASMJIT_VAR const SegReg gs; //!< Gs segment register. - //! Make 8-bit Gpb-lo register operand. static ASMJIT_INLINE GpReg gpb_lo(uint32_t index) { return GpReg(kRegTypeGpbLo, index, 1); } //! Make 8-bit Gpb-hi register operand. @@ -1768,16 +1496,6 @@ using namespace ::asmjit::x86x64; //! \addtogroup asmjit_x86x64_general //! \{ -// ============================================================================ -// [asmjit::x86::kRegType] -// ============================================================================ - -//! \internal -ASMJIT_ENUM(kRegType) { - //! Gpd register. - kRegTypeGpz = kRegTypeGpd -}; - // ============================================================================ // [asmjit::x86::kRegCount] // ============================================================================ @@ -1813,23 +1531,6 @@ ASMJIT_VAR const uint8_t _varMapping[kVarTypeCount]; // [asmjit::x86::Registers] // ============================================================================ -//! Gpd register. -ASMJIT_VAR const GpReg zax; -//! Gpd register. -ASMJIT_VAR const GpReg zcx; -//! Gpd register. -ASMJIT_VAR const GpReg zdx; -//! Gpd register. -ASMJIT_VAR const GpReg zbx; -//! Gpd register. -ASMJIT_VAR const GpReg zsp; -//! Gpd register. -ASMJIT_VAR const GpReg zbp; -//! Gpd register. -ASMJIT_VAR const GpReg zsi; -//! Gpd register. -ASMJIT_VAR const GpReg zdi; - //! Get Gp qword register. static ASMJIT_INLINE GpReg gpz(uint32_t index) { return GpReg(kRegTypeGpd, index, 4); } @@ -1882,16 +1583,6 @@ using namespace ::asmjit::x86x64; //! \addtogroup asmjit_x86x64_general //! \{ -// ============================================================================ -// [asmjit::x64::kRegType] -// ============================================================================ - -//! \internal -ASMJIT_ENUM(kRegType) { - //! Gpq register. - kRegTypeGpz = kRegTypeGpq -}; - // ============================================================================ // [asmjit::x64::kRegCount] // ============================================================================ @@ -1925,23 +1616,6 @@ ASMJIT_VAR const uint8_t _varMapping[kVarTypeCount]; // [asmjit::x64::Registers] // ============================================================================ -//! Gpq register. -ASMJIT_VAR const GpReg zax; -//! Gpq register. -ASMJIT_VAR const GpReg zcx; -//! Gpq register. -ASMJIT_VAR const GpReg zdx; -//! Gpq register. -ASMJIT_VAR const GpReg zbx; -//! Gpq register. -ASMJIT_VAR const GpReg zsp; -//! Gpq register. -ASMJIT_VAR const GpReg zbp; -//! Gpq register. -ASMJIT_VAR const GpReg zsi; -//! Gpq register. -ASMJIT_VAR const GpReg zdi; - //! Get Gpq register. static ASMJIT_INLINE GpReg gpz(uint32_t index) { return GpReg(kRegTypeGpq, index, 8); } diff --git a/src/asmjit/x86/x86regs.cpp b/src/asmjit/x86/x86regs.cpp new file mode 100644 index 0000000..e2eb77e --- /dev/null +++ b/src/asmjit/x86/x86regs.cpp @@ -0,0 +1,216 @@ +// [AsmJit] +// Complete x86/x64 JIT and Remote Assembler for C++. +// +// [License] +// Zlib - See LICENSE.md file in the package. + +// [Export] +#define ASMJIT_EXPORTS +#define ASMJIT_REGS_INIT + +// [Guard] +#include "../build.h" +#if defined(ASMJIT_BUILD_X86) || defined(ASMJIT_BUILD_X64) + +// [Dependencies - AsmJit] +#include "../x86/x86regs.h" + +// [Api-Begin] +#include "../apibegin.h" + +#define DEFINE_REG(_Class_, _Name_, _Type_, _Index_, _Size_) \ + const _Class_ _Name_ = { { kOperandTypeReg, _Size_, ((_Type_) << 8) + _Index_, kInvalidValue, kVarTypeInvalid, 0 } } + +namespace asmjit { +namespace x86x64 { + +// ============================================================================ +// [asmjit::x86x64::Registers] +// ============================================================================ + +DEFINE_REG(GpReg, noGpReg, kInvalidReg, kInvalidReg, 0); + +DEFINE_REG(GpReg, al, kRegTypeGpbLo, kRegIndexAx, 1); +DEFINE_REG(GpReg, cl, kRegTypeGpbLo, kRegIndexCx, 1); +DEFINE_REG(GpReg, dl, kRegTypeGpbLo, kRegIndexDx, 1); +DEFINE_REG(GpReg, bl, kRegTypeGpbLo, kRegIndexBx, 1); +DEFINE_REG(GpReg, spl, kRegTypeGpbLo, kRegIndexSp, 1); +DEFINE_REG(GpReg, bpl, kRegTypeGpbLo, kRegIndexBp, 1); +DEFINE_REG(GpReg, sil, kRegTypeGpbLo, kRegIndexSi, 1); +DEFINE_REG(GpReg, dil, kRegTypeGpbLo, kRegIndexDi, 1); +DEFINE_REG(GpReg, r8b, kRegTypeGpbLo, 8, 1); +DEFINE_REG(GpReg, r9b, kRegTypeGpbLo, 9, 1); +DEFINE_REG(GpReg, r10b, kRegTypeGpbLo, 10, 1); +DEFINE_REG(GpReg, r11b, kRegTypeGpbLo, 11, 1); +DEFINE_REG(GpReg, r12b, kRegTypeGpbLo, 12, 1); +DEFINE_REG(GpReg, r13b, kRegTypeGpbLo, 13, 1); +DEFINE_REG(GpReg, r14b, kRegTypeGpbLo, 14, 1); +DEFINE_REG(GpReg, r15b, kRegTypeGpbLo, 15, 1); + +DEFINE_REG(GpReg, ah, kRegTypeGpbHi, kRegIndexAx, 1); +DEFINE_REG(GpReg, ch, kRegTypeGpbHi, kRegIndexCx, 1); +DEFINE_REG(GpReg, dh, kRegTypeGpbHi, kRegIndexDx, 1); +DEFINE_REG(GpReg, bh, kRegTypeGpbHi, kRegIndexBx, 1); + +DEFINE_REG(GpReg, ax, kRegTypeGpw, kRegIndexAx, 2); +DEFINE_REG(GpReg, cx, kRegTypeGpw, kRegIndexCx, 2); +DEFINE_REG(GpReg, dx, kRegTypeGpw, kRegIndexDx, 2); +DEFINE_REG(GpReg, bx, kRegTypeGpw, kRegIndexBx, 2); +DEFINE_REG(GpReg, sp, kRegTypeGpw, kRegIndexSp, 2); +DEFINE_REG(GpReg, bp, kRegTypeGpw, kRegIndexBp, 2); +DEFINE_REG(GpReg, si, kRegTypeGpw, kRegIndexSi, 2); +DEFINE_REG(GpReg, di, kRegTypeGpw, kRegIndexDi, 2); +DEFINE_REG(GpReg, r8w, kRegTypeGpw, 8, 2); +DEFINE_REG(GpReg, r9w, kRegTypeGpw, 9, 2); +DEFINE_REG(GpReg, r10w, kRegTypeGpw, 10, 2); +DEFINE_REG(GpReg, r11w, kRegTypeGpw, 11, 2); +DEFINE_REG(GpReg, r12w, kRegTypeGpw, 12, 2); +DEFINE_REG(GpReg, r13w, kRegTypeGpw, 13, 2); +DEFINE_REG(GpReg, r14w, kRegTypeGpw, 14, 2); +DEFINE_REG(GpReg, r15w, kRegTypeGpw, 15, 2); + +DEFINE_REG(GpReg, eax, kRegTypeGpd, kRegIndexAx, 4); +DEFINE_REG(GpReg, ecx, kRegTypeGpd, kRegIndexCx, 4); +DEFINE_REG(GpReg, edx, kRegTypeGpd, kRegIndexDx, 4); +DEFINE_REG(GpReg, ebx, kRegTypeGpd, kRegIndexBx, 4); +DEFINE_REG(GpReg, esp, kRegTypeGpd, kRegIndexSp, 4); +DEFINE_REG(GpReg, ebp, kRegTypeGpd, kRegIndexBp, 4); +DEFINE_REG(GpReg, esi, kRegTypeGpd, kRegIndexSi, 4); +DEFINE_REG(GpReg, edi, kRegTypeGpd, kRegIndexDi, 4); +DEFINE_REG(GpReg, r8d, kRegTypeGpd, 8, 4); +DEFINE_REG(GpReg, r9d, kRegTypeGpd, 9, 4); +DEFINE_REG(GpReg, r10d, kRegTypeGpd, 10, 4); +DEFINE_REG(GpReg, r11d, kRegTypeGpd, 11, 4); +DEFINE_REG(GpReg, r12d, kRegTypeGpd, 12, 4); +DEFINE_REG(GpReg, r13d, kRegTypeGpd, 13, 4); +DEFINE_REG(GpReg, r14d, kRegTypeGpd, 14, 4); +DEFINE_REG(GpReg, r15d, kRegTypeGpd, 15, 4); + +DEFINE_REG(GpReg, rax, kRegTypeGpq, kRegIndexAx, 8); +DEFINE_REG(GpReg, rcx, kRegTypeGpq, kRegIndexCx, 8); +DEFINE_REG(GpReg, rdx, kRegTypeGpq, kRegIndexDx, 8); +DEFINE_REG(GpReg, rbx, kRegTypeGpq, kRegIndexBx, 8); +DEFINE_REG(GpReg, rsp, kRegTypeGpq, kRegIndexSp, 8); +DEFINE_REG(GpReg, rbp, kRegTypeGpq, kRegIndexBp, 8); +DEFINE_REG(GpReg, rsi, kRegTypeGpq, kRegIndexSi, 8); +DEFINE_REG(GpReg, rdi, kRegTypeGpq, kRegIndexDi, 8); +DEFINE_REG(GpReg, r8, kRegTypeGpq, 8, 8); +DEFINE_REG(GpReg, r9, kRegTypeGpq, 9, 8); +DEFINE_REG(GpReg, r10, kRegTypeGpq, 10, 8); +DEFINE_REG(GpReg, r11, kRegTypeGpq, 11, 8); +DEFINE_REG(GpReg, r12, kRegTypeGpq, 12, 8); +DEFINE_REG(GpReg, r13, kRegTypeGpq, 13, 8); +DEFINE_REG(GpReg, r14, kRegTypeGpq, 14, 8); +DEFINE_REG(GpReg, r15, kRegTypeGpq, 15, 8); + +DEFINE_REG(FpReg, fp0, kRegTypeFp, 0, 10); +DEFINE_REG(FpReg, fp1, kRegTypeFp, 1, 10); +DEFINE_REG(FpReg, fp2, kRegTypeFp, 2, 10); +DEFINE_REG(FpReg, fp3, kRegTypeFp, 3, 10); +DEFINE_REG(FpReg, fp4, kRegTypeFp, 4, 10); +DEFINE_REG(FpReg, fp5, kRegTypeFp, 5, 10); +DEFINE_REG(FpReg, fp6, kRegTypeFp, 6, 10); +DEFINE_REG(FpReg, fp7, kRegTypeFp, 7, 10); + +DEFINE_REG(MmReg, mm0, kRegTypeMm, 0, 8); +DEFINE_REG(MmReg, mm1, kRegTypeMm, 1, 8); +DEFINE_REG(MmReg, mm2, kRegTypeMm, 2, 8); +DEFINE_REG(MmReg, mm3, kRegTypeMm, 3, 8); +DEFINE_REG(MmReg, mm4, kRegTypeMm, 4, 8); +DEFINE_REG(MmReg, mm5, kRegTypeMm, 5, 8); +DEFINE_REG(MmReg, mm6, kRegTypeMm, 6, 8); +DEFINE_REG(MmReg, mm7, kRegTypeMm, 7, 8); + +DEFINE_REG(XmmReg, xmm0, kRegTypeXmm, 0, 16); +DEFINE_REG(XmmReg, xmm1, kRegTypeXmm, 1, 16); +DEFINE_REG(XmmReg, xmm2, kRegTypeXmm, 2, 16); +DEFINE_REG(XmmReg, xmm3, kRegTypeXmm, 3, 16); +DEFINE_REG(XmmReg, xmm4, kRegTypeXmm, 4, 16); +DEFINE_REG(XmmReg, xmm5, kRegTypeXmm, 5, 16); +DEFINE_REG(XmmReg, xmm6, kRegTypeXmm, 6, 16); +DEFINE_REG(XmmReg, xmm7, kRegTypeXmm, 7, 16); +DEFINE_REG(XmmReg, xmm8, kRegTypeXmm, 8, 16); +DEFINE_REG(XmmReg, xmm9, kRegTypeXmm, 9, 16); +DEFINE_REG(XmmReg, xmm10, kRegTypeXmm, 10, 16); +DEFINE_REG(XmmReg, xmm11, kRegTypeXmm, 11, 16); +DEFINE_REG(XmmReg, xmm12, kRegTypeXmm, 12, 16); +DEFINE_REG(XmmReg, xmm13, kRegTypeXmm, 13, 16); +DEFINE_REG(XmmReg, xmm14, kRegTypeXmm, 14, 16); +DEFINE_REG(XmmReg, xmm15, kRegTypeXmm, 15, 16); + +DEFINE_REG(YmmReg, ymm0, kRegTypeYmm, 0, 32); +DEFINE_REG(YmmReg, ymm1, kRegTypeYmm, 1, 32); +DEFINE_REG(YmmReg, ymm2, kRegTypeYmm, 2, 32); +DEFINE_REG(YmmReg, ymm3, kRegTypeYmm, 3, 32); +DEFINE_REG(YmmReg, ymm4, kRegTypeYmm, 4, 32); +DEFINE_REG(YmmReg, ymm5, kRegTypeYmm, 5, 32); +DEFINE_REG(YmmReg, ymm6, kRegTypeYmm, 6, 32); +DEFINE_REG(YmmReg, ymm7, kRegTypeYmm, 7, 32); +DEFINE_REG(YmmReg, ymm8, kRegTypeYmm, 8, 32); +DEFINE_REG(YmmReg, ymm9, kRegTypeYmm, 9, 32); +DEFINE_REG(YmmReg, ymm10, kRegTypeYmm, 10, 32); +DEFINE_REG(YmmReg, ymm11, kRegTypeYmm, 11, 32); +DEFINE_REG(YmmReg, ymm12, kRegTypeYmm, 12, 32); +DEFINE_REG(YmmReg, ymm13, kRegTypeYmm, 13, 32); +DEFINE_REG(YmmReg, ymm14, kRegTypeYmm, 14, 32); +DEFINE_REG(YmmReg, ymm15, kRegTypeYmm, 15, 32); + +DEFINE_REG(SegReg, cs, kRegTypeSeg, kSegCs, 2); +DEFINE_REG(SegReg, ss, kRegTypeSeg, kSegSs, 2); +DEFINE_REG(SegReg, ds, kRegTypeSeg, kSegDs, 2); +DEFINE_REG(SegReg, es, kRegTypeSeg, kSegEs, 2); +DEFINE_REG(SegReg, fs, kRegTypeSeg, kSegFs, 2); +DEFINE_REG(SegReg, gs, kRegTypeSeg, kSegGs, 2); + +} // x86x64 namespace +} // asmjit namespace + +// ============================================================================ +// [asmjit::x86] +// ============================================================================ + +#if defined(ASMJIT_BUILD_X86) + +namespace asmjit { +namespace x86 { + +DEFINE_REG(GpReg, zax, kRegTypeGpd, kRegIndexAx, 4); +DEFINE_REG(GpReg, zcx, kRegTypeGpd, kRegIndexCx, 4); +DEFINE_REG(GpReg, zdx, kRegTypeGpd, kRegIndexDx, 4); +DEFINE_REG(GpReg, zbx, kRegTypeGpd, kRegIndexBx, 4); +DEFINE_REG(GpReg, zsp, kRegTypeGpd, kRegIndexSp, 4); +DEFINE_REG(GpReg, zbp, kRegTypeGpd, kRegIndexBp, 4); +DEFINE_REG(GpReg, zsi, kRegTypeGpd, kRegIndexSi, 4); +DEFINE_REG(GpReg, zdi, kRegTypeGpd, kRegIndexDi, 4); + +} // x86 namespace +} // asmjit namespace + +#endif // ASMJIT_BUILD_X86 + +// ============================================================================ +// [asmjit::x64] +// ============================================================================ + +#if defined(ASMJIT_BUILD_X64) +namespace asmjit { +namespace x64 { + +DEFINE_REG(GpReg, zax, kRegTypeGpq, kRegIndexAx, 8); +DEFINE_REG(GpReg, zcx, kRegTypeGpq, kRegIndexCx, 8); +DEFINE_REG(GpReg, zdx, kRegTypeGpq, kRegIndexDx, 8); +DEFINE_REG(GpReg, zbx, kRegTypeGpq, kRegIndexBx, 8); +DEFINE_REG(GpReg, zsp, kRegTypeGpq, kRegIndexSp, 8); +DEFINE_REG(GpReg, zbp, kRegTypeGpq, kRegIndexBp, 8); +DEFINE_REG(GpReg, zsi, kRegTypeGpq, kRegIndexSi, 8); +DEFINE_REG(GpReg, zdi, kRegTypeGpq, kRegIndexDi, 8); + +} // x64 namespace +} // asmjit namespace + +#endif // ASMJIT_BUILD_X64 + +#include "../apiend.h" + +// [Guard] +#endif // ASMJIT_BUILD_X86 || ASMJIT_BUILD_X64 diff --git a/src/asmjit/x86/x86regs.h b/src/asmjit/x86/x86regs.h new file mode 100644 index 0000000..6b13734 --- /dev/null +++ b/src/asmjit/x86/x86regs.h @@ -0,0 +1,409 @@ +// [AsmJit] +// Complete x86/x64 JIT and Remote Assembler for C++. +// +// [License] +// Zlib - See LICENSE.md file in the package. + +// [Guard] +#ifndef _ASMJIT_X86_X86REGS_H +#define _ASMJIT_X86_X86REGS_H + +// [Dependencies - AsmJit] +#include "../base/operand.h" + +// [Api-Begin] +#include "../apibegin.h" + +namespace asmjit { +namespace x86x64 { + +struct GpReg; +struct FpReg; +struct MmReg; +struct XmmReg; +struct YmmReg; +struct SegReg; + +#if defined(ASMJIT_REGS_INIT) +// Remap all classes to POD structs that can be statically initialized. +struct GpReg { Operand::InitRegOp data; }; +struct FpReg { Operand::InitRegOp data; }; +struct MmReg { Operand::InitRegOp data; }; +struct XmmReg { Operand::InitRegOp data; }; +struct YmmReg { Operand::InitRegOp data; }; +struct SegReg { Operand::InitRegOp data; }; +#endif // ASMJIT_REGS_INIT + +//! \addtogroup asmjit_x86x64_general +//! \{ + +// ============================================================================ +// [asmjit::x86x64::kRegClass] +// ============================================================================ + +//! X86/X64 variable class. +ASMJIT_ENUM(kRegClass) { + // kRegClassGp defined earlier. + + //! X86/X64 Fp register class. + kRegClassFp = 1, + //! X86/X64 Mm register class. + kRegClassMm = 2, + //! X86/X64 Xmm/Ymm/Zmm register class. + kRegClassXyz = 3, + + //! Count of X86/X64 register classes. + kRegClassCount = 4 +}; + +// ============================================================================ +// [asmjit::x86x64::kRegCount] +// ============================================================================ + +//! X86/X64 registers count. +ASMJIT_ENUM(kRegCount) { + //! Count of Fp registers (8). + kRegCountFp = 8, + //! Count of Mm registers (8). + kRegCountMm = 8, + //! Count of segment registers (6). + kRegCountSeg = 6 +}; + +// ============================================================================ +// [asmjit::x86x64::kRegType] +// ============================================================================ + +//! X86/X64 register type. +ASMJIT_ENUM(kRegType) { + //! Gpb-lo register (AL, BL, CL, DL, ...). + kRegTypeGpbLo = 0x01, + //! Gpb-hi register (AH, BH, CH, DH only). + kRegTypeGpbHi = 0x02, + + //! \internal + //! + //! Gpb-hi register patched to native index (4-7). + kRegTypePatchedGpbHi = kRegTypeGpbLo | kRegTypeGpbHi, + + //! Gpw register. + kRegTypeGpw = 0x10, + //! Gpd register. + kRegTypeGpd = 0x20, + //! Gpq register. + kRegTypeGpq = 0x30, + + //! Fp register. + kRegTypeFp = 0x50, + //! Mm register. + kRegTypeMm = 0x60, + + //! Xmm register. + kRegTypeXmm = 0x70, + //! Ymm register. + kRegTypeYmm = 0x80, + //! Zmm register. + kRegTypeZmm = 0x90, + + //! Segment register. + kRegTypeSeg = 0xF0 +}; + +// ============================================================================ +// [asmjit::x86x64::kRegIndex] +// ============================================================================ + +//! X86/X64 register indexes. +//! +//! \note Register indexes have been reduced to only support general purpose +//! registers. There is no need to have enumerations with number suffix that +//! expands to the exactly same value as the suffix value itself. +ASMJIT_ENUM(kRegIndex) { + //! Index of Al/Ah/Ax/Eax/Rax registers. + kRegIndexAx = 0, + //! Index of Cl/Ch/Cx/Ecx/Rcx registers. + kRegIndexCx = 1, + //! Index of Dl/Dh/Dx/Edx/Rdx registers. + kRegIndexDx = 2, + //! Index of Bl/Bh/Bx/Ebx/Rbx registers. + kRegIndexBx = 3, + //! Index of Spl/Sp/Esp/Rsp registers. + kRegIndexSp = 4, + //! Index of Bpl/Bp/Ebp/Rbp registers. + kRegIndexBp = 5, + //! Index of Sil/Si/Esi/Rsi registers. + kRegIndexSi = 6, + //! Index of Dil/Di/Edi/Rdi registers. + kRegIndexDi = 7, + //! Index of R8b/R8w/R8d/R8 registers (64-bit only). + kRegIndexR8 = 8, + //! Index of R9B/R9w/R9d/R9 registers (64-bit only). + kRegIndexR9 = 9, + //! Index of R10B/R10w/R10D/R10 registers (64-bit only). + kRegIndexR10 = 10, + //! Index of R11B/R11w/R11d/R11 registers (64-bit only). + kRegIndexR11 = 11, + //! Index of R12B/R12w/R12d/R12 registers (64-bit only). + kRegIndexR12 = 12, + //! Index of R13B/R13w/R13d/R13 registers (64-bit only). + kRegIndexR13 = 13, + //! Index of R14B/R14w/R14d/R14 registers (64-bit only). + kRegIndexR14 = 14, + //! Index of R15B/R15w/R15d/R15 registers (64-bit only). + kRegIndexR15 = 15 +}; + +// ============================================================================ +// [asmjit::x86x64::kSeg] +// ============================================================================ + +//! X86/X64 segment codes. +ASMJIT_ENUM(kSeg) { + //! No segment. + kSegDefault = 0, + //! Es segment. + kSegEs = 1, + //! Cs segment. + kSegCs = 2, + //! Ss segment. + kSegSs = 3, + //! Ds segment. + kSegDs = 4, + //! Fs segment. + kSegFs = 5, + //! Gs segment. + kSegGs = 6 +}; + +// ============================================================================ +// [asmjit::x86x64::Registers] +// ============================================================================ + +//! No Gp register, can be used only within `Mem` operand. +ASMJIT_VAR const GpReg noGpReg; + +ASMJIT_VAR const GpReg al; //!< 8-bit Gpb-lo register. +ASMJIT_VAR const GpReg cl; //!< 8-bit Gpb-lo register. +ASMJIT_VAR const GpReg dl; //!< 8-bit Gpb-lo register. +ASMJIT_VAR const GpReg bl; //!< 8-bit Gpb-lo register. +ASMJIT_VAR const GpReg spl; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg bpl; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg sil; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg dil; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r8b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r9b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r10b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r11b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r12b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r13b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r14b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r15b; //!< 8-bit Gpb-lo register (X64). + +ASMJIT_VAR const GpReg ah; //!< 8-bit Gpb-hi register. +ASMJIT_VAR const GpReg ch; //!< 8-bit Gpb-hi register. +ASMJIT_VAR const GpReg dh; //!< 8-bit Gpb-hi register. +ASMJIT_VAR const GpReg bh; //!< 8-bit Gpb-hi register. + +ASMJIT_VAR const GpReg ax; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg cx; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg dx; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg bx; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg sp; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg bp; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg si; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg di; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg r8w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r9w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r10w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r11w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r12w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r13w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r14w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r15w; //!< 16-bit Gpw register (X64). + +ASMJIT_VAR const GpReg eax; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg ecx; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg edx; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg ebx; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg esp; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg ebp; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg esi; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg edi; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg r8d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r9d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r10d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r11d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r12d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r13d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r14d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r15d; //!< 32-bit Gpd register (X64). + +ASMJIT_VAR const GpReg rax; //!< 64-bit Gpq register (X64). +ASMJIT_VAR const GpReg rcx; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rdx; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rbx; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rsp; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rbp; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rsi; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rdi; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r8; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r9; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r10; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r11; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r12; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r13; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r14; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r15; //!< 64-bit Gpq register (X64) + +ASMJIT_VAR const FpReg fp0; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp1; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp2; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp3; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp4; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp5; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp6; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp7; //!< 80-bit Fp register. + +ASMJIT_VAR const MmReg mm0; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm1; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm2; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm3; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm4; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm5; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm6; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm7; //!< 64-bit Mm register. + +ASMJIT_VAR const XmmReg xmm0; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm1; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm2; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm3; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm4; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm5; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm6; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm7; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm8; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm9; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm10; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm11; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm12; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm13; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm14; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm15; //!< 128-bit Xmm register (X64). + +ASMJIT_VAR const YmmReg ymm0; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm1; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm2; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm3; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm4; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm5; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm6; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm7; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm8; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm9; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm10; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm11; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm12; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm13; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm14; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm15; //!< 256-bit Ymm register (X64). + +ASMJIT_VAR const SegReg cs; //!< Cs segment register. +ASMJIT_VAR const SegReg ss; //!< Ss segment register. +ASMJIT_VAR const SegReg ds; //!< Ds segment register. +ASMJIT_VAR const SegReg es; //!< Es segment register. +ASMJIT_VAR const SegReg fs; //!< Fs segment register. +ASMJIT_VAR const SegReg gs; //!< Gs segment register. + +//! \} + +} // x86x64 namespace +} // asmjit namespace + +// ============================================================================ +// [asmjit::x86] +// ============================================================================ + +#if defined(ASMJIT_BUILD_X86) + +namespace asmjit { +namespace x86 { + +//! \addtogroup asmjit_x86x64_general +//! \{ + +// ============================================================================ +// [asmjit::x86::Registers] +// ============================================================================ + +//! Gpd register. +ASMJIT_VAR const GpReg zax; +//! Gpd register. +ASMJIT_VAR const GpReg zcx; +//! Gpd register. +ASMJIT_VAR const GpReg zdx; +//! Gpd register. +ASMJIT_VAR const GpReg zbx; +//! Gpd register. +ASMJIT_VAR const GpReg zsp; +//! Gpd register. +ASMJIT_VAR const GpReg zbp; +//! Gpd register. +ASMJIT_VAR const GpReg zsi; +//! Gpd register. +ASMJIT_VAR const GpReg zdi; + +//! \} + +} // x86 namespace +} // asmjit namespace + +#endif // ASMJIT_BUILD_X86 + +// ============================================================================ +// [asmjit::x64] +// ============================================================================ + +#if defined(ASMJIT_BUILD_X64) + +namespace asmjit { +namespace x64 { + +// This is the only place where the x86x64 namespace is included into x64. +using namespace ::asmjit::x86x64; + +//! \addtogroup asmjit_x86x64_general +//! \{ + +// ============================================================================ +// [asmjit::x64::Registers] +// ============================================================================ + +//! Gpq register. +ASMJIT_VAR const GpReg zax; +//! Gpq register. +ASMJIT_VAR const GpReg zcx; +//! Gpq register. +ASMJIT_VAR const GpReg zdx; +//! Gpq register. +ASMJIT_VAR const GpReg zbx; +//! Gpq register. +ASMJIT_VAR const GpReg zsp; +//! Gpq register. +ASMJIT_VAR const GpReg zbp; +//! Gpq register. +ASMJIT_VAR const GpReg zsi; +//! Gpq register. +ASMJIT_VAR const GpReg zdi; + +//! \} + +} // x64 namespace +} // asmjit namespace + +#endif // ASMJIT_BUILD_X64 + +// [Api-End] +#include "../apiend.h" + +// [Guard] +#endif // _ASMJIT_X86_X86REGS_H