From 1a73e65534bbe990402b0a163e413040a609a895 Mon Sep 17 00:00:00 2001 From: kobalicek Date: Sat, 10 May 2014 21:19:50 +0200 Subject: [PATCH] - Minor reorganization of source code (split defs to operand and instruction info). - Added JECXZ instruction. - Doxyfile is now in project root. - Documentation updates. --- CMakeLists.txt | 12 +- Doxyfile | 236 ++ LICENSE.md | 2 +- README.md | 992 ++++----- src/app/test/genblend.h | 8 +- src/app/test/genopcode.h | 81 + src/app/test/testsizeof.cpp | 2 +- src/asmjit/asmjit.h | 308 ++- src/asmjit/base.h | 189 +- src/asmjit/base/assembler.h | 143 +- src/asmjit/base/codegen.cpp | 2 +- src/asmjit/base/codegen.h | 73 +- src/asmjit/base/compiler.cpp | 48 +- src/asmjit/base/compiler.h | 265 ++- src/asmjit/base/constpool.cpp | 4 +- src/asmjit/base/constpool.h | 12 +- src/asmjit/base/context.cpp | 16 +- src/asmjit/base/context_p.h | 32 +- src/asmjit/base/cpuinfo.cpp | 5 - src/asmjit/base/cpuinfo.h | 33 +- src/asmjit/base/cputicks.h | 6 +- src/asmjit/base/error.cpp | 10 +- src/asmjit/base/error.h | 85 +- src/asmjit/base/func.h | 74 +- src/asmjit/base/globals.h | 71 +- src/asmjit/base/intutil.h | 26 +- src/asmjit/base/lock.h | 15 +- src/asmjit/base/logger.h | 15 +- src/asmjit/base/memorymanager.cpp | 0 src/asmjit/base/memorymanager.h | 0 src/asmjit/base/{defs.cpp => operand.cpp} | 2 +- src/asmjit/base/{defs.h => operand.h} | 184 +- src/asmjit/base/podlist.h | 9 +- src/asmjit/base/podvector.h | 14 +- src/asmjit/base/runtime.cpp | 17 +- src/asmjit/base/runtime.h | 27 +- src/asmjit/base/string.cpp | 1 - src/asmjit/base/string.h | 17 +- src/asmjit/base/vectypes.h | 240 +- src/asmjit/base/vmem.cpp | 17 +- src/asmjit/base/vmem.h | 24 +- src/asmjit/base/zone.cpp | 1 - src/asmjit/base/zone.h | 32 +- src/asmjit/build.h | 10 - src/asmjit/contrib/winremoteruntime.cpp | 5 + src/asmjit/contrib/winremoteruntime.h | 6 + src/asmjit/x86.h | 111 +- src/asmjit/x86/x86assembler.cpp | 213 +- src/asmjit/x86/x86assembler.h | 2210 ++++++++++--------- src/asmjit/x86/x86compiler.cpp | 6 +- src/asmjit/x86/x86compiler.h | 1115 +++++----- src/asmjit/x86/x86context.cpp | 307 +-- src/asmjit/x86/x86context_p.h | 53 +- src/asmjit/x86/x86cpuinfo.cpp | 14 +- src/asmjit/x86/x86cpuinfo.h | 9 +- src/asmjit/x86/x86defs.h | 2 +- src/asmjit/x86/x86func.cpp | 71 +- src/asmjit/x86/x86func.h | 94 +- src/asmjit/x86/{x86defs.cpp => x86inst.cpp} | 1988 +++++++---------- src/asmjit/x86/x86inst.h | 1837 +++++++++++++++ src/asmjit/x86/x86operand.cpp | 338 +++ src/asmjit/x86/x86operand.h | 1988 +++++++++++++++++ src/asmjit/x86/x86util.cpp | 90 + src/asmjit/x86/x86util.h | 369 ++++ tools/Doxyfile | 408 ---- tools/doc-header.html | 2 +- tools/doc-layout.xml | 6 +- tools/doc-style.css | 21 +- tools/src-gendefs.js | 2 +- 69 files changed, 9451 insertions(+), 5174 deletions(-) create mode 100644 Doxyfile delete mode 100644 src/asmjit/base/memorymanager.cpp delete mode 100644 src/asmjit/base/memorymanager.h rename src/asmjit/base/{defs.cpp => operand.cpp} (94%) rename src/asmjit/base/{defs.h => operand.h} (91%) rename src/asmjit/x86/{x86defs.cpp => x86inst.cpp} (85%) create mode 100644 src/asmjit/x86/x86inst.h create mode 100644 src/asmjit/x86/x86operand.cpp create mode 100644 src/asmjit/x86/x86operand.h create mode 100644 src/asmjit/x86/x86util.cpp create mode 100644 src/asmjit/x86/x86util.h delete mode 100644 tools/Doxyfile diff --git a/CMakeLists.txt b/CMakeLists.txt index b776c6b..71a402d 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -222,8 +222,6 @@ AsmJit_AddSource(ASMJIT_SRC asmjit/base cpuinfo.h cputicks.cpp cputicks.h - defs.cpp - defs.h error.cpp error.h func.cpp @@ -234,6 +232,8 @@ AsmJit_AddSource(ASMJIT_SRC asmjit/base lock.h logger.cpp logger.h + operand.cpp + operand.h podlist.h podvector.cpp podvector.h @@ -257,10 +257,14 @@ AsmJit_AddSource(ASMJIT_SRC asmjit/x86 x86context_p.h x86cpuinfo.cpp x86cpuinfo.h - x86defs.cpp - x86defs.h x86func.cpp x86func.h + x86inst.cpp + x86inst.h + x86operand.cpp + x86operand.h + x86util.cpp + x86util.h ) AsmJit_AddSource(ASMJIT_SRC asmjit/contrib diff --git a/Doxyfile b/Doxyfile new file mode 100644 index 0000000..151f0e6 --- /dev/null +++ b/Doxyfile @@ -0,0 +1,236 @@ +# Doxyfile 1.8.7 + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +DOXYFILE_ENCODING = UTF-8 + +PROJECT_NAME = "AsmJit" +PROJECT_NUMBER = "1.1" +PROJECT_BRIEF = "Complete Remote and JIT Assembler for x86/x64" + +OUTPUT_DIRECTORY = . +CREATE_SUBDIRS = NO +ALLOW_UNICODE_NAMES = NO +OUTPUT_LANGUAGE = English + +FULL_PATH_NAMES = YES +STRIP_FROM_PATH = +STRIP_FROM_INC_PATH = +SHORT_NAMES = NO + +BRIEF_MEMBER_DESC = YES +REPEAT_BRIEF = YES +QT_AUTOBRIEF = NO +JAVADOC_AUTOBRIEF = YES +MULTILINE_CPP_IS_BRIEF = YES + +ALWAYS_DETAILED_SEC = NO +INLINE_INHERITED_MEMB = NO + +INHERIT_DOCS = YES +TAB_SIZE = 2 +MARKDOWN_SUPPORT = YES +AUTOLINK_SUPPORT = NO +IDL_PROPERTY_SUPPORT = NO +SEPARATE_MEMBER_PAGES = NO + +DISTRIBUTE_GROUP_DOC = NO +SUBGROUPING = YES + +INLINE_GROUPED_CLASSES = NO +INLINE_SIMPLE_STRUCTS = NO + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +EXTRACT_ALL = NO +EXTRACT_PRIVATE = NO +EXTRACT_PACKAGE = NO +EXTRACT_STATIC = NO +EXTRACT_LOCAL_CLASSES = NO + +HIDE_UNDOC_CLASSES = YES +HIDE_UNDOC_MEMBERS = NO +HIDE_FRIEND_COMPOUNDS = YES +HIDE_IN_BODY_DOCS = YES + +INTERNAL_DOCS = NO +CASE_SENSE_NAMES = NO + +# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with +# their full class and namespace scopes in the documentation. If set to YES the +# scope will be hidden. +# The default value is: NO. + +HIDE_SCOPE_NAMES = NO +SHOW_INCLUDE_FILES = NO + +SHOW_GROUPED_MEMB_INC = NO +INLINE_INFO = YES +SORT_MEMBER_DOCS = NO +SORT_BRIEF_DOCS = NO +SORT_GROUP_NAMES = NO +SORT_BY_SCOPE_NAME = YES +STRICT_PROTO_MATCHING = NO + +GENERATE_TODOLIST = NO +GENERATE_TESTLIST = NO +GENERATE_BUGLIST = NO +GENERATE_DEPRECATEDLIST= NO + +MAX_INITIALIZER_LINES = 0 +SHOW_USED_FILES = NO +SHOW_FILES = NO +SHOW_NAMESPACES = NO + +#--------------------------------------------------------------------------- +# Configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +QUIET = YES +WARNINGS = YES +WARN_IF_UNDOCUMENTED = NO +WARN_IF_DOC_ERROR = YES +WARN_NO_PARAMDOC = NO +WARN_FORMAT = "$file:$line: $text" +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# Configuration options related to the input files +#--------------------------------------------------------------------------- + +INPUT = src/asmjit +INPUT_ENCODING = UTF-8 +RECURSIVE = YES +EXCLUDE = +USE_MDFILE_AS_MAINPAGE = README.md + +#--------------------------------------------------------------------------- +# Configuration options related to source browsing +#--------------------------------------------------------------------------- + +SOURCE_BROWSER = NO +INLINE_SOURCES = NO +STRIP_CODE_COMMENTS = YES +SOURCE_TOOLTIPS = YES +VERBATIM_HEADERS = NO + +#--------------------------------------------------------------------------- +# Configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +ALPHABETICAL_INDEX = NO + +#--------------------------------------------------------------------------- +# Configuration options related to outputs +#--------------------------------------------------------------------------- + +GENERATE_HTML = YES +GENERATE_LATEX = NO +GENERATE_RTF = NO +GENERATE_MAN = NO + +GENERATE_XML = YES +XML_OUTPUT = build_xml +XML_PROGRAMLISTING = NO + +HTML_OUTPUT = build_doc +HTML_FILE_EXTENSION = .html + +LAYOUT_FILE = tools/doc-layout.xml +HTML_HEADER = tools/doc-header.html +HTML_FOOTER = tools/doc-footer.html +HTML_STYLESHEET = tools/doc-style.css +HTML_EXTRA_STYLESHEET = +HTML_EXTRA_FILES = + +HTML_COLORSTYLE_HUE = 220 +HTML_COLORSTYLE_SAT = 100 +HTML_COLORSTYLE_GAMMA = 80 +HTML_TIMESTAMP = NO + +HTML_DYNAMIC_SECTIONS = NO +HTML_INDEX_NUM_ENTRIES = 0 +SEARCHENGINE = NO + +#--------------------------------------------------------------------------- +# Configuration options related to the CHM output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three +# additional HTML index files: index.hhp, index.hhc, and index.hhk. The +# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop +# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on +# Windows. +# +# The HTML Help Workshop contains a compiler that can convert all HTML output +# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML +# files are now used as the Windows 98 help format, and will replace the old +# Windows help format (.hlp) on all Windows platforms in the future. Compressed +# HTML files also contain an index, a table of contents, and you can search for +# words in the documentation. The HTML workshop also contains a viewer for +# compressed HTML files. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_HTMLHELP = NO + +# The CHM_FILE tag can be used to specify the file name of the resulting .chm +# file. You can add a path in front of the file if the result should not be +# written to the html output directory. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_FILE = + +# The HHC_LOCATION tag can be used to specify the location (absolute path +# including file name) of the HTML help compiler ( hhc.exe). If non-empty +# doxygen will try to run the HTML help compiler on the generated index.hhp. +# The file has to be specified with full path. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +HHC_LOCATION = + +# The BINARY_TOC flag controls whether a binary table of contents is generated ( +# YES) or a normal table of contents ( NO) in the .chm file. Furthermore it +# enables the Previous and Next buttons. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members to +# the table of contents of the HTML help documentation and to the tree view. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +TOC_EXPAND = NO +DISABLE_INDEX = NO +GENERATE_TREEVIEW = NO +ENUM_VALUES_PER_LINE = 0 +TREEVIEW_WIDTH = 250 +EXT_LINKS_IN_WINDOW = NO + +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- + +ENABLE_PREPROCESSING = YES +MACRO_EXPANSION = YES +EXPAND_ONLY_PREDEF = NO +EXPAND_AS_DEFINED = +SKIP_FUNCTION_MACROS = YES + +PREDEFINED = ASMJIT_DOCGEN \ + ASMJIT_BUILD_X86 \ + ASMJIT_BUILD_X64 \ + ASMJIT_API + +#--------------------------------------------------------------------------- +# Configuration options related to the dot tool +#--------------------------------------------------------------------------- + +CLASS_DIAGRAMS = NO +CLASS_GRAPH = NO diff --git a/LICENSE.md b/LICENSE.md index 4a258b9..7742e92 100644 --- a/LICENSE.md +++ b/LICENSE.md @@ -1,4 +1,4 @@ -AsmJit - Complete x86/x64 JIT and Remote Assembler for C++ +AsmJit - Complete x86/x64 JIT and Remote Assembler for C++ Copyright (c) 2008-2014, Petr Kobalicek This software is provided 'as-is', without any express or implied diff --git a/README.md b/README.md index 2351293..3afeed3 100644 --- a/README.md +++ b/README.md @@ -1,496 +1,496 @@ -AsmJit -====== - -Complete x86/x64 JIT and Remote Assembler for C++. - -Official Repository -------------------- - -https://github.com/kobalicekp/asmjit - -Support the Project -------------------- - -[![Donate](https://www.paypalobjects.com/en_US/i/btn/btn_donate_LG.gif)]( - https://www.paypal.com/cgi-bin/webscr?cmd=_donations&business=QDRM6SRNG7378&lc=EN;&item_name=asmjit¤cy_code=EUR) - -Introduction ------------- - -AsmJit is a complete JIT and remote assembler for C++ language. It can generate native code for x86 and x64 architectures and supports the whole x86/x64 instruction set (from legacy MMX to the newest AVX2). It has a type-safe API that allows C++ compiler to do a semantic checks at compile-time even before the assembled code is generated or run. - -AsmJit is not a virtual machine nor tries to be. It's a general purpose tool that can be used to encode assembly instructions into their machine code representations and tries to make such process easy and fun. AsmJit has been used so far in software encryption, image/sound processing, emulators and as a JIT backend in virtual machines. - -Features --------- - - * Complete x86/x64 instruction set - MMX, SSE, AVX, BMI, XOP, FMA..., - * Low-level and high-level code generation, - * Built-in CPU detection, - * Virtual Memory management, - * Pretty logging and error handling, - * Small and embeddable, around 150kB compiled, - * Zero dependencies, not even STL or RTTI. - -Supported Environments ----------------------- - -### Operating Systems - - * BSDs - * Linux - * Mac - * Windows - -### C++ Compilers - - * BorlandC++ - * GNU (3.4.X+, 4.0+, MinGW) - * MSVC (VS2005, VS2008, VS2010) - * Other compilers require testing - -### Backends - - * X86 - * X64 - -Project Organization --------------------- - - - project root / - - src - Source code - - asmjit - Public header files (always include from here) - - base - Base files, used by the AsmJit and all backends - - contrib - Contributions that extends base functionality - - x86 - X86/X64 specific files, used only by X86/X64 backend - - tools - Tools used for configuring, documenting and generating files - -Code Generation Concepts ------------------------- - -AsmJit has two completely different code generation concepts. The difference is in how the code is generated. The first concept, also referred as the low level concept, is called 'Assembler' and it's the same as writing RAW assembly by using physical registers directly. In this case AsmJit does only instruction encoding, verification and relocation. - -The second concept, also referred as the high level concept, is called 'Compiler'. Compiler lets you use virtually unlimited number of registers (called variables) significantly simplifying the code generation process. Compiler allocates these virtual registers to physical registers after the code generation is done. This requires some extra effort - Compiler has to generate information for each node (instruction, function declaration, function call) in the code, perform a variable liveness analysis and translate the code having variables into code having only registers. - -In addition, Compiler understands functions and function calling conventions. It has been designed in a way that the code generated is always a function having prototype like in a programming language. By having a function prototype the Compiler is able to insert prolog and epilog to a function being generated and it is able to call a function inside a generated one. - -There is no conclusion on which concept is better. Assembler brings full control on how the code is generated, while Compiler makes the generation easier and more portable. - -Configuring & Building ----------------------- - -AsmJit is designed to be easy embeddable in any project. However, it has some compile-time flags that can be used to build a specific version of AsmJit including or omitting certain features: - -### Library Type - - * *ASMJIT_EMBED* - Parameter that can be set to cmake to turn off building library, useful if you want to include asmjit in your project without building the library. - * *ASMJIT_STATIC* - Define when building AsmJit as a static library. No symbols will be exported by AsmJit by default. - * *ASMJIT_API* - This is AsmJit API decorator that is used in all functions that has to be exported. It can be redefined, however it's not a recommended way. - * By default AsmJit build is configured as a shared library and *ASMJIT_API* contains compiler specific attributes to import/export AsmJit symbols. - -### Backends - - * *ASMJIT_BUILD_X86* - Always build x86 backend regardless of host architecture. - * *ASMJIT_BUILD_X64* - Always build x64 backend regardless of host architecture. - * *ASMJIT_BUILD_HOST* - Always build host backand, if only *ASMJIT_BUILD_HOST* is used only the host architecture detected at compile-time will be included. - * By default only *ASMJIT_BUILD_HOST* is defined. - -### Build Mode - - * *ASMJIT_DEBUG* - Define to always turn debugging on (regardless of build-mode). - * *ASMJIT_RELEASE* - Define to always turn debugging off (regardless of build-mode). - * By default none of these is defined, AsmJit detects mode based on compile-time macros (useful when using IDE that has switches for Debug/Release/etc...). - - -To build AsmJit please use cmake that will generate project files for your favorite IDE and platform. If you don't use cmake and you still want to include AsmJit in your project it's perfectly fine by just including it there, probably defining *ASMJIT_STATIC* to prevent AsmJit trying to export the API. - -Using AsmJit ------------- - -AsmJit test suite contains up-to-date tests that can be used as a starting point. Base concepts are discussed below. Most of the constructs will work in pure Assembler if variables are replaced by registers and functions prologs/epilogs hand coded. The Compiler is used just to make things simple and most of users prefer it anyway. To use AsmJit basic skills to setup your environment are required and not discussed here. - -AsmJit library uses one global namespace called `asmjit` which contains the basics. Architecture specific code is nested, for example x86 support is in `asmjit::x86`, x64 support is in `asmjit::x64` and shared x86/x64 in `asmjit::x86x64`. To make things simple AsmJit provides `asmjit::host` namespace which imports namespace of the detected host architecture automatically. Nested namespaces were introduced to enable support of multiple architectures in the future and to make JIT code generation a special case, not a mandatory requirement. To use AsmJit include only the main `asmjit.h` header usually in form ``, don't include headers found in subdirectories. - -### Runtime & Code-Generators - -AsmJit contains two classes that are required to generate machine code. Runtime specifies where the code is generated and acts as a storage, while Code-Generator specifies how the code is generated and acts as a machine code stream. All the examples here use `asmjit::host::Compiler` class to generate the code and 'asmjit::JitRuntime` to store and run it. - -### Instruction Operands - -Operand is a part of CPU instruction which specifices the data the instruction will operate on. There are five types of operands in AsmJit: - - * *Register* - Physical register (used only by Assember) - * *Variable* - Virtual register (used only by Compiler) - * *Memory* - Location in memory - * *Label* - Location in code - * *Immediate* - Constant that is encoded with the instruction itself - -Base class for all operands is `asmjit::Operand`, but it contains only interface that can be used by all of them. Operand is a statically allocated structure that acts lika a value, not a pointer - just copy if you need multiple instances of the same operand. Since the most of the operands are architecture dependent,AsmJit always contain a base-operand structure - for example `asmjit::BaseReg` or `asmjit::BaseMem` and their architecture specific counterparts `asmjit::x86x64::GpReg` or `asmjit::x86x64::Mem`. - -When using a code-generator some operands have to be created explicitly, for example use `newLabel()` to create a label and `newGpVar()` to create a virtual general purpose register. - -### Function Prototypes - -AsmJit needs to know the prototype of the function it will generate or call. AsmJit contains a mapping between a type and the register that will be used to represent it. To make life easier there is a function builder that does the mapping on the fly. Function builder is a template class that helps with creating a function prototype by using native C/C++ types that describe function arguments and return value. It translates C/C++ native types into AsmJit specific IDs and makes these IDs accessible to Compiler. - -### Putting It All Together - -Let's put all together and generate a first function that sums its two arguments and returns the result. At the end the generated function is called from a C++ code. - -```C++ -#include - -using namespace asmjit; -using namespace asmjit::host; - -int main(int argc, char* argv[]) { - // Create JitRuntime and host specific Compiler. - JitRuntime runtime; - Compiler c(&runtime); - - // Build function having two arguments and a return value of type 'int'. - // First type in function builder describes the return value. kFuncConvHost - // tells compiler to use a host calling convention. - c.addFunc(kFuncConvHost, FuncBuilder2()); - - // Create 32-bit variables (virtual registers) and assign some names to - // them. Using names is purely optional and only greatly helps while - // debugging. - GpVar a(c, kVarTypeInt32, "a"); - GpVar b(c, kVarTypeInt32, "b"); - - // Tell asmjit to use these variables as function arguments. - c.setArg(0, a); - c.setArg(1, b); - - // a = a + b; - c.add(a, b); - - // Tell asmjit to return 'a'. - c.ret(a); - - // Finalize the current function. - c.endFunc(); - - // Now the Compiler contains the whole function, but the code is not yet - // generated. To tell compiler to generate the function make() has to be - // called. - - // Make uses the JitRuntime passed to Compiler constructor to allocate a - // buffer for the function and make it executable. - void* funcPtr = c.make(); - - // In order to run 'funcPtr' it has to be casted to the desired type. - // Typedef is a recommended and safe way to create a function-type. - typedef int (*FuncType)(int, int); - - // Using asmjit_cast is purely optional, it's basically a C-style cast - // that tries to make it visible that a function-type is returned. - FuncType func = asmjit_cast(funcPtr); - - // Finally, run it and do something with the result... - int x = func(1, 2); - printf("x=%d\n", x); // Outputs "x=3". - - // The function will remain in memory after Compiler is destroyed, but - // will be destroyed together with Runtime. This is just simple example - // where we can just destroy both at the end of the scope and that's it. - // However, it's a good practice to clean-up resources after they are - // not needed and using runtime.release() is the preferred way to free - // a function added to JitRuntime. - runtime.release((void*)func); - - // Runtime and Compiler will be destroyed at the end of the scope. - return 0; -} -``` - -The code should be self explanatory, however there are some details to be clarified. - -The code above generates and calls a function of `kFuncConvHost` calling convention. 32-bit architecture contains a wide range of function calling conventions that can be all used by a single program, so it's important to know which calling convention is used by your C/C++ compiler so you can call the function. However, most compilers should generate CDecl by default. In 64-bit mode there are only two calling conventions, one is specific for Windows (Win64 calling convention) and the other for Unix (AMD64 calling convention). The `kFuncConvHost` is defined to be one of CDecl, Win64 or AMD64 depending on your architecture and operating system. - -Default integer size is platform specific, virtual types `kVarTypeIntPtr` and `kVarTypeUIntPtr` can be used to make the code more portable and they should be always used when a pointer type is needed. When no type is specified AsmJit always defaults to `kVarTypeIntPtr`. The code above works with integers where the default behavior has been overidden to 32-bits. Note it's always a good practice to specify the type of the variable used. Alternative form of creating a variable is `c.newGpVar(...)`, `c.newMmVar(...)`, `c.newXmmVar` and so on... - -The function starts with `c.addFunc()` and ends with `c.endFunc()`. It's not allowed to put code outside of the function; however, embedding data outside of the function body is allowed. - -### Using Labels - -Labels are essential for making jumps, function calls or to refer to a data that is embedded in the code section. Label has to be explicitly created by using `newLabel()` member function of your code generator in order to be used. The following example executes a code that depends on the condition by using a `Label` and conditional jump instruction. If the first parameter is zero it returns `a + b`, otherwise `a - b`. - -```C++ -#include - -using namespace asmjit; -using namespace asmjit::host; - -int main(int argc, char* argv[]) { - JitRuntime runtime; - Compiler c(&runtime); - - // This function uses 3 arguments. - c.addFunc(kFuncConvHost, FuncBuilder3()); - - // New variable 'op' added. - GpVar op(c, kVarTypeInt32, "op"); - GpVar a(c, kVarTypeInt32, "a"); - GpVar b(c, kVarTypeInt32, "b"); - - c.setArg(0, op); - c.setArg(1, a); - c.setArg(2, b); - - // Create labels. - Label L_Subtract(c); - Label L_Skip(c); - - // If (op != 0) - // goto L_Subtract; - c.test(op, op); - c.jne(L_Subtract); - - // a = a + b; - // goto L_Skip; - c.add(a, b); - c.jmp(L_Skip); - - // L_Subtract: - // a = a - b; - c.bind(L_Subtract); - c.sub(a, b); - - // L_Skip: - c.bind(L_Skip); - - c.ret(a); - c.endFunc(); - - // The prototype of the generated function changed also here. - typedef int (*FuncType)(int, int, int); - FuncType func = asmjit_cast(c.make()); - - int x = func(0, 1, 2); - int y = func(1, 1, 2); - - printf("x=%d\n", x); // Outputs "x=3". - printf("y=%d\n", y); // Outputs "y=-1". - - runtime.release((void*)func); - return 0; -} -``` - -In this example conditional and uncondition jumps were used with labels together. Labels are created explicitly by the Compiler by passing a Compiler instance to a `Label` constructor or by using a `Label l = c.newLabel()` form. Each label as an unique ID that identifies it, however it's not a string and there is no way to query for a Label instance that already exists. Label is like any other operand moved by value so the copy of the label will still reference the same label and changing a copied will not change the original label. - -Each label has to be bound to the location in the code by using `c.bind()`; however, it can be only bound once! Trying to bind the same label multiple times has undefined behavior - it will trigger an assertion failure in the best case. - -### Memory Addressing - -X86/X64 architectures have several memory addressing modes which can be used to combine base register, index register and a displacement. In addition, index register can be shifted by a constant from 1 to 3 that can help with addressing elements up to 8-byte long in an array. AsmJit supports all forms of memory addressing. Memory operand can be created by using `asmjit::host::Mem` or by using related non-member functions like `asmjit::host::ptr` or `asmjit::host::ptr_abs`. Use `ptr` to create a memory operand having a base register with optional index register and a displacement and `ptr_abs` to create a memory operand refering to an absolute address in memory and optionally having an index register. - -In the following example various memory addressing modes are used to demonstrate how to construct and use memory operands. It creates a function that accepts an array and two indexes which specify which elements to sum and return. - -```C++ -#include - -using namespace asmjit; -using namespace asmjit::host; - -int main(int argc, char* argv[]) { - JitRuntime runtime; - Compiler c(&runtime); - - // Function returning 'int' accepting pointer and two indexes. - c.addFunc(kFuncConvHost, FuncBuilder3()); - - GpVar p(c, kVarTypeIntPtr, "p"); - GpVar aIndex(c, kVarTypeIntPtr, "aIndex"); - GpVar bIndex(c, kVarTypeIntPtr, "bIndex"); - - c.setArg(0, p); - c.setArg(1, aIndex); - c.setArg(2, bIndex); - - GpVar a(c, kVarTypeInt32, "a"); - GpVar b(c, kVarTypeInt32, "b"); - - // Read 'a' by using a memory operand having base register, index register - // and scale. Translates to 'mov a, dword ptr [p + aIndex << 2]'. - c.mov(a, ptr(p, aIndex, 2)); - - // Read 'b' by using a memory operand having base register only. Variables - // 'p' and 'bIndex' are both modified. - - // Shift bIndex by 2 (exactly the same as multiplying by 4). - // And add scaled 'bIndex' to 'p' resulting in 'p = p + bIndex * 4'. - c.shl(bIndex, 2); - c.add(p, bIndex); - - // Read 'b'. - c.mov(b, ptr(p)); - - // a = a + b; - c.add(a, b); - - c.ret(a); - c.endFunc(); - - // The prototype of the generated function changed also here. - typedef int (*FuncType)(const int*, intptr_t, intptr_t); - FuncType func = asmjit_cast(c.make()); - - // Array passed to 'func' - const int array[] = { 1, 2, 3, 5, 8, 13 }; - - int x = func(array, 1, 2); - int y = func(array, 3, 5); - - printf("x=%d\n", x); // Outputs "x=5". - printf("y=%d\n", y); // Outputs "y=18". - - runtime.release((void*)func); - return 0; -} -``` - -### Using Stack - -AsmJit uses stack automatically to spill variables if there is not enough registers to keep them all allocated. Stack is allocated automatically by Compiler and it's not allowed to manipulate it directly. However, Compiler provides an interface to allocate chunks of memory of user specified size and alignment on the stack. - -In the following example a stack of 256 bytes size is allocated, filled by bytes starting from 0 to 255 and then iterated again to sum all the values. - -```C++ -#include - -using namespace asmjit; -using namespace asmjit::host; - -int main(int argc, char* argv[]) { - JitRuntime runtime; - Compiler c(&runtime); - - // Function returning 'int' without any arguments. - c.addFunc(kFuncConvHost, FuncBuilder0()); - - // Allocate a function stack of size 256 aligned to 4 bytes. - Mem stack = c.newStack(256, 4); - - GpVar p(c, kVarTypeIntPtr, "p"); - GpVar i(c, kVarTypeIntPtr, "i"); - - // Load a stack address to 'p'. This step is purely optional and shows - // that 'lea' is useful to load a memory operands address (even absolute) - // to a general purpose register. - c.lea(p, stack); - - // Clear 'i'. Notice that xor_() is used instead of xor(), because xor is - // unfortunately a keyword in C++. - c.xor_(i, i); - - // First loop, fill the stack allocated by a sequence of bytes from 0 to 255. - Label L1(c); - c.bind(L1); - - // Mov [p + i], i. - // - // Any operand can be cloned and modified. By cloning 'stack' and calling - // 'setIndex' we created a new memory operand based on stack having an - // index register set. - c.mov(stack.clone().setIndex(i), i.r8()); - - // if (++i < 256) - // goto L1; - c.inc(i); - c.cmp(i, 256); - c.jb(L1); - - // Second loop, sum all bytes stored in 'stack'. - GpVar a(c, kVarTypeInt32, "a"); - GpVar t(c, kVarTypeInt32, "t"); - - c.xor_(i, i); - c.xor_(a, a); - - Label L2(c); - c.bind(L2); - - // Movzx t, byte ptr [stack + i] - c.movzx(t, stack.clone().setIndex(i).setSize(1)); - // a += t; - c.add(a, t); - - // if (++i < 256) - // goto L2; - c.inc(i); - c.cmp(i, 256); - c.jb(L2); - - c.ret(a); - c.endFunc(); - - typedef int (*FuncType)(void); - - FuncType func = asmjit_cast(c.make()); - printf("a=%d\n", func()); // Outputs "a=32640". - - runtime.release((void*)func); - return 0; -} -``` - -### Using Constant Pool - -To be documented. - -Advanced Features ------------------ - -AsmJit offers much more, but not everything can fit into the introduction. The following sections don't have complete examples, but contain hints that can be useful and can change a bit the way AsmJit is used. - -### Logging and Error Handling - -Failures are common when working at machine level. AsmJit does already a good job by using overloaded functions per instruction to prevent from emitting semantically incorrect code. However, AsmJit can't prevent you from emitting code that is semantically correct, but doesn't do what it it supposed to do. Logging has always been an important part of AsmJit's infrastructure and the output can be very valuable after something went wrong. - -To be documented. - -### Code Injection - -Code injection was one of key concepts of Compiler from the beginning. Compiler records all emitted instructions in a double-linked list which can be manipulated before `make()` is called. Any call to Compiler that adds instruction, function or anything else in fact manipulates this list by inserting nodes into it. - -To manipulate the current cursor use Compiler's `getCursor()` and `setCursor()` member functions. The following snippet demonstrates the proper way of code injection. - -```C++ -Compiler c(...); - -GpVar a(c, kVarTypeInt32, "a"); -GpVar b(c, kVarTypeInt32, "b"); - -BaseNode* here = c.getCursor(); -c.mov(b, 2); - -// Now, 'here' can be used to inject something before 'mov b, 2'. To inject -// anything it's good to remember the current cursor so it can be set back -// after the injecting is done. When setCursor() is called it returns the old -// cursor. -BaseNode* oldCursor = c.setCursor(here); -c.mov(a, 1); -c.setCursor(oldCursor); -``` - -The resulting code would look like: - -``` -c.mov(a, 1); -c.mov(b, 2); -``` - -License -------- - -AsmJit can be distributed under zlib license: - - * - -Contact Authors & Maintainers ------------------------------ - - * Petr Kobalicek +AsmJit +====== + +Complete x86/x64 JIT and Remote Assembler for C++. + +Official Repository +------------------- + +https://github.com/kobalicekp/asmjit + +Support the Project +------------------- + +[![Donate](https://www.paypalobjects.com/en_US/i/btn/btn_donate_LG.gif)]( + https://www.paypal.com/cgi-bin/webscr?cmd=_donations&business=QDRM6SRNG7378&lc=EN;&item_name=asmjit¤cy_code=EUR) + +Introduction +------------ + +AsmJit is a complete JIT and remote assembler for C++ language. It can generate native code for x86 and x64 architectures and supports the whole x86/x64 instruction set (from legacy MMX to the newest AVX2). It has a type-safe API that allows C++ compiler to do a semantic checks at compile-time even before the assembled code is generated or run. + +AsmJit is not a virtual machine nor tries to be. It's a general purpose tool that can be used to encode assembly instructions into their machine code representations and tries to make such process easy and fun. AsmJit has been used so far in software encryption, image/sound processing, emulators and as a JIT backend in virtual machines. + +Features +-------- + + * Complete x86/x64 instruction set - MMX, SSE, AVX, BMI, XOP, FMA..., + * Low-level and high-level code generation, + * Built-in CPU detection, + * Virtual Memory management, + * Pretty logging and error handling, + * Small and embeddable, around 150-200kB compiled, + * Zero dependencies, not even STL or RTTI. + +Supported Environments +---------------------- + +### Operating Systems + + * BSDs + * Linux + * Mac + * Windows + +### C++ Compilers + + * BorlandC++ + * GNU (3.4.X+, 4.0+, MinGW) + * MSVC (VS2005+) + * Other compilers require testing + +### Backends + + * X86 + * X64 + +Project Organization +-------------------- + + - project root / + - src - Source code + - asmjit - Public header files (always include from here) + - base - Base files, used by the AsmJit and all backends + - contrib - Contributions that extends base functionality + - x86 - X86/X64 specific files, used only by X86/X64 backend + - tools - Tools used for configuring, documenting and generating files + +Code Generation Concepts +------------------------ + +AsmJit has two completely different code generation concepts. The difference is in how the code is generated. The first concept, also referred as the low level concept, is called 'Assembler' and it's the same as writing RAW assembly by using physical registers directly. In this case AsmJit does only instruction encoding, verification and relocation. + +The second concept, also referred as the high level concept, is called 'Compiler'. Compiler lets you use virtually unlimited number of registers (called variables) significantly simplifying the code generation process. Compiler allocates these virtual registers to physical registers after the code generation is done. This requires some extra effort - Compiler has to generate information for each node (instruction, function declaration, function call) in the code, perform a variable liveness analysis and translate the code having variables into code having only registers. + +In addition, Compiler understands functions and function calling conventions. It has been designed in a way that the code generated is always a function having prototype like in a programming language. By having a function prototype the Compiler is able to insert prolog and epilog to a function being generated and it is able to call a function inside a generated one. + +There is no conclusion on which concept is better. Assembler brings full control on how the code is generated, while Compiler makes the generation easier and more portable. + +Configuring & Building +---------------------- + +AsmJit is designed to be easy embeddable in any project. However, it has some compile-time flags that can be used to build a specific version of AsmJit including or omitting certain features: + +### Library Type + + * *ASMJIT_EMBED* - Parameter that can be set to cmake to turn off building library, useful if you want to include asmjit in your project without building the library. + * *ASMJIT_STATIC* - Define when building AsmJit as a static library. No symbols will be exported by AsmJit by default. + * *ASMJIT_API* - This is AsmJit API decorator that is used in all functions that has to be exported. It can be redefined, however it's not a recommended way. + * By default AsmJit build is configured as a shared library and *ASMJIT_API* contains compiler specific attributes to import/export AsmJit symbols. + +### Backends + + * *ASMJIT_BUILD_X86* - Always build x86 backend regardless of host architecture. + * *ASMJIT_BUILD_X64* - Always build x64 backend regardless of host architecture. + * *ASMJIT_BUILD_HOST* - Always build host backand, if only *ASMJIT_BUILD_HOST* is used only the host architecture detected at compile-time will be included. + * By default only *ASMJIT_BUILD_HOST* is defined. + +### Build Mode + + * *ASMJIT_DEBUG* - Define to always turn debugging on (regardless of build-mode). + * *ASMJIT_RELEASE* - Define to always turn debugging off (regardless of build-mode). + * By default none of these is defined, AsmJit detects mode based on compile-time macros (useful when using IDE that has switches for Debug/Release/etc...). + + +To build AsmJit please use cmake that will generate project files for your favorite IDE and platform. If you don't use cmake and you still want to include AsmJit in your project it's perfectly fine by just including it there, probably defining *ASMJIT_STATIC* to prevent AsmJit trying to export the API. + +Using AsmJit +------------ + +AsmJit test suite contains up-to-date tests that can be used as a starting point. Base concepts are discussed below. Most of the constructs will work in pure Assembler if variables are replaced by registers and functions prologs/epilogs hand coded. The Compiler is used just to make things simple and most of users prefer it anyway. To use AsmJit basic skills to setup your environment are required and not discussed here. + +AsmJit library uses one global namespace called `asmjit` which contains the basics. Architecture specific code is nested, for example x86 support is in `asmjit::x86`, x64 support is in `asmjit::x64` and shared x86/x64 in `asmjit::x86x64`. To make things simple AsmJit provides `asmjit::host` namespace which imports namespace of the detected host architecture automatically. Nested namespaces were introduced to enable support of multiple architectures in the future and to make JIT code generation a special case, not a mandatory requirement. To use AsmJit include only the main `asmjit.h` header usually in form ``, don't include headers found in subdirectories. + +### Runtime & Code-Generators + +AsmJit contains two classes that are required to generate machine code. Runtime specifies where the code is generated and acts as a storage, while Code-Generator specifies how the code is generated and acts as a machine code stream. All the examples here use `asmjit::host::Compiler` class to generate the code and 'asmjit::JitRuntime` to store and run it. + +### Instruction Operands + +Operand is a part of CPU instruction which specifices the data the instruction will operate on. There are five types of operands in AsmJit: + + * *Register* - Physical register (used only by Assember) + * *Variable* - Virtual register (used only by Compiler) + * *Memory* - Location in memory + * *Label* - Location in code + * *Immediate* - Constant that is encoded with the instruction itself + +Base class for all operands is `asmjit::Operand`, but it contains only interface that can be used by all of them. Operand is a statically allocated structure that acts lika a value, not a pointer - just copy if you need multiple instances of the same operand. Since the most of the operands are architecture dependent,AsmJit always contain a base-operand structure - for example `asmjit::BaseReg` or `asmjit::BaseMem` and their architecture specific counterparts `asmjit::x86x64::GpReg` or `asmjit::x86x64::Mem`. + +When using a code-generator some operands have to be created explicitly, for example use `newLabel()` to create a label and `newGpVar()` to create a virtual general purpose register. + +### Function Prototypes + +AsmJit needs to know the prototype of the function it will generate or call. AsmJit contains a mapping between a type and the register that will be used to represent it. To make life easier there is a function builder that does the mapping on the fly. Function builder is a template class that helps with creating a function prototype by using native C/C++ types that describe function arguments and return value. It translates C/C++ native types into AsmJit specific IDs and makes these IDs accessible to Compiler. + +### Putting It All Together + +Let's put all together and generate a first function that sums its two arguments and returns the result. At the end the generated function is called from a C++ code. + +```C++ +#include + +using namespace asmjit; +using namespace asmjit::host; + +int main(int argc, char* argv[]) { + // Create JitRuntime and host specific Compiler. + JitRuntime runtime; + Compiler c(&runtime); + + // Build function having two arguments and a return value of type 'int'. + // First type in function builder describes the return value. kFuncConvHost + // tells compiler to use a host calling convention. + c.addFunc(kFuncConvHost, FuncBuilder2()); + + // Create 32-bit variables (virtual registers) and assign some names to + // them. Using names is purely optional and only greatly helps while + // debugging. + GpVar a(c, kVarTypeInt32, "a"); + GpVar b(c, kVarTypeInt32, "b"); + + // Tell asmjit to use these variables as function arguments. + c.setArg(0, a); + c.setArg(1, b); + + // a = a + b; + c.add(a, b); + + // Tell asmjit to return 'a'. + c.ret(a); + + // Finalize the current function. + c.endFunc(); + + // Now the Compiler contains the whole function, but the code is not yet + // generated. To tell compiler to generate the function make() has to be + // called. + + // Make uses the JitRuntime passed to Compiler constructor to allocate a + // buffer for the function and make it executable. + void* funcPtr = c.make(); + + // In order to run 'funcPtr' it has to be casted to the desired type. + // Typedef is a recommended and safe way to create a function-type. + typedef int (*FuncType)(int, int); + + // Using asmjit_cast is purely optional, it's basically a C-style cast + // that tries to make it visible that a function-type is returned. + FuncType func = asmjit_cast(funcPtr); + + // Finally, run it and do something with the result... + int x = func(1, 2); + printf("x=%d\n", x); // Outputs "x=3". + + // The function will remain in memory after Compiler is destroyed, but + // will be destroyed together with Runtime. This is just simple example + // where we can just destroy both at the end of the scope and that's it. + // However, it's a good practice to clean-up resources after they are + // not needed and using runtime.release() is the preferred way to free + // a function added to JitRuntime. + runtime.release((void*)func); + + // Runtime and Compiler will be destroyed at the end of the scope. + return 0; +} +``` + +The code should be self explanatory, however there are some details to be clarified. + +The code above generates and calls a function of `kFuncConvHost` calling convention. 32-bit architecture contains a wide range of function calling conventions that can be all used by a single program, so it's important to know which calling convention is used by your C/C++ compiler so you can call the function. However, most compilers should generate CDecl by default. In 64-bit mode there are only two calling conventions, one is specific for Windows (Win64 calling convention) and the other for Unix (AMD64 calling convention). The `kFuncConvHost` is defined to be one of CDecl, Win64 or AMD64 depending on your architecture and operating system. + +Default integer size is platform specific, virtual types `kVarTypeIntPtr` and `kVarTypeUIntPtr` can be used to make the code more portable and they should be always used when a pointer type is needed. When no type is specified AsmJit always defaults to `kVarTypeIntPtr`. The code above works with integers where the default behavior has been overidden to 32-bits. Note it's always a good practice to specify the type of the variable used. Alternative form of creating a variable is `c.newGpVar(...)`, `c.newMmVar(...)`, `c.newXmmVar` and so on... + +The function starts with `c.addFunc()` and ends with `c.endFunc()`. It's not allowed to put code outside of the function; however, embedding data outside of the function body is allowed. + +### Using Labels + +Labels are essential for making jumps, function calls or to refer to a data that is embedded in the code section. Label has to be explicitly created by using `newLabel()` member function of your code generator in order to be used. The following example executes a code that depends on the condition by using a `Label` and conditional jump instruction. If the first parameter is zero it returns `a + b`, otherwise `a - b`. + +```C++ +#include + +using namespace asmjit; +using namespace asmjit::host; + +int main(int argc, char* argv[]) { + JitRuntime runtime; + Compiler c(&runtime); + + // This function uses 3 arguments. + c.addFunc(kFuncConvHost, FuncBuilder3()); + + // New variable 'op' added. + GpVar op(c, kVarTypeInt32, "op"); + GpVar a(c, kVarTypeInt32, "a"); + GpVar b(c, kVarTypeInt32, "b"); + + c.setArg(0, op); + c.setArg(1, a); + c.setArg(2, b); + + // Create labels. + Label L_Subtract(c); + Label L_Skip(c); + + // If (op != 0) + // goto L_Subtract; + c.test(op, op); + c.jne(L_Subtract); + + // a = a + b; + // goto L_Skip; + c.add(a, b); + c.jmp(L_Skip); + + // L_Subtract: + // a = a - b; + c.bind(L_Subtract); + c.sub(a, b); + + // L_Skip: + c.bind(L_Skip); + + c.ret(a); + c.endFunc(); + + // The prototype of the generated function changed also here. + typedef int (*FuncType)(int, int, int); + FuncType func = asmjit_cast(c.make()); + + int x = func(0, 1, 2); + int y = func(1, 1, 2); + + printf("x=%d\n", x); // Outputs "x=3". + printf("y=%d\n", y); // Outputs "y=-1". + + runtime.release((void*)func); + return 0; +} +``` + +In this example conditional and uncondition jumps were used with labels together. Labels are created explicitly by the Compiler by passing a Compiler instance to a `Label` constructor or by using a `Label l = c.newLabel()` form. Each label as an unique ID that identifies it, however it's not a string and there is no way to query for a Label instance that already exists. Label is like any other operand moved by value so the copy of the label will still reference the same label and changing a copied will not change the original label. + +Each label has to be bound to the location in the code by using `c.bind()`; however, it can be only bound once! Trying to bind the same label multiple times has undefined behavior - it will trigger an assertion failure in the best case. + +### Memory Addressing + +X86/X64 architectures have several memory addressing modes which can be used to combine base register, index register and a displacement. In addition, index register can be shifted by a constant from 1 to 3 that can help with addressing elements up to 8-byte long in an array. AsmJit supports all forms of memory addressing. Memory operand can be created by using `asmjit::host::Mem` or by using related non-member functions like `asmjit::host::ptr` or `asmjit::host::ptr_abs`. Use `ptr` to create a memory operand having a base register with optional index register and a displacement and `ptr_abs` to create a memory operand refering to an absolute address in memory and optionally having an index register. + +In the following example various memory addressing modes are used to demonstrate how to construct and use memory operands. It creates a function that accepts an array and two indexes which specify which elements to sum and return. + +```C++ +#include + +using namespace asmjit; +using namespace asmjit::host; + +int main(int argc, char* argv[]) { + JitRuntime runtime; + Compiler c(&runtime); + + // Function returning 'int' accepting pointer and two indexes. + c.addFunc(kFuncConvHost, FuncBuilder3()); + + GpVar p(c, kVarTypeIntPtr, "p"); + GpVar aIndex(c, kVarTypeIntPtr, "aIndex"); + GpVar bIndex(c, kVarTypeIntPtr, "bIndex"); + + c.setArg(0, p); + c.setArg(1, aIndex); + c.setArg(2, bIndex); + + GpVar a(c, kVarTypeInt32, "a"); + GpVar b(c, kVarTypeInt32, "b"); + + // Read 'a' by using a memory operand having base register, index register + // and scale. Translates to 'mov a, dword ptr [p + aIndex << 2]'. + c.mov(a, ptr(p, aIndex, 2)); + + // Read 'b' by using a memory operand having base register only. Variables + // 'p' and 'bIndex' are both modified. + + // Shift bIndex by 2 (exactly the same as multiplying by 4). + // And add scaled 'bIndex' to 'p' resulting in 'p = p + bIndex * 4'. + c.shl(bIndex, 2); + c.add(p, bIndex); + + // Read 'b'. + c.mov(b, ptr(p)); + + // a = a + b; + c.add(a, b); + + c.ret(a); + c.endFunc(); + + // The prototype of the generated function changed also here. + typedef int (*FuncType)(const int*, intptr_t, intptr_t); + FuncType func = asmjit_cast(c.make()); + + // Array passed to 'func' + const int array[] = { 1, 2, 3, 5, 8, 13 }; + + int x = func(array, 1, 2); + int y = func(array, 3, 5); + + printf("x=%d\n", x); // Outputs "x=5". + printf("y=%d\n", y); // Outputs "y=18". + + runtime.release((void*)func); + return 0; +} +``` + +### Using Stack + +AsmJit uses stack automatically to spill variables if there is not enough registers to keep them all allocated. Stack is allocated automatically by Compiler and it's not allowed to manipulate it directly. However, Compiler provides an interface to allocate chunks of memory of user specified size and alignment on the stack. + +In the following example a stack of 256 bytes size is allocated, filled by bytes starting from 0 to 255 and then iterated again to sum all the values. + +```C++ +#include + +using namespace asmjit; +using namespace asmjit::host; + +int main(int argc, char* argv[]) { + JitRuntime runtime; + Compiler c(&runtime); + + // Function returning 'int' without any arguments. + c.addFunc(kFuncConvHost, FuncBuilder0()); + + // Allocate a function stack of size 256 aligned to 4 bytes. + Mem stack = c.newStack(256, 4); + + GpVar p(c, kVarTypeIntPtr, "p"); + GpVar i(c, kVarTypeIntPtr, "i"); + + // Load a stack address to 'p'. This step is purely optional and shows + // that 'lea' is useful to load a memory operands address (even absolute) + // to a general purpose register. + c.lea(p, stack); + + // Clear 'i'. Notice that xor_() is used instead of xor(), because xor is + // unfortunately a keyword in C++. + c.xor_(i, i); + + // First loop, fill the stack allocated by a sequence of bytes from 0 to 255. + Label L1(c); + c.bind(L1); + + // Mov [p + i], i. + // + // Any operand can be cloned and modified. By cloning 'stack' and calling + // 'setIndex' we created a new memory operand based on stack having an + // index register set. + c.mov(stack.clone().setIndex(i), i.r8()); + + // if (++i < 256) + // goto L1; + c.inc(i); + c.cmp(i, 256); + c.jb(L1); + + // Second loop, sum all bytes stored in 'stack'. + GpVar a(c, kVarTypeInt32, "a"); + GpVar t(c, kVarTypeInt32, "t"); + + c.xor_(i, i); + c.xor_(a, a); + + Label L2(c); + c.bind(L2); + + // Movzx t, byte ptr [stack + i] + c.movzx(t, stack.clone().setIndex(i).setSize(1)); + // a += t; + c.add(a, t); + + // if (++i < 256) + // goto L2; + c.inc(i); + c.cmp(i, 256); + c.jb(L2); + + c.ret(a); + c.endFunc(); + + typedef int (*FuncType)(void); + + FuncType func = asmjit_cast(c.make()); + printf("a=%d\n", func()); // Outputs "a=32640". + + runtime.release((void*)func); + return 0; +} +``` + +### Using Constant Pool + +To be documented. + +Advanced Features +----------------- + +AsmJit offers much more, but not everything can fit into the introduction. The following sections don't have complete examples, but contain hints that can be useful and can change a bit the way AsmJit is used. + +### Logging and Error Handling + +Failures are common when working at machine level. AsmJit does already a good job by using overloaded functions per instruction to prevent from emitting semantically incorrect code. However, AsmJit can't prevent you from emitting code that is semantically correct, but doesn't do what it it supposed to do. Logging has always been an important part of AsmJit's infrastructure and the output can be very valuable after something went wrong. + +To be documented. + +### Code Injection + +Code injection was one of key concepts of Compiler from the beginning. Compiler records all emitted instructions in a double-linked list which can be manipulated before `make()` is called. Any call to Compiler that adds instruction, function or anything else in fact manipulates this list by inserting nodes into it. + +To manipulate the current cursor use Compiler's `getCursor()` and `setCursor()` member functions. The following snippet demonstrates the proper way of code injection. + +```C++ +Compiler c(...); + +GpVar a(c, kVarTypeInt32, "a"); +GpVar b(c, kVarTypeInt32, "b"); + +BaseNode* here = c.getCursor(); +c.mov(b, 2); + +// Now, 'here' can be used to inject something before 'mov b, 2'. To inject +// anything it's good to remember the current cursor so it can be set back +// after the injecting is done. When setCursor() is called it returns the old +// cursor. +BaseNode* oldCursor = c.setCursor(here); +c.mov(a, 1); +c.setCursor(oldCursor); +``` + +The resulting code would look like: + +``` +c.mov(a, 1); +c.mov(b, 2); +``` + +License +------- + +AsmJit can be distributed under zlib license: + + * + +Contact Authors & Maintainers +----------------------------- + + * Petr Kobalicek diff --git a/src/app/test/genblend.h b/src/app/test/genblend.h index 1ee1252..0fcd375 100644 --- a/src/app/test/genblend.h +++ b/src/app/test/genblend.h @@ -88,7 +88,7 @@ static void blend(asmjit::host::Compiler& c) { c.psrlw(a0, 8); c.punpcklbw(x0, cZero); - c.pshuflw(a0, a0, mm_shuffle(1, 1, 1, 1)); + c.pshuflw(a0, a0, X86Util::mmShuffle(1, 1, 1, 1)); c.punpcklbw(y0, cZero); c.pmullw(x0, a0); @@ -136,8 +136,8 @@ static void blend(asmjit::host::Compiler& c) { c.punpckhbw(x1, cZero); c.punpckhwd(a1, a1); - c.pshufd(a0, a0, mm_shuffle(3, 3, 1, 1)); - c.pshufd(a1, a1, mm_shuffle(3, 3, 1, 1)); + c.pshufd(a0, a0, X86Util::mmShuffle(3, 3, 1, 1)); + c.pshufd(a1, a1, X86Util::mmShuffle(3, 3, 1, 1)); c.pmullw(x0, a0); c.pmullw(x1, a1); @@ -166,7 +166,7 @@ static void blend(asmjit::host::Compiler& c) { c.endFunc(); // Data. - c.align(16); + c.align(kAlignData, 16); c.bind(L_Data); c.dxmm(XmmData::fromSw(0x0080)); c.dxmm(XmmData::fromSw(0x0101)); diff --git a/src/app/test/genopcode.h b/src/app/test/genopcode.h index 73fe726..f2ae7fc 100644 --- a/src/app/test/genopcode.h +++ b/src/app/test/genopcode.h @@ -268,6 +268,87 @@ static void opcode(asmjit::host::Assembler& a) { a.xor_(intptr_gp0, gp1); a.xor_(intptr_gp0, 0); + // Label...Jcc/Jecxz/Jmp. + { + a.nop(); + + Label L(a); + a.bind(L); + + a.ja(L); + a.jae(L); + a.jb(L); + a.jbe(L); + a.jc(L); + a.je(L); + a.jg(L); + a.jge(L); + a.jl(L); + a.jle(L); + a.jna(L); + a.jnae(L); + a.jnb(L); + a.jnbe(L); + a.jnc(L); + a.jne(L); + a.jng(L); + a.jnge(L); + a.jnl(L); + a.jnle(L); + a.jno(L); + a.jnp(L); + a.jns(L); + a.jnz(L); + a.jo(L); + a.jp(L); + a.jpe(L); + a.jpo(L); + a.js(L); + a.jz(L); + a.jecxz(ecx, L); + a.jmp(L); + } + + // Jcc/Jecxz/Jmp...Label. + { + a.nop(); + + Label L(a); + a.ja(L); + a.jae(L); + a.jb(L); + a.jbe(L); + a.jc(L); + a.je(L); + a.jg(L); + a.jge(L); + a.jl(L); + a.jle(L); + a.jna(L); + a.jnae(L); + a.jnb(L); + a.jnbe(L); + a.jnc(L); + a.jne(L); + a.jng(L); + a.jnge(L); + a.jnl(L); + a.jnle(L); + a.jno(L); + a.jnp(L); + a.jns(L); + a.jnz(L); + a.jo(L); + a.jp(L); + a.jpe(L); + a.jpo(L); + a.js(L); + a.jz(L); + a.jecxz(ecx, L); + a.jmp(L); + a.bind(L); + } + // Fpu. a.nop(); diff --git a/src/app/test/testsizeof.cpp b/src/app/test/testsizeof.cpp index feeb9b3..61582c5 100644 --- a/src/app/test/testsizeof.cpp +++ b/src/app/test/testsizeof.cpp @@ -59,7 +59,7 @@ int main(int argc, char* argv[]) { printf(" asmjit::LabelData : %u\n", static_cast(sizeof(LabelData))); printf(" asmjit::RelocData : %u\n", static_cast(sizeof(RelocData))); printf("\n"); - printf(" asmjit::BaseNode : %u\n", static_cast(sizeof(BaseNode))); + printf(" asmjit::Node : %u\n", static_cast(sizeof(Node))); printf(" asmjit::AlignNode : %u\n", static_cast(sizeof(AlignNode))); printf(" asmjit::CallNode : %u\n", static_cast(sizeof(CallNode))); printf(" asmjit::CommentNode : %u\n", static_cast(sizeof(CommentNode))); diff --git a/src/asmjit/asmjit.h b/src/asmjit/asmjit.h index 3ae2d86..baf1c6c 100644 --- a/src/asmjit/asmjit.h +++ b/src/asmjit/asmjit.h @@ -56,19 +56,315 @@ //! //! @section AsmJit_Main_CodeGeneration Code Generation //! -//! - @ref asmjit_base "Assembler core" - Operands, intrinsics and low-level assembler. +//! - @ref asmjit_base_general "Assembler core" - Operands, intrinsics and low-level assembler. //! - @ref asmjit_compiler "Compiler" - High level code generation. //! - @ref asmjit_cpuinfo "Cpu Information" - Get information about host processor. //! - @ref asmjit_logging "Logging" - Logging and error handling. //! - @ref AsmJit_MemoryManagement "Memory Management" - Virtual memory management. //! -//! @section AsmJit_Main_Configuration Configuration, Definitions and Utilities -//! -//! - @ref asmjit_config "Configuration" - Macros used to configure AsmJit. -//! //! @section AsmJit_Main_HomePage AsmJit Homepage //! -//! - http://code.google.com/p/asmjit/ +//! - https://github.com/kobalicekp/asmjit + +// ============================================================================ +// [asmjit_base] +// ============================================================================ + +//! \defgroup asmjit_base AsmJit +//! +//! \brief AsmJit. + +// ============================================================================ +// [asmjit_base_general] +// ============================================================================ + +//! \defgroup asmjit_base_general AsmJit General API +//! \ingroup asmjit_base +//! +//! \brief AsmJit general API. +//! +//! Contains all `asmjit` classes and helper functions that are architecture +//! independent or abstract. Abstract classes are implemented by the backend, +//! for example `BaseAssembler` is implemented by `x86x64::X86X64Assembler`. +//! +//! - See `BaseAssembler` for low level code generation documentation. +//! - See `BaseCompiler` for high level code generation documentation. +//! - See `Operand` for operand's overview. +//! +//! Logging and Error Handling +//! -------------------------- +//! +//! AsmJit contains robust interface that can be used to log the generated code +//! and to handle possible errors. Base logging interface is defined in `Logger` +//! class that is abstract and can be overridden. AsmJit contains two loggers +//! that can be used out of the box - `FileLogger` that logs into a pure C +//! `FILE*` stream and `StringLogger` that just concatenates all log messages +//! by using a `StringBuilder` class. +//! +//! The following snippet shows how to setup a logger that logs to `stderr`: +//! +//! ~~~ +//! // `FileLogger` instance. +//! FileLogger logger(stderr); +//! +//! // `Compiler` or any other `CodeGen` interface. +//! host::Compiler c; +//! +//! // use `setLogger` to replace the `CodeGen` logger. +//! c.setLogger(&logger); +//! ~~~ +//! +//! \sa \ref Logger, \ref FileLogger, \ref StringLogger. + +// ============================================================================ +// [asmjit_base_tree] +// ============================================================================ + +//! \defgroup asmjit_base_tree AsmJit Code-Tree +//! \ingroup asmjit_base +//! +//! \brief AsmJit code-tree used by Compiler. +//! +//! AsmJit intermediate code-tree is a double-linked list that is made of nodes +//! that represent assembler instructions, directives, labels and high-level +//! constructs compiler is using to represent functions and function calls. The +//! node list can only be used together with \ref BaseCompiler. +//! +//! TODO + +// ============================================================================ +// [asmjit_base_util] +// ============================================================================ + +//! \defgroup asmjit_base_util AsmJit Utilities +//! \ingroup asmjit_base +//! +//! \brief AsmJit utility classes. +//! +//! AsmJit contains numerous utility classes that are needed by the library +//! itself. The most useful ones have been made public and are now exported. +//! +//! POD Containers +//! -------------- +//! +//! POD containers are used by AsmJit to manage its own data structures. The +//! following classes can be used by AsmJit consumers: +//! +//! - \ref PodVector - Simple growing array-like container for POD data. +//! - \ref StringBuilder - Simple string builder that can append string +//! and integers. +//! +//! Zone Memory Allocator +//! --------------------- +//! +//! Zone memory allocator is an incremental memory allocator that can be used +//! to allocate data of short life-time. It has much better performance +//! characteristics than all other allocators, because the only thing it can do +//! is to increment a pointer and return its previous address. See \ref Zone +//! for more details. +//! +//! CPU Ticks +//! --------- +//! +//! CPU Ticks is a simple helper that can be used to do basic benchmarks. See +//! \ref CpuTicks class for more details. +//! +//! Integer Utilities +//! ----------------- +//! +//! Integer utilities are all implemented by a static class \ref IntUtil. +//! There are utilities for bit manipulation and bit counting, utilities to get +//! an integer minimum / maximum and various other helpers required to perform +//! alignment checks and binary casting from float to integer and vica versa. +//! +//! Vector Utilities +//! ---------------- +//! +//! SIMD code generation often requires to embed constants after each function +//! or a block of functions generated. AsmJit contains classes `Vec64Data`, +//! `Vec128Data` and `Vec256Data` that can be used to prepare data useful when +//! generating SIMD code. +//! +//! X86/X64 code generator contains member functions `dmm`, `dxmm` and `dymm` +//! which can be used to embed 64-bit, 128-bit and 256-bit data structures into +//! machine code (both assembler and compiler are supported). +//! +//! \note Compiler contains a constant pool, which should be used instead of +//! embedding constants manually after the function body. + +// ============================================================================ +// [asmjit_x86x64] +// ============================================================================ + +//! \defgroup asmjit_x86x64 X86/X64 +//! +//! \brief X86/X64 module + +// ============================================================================ +// [asmjit_x86x64_general] +// ============================================================================ + +//! \defgroup asmjit_x86x64_general X86/X64 General API +//! \ingroup asmjit_x86x64 +//! +//! \brief X86/X64 general API. +//! +//! X86/X64 Registers +//! ----------------- +//! +//! There are static objects that represents X86 and X64 registers. They can +//! be used directly (like `eax`, `mm`, `xmm`, ...) or created through +//! these functions: +//! +//! - `asmjit::gpb_lo()` - Get Gpb-lo register. +//! - `asmjit::gpb_hi()` - Get Gpb-hi register. +//! - `asmjit::gpw()` - Get Gpw register. +//! - `asmjit::gpd()` - Get Gpd register. +//! - `asmjit::gpq()` - Get Gpq Gp register. +//! - `asmjit::gpz()` - Get Gpd/Gpq register. +//! - `asmjit::fp()` - Get Fp register. +//! - `asmjit::mm()` - Get Mm register. +//! - `asmjit::xmm()` - Get Xmm register. +//! - `asmjit::ymm()` - Get Ymm register. +//! +//! X86/X64 Addressing +//! ------------------ +//! +//! X86 and x64 architectures contains several addressing modes and most ones +//! are possible with AsmJit library. Memory represents are represented by +//! `BaseMem` class. These functions are used to make operands that represents +//! memory addresses: +//! +//! - `asmjit::ptr()` +//! - `asmjit::byte_ptr()` +//! - `asmjit::word_ptr()` +//! - `asmjit::dword_ptr()` +//! - `asmjit::qword_ptr()` +//! - `asmjit::tword_ptr()` +//! - `asmjit::oword_ptr()` +//! - `asmjit::yword_ptr()` +//! - `asmjit::intptr_ptr()` +//! +//! Most useful function to make pointer should be `asmjit::ptr()`. It creates +//! pointer to the target with unspecified size. Unspecified size works in all +//! intrinsics where are used registers (this means that size is specified by +//! register operand or by instruction itself). For example `asmjit::ptr()` +//! can't be used with @c asmjit::Assembler::inc() instruction. In this case +//! size must be specified and it's also reason to make difference between +//! pointer sizes. +//! +//! Supported are simple address forms `[base + displacement]` and complex +//! address forms `[base + index * scale + displacement]`. +//! +//! X86/X64 Immediates +//! ------------------ +//! +//! Immediate values are constants thats passed directly after instruction +//! opcode. To create such value use @c asmjit::imm() or @c asmjit::imm_u() +//! methods to create signed or unsigned immediate value. +//! +//! X86/X64 CPU Information +//! ----------------------- +//! +//! The CPUID instruction can be used to get an exhaustive information about +//! the host X86/X64 processor. AsmJit contains utilities that can get the most +//! important information related to the features supported by the CPU and the +//! host operating system, in addition to host processor name and number of +//! cores. Class `CpuInfo` extends `BaseCpuInfo` and provides functionality +//! specific to X86 and X64. +//! +//! By default AsmJit queries the CPU information after the library is loaded +//! and the queried information is reused by all instances of `JitRuntime`. +//! The global instance of `CpuInfo` can't be changed, because it will affect +//! the code generation of all `Runtime`s. If there is a need to have a +//! specific CPU information which contains modified features or processor +//! vendor it's possible by creating a new instance of `CpuInfo` and setting +//! up its members. `CpuUtil::detect` can be used to detect CPU features into +//! an existing `CpuInfo` instance - it may become handly if only one property +//! has to be turned on/off. +//! +//! If the high-level interface `CpuInfo` offers is not enough there is also +//! `CpuUtil::callCpuId` helper that can be used to call CPUID instruction with +//! a given parameters and to consume the output. +//! +//! Cpu detection is important when generating a JIT code that may or may not +//! use certain CPU features. For example there used to be a SSE/SSE2 detection +//! in the past and today there is often AVX/AVX2 detection. +//! +//! The example below shows how to detect SSE2: +//! +//! ~~~ +//! using namespace asmjit; +//! using namespace asmjit::host; +//! +//! // Get `CpuInfo` global instance. +//! const CpuInfo* cpuInfo = CpuInfo::getHost(); +//! +//! if (cpuInfo->hasFeature(kCpuFeatureSse2)) { +//! // Processor has SSE2. +//! } +//! else if (cpuInfo->hasFeature(kCpuFeatureMmx)) { +//! // Processor doesn't have SSE2, but has MMX. +//! } +//! else { +//! // Processor is archaic; it's a wonder AsmJit works here! +//! } +//! ~~~ +//! +//! The next example shows how to call `CPUID` directly: +//! +//! ~~~ +//! using namespace asmjit; +//! +//! // Call cpuid, first two arguments are passed in Eax/Ecx. +//! CpuId out; +//! CpuUtil::callCpuId(0, 0, &out); +//! +//! // If Eax argument is 0, Ebx, Ecx and Edx registers are filled with a cpu vendor. +//! char cpuVendor[13]; +//! ::memcpy(cpuVendor, &out.ebx, 4); +//! ::memcpy(cpuVendor + 4, &out.edx, 4); +//! ::memcpy(cpuVendor + 8, &out.ecx, 4); +//! vendor[12] = '\0'; +//! +//! // Print a CPU vendor retrieved from CPUID. +//! ::printf("%s", cpuVendor); +//! ~~~ + +// ============================================================================ +// [asmjit_x86x64_tree] +// ============================================================================ + +//! \defgroup asmjit_x86x64_tree X86/X64 Code-Tree +//! \ingroup asmjit_x86x64 +//! +//! \brief X86/X64 code-tree and helpers. + +// ============================================================================ +// [asmjit_x86x64_inst] +// ============================================================================ + +//! \defgroup asmjit_x86x64_inst X86/X64 Instructions +//! \ingroup asmjit_x86x64 +//! +//! \brief X86/X64 low-level instruction definitions. + +// ============================================================================ +// [asmjit_x86x64_util] +// ============================================================================ + +//! \defgroup asmjit_x86x64_util X86/X64 Utilities +//! \ingroup asmjit_x86x64 +//! +//! \brief X86/X64 utility classes. + +// ============================================================================ +// [asmjit_contrib] +// ============================================================================ + +//! \defgroup asmjit_contrib Contributions +//! +//! \brief Contributions. // [Dependencies - Base] #include "base.h" diff --git a/src/asmjit/base.h b/src/asmjit/base.h index 2ae5508..de448da 100644 --- a/src/asmjit/base.h +++ b/src/asmjit/base.h @@ -8,193 +8,7 @@ #ifndef _ASMJIT_BASE_H #define _ASMJIT_BASE_H -// ============================================================================ -// [asmjit_base] -// ============================================================================ - -//! @defgroup asmjit_base Base -//! -//! @brief AsmJit Base API. -//! -//! Contains all `asmjit` classes and helper functions that are architecture -//! independent or abstract. Abstract classes are implemented by the backend, -//! for example `BaseAssembler` is implemented by `x86x64::X86X64Assembler`. -//! -//! - See `BaseAssembler` for low level code generation documentation. -//! - See `BaseCompiler` for high level code generation documentation. -//! - See `Operand` for operand's overview. -//! -//! @section AsmJit_Core_Registers Registers -//! -//! There are static objects that represents X86 and X64 registers. They can -//! be used directly (like `eax`, `mm`, `xmm`, ...) or created through -//! these functions: -//! -//! - `asmjit::gpb_lo()` - Get Gpb-lo register. -//! - `asmjit::gpb_hi()` - Get Gpb-hi register. -//! - `asmjit::gpw()` - Get Gpw register. -//! - `asmjit::gpd()` - Get Gpd register. -//! - `asmjit::gpq()` - Get Gpq Gp register. -//! - `asmjit::gpz()` - Get Gpd/Gpq register. -//! - `asmjit::fp()` - Get Fp register. -//! - `asmjit::mm()` - Get Mm register. -//! - `asmjit::xmm()` - Get Xmm register. -//! - `asmjit::ymm()` - Get Ymm register. -//! -//! @section AsmJit_Core_Addressing Addressing -//! -//! X86 and x64 architectures contains several addressing modes and most ones -//! are possible with AsmJit library. Memory represents are represented by -//! `BaseMem` class. These functions are used to make operands that represents -//! memory addresses: -//! -//! - `asmjit::ptr()` -//! - `asmjit::byte_ptr()` -//! - `asmjit::word_ptr()` -//! - `asmjit::dword_ptr()` -//! - `asmjit::qword_ptr()` -//! - `asmjit::tword_ptr()` -//! - `asmjit::oword_ptr()` -//! - `asmjit::yword_ptr()` -//! - `asmjit::intptr_ptr()` -//! -//! Most useful function to make pointer should be `asmjit::ptr()`. It creates -//! pointer to the target with unspecified size. Unspecified size works in all -//! intrinsics where are used registers (this means that size is specified by -//! register operand or by instruction itself). For example `asmjit::ptr()` -//! can't be used with @c asmjit::Assembler::inc() instruction. In this case -//! size must be specified and it's also reason to make difference between -//! pointer sizes. -//! -//! Supported are simple address forms (register + displacement) and complex -//! address forms (register + (register << shift) + displacement). -//! -//! @section AsmJit_Core_Immediates Immediates -//! -//! Immediate values are constants thats passed directly after instruction -//! opcode. To create such value use @c asmjit::imm() or @c asmjit::imm_u() -//! methods to create signed or unsigned immediate value. -//! -//! @sa @c asmjit::BaseCompiler. - -// ============================================================================ -// [asmjit_base_globals] -// ============================================================================ - -//! @defgroup asmjit_base_globals Globals -//! @ingroup asmjit_base -//! -//! @brief Global definitions, macros and functions. - -// ============================================================================ -// [asmjit_base_codegen] -// ============================================================================ - -//! @defgroup asmjit_base_codegen Code Generation (Base) -//! @ingroup asmjit_base -//! -//! @brief Low-level and high-level code generation. - -// ============================================================================ -// [asmjit_base_cpu_info] -// ============================================================================ - -//! @defgroup asmjit_base_cpu_info CPU Information (Base) -//! @ingroup asmjit_base -//! -//! @brief CPU Information Interface, platform neutral. - -// ============================================================================ -// [asmjit_base_logging_and_errors] -// ============================================================================ - -//! @defgroup asmjit_base_logging_and_errors Logging and Error Handling -//! @ingroup asmjit_base -//! -//! @brief Logging and error handling. -//! -//! AsmJit contains robust interface that can be used to log the generated code -//! and to handle possible errors. Base logging interface is defined in `Logger` -//! class that is abstract and can be overridden. AsmJit contains two loggers -//! that can be used out-of-the box - `FileLogger` that logs into a `FILE*` -//! and `StringLogger` that just concatenates all log messages without sending -//! them to a stream. -//! -//! The following snippet shows how to setup a logger that logs to `stderr`: -//! -//! ~~~ -//! // `FileLogger` instance. -//! FileLogger logger(stderr); -//! -//! // `Compiler` or any other `CodeGen` interface. -//! host::Compiler c; -//! -//! // use `setLogger` to replace the `CodeGen` logger. -//! c.setLogger(&logger); -//! ~~~ -//! -//! @sa @ref `Logger`, @ref `FileLogger`, @ref `StringLogger`. - -// ============================================================================ -// [asmjit_base_util] -// ============================================================================ - -//! @defgroup asmjit_base_util Utilities -//! @ingroup asmjit_base -//! -//! @brief Utilities inside AsmJit made public. -//! -//! AsmJit contains numerous utility classes that are needed by the library -//! itself. The most useful ones have been made public and are now exported. -//! -//! POD-Containers -//! -------------- -//! -//! TODO: Documentation -//! -//! String Builder -//! -------------- -//! -//! TODO: Documentation -//! -//! Integer Utilities -//! ----------------- -//! -//! TODO: Documentation -//! -//! Zone Memory Allocator -//! --------------------- -//! -//! TODO: Documentation -//! -//! CPU Ticks -//! --------- -//! -//! TODO: Documentation - -// ============================================================================ -// [asmjit_base_vectypes] -// ============================================================================ - -//! @defgroup asmjit_base_vectypes Vector Types -//! @ingroup asmjit_base -//! -//! @brief Vector types can be used to create a data which is stored in the -//! machine code. - -// ============================================================================ -// [asmjit::] -// ============================================================================ - -//! @namespace asmjit -//! Main AsmJit library namespace. -//! -//! There are not other namespaces used in AsmJit library. - -// ============================================================================ // [Dependencies - AsmJit] -// ============================================================================ - #include "build.h" #include "base/assembler.h" @@ -203,15 +17,16 @@ #include "base/constpool.h" #include "base/cpuinfo.h" #include "base/cputicks.h" -#include "base/defs.h" #include "base/error.h" #include "base/func.h" #include "base/globals.h" #include "base/intutil.h" #include "base/lock.h" #include "base/logger.h" +#include "base/operand.h" #include "base/podlist.h" #include "base/podvector.h" +#include "base/runtime.h" #include "base/string.h" #include "base/vectypes.h" #include "base/vmem.h" diff --git a/src/asmjit/base/assembler.h b/src/asmjit/base/assembler.h index 3fad186..3661c82 100644 --- a/src/asmjit/base/assembler.h +++ b/src/asmjit/base/assembler.h @@ -10,9 +10,9 @@ // [Dependencies - AsmJit] #include "../base/codegen.h" -#include "../base/defs.h" #include "../base/error.h" #include "../base/logger.h" +#include "../base/operand.h" #include "../base/podlist.h" #include "../base/podvector.h" #include "../base/runtime.h" @@ -23,14 +23,59 @@ namespace asmjit { -//! @addtogroup asmjit_base_codegen -//! @{ +//! \addtogroup asmjit_base_general +//! \{ + +// ============================================================================ +// [asmjit::kInstCode] +// ============================================================================ + +//! Instruction codes (stub). +ASMJIT_ENUM(kInstCode) { + //! No instruction. + kInstNone = 0 +}; + +// ============================================================================ +// [asmjit::kInstOptions] +// ============================================================================ + +//! Instruction options (stub). +ASMJIT_ENUM(kInstOptions) { + //! No instruction options. + kInstOptionNone = 0x00, + + //! Emit short form of the instruction. + //! + //! X86/X64: + //! + //! Short form is mostly related to jmp and jcc instructions, but can be used + //! by other instructions supporting 8-bit or 32-bit immediates. This option + //! can be dangerous if the short jmp/jcc is required, but not encodable due + //! to large displacement, in such case an error happens and the whole + //! assembler/compiler stream is unusable. + kInstOptionShortForm = 0x01, + + //! Emit long form of the instruction. + //! + //! X86/X64: + //! + //! Long form is mosrlt related to jmp and jcc instructions, but like the + //! `kInstOptionShortForm` option it can be used by other instructions + //! supporting both 8-bit and 32-bit immediates. + kInstOptionLongForm = 0x02, + + //! Condition is likely to be taken (instruction). + kInstOptionTaken = 0x04, + //! Condition is unlikely to be taken (instruction). + kInstOptionNotTaken = 0x08 +}; // ============================================================================ // [asmjit::LabelLink] // ============================================================================ -//! @internal +//! \internal //! //! Data structure used to link linked-labels. struct LabelLink { @@ -48,7 +93,7 @@ struct LabelLink { // [asmjit::LabelData] // ============================================================================ -//! @internal +//! \internal //! //! Label data. struct LabelData { @@ -62,7 +107,7 @@ struct LabelData { // [asmjit::RelocData] // ============================================================================ -//! @internal +//! \internal //! //! Code relocation data (relative vs absolute addresses). //! @@ -182,61 +227,61 @@ struct BaseAssembler : public CodeGen { //! Reserve the internal buffer to at least `n` bytes. ASMJIT_API Error _reserve(size_t n); - //! Set byte at position `pos`. + //! Get BYTE at position `pos`. ASMJIT_INLINE uint8_t getByteAt(size_t pos) const { ASMJIT_ASSERT(pos + 1 <= (size_t)(_end - _buffer)); return *reinterpret_cast(_buffer + pos); } - //! Set word at position `pos`. + //! Get WORD at position `pos`. ASMJIT_INLINE uint16_t getWordAt(size_t pos) const { ASMJIT_ASSERT(pos + 2 <= (size_t)(_end - _buffer)); return *reinterpret_cast(_buffer + pos); } - //! Set dword at position `pos`. + //! Get DWORD at position `pos`. ASMJIT_INLINE uint32_t getDWordAt(size_t pos) const { ASMJIT_ASSERT(pos + 4 <= (size_t)(_end - _buffer)); return *reinterpret_cast(_buffer + pos); } - //! Set qword at position `pos`. + //! Get QWORD at position `pos`. ASMJIT_INLINE uint64_t getQWordAt(size_t pos) const { ASMJIT_ASSERT(pos + 8 <= (size_t)(_end - _buffer)); return *reinterpret_cast(_buffer + pos); } - //! Set int32_t at position `pos`. + //! Get int32_t at position `pos`. ASMJIT_INLINE int32_t getInt32At(size_t pos) const { ASMJIT_ASSERT(pos + 4 <= (size_t)(_end - _buffer)); return *reinterpret_cast(_buffer + pos); } - //! Set uint32_t at position `pos`. + //! Get uint32_t at position `pos`. ASMJIT_INLINE uint32_t getUInt32At(size_t pos) const { ASMJIT_ASSERT(pos + 4 <= (size_t)(_end - _buffer)); return *reinterpret_cast(_buffer + pos); } - //! Set byte at position `pos`. + //! Set BYTE at position `pos`. ASMJIT_INLINE void setByteAt(size_t pos, uint8_t x) { ASMJIT_ASSERT(pos + 1 <= (size_t)(_end - _buffer)); *reinterpret_cast(_buffer + pos) = x; } - //! Set word at position `pos`. + //! Set WORD at position `pos`. ASMJIT_INLINE void setWordAt(size_t pos, uint16_t x) { ASMJIT_ASSERT(pos + 2 <= (size_t)(_end - _buffer)); *reinterpret_cast(_buffer + pos) = x; } - //! Set dword at position `pos`. + //! Set DWORD at position `pos`. ASMJIT_INLINE void setDWordAt(size_t pos, uint32_t x) { ASMJIT_ASSERT(pos + 4 <= (size_t)(_end - _buffer)); *reinterpret_cast(_buffer + pos) = x; } - //! Set qword at position `pos`. + //! Set QWORD at position `pos`. ASMJIT_INLINE void setQWordAt(size_t pos, uint64_t x) { ASMJIT_ASSERT(pos + 8 <= (size_t)(_end - _buffer)); *reinterpret_cast(_buffer + pos) = x; @@ -291,14 +336,14 @@ struct BaseAssembler : public CodeGen { return static_cast(label.getId()) < _labels.getLength(); } - //! @internal + //! \internal //! //! Get `LabelData` by `label`. ASMJIT_INLINE LabelData* getLabelData(const Label& label) const { return getLabelDataById(label.getId()); } - //! @internal + //! \internal //! //! Get `LabelData` by `id`. ASMJIT_INLINE LabelData* getLabelDataById(uint32_t id) const { @@ -308,17 +353,17 @@ struct BaseAssembler : public CodeGen { return const_cast(&_labels[id]); } - //! @internal + //! \internal //! //! Register labels for other code generator, i.e. `Compiler`. ASMJIT_API Error _registerIndexedLabels(size_t index); - //! @internal + //! \internal //! //! Create and initialize a new `Label`. ASMJIT_API Error _newLabel(Label* dst); - //! @internal + //! \internal //! //! New LabelLink instance. ASMJIT_API LabelLink* _newLabelLink(); @@ -335,7 +380,7 @@ struct BaseAssembler : public CodeGen { //! Bind label to the current offset. //! - //! @note Label can be bound only once! + //! \note Label can be bound only once! ASMJIT_INLINE void bind(const Label& label) { _bind(label); } @@ -356,12 +401,14 @@ struct BaseAssembler : public CodeGen { //! Typical usage of this is to align labels at start of the inner loops. //! //! Inserts `nop()` instructions or CPU optimized NOPs. - ASMJIT_INLINE Error align(uint32_t m) { - return _align(m); + ASMJIT_INLINE Error align(uint32_t mode, uint32_t offset) { + return _align(mode, offset); } - //! Align target buffer to `m` bytes (virtual). - virtual Error _align(uint32_t m) = 0; + //! \internal + //! + //! Align target buffer to `m` bytes. + virtual Error _align(uint32_t mode, uint32_t offset) = 0; // -------------------------------------------------------------------------- // [Reloc] @@ -369,25 +416,25 @@ struct BaseAssembler : public CodeGen { //! Simplifed version of `relocCode()` method designed for JIT. //! - //! @overload + //! \overload ASMJIT_INLINE size_t relocCode(void* dst) const { return _relocCode(dst, static_cast((uintptr_t)dst)); } //! Relocate code to a given address `dst`. //! - //! @param dst Where the relocated code should me stored. The pointer can be - //! address returned by virtual memory allocator or your own address if you - //! want only to store the code for later reuse (or load, etc...). - //! @param addressBase Base address used for relocation. When using JIT code - //! generation, this will be the same as `dst`, only casted to system - //! integer type. But when generating code for remote process then the value - //! can be different. + //! \param dst Refers the location where the relocated code should be copied. + //! The pointer can be address returned by virtual memory allocator or any + //! custom address. //! - //! @retval The bytes used. Code-generator can create trampolines which are - //! used when calling other functions inside the JIT code. However, these - //! trampolines can be unused so the relocCode() returns the exact size needed - //! for the function. + //! \param base Base address used for relocation. `JitRuntime` always sets + //! `base` address to be the same as `dst`, but other runtimes do not have + //! to follow this rule. + //! + //! \retval The number bytes used. If the code generator reserved space for + //! possible trampolines, but these weren't generated, the number of bytes + //! used can be actually less than the expected worst case. Virtual memory + //! allocator can in such case return some memory back to the pool. //! //! A given buffer will be overwritten, to get number of bytes required use //! `getCodeSize()`. @@ -395,7 +442,9 @@ struct BaseAssembler : public CodeGen { return _relocCode(dst, base); } - //! Reloc code (virtual). + //! \internal + //! + //! Reloc code. virtual size_t _relocCode(void* dst, Ptr base) const = 0; // -------------------------------------------------------------------------- @@ -410,24 +459,24 @@ struct BaseAssembler : public CodeGen { //! Emit an instruction. ASMJIT_API Error emit(uint32_t code); - //! @overload + //! \overload ASMJIT_API Error emit(uint32_t code, const Operand& o0); - //! @overload + //! \overload ASMJIT_API Error emit(uint32_t code, const Operand& o0, const Operand& o1); - //! @overload + //! \overload ASMJIT_API Error emit(uint32_t code, const Operand& o0, const Operand& o1, const Operand& o2); - //! @overload + //! \overload ASMJIT_INLINE Error emit(uint32_t code, const Operand& o0, const Operand& o1, const Operand& o2, const Operand& o3) { return _emit(code, o0, o1, o2, o3); } //! Emit an instruction with integer immediate operand. ASMJIT_API Error emit(uint32_t code, int o0); - //! @overload + //! \overload ASMJIT_API Error emit(uint32_t code, const Operand& o0, int o1); - //! @overload + //! \overload ASMJIT_API Error emit(uint32_t code, const Operand& o0, const Operand& o1, int o2); - //! @overload + //! \overload ASMJIT_API Error emit(uint32_t code, const Operand& o0, const Operand& o1, const Operand& o2, int o3); //! Emit an instruction (virtual). @@ -464,7 +513,7 @@ struct BaseAssembler : public CodeGen { PodVector _relocData; }; -//! @} +//! \} // ============================================================================ // [Defined-Later] diff --git a/src/asmjit/base/codegen.cpp b/src/asmjit/base/codegen.cpp index 7837ef0..548e16e 100644 --- a/src/asmjit/base/codegen.cpp +++ b/src/asmjit/base/codegen.cpp @@ -26,8 +26,8 @@ CodeGen::CodeGen(Runtime* runtime) : _errorHandler(NULL), _arch(kArchNone), _regSize(0), + _features(static_cast(IntUtil::mask(kCodeGenOptimizedAlign))), _error(kErrorOk), - _features(IntUtil::mask(kCodeGenOptimizedAlign)), _options(0), _baseZone(16384 - sizeof(Zone::Chunk) - kMemAllocOverhead) {} diff --git a/src/asmjit/base/codegen.h b/src/asmjit/base/codegen.h index 32b8e4e..82458c6 100644 --- a/src/asmjit/base/codegen.h +++ b/src/asmjit/base/codegen.h @@ -9,7 +9,6 @@ #define _ASMJIT_BASE_CODEGEN_H // [Dependencies - AsmJit] -#include "../base/defs.h" #include "../base/error.h" #include "../base/logger.h" #include "../base/runtime.h" @@ -20,16 +19,16 @@ namespace asmjit { -//! @addtogroup asmjit_base_codegen -//! @{ +//! \addtogroup asmjit_base_general +//! \{ // ============================================================================ // [asmjit::kCodeGen] // ============================================================================ -//! Features of `CodeGen`. +//! Features of \ref CodeGen. ASMJIT_ENUM(kCodeGen) { - //! Emit optimized code-alignment sequences. + //! Emit optimized code-alignment sequences (true by default). //! //! X86/X64 //! ------- @@ -41,11 +40,9 @@ ASMJIT_ENUM(kCodeGen) { //! for alignment between 1 to 11 bytes. Also when `x86x64::Compiler` is //! used, it may add rex prefixes into the code to make some instructions //! greater so no alignment sequences are needed. - //! - //! Default true. kCodeGenOptimizedAlign = 0, - //! Emit jump-prediction hints. + //! Emit jump-prediction hints (false by default). //! //! X86/X64 //! ------- @@ -57,15 +54,39 @@ ASMJIT_ENUM(kCodeGen) { //! However this behavior can be overridden by using instruction prefixes. //! If this option is enabled these hints will be emitted. //! - //! Default true. + //! This feature is disabled by default, because the only processor that + //! used to take into consideration prediction hints was P4 that is not used + //! anymore. kCodeGenPredictedJumps = 1 }; +// ============================================================================ +// [asmjit::kAlignMode] +// ============================================================================ + +//! Code aligning mode. +ASMJIT_ENUM(kAlignMode) { + kAlignCode = 0, + kAlignData = 1 +}; + +// ============================================================================ +// [asmjit::kRelocMode] +// ============================================================================ + +//! Relocation mode. +ASMJIT_ENUM(kRelocMode) { + kRelocAbsToAbs = 0, + kRelocRelToAbs = 1, + kRelocAbsToRel = 2, + kRelocTrampoline = 3 +}; + // ============================================================================ // [asmjit::CodeGen] // ============================================================================ -//! Abstract class inherited by `Assembler` and `Compiler`. +//! Abstract class defining basics of \ref Assembler and \ref BaseCompiler. struct CodeGen { ASMJIT_NO_COPY(CodeGen) @@ -137,12 +158,17 @@ struct CodeGen { // [Options] // -------------------------------------------------------------------------- - //! Get options. - ASMJIT_INLINE uint32_t getOptions() const { return _options; } - //! Set options. - ASMJIT_INLINE void setOptions(uint32_t options) { _options = options; } + //! Get options of the next instruction. + ASMJIT_INLINE uint32_t getOptions() const { + return _options; + } - //! Get options and clear them. + //! Set options of the next instruction. + ASMJIT_INLINE void setOptions(uint32_t options) { + _options = options; + } + + //! Get options of the next instruction and clear them. ASMJIT_INLINE uint32_t getOptionsAndClear() { uint32_t options = _options; _options = 0; @@ -153,15 +179,15 @@ struct CodeGen { // [Purge] // -------------------------------------------------------------------------- - //! Called by `clear()` and `reset()` to clear all data used by the code - //! generator. + //! Called by \ref clear() and \ref reset() to clear all data used by the + //! code generator. virtual void _purge() = 0; // -------------------------------------------------------------------------- // [Make] // -------------------------------------------------------------------------- - //! Make is a convenience method to make and relocate the current code and + //! Make is a convenience method to make and relocate the current code and //! add it to the associated `Runtime`. //! //! What is needed is only to cast the returned pointer to your function type @@ -177,17 +203,18 @@ struct CodeGen { Runtime* _runtime; //! Logger. Logger* _logger; - //! Error handler, called by `setError()`. + //! Error handler, called by \ref setError(). ErrorHandler* _errorHandler; //! Target architecture. uint8_t _arch; - //! Get the default register size of the architecture (4 or 8 bytes). + //! Target general-purpose register size (4 or 8 bytes). uint8_t _regSize; - //! Last error code. - uint8_t _error; //! Target features. uint8_t _features; + //! Last error code. + uint8_t _error; + //! Options for the next generated instruction (only 8-bits used). uint32_t _options; @@ -195,7 +222,7 @@ struct CodeGen { Zone _baseZone; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/compiler.cpp b/src/asmjit/base/compiler.cpp index e8d714d..0ea674c 100644 --- a/src/asmjit/base/compiler.cpp +++ b/src/asmjit/base/compiler.cpp @@ -101,13 +101,13 @@ void BaseCompiler::_purge() { // [asmjit::BaseCompiler - Node Management] // ============================================================================ -BaseNode* BaseCompiler::setCursor(BaseNode* node) { - BaseNode* old = _cursor; +Node* BaseCompiler::setCursor(Node* node) { + Node* old = _cursor; _cursor = node; return old; } -BaseNode* BaseCompiler::addNode(BaseNode* node) { +Node* BaseCompiler::addNode(Node* node) { ASMJIT_ASSERT(node != NULL); ASMJIT_ASSERT(node->_prev == NULL); ASMJIT_ASSERT(node->_next == NULL); @@ -124,8 +124,8 @@ BaseNode* BaseCompiler::addNode(BaseNode* node) { } } else { - BaseNode* prev = _cursor; - BaseNode* next = _cursor->_next; + Node* prev = _cursor; + Node* next = _cursor->_next; node->_prev = prev; node->_next = next; @@ -141,14 +141,14 @@ BaseNode* BaseCompiler::addNode(BaseNode* node) { return node; } -BaseNode* BaseCompiler::addNodeBefore(BaseNode* node, BaseNode* ref) { +Node* BaseCompiler::addNodeBefore(Node* node, Node* ref) { ASMJIT_ASSERT(node != NULL); ASMJIT_ASSERT(node->_prev == NULL); ASMJIT_ASSERT(node->_next == NULL); ASMJIT_ASSERT(ref != NULL); - BaseNode* prev = ref->_prev; - BaseNode* next = ref; + Node* prev = ref->_prev; + Node* next = ref; node->_prev = prev; node->_next = next; @@ -162,14 +162,14 @@ BaseNode* BaseCompiler::addNodeBefore(BaseNode* node, BaseNode* ref) { return node; } -BaseNode* BaseCompiler::addNodeAfter(BaseNode* node, BaseNode* ref) { +Node* BaseCompiler::addNodeAfter(Node* node, Node* ref) { ASMJIT_ASSERT(node != NULL); ASMJIT_ASSERT(node->_prev == NULL); ASMJIT_ASSERT(node->_next == NULL); ASMJIT_ASSERT(ref != NULL); - BaseNode* prev = ref; - BaseNode* next = ref->_next; + Node* prev = ref; + Node* next = ref->_next; node->_prev = prev; node->_next = next; @@ -183,7 +183,7 @@ BaseNode* BaseCompiler::addNodeAfter(BaseNode* node, BaseNode* ref) { return node; } -static ASMJIT_INLINE void BaseCompiler_nodeRemoved(BaseCompiler* self, BaseNode* node_) { +static ASMJIT_INLINE void BaseCompiler_nodeRemoved(BaseCompiler* self, Node* node_) { if (node_->isJmpOrJcc()) { JumpNode* node = static_cast(node_); TargetNode* target = node->getTarget(); @@ -209,9 +209,9 @@ static ASMJIT_INLINE void BaseCompiler_nodeRemoved(BaseCompiler* self, BaseNode* } } -BaseNode* BaseCompiler::removeNode(BaseNode* node) { - BaseNode* prev = node->_prev; - BaseNode* next = node->_next; +Node* BaseCompiler::removeNode(Node* node) { + Node* prev = node->_prev; + Node* next = node->_next; if (_firstNode == node) _firstNode = next; @@ -233,14 +233,14 @@ BaseNode* BaseCompiler::removeNode(BaseNode* node) { return node; } -void BaseCompiler::removeNodes(BaseNode* first, BaseNode* last) { +void BaseCompiler::removeNodes(Node* first, Node* last) { if (first == last) { removeNode(first); return; } - BaseNode* prev = first->_prev; - BaseNode* next = last->_next; + Node* prev = first->_prev; + Node* next = last->_next; if (_firstNode == first) _firstNode = next; @@ -252,9 +252,9 @@ void BaseCompiler::removeNodes(BaseNode* first, BaseNode* last) { else next->_prev = prev; - BaseNode* node = first; + Node* node = first; for (;;) { - BaseNode* next = node->getNext(); + Node* next = node->getNext(); ASMJIT_ASSERT(next != NULL); node->_prev = NULL; @@ -274,8 +274,8 @@ void BaseCompiler::removeNodes(BaseNode* first, BaseNode* last) { // [asmjit::BaseCompiler - Align] // ============================================================================ -AlignNode* BaseCompiler::newAlign(uint32_t m) { - AlignNode* node = newNode(m); +AlignNode* BaseCompiler::newAlign(uint32_t mode, uint32_t offset) { + AlignNode* node = newNode(mode, offset); if (node == NULL) goto _NoMemory; return node; @@ -285,8 +285,8 @@ _NoMemory: return NULL; } -AlignNode* BaseCompiler::addAlign(uint32_t m) { - AlignNode* node = newAlign(m); +AlignNode* BaseCompiler::addAlign(uint32_t mode, uint32_t offset) { + AlignNode* node = newAlign(mode, offset); if (node == NULL) return NULL; return static_cast(addNode(node)); diff --git a/src/asmjit/base/compiler.h b/src/asmjit/base/compiler.h index 61b75f7..83dc88c 100644 --- a/src/asmjit/base/compiler.h +++ b/src/asmjit/base/compiler.h @@ -12,10 +12,10 @@ #include "../base/assembler.h" #include "../base/codegen.h" #include "../base/constpool.h" -#include "../base/defs.h" #include "../base/error.h" #include "../base/func.h" #include "../base/intutil.h" +#include "../base/operand.h" #include "../base/podlist.h" #include "../base/podvector.h" #include "../base/runtime.h" @@ -26,9 +26,6 @@ namespace asmjit { -//! @addtogroup asmjit_base_codegen -//! @{ - // ============================================================================ // [Forward Declarations] // ============================================================================ @@ -40,7 +37,7 @@ struct VarData; struct BaseVarInst; struct BaseVarState; -struct BaseNode; +struct Node; struct EndNode; struct InstNode; struct JumpNode; @@ -49,6 +46,9 @@ struct JumpNode; // [asmjit::kConstScope] // ============================================================================ +//! \addtogroup asmjit_base_general +//! \{ + //! Scope of the constant. ASMJIT_ENUM(kConstScope) { //! Local constant, always embedded right after the current function. @@ -57,10 +57,15 @@ ASMJIT_ENUM(kConstScope) { kConstScopeGlobal = 1 }; +//! \} + // ============================================================================ // [asmjit::kVarAttrFlags] // ============================================================================ +//! \addtogroup asmjit_base_tree +//! \{ + //! Variable attribute flags. ASMJIT_ENUM(kVarAttrFlags) { //! Variable is accessed through register on input. @@ -101,6 +106,9 @@ ASMJIT_ENUM(kVarAttrFlags) { //! Variable should be unused at the end of the instruction/node. kVarAttrUnuse = 0x00000800, + //! \internal + //! + //! All in-flags. kVarAttrInAll = kVarAttrInReg | kVarAttrInMem | @@ -108,6 +116,9 @@ ASMJIT_ENUM(kVarAttrFlags) { kVarAttrInCall | kVarAttrInArg, + //! \internal + //! + //! All out-flags. kVarAttrOutAll = kVarAttrOutReg | kVarAttrOutMem | @@ -146,7 +157,7 @@ ASMJIT_ENUM(kVarHint) { //! State of variable. //! -//! @note State of variable is used only during make process and it's not +//! \note State of variable is used only during make process and it's not //! visible to the developer. ASMJIT_ENUM(kVarState) { //! Variable is currently not used. @@ -168,31 +179,31 @@ ASMJIT_ENUM(kVarState) { // [asmjit::kNodeType] // ============================================================================ -//! Type of node (see `BaseNode)`. +//! Type of node, see \ref Node. ASMJIT_ENUM(kNodeType) { //! Invalid node (internal, can't be used). kNodeTypeNone = 0, - //! Node is an .align directive, see `AlignNode`. + //! Node is an .align directive, see \ref AlignNode. kNodeTypeAlign, - //! Node is an embedded data, see `EmbedNode`. + //! Node is an embedded data, see \ref EmbedNode. kNodeTypeEmbed, - //! Node is a comment, see `CommentNode`. + //! Node is a comment, see \ref CommentNode. kNodeTypeComment, - //! Node is a variable hint (alloc, spill, use, unuse), see `HintNode`. + //! Node is a variable hint (alloc, spill, use, unuse), see \ref HintNode. kNodeTypeHint, - //! Node is a label, see `TargetNode`. + //! Node is a label, see \ref TargetNode. kNodeTypeTarget, - //! Node is an instruction, see `InstNode`. + //! Node is an instruction, see \ref InstNode. kNodeTypeInst, - //! Node is a function declaration, see `FuncNode`. + //! Node is a function declaration, see \ref FuncNode. kNodeTypeFunc, - //! Node is an end of the function, see `EndNode`. + //! Node is an end of the function, see \ref EndNode. kNodeTypeEnd, - //! Node is a return, see `RetNode`. + //! Node is a return, see \ref RetNode. kNodeTypeRet, - //! Node is a function call, see `CallNode`. + //! Node is a function call, see \ref CallNode. kNodeTypeCall, - //! Node is a function call argument moved on stack, see `SArgNode`. + //! Node is a function call argument moved on stack, see \ref SArgNode. kNodeTypeSArg }; @@ -225,10 +236,15 @@ ASMJIT_ENUM(kNodeFlag) { kNodeFlagIsFp = 0x0040 }; +//! \} + // ============================================================================ // [asmjit::MemCell] // ============================================================================ +//! \addtogroup asmjit_base_tree +//! \{ + struct MemCell { ASMJIT_NO_COPY(MemCell) @@ -507,7 +523,7 @@ struct VarData { uint8_t _saveOnUnuse : 1; //! Whether variable was changed (connected with actual `BaseVarState)`. uint8_t _modified : 1; - //! @internal + //! \internal uint8_t _reserved0 : 3; //! Variable natural alignment. uint8_t _alignment; @@ -547,7 +563,9 @@ struct VarData { //! back to zero/null. Initial value is NULL. VarAttr* _va; - //! @internal + //! \internal + //! + //! Same as `_va` just provided as `uintptr_t`. uintptr_t _vaUInt; }; }; @@ -677,11 +695,11 @@ struct VarAttr { //! //! Typically `kInvalidReg` if variable is only used on input. uint8_t _outRegIndex; - //! @internal + //! \internal uint8_t _reserved; }; - //! @internal + //! \internal //! //! Packed data #0. uint32_t _packed; @@ -721,36 +739,36 @@ struct BaseVarInst {}; struct BaseVarState {}; // ============================================================================ -// [asmjit::BaseNode] +// [asmjit::Node] // ============================================================================ //! Base node. //! //! `Every` node represents an abstract instruction, directive, label, or //! macro-instruction generated by compiler. -struct BaseNode { - ASMJIT_NO_COPY(BaseNode) +struct Node { + ASMJIT_NO_COPY(Node) // -------------------------------------------------------------------------- // [Construction / Destruction] // -------------------------------------------------------------------------- - //! Create new `BaseNode`. + //! Create new `Node`. //! - //! @note Always use compiler to create nodes. - ASMJIT_INLINE BaseNode(BaseCompiler* compiler, uint32_t type); // Defined-Later. + //! \note Always use compiler to create nodes. + ASMJIT_INLINE Node(BaseCompiler* compiler, uint32_t type); // Defined-Later. - //! Destroy `BaseNode`. - ASMJIT_INLINE ~BaseNode() {} + //! Destroy `Node`. + ASMJIT_INLINE ~Node() {} // -------------------------------------------------------------------------- // [Accessors] // -------------------------------------------------------------------------- //! Get previous node in the compiler stream. - ASMJIT_INLINE BaseNode* getPrev() const { return _prev; } + ASMJIT_INLINE Node* getPrev() const { return _prev; } //! Get next node in the compiler stream. - ASMJIT_INLINE BaseNode* getNext() const { return _next; } + ASMJIT_INLINE Node* getNext() const { return _next; } //! Get comment string. ASMJIT_INLINE const char* getComment() const { return _comment; } @@ -827,9 +845,9 @@ struct BaseNode { // -------------------------------------------------------------------------- //! Previous node. - BaseNode* _prev; + Node* _prev; //! Next node. - BaseNode* _next; + Node* _next; //! Node type, see `kNodeType`. uint8_t _type; @@ -863,7 +881,7 @@ struct BaseNode { // ============================================================================ //! Align node. -struct AlignNode : public BaseNode { +struct AlignNode : public Node { ASMJIT_NO_COPY(AlignNode) // -------------------------------------------------------------------------- @@ -871,8 +889,11 @@ struct AlignNode : public BaseNode { // -------------------------------------------------------------------------- //! Create a new `AlignNode` instance. - ASMJIT_INLINE AlignNode(BaseCompiler* compiler, uint32_t size) : BaseNode(compiler, kNodeTypeAlign) { - _size = size; + ASMJIT_INLINE AlignNode(BaseCompiler* compiler, uint32_t mode, uint32_t offset) : + Node(compiler, kNodeTypeAlign) { + + _mode = mode; + _offset = offset; } //! Destroy the `AlignNode` instance. @@ -882,17 +903,34 @@ struct AlignNode : public BaseNode { // [Accessors] // -------------------------------------------------------------------------- - //! Get align size in bytes. - ASMJIT_INLINE uint32_t getSize() const { return _size; } - //! Set align size in bytes to `size`. - ASMJIT_INLINE void setSize(uint32_t size) { _size = size; } + //! Get alignment mode. + ASMJIT_INLINE uint32_t getMode() const { + return _mode; + } + + //! Set alignment mode. + ASMJIT_INLINE void setMode(uint32_t mode) { + _mode = mode; + } + + //! Get align offset in bytes. + ASMJIT_INLINE uint32_t getOffset() const { + return _offset; + } + + //! Set align offset in bytes to `offset`. + ASMJIT_INLINE void setOffset(uint32_t offset) { + _offset = offset; + } // -------------------------------------------------------------------------- // [Members] // -------------------------------------------------------------------------- - //! Size of the alignment. - uint32_t _size; + //! Alignment mode, see \ref kAlignMode. + uint32_t _mode; + //! Alignment offset in bytes. + uint32_t _offset; }; // ============================================================================ @@ -903,7 +941,7 @@ struct AlignNode : public BaseNode { //! //! Embed node is used to embed data into final assembler stream. The data is //! considered to be RAW; No analysis is performed on RAW data. -struct EmbedNode : public BaseNode { +struct EmbedNode : public Node { ASMJIT_NO_COPY(EmbedNode) // -------------------------------------------------------------------------- @@ -917,7 +955,7 @@ struct EmbedNode : public BaseNode { // -------------------------------------------------------------------------- //! Create a new `EmbedNode` instance. - ASMJIT_INLINE EmbedNode(BaseCompiler* compiler, void* data, uint32_t size) : BaseNode(compiler, kNodeTypeEmbed) { + ASMJIT_INLINE EmbedNode(BaseCompiler* compiler, void* data, uint32_t size) : Node(compiler, kNodeTypeEmbed) { _size = size; if (size <= kInlineBufferSize) { if (data != NULL) @@ -964,7 +1002,7 @@ struct EmbedNode : public BaseNode { //! Comments allows to comment your assembler stream for better debugging //! and visualization. Comments are usually ignored in release builds unless //! the logger is present. -struct CommentNode : public BaseNode { +struct CommentNode : public Node { ASMJIT_NO_COPY(CommentNode) // -------------------------------------------------------------------------- @@ -972,7 +1010,7 @@ struct CommentNode : public BaseNode { // -------------------------------------------------------------------------- //! Create a new `CommentNode` instance. - ASMJIT_INLINE CommentNode(BaseCompiler* compiler, const char* comment) : BaseNode(compiler, kNodeTypeComment) { + ASMJIT_INLINE CommentNode(BaseCompiler* compiler, const char* comment) : Node(compiler, kNodeTypeComment) { _comment = comment; } @@ -985,7 +1023,7 @@ struct CommentNode : public BaseNode { // ============================================================================ //! Hint node. -struct HintNode : public BaseNode { +struct HintNode : public Node { ASMJIT_NO_COPY(HintNode) // -------------------------------------------------------------------------- @@ -993,7 +1031,7 @@ struct HintNode : public BaseNode { // -------------------------------------------------------------------------- //! Create a new `HintNode` instance. - ASMJIT_INLINE HintNode(BaseCompiler* compiler, VarData* vd, uint32_t hint, uint32_t value) : BaseNode(compiler, kNodeTypeHint) { + ASMJIT_INLINE HintNode(BaseCompiler* compiler, VarData* vd, uint32_t hint, uint32_t value) : Node(compiler, kNodeTypeHint) { _vd = vd; _hint = hint; _value = value; @@ -1036,7 +1074,7 @@ struct HintNode : public BaseNode { // ============================================================================ //! label node. -struct TargetNode : public BaseNode { +struct TargetNode : public Node { ASMJIT_NO_COPY(TargetNode) // -------------------------------------------------------------------------- @@ -1044,7 +1082,7 @@ struct TargetNode : public BaseNode { // -------------------------------------------------------------------------- //! Create a new `TargetNode` instance. - ASMJIT_INLINE TargetNode(BaseCompiler* compiler, uint32_t labelId) : BaseNode(compiler, kNodeTypeTarget) { + ASMJIT_INLINE TargetNode(BaseCompiler* compiler, uint32_t labelId) : Node(compiler, kNodeTypeTarget) { _id = labelId; _numRefs = 0; _from = NULL; @@ -1100,7 +1138,7 @@ struct TargetNode : public BaseNode { // ============================================================================ //! Instruction node. -struct InstNode : public BaseNode { +struct InstNode : public Node { ASMJIT_NO_COPY(InstNode) // -------------------------------------------------------------------------- @@ -1108,7 +1146,7 @@ struct InstNode : public BaseNode { // -------------------------------------------------------------------------- //! Create a new `InstNode` instance. - ASMJIT_INLINE InstNode(BaseCompiler* compiler, uint32_t code, uint32_t options, Operand* opList, uint32_t opCount) : BaseNode(compiler, kNodeTypeInst) { + ASMJIT_INLINE InstNode(BaseCompiler* compiler, uint32_t code, uint32_t options, Operand* opList, uint32_t opCount) : Node(compiler, kNodeTypeInst) { _code = static_cast(code); _options = static_cast(options); @@ -1170,7 +1208,7 @@ struct InstNode : public BaseNode { ASMJIT_INLINE Operand* getOpList() { return _opList; } - //! @overload + //! \overload ASMJIT_INLINE const Operand* getOpList() const { return _opList; } @@ -1203,7 +1241,7 @@ struct InstNode : public BaseNode { return static_cast(&_opList[_memOpIndex]); } - //! @overload + //! \overload template ASMJIT_INLINE T* getMemOp() const { ASMJIT_ASSERT(hasMemOp()); @@ -1236,7 +1274,7 @@ _Update: uint16_t _code; //! Instruction options, see `kInstOptions`. uint8_t _options; - //! @internal + //! \internal uint8_t _memOpIndex; //! Operands list. @@ -1289,7 +1327,7 @@ struct JumpNode : public InstNode { //! `FuncNode` can be used to generate function prolog and epilog which are //! compatible with a given function calling convention and to allocate and //! manage variables that can be allocated/spilled during compilation phase. -struct FuncNode : public BaseNode { +struct FuncNode : public Node { ASMJIT_NO_COPY(FuncNode) // -------------------------------------------------------------------------- @@ -1300,7 +1338,7 @@ struct FuncNode : public BaseNode { //! //! Always use `BaseCompiler::addFunc()` to create a `FuncNode` instance. ASMJIT_INLINE FuncNode(BaseCompiler* compiler) : - BaseNode(compiler, kNodeTypeFunc), + Node(compiler, kNodeTypeFunc), _entryNode(NULL), _exitNode(NULL), _decl(NULL), @@ -1472,7 +1510,7 @@ struct FuncNode : public BaseNode { //! Expected stack alignment (we depend on this value). //! - //! @note It can be global alignment given by the OS or described by an + //! \note It can be global alignment given by the OS or described by an //! target platform ABI. uint32_t _expectedStackAlignment; //! Required stack alignment (usually for multimedia instructions). @@ -1498,7 +1536,7 @@ struct FuncNode : public BaseNode { // ============================================================================ //! End of function/block node. -struct EndNode : public BaseNode { +struct EndNode : public Node { ASMJIT_NO_COPY(EndNode) // -------------------------------------------------------------------------- @@ -1506,7 +1544,7 @@ struct EndNode : public BaseNode { // -------------------------------------------------------------------------- //! Create a new `EndNode` instance. - ASMJIT_INLINE EndNode(BaseCompiler* compiler) : BaseNode(compiler, kNodeTypeEnd) { + ASMJIT_INLINE EndNode(BaseCompiler* compiler) : Node(compiler, kNodeTypeEnd) { _flags |= kNodeFlagIsRet; } @@ -1519,7 +1557,7 @@ struct EndNode : public BaseNode { // ============================================================================ //! Function return node. -struct RetNode : public BaseNode { +struct RetNode : public Node { ASMJIT_NO_COPY(RetNode) // -------------------------------------------------------------------------- @@ -1527,7 +1565,7 @@ struct RetNode : public BaseNode { // -------------------------------------------------------------------------- //! Create a new `RetNode` instance. - ASMJIT_INLINE RetNode(BaseCompiler* compiler, const Operand& o0, const Operand& o1) : BaseNode(compiler, kNodeTypeRet) { + ASMJIT_INLINE RetNode(BaseCompiler* compiler, const Operand& o0, const Operand& o1) : Node(compiler, kNodeTypeRet) { _flags |= kNodeFlagIsRet; _ret[0] = o0; _ret[1] = o1; @@ -1542,12 +1580,12 @@ struct RetNode : public BaseNode { //! Get the first return operand. ASMJIT_INLINE Operand& getFirst() { return _ret[0]; } - //! @overload + //! \overload ASMJIT_INLINE const Operand& getFirst() const { return _ret[0]; } //! Get the second return operand. ASMJIT_INLINE Operand& getSecond() { return _ret[1]; } - //! @overload + //! \overload ASMJIT_INLINE const Operand& getSecond() const { return _ret[1]; } // -------------------------------------------------------------------------- @@ -1563,7 +1601,7 @@ struct RetNode : public BaseNode { // ============================================================================ //! Function-call node. -struct CallNode : public BaseNode { +struct CallNode : public Node { ASMJIT_NO_COPY(CallNode) // -------------------------------------------------------------------------- @@ -1572,7 +1610,7 @@ struct CallNode : public BaseNode { //! Create a new `CallNode` instance. ASMJIT_INLINE CallNode(BaseCompiler* compiler, const Operand& target) : - BaseNode(compiler, kNodeTypeCall), + Node(compiler, kNodeTypeCall), _decl(NULL), _target(target), _args(NULL) {} @@ -1589,7 +1627,7 @@ struct CallNode : public BaseNode { //! Get target operand. ASMJIT_INLINE Operand& getTarget() { return _target; } - //! @overload + //! \overload ASMJIT_INLINE const Operand& getTarget() const { return _target; } //! Get return at `i`. @@ -1597,7 +1635,7 @@ struct CallNode : public BaseNode { ASMJIT_ASSERT(i < 2); return _ret[i]; } - //! @overload + //! \overload ASMJIT_INLINE const Operand& getRet(uint32_t i = 0) const { ASMJIT_ASSERT(i < 2); return _ret[i]; @@ -1608,7 +1646,7 @@ struct CallNode : public BaseNode { ASMJIT_ASSERT(i < kFuncArgCountLoHi); return _args[i]; } - //! @overload + //! \overload ASMJIT_INLINE const Operand& getArg(uint32_t i) const { ASMJIT_ASSERT(i < kFuncArgCountLoHi); return _args[i]; @@ -1634,7 +1672,7 @@ struct CallNode : public BaseNode { // ============================================================================ //! Function-call 'argument on the stack' node. -struct SArgNode : public BaseNode { +struct SArgNode : public Node { ASMJIT_NO_COPY(SArgNode) // -------------------------------------------------------------------------- @@ -1643,7 +1681,7 @@ struct SArgNode : public BaseNode { //! Create a new `SArgNode` instance. ASMJIT_INLINE SArgNode(BaseCompiler* compiler, CallNode* call, VarData* sVd, VarData* cVd) : - BaseNode(compiler, kNodeTypeSArg), + Node(compiler, kNodeTypeSArg), _call(call), _sVd(sVd), _cVd(cVd), @@ -1678,10 +1716,15 @@ struct SArgNode : public BaseNode { uint32_t _args; }; +//! \} + // ============================================================================ // [asmjit::BaseCompiler] // ============================================================================ +//! \addtogroup asmjit_base_general +//! \{ + //! Base compiler. //! //! @sa BaseAssembler. @@ -1712,11 +1755,11 @@ struct BaseCompiler : public CodeGen { //! Clear everything, but keep buffers allocated. //! - //! @note This method will destroy your code. + //! \note This method will destroy your code. ASMJIT_API void clear(); //! Clear everything and reset all buffers. //! - //! @note This method will destroy your code. + //! \note This method will destroy your code. ASMJIT_API void reset(); //! Called by clear() and reset() to clear all data related to derived //! class implementation. @@ -1751,30 +1794,30 @@ struct BaseCompiler : public CodeGen { } //! Get first node. - ASMJIT_INLINE BaseNode* getFirstNode() const { return _firstNode; } + ASMJIT_INLINE Node* getFirstNode() const { return _firstNode; } //! Get last node. - ASMJIT_INLINE BaseNode* getLastNode() const { return _lastNode; } + ASMJIT_INLINE Node* getLastNode() const { return _lastNode; } //! Get current node. //! - //! @note If this method returns `NULL` it means that nothing has been emitted + //! \note If this method returns `NULL` it means that nothing has been emitted //! yet. - ASMJIT_INLINE BaseNode* getCursor() const { return _cursor; } + ASMJIT_INLINE Node* getCursor() const { return _cursor; } //! Set the current node without returning the previous node (private). - ASMJIT_INLINE void _setCursor(BaseNode* node) { _cursor = node; } + ASMJIT_INLINE void _setCursor(Node* node) { _cursor = node; } //! Set the current node to `node` and return the previous one. - ASMJIT_API BaseNode* setCursor(BaseNode* node); + ASMJIT_API Node* setCursor(Node* node); //! Add node `node` after current and set current to `node`. - ASMJIT_API BaseNode* addNode(BaseNode* node); + ASMJIT_API Node* addNode(Node* node); //! Add node before `ref`. - ASMJIT_API BaseNode* addNodeBefore(BaseNode* node, BaseNode* ref); + ASMJIT_API Node* addNodeBefore(Node* node, Node* ref); //! Add node after `ref`. - ASMJIT_API BaseNode* addNodeAfter(BaseNode* node, BaseNode* ref); + ASMJIT_API Node* addNodeAfter(Node* node, Node* ref); //! Remove node `node`. - ASMJIT_API BaseNode* removeNode(BaseNode* node); + ASMJIT_API Node* removeNode(Node* node); //! Remove multiple nodes. - ASMJIT_API void removeNodes(BaseNode* first, BaseNode* last); + ASMJIT_API void removeNodes(Node* first, Node* last); // -------------------------------------------------------------------------- // [Func] @@ -1788,16 +1831,18 @@ struct BaseCompiler : public CodeGen { // -------------------------------------------------------------------------- //! Create a new `AlignNode`. - ASMJIT_API AlignNode* newAlign(uint32_t m); + ASMJIT_API AlignNode* newAlign(uint32_t mode, uint32_t offset); //! Add a new `AlignNode`. - ASMJIT_API AlignNode* addAlign(uint32_t m); + ASMJIT_API AlignNode* addAlign(uint32_t mode, uint32_t offset); //! Align target buffer to `m` bytes. //! //! Typical usage of this is to align labels at start of the inner loops. //! //! Inserts `nop()` instructions or CPU optimized NOPs. - ASMJIT_INLINE AlignNode* align(uint32_t m) { return addAlign(m); } + ASMJIT_INLINE AlignNode* align(uint32_t mode, uint32_t offset) { + return addAlign(mode, offset); + } // -------------------------------------------------------------------------- // [Target] @@ -1826,14 +1871,16 @@ struct BaseCompiler : public CodeGen { // -------------------------------------------------------------------------- //! Get count of created labels. - ASMJIT_INLINE size_t getLabelsCount() const - { return _targets.getLength(); } + ASMJIT_INLINE size_t getLabelsCount() const { + return _targets.getLength(); + } //! Get whether `label` is created. - ASMJIT_INLINE bool isLabelCreated(const Label& label) const - { return static_cast(label.getId()) < _targets.getLength(); } + ASMJIT_INLINE bool isLabelCreated(const Label& label) const { + return static_cast(label.getId()) < _targets.getLength(); + } - //! @internal + //! \internal //! //! Create and initialize a new `Label`. ASMJIT_API Error _newLabel(Label* dst); @@ -1847,7 +1894,7 @@ struct BaseCompiler : public CodeGen { //! Bind label to the current offset. //! - //! @note Label can be bound only once! + //! \note Label can be bound only once! ASMJIT_API void bind(const Label& label); // -------------------------------------------------------------------------- @@ -1860,7 +1907,9 @@ struct BaseCompiler : public CodeGen { ASMJIT_API EmbedNode* addEmbed(const void* data, uint32_t size); //! Embed data. - ASMJIT_INLINE EmbedNode* embed(const void* data, uint32_t size) { return addEmbed(data, size); } + ASMJIT_INLINE EmbedNode* embed(const void* data, uint32_t size) { + return addEmbed(data, size); + } // -------------------------------------------------------------------------- // [Comment] @@ -1892,14 +1941,14 @@ struct BaseCompiler : public CodeGen { return static_cast(var.getId() & kOperandIdNum) < _vars.getLength(); } - //! @internal + //! \internal //! //! Get `VarData` by `var`. ASMJIT_INLINE VarData* getVd(const BaseVar& var) const { return getVdById(var.getId()); } - //! @internal + //! \internal //! //! Get `VarData` by `id`. ASMJIT_INLINE VarData* getVdById(uint32_t id) const { @@ -1909,14 +1958,14 @@ struct BaseCompiler : public CodeGen { return _vars[id & kOperandIdNum]; } - //! @internal + //! \internal //! //! Get an array of 'VarData*'. ASMJIT_INLINE VarData** _getVdArray() const { return const_cast(_vars.getData()); } - //! @internal + //! \internal //! //! Create a new `VarData`. ASMJIT_API VarData* _newVd(uint32_t type, uint32_t size, uint32_t c, const char* name); @@ -1949,14 +1998,14 @@ struct BaseCompiler : public CodeGen { //! Rename variable `var` to `name`. //! - //! @note Only new name will appear in the logger. + //! \note Only new name will appear in the logger. ASMJIT_API void rename(BaseVar& var, const char* name); // -------------------------------------------------------------------------- // [Stack] // -------------------------------------------------------------------------- - //! @internal + //! \internal //! //! Create a new memory chunk allocated on the current function's stack. virtual Error _newStack(BaseMem* mem, uint32_t size, uint32_t alignment, const char* name) = 0; @@ -1965,7 +2014,7 @@ struct BaseCompiler : public CodeGen { // [Const] // -------------------------------------------------------------------------- - //! @internal + //! \internal //! //! Put data to a constant-pool and get a memory reference to it. virtual Error _newConst(BaseMem* mem, uint32_t scope, const void* data, size_t size) = 0; @@ -1993,12 +2042,12 @@ struct BaseCompiler : public CodeGen { const uint8_t* _targetVarMapping; //! First node. - BaseNode* _firstNode; + Node* _firstNode; //! Last node. - BaseNode* _lastNode; + Node* _lastNode; //! Current node. - BaseNode* _cursor; + Node* _cursor; //! Current function. FuncNode* _func; @@ -2025,6 +2074,8 @@ struct BaseCompiler : public CodeGen { Label _globalConstPoolLabel; }; +//! \} + // ============================================================================ // [Defined-Later] // ============================================================================ @@ -2033,7 +2084,7 @@ ASMJIT_INLINE Label::Label(BaseCompiler& c) : Operand(NoInit) { c._newLabel(this); } -ASMJIT_INLINE BaseNode::BaseNode(BaseCompiler* compiler, uint32_t type) { +ASMJIT_INLINE Node::Node(BaseCompiler* compiler, uint32_t type) { _prev = NULL; _next = NULL; _type = static_cast(type); @@ -2046,8 +2097,6 @@ ASMJIT_INLINE BaseNode::BaseNode(BaseCompiler* compiler, uint32_t type) { _state = NULL; } -//! @} - } // asmjit namespace // [Api-End] diff --git a/src/asmjit/base/constpool.cpp b/src/asmjit/base/constpool.cpp index 9058c98..93c3091 100644 --- a/src/asmjit/base/constpool.cpp +++ b/src/asmjit/base/constpool.cpp @@ -29,7 +29,7 @@ const ConstPoolNode ConstPoolTree::_sentinel = { { const_cast(&ConstPoolTree::_sentinel) }, 0, 0, 0 }; -//! @internal +//! \internal //! //! Remove left horizontal links. static ASMJIT_INLINE ConstPoolNode* ConstPoolTree_skewNode(ConstPoolNode* node) { @@ -43,7 +43,7 @@ static ASMJIT_INLINE ConstPoolNode* ConstPoolTree_skewNode(ConstPoolNode* node) return node; } -//! @internal +//! \internal //! //! Remove consecutive horizontal links. static ASMJIT_INLINE ConstPoolNode* ConstPoolTree_splitNode(ConstPoolNode* node) { diff --git a/src/asmjit/base/constpool.h b/src/asmjit/base/constpool.h index fcf5f05..1d39039 100644 --- a/src/asmjit/base/constpool.h +++ b/src/asmjit/base/constpool.h @@ -17,14 +17,14 @@ namespace asmjit { -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::ConstPoolNode] // ============================================================================ -//! @internal +//! \internal //! //! Zone-allocated constant-pool node. struct ConstPoolNode { @@ -54,7 +54,7 @@ struct ConstPoolNode { // [asmjit::ConstPoolTree] // ============================================================================ -//! @internal +//! \internal //! //! Zone-allocated constant-pool tree. struct ConstPoolTree { @@ -184,7 +184,7 @@ struct ConstPoolTree { // [asmjit::ConstPoolGap] // ============================================================================ -//! @internal +//! \internal //! //! Zone-allocated constant-pool gap. struct ConstPoolGap { @@ -291,7 +291,7 @@ struct ConstPool { size_t _alignment; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/context.cpp b/src/asmjit/base/context.cpp index 28a933a..5828d65 100644 --- a/src/asmjit/base/context.cpp +++ b/src/asmjit/base/context.cpp @@ -265,14 +265,14 @@ Error BaseContext::resolveCellOffsets() { // ============================================================================ Error BaseContext::removeUnreachableCode() { - PodList::Link* link = _unreachableList.getFirst(); - BaseNode* stop = getStop(); + PodList::Link* link = _unreachableList.getFirst(); + Node* stop = getStop(); while (link != NULL) { - BaseNode* node = link->getValue(); + Node* node = link->getValue(); if (node != NULL && node->getPrev() != NULL) { // Locate all unreachable nodes. - BaseNode* first = node; + Node* first = node; do { if (node->isFetched()) break; @@ -281,7 +281,7 @@ Error BaseContext::removeUnreachableCode() { // Remove. if (node != first) { - BaseNode* last = (node != NULL) ? node->getPrev() : getCompiler()->getLastNode(); + Node* last = (node != NULL) ? node->getPrev() : getCompiler()->getLastNode(); getCompiler()->removeNodes(first, last); } } @@ -296,7 +296,7 @@ Error BaseContext::removeUnreachableCode() { // [asmjit::BaseContext - Cleanup] // ============================================================================ -//! @internal +//! \internal //! //! Translate the given function `func`. void BaseContext::cleanup() { @@ -318,8 +318,8 @@ void BaseContext::cleanup() { // ============================================================================ Error BaseContext::compile(FuncNode* func) { - BaseNode* end = func->getEnd(); - BaseNode* stop = end->getNext(); + Node* end = func->getEnd(); + Node* stop = end->getNext(); _func = func; _stop = stop; diff --git a/src/asmjit/base/context_p.h b/src/asmjit/base/context_p.h index c7a0a62..bd13113 100644 --- a/src/asmjit/base/context_p.h +++ b/src/asmjit/base/context_p.h @@ -17,14 +17,14 @@ namespace asmjit { -//! @addtogroup asmjit_base_codegen -//! @{ +//! \addtogroup asmjit_base_tree +//! \{ // ============================================================================ // [asmjit::BaseContext] // ============================================================================ -//! @internal +//! \internal //! //! Code generation context is the logic behind `BaseCompiler`. The context is //! used to compile the code stored in `BaseCompiler`. @@ -55,17 +55,17 @@ struct BaseContext { //! Get function. ASMJIT_INLINE FuncNode* getFunc() const { return _func; } //! Get stop node. - ASMJIT_INLINE BaseNode* getStop() const { return _stop; } + ASMJIT_INLINE Node* getStop() const { return _stop; } //! Get start of the current scope. - ASMJIT_INLINE BaseNode* getStart() const { return _start; } + ASMJIT_INLINE Node* getStart() const { return _start; } //! Get end of the current scope. - ASMJIT_INLINE BaseNode* getEnd() const { return _end; } + ASMJIT_INLINE Node* getEnd() const { return _end; } //! Get extra block. - ASMJIT_INLINE BaseNode* getExtraBlock() const { return _extraBlock; } + ASMJIT_INLINE Node* getExtraBlock() const { return _extraBlock; } //! Set extra block. - ASMJIT_INLINE void setExtraBlock(BaseNode* node) { _extraBlock = node; } + ASMJIT_INLINE void setExtraBlock(Node* node) { _extraBlock = node; } // -------------------------------------------------------------------------- // [Error] @@ -207,7 +207,7 @@ struct BaseContext { // [Serialize] // -------------------------------------------------------------------------- - virtual Error serialize(BaseAssembler* assembler, BaseNode* start, BaseNode* stop) = 0; + virtual Error serialize(BaseAssembler* assembler, Node* start, Node* stop) = 0; // -------------------------------------------------------------------------- // [Members] @@ -222,19 +222,19 @@ struct BaseContext { Zone _baseZone; //! Start of the current active scope. - BaseNode* _start; + Node* _start; //! End of the current active scope. - BaseNode* _end; + Node* _end; //! Node that is used to insert extra code after the function body. - BaseNode* _extraBlock; + Node* _extraBlock; //! Stop node. - BaseNode* _stop; + Node* _stop; //! Unreachable nodes. - PodList _unreachableList; + PodList _unreachableList; //! Jump nodes. - PodList _jccList; + PodList _jccList; //! All variables used by the current function. PodVector _contextVd; @@ -277,7 +277,7 @@ struct BaseContext { BaseVarState* _state; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/cpuinfo.cpp b/src/asmjit/base/cpuinfo.cpp index 558d3ad..ac19022 100644 --- a/src/asmjit/base/cpuinfo.cpp +++ b/src/asmjit/base/cpuinfo.cpp @@ -16,11 +16,6 @@ // ? #endif // ASMJIT_HOST || ASMJIT_HOST_X64 -// [Dependencies - Windows] -#if defined(ASMJIT_OS_WINDOWS) -# include -#endif // ASMJIT_OS_WINDOWS - // [Dependencies - Posix] #if defined(ASMJIT_OS_POSIX) # include diff --git a/src/asmjit/base/cpuinfo.h b/src/asmjit/base/cpuinfo.h index ddc8e96..af426b7 100644 --- a/src/asmjit/base/cpuinfo.h +++ b/src/asmjit/base/cpuinfo.h @@ -16,31 +16,30 @@ namespace asmjit { -//! @addtogroup asmjit_base_cpu_info -//! @{ +//! \addtogroup asmjit_base_general +//! \{ // ============================================================================ // [asmjit::kCpuVendor] // ============================================================================ -//! Cpu vendor IDs. +//! Cpu vendor ID. //! -//! Cpu vendor IDs are specific for AsmJit library. Vendor ID is not directly -//! read from cpuid result, instead it's based on CPU vendor string. +//! Vendor IDs are specific to AsmJit library. During the library initialization +//! AsmJit checks host CPU and tries to identify the vendor based on the CPUID +//! calls. Some manufacturers changed their vendor strings and AsmJit is aware +//! of that - it checks multiple combinations and decides which vendor ID should +//! be used. ASMJIT_ENUM(kCpuVendor) { - //! Unknown CPU vendor. - kCpuVendorUnknown = 0, + //! No/Unknown vendor. + kCpuVendorNone = 0, - //! Intel CPU vendor. + //! Intel vendor. kCpuVendorIntel = 1, - //! AMD CPU vendor. + //! AMD vendor. kCpuVendorAmd = 2, - //! National Semiconductor CPU vendor (applies also to Cyrix processors). - kCpuVendorNSM = 3, - //! Transmeta CPU vendor. - kCpuVendorTransmeta = 4, - //! VIA CPU vendor. - kCpuVendorVia = 5 + //! VIA vendor. + kCpuVendorVia = 3 }; // ============================================================================ @@ -51,7 +50,7 @@ ASMJIT_ENUM(kCpuVendor) { struct BaseCpuInfo { ASMJIT_NO_COPY(BaseCpuInfo) - //! @internal + //! \internal enum { kFeaturesPerUInt32 = static_cast(sizeof(uint32_t)) * 8 }; @@ -135,7 +134,7 @@ struct BaseCpuInfo { uint32_t _features[4]; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/cputicks.h b/src/asmjit/base/cputicks.h index 696e858..1732c2e 100644 --- a/src/asmjit/base/cputicks.h +++ b/src/asmjit/base/cputicks.h @@ -16,8 +16,8 @@ namespace asmjit { -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::CpuTicks] @@ -29,7 +29,7 @@ struct CpuTicks { static ASMJIT_API uint32_t now(); }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/error.cpp b/src/asmjit/base/error.cpp index 83d6108..0776d52 100644 --- a/src/asmjit/base/error.cpp +++ b/src/asmjit/base/error.cpp @@ -49,16 +49,10 @@ static const char* errorMessages[] = { "Unknown instruction", "Illegal instruction", "Illegal addressing", - "Illegal short jump", + "Illegal displacement", - "No function defined", - "Incomplete function", + "Invalid function", "Overlapped arguments", - "No registers", - "Overlapped registers", - "Incompatible argument", - "Incompatible return", - "Unknown error" }; diff --git a/src/asmjit/base/error.h b/src/asmjit/base/error.h index ad4a493..11d135a 100644 --- a/src/asmjit/base/error.h +++ b/src/asmjit/base/error.h @@ -11,10 +11,13 @@ // [Api-Begin] #include "../apibegin.h" +// [Dependencies - AsmJit] +#include "../base/globals.h" + namespace asmjit { -//! @addtogroup asmjit_base_logging_and_errors -//! @{ +//! \addtogroup asmjit_base_general +//! \{ // ============================================================================ // [asmjit::kError] @@ -29,73 +32,69 @@ ASMJIT_ENUM(kError) { //! Heap memory allocation failed. kErrorNoHeapMemory = 1, + //! Virtual memory allocation failed. kErrorNoVirtualMemory = 2, //! Invalid argument. kErrorInvalidArgument = 3, + //! Invalid state. kErrorInvalidState = 4, //! Unknown instruction. This happens only if instruction code is //! out of bounds. Shouldn't happen. - kErrorAssemblerUnknownInst = 5, - //! Illegal instruction, usually generated by asmjit::Assembler - //! class when emitting instruction opcode. If this error is generated the - //! target buffer is not affected by this invalid instruction. + kErrorUnknownInst = 5, + + //! Illegal instruction (Assembler). //! - //! You can also get this status code if you are under x64 (64-bit x86) and - //! you tried to decode instruction using AH, BH, CH or DH register with REX - //! prefix. These registers can't be accessed if REX prefix is used and AsmJit - //! didn't check for this situation in intrinsics (`BaseCompiler` takes care of - //! this and rearrange registers if needed). + //! This status code can also be returned in X64 mode if AH, BH, CH or DH + //! registers have been used together with a REX prefix. The instruction + //! is not encodable in such case. //! - //! Example of raising `kErrorAssemblerIllegalInst` error. + //! Example of raising `kErrorIllegalInst` error. //! //! ~~~ //! // Invalid address size. //! a.mov(dword_ptr(eax), al); //! - //! // Undecodable instruction - AH used with r10 that can be encoded by using - //! // REX prefix only. + //! // Undecodable instruction - AH used with R10, however R10 can only be + //! // encoded by using REX prefix, which conflicts with AH. //! a.mov(byte_ptr(r10), ah); //! ~~~ //! - //! @note In debug mode you get assertion failure instead of setting error - //! code. - kErrorAssemblerIllegalInst = 6, - //! Illegal addressing used (unencodable). - kErrorAssemblerIllegalAddr = 7, - //! Short jump instruction used, but displacement is out of bounds. - kErrorAssemblerIllegalShortJump = 8, + //! \note In debug mode assertion is raised instead of returning an error. + kErrorIllegalInst = 6, - //! No function defined. - kErrorCompilerNoFunc = 9, - //! Function generation is not finished by using `BaseCompiler::endFunc()` - //! or something bad happened during generation related to function. This can - //! be missing compiler node, etc... - kErrorCompilerIncompleteFunc = 10, - //! Tried to generate a function with overlapped arguments. - kErrorCompilerOverlappedArgs = 11, + //! Illegal (unencodable) addressing used (Assembler). + kErrorIllegalAddresing = 7, - //! Compiler can't allocate registers. - kErrorCompilerNoRegs = 12, - //! Compiler can't allocate registers, because they overlap. - kErrorCompilerOverlappedRegs = 13, + //! Illegal (unencodable) displacement used (Assembler). + //! + //! X86/X64 + //! ------- + //! + //! Short form of jump instruction has been used, but the displacement is out + //! of bounds. + kErrorIllegalDisplacement = 8, - //! Tried to call function with an incompatible argument. - kErrorCompilerIncompatibleArg = 14, - //! Incompatible return value. - kErrorCompilerIncompatibleRet = 15, + //! Invalid function (Compiler). + //! + //! Returned if no function is defined, but `make()` has been called. + kErrorInvalidFunction = 9, + + //! A variable has been assigned more than once to a function argument (Compiler). + kErrorOverlappedArgs = 10, //! Count of AsmJit status codes. Can grow in future. - kErrorCount = 16 + kErrorCount = 11 }; // ============================================================================ // [asmjit::Error] // ============================================================================ +//! AsmJit error type (unsigned integer). typedef uint32_t Error; // ============================================================================ @@ -126,7 +125,7 @@ struct ErrorHandler { //! Reference this error handler. //! - //! @note This member function is provided for convenience. The default + //! \note This member function is provided for convenience. The default //! implementation does nothing. If you are working in environment where //! multiple `ErrorHandler` instances are used by a different code generators //! you may provide your own functionality for reference counting. In that @@ -135,7 +134,7 @@ struct ErrorHandler { //! Release this error handler. //! - //! @note This member function is provided for convenience. See `addRef()` + //! \note This member function is provided for convenience. See `addRef()` //! for more detailed information related to reference counting. ASMJIT_API virtual void release(); @@ -183,11 +182,13 @@ struct ErrorUtil { static ASMJIT_API const char* asString(Error code); }; +//! \} + // ============================================================================ // [ASMJIT_PROPAGATE_ERROR] // ============================================================================ -//! @internal +//! \internal //! //! Used by AsmJit to return the `_Exp_` result if it's an error. #define ASMJIT_PROPAGATE_ERROR(_Exp_) \ @@ -197,8 +198,6 @@ struct ErrorUtil { return errval_; \ } while (0) -//! @} - } // asmjit namespace // [Api-End] diff --git a/src/asmjit/base/func.h b/src/asmjit/base/func.h index e1d5a3d..9e7e6b9 100644 --- a/src/asmjit/base/func.h +++ b/src/asmjit/base/func.h @@ -9,23 +9,15 @@ #define _ASMJIT_BASE_FUNC_H // [Dependencies - AsmJit] -#include "../base/defs.h" -#include "../base/globals.h" +#include "../base/operand.h" // [Api-Begin] #include "../apibegin.h" namespace asmjit { -//! @addtogroup asmjit_base_codegen -//! @{ - -// ============================================================================ -// [Forward Declarations] -// ============================================================================ - -template -struct FnTypeId; +//! \addtogroup asmjit_base_tree +//! \{ // ============================================================================ // [asmjit::kFuncConv] @@ -141,24 +133,15 @@ ASMJIT_ENUM(kFuncFlags) { ASMJIT_ENUM(kFuncDir) { //! Arguments are passed left to right. //! - //! This arguments direction is unusual to C programming, it's used by pascal - //! compilers and in some calling conventions by Borland compiler). + //! This arguments direction is unusual in C, however it's used in Pascal. kFuncDirLtr = 0, + //! Arguments are passed right ro left //! - //! This is default argument direction in C programming. + //! This is the default argument direction in C. kFuncDirRtl = 1 }; -// ============================================================================ -// [asmjit::kFuncStackInvalid] -// ============================================================================ - -enum { - //! Invalid stack offset in function or function parameter. - kFuncStackInvalid = -1 -}; - // ============================================================================ // [asmjit::kFuncArg] // ============================================================================ @@ -196,23 +179,17 @@ ASMJIT_ENUM(kFuncRet) { }; // ============================================================================ -// [asmjit::FnTypeId] +// [asmjit::kFuncStackInvalid] // ============================================================================ -//! @internal -#define ASMJIT_DECLARE_TYPE_CORE(_PtrId_) \ - template \ - struct TypeId { enum { kId = static_cast(::asmjit::kVarTypeInvalid) }; }; \ - \ - template \ - struct TypeId { enum { kId = _PtrId_ }; } +enum kFuncMisc { + //! Invalid stack offset in function or function parameter. + kFuncStackInvalid = -1 +}; -//! @internal -//! -//! Declare C/C++ type-id mapped to `kVarType`. -#define ASMJIT_DECLARE_TYPE_ID(_T_, _Id_) \ - template<> \ - struct TypeId<_T_> { enum { kId = _Id_ }; } +// ============================================================================ +// [asmjit::FnTypeId] +// ============================================================================ //! Function builder 'void' type. struct FnVoid {}; @@ -248,6 +225,20 @@ struct FnFloat {}; struct FnDouble {}; #if !defined(ASMJIT_DOCGEN) +template +struct FnTypeId; + +#define ASMJIT_DECLARE_TYPE_CORE(_PtrId_) \ + template \ + struct TypeId { enum { kId = static_cast(::asmjit::kVarTypeInvalid) }; }; \ + \ + template \ + struct TypeId { enum { kId = _PtrId_ }; } + +#define ASMJIT_DECLARE_TYPE_ID(_T_, _Id_) \ + template<> \ + struct TypeId<_T_> { enum { kId = _Id_ }; } + ASMJIT_DECLARE_TYPE_CORE(kVarTypeIntPtr); ASMJIT_DECLARE_TYPE_ID(void, kVarTypeInvalid); @@ -398,7 +389,7 @@ struct FuncDecl { //! //! Direction should be always `kFuncDirRtl`. //! - //! @note This is related to used calling convention, it's not affected by + //! \note This is related to used calling convention, it's not affected by //! number of function arguments or their types. ASMJIT_INLINE uint32_t getDirection() const { return _direction; } @@ -471,12 +462,12 @@ struct FuncDecl { //! Size of "Red Zone". //! - //! @note Used by AMD64-ABI (128 bytes). + //! \note Used by AMD64-ABI (128 bytes). uint16_t _redZoneSize; //! Size of "Spill Zone". //! - //! @note Used by WIN64-ABI (32 bytes). + //! \note Used by WIN64-ABI (32 bytes). uint16_t _spillZoneSize; //! Function arguments (including HI arguments) mapped to physical @@ -542,6 +533,7 @@ struct FuncBuilderX : public FuncPrototype { uint32_t _builderArgList[kFuncArgCount]; }; +//! \internal #define _TID(_T_) TypeId<_T_>::kId //! Function builder (no args). @@ -644,7 +636,7 @@ struct FuncBuilder10 : public FuncPrototype { #undef _TID -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/globals.h b/src/asmjit/base/globals.h index 091c1af..ba9d0d5 100644 --- a/src/asmjit/base/globals.h +++ b/src/asmjit/base/globals.h @@ -16,15 +16,21 @@ namespace asmjit { -//! @addtogroup asmjit_base_globals -//! @{ +//! \addtogroup asmjit_base_general +//! \{ // ============================================================================ // [asmjit::kGlobals] // ============================================================================ +//! Invalid index +//! +//! Invalid index is the last possible index that is never used in practice. In +//! AsmJit it is used exclusively with strings to indicate the the length of the +//! string is not known and has to be determined. static const size_t kInvalidIndex = ~static_cast(0); +//! Global constants. ASMJIT_ENUM(kGlobals) { //! Invalid value or operand id. kInvalidValue = 0xFFFFFFFF, @@ -32,26 +38,20 @@ ASMJIT_ENUM(kGlobals) { //! Invalid register index. kInvalidReg = 0xFF, - //! Minimum reserved bytes in `Buffer`. - kBufferGrow = 32U, - - //! Minimum size of assembler/compiler code buffer. - kMemAllocMinimum = 4096, + //! Host memory allocator overhead. + //! + //! The overhead is decremented from all zone allocators so the operating + //! system doesn't have allocate extra virtual page to keep tract of the + //! requested memory block. + //! + //! The number is actually a guess. + kMemAllocOverhead = sizeof(intptr_t) * 4, //! Memory grow threshold. //! //! After the grow threshold is reached the capacity won't be doubled //! anymore. - kMemAllocGrowMax = 8192 * 1024, - - //! Host memory allocator overhead. - //! - //! We decrement the overhead from our pools so the host operating system - //! doesn't need allocate an extra virtual page to put the data it needs - //! to manage the requested memory block (for example if a single virtual - //! page is 4096 and we require the same memory size we decrease our - //! requirement by kMemAllocOverhead). - kMemAllocOverhead = sizeof(intptr_t) * 4, + kMemAllocGrowMax = 8192 * 1024 }; // ============================================================================ @@ -87,7 +87,21 @@ ASMJIT_ENUM(kArch) { kArchHost64Bit = sizeof(intptr_t) >= 8 }; -//! @} +// ============================================================================ +// [asmjit::Ptr / SignedPtr] +// ============================================================================ + +//! 64-bit unsigned pointer, compatible with JIT and non-JIT generators. +//! +//! This is the preferred pointer type to use with AsmJit library. It has a +//! capability to hold any pointer for any architecture making it an ideal +//! candidate for cross-platform code generation. +typedef uint64_t Ptr; + +//! 64-bit signed pointer, like \ref Ptr, but made signed. +typedef int64_t SignedPtr; + +//! \} // ============================================================================ // [asmjit::Init / NoInit] @@ -105,17 +119,18 @@ static const _NoInit NoInit = {}; // [asmjit::Assert] // ============================================================================ -//! @addtogroup asmjit_base_logging_and_errors -//! @{ +//! \addtogroup asmjit_base_general +//! \{ //! Called in debug build on assertion failure. //! -//! @param exp Expression that failed. -//! @param file Source file name where it happened. -//! @param line Line in the source file. +//! \param exp Expression that failed. +//! \param file Source file name where it happened. +//! \param line Line in the source file. //! //! If you have problems with assertions put a breakpoint at assertionFailed() -//! function (asmjit/base/assert.cpp) to see what happened. +//! function (asmjit/base/globals.cpp) and check the call stack to locate the +//! failing code. ASMJIT_API void assertionFailed(const char* exp, const char* file, int line); #if defined(ASMJIT_DEBUG) @@ -127,7 +142,7 @@ ASMJIT_API void assertionFailed(const char* exp, const char* file, int line); #define ASMJIT_ASSERT(_Exp_) ASMJIT_NOP() #endif // DEBUG -//! @} +//! \} } // asmjit namespace @@ -135,8 +150,8 @@ ASMJIT_API void assertionFailed(const char* exp, const char* file, int line); // [asmjit_cast<>] // ============================================================================ -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ //! Cast used to cast pointer to function. It's like reinterpret_cast<>, //! but uses internally C style cast to work with MinGW. @@ -148,7 +163,7 @@ ASMJIT_API void assertionFailed(const char* exp, const char* file, int line); template static ASMJIT_INLINE T asmjit_cast(Z* p) { return (T)p; } -//! @} +//! \} // [Api-End] #include "../apiend.h" diff --git a/src/asmjit/base/intutil.h b/src/asmjit/base/intutil.h index 440c64e..83114f5 100644 --- a/src/asmjit/base/intutil.h +++ b/src/asmjit/base/intutil.h @@ -20,14 +20,14 @@ namespace asmjit { -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::IntTraits] // ============================================================================ -//! @internal +//! \internal template struct IntTraits { enum { @@ -53,13 +53,13 @@ struct IntUtil { // [Float <-> Int] // -------------------------------------------------------------------------- - //! @internal + //! \internal union Float { int32_t i; float f; }; - //! @internal + //! \internal union Double { int64_t i; double d; @@ -144,7 +144,7 @@ struct IntUtil { // [AsmJit - IsInt/IsUInt] // -------------------------------------------------------------------------- - //! Get whether the given integer `x` can be casted to a signed 8-bit integer. + //! Get whether the given integer `x` can be casted to 8-bit signed integer. template static ASMJIT_INLINE bool isInt8(T x) { if (IntTraits::kIsSigned) @@ -153,7 +153,7 @@ struct IntUtil { return x <= T(127); } - //! Get whether the given integer `x` can be casted to an unsigned 8-bit integer. + //! Get whether the given integer `x` can be casted to 8-bit unsigned integer. template static ASMJIT_INLINE bool isUInt8(T x) { if (IntTraits::kIsSigned) @@ -162,7 +162,7 @@ struct IntUtil { return sizeof(T) <= sizeof(uint8_t) ? true : x <= T(255); } - //! Get whether the given integer `x` can be casted to a signed 16-bit integer. + //! Get whether the given integer `x` can be casted to 16-bit signed integer. template static ASMJIT_INLINE bool isInt16(T x) { if (IntTraits::kIsSigned) @@ -171,7 +171,7 @@ struct IntUtil { return x >= T(0) && (sizeof(T) <= sizeof(int16_t) ? true : x <= T(32767)); } - //! Get whether the given integer `x` can be casted to an unsigned 16-bit integer. + //! Get whether the given integer `x` can be casted to 16-bit unsigned integer. template static ASMJIT_INLINE bool isUInt16(T x) { if (IntTraits::kIsSigned) @@ -180,7 +180,7 @@ struct IntUtil { return sizeof(T) <= sizeof(uint16_t) ? true : x <= T(65535); } - //! Get whether the given integer `x` can be casted to a signed 32-bit integer. + //! Get whether the given integer `x` can be casted to 32-bit signed integer. template static ASMJIT_INLINE bool isInt32(T x) { if (IntTraits::kIsSigned) @@ -189,7 +189,7 @@ struct IntUtil { return x >= T(0) && (sizeof(T) <= sizeof(int32_t) ? true : x <= T(2147483647)); } - //! Get whether the given integer `x` can be casted to an unsigned 32-bit integer. + //! Get whether the given integer `x` can be casted to 32-bit unsigned integer. template static ASMJIT_INLINE bool isUInt32(T x) { if (IntTraits::kIsSigned) @@ -315,7 +315,7 @@ struct IntUtil { // [AsmJit - FindFirstBit] // -------------------------------------------------------------------------- - //! @internal + //! \internal static ASMJIT_INLINE uint32_t findFirstBitSlow(uint32_t mask) { // This is a reference (slow) implementation of findFirstBit(), used when // we don't have compiler support for this task. The implementation speed @@ -716,7 +716,7 @@ union UInt64 { }; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/lock.h b/src/asmjit/base/lock.h index f39870d..a9a449e 100644 --- a/src/asmjit/base/lock.h +++ b/src/asmjit/base/lock.h @@ -11,11 +11,6 @@ // [Dependencies - AsmJit] #include "../build.h" -// [Dependencies - Windows] -#if defined(ASMJIT_OS_WINDOWS) -# include -#endif // ASMJIT_OS_WINDOWS - // [Dependencies - Posix] #if defined(ASMJIT_OS_POSIX) # include @@ -26,8 +21,8 @@ namespace asmjit { -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::Lock] @@ -80,7 +75,7 @@ struct Lock { //! Get handle. ASMJIT_INLINE Handle& getHandle() { return _handle; } - //! @overload + //! \overload ASMJIT_INLINE const Handle& getHandle() const { return _handle; } // -------------------------------------------------------------------------- @@ -95,7 +90,7 @@ struct Lock { // [asmjit::AutoLock] // ============================================================================ -//! Scope auto locker. +//! Scoped lock. struct AutoLock { ASMJIT_NO_COPY(AutoLock) @@ -121,7 +116,7 @@ struct AutoLock { Lock& _target; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/logger.h b/src/asmjit/base/logger.h index 52b0383..d7de08e 100644 --- a/src/asmjit/base/logger.h +++ b/src/asmjit/base/logger.h @@ -9,7 +9,6 @@ #define _ASMJIT_BASE_LOGGER_H // [Dependencies - AsmJit] -#include "../base/defs.h" #include "../base/string.h" // [Dependencies - C] @@ -20,8 +19,8 @@ namespace asmjit { -//! @addtogroup asmjit_base_logging_and_errors -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::kLoggerOption] @@ -156,13 +155,11 @@ struct FileLogger : public Logger { //! Get `FILE*` stream. //! - //! @note Return value can be `NULL`. + //! \note Return value can be `NULL`. ASMJIT_INLINE FILE* getStream() const { return _stream; } - //! Set `FILE*` stream. - //! - //! @param stream `FILE` stream where to log output, can be set to `NULL` to - //! disable logging. + //! Set `FILE*` stream, can be set to `NULL` to disable logging, although + //! the `CodeGen` will still call `logString` even if there is no stream. ASMJIT_API void setStream(FILE* stream); // -------------------------------------------------------------------------- @@ -224,7 +221,7 @@ struct StringLogger : public Logger { StringBuilder _stringBuilder; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/memorymanager.cpp b/src/asmjit/base/memorymanager.cpp deleted file mode 100644 index e69de29..0000000 diff --git a/src/asmjit/base/memorymanager.h b/src/asmjit/base/memorymanager.h deleted file mode 100644 index e69de29..0000000 diff --git a/src/asmjit/base/defs.cpp b/src/asmjit/base/operand.cpp similarity index 94% rename from src/asmjit/base/defs.cpp rename to src/asmjit/base/operand.cpp index 922204b..2dc82b7 100644 --- a/src/asmjit/base/defs.cpp +++ b/src/asmjit/base/operand.cpp @@ -8,7 +8,7 @@ #define ASMJIT_EXPORTS // [Dependencies - AsmJit] -#include "../base/defs.h" +#include "../base/operand.h" // [Api-Begin] #include "../apibegin.h" diff --git a/src/asmjit/base/defs.h b/src/asmjit/base/operand.h similarity index 91% rename from src/asmjit/base/defs.h rename to src/asmjit/base/operand.h index b038e65..8caec88 100644 --- a/src/asmjit/base/defs.h +++ b/src/asmjit/base/operand.h @@ -5,8 +5,8 @@ // Zlib - See LICENSE.md file in the package. // [Guard] -#ifndef _ASMJIT_BASE_DEFS_H -#define _ASMJIT_BASE_DEFS_H +#ifndef _ASMJIT_BASE_OPERAND_H +#define _ASMJIT_BASE_OPERAND_H // [Dependencies - AsmJit] #include "../base/intutil.h" @@ -16,9 +16,6 @@ namespace asmjit { -//! @addtogroup asmjit_base_codegen -//! @{ - // ============================================================================ // [Forward Declarations] // ============================================================================ @@ -26,6 +23,9 @@ namespace asmjit { struct BaseAssembler; struct BaseCompiler; +//! \addtogroup asmjit_base_general +//! \{ + // ============================================================================ // [asmjit::kOperandType] // ============================================================================ @@ -71,51 +71,6 @@ ASMJIT_ENUM(kRegClass) { kRegClassInvalid = 0xFF }; -// ============================================================================ -// [asmjit::kInstCode] -// ============================================================================ - -//! Instruction codes (stub). -ASMJIT_ENUM(kInstCode) { - //! No instruction. - kInstNone = 0 -}; - -// ============================================================================ -// [asmjit::kInstOptions] -// ============================================================================ - -//! Instruction options (stub). -ASMJIT_ENUM(kInstOptions) { - //! No instruction options. - kInstOptionNone = 0x00, - - //! Emit short form of the instruction. - //! - //! X86/X64: - //! - //! Short form is mostly related to jmp and jcc instructions, but can be used - //! by other instructions supporting 8-bit or 32-bit immediates. This option - //! can be dangerous if the short jmp/jcc is required, but not encodable due - //! to large displacement, in such case an error happens and the whole - //! assembler/compiler stream is unusable. - kInstOptionShortForm = 0x01, - - //! Emit long form of the instruction. - //! - //! X86/X64: - //! - //! Long form is mosrlt related to jmp and jcc instructions, but like the - //! `kInstOptionShortForm` option it can be used by other instructions - //! supporting both 8-bit and 32-bit immediates. - kInstOptionLongForm = 0x02, - - //! Condition is likely to be taken (instruction). - kInstOptionTaken = 0x04, - //! Condition is unlikely to be taken (instruction). - kInstOptionNotTaken = 0x08 -}; - // ============================================================================ // [asmjit::kSize] // ============================================================================ @@ -174,21 +129,21 @@ ASMJIT_ENUM(kMemType) { // ============================================================================ ASMJIT_ENUM(kVarType) { - //! Variable is signed 8-bit integer. + //! Variable is 8-bit signed integer. kVarTypeInt8 = 0, - //! Variable is unsigned 8-bit integer. + //! Variable is 8-bit unsigned integer. kVarTypeUInt8 = 1, - //! Variable is signed 16-bit integer. + //! Variable is 16-bit signed integer. kVarTypeInt16 = 2, - //! Variable is unsigned 16-bit integer. + //! Variable is 16-bit unsigned integer. kVarTypeUInt16 = 3, - //! Variable is signed 32-bit integer. + //! Variable is 32-bit signed integer. kVarTypeInt32 = 4, - //! Variable is unsigned 32-bit integer. + //! Variable is 32-bit unsigned integer. kVarTypeUInt32 = 5, - //! Variable is signed 64-bit integer. + //! Variable is 64-bit signed integer. kVarTypeInt64 = 6, - //! Variable is unsigned 64-bit integer. + //! Variable is 64-bit unsigned integer. kVarTypeUInt64 = 7, //! Variable is target `intptr_t`, not compatible with host `intptr_t`. @@ -204,38 +159,17 @@ ASMJIT_ENUM(kVarType) { //! Invalid variable type. kVarTypeInvalid = 0xFF, - //! @internal + //! \internal _kVarTypeIntStart = kVarTypeInt8, - //! @internal + //! \internal _kVarTypeIntEnd = kVarTypeUIntPtr, - //! @internal + //! \internal _kVarTypeFpStart = kVarTypeFp32, - //! @internal + //! \internal _kVarTypeFpEnd = kVarTypeFp64 }; -// ============================================================================ -// [asmjit::kRelocMode] -// ============================================================================ - -ASMJIT_ENUM(kRelocMode) { - kRelocAbsToAbs = 0, - kRelocRelToAbs = 1, - kRelocAbsToRel = 2, - kRelocTrampoline = 3 -}; - -// ============================================================================ -// [asmjit::Ptr] -// ============================================================================ - -//! 64-bit signed pointer, compatible with JIT and non-JIT generators. -typedef int64_t SignedPtr; - -//! 64-bit unsigned pointer, compatible with JIT and non-JIT generators. -typedef uint64_t Ptr; - // ============================================================================ // [asmjit::Operand] // ============================================================================ @@ -246,7 +180,7 @@ struct Operand { // [Structs] // -------------------------------------------------------------------------- - //! @internal + //! \internal //! //! Base operand data. struct BaseOp { @@ -261,11 +195,11 @@ struct Operand { //! Operand id, identifier used by `BaseAssembler` and `BaseCompiler`. //! - //! @note Uninitialized operand has always set id to `kInvalidValue`. + //! \note Uninitialized operand has always set id to `kInvalidValue`. uint32_t id; }; - //! @internal + //! \internal //! //! Register or Variable operand data. struct VRegOp { @@ -299,13 +233,13 @@ struct Operand { //! Variable type. uint32_t vType; - //! @internal + //! \internal //! //! Unused. uint32_t vUnused; }; - //! @internal + //! \internal //! //! Memory or Variable operand data. struct VMemOp { @@ -328,7 +262,7 @@ struct Operand { int32_t displacement; }; - //! @internal + //! \internal //! //! Immediate operand data. struct ImmOp { @@ -345,24 +279,24 @@ struct Operand { uint32_t id; union { - //! 8x signed 8-bit immediate values. + //! 8x8-bit signed immediate values. int8_t _i8[8]; - //! 8x unsigned 8-bit immediate values. + //! 8x8-bit unsigned immediate values. uint8_t _u8[8]; - //! 4x signed 16-bit immediate values. + //! 4x16-bit signed immediate values. int16_t _i16[4]; - //! 4x unsigned 16-bit immediate values. + //! 4x16-bit unsigned immediate values. uint16_t _u16[4]; - //! 2x signed 32-bit immediate values. + //! 2x32-bit signed immediate values. int32_t _i32[2]; - //! 2x unsigned 32-bit immediate values. + //! 2x32-bit unsigned immediate values. uint32_t _u32[2]; - //! 1x signed 64-bit immediate value. + //! 1x64-bit signed immediate value. int64_t _i64[1]; - //! 1x unsigned 64-bit immediate value. + //! 1x64-bit unsigned immediate value. uint64_t _u64[1]; //! 2x SP-FP values. @@ -372,7 +306,7 @@ struct Operand { } value; }; - //! @internal + //! \internal //! //! Label operand data. struct LabelOp { @@ -419,7 +353,7 @@ struct Operand { // [Init & Copy] // -------------------------------------------------------------------------- - //! @internal + //! \internal //! //! Initialize operand to `other` (used by constructors). ASMJIT_INLINE void _init(const Operand& other) { @@ -448,7 +382,7 @@ struct Operand { _packed[1].setPacked_2x32(u2, u3); } - //! @internal + //! \internal //! //! Initialize operand to `other` (used by assign operators). ASMJIT_INLINE void _copy(const Operand& other) { @@ -525,7 +459,7 @@ struct Operand { // -------------------------------------------------------------------------- //! Get operand id. - //! + //! //! Operand id's are used internally by `BaseAssembler` and `BaseCompiler`. //! //! There is no way to change or remove operand id. Unneeded operands can be @@ -553,8 +487,6 @@ struct Operand { }; }; -ASMJIT_VAR const Operand noOperand; - // ============================================================================ // [asmjit::OperandUtil] // ============================================================================ @@ -578,7 +510,7 @@ struct OperandUtil { //! Get whether the id refers to `BaseVar`. //! - //! @note The function will never return `true` if the id is `kInvalidValue`. + //! \note The function will never return `true` if the id is `kInvalidValue`. //! The trick is to compare a given id to -1 (kInvalidValue) so we check both //! using only one comparison. static ASMJIT_INLINE bool isVarId(uint32_t id) { @@ -587,7 +519,7 @@ struct OperandUtil { //! Get whether the id refers to `Label`. //! - //! @note The function will never return `true` if the id is `kInvalidValue`. + //! \note The function will never return `true` if the id is `kInvalidValue`. static ASMJIT_INLINE bool isLabelId(uint32_t id) { return static_cast(id) >= 0; } @@ -1075,21 +1007,6 @@ struct Imm : public Operand { } }; -//! Create signed immediate value operand. -static ASMJIT_INLINE Imm imm(int64_t val) { - return Imm(val); -} - -//! Create unsigned immediate value operand. -static ASMJIT_INLINE Imm imm_u(uint64_t val) { - return Imm(static_cast(val)); -} - -//! Create void* pointer immediate value operand. -static ASMJIT_INLINE Imm imm_ptr(void* p) { - return Imm(static_cast((intptr_t)p)); -} - // ============================================================================ // [asmjit::Label] // ============================================================================ @@ -1164,7 +1081,30 @@ struct Label : public Operand { ASMJIT_INLINE bool operator!=(const Label& other) const { return _base.id != other._base.id; } }; -//! @} +// ============================================================================ +// [asmjit::Operand - Globals] +// ============================================================================ + +//! No operand, can be used to reset an operand by assignment or to refer to an +//! operand that doesn't exist. +ASMJIT_VAR const Operand noOperand; + +//! Create signed immediate value operand. +static ASMJIT_INLINE Imm imm(int64_t val) { + return Imm(val); +} + +//! Create unsigned immediate value operand. +static ASMJIT_INLINE Imm imm_u(uint64_t val) { + return Imm(static_cast(val)); +} + +//! Create void* pointer immediate value operand. +static ASMJIT_INLINE Imm imm_ptr(void* p) { + return Imm(static_cast((intptr_t)p)); +} + +//! \} } // asmjit namespace @@ -1172,4 +1112,4 @@ struct Label : public Operand { #include "../apiend.h" // [Guard] -#endif // _ASMJIT_BASE_DEFS_H +#endif // _ASMJIT_BASE_OPERAND_H diff --git a/src/asmjit/base/podlist.h b/src/asmjit/base/podlist.h index d0e84ec..899e0b9 100644 --- a/src/asmjit/base/podlist.h +++ b/src/asmjit/base/podlist.h @@ -9,7 +9,6 @@ #define _ASMJIT_BASE_PODLIST_H // [Dependencies - AsmJit] -#include "../base/defs.h" #include "../base/globals.h" // [Api-Begin] @@ -17,14 +16,14 @@ namespace asmjit { -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::PodList] // ============================================================================ -//! @internal +//! \internal template struct PodList { ASMJIT_NO_COPY(PodList) @@ -107,7 +106,7 @@ struct PodList { Link* _last; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/podvector.h b/src/asmjit/base/podvector.h index 9b82a1e..e4d05cf 100644 --- a/src/asmjit/base/podvector.h +++ b/src/asmjit/base/podvector.h @@ -9,23 +9,21 @@ #define _ASMJIT_BASE_PODVECTOR_H // [Dependencies - AsmJit] -#include "../base/defs.h" #include "../base/error.h" -#include "../base/globals.h" // [Api-Begin] #include "../apibegin.h" namespace asmjit { -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::PodVectorData] // ============================================================================ -//! @internal +//! \internal struct PodVectorData { //! Get data. ASMJIT_INLINE void* getData() const { @@ -42,7 +40,7 @@ struct PodVectorData { // [asmjit::PodVectorBase] // ============================================================================ -//! @internal +//! \internal struct PodVectorBase { static ASMJIT_API const PodVectorData _nullData; @@ -124,7 +122,7 @@ struct PodVector : PodVectorBase { return static_cast(_d->getData()); } - //! @overload + //! \overload ASMJIT_INLINE const T* getData() const { return static_cast(_d->getData()); } @@ -271,7 +269,7 @@ struct PodVector : PodVectorBase { } }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/runtime.cpp b/src/asmjit/base/runtime.cpp index 3a2a9e5..d73e508 100644 --- a/src/asmjit/base/runtime.cpp +++ b/src/asmjit/base/runtime.cpp @@ -10,7 +10,6 @@ // [Dependencies - AsmJit] #include "../base/assembler.h" #include "../base/cpuinfo.h" -#include "../base/defs.h" #include "../base/error.h" #include "../base/runtime.h" @@ -77,7 +76,7 @@ Error JitRuntime::add(void** dst, BaseAssembler* assembler) { if (codeSize == 0) { *dst = NULL; - return kErrorCompilerNoFunc; + return kErrorInvalidFunction; } void* p = _memMgr.alloc(codeSize, getAllocType()); @@ -96,6 +95,8 @@ Error JitRuntime::add(void** dst, BaseAssembler* assembler) { // Return the code. *dst = p; + + flush(p, relocSize); return kErrorOk; } @@ -103,6 +104,18 @@ Error JitRuntime::release(void* p) { return _memMgr.release(p); } +void JitRuntime::flush(void* p, size_t size) { + // Only useful on non-x86 architectures. +#if !defined(ASMJIT_HOST_X86) && !defined(ASMJIT_HOST_X64) + + // Windows has built-in support in kernel32.dll. +#if defined(ASMJIT_OS_WINDOWS) + ::FlushInstructionCache(_memMgr.getProcessHandle(), p, size); +#endif // ASMJIT_OS_WINDOWS + +#endif // !ASMJIT_HOST_X86 && !ASMJIT_HOST_X64 +} + } // asmjit namespace // [Api-End] diff --git a/src/asmjit/base/runtime.h b/src/asmjit/base/runtime.h index 32aaeca..29c472d 100644 --- a/src/asmjit/base/runtime.h +++ b/src/asmjit/base/runtime.h @@ -17,9 +17,6 @@ namespace asmjit { -//! @addtogroup asmjit_base_codegen -//! @{ - // ============================================================================ // [Forward Declarations] // ============================================================================ @@ -27,6 +24,9 @@ namespace asmjit { struct BaseAssembler; struct BaseCpuInfo; +//! \addtogroup asmjit_base_general +//! \{ + // ============================================================================ // [asmjit::Runtime] // ============================================================================ @@ -54,10 +54,12 @@ struct Runtime { //! Get CPU information. virtual const BaseCpuInfo* getCpuInfo() = 0; - //! Allocate a memory needed for a code generated by `BaseAssembler` and + //! Allocate a memory needed for a code generated by `assembler` and //! relocate it to the target location. //! - //! Returns Status code as `kError`. + //! The beginning of the memory allocated for the function is returned in + //! `dst`. Returns Status code as \ref kError, on failure `dst` is set to + //! `NULL`. virtual Error add(void** dst, BaseAssembler* assembler) = 0; //! Release memory allocated by `add`. @@ -115,6 +117,19 @@ struct JitRuntime : public Runtime { ASMJIT_API virtual Error add(void** dst, BaseAssembler* assembler); ASMJIT_API virtual Error release(void* p); + //! Flush instruction cache. + //! + //! This member function is called after the code has been copied to the + //! destination buffer. It is only useful for JIT code generation as it + //! causes to flush the processor cache so it will not use the old data. + //! + //! Flushing is basically a NOP under X86/X64, but is needed by architectures + //! not having a transparent cache. + //! + //! This function can also be overridden to improve compatibility with tools + //! like Valgrind, but this is not an official part of AsmJit. + ASMJIT_API virtual void flush(void* p, size_t size); + // -------------------------------------------------------------------------- // [Members] // -------------------------------------------------------------------------- @@ -125,7 +140,7 @@ struct JitRuntime : public Runtime { uint32_t _allocType; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/string.cpp b/src/asmjit/base/string.cpp index 3d3ab3e..f5092c1 100644 --- a/src/asmjit/base/string.cpp +++ b/src/asmjit/base/string.cpp @@ -8,7 +8,6 @@ #define ASMJIT_EXPORTS // [Dependencies - AsmJit] -#include "../base/defs.h" #include "../base/intutil.h" #include "../base/string.h" diff --git a/src/asmjit/base/string.h b/src/asmjit/base/string.h index bcd9b7a..145a689 100644 --- a/src/asmjit/base/string.h +++ b/src/asmjit/base/string.h @@ -9,7 +9,6 @@ #define _ASMJIT_BASE_STRING_H // [Dependencies - AsmJit] -#include "../base/defs.h" #include "../base/globals.h" // [Dependencies - C] @@ -20,14 +19,14 @@ namespace asmjit { -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::kStringOp] // ============================================================================ -//! @internal +//! \internal //! //! String operation. ASMJIT_ENUM(kStringOp) { @@ -41,7 +40,7 @@ ASMJIT_ENUM(kStringOp) { // [asmjit::kStringFormat] // ============================================================================ -//! @internal +//! \internal //! //! String format flags. ASMJIT_ENUM(kStringFormat) { @@ -55,8 +54,6 @@ ASMJIT_ENUM(kStringFormat) { // [asmjit::StringUtil] // ============================================================================ -//! @internal -//! //! String utilities. struct StringUtil { static ASMJIT_INLINE size_t nlen(const char* s, size_t maxlen) { @@ -72,8 +69,6 @@ struct StringUtil { // [asmjit::StringBuilder] // ============================================================================ -//! @internal -//! //! String builder. //! //! String builder was designed to be able to build a string using append like @@ -339,7 +334,7 @@ struct StringBuilder { // [asmjit::StringBuilderT] // ============================================================================ -//! @internal +//! \internal template struct StringBuilderT : public StringBuilder { ASMJIT_NO_COPY(StringBuilderT) @@ -366,7 +361,7 @@ struct StringBuilderT : public StringBuilder { N + 1 + sizeof(intptr_t)) & ~static_cast(sizeof(intptr_t) - 1)]; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/vectypes.h b/src/asmjit/base/vectypes.h index 7eee34e..930df03 100644 --- a/src/asmjit/base/vectypes.h +++ b/src/asmjit/base/vectypes.h @@ -9,15 +9,15 @@ #define _ASMJIT_BASE_VECTYPES_H // [Dependencies - AsmJit] -#include "../base/defs.h" +#include "../base/globals.h" // [Api-Begin] #include "../apibegin.h" namespace asmjit { -//! @addtogroup asmjit_base_vectypes -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::Vec64Data] @@ -29,7 +29,7 @@ union Vec64Data { // [Construction / Destruction] // -------------------------------------------------------------------------- - //! Set all eight signed 8-bit integers. + //! Set all eight 8-bit signed integers. static ASMJIT_INLINE Vec64Data fromSb( int8_t x0, int8_t x1, int8_t x2, int8_t x3, int8_t x4, int8_t x5, int8_t x6, int8_t x7) { @@ -38,7 +38,7 @@ union Vec64Data { return self; } - //! Set all eight signed 8-bit integers. + //! Set all eight 8-bit signed integers. static ASMJIT_INLINE Vec64Data fromSb( int8_t x0) { @@ -47,7 +47,7 @@ union Vec64Data { return self; } - //! Set all eight unsigned 8-bit integers. + //! Set all eight 8-bit unsigned integers. static ASMJIT_INLINE Vec64Data fromUb( uint8_t x0, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4, uint8_t x5, uint8_t x6, uint8_t x7) { @@ -56,7 +56,7 @@ union Vec64Data { return self; } - //! Set all eight unsigned 8-bit integers. + //! Set all eight 8-bit unsigned integers. static ASMJIT_INLINE Vec64Data fromUb( uint8_t x0) { @@ -65,7 +65,7 @@ union Vec64Data { return self; } - //! Set all four signed 16-bit integers. + //! Set all four 16-bit signed integers. static ASMJIT_INLINE Vec64Data fromSw( int16_t x0, int16_t x1, int16_t x2, int16_t x3) { @@ -74,7 +74,7 @@ union Vec64Data { return self; } - //! Set all four signed 16-bit integers. + //! Set all four 16-bit signed integers. static ASMJIT_INLINE Vec64Data fromSw( int16_t x0) { @@ -83,7 +83,7 @@ union Vec64Data { return self; } - //! Set all four unsigned 16-bit integers. + //! Set all four 16-bit unsigned integers. static ASMJIT_INLINE Vec64Data fromUw( uint16_t x0, uint16_t x1, uint16_t x2, uint16_t x3) { @@ -92,7 +92,7 @@ union Vec64Data { return self; } - //! Set all four unsigned 16-bit integers. + //! Set all four 16-bit unsigned integers. static ASMJIT_INLINE Vec64Data fromUw( uint16_t x0) { @@ -101,7 +101,7 @@ union Vec64Data { return self; } - //! Set all two signed 32-bit integers. + //! Set all two 32-bit signed integers. static ASMJIT_INLINE Vec64Data fromSd( int32_t x0, int32_t x1) { @@ -110,7 +110,7 @@ union Vec64Data { return self; } - //! Set all two signed 32-bit integers. + //! Set all two 32-bit signed integers. static ASMJIT_INLINE Vec64Data fromSd( int32_t x0) { @@ -119,7 +119,7 @@ union Vec64Data { return self; } - //! Set all two unsigned 32-bit integers. + //! Set all two 32-bit unsigned integers. static ASMJIT_INLINE Vec64Data fromUd( uint32_t x0, uint32_t x1) { @@ -128,7 +128,7 @@ union Vec64Data { return self; } - //! Set all two unsigned 32-bit integers. + //! Set all two 32-bit unsigned integers. static ASMJIT_INLINE Vec64Data fromUd( uint32_t x0) { @@ -137,7 +137,7 @@ union Vec64Data { return self; } - //! Set signed 64-bit integer. + //! Set 64-bit signed integer. static ASMJIT_INLINE Vec64Data fromSq( int64_t x0) { @@ -146,7 +146,7 @@ union Vec64Data { return self; } - //! Set unsigned 64-bit integer. + //! Set 64-bit unsigned integer. static ASMJIT_INLINE Vec64Data fromUq( uint64_t x0) { @@ -186,7 +186,7 @@ union Vec64Data { // [Accessors] // -------------------------------------------------------------------------- - //! Set all eight signed 8-bit integers. + //! Set all eight 8-bit signed integers. ASMJIT_INLINE void setSb( int8_t x0, int8_t x1, int8_t x2, int8_t x3, int8_t x4, int8_t x5, int8_t x6, int8_t x7) { @@ -194,14 +194,14 @@ union Vec64Data { sb[4] = x4; sb[5] = x5; sb[6] = x6; sb[7] = x7; } - //! Set all eight signed 8-bit integers. + //! Set all eight 8-bit signed integers. ASMJIT_INLINE void setSb( int8_t x0) { setUb(static_cast(x0)); } - //! Set all eight unsigned 8-bit integers. + //! Set all eight 8-bit unsigned integers. ASMJIT_INLINE void setUb( uint8_t x0, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4, uint8_t x5, uint8_t x6, uint8_t x7) { @@ -209,7 +209,7 @@ union Vec64Data { ub[4] = x4; ub[5] = x5; ub[6] = x6; ub[7] = x7; } - //! Set all eight unsigned 8-bit integers. + //! Set all eight 8-bit unsigned integers. ASMJIT_INLINE void setUb( uint8_t x0) { @@ -224,28 +224,28 @@ union Vec64Data { } } - //! Set all four signed 16-bit integers. + //! Set all four 16-bit signed integers. ASMJIT_INLINE void setSw( int16_t x0, int16_t x1, int16_t x2, int16_t x3) { sw[0] = x0; sw[1] = x1; sw[2] = x2; sw[3] = x3; } - //! Set all four signed 16-bit integers. + //! Set all four 16-bit signed integers. ASMJIT_INLINE void setSw( int16_t x0) { setUw(static_cast(x0)); } - //! Set all four unsigned 16-bit integers. + //! Set all four 16-bit unsigned integers. ASMJIT_INLINE void setUw( uint16_t x0, uint16_t x1, uint16_t x2, uint16_t x3) { uw[0] = x0; uw[1] = x1; uw[2] = x2; uw[3] = x3; } - //! Set all four unsigned 16-bit integers. + //! Set all four 16-bit unsigned integers. ASMJIT_INLINE void setUw( uint16_t x0) { @@ -260,42 +260,42 @@ union Vec64Data { } } - //! Set all two signed 32-bit integers. + //! Set all two 32-bit signed integers. ASMJIT_INLINE void setSd( int32_t x0, int32_t x1) { sd[0] = x0; sd[1] = x1; } - //! Set all two signed 32-bit integers. + //! Set all two 32-bit signed integers. ASMJIT_INLINE void setSd( int32_t x0) { sd[0] = x0; sd[1] = x0; } - //! Set all two unsigned 32-bit integers. + //! Set all two 32-bit unsigned integers. ASMJIT_INLINE void setUd( uint32_t x0, uint32_t x1) { ud[0] = x0; ud[1] = x1; } - //! Set all two unsigned 32-bit integers. + //! Set all two 32-bit unsigned integers. ASMJIT_INLINE void setUd( uint32_t x0) { ud[0] = x0; ud[1] = x0; } - //! Set signed 64-bit integer. + //! Set 64-bit signed integer. ASMJIT_INLINE void setSq( int64_t x0) { sq[0] = x0; } - //! Set unsigned 64-bit integer. + //! Set 64-bit unsigned integer. ASMJIT_INLINE void setUq( uint64_t x0) { @@ -327,21 +327,21 @@ union Vec64Data { // [Members] // -------------------------------------------------------------------------- - //! Array of eight signed 8-bit integers. + //! Array of eight 8-bit signed integers. int8_t sb[8]; - //! Array of eight unsigned 8-bit integers. + //! Array of eight 8-bit unsigned integers. uint8_t ub[8]; - //! Array of four signed 16-bit integers. + //! Array of four 16-bit signed integers. int16_t sw[4]; - //! Array of four unsigned 16-bit integers. + //! Array of four 16-bit unsigned integers. uint16_t uw[4]; - //! Array of two signed 32-bit integers. + //! Array of two 32-bit signed integers. int32_t sd[2]; - //! Array of two unsigned 32-bit integers. + //! Array of two 32-bit unsigned integers. uint32_t ud[2]; - //! Array of one signed 64-bit integer. + //! Array of one 64-bit signed integer. int64_t sq[1]; - //! Array of one unsigned 64-bit integer. + //! Array of one 64-bit unsigned integer. uint64_t uq[1]; //! Array of two SP-FP values. @@ -360,7 +360,7 @@ union Vec128Data { // [Construction / Destruction] // -------------------------------------------------------------------------- - //! Set all sixteen signed 8-bit integers. + //! Set all sixteen 8-bit signed integers. static ASMJIT_INLINE Vec128Data fromSb( int8_t x0 , int8_t x1 , int8_t x2 , int8_t x3 , int8_t x4 , int8_t x5 , int8_t x6 , int8_t x7 , @@ -372,7 +372,7 @@ union Vec128Data { return self; } - //! Set all sixteen signed 8-bit integers. + //! Set all sixteen 8-bit signed integers. static ASMJIT_INLINE Vec128Data fromSb( int8_t x0) { @@ -381,7 +381,7 @@ union Vec128Data { return self; } - //! Set all sixteen unsigned 8-bit integers. + //! Set all sixteen 8-bit unsigned integers. static ASMJIT_INLINE Vec128Data fromUb( uint8_t x0 , uint8_t x1 , uint8_t x2 , uint8_t x3 , uint8_t x4 , uint8_t x5 , uint8_t x6 , uint8_t x7 , @@ -393,7 +393,7 @@ union Vec128Data { return self; } - //! Set all sixteen unsigned 8-bit integers. + //! Set all sixteen 8-bit unsigned integers. static ASMJIT_INLINE Vec128Data fromUb( uint8_t x0) { @@ -402,7 +402,7 @@ union Vec128Data { return self; } - //! Set all eight signed 16-bit integers. + //! Set all eight 16-bit signed integers. static ASMJIT_INLINE Vec128Data fromSw( int16_t x0, int16_t x1, int16_t x2, int16_t x3, int16_t x4, int16_t x5, int16_t x6, int16_t x7) { @@ -411,7 +411,7 @@ union Vec128Data { return self; } - //! Set all eight signed 16-bit integers. + //! Set all eight 16-bit signed integers. static ASMJIT_INLINE Vec128Data fromSw( int16_t x0) { @@ -420,7 +420,7 @@ union Vec128Data { return self; } - //! Set all eight unsigned 16-bit integers. + //! Set all eight 16-bit unsigned integers. static ASMJIT_INLINE Vec128Data fromUw( uint16_t x0, uint16_t x1, uint16_t x2, uint16_t x3, uint16_t x4, uint16_t x5, uint16_t x6, uint16_t x7) { @@ -429,7 +429,7 @@ union Vec128Data { return self; } - //! Set all eight unsigned 16-bit integers. + //! Set all eight 16-bit unsigned integers. static ASMJIT_INLINE Vec128Data fromUw( uint16_t x0) { @@ -438,7 +438,7 @@ union Vec128Data { return self; } - //! Set all four signed 32-bit integers. + //! Set all four 32-bit signed integers. static ASMJIT_INLINE Vec128Data fromSd( int32_t x0, int32_t x1, int32_t x2, int32_t x3) { @@ -447,7 +447,7 @@ union Vec128Data { return self; } - //! Set all four signed 32-bit integers. + //! Set all four 32-bit signed integers. static ASMJIT_INLINE Vec128Data fromSd( int32_t x0) { @@ -456,7 +456,7 @@ union Vec128Data { return self; } - //! Set all four unsigned 32-bit integers. + //! Set all four 32-bit unsigned integers. static ASMJIT_INLINE Vec128Data fromUd( uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3) { @@ -465,7 +465,7 @@ union Vec128Data { return self; } - //! Set all four unsigned 32-bit integers. + //! Set all four 32-bit unsigned integers. static ASMJIT_INLINE Vec128Data fromUd( uint32_t x0) { @@ -474,7 +474,7 @@ union Vec128Data { return self; } - //! Set all two signed 64-bit integers. + //! Set all two 64-bit signed integers. static ASMJIT_INLINE Vec128Data fromSq( int64_t x0, int64_t x1) { @@ -483,7 +483,7 @@ union Vec128Data { return self; } - //! Set all two signed 64-bit integers. + //! Set all two 64-bit signed integers. static ASMJIT_INLINE Vec128Data fromSq( int64_t x0) { @@ -492,7 +492,7 @@ union Vec128Data { return self; } - //! Set all two unsigned 64-bit integers. + //! Set all two 64-bit unsigned integers. static ASMJIT_INLINE Vec128Data fromUq( uint64_t x0, uint64_t x1) { @@ -501,7 +501,7 @@ union Vec128Data { return self; } - //! Set all two unsigned 64-bit integers. + //! Set all two 64-bit unsigned integers. static ASMJIT_INLINE Vec128Data fromUq( uint64_t x0) { @@ -550,7 +550,7 @@ union Vec128Data { // [Accessors] // -------------------------------------------------------------------------- - //! Set all sixteen signed 8-bit integers. + //! Set all sixteen 8-bit signed integers. ASMJIT_INLINE void setSb( int8_t x0 , int8_t x1 , int8_t x2 , int8_t x3 , int8_t x4 , int8_t x5 , int8_t x6 , int8_t x7 , @@ -563,14 +563,14 @@ union Vec128Data { sb[12] = x12; sb[13] = x13; sb[14] = x14; sb[15] = x15; } - //! Set all sixteen signed 8-bit integers. + //! Set all sixteen 8-bit signed integers. ASMJIT_INLINE void setSb( int8_t x0) { setUb(static_cast(x0)); } - //! Set all sixteen unsigned 8-bit integers. + //! Set all sixteen 8-bit unsigned integers. ASMJIT_INLINE void setUb( uint8_t x0 , uint8_t x1 , uint8_t x2 , uint8_t x3 , uint8_t x4 , uint8_t x5 , uint8_t x6 , uint8_t x7 , @@ -583,7 +583,7 @@ union Vec128Data { ub[12] = x12; ub[13] = x13; ub[14] = x14; ub[15] = x15; } - //! Set all sixteen unsigned 8-bit integers. + //! Set all sixteen 8-bit unsigned integers. ASMJIT_INLINE void setUb( uint8_t x0) { @@ -601,7 +601,7 @@ union Vec128Data { } } - //! Set all eight signed 16-bit integers. + //! Set all eight 16-bit signed integers. ASMJIT_INLINE void setSw( int16_t x0, int16_t x1, int16_t x2, int16_t x3, int16_t x4, int16_t x5, int16_t x6, int16_t x7) { @@ -609,14 +609,14 @@ union Vec128Data { sw[4] = x4; sw[5] = x5; sw[6] = x6; sw[7] = x7; } - //! Set all eight signed 16-bit integers. + //! Set all eight 16-bit signed integers. ASMJIT_INLINE void setSw( int16_t x0) { setUw(static_cast(x0)); } - //! Set all eight unsigned 16-bit integers. + //! Set all eight 16-bit unsigned integers. ASMJIT_INLINE void setUw( uint16_t x0, uint16_t x1, uint16_t x2, uint16_t x3, uint16_t x4, uint16_t x5, uint16_t x6, uint16_t x7) { @@ -624,7 +624,7 @@ union Vec128Data { uw[4] = x4; uw[5] = x5; uw[6] = x6; uw[7] = x7; } - //! Set all eight unsigned 16-bit integers. + //! Set all eight 16-bit unsigned integers. ASMJIT_INLINE void setUw( uint16_t x0) { @@ -642,28 +642,28 @@ union Vec128Data { } } - //! Set all four signed 32-bit integers. + //! Set all four 32-bit signed integers. ASMJIT_INLINE void setSd( int32_t x0, int32_t x1, int32_t x2, int32_t x3) { sd[0] = x0; sd[1] = x1; sd[2] = x2; sd[3] = x3; } - //! Set all four signed 32-bit integers. + //! Set all four 32-bit signed integers. ASMJIT_INLINE void setSd( int32_t x0) { setUd(static_cast(x0)); } - //! Set all four unsigned 32-bit integers. + //! Set all four 32-bit unsigned integers. ASMJIT_INLINE void setUd( uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3) { ud[0] = x0; ud[1] = x1; ud[2] = x2; ud[3] = x3; } - //! Set all four unsigned 32-bit integers. + //! Set all four 32-bit unsigned integers. ASMJIT_INLINE void setUd( uint32_t x0) { @@ -680,28 +680,28 @@ union Vec128Data { } } - //! Set all two signed 64-bit integers. + //! Set all two 64-bit signed integers. ASMJIT_INLINE void setSq( int64_t x0, int64_t x1) { sq[0] = x0; sq[1] = x1; } - //! Set all two signed 64-bit integers. + //! Set all two 64-bit signed integers. ASMJIT_INLINE void setSq( int64_t x0) { sq[0] = x0; sq[1] = x0; } - //! Set all two unsigned 64-bit integers. + //! Set all two 64-bit unsigned integers. ASMJIT_INLINE void setUq( uint64_t x0, uint64_t x1) { uq[0] = x0; uq[1] = x1; } - //! Set all two unsigned 64-bit integers. + //! Set all two 64-bit unsigned integers. ASMJIT_INLINE void setUq( uint64_t x0) { @@ -740,21 +740,21 @@ union Vec128Data { // [Members] // -------------------------------------------------------------------------- - //! Array of sixteen signed 8-bit integers. + //! Array of sixteen 8-bit signed integers. int8_t sb[16]; - //! Array of sixteen unsigned 8-bit integers. + //! Array of sixteen 8-bit unsigned integers. uint8_t ub[16]; - //! Array of eight signed 16-bit integers. + //! Array of eight 16-bit signed integers. int16_t sw[8]; - //! Array of eight unsigned 16-bit integers. + //! Array of eight 16-bit unsigned integers. uint16_t uw[8]; - //! Array of four signed 32-bit integers. + //! Array of four 32-bit signed integers. int32_t sd[4]; - //! Array of four unsigned 32-bit integers. + //! Array of four 32-bit unsigned integers. uint32_t ud[4]; - //! Array of two signed 64-bit integers. + //! Array of two 64-bit signed integers. int64_t sq[2]; - //! Array of two unsigned 64-bit integers. + //! Array of two 64-bit unsigned integers. uint64_t uq[2]; //! Array of four 32-bit single precision floating points. @@ -773,7 +773,7 @@ union Vec256Data { // [Construction / Destruction] // -------------------------------------------------------------------------- - //! Set all thirty two signed 8-bit integers. + //! Set all thirty two 8-bit signed integers. static ASMJIT_INLINE Vec256Data fromSb( int8_t x0 , int8_t x1 , int8_t x2 , int8_t x3 , int8_t x4 , int8_t x5 , int8_t x6 , int8_t x7 , @@ -791,7 +791,7 @@ union Vec256Data { return self; } - //! Set all thirty two signed 8-bit integers. + //! Set all thirty two 8-bit signed integers. static ASMJIT_INLINE Vec256Data fromSb( int8_t x0) { @@ -800,7 +800,7 @@ union Vec256Data { return self; } - //! Set all thirty two unsigned 8-bit integers. + //! Set all thirty two 8-bit unsigned integers. static ASMJIT_INLINE Vec256Data fromUb( uint8_t x0 , uint8_t x1 , uint8_t x2 , uint8_t x3 , uint8_t x4 , uint8_t x5 , uint8_t x6 , uint8_t x7 , @@ -818,7 +818,7 @@ union Vec256Data { return self; } - //! Set all thirty two unsigned 8-bit integers. + //! Set all thirty two 8-bit unsigned integers. static ASMJIT_INLINE Vec256Data fromUb( uint8_t x0) { @@ -827,7 +827,7 @@ union Vec256Data { return self; } - //! Set all sixteen signed 16-bit integers. + //! Set all sixteen 16-bit signed integers. static ASMJIT_INLINE Vec256Data fromSw( int16_t x0, int16_t x1, int16_t x2 , int16_t x3 , int16_t x4 , int16_t x5 , int16_t x6 , int16_t x7 , int16_t x8, int16_t x9, int16_t x10, int16_t x11, int16_t x12, int16_t x13, int16_t x14, int16_t x15) @@ -837,7 +837,7 @@ union Vec256Data { return self; } - //! Set all sixteen signed 16-bit integers. + //! Set all sixteen 16-bit signed integers. static ASMJIT_INLINE Vec256Data fromSw( int16_t x0) { @@ -846,7 +846,7 @@ union Vec256Data { return self; } - //! Set all sixteen unsigned 16-bit integers. + //! Set all sixteen 16-bit unsigned integers. static ASMJIT_INLINE Vec256Data fromUw( uint16_t x0, uint16_t x1, uint16_t x2 , uint16_t x3 , uint16_t x4 , uint16_t x5 , uint16_t x6 , uint16_t x7 , uint16_t x8, uint16_t x9, uint16_t x10, uint16_t x11, uint16_t x12, uint16_t x13, uint16_t x14, uint16_t x15) @@ -856,7 +856,7 @@ union Vec256Data { return self; } - //! Set all sixteen unsigned 16-bit integers. + //! Set all sixteen 16-bit unsigned integers. static ASMJIT_INLINE Vec256Data fromUw( uint16_t x0) { @@ -865,7 +865,7 @@ union Vec256Data { return self; } - //! Set all eight signed 32-bit integers. + //! Set all eight 32-bit signed integers. static ASMJIT_INLINE Vec256Data fromSd( int32_t x0, int32_t x1, int32_t x2, int32_t x3, int32_t x4, int32_t x5, int32_t x6, int32_t x7) @@ -875,7 +875,7 @@ union Vec256Data { return self; } - //! Set all eight signed 32-bit integers. + //! Set all eight 32-bit signed integers. static ASMJIT_INLINE Vec256Data fromSd( int32_t x0) { @@ -884,7 +884,7 @@ union Vec256Data { return self; } - //! Set all eight unsigned 32-bit integers. + //! Set all eight 32-bit unsigned integers. static ASMJIT_INLINE Vec256Data fromUd( uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, uint32_t x4, uint32_t x5, uint32_t x6, uint32_t x7) @@ -894,7 +894,7 @@ union Vec256Data { return self; } - //! Set all eight unsigned 32-bit integers. + //! Set all eight 32-bit unsigned integers. static ASMJIT_INLINE Vec256Data fromUd( uint32_t x0) { @@ -903,7 +903,7 @@ union Vec256Data { return self; } - //! Set all four signed 64-bit integers. + //! Set all four 64-bit signed integers. static ASMJIT_INLINE Vec256Data fromSq( int64_t x0, int64_t x1, int64_t x2, int64_t x3) { @@ -912,7 +912,7 @@ union Vec256Data { return self; } - //! Set all four signed 64-bit integers. + //! Set all four 64-bit signed integers. static ASMJIT_INLINE Vec256Data fromSq( int64_t x0) { @@ -921,7 +921,7 @@ union Vec256Data { return self; } - //! Set all four unsigned 64-bit integers. + //! Set all four 64-bit unsigned integers. static ASMJIT_INLINE Vec256Data fromUq( uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3) { @@ -930,7 +930,7 @@ union Vec256Data { return self; } - //! Set all four unsigned 64-bit integers. + //! Set all four 64-bit unsigned integers. static ASMJIT_INLINE Vec256Data fromUq( uint64_t x0) { @@ -980,7 +980,7 @@ union Vec256Data { // [Accessors] // -------------------------------------------------------------------------- - //! Set all thirty two signed 8-bit integers. + //! Set all thirty two 8-bit signed integers. ASMJIT_INLINE void setSb( int8_t x0 , int8_t x1 , int8_t x2 , int8_t x3 , int8_t x4 , int8_t x5 , int8_t x6 , int8_t x7 , @@ -1001,14 +1001,14 @@ union Vec256Data { sb[28] = x28; sb[29] = x29; sb[30] = x30; sb[31] = x31; } - //! Set all thirty two signed 8-bit integers. + //! Set all thirty two 8-bit signed integers. ASMJIT_INLINE void setSb( int8_t x0) { setUb(static_cast(x0)); } - //! Set all thirty two unsigned 8-bit integers. + //! Set all thirty two 8-bit unsigned integers. ASMJIT_INLINE void setUb( uint8_t x0 , uint8_t x1 , uint8_t x2 , uint8_t x3 , uint8_t x4 , uint8_t x5 , uint8_t x6 , uint8_t x7 , @@ -1029,7 +1029,7 @@ union Vec256Data { ub[28] = x28; ub[29] = x29; ub[30] = x30; ub[31] = x31; } - //! Set all thirty two unsigned 8-bit integers. + //! Set all thirty two 8-bit unsigned integers. ASMJIT_INLINE void setUb( uint8_t x0) { @@ -1053,7 +1053,7 @@ union Vec256Data { } } - //! Set all sixteen signed 16-bit integers. + //! Set all sixteen 16-bit signed integers. ASMJIT_INLINE void setSw( int16_t x0, int16_t x1, int16_t x2, int16_t x3, int16_t x4, int16_t x5, int16_t x6, int16_t x7, int16_t x8, int16_t x9, int16_t x10, int16_t x11, int16_t x12, int16_t x13, int16_t x14, int16_t x15) @@ -1064,14 +1064,14 @@ union Vec256Data { sw[12] = x12; sw[13] = x13; sw[14] = x14; sw[15] = x15; } - //! Set all sixteen signed 16-bit integers. + //! Set all sixteen 16-bit signed integers. ASMJIT_INLINE void setSw( int16_t x0) { setUw(static_cast(x0)); } - //! Set all sixteen unsigned 16-bit integers. + //! Set all sixteen 16-bit unsigned integers. ASMJIT_INLINE void setUw( uint16_t x0, uint16_t x1, uint16_t x2 , uint16_t x3 , uint16_t x4 , uint16_t x5 , uint16_t x6 , uint16_t x7 , uint16_t x8, uint16_t x9, uint16_t x10, uint16_t x11, uint16_t x12, uint16_t x13, uint16_t x14, uint16_t x15) @@ -1082,7 +1082,7 @@ union Vec256Data { uw[12] = x12; uw[13] = x13; uw[14] = x14; uw[15] = x15; } - //! Set all eight unsigned 16-bit integers. + //! Set all eight 16-bit unsigned integers. ASMJIT_INLINE void setUw( uint16_t x0) { @@ -1106,7 +1106,7 @@ union Vec256Data { } } - //! Set all eight signed 32-bit integers. + //! Set all eight 32-bit signed integers. ASMJIT_INLINE void setSd( int32_t x0, int32_t x1, int32_t x2, int32_t x3, int32_t x4, int32_t x5, int32_t x6, int32_t x7) @@ -1115,14 +1115,14 @@ union Vec256Data { sd[4] = x4; sd[5] = x5; sd[6] = x6; sd[7] = x7; } - //! Set all eight signed 32-bit integers. + //! Set all eight 32-bit signed integers. ASMJIT_INLINE void setSd( int32_t x0) { setUd(static_cast(x0)); } - //! Set all eight unsigned 32-bit integers. + //! Set all eight 32-bit unsigned integers. ASMJIT_INLINE void setUd( uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3, uint32_t x4, uint32_t x5, uint32_t x6, uint32_t x7) @@ -1131,7 +1131,7 @@ union Vec256Data { ud[4] = x4; ud[5] = x5; ud[6] = x6; ud[7] = x7; } - //! Set all eight unsigned 32-bit integers. + //! Set all eight 32-bit unsigned integers. ASMJIT_INLINE void setUd( uint32_t x0) { @@ -1154,28 +1154,28 @@ union Vec256Data { } } - //! Set all four signed 64-bit integers. + //! Set all four 64-bit signed integers. ASMJIT_INLINE void setSq( int64_t x0, int64_t x1, int64_t x2, int64_t x3) { sq[0] = x0; sq[1] = x1; sq[2] = x2; sq[3] = x3; } - //! Set all four signed 64-bit integers. + //! Set all four 64-bit signed integers. ASMJIT_INLINE void setSq( int64_t x0) { sq[0] = x0; sq[1] = x0; sq[2] = x0; sq[3] = x0; } - //! Set all four unsigned 64-bit integers. + //! Set all four 64-bit unsigned integers. ASMJIT_INLINE void setUq( uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3) { uq[0] = x0; uq[1] = x1; uq[2] = x2; uq[3] = x3; } - //! Set all four unsigned 64-bit integers. + //! Set all four 64-bit unsigned integers. ASMJIT_INLINE void setUq( uint64_t x0) { @@ -1217,21 +1217,21 @@ union Vec256Data { // [Members] // -------------------------------------------------------------------------- - //! Array of thirty two signed 8-bit integers. + //! Array of thirty two 8-bit signed integers. int8_t sb[32]; - //! Array of thirty two unsigned 8-bit integers. + //! Array of thirty two 8-bit unsigned integers. uint8_t ub[32]; - //! Array of sixteen signed 16-bit integers. + //! Array of sixteen 16-bit signed integers. int16_t sw[16]; - //! Array of sixteen unsigned 16-bit integers. + //! Array of sixteen 16-bit unsigned integers. uint16_t uw[16]; - //! Array of eight signed 32-bit integers. + //! Array of eight 32-bit signed integers. int32_t sd[8]; - //! Array of eight unsigned 32-bit integers. + //! Array of eight 32-bit unsigned integers. uint32_t ud[8]; - //! Array of four signed 64-bit integers. + //! Array of four 64-bit signed integers. int64_t sq[4]; - //! Array of four unsigned 64-bit integers. + //! Array of four 64-bit unsigned integers. uint64_t uq[4]; //! Array of eight 32-bit single precision floating points. @@ -1240,7 +1240,7 @@ union Vec256Data { double df[4]; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/vmem.cpp b/src/asmjit/base/vmem.cpp index 7abe488..b3d62a6 100644 --- a/src/asmjit/base/vmem.cpp +++ b/src/asmjit/base/vmem.cpp @@ -14,11 +14,6 @@ #include "../base/lock.h" #include "../base/vmem.h" -// [Dependencies - Windows] -#if defined(ASMJIT_OS_WINDOWS) -# include -#endif // ASMJIT_OS_WINDOWS - // [Dependencies - Posix] #if defined(ASMJIT_OS_POSIX) # include @@ -190,12 +185,12 @@ void VMemUtil::release(void* addr, size_t length) { // [VMem - Ops] // ============================================================================ -//! @internal +//! \internal enum { kBitsPerEntity = (sizeof(size_t) * 8) }; -//! @internal +//! \internal //! //! Set `len` bits in `buf` starting at `index` bit index. static void _SetBits(size_t* buf, size_t index, size_t len) { @@ -231,7 +226,7 @@ static void _SetBits(size_t* buf, size_t index, size_t len) { #define M_DIV(x, y) ((x) / (y)) #define M_MOD(x, y) ((x) % (y)) -//! @internal +//! \internal //! //! Base red-black tree node. struct RbNode { @@ -255,7 +250,7 @@ struct RbNode { uint8_t* mem; }; -//! @internal +//! \internal //! //! Get whether the node is red (NULL or node with red flag). static ASMJIT_INLINE bool rbIsRed(RbNode* node) { @@ -303,7 +298,7 @@ struct MemNode : public RbNode { // [asmjit::PermanentNode] // ============================================================================ -//! @internal +//! \internal //! //! Permanent node. struct PermanentNode { @@ -330,7 +325,7 @@ struct PermanentNode { // [asmjit::VMemPrivate] // ============================================================================ -//! @internal +//! \internal struct VMemPrivate { // -------------------------------------------------------------------------- // [Construction / Destruction] diff --git a/src/asmjit/base/vmem.h b/src/asmjit/base/vmem.h index d012209..5a5ee18 100644 --- a/src/asmjit/base/vmem.h +++ b/src/asmjit/base/vmem.h @@ -9,21 +9,15 @@ #define _ASMJIT_BASE_VMEM_H // [Dependencies] -#include "../base/defs.h" #include "../base/error.h" -// [Dependencies - Windows] -#if defined(ASMJIT_OS_WINDOWS) -# include -#endif // ASMJIT_OS_WINDOWS - // [Api-Begin] #include "../apibegin.h" namespace asmjit { -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::kVMemAlloc] @@ -72,12 +66,12 @@ struct VMemUtil { #if defined(ASMJIT_OS_WINDOWS) //! Allocate virtual memory of `hProcess`. //! - //! @note This function is Windows specific. + //! \note This function is Windows specific. static ASMJIT_API void* allocProcessMemory(HANDLE hProcess, size_t length, size_t* allocated, bool canExecute); //! Free virtual memory of `hProcess`. //! - //! @note This function is Windows specific. + //! \note This function is Windows specific. static ASMJIT_API void releaseProcessMemory(HANDLE hProcess, void* addr, size_t length); #endif // ASMJIT_OS_WINDOWS }; @@ -130,7 +124,7 @@ struct VMemMgr { //! Get whether to keep allocated memory after the `VMemMgr` is destroyed. //! - //! @sa `setKeepVirtualMemory()`. + //! \sa \ref setKeepVirtualMemory. ASMJIT_API bool getKeepVirtualMemory() const; //! Set whether to keep allocated memory after memory manager is @@ -142,9 +136,9 @@ struct VMemMgr { //! VMemMgr destructor. After destruction all internal //! structures are freed, only the process virtual memory remains. //! - //! @note Memory allocated with kVMemAllocPermanent is always kept. + //! \note Memory allocated with kVMemAllocPermanent is always kept. //! - //! @sa `getKeepVirtualMemory()`. + //! \sa \ref getKeepVirtualMemory. ASMJIT_API void setKeepVirtualMemory(bool keepVirtualMemory); // -------------------------------------------------------------------------- @@ -168,13 +162,13 @@ struct VMemMgr { // [Members] // -------------------------------------------------------------------------- - //! @internal + //! \internal //! //! Pointer to private data hidden out of the public API. void* _d; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/base/zone.cpp b/src/asmjit/base/zone.cpp index 84b4300..ba3db59 100644 --- a/src/asmjit/base/zone.cpp +++ b/src/asmjit/base/zone.cpp @@ -8,7 +8,6 @@ #define ASMJIT_EXPORTS // [Dependencies - AsmJit] -#include "../base/defs.h" #include "../base/intutil.h" #include "../base/zone.h" diff --git a/src/asmjit/base/zone.h b/src/asmjit/base/zone.h index ba01a90..550e571 100644 --- a/src/asmjit/base/zone.h +++ b/src/asmjit/base/zone.h @@ -16,8 +16,8 @@ namespace asmjit { -//! @addtogroup asmjit_base_util -//! @{ +//! \addtogroup asmjit_base_util +//! \{ // ============================================================================ // [asmjit::Zone] @@ -32,7 +32,7 @@ struct Zone { // [Chunk] // -------------------------------------------------------------------------- - //! @internal + //! \internal //! //! One allocated chunk of memory. struct Chunk { @@ -56,33 +56,37 @@ struct Zone { //! Create a new instance of `Zone` allocator. //! - //! @param chunkSize Default size of the first chunk. + //! The `chunkSize` parameter describes the size of the chunk. If `alloc()` + //! requires more memory than `chunkSize` then a bigger chunk will be + //! allocated, however `chunkSize` will not be changed. ASMJIT_API Zone(size_t chunkSize); //! Destroy `Zone` instance. + //! + //! Destructor released all chunks allocated by `Zone`. The `reset()` member + //! function does the same without actually destroying `Zone` object itself. ASMJIT_API ~Zone(); // -------------------------------------------------------------------------- // [Clear / Reset] // -------------------------------------------------------------------------- - //! Free all allocated memory except first block that remains for reuse. + //! Reset the `Zone` releasing all chunks allocated. //! - //! Note that this method will invalidate all instances using this memory - //! allocated by this zone instance. + //! Calling `clear()` will release all chunks allocated by `Zone` except the + //! first one that will be reused if needed. ASMJIT_API void clear(); - //! Free all allocated memory at once. + //! Reset the `Zone` releasing all chunks allocated. //! - //! Note that this method will invalidate all instances using this memory - //! allocated by this zone instance. + //! Calling `reset()` will release all chunks allocated by `Zone`. ASMJIT_API void reset(); // -------------------------------------------------------------------------- // [Accessors] // -------------------------------------------------------------------------- - //! Get (default) chunk size. + //! Get chunk size. ASMJIT_INLINE size_t getChunkSize() const { return _chunkSize; } // -------------------------------------------------------------------------- @@ -140,7 +144,7 @@ struct Zone { return static_cast(alloc(size)); } - //! @internal + //! \internal ASMJIT_API void* _alloc(size_t size); //! Allocate `size` bytes of zeroed memory. @@ -158,7 +162,7 @@ struct Zone { return (void*)p; } - //! @internal + //! \internal ASMJIT_API void* _calloc(size_t size); //! Helper to duplicate data. @@ -180,7 +184,7 @@ struct Zone { size_t _chunkSize; }; -//! @} +//! \} } // asmjit namespace diff --git a/src/asmjit/build.h b/src/asmjit/build.h index baf1916..03b904a 100644 --- a/src/asmjit/build.h +++ b/src/asmjit/build.h @@ -31,16 +31,6 @@ // [Dependencies - C++] #include -// ============================================================================ -// [asmjit::build - Documentation] -// ============================================================================ - -#if defined(ASMJIT_DOCGEN) -# define ASMJIT_BUILD_X86 -# define ASMJIT_BUILD_X64 -# define ASMJIT_API -#endif // ASMJIT_DOCGEN - // ============================================================================ // [asmjit::build - OS] // ============================================================================ diff --git a/src/asmjit/contrib/winremoteruntime.cpp b/src/asmjit/contrib/winremoteruntime.cpp index 2cedd76..927625c 100644 --- a/src/asmjit/contrib/winremoteruntime.cpp +++ b/src/asmjit/contrib/winremoteruntime.cpp @@ -70,6 +70,11 @@ uint32_t WinRemoteRuntime::add(void** dest, BaseAssembler* assembler) { return kErrorOk; } +// NOP. +Error WinRemoteRuntime::release(void* p) { + return kErrorOk; +} + } // contrib namespace } // asmjit namespace diff --git a/src/asmjit/contrib/winremoteruntime.h b/src/asmjit/contrib/winremoteruntime.h index c68fdbb..69cd09e 100644 --- a/src/asmjit/contrib/winremoteruntime.h +++ b/src/asmjit/contrib/winremoteruntime.h @@ -17,6 +17,9 @@ namespace asmjit { namespace contrib { +//! \addtogroup asmjit_contrib +//! \{ + // ============================================================================ // [asmjit::contrib::WinRemoteRuntime] // ============================================================================ @@ -54,6 +57,7 @@ struct WinRemoteRuntime : public Runtime { // -------------------------------------------------------------------------- ASMJIT_API virtual uint32_t add(void** dest, BaseAssembler* assembler); + ASMJIT_API virtual Error release(void* p); // -------------------------------------------------------------------------- // [Members] @@ -63,6 +67,8 @@ struct WinRemoteRuntime : public Runtime { VMemMgr _memMgr; }; +//! \} + } // contrib namespace } // asmjit namespace diff --git a/src/asmjit/x86.h b/src/asmjit/x86.h index d2dd119..d47614f 100644 --- a/src/asmjit/x86.h +++ b/src/asmjit/x86.h @@ -8,121 +8,16 @@ #ifndef _ASMJIT_X86_H #define _ASMJIT_X86_H -// ============================================================================ -// [asmjit_x86x64] -// ============================================================================ - -//! @defgroup asmjit_x86x64 X86/X64 -//! -//! @brief X86/X64 API - -// ============================================================================ -// [asmjit_x86x64_codegen] -// ============================================================================ - -//! @defgroup asmjit_x86x64_codegen Code Generation (X86/X64) -//! @ingroup asmjit_x86x64 -//! -//! @brief Low-level and high-level code generation. - -// ============================================================================ -// [asmjit_x86x64_cpu_info] -// ============================================================================ - -//! @defgroup asmjit_x86x64_cpu_info CPU Information (X86/X64) -//! @ingroup asmjit_x86x64 -//! -//! @brief CPU information specific to X86/X64 architecture. -//! -//! The CPUID instruction can be used to get an exhaustive information related -//! to the host X86/X64 processor. AsmJit contains utilities that can get the -//! most important information related to the features supported by the CPU -//! and the host operating system, in addition to host processor name and number -//! of cores. Class `CpuInfo` extends `BaseCpuInfo` and provides functionality -//! specific to X86 and X64. -//! -//! By default AsmJit queries the CPU information after the library is loaded -//! and the queried information is reused by all instances of `JitRuntime`. -//! The global instance of `CpuInfo` can't be changed, because it will affect -//! the code generation of all `Runtime`s. If there is a need to have a -//! specific CPU information which contains modified features or processor -//! vendor it's possible by creating a new instance of `CpuInfo` and setting -//! up its members. `CpuUtil::detect` can be used to detect CPU features into -//! an existing `CpuInfo` instance - it may become handly if only one property -//! has to be turned on/off. -//! -//! If the high-level interface `CpuInfo` offers is not enough there is also -//! `CpuUtil::callCpuId` helper that can be used to call CPUID instruction with -//! a given parameters and to consume the output. -//! -//! Cpu detection is important when generating a JIT code that may or may not -//! use certain CPU features. For example there used to be a SSE/SSE2 detection -//! in the past and today there is often AVX/AVX2 detection. -//! -//! The example below shows how to detect SSE2: -//! -//! ~~~ -//! using namespace asmjit; -//! using namespace asmjit::host; -//! -//! // Get `CpuInfo` global instance. -//! const CpuInfo* cpuInfo = CpuInfo::getHost(); -//! -//! if (cpuInfo->hasFeature(kCpuFeatureSse2)) { -//! // Processor has SSE2. -//! } -//! else if (cpuInfo->hasFeature(kCpuFeatureMmx)) { -//! // Processor doesn't have SSE2, but has MMX. -//! } -//! else { -//! // An archaic processor, it's a wonder AsmJit works here! -//! } -//! ~~~ -//! -//! The next example shows how to call CPUID directly: -//! -//! ~~~ -//! using namespace asmjit; -//! -//! // The result of CPUID call. -//! CpuId out; -//! -//! // Call CPUID, first two arguments are passed in EAX/ECX. -//! CpuUtil::callCpuId(0, 0, &out); -//! -//! // If EAX argument is 0, EBX, ECX and EDX registers are filled with a cpu vendor. -//! char cpuVendor[13]; -//! memcpy(cpuVendor, &out.ebx, 4); -//! memcpy(cpuVendor + 4, &out.edx, 4); -//! memcpy(cpuVendor + 8, &out.ecx, 4); -//! vendor[12] = '\0'; -//! -//! // Print a CPU vendor retrieved from CPUID. -//! ::printf("%s", cpuVendor); -//! ~~~ -//! -//! @sa @ref asmjit_base_cpu_info - -// ============================================================================ -// [asmjit_x86x64_constants] -// ============================================================================ - -//! @defgroup asmjit_x86x64_constants Constants (X86/X64) -//! @ingroup asmjit_x86x64 -//! -//! @brief Constants and definitions specific to X86/X64 architecture. - -// ============================================================================ // [Dependencies - AsmJit] -// ============================================================================ - #include "base.h" #include "x86/x86assembler.h" #include "x86/x86compiler.h" #include "x86/x86cpuinfo.h" -#include "x86/x86defs.h" #include "x86/x86func.h" +#include "x86/x86inst.h" +#include "x86/x86operand.h" +#include "x86/x86util.h" // [Guard] #endif // _ASMJIT_X86_H diff --git a/src/asmjit/x86/x86assembler.cpp b/src/asmjit/x86/x86assembler.cpp index d55a1b4..b6bfda5 100644 --- a/src/asmjit/x86/x86assembler.cpp +++ b/src/asmjit/x86/x86assembler.cpp @@ -19,7 +19,6 @@ #include "../base/vmem.h" #include "../x86/x86assembler.h" #include "../x86/x86cpuinfo.h" -#include "../x86/x86defs.h" // [Api-Begin] #include "../apibegin.h" @@ -58,7 +57,7 @@ enum kVexVVVV { kVexVVVVMask = 0xF << kVexVVVVShift }; -//! @internal +//! \internal //! //! Instruction 2-byte/3-byte opcode prefix definition. struct OpCodeMM { @@ -66,7 +65,7 @@ struct OpCodeMM { uint8_t data[3]; }; -//! @internal +//! \internal //! //! Mandatory prefixes encoded in 'asmjit' opcode [66, F3, F2] and asmjit //! extensions @@ -81,7 +80,7 @@ static const uint8_t x86OpCodePP[8] = { 0x9B }; -//! @internal +//! \internal //! //! Instruction 2-byte/3-byte opcode prefix data. static const OpCodeMM x86OpCodeMM[] = { @@ -111,7 +110,7 @@ static const uint8_t x86OpCodePopSeg[8] = { 0x00, 0x07, 0x00, 0x17, 0x1F, 0xA1, // [asmjit::X64TrampolineWriter] // ============================================================================ -//! @internal +//! \internal //! //! Trampoline writer. struct X64TrampolineWriter { @@ -271,7 +270,7 @@ void X86X64Assembler::_bind(const Label& label) { if (IntUtil::isInt8(patchedValue)) setByteAt(offset, static_cast(patchedValue & 0xFF)); else - setError(kErrorAssemblerIllegalShortJump); + setError(kErrorIllegalDisplacement); } } @@ -352,113 +351,108 @@ Error X86X64Assembler::embedLabel(const Label& op) { // [asmjit::x86x64::Assembler - Align] // ============================================================================ -Error X86X64Assembler::_align(uint32_t m) { +Error X86X64Assembler::_align(uint32_t mode, uint32_t offset) { if (_logger) { _logger->logFormat(kLoggerStyleDirective, - "%s.align %u\n", _logger->getIndentation(), static_cast(m)); + "%s.align %u\n", _logger->getIndentation(), static_cast(offset)); } - if (m <= 1 || !IntUtil::isPowerOf2(m) || m > 64) + if (offset <= 1 || !IntUtil::isPowerOf2(offset) || offset > 64) return setError(kErrorInvalidArgument); - uint32_t i = static_cast(IntUtil::deltaTo(getOffset(), m)); + uint32_t i = static_cast(IntUtil::deltaTo(getOffset(), offset)); if (i == 0) return kErrorOk; if (getRemainingSpace() < i) ASMJIT_PROPAGATE_ERROR(_grow(i)); + uint8_t* cursor = getCursor(); + uint8_t alignPattern = 0xCC; - if (IntUtil::hasBit(_features, kCodeGenOptimizedAlign)) { - const CpuInfo* cpuInfo = static_cast(getRuntime()->getCpuInfo()); + if (mode == kAlignCode) { + alignPattern = 0x90; - // NOPs optimized for Intel: - // Intel 64 and IA-32 Architectures Software Developer's Manual - // - Volume 2B - // - Instruction Set Reference N-Z - // - NOP + if (IntUtil::hasBit(_features, kCodeGenOptimizedAlign)) { + const CpuInfo* cpuInfo = static_cast(getRuntime()->getCpuInfo()); - // NOPs optimized for AMD: - // Software Optimization Guide for AMD Family 10h Processors (Quad-Core) - // - 4.13 - Code Padding with Operand-Size Override and Multibyte NOP + // NOPs optimized for Intel: + // Intel 64 and IA-32 Architectures Software Developer's Manual + // - Volume 2B + // - Instruction Set Reference N-Z + // - NOP - // Intel and AMD. - static const uint8_t nop1[] = { 0x90 }; - static const uint8_t nop2[] = { 0x66, 0x90 }; - static const uint8_t nop3[] = { 0x0F, 0x1F, 0x00 }; - static const uint8_t nop4[] = { 0x0F, 0x1F, 0x40, 0x00 }; - static const uint8_t nop5[] = { 0x0F, 0x1F, 0x44, 0x00, 0x00 }; - static const uint8_t nop6[] = { 0x66, 0x0F, 0x1F, 0x44, 0x00, 0x00 }; - static const uint8_t nop7[] = { 0x0F, 0x1F, 0x80, 0x00, 0x00, 0x00, 0x00 }; - static const uint8_t nop8[] = { 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 }; - static const uint8_t nop9[] = { 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 }; + // NOPs optimized for AMD: + // Software Optimization Guide for AMD Family 10h Processors (Quad-Core) + // - 4.13 - Code Padding with Operand-Size Override and Multibyte NOP - // AMD. - static const uint8_t nop10[] = { 0x66, 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 }; - static const uint8_t nop11[] = { 0x66, 0x66, 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 }; + // Intel and AMD. + static const uint8_t nop1[] = { 0x90 }; + static const uint8_t nop2[] = { 0x66, 0x90 }; + static const uint8_t nop3[] = { 0x0F, 0x1F, 0x00 }; + static const uint8_t nop4[] = { 0x0F, 0x1F, 0x40, 0x00 }; + static const uint8_t nop5[] = { 0x0F, 0x1F, 0x44, 0x00, 0x00 }; + static const uint8_t nop6[] = { 0x66, 0x0F, 0x1F, 0x44, 0x00, 0x00 }; + static const uint8_t nop7[] = { 0x0F, 0x1F, 0x80, 0x00, 0x00, 0x00, 0x00 }; + static const uint8_t nop8[] = { 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 }; + static const uint8_t nop9[] = { 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 }; - const uint8_t* p; - uint32_t n; + // AMD. + static const uint8_t nop10[] = { 0x66, 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 }; + static const uint8_t nop11[] = { 0x66, 0x66, 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 }; - if (cpuInfo->getVendorId() == kCpuVendorIntel && ((cpuInfo->getFamily() & 0x0F) == 0x06 || (cpuInfo->getFamily() & 0x0F) == 0x0F)) { - do { - switch (i) { - case 1: p = nop1; n = 1; break; - case 2: p = nop2; n = 2; break; - case 3: p = nop3; n = 3; break; - case 4: p = nop4; n = 4; break; - case 5: p = nop5; n = 5; break; - case 6: p = nop6; n = 6; break; - case 7: p = nop7; n = 7; break; - case 8: p = nop8; n = 8; break; - default: p = nop9; n = 9; break; - } + const uint8_t* p; + uint32_t n; - i -= n; + if (cpuInfo->getVendorId() == kCpuVendorIntel && ( + (cpuInfo->getFamily() & 0x0F) == 0x06 || + (cpuInfo->getFamily() & 0x0F) == 0x0F)) { do { - EMIT_BYTE(*p++); - } while (--n); - } while (i); - } - else if (cpuInfo->getVendorId() == kCpuVendorAmd && cpuInfo->getFamily() >= 0x0F) { - do { - switch (i) { - case 1: p = nop1 ; n = 1; break; - case 2: p = nop2 ; n = 2; break; - case 3: p = nop3 ; n = 3; break; - case 4: p = nop4 ; n = 4; break; - case 5: p = nop5 ; n = 5; break; - case 6: p = nop6 ; n = 6; break; - case 7: p = nop7 ; n = 7; break; - case 8: p = nop8 ; n = 8; break; - case 9: p = nop9 ; n = 9; break; - case 10: p = nop10; n = 10; break; - default: p = nop11; n = 11; break; - } + switch (i) { + case 1: p = nop1; n = 1; break; + case 2: p = nop2; n = 2; break; + case 3: p = nop3; n = 3; break; + case 4: p = nop4; n = 4; break; + case 5: p = nop5; n = 5; break; + case 6: p = nop6; n = 6; break; + case 7: p = nop7; n = 7; break; + case 8: p = nop8; n = 8; break; + default: p = nop9; n = 9; break; + } - i -= n; + i -= n; + do { + EMIT_BYTE(*p++); + } while (--n); + } while (i); + } + else if (cpuInfo->getVendorId() == kCpuVendorAmd && cpuInfo->getFamily() >= 0x0F) { do { - EMIT_BYTE(*p++); - } while (--n); - } while (i); - } + switch (i) { + case 1: p = nop1 ; n = 1; break; + case 2: p = nop2 ; n = 2; break; + case 3: p = nop3 ; n = 3; break; + case 4: p = nop4 ; n = 4; break; + case 5: p = nop5 ; n = 5; break; + case 6: p = nop6 ; n = 6; break; + case 7: p = nop7 ; n = 7; break; + case 8: p = nop8 ; n = 8; break; + case 9: p = nop9 ; n = 9; break; + case 10: p = nop10; n = 10; break; + default: p = nop11; n = 11; break; + } - // Legacy NOPs, 0x90 with 0x66 prefix. - if (getArch() == kArchX86) { - while (i) { - switch (i) { - default: EMIT_BYTE(0x66); i--; - case 3: EMIT_BYTE(0x66); i--; - case 2: EMIT_BYTE(0x66); i--; - case 1: EMIT_BYTE(0x90); i--; - } + i -= n; + do { + EMIT_BYTE(*p++); + } while (--n); + } while (i); } } } - // Legacy NOPs, only 0x90. while (i) { - EMIT_BYTE(0x90); + EMIT_BYTE(alignPattern); i--; } @@ -898,7 +892,7 @@ static ASMJIT_INLINE uint32_t x86EncodeSib(uint32_t s, uint32_t i, uint32_t b) { return (s << 6) + (i << 3) + b; } -//! @internal +//! \internal static const Operand::VRegOp x86PatchedHiRegs[4] = { // --------------+---+--------------------------------+--------------+------+ // Operand | S | Register Code | OperandId |Unused| @@ -1006,7 +1000,7 @@ _Prepare: // Check if one or more register operand is one of BPL, SPL, SIL, DIL and // force a REX prefix in such case. - if (x86IsGpbRegOp(o0)) { + if (X86Util::isGpbRegOp(*o0)) { uint32_t index = static_cast(o0)->getRegIndex(); if (static_cast(o0)->isGpbLo()) { opX |= (index >= 4) << kRexShift; @@ -1017,7 +1011,7 @@ _Prepare: } } - if (x86IsGpbRegOp(o1)) { + if (X86Util::isGpbRegOp(*o1)) { uint32_t index = static_cast(o1)->getRegIndex(); if (static_cast(o1)->isGpbLo()) { opX |= (index >= 4) << kRexShift; @@ -1509,6 +1503,37 @@ _Prepare: } break; + case kInstGroupX86Jecxz: + if (encoded == ENC_OPS(Reg, Label, None)) { + ASMJIT_ASSERT(static_cast(o0)->getRegIndex() == kRegIndexCx); + + if ((Arch == kArchX86 && o0->getSize() == 2) || + Arch == kArchX64 && o0->getSize() == 4) { + EMIT_BYTE(0x67); + } + + EMIT_BYTE(0xE3); + label = self->getLabelDataById(static_cast(o1)->getId()); + + if (label->offset != -1) { + // Bound label. + intptr_t offs = label->offset - (intptr_t)(cursor - self->_buffer) - 1; + if (!IntUtil::isInt8(offs)) + goto _IllegalInst; + + EMIT_BYTE(offs); + goto _EmitDone; + } + else { + // Non-bound label. + dispOffset = -1; + dispSize = 1; + relocId = -1; + goto _EmitDisplacement; + } + } + break; + case kInstGroupX86Jmp: if (encoded == ENC_OPS(Reg, None, None)) { rmReg = static_cast(o0)->getRegIndex(); @@ -3371,19 +3396,25 @@ _EmitAvxRvm: // -------------------------------------------------------------------------- _IllegalInst: - self->setError(kErrorAssemblerIllegalInst); + self->setError(kErrorIllegalInst); #if defined(ASMJIT_DEBUG) assertIllegal = true; #endif // ASMJIT_DEBUG goto _EmitDone; _IllegalAddr: - self->setError(kErrorAssemblerIllegalAddr); + self->setError(kErrorIllegalAddresing); #if defined(ASMJIT_DEBUG) assertIllegal = true; #endif // ASMJIT_DEBUG goto _EmitDone; +_IllegalDisp: + self->setError(kErrorIllegalDisplacement); +#if defined(ASMJIT_DEBUG) + assertIllegal = true; +#endif // ASMJIT_DEBUG + goto _EmitDone; // -------------------------------------------------------------------------- // [Emit - X86] @@ -3623,7 +3654,7 @@ _EmitSib: // Indexing is invalid. if (mIndex < kInvalidReg) - goto _IllegalAddr; + goto _IllegalDisp; EMIT_BYTE(x86EncodeMod(0, opReg, 5)); dispOffset -= (4 + imLen); @@ -4067,7 +4098,7 @@ _EmitDone: _UnknownInst: self->_comment = NULL; - return self->setError(kErrorAssemblerUnknownInst); + return self->setError(kErrorUnknownInst); _GrowBuffer: ASMJIT_PROPAGATE_ERROR(self->_grow(16)); diff --git a/src/asmjit/x86/x86assembler.h b/src/asmjit/x86/x86assembler.h index db5c3bd..6fbd469 100644 --- a/src/asmjit/x86/x86assembler.h +++ b/src/asmjit/x86/x86assembler.h @@ -10,7 +10,9 @@ // [Dependencies - AsmJit] #include "../base/assembler.h" -#include "../x86/x86defs.h" +#include "../x86/x86inst.h" +#include "../x86/x86operand.h" +#include "../x86/x86util.h" // [Api-Begin] #include "../apibegin.h" @@ -43,7 +45,7 @@ namespace x86x64 { return emit(_Code_, o0); \ } \ \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE Error _Inst_(int o0) { \ return emit(_Code_, o0); \ } @@ -54,7 +56,7 @@ namespace x86x64 { return emit(_Code_, o0); \ } \ \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE Error _Inst_(int o0) { \ ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0); \ @@ -112,7 +114,7 @@ namespace x86x64 { return emit(_Code_, o0, o1); \ } \ \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE Error _Inst_(const _Op0_& o0, int o1) { \ return emit(_Code_, o0, o1); \ } @@ -123,7 +125,7 @@ namespace x86x64 { return emit(_Code_, o0, o1); \ } \ \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE Error _Inst_(const _Op0_& o0, int o1) { \ ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0, o1); \ @@ -181,7 +183,7 @@ namespace x86x64 { return emit(_Code_, o0, o1, o2); \ } \ \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE Error _Inst_(const _Op0_& o0, const _Op1_& o1, int o2) { \ return emit(_Code_, o0, o1, o2); \ } @@ -192,7 +194,7 @@ namespace x86x64 { return emit(_Code_, o0, o1, o2); \ } \ \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE Error _Inst_(const _Op0_& o0, const _Op1_& o1, int o2) { \ ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0, o1, o2); \ @@ -215,7 +217,7 @@ namespace x86x64 { return emit(_Code_, o0, o1, o2, o3); \ } \ \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE Error _Inst_(const _Op0_& o0, const _Op1_& o1, const _Op2_& o2, int o3) { \ return emit(_Code_, o0, o1, o2, o3); \ } @@ -226,7 +228,7 @@ namespace x86x64 { return emit(_Code_, o0, o1, o2, o3); \ } \ \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE Error _Inst_(const _Op0_& o0, const _Op1_& o1, const _Op2_& o2, int o3) { \ ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0, o1, o2, o3); \ @@ -275,8 +277,8 @@ namespace x86x64 { return *this; \ } -//! @addtogroup asmjit_x86x64_codegen -//! @{ +//! \addtogroup asmjit_x86x64_general +//! \{ // ============================================================================ // [asmjit::x86x64::X86X64Assembler] @@ -287,7 +289,7 @@ namespace x86x64 { //! Assembler is the main class in AsmJit that can encode instructions and their //! operands to a binary stream runnable by CPU. It creates internal buffer //! where the encodes instructions are stored and it contains intrinsics that -//! can be used to emit the code in a convenent way. Code generation is in +//! can be used to emit the code in a convenent way. Code generation is in //! general safe, because the intrinsics uses method overloading so even the //! code is emitted it can be checked by a C++ compiler. It's nearly impossible //! to create invalid instruction, for example `mov [eax], [eax]`, because such @@ -298,7 +300,8 @@ namespace x86x64 { //! code to be emitted. It will assert in debug mode and put the `BaseAssembler` //! instance to an error state in production mode. //! -//! @section AsmJit_Assembler_CodeGeneration Code Generation +//! Code Generation +//! --------------- //! //! To generate code is only needed to create instance of `BaseAssembler` //! and to use intrinsics. See example how to do that: @@ -377,7 +380,8 @@ namespace x86x64 { //! a.dec(dword_ptr(eax)); // Dec dword ptr [eax]. //! ~~~ //! -//! @section AsmJit_Assembler_CallingJitCode Calling JIT Code +//! Calling JIT Code +//! ---------------- //! //! While you are over from emitting instructions, you can make your function //! by using `BaseAssembler::make()` method. This method will use memory @@ -389,7 +393,7 @@ namespace x86x64 { //! //! You can get size of generated code by `getCodeSize()` or `getOffset()` //! methods. These methods returns you code size or more precisely the current -//! code offset in bytes. The `takeCode()` function can be used to take the +//! code offset in bytes. The `takeCode()` function can be used to take the //! internal buffer and clear the code generator, but the buffer taken has to //! be freed manually. //! @@ -427,7 +431,8 @@ namespace x86x64 { //! once and nobody will probably free the function right after it was executed. //! The code just shows the proper way of code generation and cleanup. //! -//! @section AsmJit_Assembler_Labels Labels +//! Labels +//! ------ //! //! While generating assembler code, you will usually need to create complex //! code with labels. Labels are fully supported and you can call `jmp` or @@ -497,7 +502,8 @@ namespace x86x64 { //! look at @c Compiler class that is designed for higher level code //! generation. //! -//! @section AsmJit_Assembler_AdvancedCodeGeneration Advanced Code Generation +//! Advanced Code Generation +//! ------------------------ //! //! This section describes some advanced generation features of @c Assembler //! class which can be simply overlooked. The first thing that is very likely @@ -524,8 +530,8 @@ namespace x86x64 { //! Next, more advanced, but often needed technique is that you can build your //! own registers allocator. X86 architecture contains 8 general purpose registers, //! 8 Mm registers and 8 Xmm registers. The X64 (AMD64) architecture extends count -//! of Gp registers and Xmm registers to 16. Use the @c kRegCountBase constant to -//! get count of Gp or Xmm registers or @c kRegCountGp, @c kRegCountMm and @c +//! of Gp registers and Xmm registers to 16. Use the \ref kRegCountBase constant to +//! get count of Gp or Xmm registers or \ref kRegCountGp, \ref kRegCountMm and \ref //! kRegCountXmm constants individually. //! //! To build register from index (value from 0 inclusive to `kRegNum...` exclusive) @@ -541,7 +547,7 @@ namespace x86x64 { //! //! `kRegIndex...` are constants defined by `kRegIndex` enum. You can use your //! own register allocator (or register slot manager) to alloc / free registers -//! so `kRegIndex...` values can be replaced by your variables (`0` to +//! so `kRegIndex...` values can be replaced by your variables (`0` to //! `kRegNum...-1`). //! //! @sa `X86X64Compiler`. @@ -604,6 +610,8 @@ struct X86X64Assembler : public BaseAssembler { ASMJIT_INLINE void dmm(const MmData& x) { embed(&x, sizeof(MmData)); } //! Add Xmm data to the instuction stream. ASMJIT_INLINE void dxmm(const XmmData& x) { embed(&x, sizeof(XmmData)); } + //! Add Ymm data to the instuction stream. + ASMJIT_INLINE void dymm(const YmmData& x) { embed(&x, sizeof(YmmData)); } //! Add data in a given structure instance to the instuction stream. template @@ -616,12 +624,7 @@ struct X86X64Assembler : public BaseAssembler { // [Align] // -------------------------------------------------------------------------- - //! Align target buffer to `m` bytes. - //! - //! Typical usage of this is to align labels at start of the inner loops. - //! - //! Inserts @c nop() instructions or CPU optimized NOPs. - ASMJIT_API virtual Error _align(uint32_t m); + ASMJIT_API virtual Error _align(uint32_t mode, uint32_t offset); // ------------------------------------------------------------------------- // [Options] @@ -635,45 +638,45 @@ struct X86X64Assembler : public BaseAssembler { //! Add with Carry. INST_2x(adc, kInstAdc, GpReg, GpReg) - //! @overload + //! \overload INST_2x(adc, kInstAdc, GpReg, Mem) - //! @overload + //! \overload INST_2i(adc, kInstAdc, GpReg, Imm) - //! @overload + //! \overload INST_2x(adc, kInstAdc, Mem, GpReg) - //! @overload + //! \overload INST_2i(adc, kInstAdc, Mem, Imm) //! Add. INST_2x(add, kInstAdd, GpReg, GpReg) - //! @overload + //! \overload INST_2x(add, kInstAdd, GpReg, Mem) - //! @overload + //! \overload INST_2i(add, kInstAdd, GpReg, Imm) - //! @overload + //! \overload INST_2x(add, kInstAdd, Mem, GpReg) - //! @overload + //! \overload INST_2i(add, kInstAdd, Mem, Imm) //! And. INST_2x(and_, kInstAnd, GpReg, GpReg) - //! @overload + //! \overload INST_2x(and_, kInstAnd, GpReg, Mem) - //! @overload + //! \overload INST_2i(and_, kInstAnd, GpReg, Imm) - //! @overload + //! \overload INST_2x(and_, kInstAnd, Mem, GpReg) - //! @overload + //! \overload INST_2i(and_, kInstAnd, Mem, Imm) //! Bit scan forward. INST_2x_(bsf, kInstBsf, GpReg, GpReg, !o0.isGpb()) - //! @overload + //! \overload INST_2x_(bsf, kInstBsf, GpReg, Mem, !o0.isGpb()) //! Bit scan reverse. INST_2x_(bsr, kInstBsr, GpReg, GpReg, !o0.isGpb()) - //! @overload + //! \overload INST_2x_(bsr, kInstBsr, GpReg, Mem, !o0.isGpb()) //! Byte swap (32-bit or 64-bit registers only) (i486). @@ -681,49 +684,49 @@ struct X86X64Assembler : public BaseAssembler { //! Bit test. INST_2x(bt, kInstBt, GpReg, GpReg) - //! @overload + //! \overload INST_2i(bt, kInstBt, GpReg, Imm) - //! @overload + //! \overload INST_2x(bt, kInstBt, Mem, GpReg) - //! @overload + //! \overload INST_2i(bt, kInstBt, Mem, Imm) //! Bit test and complement. INST_2x(btc, kInstBtc, GpReg, GpReg) - //! @overload + //! \overload INST_2i(btc, kInstBtc, GpReg, Imm) - //! @overload + //! \overload INST_2x(btc, kInstBtc, Mem, GpReg) - //! @overload + //! \overload INST_2i(btc, kInstBtc, Mem, Imm) //! Bit test and reset. INST_2x(btr, kInstBtr, GpReg, GpReg) - //! @overload + //! \overload INST_2i(btr, kInstBtr, GpReg, Imm) - //! @overload + //! \overload INST_2x(btr, kInstBtr, Mem, GpReg) - //! @overload + //! \overload INST_2i(btr, kInstBtr, Mem, Imm) //! Bit test and set. INST_2x(bts, kInstBts, GpReg, GpReg) - //! @overload + //! \overload INST_2i(bts, kInstBts, GpReg, Imm) - //! @overload + //! \overload INST_2x(bts, kInstBts, Mem, GpReg) - //! @overload + //! \overload INST_2i(bts, kInstBts, Mem, Imm) //! Call. INST_1x(call, kInstCall, GpReg) - //! @overload + //! \overload INST_1x(call, kInstCall, Mem) - //! @overload + //! \overload INST_1x(call, kInstCall, Label) - //! @overload + //! \overload INST_1x(call, kInstCall, Imm) - //! @overload + //! \overload ASMJIT_INLINE Error call(void* dst) { return call(Imm((intptr_t)dst)); } //! Clear carry flag. @@ -733,34 +736,34 @@ struct X86X64Assembler : public BaseAssembler { //! Complement carry flag. INST_0x(cmc, kInstCmc) - //! Convert byte to word (AX <- Sign Extend AL). + //! Convert BYTE to WORD (AX <- Sign Extend AL). INST_0x(cbw, kInstCbw) - //! Convert word to dword (DX:AX <- Sign Extend AX). + //! Convert WORD to DWORD (DX:AX <- Sign Extend AX). INST_0x(cwd, kInstCwd) - //! Convert word to dword (EAX <- Sign Extend AX). + //! Convert WORD to DWORD (EAX <- Sign Extend AX). INST_0x(cwde, kInstCwde) - //! Convert dword to qword (EDX:EAX <- Sign Extend EAX). + //! Convert DWORD to QWORD (EDX:EAX <- Sign Extend EAX). INST_0x(cdq, kInstCdq) //! Conditional move. - INST_2cc(cmov, kInstCmov, condToCmovcc, GpReg, GpReg) + INST_2cc(cmov, kInstCmov, X86Util::condToCmovcc, GpReg, GpReg) //! Conditional move. - INST_2cc(cmov, kInstCmov, condToCmovcc, GpReg, Mem) + INST_2cc(cmov, kInstCmov, X86Util::condToCmovcc, GpReg, Mem) //! Compare two operands. INST_2x(cmp, kInstCmp, GpReg, GpReg) - //! @overload + //! \overload INST_2x(cmp, kInstCmp, GpReg, Mem) - //! @overload + //! \overload INST_2i(cmp, kInstCmp, GpReg, Imm) - //! @overload + //! \overload INST_2x(cmp, kInstCmp, Mem, GpReg) - //! @overload + //! \overload INST_2i(cmp, kInstCmp, Mem, Imm) //! Compare and exchange (i486). INST_2x(cmpxchg, kInstCmpxchg, GpReg, GpReg) - //! @overload + //! \overload INST_2x(cmpxchg, kInstCmpxchg, Mem, GpReg) //! Compares the 64-bit value in EDX:EAX with the memory operand (Pentium). @@ -771,17 +774,17 @@ struct X86X64Assembler : public BaseAssembler { //! Accumulate crc32 value (polynomial 0x11EDC6F41) (SSE4.2). INST_2x_(crc32, kInstCrc32, GpReg, GpReg, o0.isRegType(kRegTypeGpd) || o0.isRegType(kRegTypeGpq)) - //! @overload + //! \overload INST_2x_(crc32, kInstCrc32, GpReg, Mem, o0.isRegType(kRegTypeGpd) || o0.isRegType(kRegTypeGpq)) //! Decrement by 1. INST_1x(dec, kInstDec, GpReg) - //! @overload + //! \overload INST_1x(dec, kInstDec, Mem) //! Unsigned divide (xDX:xAX <- xDX:xAX / o0). INST_1x(div, kInstDiv, GpReg) - //! @overload + //! \overload INST_1x(div, kInstDiv, Mem) //! Make stack frame for procedure parameters. @@ -789,29 +792,29 @@ struct X86X64Assembler : public BaseAssembler { //! Signed divide (xDX:xAX <- xDX:xAX / op). INST_1x(idiv, kInstIdiv, GpReg) - //! @overload + //! \overload INST_1x(idiv, kInstIdiv, Mem) //! Signed multiply (xDX:xAX <- xAX * o0). INST_1x(imul, kInstImul, GpReg) - //! @overload + //! \overload INST_1x(imul, kInstImul, Mem) //! Signed multiply. INST_2x(imul, kInstImul, GpReg, GpReg) - //! @overload + //! \overload INST_2x(imul, kInstImul, GpReg, Mem) - //! @overload + //! \overload INST_2i(imul, kInstImul, GpReg, Imm) //! Signed multiply. INST_3i(imul, kInstImul, GpReg, GpReg, Imm) - //! @overload + //! \overload INST_3i(imul, kInstImul, GpReg, Mem, Imm) //! Increment by 1. INST_1x(inc, kInstInc, GpReg) - //! @overload + //! \overload INST_1x(inc, kInstInc, Mem) //! Interrupt. @@ -820,17 +823,20 @@ struct X86X64Assembler : public BaseAssembler { ASMJIT_INLINE Error int3() { return int_(3); } //! Jump to `label` if condition `cc` is met. - INST_1cc(j, kInstJ, condToJcc, Label) + INST_1cc(j, kInstJ, X86Util::condToJcc, Label) + + //! Short jump if CX/ECX/RCX is zero. + INST_2x_(jecxz, kInstJecxz, GpReg, Label, o0.getRegIndex() == kRegIndexCx) //! Jump. INST_1x(jmp, kInstJmp, GpReg) - //! @overload + //! \overload INST_1x(jmp, kInstJmp, Mem) - //! @overload. + //! \overload INST_1x(jmp, kInstJmp, Label) - //! @overload + //! \overload INST_1x(jmp, kInstJmp, Imm) - //! @overload + //! \overload ASMJIT_INLINE Error jmp(void* dst) { return jmp(Imm((intptr_t)dst)); } //! Load AH from flags. @@ -844,22 +850,22 @@ struct X86X64Assembler : public BaseAssembler { //! Move. INST_2x(mov, kInstMov, GpReg, GpReg) - //! @overload + //! \overload INST_2x(mov, kInstMov, GpReg, Mem) - //! @overload + //! \overload INST_2i(mov, kInstMov, GpReg, Imm) - //! @overload + //! \overload INST_2x(mov, kInstMov, Mem, GpReg) - //! @overload + //! \overload INST_2i(mov, kInstMov, Mem, Imm) //! Move from segment register. INST_2x(mov, kInstMov, GpReg, SegReg) - //! @overload + //! \overload INST_2x(mov, kInstMov, Mem, SegReg) //! Move to segment register. INST_2x(mov, kInstMov, SegReg, GpReg) - //! @overload + //! \overload INST_2x(mov, kInstMov, SegReg, Mem) //! Move (AL|AX|EAX|RAX <- absolute address in immediate). @@ -880,27 +886,27 @@ struct X86X64Assembler : public BaseAssembler { //! Move data after dwapping bytes (SSE3 - Atom). INST_2x_(movbe, kInstMovbe, GpReg, Mem, !o0.isGpb()); - //! @overload + //! \overload INST_2x_(movbe, kInstMovbe, Mem, GpReg, !o1.isGpb()); //! Move with sign-extension. INST_2x(movsx, kInstMovsx, GpReg, GpReg) - //! @overload + //! \overload INST_2x(movsx, kInstMovsx, GpReg, Mem) //! Move with zero-extension. INST_2x(movzx, kInstMovzx, GpReg, GpReg) - //! @overload + //! \overload INST_2x(movzx, kInstMovzx, GpReg, Mem) //! Unsigned multiply (xDX:xAX <- xAX * o0). INST_1x(mul, kInstMul, GpReg) - //! @overload + //! \overload INST_1x(mul, kInstMul, Mem) //! Two's complement negation. INST_1x(neg, kInstNeg, GpReg) - //! @overload + //! \overload INST_1x(neg, kInstNeg, Mem) //! No operation. @@ -908,28 +914,28 @@ struct X86X64Assembler : public BaseAssembler { //! One's complement negation. INST_1x(not_, kInstNot, GpReg) - //! @overload + //! \overload INST_1x(not_, kInstNot, Mem) //! Or. INST_2x(or_, kInstOr, GpReg, GpReg) - //! @overload + //! \overload INST_2x(or_, kInstOr, GpReg, Mem) - //! @overload + //! \overload INST_2i(or_, kInstOr, GpReg, Imm) - //! @overload + //! \overload INST_2x(or_, kInstOr, Mem, GpReg) - //! @overload + //! \overload INST_2i(or_, kInstOr, Mem, Imm) //! Pop a value from the stack. INST_1x_(pop, kInstPop, GpReg, o0.getSize() == 2 || o0.getSize() == _regSize) - //! @overload + //! \overload INST_1x_(pop, kInstPop, Mem, o0.getSize() == 2 || o0.getSize() == _regSize) //! Pop a segment register from the stack. //! - //! @note There is no instruction to pop a cs segment register. + //! \note There is no instruction to pop a cs segment register. INST_1x_(pop, kInstPop, SegReg, o0.getRegIndex() != kSegCs); //! Pop stack into EFLAGS register (32-bit or 64-bit). @@ -937,16 +943,16 @@ struct X86X64Assembler : public BaseAssembler { //! Return the count of number of bits set to 1 (SSE4.2). INST_2x_(popcnt, kInstPopcnt, GpReg, GpReg, !o0.isGpb() && o0.getRegType() == o1.getRegType()) - //! @overload + //! \overload INST_2x_(popcnt, kInstPopcnt, GpReg, Mem, !o0.isGpb()) - //! Push word/dword/qword on the stack. + //! Push WORD or DWORD/QWORD on the stack. INST_1x_(push, kInstPush, GpReg, o0.getSize() == 2 || o0.getSize() == _regSize) - //! Push word/dword/qword on the stack. + //! Push WORD or DWORD/QWORD on the stack. INST_1x_(push, kInstPush, Mem, o0.getSize() == 2 || o0.getSize() == _regSize) //! Push segment register on the stack. INST_1x(push, kInstPush, SegReg) - //! Push word/dword/qword on the stack. + //! Push WORD or DWORD/QWORD on the stack. INST_1i(push, kInstPush, Imm) //! Push EFLAGS register (32-bit or 64-bit) on the stack. @@ -954,24 +960,24 @@ struct X86X64Assembler : public BaseAssembler { //! Rotate bits left. //! - //! @note `o1` register can be only `cl`. + //! \note `o1` register can be only `cl`. INST_2x(rcl, kInstRcl, GpReg, GpReg) - //! @overload + //! \overload INST_2x(rcl, kInstRcl, Mem, GpReg) //! Rotate bits left. INST_2i(rcl, kInstRcl, GpReg, Imm) - //! @overload + //! \overload INST_2i(rcl, kInstRcl, Mem, Imm) //! Rotate bits right. //! - //! @note `o1` register can be only `cl`. + //! \note `o1` register can be only `cl`. INST_2x(rcr, kInstRcr, GpReg, GpReg) - //! @overload + //! \overload INST_2x(rcr, kInstRcr, Mem, GpReg) //! Rotate bits right. INST_2i(rcr, kInstRcr, GpReg, Imm) - //! @overload + //! \overload INST_2i(rcr, kInstRcr, Mem, Imm) //! Read time-stamp counter (Pentium). @@ -1030,29 +1036,29 @@ struct X86X64Assembler : public BaseAssembler { //! Return. INST_0x(ret, kInstRet) - //! @overload + //! \overload INST_1i(ret, kInstRet, Imm) //! Rotate bits left. //! - //! @note `o1` register can be only `cl`. + //! \note `o1` register can be only `cl`. INST_2x(rol, kInstRol, GpReg, GpReg) - //! @overload + //! \overload INST_2x(rol, kInstRol, Mem, GpReg) //! Rotate bits left. INST_2i(rol, kInstRol, GpReg, Imm) - //! @overload + //! \overload INST_2i(rol, kInstRol, Mem, Imm) //! Rotate bits right. //! - //! @note `o1` register can be only `cl`. + //! \note `o1` register can be only `cl`. INST_2x(ror, kInstRor, GpReg, GpReg) - //! @overload + //! \overload INST_2x(ror, kInstRor, Mem, GpReg) //! Rotate bits right. INST_2i(ror, kInstRor, GpReg, Imm) - //! @overload + //! \overload INST_2i(ror, kInstRor, Mem, Imm) //! Store AH into flags. @@ -1060,84 +1066,84 @@ struct X86X64Assembler : public BaseAssembler { //! Integer subtraction with borrow. INST_2x(sbb, kInstSbb, GpReg, GpReg) - //! @overload + //! \overload INST_2x(sbb, kInstSbb, GpReg, Mem) - //! @overload + //! \overload INST_2i(sbb, kInstSbb, GpReg, Imm) - //! @overload + //! \overload INST_2x(sbb, kInstSbb, Mem, GpReg) - //! @overload + //! \overload INST_2i(sbb, kInstSbb, Mem, Imm) //! Shift bits left. //! - //! @note `o1` register can be only `cl`. + //! \note `o1` register can be only `cl`. INST_2x(sal, kInstSal, GpReg, GpReg) - //! @overload + //! \overload INST_2x(sal, kInstSal, Mem, GpReg) //! Shift bits left. INST_2i(sal, kInstSal, GpReg, Imm) - //! @overload + //! \overload INST_2i(sal, kInstSal, Mem, Imm) //! Shift bits right. //! - //! @note `o1` register can be only `cl`. + //! \note `o1` register can be only `cl`. INST_2x(sar, kInstSar, GpReg, GpReg) - //! @overload + //! \overload INST_2x(sar, kInstSar, Mem, GpReg) //! Shift bits right. INST_2i(sar, kInstSar, GpReg, Imm) - //! @overload + //! \overload INST_2i(sar, kInstSar, Mem, Imm) //! Set byte on condition. - INST_1cc(set, kInstSet, condToSetcc, GpReg) + INST_1cc(set, kInstSet, X86Util::condToSetcc, GpReg) //! Set byte on condition. - INST_1cc(set, kInstSet, condToSetcc, Mem) + INST_1cc(set, kInstSet, X86Util::condToSetcc, Mem) //! Shift bits left. //! - //! @note `o1` register can be only `cl`. + //! \note `o1` register can be only `cl`. INST_2x(shl, kInstShl, GpReg, GpReg) - //! @overload + //! \overload INST_2x(shl, kInstShl, Mem, GpReg) //! Shift bits left. INST_2i(shl, kInstShl, GpReg, Imm) - //! @overload + //! \overload INST_2i(shl, kInstShl, Mem, Imm) //! Shift bits right. //! - //! @note `o1` register can be only `cl`. + //! \note `o1` register can be only `cl`. INST_2x(shr, kInstShr, GpReg, GpReg) - //! @overload + //! \overload INST_2x(shr, kInstShr, Mem, GpReg) //! Shift bits right. INST_2i(shr, kInstShr, GpReg, Imm) - //! @overload + //! \overload INST_2i(shr, kInstShr, Mem, Imm) //! Double precision shift left. //! - //! @note `o2` register can be only `cl` register. + //! \note `o2` register can be only `cl` register. INST_3x(shld, kInstShld, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(shld, kInstShld, Mem, GpReg, GpReg) //! Double precision shift left. INST_3i(shld, kInstShld, GpReg, GpReg, Imm) - //! @overload + //! \overload INST_3i(shld, kInstShld, Mem, GpReg, Imm) //! Double precision shift right. //! - //! @note `o2` register can be only `cl` register. + //! \note `o2` register can be only `cl` register. INST_3x(shrd, kInstShrd, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(shrd, kInstShrd, Mem, GpReg, GpReg) //! Double precision shift right. INST_3i(shrd, kInstShrd, GpReg, GpReg, Imm) - //! @overload + //! \overload INST_3i(shrd, kInstShrd, Mem, GpReg, Imm) //! Set carry flag to 1. @@ -1147,22 +1153,22 @@ struct X86X64Assembler : public BaseAssembler { //! Subtract. INST_2x(sub, kInstSub, GpReg, GpReg) - //! @overload + //! \overload INST_2x(sub, kInstSub, GpReg, Mem) - //! @overload + //! \overload INST_2i(sub, kInstSub, GpReg, Imm) - //! @overload + //! \overload INST_2x(sub, kInstSub, Mem, GpReg) - //! @overload + //! \overload INST_2i(sub, kInstSub, Mem, Imm) //! Logical compare. INST_2x(test, kInstTest, GpReg, GpReg) - //! @overload + //! \overload INST_2i(test, kInstTest, GpReg, Imm) - //! @overload + //! \overload INST_2x(test, kInstTest, Mem, GpReg) - //! @overload + //! \overload INST_2i(test, kInstTest, Mem, Imm) //! Undefined instruction - Raise #UD exception. @@ -1170,25 +1176,25 @@ struct X86X64Assembler : public BaseAssembler { //! Exchange and Add. INST_2x(xadd, kInstXadd, GpReg, GpReg) - //! @overload + //! \overload INST_2x(xadd, kInstXadd, Mem, GpReg) //! Exchange register/memory with register. INST_2x(xchg, kInstXchg, GpReg, GpReg) - //! @overload + //! \overload INST_2x(xchg, kInstXchg, Mem, GpReg) - //! @overload + //! \overload INST_2x(xchg, kInstXchg, GpReg, Mem) //! Xor. INST_2x(xor_, kInstXor, GpReg, GpReg) - //! @overload + //! \overload INST_2x(xor_, kInstXor, GpReg, Mem) - //! @overload + //! \overload INST_2i(xor_, kInstXor, GpReg, Imm) - //! @overload + //! \overload INST_2x(xor_, kInstXor, Mem, GpReg) - //! @overload + //! \overload INST_2i(xor_, kInstXor, Mem, Imm) // -------------------------------------------------------------------------- @@ -1203,13 +1209,13 @@ struct X86X64Assembler : public BaseAssembler { //! Add `o1` to `o0` and store result in `o0` (FPU). //! - //! @note One of dst or src must be fp0. + //! \note One of dst or src must be fp0. INST_2x_(fadd, kInstFadd, FpReg, FpReg, o0.getRegIndex() == 0 || o1.getRegIndex() == 0) //! Add 4-byte or 8-byte FP `o0` to fp0 and store result in fp0 (FPU). INST_1x(fadd, kInstFadd, Mem) //! Add fp0 to `o0` and POP register stack (FPU). INST_1x(faddp, kInstFaddp, FpReg) - //! @overload. + //! \overload INST_0x(faddp, kInstFaddp) //! Load binary coded decimal (FPU). @@ -1266,24 +1272,24 @@ struct X86X64Assembler : public BaseAssembler { //! Divide `o0` by `o1` (FPU). //! - //! @note One of `o0` or `o1` register must be fp0. + //! \note One of `o0` or `o1` register must be fp0. INST_2x_(fdiv, kInstFdiv, FpReg, FpReg, o0.getRegIndex() == 0 || o1.getRegIndex() == 0) //! Divide fp0 by 32-bit or 64-bit FP value (FPU). INST_1x(fdiv, kInstFdiv, Mem) //! Divide `o0` by fp0 (FPU). INST_1x(fdivp, kInstFdivp, FpReg) - //! @overload. + //! \overload INST_0x(fdivp, kInstFdivp) //! Reverse divide `o0` by `o1` (FPU). //! - //! @note One of `o0` or `src` register must be fp0. + //! \note One of `o0` or `src` register must be fp0. INST_2x_(fdivr, kInstFdivr, FpReg, FpReg, o0.getRegIndex() == 0 || o1.getRegIndex() == 0) //! Reverse divide fp0 by 32-bit or 64-bit FP value (FPU). INST_1x(fdivr, kInstFdivr, Mem) //! Reverse divide `o0` by fp0 (FPU). INST_1x(fdivrp, kInstFdivrp, FpReg) - //! @overload. + //! \overload INST_0x(fdivrp, kInstFdivrp) //! Free FP register (FPU). @@ -1358,14 +1364,14 @@ struct X86X64Assembler : public BaseAssembler { //! Multiply `o0` by `o1` and store result in `o0` (FPU). //! - //! @note One of dst or src must be fp0. + //! \note One of dst or src must be fp0. INST_2x_(fmul, kInstFmul, FpReg, FpReg, o0.getRegIndex() == 0 || o1.getRegIndex() == 0) //! Multiply fp0 by 32-bit or 64-bit `o0` and store result in fp0 (FPU). INST_1x(fmul, kInstFmul, Mem) //! Multiply fp0 by `o0` and POP register stack (FPU). INST_1x(fmulp, kInstFmulp, FpReg) - //! @overload. + //! \overload INST_0x(fmulp, kInstFmulp) //! Clear exceptions (FPU). @@ -1469,24 +1475,24 @@ struct X86X64Assembler : public BaseAssembler { //! Subtract `o0` from `o0` and store result in `o0` (FPU). //! - //! @note One of dst or src must be fp0. + //! \note One of dst or src must be fp0. INST_2x_(fsub, kInstFsub, FpReg, FpReg, o0.getRegIndex() == 0 || o1.getRegIndex() == 0) //! Subtract 32-bit or 64-bit `o0` from fp0 and store result in fp0 (FPU). INST_1x_(fsub, kInstFsub, Mem, o0.getSize() == 4 || o0.getSize() == 8) //! Subtract fp0 from `o0` and POP register stack (FPU). INST_1x(fsubp, kInstFsubp, FpReg) - //! @overload. + //! \overload INST_0x(fsubp, kInstFsubp) //! Reverse subtract `o1` from `o0` and store result in `o0` (FPU). //! - //! @note One of dst or src must be fp0. + //! \note One of dst or src must be fp0. INST_2x_(fsubr, kInstFsubr, FpReg, FpReg, o0.getRegIndex() == 0 || o1.getRegIndex() == 0) //! Reverse subtract 32-bit or 64-bit `o0` from fp0 and store result in fp0 (FPU). INST_1x_(fsubr, kInstFsubr, Mem, o0.getSize() == 4 || o0.getSize() == 8) //! Reverse subtract fp0 from `o0` and POP register stack (FPU). INST_1x(fsubrp, kInstFsubrp, FpReg) - //! @overload. + //! \overload INST_0x(fsubrp, kInstFsubrp) //! Floating point test - Compare fp0 with 0.0. (FPU). @@ -1550,254 +1556,254 @@ struct X86X64Assembler : public BaseAssembler { //! Move DWORD (MMX). INST_2x(movd, kInstMovd, Mem, MmReg) - //! @overload + //! \overload INST_2x(movd, kInstMovd, GpReg, MmReg) - //! @overload + //! \overload INST_2x(movd, kInstMovd, MmReg, Mem) - //! @overload + //! \overload INST_2x(movd, kInstMovd, MmReg, GpReg) //! Move QWORD (MMX). INST_2x(movq, kInstMovq, MmReg, MmReg) - //! @overload + //! \overload INST_2x(movq, kInstMovq, Mem, MmReg) - //! @overload + //! \overload INST_2x(movq, kInstMovq, MmReg, Mem) //! Pack DWORDs to WORDs with signed saturation (MMX). INST_2x(packssdw, kInstPackssdw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(packssdw, kInstPackssdw, MmReg, Mem) //! Pack WORDs to BYTEs with signed saturation (MMX). INST_2x(packsswb, kInstPacksswb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(packsswb, kInstPacksswb, MmReg, Mem) //! Pack WORDs to BYTEs with unsigned saturation (MMX). INST_2x(packuswb, kInstPackuswb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(packuswb, kInstPackuswb, MmReg, Mem) //! Packed BYTE add (MMX). INST_2x(paddb, kInstPaddb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(paddb, kInstPaddb, MmReg, Mem) //! Packed DWORD add (MMX). INST_2x(paddd, kInstPaddd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(paddd, kInstPaddd, MmReg, Mem) //! Packed BYTE add with saturation (MMX). INST_2x(paddsb, kInstPaddsb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(paddsb, kInstPaddsb, MmReg, Mem) //! Packed WORD add with saturation (MMX). INST_2x(paddsw, kInstPaddsw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(paddsw, kInstPaddsw, MmReg, Mem) //! Packed BYTE add with unsigned saturation (MMX). INST_2x(paddusb, kInstPaddusb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(paddusb, kInstPaddusb, MmReg, Mem) //! Packed WORD add with unsigned saturation (MMX). INST_2x(paddusw, kInstPaddusw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(paddusw, kInstPaddusw, MmReg, Mem) //! Packed WORD add (MMX). INST_2x(paddw, kInstPaddw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(paddw, kInstPaddw, MmReg, Mem) //! Packed bitwise and (MMX). INST_2x(pand, kInstPand, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pand, kInstPand, MmReg, Mem) //! Packed bitwise and-not (MMX). INST_2x(pandn, kInstPandn, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pandn, kInstPandn, MmReg, Mem) //! Packed BYTEs compare for equality (MMX). INST_2x(pcmpeqb, kInstPcmpeqb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pcmpeqb, kInstPcmpeqb, MmReg, Mem) //! Packed DWORDs compare for equality (MMX). INST_2x(pcmpeqd, kInstPcmpeqd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pcmpeqd, kInstPcmpeqd, MmReg, Mem) //! Packed WORDs compare for equality (MMX). INST_2x(pcmpeqw, kInstPcmpeqw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pcmpeqw, kInstPcmpeqw, MmReg, Mem) //! Packed BYTEs compare if greater than (MMX). INST_2x(pcmpgtb, kInstPcmpgtb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pcmpgtb, kInstPcmpgtb, MmReg, Mem) //! Packed DWORDs compare if greater than (MMX). INST_2x(pcmpgtd, kInstPcmpgtd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pcmpgtd, kInstPcmpgtd, MmReg, Mem) //! Packed WORDs compare if greater than (MMX). INST_2x(pcmpgtw, kInstPcmpgtw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pcmpgtw, kInstPcmpgtw, MmReg, Mem) //! Packed WORDs multiply high (MMX). INST_2x(pmulhw, kInstPmulhw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pmulhw, kInstPmulhw, MmReg, Mem) //! Packed WORDs multiply low (MMX). INST_2x(pmullw, kInstPmullw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pmullw, kInstPmullw, MmReg, Mem) //! Pakced bitwise or (MMX). INST_2x(por, kInstPor, MmReg, MmReg) - //! @overload + //! \overload INST_2x(por, kInstPor, MmReg, Mem) //! Packed WORD multiply and add to packed DWORD (MMX). INST_2x(pmaddwd, kInstPmaddwd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pmaddwd, kInstPmaddwd, MmReg, Mem) //! Packed DWORD shift left logical (MMX). INST_2x(pslld, kInstPslld, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pslld, kInstPslld, MmReg, Mem) - //! @overload + //! \overload INST_2i(pslld, kInstPslld, MmReg, Imm) //! Packed QWORD shift left logical (MMX). INST_2x(psllq, kInstPsllq, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psllq, kInstPsllq, MmReg, Mem) - //! @overload + //! \overload INST_2i(psllq, kInstPsllq, MmReg, Imm) //! Packed WORD shift left logical (MMX). INST_2x(psllw, kInstPsllw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psllw, kInstPsllw, MmReg, Mem) - //! @overload + //! \overload INST_2i(psllw, kInstPsllw, MmReg, Imm) //! Packed DWORD shift right arithmetic (MMX). INST_2x(psrad, kInstPsrad, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psrad, kInstPsrad, MmReg, Mem) - //! @overload + //! \overload INST_2i(psrad, kInstPsrad, MmReg, Imm) //! Packed WORD shift right arithmetic (MMX). INST_2x(psraw, kInstPsraw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psraw, kInstPsraw, MmReg, Mem) - //! @overload + //! \overload INST_2i(psraw, kInstPsraw, MmReg, Imm) //! Packed DWORD shift right logical (MMX). INST_2x(psrld, kInstPsrld, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psrld, kInstPsrld, MmReg, Mem) - //! @overload + //! \overload INST_2i(psrld, kInstPsrld, MmReg, Imm) //! Packed QWORD shift right logical (MMX). INST_2x(psrlq, kInstPsrlq, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psrlq, kInstPsrlq, MmReg, Mem) - //! @overload + //! \overload INST_2i(psrlq, kInstPsrlq, MmReg, Imm) //! Packed WORD shift right logical (MMX). INST_2x(psrlw, kInstPsrlw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psrlw, kInstPsrlw, MmReg, Mem) - //! @overload + //! \overload INST_2i(psrlw, kInstPsrlw, MmReg, Imm) //! Packed BYTE subtract (MMX). INST_2x(psubb, kInstPsubb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psubb, kInstPsubb, MmReg, Mem) //! Packed DWORD subtract (MMX). INST_2x(psubd, kInstPsubd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psubd, kInstPsubd, MmReg, Mem) //! Packed BYTE subtract with saturation (MMX). INST_2x(psubsb, kInstPsubsb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psubsb, kInstPsubsb, MmReg, Mem) //! Packed WORD subtract with saturation (MMX). INST_2x(psubsw, kInstPsubsw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psubsw, kInstPsubsw, MmReg, Mem) //! Packed BYTE subtract with unsigned saturation (MMX). INST_2x(psubusb, kInstPsubusb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psubusb, kInstPsubusb, MmReg, Mem) //! Packed WORD subtract with unsigned saturation (MMX). INST_2x(psubusw, kInstPsubusw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psubusw, kInstPsubusw, MmReg, Mem) //! Packed WORD subtract (MMX). INST_2x(psubw, kInstPsubw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psubw, kInstPsubw, MmReg, Mem) //! Unpack high packed BYTEs to WORDs (MMX). INST_2x(punpckhbw, kInstPunpckhbw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(punpckhbw, kInstPunpckhbw, MmReg, Mem) //! Unpack high packed DWORDs to QWORDs (MMX). INST_2x(punpckhdq, kInstPunpckhdq, MmReg, MmReg) - //! @overload + //! \overload INST_2x(punpckhdq, kInstPunpckhdq, MmReg, Mem) //! Unpack high packed WORDs to DWORDs (MMX). INST_2x(punpckhwd, kInstPunpckhwd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(punpckhwd, kInstPunpckhwd, MmReg, Mem) //! Unpack low packed BYTEs to WORDs (MMX). INST_2x(punpcklbw, kInstPunpcklbw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(punpcklbw, kInstPunpcklbw, MmReg, Mem) //! Unpack low packed DWORDs to QWORDs (MMX). INST_2x(punpckldq, kInstPunpckldq, MmReg, MmReg) - //! @overload + //! \overload INST_2x(punpckldq, kInstPunpckldq, MmReg, Mem) //! Unpack low packed WORDs to DWORDs (MMX). INST_2x(punpcklwd, kInstPunpcklwd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(punpcklwd, kInstPunpcklwd, MmReg, Mem) //! Packed bitwise xor (MMX). INST_2x(pxor, kInstPxor, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pxor, kInstPxor, MmReg, Mem) //! Empty MMX state. @@ -1809,112 +1815,112 @@ struct X86X64Assembler : public BaseAssembler { //! Packed SP-FP to DWORD convert (3dNow!). INST_2x(pf2id, kInstPf2id, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pf2id, kInstPf2id, MmReg, Mem) //! Packed SP-FP to WORD convert (3dNow!). INST_2x(pf2iw, kInstPf2iw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pf2iw, kInstPf2iw, MmReg, Mem) //! Packed SP-FP accumulate (3dNow!). INST_2x(pfacc, kInstPfacc, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfacc, kInstPfacc, MmReg, Mem) //! Packed SP-FP addition (3dNow!). INST_2x(pfadd, kInstPfadd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfadd, kInstPfadd, MmReg, Mem) //! Packed SP-FP compare - dst == src (3dNow!). INST_2x(pfcmpeq, kInstPfcmpeq, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfcmpeq, kInstPfcmpeq, MmReg, Mem) //! Packed SP-FP compare - dst >= src (3dNow!). INST_2x(pfcmpge, kInstPfcmpge, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfcmpge, kInstPfcmpge, MmReg, Mem) //! Packed SP-FP compare - dst > src (3dNow!). INST_2x(pfcmpgt, kInstPfcmpgt, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfcmpgt, kInstPfcmpgt, MmReg, Mem) //! Packed SP-FP maximum (3dNow!). INST_2x(pfmax, kInstPfmax, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfmax, kInstPfmax, MmReg, Mem) //! Packed SP-FP minimum (3dNow!). INST_2x(pfmin, kInstPfmin, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfmin, kInstPfmin, MmReg, Mem) //! Packed SP-FP multiply (3dNow!). INST_2x(pfmul, kInstPfmul, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfmul, kInstPfmul, MmReg, Mem) //! Packed SP-FP negative accumulate (3dNow!). INST_2x(pfnacc, kInstPfnacc, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfnacc, kInstPfnacc, MmReg, Mem) //! Packed SP-FP mixed accumulate (3dNow!). INST_2x(pfpnacc, kInstPfpnacc, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfpnacc, kInstPfpnacc, MmReg, Mem) //! Packed SP-FP reciprocal Approximation (3dNow!). INST_2x(pfrcp, kInstPfrcp, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfrcp, kInstPfrcp, MmReg, Mem) //! Packed SP-FP reciprocal, first iteration step (3dNow!). INST_2x(pfrcpit1, kInstPfrcpit1, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfrcpit1, kInstPfrcpit1, MmReg, Mem) //! Packed SP-FP reciprocal, second iteration step (3dNow!). INST_2x(pfrcpit2, kInstPfrcpit2, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfrcpit2, kInstPfrcpit2, MmReg, Mem) //! Packed SP-FP reciprocal square root, first iteration step (3dNow!). INST_2x(pfrsqit1, kInstPfrsqit1, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfrsqit1, kInstPfrsqit1, MmReg, Mem) //! Packed SP-FP reciprocal square root approximation (3dNow!). INST_2x(pfrsqrt, kInstPfrsqrt, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfrsqrt, kInstPfrsqrt, MmReg, Mem) //! Packed SP-FP subtract (3dNow!). INST_2x(pfsub, kInstPfsub, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfsub, kInstPfsub, MmReg, Mem) //! Packed SP-FP reverse subtract (3dNow!). INST_2x(pfsubr, kInstPfsubr, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pfsubr, kInstPfsubr, MmReg, Mem) //! Packed DWORDs to SP-FP (3dNow!). INST_2x(pi2fd, kInstPi2fd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pi2fd, kInstPi2fd, MmReg, Mem) //! Packed WORDs to SP-FP (3dNow!). INST_2x(pi2fw, kInstPi2fw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pi2fw, kInstPi2fw, MmReg, Mem) //! Packed swap DWORDs (3dNow!) INST_2x(pswapd, kInstPswapd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pswapd, kInstPswapd, MmReg, Mem) //! Prefetch (3dNow!). @@ -1932,77 +1938,77 @@ struct X86X64Assembler : public BaseAssembler { //! Packed SP-FP add (SSE). INST_2x(addps, kInstAddps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(addps, kInstAddps, XmmReg, Mem) //! Scalar SP-FP add (SSE). INST_2x(addss, kInstAddss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(addss, kInstAddss, XmmReg, Mem) //! Packed SP-FP bitwise and-not (SSE). INST_2x(andnps, kInstAndnps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(andnps, kInstAndnps, XmmReg, Mem) //! Packed SP-FP bitwise and (SSE). INST_2x(andps, kInstAndps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(andps, kInstAndps, XmmReg, Mem) //! Packed SP-FP compare (SSE). INST_3i(cmpps, kInstCmpps, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(cmpps, kInstCmpps, XmmReg, Mem, Imm) //! Compare scalar SP-FP (SSE). INST_3i(cmpss, kInstCmpss, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(cmpss, kInstCmpss, XmmReg, Mem, Imm) //! Scalar ordered SP-FP compare and set EFLAGS (SSE). INST_2x(comiss, kInstComiss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(comiss, kInstComiss, XmmReg, Mem) //! Packed signed INT32 to packed SP-FP conversion (SSE). INST_2x(cvtpi2ps, kInstCvtpi2ps, XmmReg, MmReg) - //! @overload + //! \overload INST_2x(cvtpi2ps, kInstCvtpi2ps, XmmReg, Mem) //! Packed SP-FP to packed INT32 conversion (SSE). INST_2x(cvtps2pi, kInstCvtps2pi, MmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtps2pi, kInstCvtps2pi, MmReg, Mem) //! Convert scalar INT32 to SP-FP (SSE). INST_2x(cvtsi2ss, kInstCvtsi2ss, XmmReg, GpReg) - //! @overload + //! \overload INST_2x(cvtsi2ss, kInstCvtsi2ss, XmmReg, Mem) //! Convert scalar SP-FP to INT32 (SSE). INST_2x(cvtss2si, kInstCvtss2si, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtss2si, kInstCvtss2si, GpReg, Mem) //! Convert with truncation packed SP-FP to packed INT32 (SSE). INST_2x(cvttps2pi, kInstCvttps2pi, MmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvttps2pi, kInstCvttps2pi, MmReg, Mem) //! Convert with truncation scalar SP-FP to INT32 (SSE). INST_2x(cvttss2si, kInstCvttss2si, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(cvttss2si, kInstCvttss2si, GpReg, Mem) //! Packed SP-FP divide (SSE). INST_2x(divps, kInstDivps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(divps, kInstDivps, XmmReg, Mem) //! Scalar SP-FP divide (SSE). INST_2x(divss, kInstDivss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(divss, kInstDivss, XmmReg, Mem) //! Load streaming SIMD extension control/status (SSE). @@ -2013,45 +2019,45 @@ struct X86X64Assembler : public BaseAssembler { //! Packed SP-FP maximum (SSE). INST_2x(maxps, kInstMaxps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(maxps, kInstMaxps, XmmReg, Mem) //! Scalar SP-FP maximum (SSE). INST_2x(maxss, kInstMaxss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(maxss, kInstMaxss, XmmReg, Mem) //! Packed SP-FP minimum (SSE). INST_2x(minps, kInstMinps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(minps, kInstMinps, XmmReg, Mem) //! Scalar SP-FP minimum (SSE). INST_2x(minss, kInstMinss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(minss, kInstMinss, XmmReg, Mem) //! Move aligned packed SP-FP (SSE). INST_2x(movaps, kInstMovaps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movaps, kInstMovaps, XmmReg, Mem) //! Move aligned packed SP-FP (SSE). INST_2x(movaps, kInstMovaps, Mem, XmmReg) //! Move DWORD. INST_2x(movd, kInstMovd, Mem, XmmReg) - //! @overload + //! \overload INST_2x(movd, kInstMovd, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(movd, kInstMovd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movd, kInstMovd, XmmReg, GpReg) //! Move QWORD (SSE). INST_2x(movq, kInstMovq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movq, kInstMovq, Mem, XmmReg) - //! @overload + //! \overload INST_2x(movq, kInstMovq, XmmReg, Mem) //! Move QWORD using NT hint (SSE). @@ -2078,41 +2084,41 @@ struct X86X64Assembler : public BaseAssembler { //! Move scalar SP-FP (SSE). INST_2x(movss, kInstMovss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movss, kInstMovss, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movss, kInstMovss, Mem, XmmReg) //! Move unaligned packed SP-FP (SSE). INST_2x(movups, kInstMovups, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movups, kInstMovups, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movups, kInstMovups, Mem, XmmReg) //! Packed SP-FP multiply (SSE). INST_2x(mulps, kInstMulps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(mulps, kInstMulps, XmmReg, Mem) //! Scalar SP-FP multiply (SSE). INST_2x(mulss, kInstMulss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(mulss, kInstMulss, XmmReg, Mem) //! Packed SP-FP bitwise or (SSE). INST_2x(orps, kInstOrps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(orps, kInstOrps, XmmReg, Mem) //! Packed BYTE average (SSE). INST_2x(pavgb, kInstPavgb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pavgb, kInstPavgb, MmReg, Mem) //! Packed WORD average (SSE). INST_2x(pavgw, kInstPavgw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pavgw, kInstPavgw, MmReg, Mem) //! Extract WORD based on selector (SSE). @@ -2120,27 +2126,27 @@ struct X86X64Assembler : public BaseAssembler { //! Insert WORD based on selector (SSE). INST_3i(pinsrw, kInstPinsrw, MmReg, GpReg, Imm) - //! @overload + //! \overload INST_3i(pinsrw, kInstPinsrw, MmReg, Mem, Imm) //! Packed WORD maximum (SSE). INST_2x(pmaxsw, kInstPmaxsw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pmaxsw, kInstPmaxsw, MmReg, Mem) //! Packed BYTE unsigned maximum (SSE). INST_2x(pmaxub, kInstPmaxub, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pmaxub, kInstPmaxub, MmReg, Mem) //! Packed WORD minimum (SSE). INST_2x(pminsw, kInstPminsw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pminsw, kInstPminsw, MmReg, Mem) //! Packed BYTE unsigned minimum (SSE). INST_2x(pminub, kInstPminub, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pminub, kInstPminub, MmReg, Mem) //! Move Byte mask to integer (SSE). @@ -2148,27 +2154,27 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD unsigned multiply high (SSE). INST_2x(pmulhuw, kInstPmulhuw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pmulhuw, kInstPmulhuw, MmReg, Mem) //! Packed WORD sum of absolute differences (SSE). INST_2x(psadbw, kInstPsadbw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psadbw, kInstPsadbw, MmReg, Mem) //! Packed WORD shuffle (SSE). INST_3i(pshufw, kInstPshufw, MmReg, MmReg, Imm) - //! @overload + //! \overload INST_3i(pshufw, kInstPshufw, MmReg, Mem, Imm) //! Packed SP-FP reciprocal (SSE). INST_2x(rcpps, kInstRcpps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(rcpps, kInstRcpps, XmmReg, Mem) //! Scalar SP-FP reciprocal (SSE). INST_2x(rcpss, kInstRcpss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(rcpss, kInstRcpss, XmmReg, Mem) //! Prefetch (SSE). @@ -2176,17 +2182,17 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD sum of absolute differences (SSE). INST_2x(psadbw, kInstPsadbw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psadbw, kInstPsadbw, XmmReg, Mem) //! Packed SP-FP square root reciprocal (SSE). INST_2x(rsqrtps, kInstRsqrtps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(rsqrtps, kInstRsqrtps, XmmReg, Mem) //! Scalar SP-FP square root reciprocal (SSE). INST_2x(rsqrtss, kInstRsqrtss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(rsqrtss, kInstRsqrtss, XmmReg, Mem) //! Store fence (SSE). @@ -2194,17 +2200,17 @@ struct X86X64Assembler : public BaseAssembler { //! Shuffle SP-FP (SSE). INST_3i(shufps, kInstShufps, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(shufps, kInstShufps, XmmReg, Mem, Imm) //! Packed SP-FP square root (SSE). INST_2x(sqrtps, kInstSqrtps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(sqrtps, kInstSqrtps, XmmReg, Mem) //! Scalar SP-FP square root (SSE). INST_2x(sqrtss, kInstSqrtss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(sqrtss, kInstSqrtss, XmmReg, Mem) //! Store streaming SIMD extension control/status (SSE). @@ -2212,32 +2218,32 @@ struct X86X64Assembler : public BaseAssembler { //! Packed SP-FP subtract (SSE). INST_2x(subps, kInstSubps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(subps, kInstSubps, XmmReg, Mem) //! Scalar SP-FP subtract (SSE). INST_2x(subss, kInstSubss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(subss, kInstSubss, XmmReg, Mem) //! Unordered scalar SP-FP compare and set EFLAGS (SSE). INST_2x(ucomiss, kInstUcomiss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(ucomiss, kInstUcomiss, XmmReg, Mem) //! Unpack high packed SP-FP data (SSE). INST_2x(unpckhps, kInstUnpckhps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(unpckhps, kInstUnpckhps, XmmReg, Mem) //! Unpack low packed SP-FP data (SSE). INST_2x(unpcklps, kInstUnpcklps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(unpcklps, kInstUnpcklps, XmmReg, Mem) //! Packed SP-FP bitwise xor (SSE). INST_2x(xorps, kInstXorps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(xorps, kInstXorps, XmmReg, Mem) // -------------------------------------------------------------------------- @@ -2246,22 +2252,22 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP add (SSE2). INST_2x(addpd, kInstAddpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(addpd, kInstAddpd, XmmReg, Mem) //! Scalar DP-FP add (SSE2). INST_2x(addsd, kInstAddsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(addsd, kInstAddsd, XmmReg, Mem) //! Packed DP-FP bitwise and-not (SSE2). INST_2x(andnpd, kInstAndnpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(andnpd, kInstAndnpd, XmmReg, Mem) //! Packed DP-FP bitwise and (SSE2). INST_2x(andpd, kInstAndpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(andpd, kInstAndpd, XmmReg, Mem) //! Flush cache line (SSE2). @@ -2269,107 +2275,107 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP compare (SSE2). INST_3i(cmppd, kInstCmppd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(cmppd, kInstCmppd, XmmReg, Mem, Imm) //! Scalar SP-FP compare (SSE2). INST_3i(cmpsd, kInstCmpsd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(cmpsd, kInstCmpsd, XmmReg, Mem, Imm) //! Scalar ordered DP-FP compare and set EFLAGS (SSE2). INST_2x(comisd, kInstComisd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(comisd, kInstComisd, XmmReg, Mem) //! Convert packed QWORDs to packed DP-FP (SSE2). INST_2x(cvtdq2pd, kInstCvtdq2pd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtdq2pd, kInstCvtdq2pd, XmmReg, Mem) //! Convert packed QWORDs to packed SP-FP (SSE2). INST_2x(cvtdq2ps, kInstCvtdq2ps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtdq2ps, kInstCvtdq2ps, XmmReg, Mem) //! Convert packed DP-FP to packed QWORDs (SSE2). INST_2x(cvtpd2dq, kInstCvtpd2dq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtpd2dq, kInstCvtpd2dq, XmmReg, Mem) //! Convert packed DP-FP to packed QRODSs (SSE2). INST_2x(cvtpd2pi, kInstCvtpd2pi, MmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtpd2pi, kInstCvtpd2pi, MmReg, Mem) //! Convert packed DP-FP to packed SP-FP (SSE2). INST_2x(cvtpd2ps, kInstCvtpd2ps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtpd2ps, kInstCvtpd2ps, XmmReg, Mem) //! Convert packed DWORDs integers to packed DP-FP (SSE2). INST_2x(cvtpi2pd, kInstCvtpi2pd, XmmReg, MmReg) - //! @overload + //! \overload INST_2x(cvtpi2pd, kInstCvtpi2pd, XmmReg, Mem) //! Convert packed SP-FP to packed QWORDs (SSE2). INST_2x(cvtps2dq, kInstCvtps2dq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtps2dq, kInstCvtps2dq, XmmReg, Mem) //! Convert packed SP-FP to packed DP-FP (SSE2). INST_2x(cvtps2pd, kInstCvtps2pd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtps2pd, kInstCvtps2pd, XmmReg, Mem) //! Convert scalar DP-FP to DWORD integer (SSE2). INST_2x(cvtsd2si, kInstCvtsd2si, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtsd2si, kInstCvtsd2si, GpReg, Mem) //! Convert scalar DP-FP to scalar SP-FP (SSE2). INST_2x(cvtsd2ss, kInstCvtsd2ss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtsd2ss, kInstCvtsd2ss, XmmReg, Mem) //! Convert DWORD integer to scalar DP-FP (SSE2). INST_2x(cvtsi2sd, kInstCvtsi2sd, XmmReg, GpReg) - //! @overload + //! \overload INST_2x(cvtsi2sd, kInstCvtsi2sd, XmmReg, Mem) //! Convert scalar SP-FP to DP-FP (SSE2). INST_2x(cvtss2sd, kInstCvtss2sd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvtss2sd, kInstCvtss2sd, XmmReg, Mem) //! Convert with truncation packed DP-FP to packed DWORDs (SSE2). INST_2x(cvttpd2pi, kInstCvttpd2pi, MmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvttpd2pi, kInstCvttpd2pi, MmReg, Mem) //! Convert with truncation packed DP-FP to packed QWORDs (SSE2). INST_2x(cvttpd2dq, kInstCvttpd2dq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvttpd2dq, kInstCvttpd2dq, XmmReg, Mem) //! Convert with truncation packed SP-FP to packed QWORDs (SSE2). INST_2x(cvttps2dq, kInstCvttps2dq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(cvttps2dq, kInstCvttps2dq, XmmReg, Mem) //! Convert with truncation scalar DP-FP to signed DWORDs (SSE2). INST_2x(cvttsd2si, kInstCvttsd2si, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(cvttsd2si, kInstCvttsd2si, GpReg, Mem) //! Packed DP-FP divide (SSE2). INST_2x(divpd, kInstDivpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(divpd, kInstDivpd, XmmReg, Mem) //! Scalar DP-FP divide (SSE2). INST_2x(divsd, kInstDivsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(divsd, kInstDivsd, XmmReg, Mem) //! Load fence (SSE2). @@ -2380,12 +2386,12 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP maximum (SSE2). INST_2x(maxpd, kInstMaxpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(maxpd, kInstMaxpd, XmmReg, Mem) //! Scalar DP-FP maximum (SSE2). INST_2x(maxsd, kInstMaxsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(maxsd, kInstMaxsd, XmmReg, Mem) //! Memory fence (SSE2). @@ -2393,26 +2399,26 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP minimum (SSE2). INST_2x(minpd, kInstMinpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(minpd, kInstMinpd, XmmReg, Mem) //! Scalar DP-FP minimum (SSE2). INST_2x(minsd, kInstMinsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(minsd, kInstMinsd, XmmReg, Mem) //! Move aligned OWORD (SSE2). INST_2x(movdqa, kInstMovdqa, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movdqa, kInstMovdqa, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movdqa, kInstMovdqa, Mem, XmmReg) //! Move unaligned OWORD (SSE2). INST_2x(movdqu, kInstMovdqu, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movdqu, kInstMovdqu, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movdqu, kInstMovdqu, Mem, XmmReg) //! Extract packed SP-FP sign mask (SSE2). @@ -2423,32 +2429,32 @@ struct X86X64Assembler : public BaseAssembler { //! Move scalar DP-FP (SSE2). INST_2x(movsd, kInstMovsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movsd, kInstMovsd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movsd, kInstMovsd, Mem, XmmReg) //! Move aligned packed DP-FP (SSE2). INST_2x(movapd, kInstMovapd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movapd, kInstMovapd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movapd, kInstMovapd, Mem, XmmReg) - //! Move QWORD from XMM to MM register (SSE2). + //! Move QWORD from Xmm to Mm register (SSE2). INST_2x(movdq2q, kInstMovdq2q, MmReg, XmmReg) - //! Move QWORD from MM to XMM register (SSE2). + //! Move QWORD from Mm to Xmm register (SSE2). INST_2x(movq2dq, kInstMovq2dq, XmmReg, MmReg) //! Move high packed DP-FP (SSE2). INST_2x(movhpd, kInstMovhpd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movhpd, kInstMovhpd, Mem, XmmReg) //! Move low packed DP-FP (SSE2). INST_2x(movlpd, kInstMovlpd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movlpd, kInstMovlpd, Mem, XmmReg) //! Store OWORD using NT hint (SSE2). @@ -2462,94 +2468,94 @@ struct X86X64Assembler : public BaseAssembler { //! Move unaligned packed DP-FP (SSE2). INST_2x(movupd, kInstMovupd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movupd, kInstMovupd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(movupd, kInstMovupd, Mem, XmmReg) //! Packed DP-FP multiply (SSE2). INST_2x(mulpd, kInstMulpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(mulpd, kInstMulpd, XmmReg, Mem) //! Scalar DP-FP multiply (SSE2). INST_2x(mulsd, kInstMulsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(mulsd, kInstMulsd, XmmReg, Mem) //! Packed DP-FP bitwise or (SSE2). INST_2x(orpd, kInstOrpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(orpd, kInstOrpd, XmmReg, Mem) //! Pack WORDs to BYTEs with signed saturation (SSE2). INST_2x(packsswb, kInstPacksswb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(packsswb, kInstPacksswb, XmmReg, Mem) //! Pack DWORDs to WORDs with signed saturation (SSE2). INST_2x(packssdw, kInstPackssdw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(packssdw, kInstPackssdw, XmmReg, Mem) //! Pack WORDs to BYTEs with unsigned saturation (SSE2). INST_2x(packuswb, kInstPackuswb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(packuswb, kInstPackuswb, XmmReg, Mem) //! Packed BYTE Add (SSE2). INST_2x(paddb, kInstPaddb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(paddb, kInstPaddb, XmmReg, Mem) //! Packed WORD add (SSE2). INST_2x(paddw, kInstPaddw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(paddw, kInstPaddw, XmmReg, Mem) //! Packed DWORD add (SSE2). INST_2x(paddd, kInstPaddd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(paddd, kInstPaddd, XmmReg, Mem) //! Packed QWORD add (SSE2). INST_2x(paddq, kInstPaddq, MmReg, MmReg) - //! @overload + //! \overload INST_2x(paddq, kInstPaddq, MmReg, Mem) //! Packed QWORD add (SSE2). INST_2x(paddq, kInstPaddq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(paddq, kInstPaddq, XmmReg, Mem) //! Packed BYTE add with saturation (SSE2). INST_2x(paddsb, kInstPaddsb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(paddsb, kInstPaddsb, XmmReg, Mem) //! Packed WORD add with saturation (SSE2). INST_2x(paddsw, kInstPaddsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(paddsw, kInstPaddsw, XmmReg, Mem) //! Packed BYTE add with unsigned saturation (SSE2). INST_2x(paddusb, kInstPaddusb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(paddusb, kInstPaddusb, XmmReg, Mem) //! Packed WORD add with unsigned saturation (SSE2). INST_2x(paddusw, kInstPaddusw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(paddusw, kInstPaddusw, XmmReg, Mem) //! Packed bitwise and (SSE2). INST_2x(pand, kInstPand, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pand, kInstPand, XmmReg, Mem) //! Packed bitwise and-not (SSE2). INST_2x(pandn, kInstPandn, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pandn, kInstPandn, XmmReg, Mem) //! Spin loop hint (SSE2). @@ -2557,42 +2563,42 @@ struct X86X64Assembler : public BaseAssembler { //! Packed BYTE average (SSE2). INST_2x(pavgb, kInstPavgb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pavgb, kInstPavgb, XmmReg, Mem) //! Packed WORD average (SSE2). INST_2x(pavgw, kInstPavgw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pavgw, kInstPavgw, XmmReg, Mem) //! Packed BYTE compare for equality (SSE2). INST_2x(pcmpeqb, kInstPcmpeqb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pcmpeqb, kInstPcmpeqb, XmmReg, Mem) //! Packed WORD compare for equality (SSE2). INST_2x(pcmpeqw, kInstPcmpeqw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pcmpeqw, kInstPcmpeqw, XmmReg, Mem) //! Packed DWORD compare for equality (SSE2). INST_2x(pcmpeqd, kInstPcmpeqd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pcmpeqd, kInstPcmpeqd, XmmReg, Mem) //! Packed BYTE compare if greater than (SSE2). INST_2x(pcmpgtb, kInstPcmpgtb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pcmpgtb, kInstPcmpgtb, XmmReg, Mem) //! Packed WORD compare if greater than (SSE2). INST_2x(pcmpgtw, kInstPcmpgtw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pcmpgtw, kInstPcmpgtw, XmmReg, Mem) //! Packed DWORD compare if greater than (SSE2). INST_2x(pcmpgtd, kInstPcmpgtd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pcmpgtd, kInstPcmpgtd, XmmReg, Mem) //! Extract WORD based on selector (SSE2). @@ -2600,27 +2606,27 @@ struct X86X64Assembler : public BaseAssembler { //! Insert WORD based on selector (SSE2). INST_3i(pinsrw, kInstPinsrw, XmmReg, GpReg, Imm) - //! @overload + //! \overload INST_3i(pinsrw, kInstPinsrw, XmmReg, Mem, Imm) //! Packed WORD maximum (SSE2). INST_2x(pmaxsw, kInstPmaxsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmaxsw, kInstPmaxsw, XmmReg, Mem) //! Packed BYTE unsigned maximum (SSE2). INST_2x(pmaxub, kInstPmaxub, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmaxub, kInstPmaxub, XmmReg, Mem) //! Packed WORD minimum (SSE2). INST_2x(pminsw, kInstPminsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pminsw, kInstPminsw, XmmReg, Mem) //! Packed BYTE unsigned minimum (SSE2). INST_2x(pminub, kInstPminub, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pminub, kInstPminub, XmmReg, Mem) //! Move byte mask (SSE2). @@ -2628,53 +2634,53 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD multiply high (SSE2). INST_2x(pmulhw, kInstPmulhw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmulhw, kInstPmulhw, XmmReg, Mem) //! Packed WORD unsigned multiply high (SSE2). INST_2x(pmulhuw, kInstPmulhuw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmulhuw, kInstPmulhuw, XmmReg, Mem) //! Packed WORD multiply low (SSE2). INST_2x(pmullw, kInstPmullw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmullw, kInstPmullw, XmmReg, Mem) //! Packed DWORD multiply to QWORD (SSE2). INST_2x(pmuludq, kInstPmuludq, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pmuludq, kInstPmuludq, MmReg, Mem) //! Packed DWORD multiply to QWORD (SSE2). INST_2x(pmuludq, kInstPmuludq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmuludq, kInstPmuludq, XmmReg, Mem) //! Packed bitwise or (SSE2). INST_2x(por, kInstPor, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(por, kInstPor, XmmReg, Mem) //! Packed DWORD shift left logical (SSE2). INST_2x(pslld, kInstPslld, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pslld, kInstPslld, XmmReg, Mem) - //! @overload + //! \overload INST_2i(pslld, kInstPslld, XmmReg, Imm) //! Packed QWORD shift left logical (SSE2). INST_2x(psllq, kInstPsllq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psllq, kInstPsllq, XmmReg, Mem) - //! @overload + //! \overload INST_2i(psllq, kInstPsllq, XmmReg, Imm) //! Packed WORD shift left logical (SSE2). INST_2x(psllw, kInstPsllw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psllw, kInstPsllw, XmmReg, Mem) - //! @overload + //! \overload INST_2i(psllw, kInstPsllw, XmmReg, Imm) //! Packed OWORD shift left logical (SSE2). @@ -2682,75 +2688,75 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DWORD shift right arithmetic (SSE2). INST_2x(psrad, kInstPsrad, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psrad, kInstPsrad, XmmReg, Mem) - //! @overload + //! \overload INST_2i(psrad, kInstPsrad, XmmReg, Imm) //! Packed WORD shift right arithmetic (SSE2). INST_2x(psraw, kInstPsraw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psraw, kInstPsraw, XmmReg, Mem) - //! @overload + //! \overload INST_2i(psraw, kInstPsraw, XmmReg, Imm) //! Packed BYTE subtract (SSE2). INST_2x(psubb, kInstPsubb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psubb, kInstPsubb, XmmReg, Mem) //! Packed DWORD subtract (SSE2). INST_2x(psubd, kInstPsubd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psubd, kInstPsubd, XmmReg, Mem) //! Packed QWORD subtract (SSE2). INST_2x(psubq, kInstPsubq, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psubq, kInstPsubq, MmReg, Mem) //! Packed QWORD subtract (SSE2). INST_2x(psubq, kInstPsubq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psubq, kInstPsubq, XmmReg, Mem) //! Packed WORD subtract (SSE2). INST_2x(psubw, kInstPsubw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psubw, kInstPsubw, XmmReg, Mem) //! Packed WORD to DWORD multiply and add (SSE2). INST_2x(pmaddwd, kInstPmaddwd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmaddwd, kInstPmaddwd, XmmReg, Mem) //! Packed DWORD shuffle (SSE2). INST_3i(pshufd, kInstPshufd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pshufd, kInstPshufd, XmmReg, Mem, Imm) //! Packed WORD shuffle high (SSE2). INST_3i(pshufhw, kInstPshufhw, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pshufhw, kInstPshufhw, XmmReg, Mem, Imm) //! Packed WORD shuffle low (SSE2). INST_3i(pshuflw, kInstPshuflw, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pshuflw, kInstPshuflw, XmmReg, Mem, Imm) //! Packed DWORD shift right logical (SSE2). INST_2x(psrld, kInstPsrld, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psrld, kInstPsrld, XmmReg, Mem) - //! @overload + //! \overload INST_2i(psrld, kInstPsrld, XmmReg, Imm) //! Packed QWORD shift right logical (SSE2). INST_2x(psrlq, kInstPsrlq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psrlq, kInstPsrlq, XmmReg, Mem) - //! @overload + //! \overload INST_2i(psrlq, kInstPsrlq, XmmReg, Imm) //! Scalar OWORD shift right logical (SSE2). @@ -2758,119 +2764,119 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD shift right logical (SSE2). INST_2x(psrlw, kInstPsrlw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psrlw, kInstPsrlw, XmmReg, Mem) - //! @overload + //! \overload INST_2i(psrlw, kInstPsrlw, XmmReg, Imm) //! Packed BYTE subtract with saturation (SSE2). INST_2x(psubsb, kInstPsubsb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psubsb, kInstPsubsb, XmmReg, Mem) //! Packed WORD subtract with saturation (SSE2). INST_2x(psubsw, kInstPsubsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psubsw, kInstPsubsw, XmmReg, Mem) //! Packed BYTE subtract with unsigned saturation (SSE2). INST_2x(psubusb, kInstPsubusb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psubusb, kInstPsubusb, XmmReg, Mem) //! Packed WORD subtract with unsigned saturation (SSE2). INST_2x(psubusw, kInstPsubusw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psubusw, kInstPsubusw, XmmReg, Mem) //! Unpack high packed BYTEs to WORDs (SSE2). INST_2x(punpckhbw, kInstPunpckhbw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(punpckhbw, kInstPunpckhbw, XmmReg, Mem) //! Unpack high packed DWORDs to QWORDs (SSE2). INST_2x(punpckhdq, kInstPunpckhdq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(punpckhdq, kInstPunpckhdq, XmmReg, Mem) //! Unpack high packed QWORDs to OWORD (SSE2). INST_2x(punpckhqdq, kInstPunpckhqdq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(punpckhqdq, kInstPunpckhqdq, XmmReg, Mem) //! Unpack high packed WORDs to DWORDs (SSE2). INST_2x(punpckhwd, kInstPunpckhwd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(punpckhwd, kInstPunpckhwd, XmmReg, Mem) //! Unpack low packed BYTEs to WORDs (SSE2). INST_2x(punpcklbw, kInstPunpcklbw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(punpcklbw, kInstPunpcklbw, XmmReg, Mem) //! Unpack low packed DWORDs to QWORDs (SSE2). INST_2x(punpckldq, kInstPunpckldq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(punpckldq, kInstPunpckldq, XmmReg, Mem) //! Unpack low packed QWORDs to OWORD (SSE2). INST_2x(punpcklqdq, kInstPunpcklqdq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(punpcklqdq, kInstPunpcklqdq, XmmReg, Mem) //! Unpack low packed WORDs to DWORDs (SSE2). INST_2x(punpcklwd, kInstPunpcklwd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(punpcklwd, kInstPunpcklwd, XmmReg, Mem) //! Packed bitwise xor (SSE2). INST_2x(pxor, kInstPxor, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pxor, kInstPxor, XmmReg, Mem) //! Shuffle DP-FP (SSE2). INST_3i(shufpd, kInstShufpd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(shufpd, kInstShufpd, XmmReg, Mem, Imm) //! Packed DP-FP square root (SSE2). INST_2x(sqrtpd, kInstSqrtpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(sqrtpd, kInstSqrtpd, XmmReg, Mem) //! Scalar DP-FP square root (SSE2). INST_2x(sqrtsd, kInstSqrtsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(sqrtsd, kInstSqrtsd, XmmReg, Mem) //! Packed DP-FP subtract (SSE2). INST_2x(subpd, kInstSubpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(subpd, kInstSubpd, XmmReg, Mem) //! Scalar DP-FP subtract (SSE2). INST_2x(subsd, kInstSubsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(subsd, kInstSubsd, XmmReg, Mem) //! Scalar DP-FP unordered compare and set EFLAGS (SSE2). INST_2x(ucomisd, kInstUcomisd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(ucomisd, kInstUcomisd, XmmReg, Mem) //! Unpack and interleave high packed DP-FP (SSE2). INST_2x(unpckhpd, kInstUnpckhpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(unpckhpd, kInstUnpckhpd, XmmReg, Mem) //! Unpack and interleave low packed DP-FP (SSE2). INST_2x(unpcklpd, kInstUnpcklpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(unpcklpd, kInstUnpcklpd, XmmReg, Mem) //! Packed DP-FP bitwise xor (SSE2). INST_2x(xorpd, kInstXorpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(xorpd, kInstXorpd, XmmReg, Mem) // -------------------------------------------------------------------------- @@ -2879,12 +2885,12 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP add/subtract (SSE3). INST_2x(addsubpd, kInstAddsubpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(addsubpd, kInstAddsubpd, XmmReg, Mem) //! Packed SP-FP add/subtract (SSE3). INST_2x(addsubps, kInstAddsubps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(addsubps, kInstAddsubps, XmmReg, Mem) //! Store integer with truncation (SSE3). @@ -2892,22 +2898,22 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP horizontal add (SSE3). INST_2x(haddpd, kInstHaddpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(haddpd, kInstHaddpd, XmmReg, Mem) //! Packed SP-FP horizontal add (SSE3). INST_2x(haddps, kInstHaddps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(haddps, kInstHaddps, XmmReg, Mem) //! Packed DP-FP horizontal subtract (SSE3). INST_2x(hsubpd, kInstHsubpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(hsubpd, kInstHsubpd, XmmReg, Mem) //! Packed SP-FP horizontal subtract (SSE3). INST_2x(hsubps, kInstHsubps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(hsubps, kInstHsubps, XmmReg, Mem) //! Load 128-bits unaligned (SSE3). @@ -2918,17 +2924,17 @@ struct X86X64Assembler : public BaseAssembler { //! Move one DP-FP and duplicate (SSE3). INST_2x(movddup, kInstMovddup, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movddup, kInstMovddup, XmmReg, Mem) //! Move packed SP-FP high and duplicate (SSE3). INST_2x(movshdup, kInstMovshdup, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movshdup, kInstMovshdup, XmmReg, Mem) //! Move packed SP-FP low and duplicate (SSE3). INST_2x(movsldup, kInstMovsldup, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(movsldup, kInstMovsldup, XmmReg, Mem) //! Monitor wait (SSE3). @@ -2940,162 +2946,162 @@ struct X86X64Assembler : public BaseAssembler { //! Packed BYTE sign (SSSE3). INST_2x(psignb, kInstPsignb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psignb, kInstPsignb, MmReg, Mem) //! Packed BYTE sign (SSSE3). INST_2x(psignb, kInstPsignb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psignb, kInstPsignb, XmmReg, Mem) //! Packed DWORD sign (SSSE3). INST_2x(psignd, kInstPsignd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psignd, kInstPsignd, MmReg, Mem) //! Packed DWORD sign (SSSE3). INST_2x(psignd, kInstPsignd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psignd, kInstPsignd, XmmReg, Mem) //! Packed WORD sign (SSSE3). INST_2x(psignw, kInstPsignw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(psignw, kInstPsignw, MmReg, Mem) //! Packed WORD sign (SSSE3). INST_2x(psignw, kInstPsignw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(psignw, kInstPsignw, XmmReg, Mem) //! Packed DWORD horizontal add (SSSE3). INST_2x(phaddd, kInstPhaddd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(phaddd, kInstPhaddd, MmReg, Mem) //! Packed DWORD horizontal add (SSSE3). INST_2x(phaddd, kInstPhaddd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(phaddd, kInstPhaddd, XmmReg, Mem) //! Packed WORD horizontal add with saturation (SSSE3). INST_2x(phaddsw, kInstPhaddsw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(phaddsw, kInstPhaddsw, MmReg, Mem) //! Packed WORD horizontal add with saturation (SSSE3). INST_2x(phaddsw, kInstPhaddsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(phaddsw, kInstPhaddsw, XmmReg, Mem) //! Packed WORD horizontal add (SSSE3). INST_2x(phaddw, kInstPhaddw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(phaddw, kInstPhaddw, MmReg, Mem) //! Packed WORD horizontal add (SSSE3). INST_2x(phaddw, kInstPhaddw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(phaddw, kInstPhaddw, XmmReg, Mem) //! Packed DWORD horizontal subtract (SSSE3). INST_2x(phsubd, kInstPhsubd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(phsubd, kInstPhsubd, MmReg, Mem) //! Packed DWORD horizontal subtract (SSSE3). INST_2x(phsubd, kInstPhsubd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(phsubd, kInstPhsubd, XmmReg, Mem) //! Packed WORD horizontal subtract with saturation (SSSE3). INST_2x(phsubsw, kInstPhsubsw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(phsubsw, kInstPhsubsw, MmReg, Mem) //! Packed WORD horizontal subtract with saturation (SSSE3). INST_2x(phsubsw, kInstPhsubsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(phsubsw, kInstPhsubsw, XmmReg, Mem) //! Packed WORD horizontal subtract (SSSE3). INST_2x(phsubw, kInstPhsubw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(phsubw, kInstPhsubw, MmReg, Mem) //! Packed WORD horizontal subtract (SSSE3). INST_2x(phsubw, kInstPhsubw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(phsubw, kInstPhsubw, XmmReg, Mem) //! Packed multiply and add signed and unsigned bytes (SSSE3). INST_2x(pmaddubsw, kInstPmaddubsw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pmaddubsw, kInstPmaddubsw, MmReg, Mem) //! Packed multiply and add signed and unsigned bytes (SSSE3). INST_2x(pmaddubsw, kInstPmaddubsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmaddubsw, kInstPmaddubsw, XmmReg, Mem) //! Packed BYTE absolute value (SSSE3). INST_2x(pabsb, kInstPabsb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pabsb, kInstPabsb, MmReg, Mem) //! Packed BYTE absolute value (SSSE3). INST_2x(pabsb, kInstPabsb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pabsb, kInstPabsb, XmmReg, Mem) //! Packed DWORD absolute value (SSSE3). INST_2x(pabsd, kInstPabsd, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pabsd, kInstPabsd, MmReg, Mem) //! Packed DWORD absolute value (SSSE3). INST_2x(pabsd, kInstPabsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pabsd, kInstPabsd, XmmReg, Mem) //! Packed WORD absolute value (SSSE3). INST_2x(pabsw, kInstPabsw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pabsw, kInstPabsw, MmReg, Mem) //! Packed WORD absolute value (SSSE3). INST_2x(pabsw, kInstPabsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pabsw, kInstPabsw, XmmReg, Mem) //! Packed WORD multiply high, round and scale (SSSE3). INST_2x(pmulhrsw, kInstPmulhrsw, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pmulhrsw, kInstPmulhrsw, MmReg, Mem) //! Packed WORD multiply high, round and scale (SSSE3). INST_2x(pmulhrsw, kInstPmulhrsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmulhrsw, kInstPmulhrsw, XmmReg, Mem) //! Packed BYTE shuffle (SSSE3). INST_2x(pshufb, kInstPshufb, MmReg, MmReg) - //! @overload + //! \overload INST_2x(pshufb, kInstPshufb, MmReg, Mem) //! Packed BYTE shuffle (SSSE3). INST_2x(pshufb, kInstPshufb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pshufb, kInstPshufb, XmmReg, Mem) //! Packed align right (SSSE3). INST_3i(palignr, kInstPalignr, MmReg, MmReg, Imm) - //! @overload + //! \overload INST_3i(palignr, kInstPalignr, MmReg, Mem, Imm) //! Packed align right (SSSE3). INST_3i(palignr, kInstPalignr, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(palignr, kInstPalignr, XmmReg, Mem, Imm) // -------------------------------------------------------------------------- @@ -3104,42 +3110,42 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP blend (SSE4.1). INST_3i(blendpd, kInstBlendpd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(blendpd, kInstBlendpd, XmmReg, Mem, Imm) //! Packed SP-FP blend (SSE4.1). INST_3i(blendps, kInstBlendps, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(blendps, kInstBlendps, XmmReg, Mem, Imm) //! Packed DP-FP variable blend (SSE4.1). INST_2x(blendvpd, kInstBlendvpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(blendvpd, kInstBlendvpd, XmmReg, Mem) //! Packed SP-FP variable blend (SSE4.1). INST_2x(blendvps, kInstBlendvps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(blendvps, kInstBlendvps, XmmReg, Mem) //! Packed DP-FP dot product (SSE4.1). INST_3i(dppd, kInstDppd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(dppd, kInstDppd, XmmReg, Mem, Imm) //! Packed SP-FP dot product (SSE4.1). INST_3i(dpps, kInstDpps, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(dpps, kInstDpps, XmmReg, Mem, Imm) //! Extract SP-FP based on selector (SSE4.1). INST_3i(extractps, kInstExtractps, GpReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(extractps, kInstExtractps, Mem, XmmReg, Imm) //! Insert SP-FP based on selector (SSE4.1). INST_3i(insertps, kInstInsertps, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(insertps, kInstInsertps, XmmReg, Mem, Imm) //! Load OWORD aligned using NT hint (SSE4.1). @@ -3147,42 +3153,42 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD sums of absolute difference (SSE4.1). INST_3i(mpsadbw, kInstMpsadbw, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(mpsadbw, kInstMpsadbw, XmmReg, Mem, Imm) //! Pack DWORDs to WORDs with unsigned saturation (SSE4.1). INST_2x(packusdw, kInstPackusdw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(packusdw, kInstPackusdw, XmmReg, Mem) //! Packed BYTE variable blend (SSE4.1). INST_2x(pblendvb, kInstPblendvb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pblendvb, kInstPblendvb, XmmReg, Mem) //! Packed WORD blend (SSE4.1). INST_3i(pblendw, kInstPblendw, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pblendw, kInstPblendw, XmmReg, Mem, Imm) //! Packed QWORD compare for equality (SSE4.1). INST_2x(pcmpeqq, kInstPcmpeqq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pcmpeqq, kInstPcmpeqq, XmmReg, Mem) //! Extract BYTE based on selector (SSE4.1). INST_3i(pextrb, kInstPextrb, GpReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pextrb, kInstPextrb, Mem, XmmReg, Imm) //! Extract DWORD based on selector (SSE4.1). INST_3i(pextrd, kInstPextrd, GpReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pextrd, kInstPextrd, Mem, XmmReg, Imm) //! Extract QWORD based on selector (SSE4.1). INST_3i(pextrq, kInstPextrq, GpReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pextrq, kInstPextrq, Mem, XmmReg, Imm) //! Extract WORD based on selector (SSE4.1). @@ -3190,157 +3196,157 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD horizontal minimum (SSE4.1). INST_2x(phminposuw, kInstPhminposuw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(phminposuw, kInstPhminposuw, XmmReg, Mem) //! Insert BYTE based on selector (SSE4.1). INST_3i(pinsrb, kInstPinsrb, XmmReg, GpReg, Imm) - //! @overload + //! \overload INST_3i(pinsrb, kInstPinsrb, XmmReg, Mem, Imm) //! Insert DWORD based on selector (SSE4.1). INST_3i(pinsrd, kInstPinsrd, XmmReg, GpReg, Imm) - //! @overload + //! \overload INST_3i(pinsrd, kInstPinsrd, XmmReg, Mem, Imm) //! Insert QWORD based on selector (SSE4.1). INST_3i(pinsrq, kInstPinsrq, XmmReg, GpReg, Imm) - //! @overload + //! \overload INST_3i(pinsrq, kInstPinsrq, XmmReg, Mem, Imm) //! Packed BYTE maximum (SSE4.1). INST_2x(pmaxsb, kInstPmaxsb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmaxsb, kInstPmaxsb, XmmReg, Mem) //! Packed DWORD maximum (SSE4.1). INST_2x(pmaxsd, kInstPmaxsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmaxsd, kInstPmaxsd, XmmReg, Mem) //! Packed DWORD unsigned maximum (SSE4.1). INST_2x(pmaxud, kInstPmaxud, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmaxud,kInstPmaxud , XmmReg, Mem) //! Packed WORD unsigned maximum (SSE4.1). INST_2x(pmaxuw, kInstPmaxuw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmaxuw, kInstPmaxuw, XmmReg, Mem) //! Packed BYTE minimum (SSE4.1). INST_2x(pminsb, kInstPminsb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pminsb, kInstPminsb, XmmReg, Mem) //! Packed DWORD minimum (SSE4.1). INST_2x(pminsd, kInstPminsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pminsd, kInstPminsd, XmmReg, Mem) //! Packed WORD unsigned minimum (SSE4.1). INST_2x(pminuw, kInstPminuw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pminuw, kInstPminuw, XmmReg, Mem) //! Packed DWORD unsigned minimum (SSE4.1). INST_2x(pminud, kInstPminud, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pminud, kInstPminud, XmmReg, Mem) //! BYTE to DWORD with sign extend (SSE4.1). INST_2x(pmovsxbd, kInstPmovsxbd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovsxbd, kInstPmovsxbd, XmmReg, Mem) //! Packed BYTE to QWORD with sign extend (SSE4.1). INST_2x(pmovsxbq, kInstPmovsxbq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovsxbq, kInstPmovsxbq, XmmReg, Mem) //! Packed BYTE to WORD with sign extend (SSE4.1). INST_2x(pmovsxbw, kInstPmovsxbw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovsxbw, kInstPmovsxbw, XmmReg, Mem) //! Packed DWORD to QWORD with sign extend (SSE4.1). INST_2x(pmovsxdq, kInstPmovsxdq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovsxdq, kInstPmovsxdq, XmmReg, Mem) //! Packed WORD to DWORD with sign extend (SSE4.1). INST_2x(pmovsxwd, kInstPmovsxwd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovsxwd, kInstPmovsxwd, XmmReg, Mem) //! Packed WORD to QWORD with sign extend (SSE4.1). INST_2x(pmovsxwq, kInstPmovsxwq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovsxwq, kInstPmovsxwq, XmmReg, Mem) //! BYTE to DWORD with zero extend (SSE4.1). INST_2x(pmovzxbd, kInstPmovzxbd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovzxbd, kInstPmovzxbd, XmmReg, Mem) //! Packed BYTE to QWORD with zero extend (SSE4.1). INST_2x(pmovzxbq, kInstPmovzxbq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovzxbq, kInstPmovzxbq, XmmReg, Mem) //! BYTE to WORD with zero extend (SSE4.1). INST_2x(pmovzxbw, kInstPmovzxbw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovzxbw, kInstPmovzxbw, XmmReg, Mem) //! Packed DWORD to QWORD with zero extend (SSE4.1). INST_2x(pmovzxdq, kInstPmovzxdq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovzxdq, kInstPmovzxdq, XmmReg, Mem) //! Packed WORD to DWORD with zero extend (SSE4.1). INST_2x(pmovzxwd, kInstPmovzxwd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovzxwd, kInstPmovzxwd, XmmReg, Mem) //! Packed WORD to QWORD with zero extend (SSE4.1). INST_2x(pmovzxwq, kInstPmovzxwq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmovzxwq, kInstPmovzxwq, XmmReg, Mem) //! Packed DWORD to QWORD multiply (SSE4.1). INST_2x(pmuldq, kInstPmuldq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmuldq, kInstPmuldq, XmmReg, Mem) //! Packed DWORD multiply low (SSE4.1). INST_2x(pmulld, kInstPmulld, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pmulld, kInstPmulld, XmmReg, Mem) //! Logical compare (SSE4.1). INST_2x(ptest, kInstPtest, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(ptest, kInstPtest, XmmReg, Mem) //! Packed DP-FP round (SSE4.1). INST_3i(roundpd, kInstRoundpd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(roundpd, kInstRoundpd, XmmReg, Mem, Imm) //! Packed SP-FP round (SSE4.1). INST_3i(roundps, kInstRoundps, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(roundps, kInstRoundps, XmmReg, Mem, Imm) //! Scalar DP-FP round (SSE4.1). INST_3i(roundsd, kInstRoundsd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(roundsd, kInstRoundsd, XmmReg, Mem, Imm) //! Scalar SP-FP round (SSE4.1). INST_3i(roundss, kInstRoundss, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(roundss, kInstRoundss, XmmReg, Mem, Imm) // -------------------------------------------------------------------------- @@ -3349,27 +3355,27 @@ struct X86X64Assembler : public BaseAssembler { //! Packed compare explicit length strings, return index (SSE4.2). INST_3i(pcmpestri, kInstPcmpestri, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pcmpestri, kInstPcmpestri, XmmReg, Mem, Imm) //! Packed compare explicit length strings, return mask (SSE4.2). INST_3i(pcmpestrm, kInstPcmpestrm, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pcmpestrm, kInstPcmpestrm, XmmReg, Mem, Imm) //! Packed compare implicit length strings, return index (SSE4.2). INST_3i(pcmpistri, kInstPcmpistri, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pcmpistri, kInstPcmpistri, XmmReg, Mem, Imm) //! Packed compare implicit length strings, return mask (SSE4.2). INST_3i(pcmpistrm, kInstPcmpistrm, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pcmpistrm, kInstPcmpistrm, XmmReg, Mem, Imm) //! Packed QWORD compare if greater than (SSE4.2). INST_2x(pcmpgtq, kInstPcmpgtq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(pcmpgtq, kInstPcmpgtq, XmmReg, Mem) // -------------------------------------------------------------------------- @@ -3378,32 +3384,32 @@ struct X86X64Assembler : public BaseAssembler { //! Perform a single round of the AES decryption flow (AESNI). INST_2x(aesdec, kInstAesdec, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(aesdec, kInstAesdec, XmmReg, Mem) //! Perform the last round of the AES decryption flow (AESNI). INST_2x(aesdeclast, kInstAesdeclast, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(aesdeclast, kInstAesdeclast, XmmReg, Mem) //! Perform a single round of the AES encryption flow (AESNI). INST_2x(aesenc, kInstAesenc, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(aesenc, kInstAesenc, XmmReg, Mem) //! Perform the last round of the AES encryption flow (AESNI). INST_2x(aesenclast, kInstAesenclast, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(aesenclast, kInstAesenclast, XmmReg, Mem) //! Perform the InvMixColumns transformation (AESNI). INST_2x(aesimc, kInstAesimc, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(aesimc, kInstAesimc, XmmReg, Mem) //! Assist in expanding the AES cipher key (AESNI). INST_3i(aeskeygenassist, kInstAeskeygenassist, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(aeskeygenassist, kInstAeskeygenassist, XmmReg, Mem, Imm) // -------------------------------------------------------------------------- @@ -3412,7 +3418,7 @@ struct X86X64Assembler : public BaseAssembler { //! Packed QWORD to OWORD carry-less multiply (PCLMULQDQ). INST_3i(pclmulqdq, kInstPclmulqdq, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(pclmulqdq, kInstPclmulqdq, XmmReg, Mem, Imm) // -------------------------------------------------------------------------- @@ -3421,120 +3427,120 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP add (AVX). INST_3x(vaddpd, kInstVaddpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaddpd, kInstVaddpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vaddpd, kInstVaddpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vaddpd, kInstVaddpd, YmmReg, YmmReg, Mem) //! Packed SP-FP add (AVX). INST_3x(vaddps, kInstVaddps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaddps, kInstVaddps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vaddps, kInstVaddps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vaddps, kInstVaddps, YmmReg, YmmReg, Mem) //! Scalar DP-FP add (AVX) INST_3x(vaddsd, kInstVaddsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaddsd, kInstVaddsd, XmmReg, XmmReg, Mem) //! Scalar SP-FP add (AVX) INST_3x(vaddss, kInstVaddss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaddss, kInstVaddss, XmmReg, XmmReg, Mem) //! Packed DP-FP add/subtract (AVX). INST_3x(vaddsubpd, kInstVaddsubpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaddsubpd, kInstVaddsubpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vaddsubpd, kInstVaddsubpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vaddsubpd, kInstVaddsubpd, YmmReg, YmmReg, Mem) //! Packed SP-FP add/subtract (AVX). INST_3x(vaddsubps, kInstVaddsubps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaddsubps, kInstVaddsubps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vaddsubps, kInstVaddsubps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vaddsubps, kInstVaddsubps, YmmReg, YmmReg, Mem) //! Packed DP-FP bitwise and (AVX). INST_3x(vandpd, kInstVandpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vandpd, kInstVandpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vandpd, kInstVandpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vandpd, kInstVandpd, YmmReg, YmmReg, Mem) //! Packed SP-FP bitwise and (AVX). INST_3x(vandps, kInstVandps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vandps, kInstVandps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vandps, kInstVandps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vandps, kInstVandps, YmmReg, YmmReg, Mem) //! Packed DP-FP bitwise and-not (AVX). INST_3x(vandnpd, kInstVandnpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vandnpd, kInstVandnpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vandnpd, kInstVandnpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vandnpd, kInstVandnpd, YmmReg, YmmReg, Mem) //! Packed SP-FP bitwise and-not (AVX). INST_3x(vandnps, kInstVandnps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vandnps, kInstVandnps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vandnps, kInstVandnps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vandnps, kInstVandnps, YmmReg, YmmReg, Mem) //! Packed DP-FP blend (AVX). INST_4i(vblendpd, kInstVblendpd, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vblendpd, kInstVblendpd, XmmReg, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_4i(vblendpd, kInstVblendpd, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vblendpd, kInstVblendpd, YmmReg, YmmReg, Mem, Imm) //! Packed SP-FP blend (AVX). INST_4i(vblendps, kInstVblendps, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vblendps, kInstVblendps, XmmReg, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_4i(vblendps, kInstVblendps, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vblendps, kInstVblendps, YmmReg, YmmReg, Mem, Imm) //! Packed DP-FP variable blend (AVX). INST_4x(vblendvpd, kInstVblendvpd, XmmReg, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_4x(vblendvpd, kInstVblendvpd, XmmReg, XmmReg, Mem, XmmReg) - //! @overload + //! \overload INST_4x(vblendvpd, kInstVblendvpd, YmmReg, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_4x(vblendvpd, kInstVblendvpd, YmmReg, YmmReg, Mem, YmmReg) //! Packed SP-FP variable blend (AVX). INST_4x(vblendvps, kInstVblendvps, XmmReg, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_4x(vblendvps, kInstVblendvps, XmmReg, XmmReg, Mem, XmmReg) - //! @overload + //! \overload INST_4x(vblendvps, kInstVblendvps, YmmReg, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_4x(vblendvps, kInstVblendvps, YmmReg, YmmReg, Mem, YmmReg) //! Broadcast 128-bits of FP data in `o1` to low and high 128-bits in `o0` (AVX). @@ -3548,244 +3554,244 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP compare (AVX). INST_4i(vcmppd, kInstVcmppd, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vcmppd, kInstVcmppd, XmmReg, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_4i(vcmppd, kInstVcmppd, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vcmppd, kInstVcmppd, YmmReg, YmmReg, Mem, Imm) //! Packed SP-FP compare (AVX). INST_4i(vcmpps, kInstVcmpps, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vcmpps, kInstVcmpps, XmmReg, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_4i(vcmpps, kInstVcmpps, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vcmpps, kInstVcmpps, YmmReg, YmmReg, Mem, Imm) //! Scalar DP-FP compare (AVX). INST_4i(vcmpsd, kInstVcmpsd, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vcmpsd, kInstVcmpsd, XmmReg, XmmReg, Mem, Imm) //! Scalar SP-FP compare (AVX). INST_4i(vcmpss, kInstVcmpss, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vcmpss, kInstVcmpss, XmmReg, XmmReg, Mem, Imm) //! Scalar DP-FP ordered compare and set EFLAGS (AVX). INST_2x(vcomisd, kInstVcomisd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcomisd, kInstVcomisd, XmmReg, Mem) //! Scalar SP-FP ordered compare and set EFLAGS (AVX). INST_2x(vcomiss, kInstVcomiss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcomiss, kInstVcomiss, XmmReg, Mem) //! Convert packed QWORDs to packed DP-FP (AVX). INST_2x(vcvtdq2pd, kInstVcvtdq2pd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtdq2pd, kInstVcvtdq2pd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vcvtdq2pd, kInstVcvtdq2pd, YmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtdq2pd, kInstVcvtdq2pd, YmmReg, Mem) //! Convert packed QWORDs to packed SP-FP (AVX). INST_2x(vcvtdq2ps, kInstVcvtdq2ps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtdq2ps, kInstVcvtdq2ps, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vcvtdq2ps, kInstVcvtdq2ps, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vcvtdq2ps, kInstVcvtdq2ps, YmmReg, Mem) //! Convert packed DP-FP to packed QWORDs (AVX). INST_2x(vcvtpd2dq, kInstVcvtpd2dq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtpd2dq, kInstVcvtpd2dq, XmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vcvtpd2dq, kInstVcvtpd2dq, XmmReg, Mem) //! Convert packed DP-FP to packed SP-FP (AVX). INST_2x(vcvtpd2ps, kInstVcvtpd2ps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtpd2ps, kInstVcvtpd2ps, XmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vcvtpd2ps, kInstVcvtpd2ps, XmmReg, Mem) //! Convert packed SP-FP to packed QWORDs (AVX). INST_2x(vcvtps2dq, kInstVcvtps2dq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtps2dq, kInstVcvtps2dq, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vcvtps2dq, kInstVcvtps2dq, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vcvtps2dq, kInstVcvtps2dq, YmmReg, Mem) //! Convert packed SP-FP to packed DP-FP (AVX). INST_2x(vcvtps2pd, kInstVcvtps2pd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtps2pd, kInstVcvtps2pd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vcvtps2pd, kInstVcvtps2pd, YmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtps2pd, kInstVcvtps2pd, YmmReg, Mem) //! Convert scalar DP-FP to DWORD (AVX). INST_2x(vcvtsd2si, kInstVcvtsd2si, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtsd2si, kInstVcvtsd2si, GpReg, Mem) //! Convert scalar DP-FP to scalar SP-FP (AVX). INST_3x(vcvtsd2ss, kInstVcvtsd2ss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vcvtsd2ss, kInstVcvtsd2ss, XmmReg, XmmReg, Mem) //! Convert DWORD integer to scalar DP-FP (AVX). INST_3x(vcvtsi2sd, kInstVcvtsi2sd, XmmReg, XmmReg, GpReg) - //! @overload + //! \overload INST_3x(vcvtsi2sd, kInstVcvtsi2sd, XmmReg, XmmReg, Mem) //! Convert scalar INT32 to SP-FP (AVX). INST_3x(vcvtsi2ss, kInstVcvtsi2ss, XmmReg, XmmReg, GpReg) - //! @overload + //! \overload INST_3x(vcvtsi2ss, kInstVcvtsi2ss, XmmReg, XmmReg, Mem) //! Convert scalar SP-FP to DP-FP (AVX). INST_3x(vcvtss2sd, kInstVcvtss2sd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vcvtss2sd, kInstVcvtss2sd, XmmReg, XmmReg, Mem) //! Convert scalar SP-FP to INT32 (AVX). INST_2x(vcvtss2si, kInstVcvtss2si, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtss2si, kInstVcvtss2si, GpReg, Mem) //! Convert with truncation packed DP-FP to packed QWORDs (AVX). INST_2x(vcvttpd2dq, kInstVcvttpd2dq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvttpd2dq, kInstVcvttpd2dq, XmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vcvttpd2dq, kInstVcvttpd2dq, XmmReg, Mem) //! Convert with truncation packed SP-FP to packed QWORDs (AVX). INST_2x(vcvttps2dq, kInstVcvttps2dq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvttps2dq, kInstVcvttps2dq, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vcvttps2dq, kInstVcvttps2dq, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vcvttps2dq, kInstVcvttps2dq, YmmReg, Mem) //! Convert with truncation scalar DP-FP to DWORD (AVX). INST_2x(vcvttsd2si, kInstVcvttsd2si, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvttsd2si, kInstVcvttsd2si, GpReg, Mem) //! Convert with truncation scalar SP-FP to INT32 (AVX). INST_2x(vcvttss2si, kInstVcvttss2si, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvttss2si, kInstVcvttss2si, GpReg, Mem) //! Packed DP-FP divide (AVX). INST_3x(vdivpd, kInstVdivpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vdivpd, kInstVdivpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vdivpd, kInstVdivpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vdivpd, kInstVdivpd, YmmReg, YmmReg, Mem) //! Packed SP-FP divide (AVX). INST_3x(vdivps, kInstVdivps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vdivps, kInstVdivps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vdivps, kInstVdivps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vdivps, kInstVdivps, YmmReg, YmmReg, Mem) //! Scalar DP-FP divide (AVX). INST_3x(vdivsd, kInstVdivsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vdivsd, kInstVdivsd, XmmReg, XmmReg, Mem) //! Scalar SP-FP divide (AVX). INST_3x(vdivss, kInstVdivss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vdivss, kInstVdivss, XmmReg, XmmReg, Mem) //! Packed DP-FP dot product (AVX). INST_4i(vdppd, kInstVdppd, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vdppd, kInstVdppd, XmmReg, XmmReg, Mem, Imm) //! Packed SP-FP dot product (AVX). INST_4i(vdpps, kInstVdpps, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vdpps, kInstVdpps, XmmReg, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_4i(vdpps, kInstVdpps, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vdpps, kInstVdpps, YmmReg, YmmReg, Mem, Imm) //! Extract 128 bits of packed FP data from `o1` and store results in `o0` (AVX). INST_3i(vextractf128, kInstVextractf128, XmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_3i(vextractf128, kInstVextractf128, Mem, YmmReg, Imm) //! Extract SP-FP based on selector (AVX). INST_3i(vextractps, kInstVextractps, GpReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vextractps, kInstVextractps, Mem, XmmReg, Imm) //! Packed DP-FP horizontal add (AVX). INST_3x(vhaddpd, kInstVhaddpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vhaddpd, kInstVhaddpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vhaddpd, kInstVhaddpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vhaddpd, kInstVhaddpd, YmmReg, YmmReg, Mem) //! Packed SP-FP horizontal add (AVX). INST_3x(vhaddps, kInstVhaddps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vhaddps, kInstVhaddps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vhaddps, kInstVhaddps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vhaddps, kInstVhaddps, YmmReg, YmmReg, Mem) //! Packed DP-FP horizontal subtract (AVX). INST_3x(vhsubpd, kInstVhsubpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vhsubpd, kInstVhsubpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vhsubpd, kInstVhsubpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vhsubpd, kInstVhsubpd, YmmReg, YmmReg, Mem) //! Packed SP-FP horizontal subtract (AVX). INST_3x(vhsubps, kInstVhsubps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vhsubps, kInstVhsubps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vhsubps, kInstVhsubps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vhsubps, kInstVhsubps, YmmReg, YmmReg, Mem) //! Insert 128-bit of packed FP data based on selector (AVX). INST_4i(vinsertf128, kInstVinsertf128, YmmReg, YmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vinsertf128, kInstVinsertf128, YmmReg, YmmReg, Mem, Imm) //! Insert SP-FP based on selector (AVX). INST_4i(vinsertps, kInstVinsertps, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vinsertps, kInstVinsertps, XmmReg, XmmReg, Mem, Imm) //! Load 128-bits unaligned (AVX). @@ -3801,153 +3807,153 @@ struct X86X64Assembler : public BaseAssembler { //! Conditionally load packed DP-FP from `o2` using mask in `o1 and store in `o0` (AVX). INST_3x(vmaskmovpd, kInstVmaskmovpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vmaskmovpd, kInstVmaskmovpd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vmaskmovpd, kInstVmaskmovpd, Mem, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmaskmovpd, kInstVmaskmovpd, Mem, YmmReg, YmmReg) //! Conditionally load packed SP-FP from `o2` using mask in `o1 and store in `o0` (AVX). INST_3x(vmaskmovps, kInstVmaskmovps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vmaskmovps, kInstVmaskmovps, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vmaskmovps, kInstVmaskmovps, Mem, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmaskmovps, kInstVmaskmovps, Mem, YmmReg, YmmReg) //! Packed DP-FP maximum (AVX). INST_3x(vmaxpd, kInstVmaxpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmaxpd, kInstVmaxpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vmaxpd, kInstVmaxpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vmaxpd, kInstVmaxpd, YmmReg, YmmReg, Mem) //! Packed SP-FP maximum (AVX). INST_3x(vmaxps, kInstVmaxps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmaxps, kInstVmaxps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vmaxps, kInstVmaxps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vmaxps, kInstVmaxps, YmmReg, YmmReg, Mem) //! Scalar DP-FP maximum (AVX). INST_3x(vmaxsd, kInstVmaxsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmaxsd, kInstVmaxsd, XmmReg, XmmReg, Mem) //! Scalar SP-FP maximum (AVX). INST_3x(vmaxss, kInstVmaxss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmaxss, kInstVmaxss, XmmReg, XmmReg, Mem) //! Packed DP-FP minimum (AVX). INST_3x(vminpd, kInstVminpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vminpd, kInstVminpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vminpd, kInstVminpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vminpd, kInstVminpd, YmmReg, YmmReg, Mem) //! Packed SP-FP minimum (AVX). INST_3x(vminps, kInstVminps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vminps, kInstVminps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vminps, kInstVminps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vminps, kInstVminps, YmmReg, YmmReg, Mem) //! Scalar DP-FP minimum (AVX). INST_3x(vminsd, kInstVminsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vminsd, kInstVminsd, XmmReg, XmmReg, Mem) //! Scalar SP-FP minimum (AVX). INST_3x(vminss, kInstVminss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vminss, kInstVminss, XmmReg, XmmReg, Mem) //! Move 128-bits of aligned packed DP-FP (AVX). INST_2x(vmovapd, kInstVmovapd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovapd, kInstVmovapd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovapd, kInstVmovapd, Mem, XmmReg) //! Move 256-bits of aligned packed DP-FP (AVX). INST_2x(vmovapd, kInstVmovapd, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vmovapd, kInstVmovapd, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovapd, kInstVmovapd, Mem, YmmReg) //! Move 128-bits of aligned packed SP-FP (AVX). INST_2x(vmovaps, kInstVmovaps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovaps, kInstVmovaps, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovaps, kInstVmovaps, Mem, XmmReg) //! Move 256-bits of aligned packed SP-FP (AVX). INST_2x(vmovaps, kInstVmovaps, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vmovaps, kInstVmovaps, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovaps, kInstVmovaps, Mem, YmmReg) //! Move DWORD (AVX). INST_2x(vmovd, kInstVmovd, XmmReg, GpReg) - //! @overload + //! \overload INST_2x(vmovd, kInstVmovd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovd, kInstVmovd, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovd, kInstVmovd, Mem, XmmReg) //! Move QWORD (AVX). INST_2x(vmovq, kInstVmovq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovq, kInstVmovq, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovq, kInstVmovq, Mem, XmmReg) //! Move one DP-FP and duplicate (AVX). INST_2x(vmovddup, kInstVmovddup, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovddup, kInstVmovddup, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovddup, kInstVmovddup, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vmovddup, kInstVmovddup, YmmReg, Mem) //! Move 128-bits aligned (AVX). INST_2x(vmovdqa, kInstVmovdqa, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovdqa, kInstVmovdqa, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovdqa, kInstVmovdqa, Mem, XmmReg) //! Move 256-bits aligned (AVX). INST_2x(vmovdqa, kInstVmovdqa, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vmovdqa, kInstVmovdqa, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovdqa, kInstVmovdqa, Mem, YmmReg) //! Move 128-bits unaligned (AVX). INST_2x(vmovdqu, kInstVmovdqu, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovdqu, kInstVmovdqu, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovdqu, kInstVmovdqu, Mem, XmmReg) //! Move 256-bits unaligned (AVX). INST_2x(vmovdqu, kInstVmovdqu, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vmovdqu, kInstVmovdqu, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovdqu, kInstVmovdqu, Mem, YmmReg) //! High to low packed SP-FP (AVX). @@ -3955,12 +3961,12 @@ struct X86X64Assembler : public BaseAssembler { //! Move high packed DP-FP (AVX). INST_3x(vmovhpd, kInstVmovhpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovhpd, kInstVmovhpd, Mem, XmmReg) //! Move high packed SP-FP (AVX). INST_3x(vmovhps, kInstVmovhps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovhps, kInstVmovhps, Mem, XmmReg) //! Move low to high packed SP-FP (AVX). @@ -3968,22 +3974,22 @@ struct X86X64Assembler : public BaseAssembler { //! Move low packed DP-FP (AVX). INST_3x(vmovlpd, kInstVmovlpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovlpd, kInstVmovlpd, Mem, XmmReg) //! Move low packed SP-FP (AVX). INST_3x(vmovlps, kInstVmovlps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovlps, kInstVmovlps, Mem, XmmReg) //! Extract packed DP-FP sign mask (AVX). INST_2x(vmovmskpd, kInstVmovmskpd, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovmskpd, kInstVmovmskpd, GpReg, YmmReg) //! Extract packed SP-FP sign mask (AVX). INST_2x(vmovmskps, kInstVmovmskps, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovmskps, kInstVmovmskps, GpReg, YmmReg) //! Store 128-bits using NT hint (AVX). @@ -4006,455 +4012,455 @@ struct X86X64Assembler : public BaseAssembler { //! Move scalar DP-FP (AVX). INST_3x(vmovsd, kInstVmovsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovsd, kInstVmovsd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovsd, kInstVmovsd, Mem, XmmReg) //! Move packed SP-FP high and duplicate (AVX). INST_2x(vmovshdup, kInstVmovshdup, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovshdup, kInstVmovshdup, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovshdup, kInstVmovshdup, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vmovshdup, kInstVmovshdup, YmmReg, Mem) //! Move packed SP-FP low and duplicate (AVX). INST_2x(vmovsldup, kInstVmovsldup, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovsldup, kInstVmovsldup, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovsldup, kInstVmovsldup, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vmovsldup, kInstVmovsldup, YmmReg, Mem) //! Move scalar SP-FP (AVX). INST_3x(vmovss, kInstVmovss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovss, kInstVmovss, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovss, kInstVmovss, Mem, XmmReg) //! Move 128-bits of unaligned packed DP-FP (AVX). INST_2x(vmovupd, kInstVmovupd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovupd, kInstVmovupd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovupd, kInstVmovupd, Mem, XmmReg) //! Move 256-bits of unaligned packed DP-FP (AVX). INST_2x(vmovupd, kInstVmovupd, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vmovupd, kInstVmovupd, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovupd, kInstVmovupd, Mem, YmmReg) //! Move 128-bits of unaligned packed SP-FP (AVX). INST_2x(vmovups, kInstVmovups, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vmovups, kInstVmovups, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovups, kInstVmovups, Mem, XmmReg) //! Move 256-bits of unaligned packed SP-FP (AVX). INST_2x(vmovups, kInstVmovups, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vmovups, kInstVmovups, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vmovups, kInstVmovups, Mem, YmmReg) //! Packed WORD sums of absolute difference (AVX). INST_4i(vmpsadbw, kInstVmpsadbw, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vmpsadbw, kInstVmpsadbw, XmmReg, XmmReg, Mem, Imm) //! Packed DP-FP multiply (AVX). INST_3x(vmulpd, kInstVmulpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmulpd, kInstVmulpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vmulpd, kInstVmulpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vmulpd, kInstVmulpd, YmmReg, YmmReg, Mem) //! Packed SP-FP multiply (AVX). INST_3x(vmulps, kInstVmulps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmulps, kInstVmulps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vmulps, kInstVmulps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vmulps, kInstVmulps, YmmReg, YmmReg, Mem) //! Packed SP-FP multiply (AVX). INST_3x(vmulsd, kInstVmulsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmulsd, kInstVmulsd, XmmReg, XmmReg, Mem) //! Scalar SP-FP multiply (AVX). INST_3x(vmulss, kInstVmulss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vmulss, kInstVmulss, XmmReg, XmmReg, Mem) //! Packed DP-FP bitwise or (AVX). INST_3x(vorpd, kInstVorpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vorpd, kInstVorpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vorpd, kInstVorpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vorpd, kInstVorpd, YmmReg, YmmReg, Mem) //! Packed SP-FP bitwise or (AVX). INST_3x(vorps, kInstVorps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vorps, kInstVorps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vorps, kInstVorps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vorps, kInstVorps, YmmReg, YmmReg, Mem) //! Packed BYTE absolute value (AVX). INST_2x(vpabsb, kInstVpabsb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpabsb, kInstVpabsb, XmmReg, Mem) //! Packed DWORD absolute value (AVX). INST_2x(vpabsd, kInstVpabsd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpabsd, kInstVpabsd, XmmReg, Mem) //! Packed WORD absolute value (AVX). INST_2x(vpabsw, kInstVpabsw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpabsw, kInstVpabsw, XmmReg, Mem) //! Pack DWORDs to WORDs with signed saturation (AVX). INST_3x(vpackssdw, kInstVpackssdw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpackssdw, kInstVpackssdw, XmmReg, XmmReg, Mem) //! Pack WORDs to BYTEs with signed saturation (AVX). INST_3x(vpacksswb, kInstVpacksswb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpacksswb, kInstVpacksswb, XmmReg, XmmReg, Mem) //! Pack DWORDs to WORDs with unsigned saturation (AVX). INST_3x(vpackusdw, kInstVpackusdw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpackusdw, kInstVpackusdw, XmmReg, XmmReg, Mem) //! Pack WORDs to BYTEs with unsigned saturation (AVX). INST_3x(vpackuswb, kInstVpackuswb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpackuswb, kInstVpackuswb, XmmReg, XmmReg, Mem) //! Packed BYTE add (AVX). INST_3x(vpaddb, kInstVpaddb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpaddb, kInstVpaddb, XmmReg, XmmReg, Mem) //! Packed DWORD add (AVX). INST_3x(vpaddd, kInstVpaddd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpaddd, kInstVpaddd, XmmReg, XmmReg, Mem) //! Packed QWORD add (AVX). INST_3x(vpaddq, kInstVpaddq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpaddq, kInstVpaddq, XmmReg, XmmReg, Mem) //! Packed WORD add (AVX). INST_3x(vpaddw, kInstVpaddw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpaddw, kInstVpaddw, XmmReg, XmmReg, Mem) //! Packed BYTE add with saturation (AVX). INST_3x(vpaddsb, kInstVpaddsb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpaddsb, kInstVpaddsb, XmmReg, XmmReg, Mem) //! Packed WORD add with saturation (AVX). INST_3x(vpaddsw, kInstVpaddsw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpaddsw, kInstVpaddsw, XmmReg, XmmReg, Mem) //! Packed BYTE add with unsigned saturation (AVX). INST_3x(vpaddusb, kInstVpaddusb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpaddusb, kInstVpaddusb, XmmReg, XmmReg, Mem) //! Packed WORD add with unsigned saturation (AVX). INST_3x(vpaddusw, kInstVpaddusw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpaddusw, kInstVpaddusw, XmmReg, XmmReg, Mem) //! Packed align right (AVX). INST_4i(vpalignr, kInstVpalignr, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vpalignr, kInstVpalignr, XmmReg, XmmReg, Mem, Imm) //! Packed bitwise and (AVX). INST_3x(vpand, kInstVpand, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpand, kInstVpand, XmmReg, XmmReg, Mem) //! Packed bitwise and-not (AVX). INST_3x(vpandn, kInstVpandn, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpandn, kInstVpandn, XmmReg, XmmReg, Mem) //! Packed BYTE average (AVX). INST_3x(vpavgb, kInstVpavgb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpavgb, kInstVpavgb, XmmReg, XmmReg, Mem) //! Packed WORD average (AVX). INST_3x(vpavgw, kInstVpavgw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpavgw, kInstVpavgw, XmmReg, XmmReg, Mem) //! Packed BYTE variable blend (AVX). INST_4x(vpblendvb, kInstVpblendvb, XmmReg, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_4x(vpblendvb, kInstVpblendvb, XmmReg, XmmReg, Mem, XmmReg) //! Packed WORD blend (AVX). INST_4i(vpblendw, kInstVpblendw, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vpblendw, kInstVpblendw, XmmReg, XmmReg, Mem, Imm) //! Packed BYTEs compare for equality (AVX). INST_3x(vpcmpeqb, kInstVpcmpeqb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpcmpeqb, kInstVpcmpeqb, XmmReg, XmmReg, Mem) //! Packed DWORDs compare for equality (AVX). INST_3x(vpcmpeqd, kInstVpcmpeqd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpcmpeqd, kInstVpcmpeqd, XmmReg, XmmReg, Mem) //! Packed QWORDs compare for equality (AVX). INST_3x(vpcmpeqq, kInstVpcmpeqq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpcmpeqq, kInstVpcmpeqq, XmmReg, XmmReg, Mem) //! Packed WORDs compare for equality (AVX). INST_3x(vpcmpeqw, kInstVpcmpeqw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpcmpeqw, kInstVpcmpeqw, XmmReg, XmmReg, Mem) //! Packed BYTEs compare if greater than (AVX). INST_3x(vpcmpgtb, kInstVpcmpgtb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpcmpgtb, kInstVpcmpgtb, XmmReg, XmmReg, Mem) //! Packed DWORDs compare if greater than (AVX). INST_3x(vpcmpgtd, kInstVpcmpgtd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpcmpgtd, kInstVpcmpgtd, XmmReg, XmmReg, Mem) //! Packed QWORDs compare if greater than (AVX). INST_3x(vpcmpgtq, kInstVpcmpgtq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpcmpgtq, kInstVpcmpgtq, XmmReg, XmmReg, Mem) //! Packed WORDs compare if greater than (AVX). INST_3x(vpcmpgtw, kInstVpcmpgtw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpcmpgtw, kInstVpcmpgtw, XmmReg, XmmReg, Mem) //! Packed compare explicit length strings, return index (AVX). INST_3i(vpcmpestri, kInstVpcmpestri, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpcmpestri, kInstVpcmpestri, XmmReg, Mem, Imm) //! Packed compare explicit length strings, return mask (AVX). INST_3i(vpcmpestrm, kInstVpcmpestrm, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpcmpestrm, kInstVpcmpestrm, XmmReg, Mem, Imm) //! Packed compare implicit length strings, return index (AVX). INST_3i(vpcmpistri, kInstVpcmpistri, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpcmpistri, kInstVpcmpistri, XmmReg, Mem, Imm) //! Packed compare implicit length strings, return mask (AVX). INST_3i(vpcmpistrm, kInstVpcmpistrm, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpcmpistrm, kInstVpcmpistrm, XmmReg, Mem, Imm) //! Packed DP-FP permute (AVX). INST_3x(vpermilpd, kInstVpermilpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpermilpd, kInstVpermilpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vpermilpd, kInstVpermilpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpermilpd, kInstVpermilpd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3i(vpermilpd, kInstVpermilpd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpermilpd, kInstVpermilpd, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_3i(vpermilpd, kInstVpermilpd, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_3i(vpermilpd, kInstVpermilpd, YmmReg, Mem, Imm) //! Packed SP-FP permute (AVX). INST_3x(vpermilps, kInstVpermilps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpermilps, kInstVpermilps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vpermilps, kInstVpermilps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpermilps, kInstVpermilps, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3i(vpermilps, kInstVpermilps, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpermilps, kInstVpermilps, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_3i(vpermilps, kInstVpermilps, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_3i(vpermilps, kInstVpermilps, YmmReg, Mem, Imm) //! Packed 128-bit FP permute (AVX). INST_4i(vperm2f128, kInstVperm2f128, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vperm2f128, kInstVperm2f128, YmmReg, YmmReg, Mem, Imm) //! Extract BYTE (AVX). INST_3i(vpextrb, kInstVpextrb, GpReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpextrb, kInstVpextrb, Mem, XmmReg, Imm) //! Extract DWORD (AVX). INST_3i(vpextrd, kInstVpextrd, GpReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpextrd, kInstVpextrd, Mem, XmmReg, Imm) //! Extract WORD (AVX). INST_3i(vpextrw, kInstVpextrw, GpReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpextrw, kInstVpextrw, Mem, XmmReg, Imm) //! Packed DWORD horizontal add (AVX). INST_3x(vphaddd, kInstVphaddd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vphaddd, kInstVphaddd, XmmReg, XmmReg, Mem) //! Packed WORD horizontal add with saturation (AVX). INST_3x(vphaddsw, kInstVphaddsw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vphaddsw, kInstVphaddsw, XmmReg, XmmReg, Mem) //! Packed WORD horizontal add (AVX). INST_3x(vphaddw, kInstVphaddw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vphaddw, kInstVphaddw, XmmReg, XmmReg, Mem) //! Packed WORD horizontal minimum (AVX). INST_2x(vphminposuw, kInstVphminposuw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vphminposuw, kInstVphminposuw, XmmReg, Mem) //! Packed DWORD horizontal subtract (AVX). INST_3x(vphsubd, kInstVphsubd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vphsubd, kInstVphsubd, XmmReg, XmmReg, Mem) //! Packed WORD horizontal subtract with saturation (AVX). INST_3x(vphsubsw, kInstVphsubsw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vphsubsw, kInstVphsubsw, XmmReg, XmmReg, Mem) //! Packed WORD horizontal subtract (AVX). INST_3x(vphsubw, kInstVphsubw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vphsubw, kInstVphsubw, XmmReg, XmmReg, Mem) //! Insert BYTE based on selector (AVX). INST_4i(vpinsrb, kInstVpinsrb, XmmReg, XmmReg, GpReg, Imm) - //! @overload + //! \overload INST_4i(vpinsrb, kInstVpinsrb, XmmReg, XmmReg, Mem, Imm) //! Insert DWORD based on selector (AVX). INST_4i(vpinsrd, kInstVpinsrd, XmmReg, XmmReg, GpReg, Imm) - //! @overload + //! \overload INST_4i(vpinsrd, kInstVpinsrd, XmmReg, XmmReg, Mem, Imm) //! Insert WORD based on selector (AVX). INST_4i(vpinsrw, kInstVpinsrw, XmmReg, XmmReg, GpReg, Imm) - //! @overload + //! \overload INST_4i(vpinsrw, kInstVpinsrw, XmmReg, XmmReg, Mem, Imm) //! Packed multiply and add signed and unsigned bytes (AVX). INST_3x(vpmaddubsw, kInstVpmaddubsw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmaddubsw, kInstVpmaddubsw, XmmReg, XmmReg, Mem) //! Packed WORD multiply and add to packed DWORD (AVX). INST_3x(vpmaddwd, kInstVpmaddwd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmaddwd, kInstVpmaddwd, XmmReg, XmmReg, Mem) //! Packed BYTE maximum (AVX). INST_3x(vpmaxsb, kInstVpmaxsb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmaxsb, kInstVpmaxsb, XmmReg, XmmReg, Mem) //! Packed DWORD maximum (AVX). INST_3x(vpmaxsd, kInstVpmaxsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmaxsd, kInstVpmaxsd, XmmReg, XmmReg, Mem) //! Packed WORD maximum (AVX). INST_3x(vpmaxsw, kInstVpmaxsw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmaxsw, kInstVpmaxsw, XmmReg, XmmReg, Mem) //! Packed BYTE unsigned maximum (AVX). INST_3x(vpmaxub, kInstVpmaxub, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmaxub, kInstVpmaxub, XmmReg, XmmReg, Mem) //! Packed DWORD unsigned maximum (AVX). INST_3x(vpmaxud, kInstVpmaxud, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmaxud, kInstVpmaxud, XmmReg, XmmReg, Mem) //! Packed WORD unsigned maximum (AVX). INST_3x(vpmaxuw, kInstVpmaxuw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmaxuw, kInstVpmaxuw, XmmReg, XmmReg, Mem) //! Packed BYTE minimum (AVX). INST_3x(vpminsb, kInstVpminsb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpminsb, kInstVpminsb, XmmReg, XmmReg, Mem) //! Packed DWORD minimum (AVX). INST_3x(vpminsd, kInstVpminsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpminsd, kInstVpminsd, XmmReg, XmmReg, Mem) //! Packed WORD minimum (AVX). INST_3x(vpminsw, kInstVpminsw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpminsw, kInstVpminsw, XmmReg, XmmReg, Mem) //! Packed BYTE unsigned minimum (AVX). INST_3x(vpminub, kInstVpminub, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpminub, kInstVpminub, XmmReg, XmmReg, Mem) //! Packed DWORD unsigned minimum (AVX). INST_3x(vpminud, kInstVpminud, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpminud, kInstVpminud, XmmReg, XmmReg, Mem) //! Packed WORD unsigned minimum (AVX). INST_3x(vpminuw, kInstVpminuw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpminuw, kInstVpminuw, XmmReg, XmmReg, Mem) //! Move Byte mask to integer (AVX). @@ -4462,149 +4468,149 @@ struct X86X64Assembler : public BaseAssembler { //! BYTE to DWORD with sign extend (AVX). INST_2x(vpmovsxbd, kInstVpmovsxbd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovsxbd, kInstVpmovsxbd, XmmReg, Mem) //! Packed BYTE to QWORD with sign extend (AVX). INST_2x(vpmovsxbq, kInstVpmovsxbq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovsxbq, kInstVpmovsxbq, XmmReg, Mem) //! Packed BYTE to WORD with sign extend (AVX). INST_2x(vpmovsxbw, kInstVpmovsxbw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovsxbw, kInstVpmovsxbw, XmmReg, Mem) //! Packed DWORD to QWORD with sign extend (AVX). INST_2x(vpmovsxdq, kInstVpmovsxdq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovsxdq, kInstVpmovsxdq, XmmReg, Mem) //! Packed WORD to DWORD with sign extend (AVX). INST_2x(vpmovsxwd, kInstVpmovsxwd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovsxwd, kInstVpmovsxwd, XmmReg, Mem) //! Packed WORD to QWORD with sign extend (AVX). INST_2x(vpmovsxwq, kInstVpmovsxwq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovsxwq, kInstVpmovsxwq, XmmReg, Mem) //! BYTE to DWORD with zero extend (AVX). INST_2x(vpmovzxbd, kInstVpmovzxbd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovzxbd, kInstVpmovzxbd, XmmReg, Mem) //! Packed BYTE to QWORD with zero extend (AVX). INST_2x(vpmovzxbq, kInstVpmovzxbq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovzxbq, kInstVpmovzxbq, XmmReg, Mem) //! BYTE to WORD with zero extend (AVX). INST_2x(vpmovzxbw, kInstVpmovzxbw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovzxbw, kInstVpmovzxbw, XmmReg, Mem) //! Packed DWORD to QWORD with zero extend (AVX). INST_2x(vpmovzxdq, kInstVpmovzxdq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovzxdq, kInstVpmovzxdq, XmmReg, Mem) //! Packed WORD to DWORD with zero extend (AVX). INST_2x(vpmovzxwd, kInstVpmovzxwd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovzxwd, kInstVpmovzxwd, XmmReg, Mem) //! Packed WORD to QWORD with zero extend (AVX). INST_2x(vpmovzxwq, kInstVpmovzxwq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpmovzxwq, kInstVpmovzxwq, XmmReg, Mem) //! Packed DWORD to QWORD multiply (AVX). INST_3x(vpmuldq, kInstVpmuldq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmuldq, kInstVpmuldq, XmmReg, XmmReg, Mem) //! Packed WORD multiply high, round and scale (AVX). INST_3x(vpmulhrsw, kInstVpmulhrsw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmulhrsw, kInstVpmulhrsw, XmmReg, XmmReg, Mem) //! Packed WORD unsigned multiply high (AVX). INST_3x(vpmulhuw, kInstVpmulhuw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmulhuw, kInstVpmulhuw, XmmReg, XmmReg, Mem) //! Packed WORD multiply high (AVX). INST_3x(vpmulhw, kInstVpmulhw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmulhw, kInstVpmulhw, XmmReg, XmmReg, Mem) //! Packed DWORD multiply low (AVX). INST_3x(vpmulld, kInstVpmulld, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmulld, kInstVpmulld, XmmReg, XmmReg, Mem) //! Packed WORDs multiply low (AVX). INST_3x(vpmullw, kInstVpmullw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmullw, kInstVpmullw, XmmReg, XmmReg, Mem) //! Packed DWORD multiply to QWORD (AVX). INST_3x(vpmuludq, kInstVpmuludq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpmuludq, kInstVpmuludq, XmmReg, XmmReg, Mem) //! Packed bitwise or (AVX). INST_3x(vpor, kInstVpor, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpor, kInstVpor, XmmReg, XmmReg, Mem) //! Packed WORD sum of absolute differences (AVX). INST_3x(vpsadbw, kInstVpsadbw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsadbw, kInstVpsadbw, XmmReg, XmmReg, Mem) //! Packed BYTE shuffle (AVX). INST_3x(vpshufb, kInstVpshufb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpshufb, kInstVpshufb, XmmReg, XmmReg, Mem) //! Packed DWORD shuffle (AVX). INST_3i(vpshufd, kInstVpshufd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpshufd, kInstVpshufd, XmmReg, Mem, Imm) //! Packed WORD shuffle high (AVX). INST_3i(vpshufhw, kInstVpshufhw, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpshufhw, kInstVpshufhw, XmmReg, Mem, Imm) //! Packed WORD shuffle low (AVX). INST_3i(vpshuflw, kInstVpshuflw, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vpshuflw, kInstVpshuflw, XmmReg, Mem, Imm) //! Packed BYTE sign (AVX). INST_3x(vpsignb, kInstVpsignb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsignb, kInstVpsignb, XmmReg, XmmReg, Mem) //! Packed DWORD sign (AVX). INST_3x(vpsignd, kInstVpsignd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsignd, kInstVpsignd, XmmReg, XmmReg, Mem) //! Packed WORD sign (AVX). INST_3x(vpsignw, kInstVpsignw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsignw, kInstVpsignw, XmmReg, XmmReg, Mem) //! Packed DWORD shift left logical (AVX). INST_3x(vpslld, kInstVpslld, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpslld, kInstVpslld, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3i(vpslld, kInstVpslld, XmmReg, XmmReg, Imm) //! Packed OWORD shift left logical (AVX). @@ -4612,37 +4618,37 @@ struct X86X64Assembler : public BaseAssembler { //! Packed QWORD shift left logical (AVX). INST_3x(vpsllq, kInstVpsllq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsllq, kInstVpsllq, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3i(vpsllq, kInstVpsllq, XmmReg, XmmReg, Imm) //! Packed WORD shift left logical (AVX). INST_3x(vpsllw, kInstVpsllw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsllw, kInstVpsllw, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3i(vpsllw, kInstVpsllw, XmmReg, XmmReg, Imm) //! Packed DWORD shift right arithmetic (AVX). INST_3x(vpsrad, kInstVpsrad, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsrad, kInstVpsrad, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3i(vpsrad, kInstVpsrad, XmmReg, XmmReg, Imm) //! Packed WORD shift right arithmetic (AVX). INST_3x(vpsraw, kInstVpsraw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsraw, kInstVpsraw, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3i(vpsraw, kInstVpsraw, XmmReg, XmmReg, Imm) //! Packed DWORD shift right logical (AVX). INST_3x(vpsrld, kInstVpsrld, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsrld, kInstVpsrld, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3i(vpsrld, kInstVpsrld, XmmReg, XmmReg, Imm) //! Scalar OWORD shift right logical (AVX). @@ -4650,212 +4656,212 @@ struct X86X64Assembler : public BaseAssembler { //! Packed QWORD shift right logical (AVX). INST_3x(vpsrlq, kInstVpsrlq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsrlq, kInstVpsrlq, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3i(vpsrlq, kInstVpsrlq, XmmReg, XmmReg, Imm) //! Packed WORD shift right logical (AVX). INST_3x(vpsrlw, kInstVpsrlw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsrlw, kInstVpsrlw, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3i(vpsrlw, kInstVpsrlw, XmmReg, XmmReg, Imm) //! Packed BYTE subtract (AVX). INST_3x(vpsubb, kInstVpsubb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsubb, kInstVpsubb, XmmReg, XmmReg, Mem) //! Packed DWORD subtract (AVX). INST_3x(vpsubd, kInstVpsubd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsubd, kInstVpsubd, XmmReg, XmmReg, Mem) //! Packed QWORD subtract (AVX). INST_3x(vpsubq, kInstVpsubq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsubq, kInstVpsubq, XmmReg, XmmReg, Mem) //! Packed WORD subtract (AVX). INST_3x(vpsubw, kInstVpsubw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsubw, kInstVpsubw, XmmReg, XmmReg, Mem) //! Packed BYTE subtract with saturation (AVX). INST_3x(vpsubsb, kInstVpsubsb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsubsb, kInstVpsubsb, XmmReg, XmmReg, Mem) //! Packed WORD subtract with saturation (AVX). INST_3x(vpsubsw, kInstVpsubsw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsubsw, kInstVpsubsw, XmmReg, XmmReg, Mem) //! Packed BYTE subtract with unsigned saturation (AVX). INST_3x(vpsubusb, kInstVpsubusb, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsubusb, kInstVpsubusb, XmmReg, XmmReg, Mem) //! Packed WORD subtract with unsigned saturation (AVX). INST_3x(vpsubusw, kInstVpsubusw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpsubusw, kInstVpsubusw, XmmReg, XmmReg, Mem) //! Logical compare (AVX). INST_2x(vptest, kInstVptest, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vptest, kInstVptest, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vptest, kInstVptest, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vptest, kInstVptest, YmmReg, Mem) //! Unpack high packed BYTEs to WORDs (AVX). INST_3x(vpunpckhbw, kInstVpunpckhbw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpunpckhbw, kInstVpunpckhbw, XmmReg, XmmReg, Mem) //! Unpack high packed DWORDs to QWORDs (AVX). INST_3x(vpunpckhdq, kInstVpunpckhdq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpunpckhdq, kInstVpunpckhdq, XmmReg, XmmReg, Mem) //! Unpack high packed QWORDs to OWORD (AVX). INST_3x(vpunpckhqdq, kInstVpunpckhqdq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpunpckhqdq, kInstVpunpckhqdq, XmmReg, XmmReg, Mem) //! Unpack high packed WORDs to DWORDs (AVX). INST_3x(vpunpckhwd, kInstVpunpckhwd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpunpckhwd, kInstVpunpckhwd, XmmReg, XmmReg, Mem) //! Unpack low packed BYTEs to WORDs (AVX). INST_3x(vpunpcklbw, kInstVpunpcklbw, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpunpcklbw, kInstVpunpcklbw, XmmReg, XmmReg, Mem) //! Unpack low packed DWORDs to QWORDs (AVX). INST_3x(vpunpckldq, kInstVpunpckldq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpunpckldq, kInstVpunpckldq, XmmReg, XmmReg, Mem) //! Unpack low packed QWORDs to OWORD (AVX). INST_3x(vpunpcklqdq, kInstVpunpcklqdq, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpunpcklqdq, kInstVpunpcklqdq, XmmReg, XmmReg, Mem) //! Unpack low packed WORDs to DWORDs (AVX). INST_3x(vpunpcklwd, kInstVpunpcklwd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpunpcklwd, kInstVpunpcklwd, XmmReg, XmmReg, Mem) //! Packed bitwise xor (AVX). INST_3x(vpxor, kInstVpxor, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vpxor, kInstVpxor, XmmReg, XmmReg, Mem) //! Packed SP-FP reciprocal (AVX). INST_2x(vrcpps, kInstVrcpps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vrcpps, kInstVrcpps, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vrcpps, kInstVrcpps, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vrcpps, kInstVrcpps, YmmReg, Mem) //! Scalar SP-FP reciprocal (AVX). INST_3x(vrcpss, kInstVrcpss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vrcpss, kInstVrcpss, XmmReg, XmmReg, Mem) //! Packed SP-FP square root reciprocal (AVX). INST_2x(vrsqrtps, kInstVrsqrtps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vrsqrtps, kInstVrsqrtps, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vrsqrtps, kInstVrsqrtps, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vrsqrtps, kInstVrsqrtps, YmmReg, Mem) //! Scalar SP-FP square root reciprocal (AVX). INST_3x(vrsqrtss, kInstVrsqrtss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vrsqrtss, kInstVrsqrtss, XmmReg, XmmReg, Mem) //! Packed DP-FP round (AVX). INST_3i(vroundpd, kInstVroundpd, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vroundpd, kInstVroundpd, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_3i(vroundpd, kInstVroundpd, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_3i(vroundpd, kInstVroundpd, YmmReg, Mem, Imm) //! Packed SP-FP round (AVX). INST_3i(vroundps, kInstVroundps, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vroundps, kInstVroundps, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_3i(vroundps, kInstVroundps, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_3i(vroundps, kInstVroundps, YmmReg, Mem, Imm) //! Scalar DP-FP round (AVX). INST_4i(vroundsd, kInstVroundsd, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vroundsd, kInstVroundsd, XmmReg, XmmReg, Mem, Imm) //! Scalar SP-FP round (AVX). INST_4i(vroundss, kInstVroundss, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vroundss, kInstVroundss, XmmReg, XmmReg, Mem, Imm) //! Shuffle DP-FP (AVX). INST_4i(vshufpd, kInstVshufpd, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vshufpd, kInstVshufpd, XmmReg, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_4i(vshufpd, kInstVshufpd, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vshufpd, kInstVshufpd, YmmReg, YmmReg, Mem, Imm) //! Shuffle SP-FP (AVX). INST_4i(vshufps, kInstVshufps, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vshufps, kInstVshufps, XmmReg, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_4i(vshufps, kInstVshufps, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vshufps, kInstVshufps, YmmReg, YmmReg, Mem, Imm) //! Packed DP-FP square root (AVX). INST_2x(vsqrtpd, kInstVsqrtpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vsqrtpd, kInstVsqrtpd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vsqrtpd, kInstVsqrtpd, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vsqrtpd, kInstVsqrtpd, YmmReg, Mem) //! Packed SP-FP square root (AVX). INST_2x(vsqrtps, kInstVsqrtps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vsqrtps, kInstVsqrtps, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vsqrtps, kInstVsqrtps, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vsqrtps, kInstVsqrtps, YmmReg, Mem) //! Scalar DP-FP square root (AVX). INST_3x(vsqrtsd, kInstVsqrtsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vsqrtsd, kInstVsqrtsd, XmmReg, XmmReg, Mem) //! Scalar SP-FP square root (AVX). INST_3x(vsqrtss, kInstVsqrtss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vsqrtss, kInstVsqrtss, XmmReg, XmmReg, Mem) //! Store streaming SIMD extension control/status (AVX). @@ -4863,117 +4869,117 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DP-FP subtract (AVX). INST_3x(vsubpd, kInstVsubpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vsubpd, kInstVsubpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vsubpd, kInstVsubpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vsubpd, kInstVsubpd, YmmReg, YmmReg, Mem) //! Packed SP-FP subtract (AVX). INST_3x(vsubps, kInstVsubps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vsubps, kInstVsubps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vsubps, kInstVsubps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vsubps, kInstVsubps, YmmReg, YmmReg, Mem) //! Scalar DP-FP subtract (AVX). INST_3x(vsubsd, kInstVsubsd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vsubsd, kInstVsubsd, XmmReg, XmmReg, Mem) //! Scalar SP-FP subtract (AVX). INST_3x(vsubss, kInstVsubss, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vsubss, kInstVsubss, XmmReg, XmmReg, Mem) //! Logical compare DP-FP (AVX). INST_2x(vtestpd, kInstVtestpd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vtestpd, kInstVtestpd, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vtestpd, kInstVtestpd, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vtestpd, kInstVtestpd, YmmReg, Mem) //! Logical compare SP-FP (AVX). INST_2x(vtestps, kInstVtestps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vtestps, kInstVtestps, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vtestps, kInstVtestps, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vtestps, kInstVtestps, YmmReg, Mem) //! Scalar DP-FP unordered compare and set EFLAGS (AVX). INST_2x(vucomisd, kInstVucomisd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vucomisd, kInstVucomisd, XmmReg, Mem) //! Unordered scalar SP-FP compare and set EFLAGS (AVX). INST_2x(vucomiss, kInstVucomiss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vucomiss, kInstVucomiss, XmmReg, Mem) //! Unpack and interleave high packed DP-FP (AVX). INST_3x(vunpckhpd, kInstVunpckhpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vunpckhpd, kInstVunpckhpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vunpckhpd, kInstVunpckhpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vunpckhpd, kInstVunpckhpd, YmmReg, YmmReg, Mem) //! Unpack high packed SP-FP data (AVX). INST_3x(vunpckhps, kInstVunpckhps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vunpckhps, kInstVunpckhps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vunpckhps, kInstVunpckhps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vunpckhps, kInstVunpckhps, YmmReg, YmmReg, Mem) //! Unpack and interleave low packed DP-FP (AVX). INST_3x(vunpcklpd, kInstVunpcklpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vunpcklpd, kInstVunpcklpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vunpcklpd, kInstVunpcklpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vunpcklpd, kInstVunpcklpd, YmmReg, YmmReg, Mem) //! Unpack low packed SP-FP data (AVX). INST_3x(vunpcklps, kInstVunpcklps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vunpcklps, kInstVunpcklps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vunpcklps, kInstVunpcklps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vunpcklps, kInstVunpcklps, YmmReg, YmmReg, Mem) //! Packed DP-FP bitwise xor (AVX). INST_3x(vxorpd, kInstVxorpd, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vxorpd, kInstVxorpd, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vxorpd, kInstVxorpd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vxorpd, kInstVxorpd, YmmReg, YmmReg, Mem) //! Packed SP-FP bitwise xor (AVX). INST_3x(vxorps, kInstVxorps, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vxorps, kInstVxorps, XmmReg, XmmReg, Mem) - //! @overload + //! \overload INST_3x(vxorps, kInstVxorps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vxorps, kInstVxorps, YmmReg, YmmReg, Mem) - //! Zero all YMM registers. + //! Zero all Ymm registers. INST_0x(vzeroall, kInstVzeroall) - //! Zero upper 128-bits of all YMM registers. + //! Zero upper 128-bits of all Ymm registers. INST_0x(vzeroupper, kInstVzeroupper) // -------------------------------------------------------------------------- @@ -4982,32 +4988,32 @@ struct X86X64Assembler : public BaseAssembler { //! Perform a single round of the AES decryption flow (AVX+AESNI). INST_3x(vaesdec, kInstVaesdec, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaesdec, kInstVaesdec, XmmReg, XmmReg, Mem) //! Perform the last round of the AES decryption flow (AVX+AESNI). INST_3x(vaesdeclast, kInstVaesdeclast, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaesdeclast, kInstVaesdeclast, XmmReg, XmmReg, Mem) //! Perform a single round of the AES encryption flow (AVX+AESNI). INST_3x(vaesenc, kInstVaesenc, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaesenc, kInstVaesenc, XmmReg, XmmReg, Mem) //! Perform the last round of the AES encryption flow (AVX+AESNI). INST_3x(vaesenclast, kInstVaesenclast, XmmReg, XmmReg, XmmReg) - //! @overload + //! \overload INST_3x(vaesenclast, kInstVaesenclast, XmmReg, XmmReg, Mem) //! Perform the InvMixColumns transformation (AVX+AESNI). INST_2x(vaesimc, kInstVaesimc, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vaesimc, kInstVaesimc, XmmReg, Mem) //! Assist in expanding the AES cipher key (AVX+AESNI). INST_3i(vaeskeygenassist, kInstVaeskeygenassist, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vaeskeygenassist, kInstVaeskeygenassist, XmmReg, Mem, Imm) // -------------------------------------------------------------------------- @@ -5016,7 +5022,7 @@ struct X86X64Assembler : public BaseAssembler { //! Carry-less multiplication QWORD (AVX+PCLMULQDQ). INST_4i(vpclmulqdq, kInstVpclmulqdq, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vpclmulqdq, kInstVpclmulqdq, XmmReg, XmmReg, Mem, Imm) // -------------------------------------------------------------------------- @@ -5029,27 +5035,27 @@ struct X86X64Assembler : public BaseAssembler { INST_2x(vbroadcastsd, kInstVbroadcastsd, YmmReg, XmmReg) //! Broadcast low SP-FP element in `o1` to `o0` (AVX2). INST_2x(vbroadcastss, kInstVbroadcastss, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vbroadcastss, kInstVbroadcastss, YmmReg, XmmReg) //! Extract 128-bit element from `o1` to `o0` based on selector (AVX2). INST_3i(vextracti128, kInstVextracti128, XmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_3i(vextracti128, kInstVextracti128, Mem, YmmReg, Imm) //! Gather DP-FP from DWORD indicies specified in `o1`s VSIB (AVX2). INST_3x(vgatherdpd, kInstVgatherdpd, XmmReg, Mem, XmmReg) - //! @overload + //! \overload INST_3x(vgatherdpd, kInstVgatherdpd, YmmReg, Mem, YmmReg) //! Gather SP-FP from DWORD indicies specified in `o1`s VSIB (AVX2). INST_3x(vgatherdps, kInstVgatherdps, XmmReg, Mem, XmmReg) - //! @overload + //! \overload INST_3x(vgatherdps, kInstVgatherdps, YmmReg, Mem, YmmReg) //! Gather DP-FP from QWORD indicies specified in `o1`s VSIB (AVX2). INST_3x(vgatherqpd, kInstVgatherqpd, XmmReg, Mem, XmmReg) - //! @overload + //! \overload INST_3x(vgatherqpd, kInstVgatherqpd, YmmReg, Mem, YmmReg) //! Gather SP-FP from QWORD indicies specified in `o1`s VSIB (AVX2). @@ -5057,7 +5063,7 @@ struct X86X64Assembler : public BaseAssembler { //! Insert 128-bit of packed data based on selector (AVX2). INST_4i(vinserti128, kInstVinserti128, YmmReg, YmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vinserti128, kInstVinserti128, YmmReg, YmmReg, Mem, Imm) //! Load 256-bits aligned using NT hint (AVX2). @@ -5065,227 +5071,227 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD sums of absolute difference (AVX2). INST_4i(vmpsadbw, kInstVmpsadbw, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vmpsadbw, kInstVmpsadbw, YmmReg, YmmReg, Mem, Imm) //! Packed BYTE absolute value (AVX2). INST_2x(vpabsb, kInstVpabsb, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vpabsb, kInstVpabsb, YmmReg, Mem) //! Packed DWORD absolute value (AVX2). INST_2x(vpabsd, kInstVpabsd, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vpabsd, kInstVpabsd, YmmReg, Mem) //! Packed WORD absolute value (AVX2). INST_2x(vpabsw, kInstVpabsw, YmmReg, YmmReg) - //! @overload + //! \overload INST_2x(vpabsw, kInstVpabsw, YmmReg, Mem) //! Pack DWORDs to WORDs with signed saturation (AVX2). INST_3x(vpackssdw, kInstVpackssdw, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpackssdw, kInstVpackssdw, YmmReg, YmmReg, Mem) //! Pack WORDs to BYTEs with signed saturation (AVX2). INST_3x(vpacksswb, kInstVpacksswb, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpacksswb, kInstVpacksswb, YmmReg, YmmReg, Mem) //! Pack DWORDs to WORDs with unsigned saturation (AVX2). INST_3x(vpackusdw, kInstVpackusdw, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpackusdw, kInstVpackusdw, YmmReg, YmmReg, Mem) //! Pack WORDs to BYTEs with unsigned saturation (AVX2). INST_3x(vpackuswb, kInstVpackuswb, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpackuswb, kInstVpackuswb, YmmReg, YmmReg, Mem) //! Packed BYTE add (AVX2). INST_3x(vpaddb, kInstVpaddb, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpaddb, kInstVpaddb, YmmReg, YmmReg, Mem) //! Packed DWORD add (AVX2). INST_3x(vpaddd, kInstVpaddd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpaddd, kInstVpaddd, YmmReg, YmmReg, Mem) //! Packed QDWORD add (AVX2). INST_3x(vpaddq, kInstVpaddq, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpaddq, kInstVpaddq, YmmReg, YmmReg, Mem) //! Packed WORD add (AVX2). INST_3x(vpaddw, kInstVpaddw, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpaddw, kInstVpaddw, YmmReg, YmmReg, Mem) //! Packed BYTE add with saturation (AVX2). INST_3x(vpaddsb, kInstVpaddsb, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpaddsb, kInstVpaddsb, YmmReg, YmmReg, Mem) //! Packed WORD add with saturation (AVX2). INST_3x(vpaddsw, kInstVpaddsw, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpaddsw, kInstVpaddsw, YmmReg, YmmReg, Mem) //! Packed BYTE add with unsigned saturation (AVX2). INST_3x(vpaddusb, kInstVpaddusb, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpaddusb, kInstVpaddusb, YmmReg, YmmReg, Mem) //! Packed WORD add with unsigned saturation (AVX2). INST_3x(vpaddusw, kInstVpaddusw, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpaddusw, kInstVpaddusw, YmmReg, YmmReg, Mem) //! Packed align right (AVX2). INST_4i(vpalignr, kInstVpalignr, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vpalignr, kInstVpalignr, YmmReg, YmmReg, Mem, Imm) //! Packed bitwise and (AVX2). INST_3x(vpand, kInstVpand, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpand, kInstVpand, YmmReg, YmmReg, Mem) //! Packed bitwise and-not (AVX2). INST_3x(vpandn, kInstVpandn, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpandn, kInstVpandn, YmmReg, YmmReg, Mem) //! Packed BYTE average (AVX2). INST_3x(vpavgb, kInstVpavgb, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpavgb, kInstVpavgb, YmmReg, YmmReg, Mem) //! Packed WORD average (AVX2). INST_3x(vpavgw, kInstVpavgw, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpavgw, kInstVpavgw, YmmReg, YmmReg, Mem) //! Packed DWORD blend (AVX2). INST_4i(vpblendd, kInstVpblendd, XmmReg, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_4i(vpblendd, kInstVpblendd, XmmReg, XmmReg, Mem, Imm) - //! @overload + //! \overload INST_4i(vpblendd, kInstVpblendd, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vpblendd, kInstVpblendd, YmmReg, YmmReg, Mem, Imm) //! Packed DWORD variable blend (AVX2). INST_4x(vpblendvb, kInstVpblendvb, YmmReg, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_4x(vpblendvb, kInstVpblendvb, YmmReg, YmmReg, Mem, YmmReg) //! Packed WORD blend (AVX2). INST_4i(vpblendw, kInstVpblendw, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vpblendw, kInstVpblendw, YmmReg, YmmReg, Mem, Imm) //! Broadcast BYTE from `o1` to 128-bits in `o0` (AVX2). INST_2x(vpbroadcastb, kInstVpbroadcastb, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpbroadcastb, kInstVpbroadcastb, XmmReg, Mem) //! Broadcast BYTE from `o1` to 256-bits in `o0` (AVX2). INST_2x(vpbroadcastb, kInstVpbroadcastb, YmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpbroadcastb, kInstVpbroadcastb, YmmReg, Mem) //! Broadcast DWORD from `o1` to 128-bits in `o0` (AVX2). INST_2x(vpbroadcastd, kInstVpbroadcastd, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpbroadcastd, kInstVpbroadcastd, XmmReg, Mem) //! Broadcast DWORD from `o1` to 256-bits in `o0` (AVX2). INST_2x(vpbroadcastd, kInstVpbroadcastd, YmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpbroadcastd, kInstVpbroadcastd, YmmReg, Mem) //! Broadcast QWORD from `o1` to 128-bits in `o0` (AVX2). INST_2x(vpbroadcastq, kInstVpbroadcastq, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpbroadcastq, kInstVpbroadcastq, XmmReg, Mem) //! Broadcast QWORD from `o1` to 256-bits in `o0` (AVX2). INST_2x(vpbroadcastq, kInstVpbroadcastq, YmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpbroadcastq, kInstVpbroadcastq, YmmReg, Mem) //! Broadcast WORD from `o1` to 128-bits in `o0` (AVX2). INST_2x(vpbroadcastw, kInstVpbroadcastw, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpbroadcastw, kInstVpbroadcastw, XmmReg, Mem) //! Broadcast WORD from `o1` to 256-bits in `o0` (AVX2). INST_2x(vpbroadcastw, kInstVpbroadcastw, YmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vpbroadcastw, kInstVpbroadcastw, YmmReg, Mem) //! Packed BYTEs compare for equality (AVX2). INST_3x(vpcmpeqb, kInstVpcmpeqb, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpcmpeqb, kInstVpcmpeqb, YmmReg, YmmReg, Mem) //! Packed DWORDs compare for equality (AVX2). INST_3x(vpcmpeqd, kInstVpcmpeqd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpcmpeqd, kInstVpcmpeqd, YmmReg, YmmReg, Mem) //! Packed QWORDs compare for equality (AVX2). INST_3x(vpcmpeqq, kInstVpcmpeqq, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpcmpeqq, kInstVpcmpeqq, YmmReg, YmmReg, Mem) //! Packed WORDs compare for equality (AVX2). INST_3x(vpcmpeqw, kInstVpcmpeqw, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpcmpeqw, kInstVpcmpeqw, YmmReg, YmmReg, Mem) //! Packed BYTEs compare if greater than (AVX2). INST_3x(vpcmpgtb, kInstVpcmpgtb, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpcmpgtb, kInstVpcmpgtb, YmmReg, YmmReg, Mem) //! Packed DWORDs compare if greater than (AVX2). INST_3x(vpcmpgtd, kInstVpcmpgtd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpcmpgtd, kInstVpcmpgtd, YmmReg, YmmReg, Mem) //! Packed QWORDs compare if greater than (AVX2). INST_3x(vpcmpgtq, kInstVpcmpgtq, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpcmpgtq, kInstVpcmpgtq, YmmReg, YmmReg, Mem) //! Packed WORDs compare if greater than (AVX2). INST_3x(vpcmpgtw, kInstVpcmpgtw, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpcmpgtw, kInstVpcmpgtw, YmmReg, YmmReg, Mem) //! Packed OWORD permute (AVX2). INST_4i(vperm2i128, kInstVperm2i128, YmmReg, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_4i(vperm2i128, kInstVperm2i128, YmmReg, YmmReg, Mem, Imm) //! Packed DWORD permute (AVX2). INST_3x(vpermd, kInstVpermd, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpermd, kInstVpermd, YmmReg, YmmReg, Mem) //! Packed DP-FP permute (AVX2). INST_3i(vpermpd, kInstVpermpd, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_3i(vpermpd, kInstVpermpd, YmmReg, Mem, Imm) //! Packed SP-FP permute (AVX2). INST_3x(vpermps, kInstVpermps, YmmReg, YmmReg, YmmReg) - //! @overload + //! \overload INST_3x(vpermps, kInstVpermps, YmmReg, YmmReg, Mem) //! Packed QWORD permute (AVX2). INST_3i(vpermq, kInstVpermq, YmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_3i(vpermq, kInstVpermq, YmmReg, Mem, Imm) INST_3x(vpgatherdd, kInstVpgatherdd, XmmReg, Mem, XmmReg) @@ -5301,32 +5307,32 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DWORD horizontal add (AVX2). INST_3x(vphaddd, kInstVphaddd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vphaddd, kInstVphaddd, YmmReg, YmmReg, YmmReg) //! Packed WORD horizontal add with saturation (AVX2). INST_3x(vphaddsw, kInstVphaddsw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vphaddsw, kInstVphaddsw, YmmReg, YmmReg, YmmReg) //! Packed WORD horizontal add (AVX2). INST_3x(vphaddw, kInstVphaddw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vphaddw, kInstVphaddw, YmmReg, YmmReg, YmmReg) //! Packed DWORD horizontal subtract (AVX2). INST_3x(vphsubd, kInstVphsubd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vphsubd, kInstVphsubd, YmmReg, YmmReg, YmmReg) //! Packed WORD horizontal subtract with saturation (AVX2). INST_3x(vphsubsw, kInstVphsubsw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vphsubsw, kInstVphsubsw, YmmReg, YmmReg, YmmReg) //! Packed WORD horizontal subtract (AVX2). INST_3x(vphsubw, kInstVphsubw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vphsubw, kInstVphsubw, YmmReg, YmmReg, YmmReg) //! Move Byte mask to integer (AVX2). @@ -5334,72 +5340,72 @@ struct X86X64Assembler : public BaseAssembler { //! BYTE to DWORD with sign extend (AVX). INST_2x(vpmovsxbd, kInstVpmovsxbd, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovsxbd, kInstVpmovsxbd, YmmReg, XmmReg) //! Packed BYTE to QWORD with sign extend (AVX2). INST_2x(vpmovsxbq, kInstVpmovsxbq, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovsxbq, kInstVpmovsxbq, YmmReg, XmmReg) //! Packed BYTE to WORD with sign extend (AVX2). INST_2x(vpmovsxbw, kInstVpmovsxbw, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovsxbw, kInstVpmovsxbw, YmmReg, XmmReg) //! Packed DWORD to QWORD with sign extend (AVX2). INST_2x(vpmovsxdq, kInstVpmovsxdq, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovsxdq, kInstVpmovsxdq, YmmReg, XmmReg) //! Packed WORD to DWORD with sign extend (AVX2). INST_2x(vpmovsxwd, kInstVpmovsxwd, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovsxwd, kInstVpmovsxwd, YmmReg, XmmReg) //! Packed WORD to QWORD with sign extend (AVX2). INST_2x(vpmovsxwq, kInstVpmovsxwq, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovsxwq, kInstVpmovsxwq, YmmReg, XmmReg) //! BYTE to DWORD with zero extend (AVX2). INST_2x(vpmovzxbd, kInstVpmovzxbd, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovzxbd, kInstVpmovzxbd, YmmReg, XmmReg) //! Packed BYTE to QWORD with zero extend (AVX2). INST_2x(vpmovzxbq, kInstVpmovzxbq, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovzxbq, kInstVpmovzxbq, YmmReg, XmmReg) //! BYTE to WORD with zero extend (AVX2). INST_2x(vpmovzxbw, kInstVpmovzxbw, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovzxbw, kInstVpmovzxbw, YmmReg, XmmReg) //! Packed DWORD to QWORD with zero extend (AVX2). INST_2x(vpmovzxdq, kInstVpmovzxdq, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovzxdq, kInstVpmovzxdq, YmmReg, XmmReg) //! Packed WORD to DWORD with zero extend (AVX2). INST_2x(vpmovzxwd, kInstVpmovzxwd, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovzxwd, kInstVpmovzxwd, YmmReg, XmmReg) //! Packed WORD to QWORD with zero extend (AVX2). INST_2x(vpmovzxwq, kInstVpmovzxwq, YmmReg, Mem) - //! @overload + //! \overload INST_2x(vpmovzxwq, kInstVpmovzxwq, YmmReg, XmmReg) //! Packed multiply and add signed and unsigned bytes (AVX2). INST_3x(vpmaddubsw, kInstVpmaddubsw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmaddubsw, kInstVpmaddubsw, YmmReg, YmmReg, YmmReg) //! Packed WORD multiply and add to packed DWORD (AVX2). INST_3x(vpmaddwd, kInstVpmaddwd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmaddwd, kInstVpmaddwd, YmmReg, YmmReg, YmmReg) INST_3x(vpmaskmovd, kInstVpmaskmovd, Mem, XmmReg, XmmReg) @@ -5414,149 +5420,149 @@ struct X86X64Assembler : public BaseAssembler { //! Packed BYTE maximum (AVX2). INST_3x(vpmaxsb, kInstVpmaxsb, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmaxsb, kInstVpmaxsb, YmmReg, YmmReg, YmmReg) //! Packed DWORD maximum (AVX2). INST_3x(vpmaxsd, kInstVpmaxsd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmaxsd, kInstVpmaxsd, YmmReg, YmmReg, YmmReg) //! Packed WORD maximum (AVX2). INST_3x(vpmaxsw, kInstVpmaxsw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmaxsw, kInstVpmaxsw, YmmReg, YmmReg, YmmReg) //! Packed BYTE unsigned maximum (AVX2). INST_3x(vpmaxub, kInstVpmaxub, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmaxub, kInstVpmaxub, YmmReg, YmmReg, YmmReg) //! Packed DWORD unsigned maximum (AVX2). INST_3x(vpmaxud, kInstVpmaxud, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmaxud, kInstVpmaxud, YmmReg, YmmReg, YmmReg) //! Packed WORD unsigned maximum (AVX2). INST_3x(vpmaxuw, kInstVpmaxuw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmaxuw, kInstVpmaxuw, YmmReg, YmmReg, YmmReg) //! Packed BYTE minimum (AVX2). INST_3x(vpminsb, kInstVpminsb, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpminsb, kInstVpminsb, YmmReg, YmmReg, YmmReg) //! Packed DWORD minimum (AVX2). INST_3x(vpminsd, kInstVpminsd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpminsd, kInstVpminsd, YmmReg, YmmReg, YmmReg) //! Packed WORD minimum (AVX2). INST_3x(vpminsw, kInstVpminsw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpminsw, kInstVpminsw, YmmReg, YmmReg, YmmReg) //! Packed BYTE unsigned minimum (AVX2). INST_3x(vpminub, kInstVpminub, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpminub, kInstVpminub, YmmReg, YmmReg, YmmReg) //! Packed DWORD unsigned minimum (AVX2). INST_3x(vpminud, kInstVpminud, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpminud, kInstVpminud, YmmReg, YmmReg, YmmReg) //! Packed WORD unsigned minimum (AVX2). INST_3x(vpminuw, kInstVpminuw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpminuw, kInstVpminuw, YmmReg, YmmReg, YmmReg) //! Packed DWORD to QWORD multiply (AVX2). INST_3x(vpmuldq, kInstVpmuldq, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmuldq, kInstVpmuldq, YmmReg, YmmReg, YmmReg) //! Packed WORD multiply high, round and scale (AVX2). INST_3x(vpmulhrsw, kInstVpmulhrsw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmulhrsw, kInstVpmulhrsw, YmmReg, YmmReg, YmmReg) //! Packed WORD unsigned multiply high (AVX2). INST_3x(vpmulhuw, kInstVpmulhuw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmulhuw, kInstVpmulhuw, YmmReg, YmmReg, YmmReg) //! Packed WORD multiply high (AVX2). INST_3x(vpmulhw, kInstVpmulhw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmulhw, kInstVpmulhw, YmmReg, YmmReg, YmmReg) //! Packed DWORD multiply low (AVX2). INST_3x(vpmulld, kInstVpmulld, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmulld, kInstVpmulld, YmmReg, YmmReg, YmmReg) //! Packed WORDs multiply low (AVX2). INST_3x(vpmullw, kInstVpmullw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmullw, kInstVpmullw, YmmReg, YmmReg, YmmReg) //! Packed DWORD multiply to QWORD (AVX2). INST_3x(vpmuludq, kInstVpmuludq, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpmuludq, kInstVpmuludq, YmmReg, YmmReg, YmmReg) //! Packed bitwise or (AVX2). INST_3x(vpor, kInstVpor, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpor, kInstVpor, YmmReg, YmmReg, YmmReg) //! Packed WORD sum of absolute differences (AVX2). INST_3x(vpsadbw, kInstVpsadbw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsadbw, kInstVpsadbw, YmmReg, YmmReg, YmmReg) //! Packed BYTE shuffle (AVX2). INST_3x(vpshufb, kInstVpshufb, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpshufb, kInstVpshufb, YmmReg, YmmReg, YmmReg) //! Packed DWORD shuffle (AVX2). INST_3i(vpshufd, kInstVpshufd, YmmReg, Mem, Imm) - //! @overload + //! \overload INST_3i(vpshufd, kInstVpshufd, YmmReg, YmmReg, Imm) //! Packed WORD shuffle high (AVX2). INST_3i(vpshufhw, kInstVpshufhw, YmmReg, Mem, Imm) - //! @overload + //! \overload INST_3i(vpshufhw, kInstVpshufhw, YmmReg, YmmReg, Imm) //! Packed WORD shuffle low (AVX2). INST_3i(vpshuflw, kInstVpshuflw, YmmReg, Mem, Imm) - //! @overload + //! \overload INST_3i(vpshuflw, kInstVpshuflw, YmmReg, YmmReg, Imm) //! Packed BYTE sign (AVX2). INST_3x(vpsignb, kInstVpsignb, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsignb, kInstVpsignb, YmmReg, YmmReg, YmmReg) //! Packed DWORD sign (AVX2). INST_3x(vpsignd, kInstVpsignd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsignd, kInstVpsignd, YmmReg, YmmReg, YmmReg) //! Packed WORD sign (AVX2). INST_3x(vpsignw, kInstVpsignw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsignw, kInstVpsignw, YmmReg, YmmReg, YmmReg) //! Packed DWORD shift left logical (AVX2). INST_3x(vpslld, kInstVpslld, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpslld, kInstVpslld, YmmReg, YmmReg, XmmReg) - //! @overload + //! \overload INST_3i(vpslld, kInstVpslld, YmmReg, YmmReg, Imm) //! Packed OWORD shift left logical (AVX2). @@ -5564,9 +5570,9 @@ struct X86X64Assembler : public BaseAssembler { //! Packed QWORD shift left logical (AVX2). INST_3x(vpsllq, kInstVpsllq, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsllq, kInstVpsllq, YmmReg, YmmReg, XmmReg) - //! @overload + //! \overload INST_3i(vpsllq, kInstVpsllq, YmmReg, YmmReg, Imm) INST_3x(vpsllvd, kInstVpsllvd, XmmReg, XmmReg, Mem) @@ -5581,16 +5587,16 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD shift left logical (AVX2). INST_3x(vpsllw, kInstVpsllw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsllw, kInstVpsllw, YmmReg, YmmReg, XmmReg) //! Packed WORD shift left logical (AVX2). INST_3i(vpsllw, kInstVpsllw, YmmReg, YmmReg, Imm) //! Packed DWORD shift right arithmetic (AVX2). INST_3x(vpsrad, kInstVpsrad, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsrad, kInstVpsrad, YmmReg, YmmReg, XmmReg) - //! @overload + //! \overload INST_3i(vpsrad, kInstVpsrad, YmmReg, YmmReg, Imm) INST_3x(vpsravd, kInstVpsravd, XmmReg, XmmReg, Mem) @@ -5600,16 +5606,16 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD shift right arithmetic (AVX2). INST_3x(vpsraw, kInstVpsraw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsraw, kInstVpsraw, YmmReg, YmmReg, XmmReg) - //! @overload + //! \overload INST_3i(vpsraw, kInstVpsraw, YmmReg, YmmReg, Imm) //! Packed DWORD shift right logical (AVX2). INST_3x(vpsrld, kInstVpsrld, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsrld, kInstVpsrld, YmmReg, YmmReg, XmmReg) - //! @overload + //! \overload INST_3i(vpsrld, kInstVpsrld, YmmReg, YmmReg, Imm) //! Scalar OWORD shift right logical (AVX2). @@ -5617,11 +5623,11 @@ struct X86X64Assembler : public BaseAssembler { //! Packed QWORD shift right logical (AVX2). INST_3x(vpsrlq, kInstVpsrlq, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsrlq, kInstVpsrlq, YmmReg, YmmReg, XmmReg) - //! @overload + //! \overload INST_3i(vpsrlq, kInstVpsrlq, YmmReg, YmmReg, Imm) - + INST_3x(vpsrlvd, kInstVpsrlvd, XmmReg, XmmReg, Mem) INST_3x(vpsrlvd, kInstVpsrlvd, XmmReg, XmmReg, XmmReg) INST_3x(vpsrlvd, kInstVpsrlvd, YmmReg, YmmReg, Mem) @@ -5634,9 +5640,9 @@ struct X86X64Assembler : public BaseAssembler { //! Packed WORD shift right logical (AVX2). INST_3x(vpsrlw, kInstVpsrlw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsrlw, kInstVpsrlw, YmmReg, YmmReg, XmmReg) - //! @overload + //! \overload INST_3i(vpsrlw, kInstVpsrlw, YmmReg, YmmReg, Imm) //! Packed BYTE subtract (AVX2). @@ -5645,82 +5651,82 @@ struct X86X64Assembler : public BaseAssembler { //! Packed DWORD subtract (AVX2). INST_3x(vpsubd, kInstVpsubd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsubd, kInstVpsubd, YmmReg, YmmReg, YmmReg) //! Packed QWORD subtract (AVX2). INST_3x(vpsubq, kInstVpsubq, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsubq, kInstVpsubq, YmmReg, YmmReg, YmmReg) //! Packed BYTE subtract with saturation (AVX2). INST_3x(vpsubsb, kInstVpsubsb, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsubsb, kInstVpsubsb, YmmReg, YmmReg, YmmReg) //! Packed WORD subtract with saturation (AVX2). INST_3x(vpsubsw, kInstVpsubsw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsubsw, kInstVpsubsw, YmmReg, YmmReg, YmmReg) //! Packed BYTE subtract with unsigned saturation (AVX2). INST_3x(vpsubusb, kInstVpsubusb, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsubusb, kInstVpsubusb, YmmReg, YmmReg, YmmReg) //! Packed WORD subtract with unsigned saturation (AVX2). INST_3x(vpsubusw, kInstVpsubusw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsubusw, kInstVpsubusw, YmmReg, YmmReg, YmmReg) //! Packed WORD subtract (AVX2). INST_3x(vpsubw, kInstVpsubw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpsubw, kInstVpsubw, YmmReg, YmmReg, YmmReg) //! Unpack high packed BYTEs to WORDs (AVX2). INST_3x(vpunpckhbw, kInstVpunpckhbw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpunpckhbw, kInstVpunpckhbw, YmmReg, YmmReg, YmmReg) //! Unpack high packed DWORDs to QWORDs (AVX2). INST_3x(vpunpckhdq, kInstVpunpckhdq, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpunpckhdq, kInstVpunpckhdq, YmmReg, YmmReg, YmmReg) //! Unpack high packed QWORDs to OWORD (AVX2). INST_3x(vpunpckhqdq, kInstVpunpckhqdq, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpunpckhqdq, kInstVpunpckhqdq, YmmReg, YmmReg, YmmReg) //! Unpack high packed WORDs to DWORDs (AVX2). INST_3x(vpunpckhwd, kInstVpunpckhwd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpunpckhwd, kInstVpunpckhwd, YmmReg, YmmReg, YmmReg) //! Unpack low packed BYTEs to WORDs (AVX2). INST_3x(vpunpcklbw, kInstVpunpcklbw, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpunpcklbw, kInstVpunpcklbw, YmmReg, YmmReg, YmmReg) //! Unpack low packed DWORDs to QWORDs (AVX2). INST_3x(vpunpckldq, kInstVpunpckldq, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpunpckldq, kInstVpunpckldq, YmmReg, YmmReg, YmmReg) //! Unpack low packed QWORDs to OWORD (AVX2). INST_3x(vpunpcklqdq, kInstVpunpcklqdq, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpunpcklqdq, kInstVpunpcklqdq, YmmReg, YmmReg, YmmReg) //! Unpack low packed WORDs to DWORDs (AVX2). INST_3x(vpunpcklwd, kInstVpunpcklwd, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpunpcklwd, kInstVpunpcklwd, YmmReg, YmmReg, YmmReg) //! Packed bitwise xor (AVX2). INST_3x(vpxor, kInstVpxor, YmmReg, YmmReg, Mem) - //! @overload + //! \overload INST_3x(vpxor, kInstVpxor, YmmReg, YmmReg, YmmReg) // -------------------------------------------------------------------------- @@ -6285,32 +6291,32 @@ struct X86X64Assembler : public BaseAssembler { //! Bitwise and-not (BMI). INST_3x(andn, kInstAndn, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(andn, kInstAndn, GpReg, GpReg, Mem) //! Bit field extract (BMI). INST_3x(bextr, kInstBextr, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(bextr, kInstBextr, GpReg, Mem, GpReg) //! Extract lower set isolated bit (BMI). INST_2x(blsi, kInstBlsi, GpReg, GpReg) - //! @overload + //! \overload INST_2x(blsi, kInstBlsi, GpReg, Mem) //! Get mask up to lowest set bit (BMI). INST_2x(blsmsk, kInstBlsmsk, GpReg, GpReg) - //! @overload + //! \overload INST_2x(blsmsk, kInstBlsmsk, GpReg, Mem) //! Reset lowest set bit (BMI). INST_2x(blsr, kInstBlsr, GpReg, GpReg) - //! @overload + //! \overload INST_2x(blsr, kInstBlsr, GpReg, Mem) //! Count the number of trailing zero bits (BMI). INST_2x(tzcnt, kInstTzcnt, GpReg, GpReg) - //! @overload + //! \overload INST_2x(tzcnt, kInstTzcnt, GpReg, Mem) // -------------------------------------------------------------------------- @@ -6319,7 +6325,7 @@ struct X86X64Assembler : public BaseAssembler { //! Count the number of leading zero bits (LZCNT). INST_2x(lzcnt, kInstLzcnt, GpReg, GpReg) - //! @overload + //! \overload INST_2x(lzcnt, kInstLzcnt, GpReg, Mem) // -------------------------------------------------------------------------- @@ -6328,42 +6334,42 @@ struct X86X64Assembler : public BaseAssembler { //! Zero high bits starting with specified bit position (BMI2). INST_3x(bzhi, kInstBzhi, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(bzhi, kInstBzhi, GpReg, Mem, GpReg) //! Unsigned multiply without affecting flags (BMI2). INST_3x(mulx, kInstMulx, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(mulx, kInstMulx, GpReg, GpReg, Mem) //! Parallel bits deposit (BMI2). INST_3x(pdep, kInstPdep, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(pdep, kInstPdep, GpReg, GpReg, Mem) //! Parallel bits extract (BMI2). INST_3x(pext, kInstPext, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(pext, kInstPext, GpReg, GpReg, Mem) //! Rotate right without affecting flags (BMI2). INST_3i(rorx, kInstRorx, GpReg, GpReg, Imm) - //! @overload + //! \overload INST_3i(rorx, kInstRorx, GpReg, Mem, Imm) //! Shift arithmetic right without affecting flags (BMI2). INST_3x(sarx, kInstSarx, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(sarx, kInstSarx, GpReg, Mem, GpReg) //! Shift logical left without affecting flags (BMI2). INST_3x(shlx, kInstShlx, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(shlx, kInstShlx, GpReg, Mem, GpReg) //! Shift logical right without affecting flags (BMI2). INST_3x(shrx, kInstShrx, GpReg, GpReg, GpReg) - //! @overload + //! \overload INST_3x(shrx, kInstShrx, GpReg, Mem, GpReg) // -------------------------------------------------------------------------- @@ -6383,24 +6389,24 @@ struct X86X64Assembler : public BaseAssembler { //! Convert packed HP-FP to SP-FP. INST_2x(vcvtph2ps, kInstVcvtph2ps, XmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtph2ps, kInstVcvtph2ps, XmmReg, Mem) - //! @overload + //! \overload INST_2x(vcvtph2ps, kInstVcvtph2ps, YmmReg, XmmReg) - //! @overload + //! \overload INST_2x(vcvtph2ps, kInstVcvtph2ps, YmmReg, Mem) //! Convert packed SP-FP to HP-FP. INST_3i(vcvtps2ph, kInstVcvtps2ph, XmmReg, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vcvtps2ph, kInstVcvtps2ph, Mem, XmmReg, Imm) - //! @overload + //! \overload INST_3i(vcvtps2ph, kInstVcvtps2ph, XmmReg, YmmReg, Imm) - //! @overload + //! \overload INST_3i(vcvtps2ph, kInstVcvtps2ph, Mem, YmmReg, Imm) }; -//! @} +//! \} } // x86x64 namespace } // asmjit namespace @@ -6414,8 +6420,8 @@ struct X86X64Assembler : public BaseAssembler { namespace asmjit { namespace x86 { -//! @addtogroup asmjit_x86x64 -//! @{ +//! \addtogroup asmjit_x86x64_general +//! \{ //! X86-only assembler. struct Assembler : public X86X64Assembler { @@ -6461,7 +6467,7 @@ struct Assembler : public X86X64Assembler { INST_0x(pusha, kInstPusha) }; -//! @} +//! \} } // x86 namespace } // asmjit namespace @@ -6477,8 +6483,8 @@ struct Assembler : public X86X64Assembler { namespace asmjit { namespace x64 { -//! @addtogroup asmjit_x86x64 -//! @{ +//! \addtogroup asmjit_x86x64_general +//! \{ //! X64-only assembler. struct Assembler : public X86X64Assembler { @@ -6513,24 +6519,24 @@ struct Assembler : public X86X64Assembler { // [X64-Only Instructions] // -------------------------------------------------------------------------- - //! Convert dword to qword (RAX <- Sign Extend EAX). + //! Convert DWORD to QWORD (RAX <- Sign Extend EAX). INST_0x(cdqe, kInstCdqe) - //! Convert qword to oword (RDX:RAX <- Sign Extend RAX). + //! Convert QWORD to OWORD (RDX:RAX <- Sign Extend RAX). INST_0x(cqo, kInstCqo) //! Compares the 128-bit value in RDX:RAX with the memory operand (64-bit). INST_1x(cmpxchg16b, kInstCmpxchg16b, Mem) - //! Move dword to qword with sign-extension. + //! Move DWORD to QWORD with sign-extension. INST_2x(movsxd, kInstMovsxd, GpReg, GpReg) - //! @overload + //! \overload INST_2x(movsxd, kInstMovsxd, GpReg, Mem) - //! Load ECX/RCX QWORDs from DS:[ESI/RSI] to RAX. + //! Load Ecx/Rcx QWORDs from ds:[Esi/Rri] to Rax. INST_0x(rep_lodsq, kInstRepLodsq) - //! Move ECX/RCX QWORDs from DS:[ESI/RSI] to ES:[EDI/RDI]. + //! Move Ecx/Rcx QWORDs from ds:[Esi/Rsi] to es:[Edi/Rdi]. INST_0x(rep_movsq, kInstRepMovsq) - //! Fill ECX/RCX QWORDs at ES:[EDI/RDI] with RAX. + //! Fill Ecx/Rcx QWORDs at es:[Edi/Rdi] with Rax. INST_0x(rep_stosq, kInstRepStosq) //! Repeated find nonmatching QWORDs in ES:[EDI/RDI] and DS:[ESI/RDI]. @@ -6545,14 +6551,14 @@ struct Assembler : public X86X64Assembler { using X86X64Assembler::movq; - //! @overload + //! \overload INST_2x(movq, kInstMovq, GpReg, MmReg) - //! @overload + //! \overload INST_2x(movq, kInstMovq, MmReg, GpReg) - //! @overload + //! \overload INST_2x(movq, kInstMovq, GpReg, XmmReg) - //! @overload + //! \overload INST_2x(movq, kInstMovq, XmmReg, GpReg) // -------------------------------------------------------------------------- @@ -6578,7 +6584,7 @@ struct Assembler : public X86X64Assembler { INST_1x(wrgsbase, kInstWrgsbase, GpReg) }; -//! @} +//! \} } // x64 namespace } // asmjit namespace diff --git a/src/asmjit/x86/x86compiler.cpp b/src/asmjit/x86/x86compiler.cpp index e560819..03162f9 100644 --- a/src/asmjit/x86/x86compiler.cpp +++ b/src/asmjit/x86/x86compiler.cpp @@ -78,7 +78,7 @@ static Error X86X64Compiler_emitConstPool(X86X64Compiler* self, if (label.getId() == kInvalidValue) return kErrorOk; - self->align(static_cast(pool.getAlignment())); + self->align(kAlignData, static_cast(pool.getAlignment())); self->bind(label); EmbedNode* embedNode = self->embed(NULL, static_cast(pool.getSize())); @@ -656,8 +656,8 @@ Error X86X64Compiler::serialize(BaseAssembler& assembler) { X86X64Context context(this); Error error = kErrorOk; - BaseNode* node = _firstNode; - BaseNode* start; + Node* node = _firstNode; + Node* start; // Find function and use the context to translate/emit. do { diff --git a/src/asmjit/x86/x86compiler.h b/src/asmjit/x86/x86compiler.h index f64361f..edce31c 100644 --- a/src/asmjit/x86/x86compiler.h +++ b/src/asmjit/x86/x86compiler.h @@ -12,8 +12,8 @@ #include "../base/compiler.h" #include "../base/vectypes.h" #include "../x86/x86assembler.h" -#include "../x86/x86defs.h" #include "../x86/x86func.h" +#include "../x86/x86util.h" // [Api-Begin] #include "../apibegin.h" @@ -45,7 +45,7 @@ namespace x86x64 { ASMJIT_INLINE InstNode* _Inst_(const _Op0_& o0) { \ return emit(_Code_, o0); \ } \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE InstNode* _Inst_(int o0) { \ return emit(_Code_, o0); \ } @@ -55,7 +55,7 @@ namespace x86x64 { ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0); \ } \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE InstNode* _Inst_(int o0) { \ ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0); \ @@ -112,7 +112,7 @@ namespace x86x64 { ASMJIT_INLINE InstNode* _Inst_(const _Op0_& o0, const _Op1_& o1) { \ return emit(_Code_, o0, o1); \ } \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE InstNode* _Inst_(const _Op0_& o0, int o1) { \ return emit(_Code_, o0, o1); \ } @@ -122,7 +122,7 @@ namespace x86x64 { ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0, o1); \ } \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE InstNode* _Inst_(const _Op0_& o0, int o1) { \ ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0, o1); \ @@ -180,7 +180,7 @@ namespace x86x64 { return emit(_Code_, o0, o1, o2); \ } \ \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE InstNode* _Inst_(const _Op0_& o0, const _Op1_& o1, int o2) { \ return emit(_Code_, o0, o1, o2); \ } @@ -190,15 +190,12 @@ namespace x86x64 { ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0, o1, o2); \ } \ - /*! @overload */ \ + /*! \overload */ \ ASMJIT_INLINE InstNode* _Inst_(const _Op0_& o0, const _Op1_& o1, int o2) { \ ASMJIT_ASSERT(_Cond_); \ return emit(_Code_, o0, o1, o2); \ } -//! @addtogroup asmjit_x86x64_codegen -//! @{ - // ============================================================================ // [Forward Declarations] // ============================================================================ @@ -207,6 +204,9 @@ struct X86X64CallNode; struct X86X64FuncNode; struct VarState; +//! \addtogroup asmjit_x86x64_tree +//! \{ + // ============================================================================ // [asmjit::x86x64::kVarAttr] // ============================================================================ @@ -364,17 +364,17 @@ union StateCell { //! X86/X64 state. struct VarState : BaseVarState { enum { - //! Base index for Gp registers. + //! Base index of Gp registers. kGpIndex = 0, //! Count of Gp registers. kGpCount = 16, - //! Base index for Mm registers. + //! Base index of Mm registers. kMmIndex = kGpIndex + kGpCount, //! Count of Mm registers. kMmCount = 8, - //! Base index for Xmm registers. + //! Base index of Xmm registers. kXmmIndex = kMmIndex + kMmCount, //! Count of Xmm registers. kXmmCount = 16, @@ -393,9 +393,9 @@ struct VarState : BaseVarState { ASMJIT_INLINE VarData** getListByClass(uint32_t c) { switch (c) { - case kRegClassGp: return _listGp; - case kRegClassMm: return _listMm; - case kRegClassXy: return _listXmm; + case kRegClassGp : return _listGp; + case kRegClassMm : return _listMm; + case kRegClassXyz: return _listXmm; default: return NULL; @@ -518,18 +518,18 @@ struct X86X64FuncNode : public FuncNode { //! Get whether the function has stack frame register. //! - //! @note Stack frame register can be used for both - aligning purposes or + //! \note Stack frame register can be used for both - aligning purposes or //! generating standard prolog/epilog sequence. //! - //! @note Used only when stack is misaligned. + //! \note Used only when stack is misaligned. ASMJIT_INLINE bool hasStackFrameReg() const { return _stackFrameRegIndex != kInvalidReg; } //! Get stack frame register index. //! - //! @note Used only when stack is misaligned. + //! \note Used only when stack is misaligned. ASMJIT_INLINE uint32_t getStackFrameRegIndex() const { return _stackFrameRegIndex; } //! Get whether the stack frame register is preserved. //! - //! @note Used only when stack is misaligned. + //! \note Used only when stack is misaligned. ASMJIT_INLINE bool isStackFrameRegPreserved() const { return static_cast(_isStackFrameRegPreserved); } // -------------------------------------------------------------------------- @@ -625,16 +625,21 @@ struct X86X64CallNode : public CallNode { X86X64FuncDecl _x86Decl; //! Mask of all registers actually used to pass function arguments. //! - //! @note This bit-mask is not the same as @c X86X64Func::_passed. It contains + //! \note This bit-mask is not the same as @c X86X64Func::_passed. It contains //! only registers actually used to do the call while X86X64Func::_passed //! mask contains all registers for all function prototype combinations. RegMask _usedArgs; }; +//! \} + // ============================================================================ // [asmjit::x86x64::X86X64Compiler] // ============================================================================ +//! \addtogroup asmjit_x86x64_general +//! \{ + //! X86/X64 compiler. //! //! This class is used to store instruction stream and allows to modify @@ -644,11 +649,12 @@ struct X86X64CallNode : public CallNode { //! array instead. This allows to modify instruction stream later and for //! example to reorder instructions to make better performance. //! -//! `X86X64Compiler` moves code generation to a higher level. Higher level +//! `X86X64Compiler` moves code generation to a higher level. Higher level //! constructs allows to write more abstract and extensible code that is not //! possible with pure `X86X64Assembler`. //! -//! @section asmjit_compiler_introduction The Story +//! The Story +//! --------- //! //! Before telling you how Compiler works I'd like to write a story. I'd like //! to cover reasons why this class was created and why I'm recommending to use @@ -723,7 +729,8 @@ struct X86X64CallNode : public CallNode { //! low-level code using high-level API, leaving developer to concentrate on //! real problems and not to solving a register puzzle. //! -//! @section asmjit_compiler_codegeneration Code Generation +//! Code Generation +//! --------------- //! //! First that is needed to know about compiler is that compiler never emits //! machine code. It's used as a middleware between @c asmjit::Assembler and @@ -788,12 +795,14 @@ struct X86X64CallNode : public CallNode { //! runtime.release(fn); //! ~~~ //! -//! @section asmjit_compiler_Functions Functions +//! Functions +//! --------- //! //! To build functions with @c Compiler, see @c asmjit::Compiler::addFunc() //! method. //! -//! @section asmjit_compiler_Variables Variables +//! Variables +//! --------- //! //! Compiler is able to manage variables and function arguments. Function //! arguments are moved to variables by using @c setArg() method, where the @@ -880,7 +889,7 @@ struct X86X64CallNode : public CallNode { //! to not used variables (dereferenced to zero). //! - `kVarStateReg - State that means that variable is currently allocated in //! register. -//! - `kVarStateMem - State that means that variable is currently only in +//! - `kVarStateMem - State that means that variable is currently only in //! memory location. //! //! When you create new variable, initial state is always @c kVarStateUnused, @@ -905,7 +914,8 @@ struct X86X64CallNode : public CallNode { //! Please see AsmJit tutorials (testcompiler.cpp and testvariables.cpp) for //! more complete examples. //! -//! @section asmjit_compiler_MemoryManagement Memory Management +//! Memory Management +//! ----------------- //! //! @c Compiler Memory management follows these rules: //! - Everything created by @c Compiler is always freed by @c Compiler. @@ -922,7 +932,8 @@ struct X86X64CallNode : public CallNode { //! which is used internally by Compiler to store additional information about //! these objects. //! -//! @section asmjit_compiler_StateManagement Control-Flow and State Management. +//! Control-Flow and State Management +//! --------------------------------- //! //! The @c Compiler automatically manages state of the variables when using //! control flow instructions like jumps, conditional jumps and calls. There @@ -1001,7 +1012,7 @@ struct X86X64CallNode : public CallNode { //! //! The output: //! -//! @verbatim +//! ~~~ //! xor eax, eax ; xor var_0, var_0 //! xor ecx, ecx ; xor var_1, var_1 //! cmp eax, ecx ; cmp var_0, var_1 @@ -1022,7 +1033,7 @@ struct X86X64CallNode : public CallNode { //! mov ecx, [esp - 28] ; alloc var_1 //! jmp short L0 //! ; state-switch end -//! @endverbatim +//! ~~~ //! //! You can see that the state-switch section was generated (see L0_Switch0). //! The compiler is unable to restore state immediately when emitting the @@ -1109,7 +1120,7 @@ struct X86X64CallNode : public CallNode { //! Replacing the c.je(L0) by c.taken(); c.je(L0) //! will generate code like this: //! -//! @verbatim +//! ~~~ //! xor ecx, ecx ; xor var_0, var_0 //! xor edx, edx ; xor var_1, var_1 //! mov [esp - 24], ecx ; spill var_0 @@ -1128,12 +1139,13 @@ struct X86X64CallNode : public CallNode { //! mov [esp - 28], edx ; spill var_1 //! jmp short L0 //! ; state-switch end -//! @endverbatim +//! ~~~ //! //! This section provided information about how state-change works. The //! behavior is deterministic and it can be overridden. //! -//! @section asmjit_compiler_AdvancedCodeGeneration Advanced Code Generation +//! Advanced Code Generation +//! ------------------------ //! //! This section describes advanced method of code generation available to //! @c Compiler (but also to @c Assembler). When emitting code to instruction @@ -1202,7 +1214,7 @@ struct X86X64CallNode : public CallNode { //! //! Other use cases are waiting for you! Be sure that instruction you are //! emitting is correct and encodable, because if not, Assembler will set -//! status code to @c kErrorAssemblerUnknownInst. +//! status code to @c kErrorUnknownInst. struct X86X64Compiler : public BaseCompiler { ASMJIT_NO_COPY(X86X64Compiler) @@ -1221,35 +1233,35 @@ struct X86X64Compiler : public BaseCompiler { //! Create a new `InstNode`. ASMJIT_API InstNode* newInst(uint32_t code); - //! @overload + //! \overload ASMJIT_API InstNode* newInst(uint32_t code, const Operand& o0); - //! @overload + //! \overload ASMJIT_API InstNode* newInst(uint32_t code, const Operand& o0, const Operand& o1); - //! @overload + //! \overload ASMJIT_API InstNode* newInst(uint32_t code, const Operand& o0, const Operand& o1, const Operand& o2); - //! @overload + //! \overload ASMJIT_API InstNode* newInst(uint32_t code, const Operand& o0, const Operand& o1, const Operand& o2, const Operand& o3); - //! @overload + //! \overload ASMJIT_API InstNode* newInst(uint32_t code, const Operand& o0, const Operand& o1, const Operand& o2, const Operand& o3, const Operand& o4); //! Add a new `InstNode`. ASMJIT_API InstNode* emit(uint32_t code); - //! @overload + //! \overload ASMJIT_API InstNode* emit(uint32_t code, const Operand& o0); - //! @overload + //! \overload ASMJIT_API InstNode* emit(uint32_t code, const Operand& o0, const Operand& o1); - //! @overload + //! \overload ASMJIT_API InstNode* emit(uint32_t code, const Operand& o0, const Operand& o1, const Operand& o2); - //! @overload + //! \overload ASMJIT_API InstNode* emit(uint32_t code, const Operand& o0, const Operand& o1, const Operand& o2, const Operand& o3); - //! @overload + //! \overload ASMJIT_API InstNode* emit(uint32_t code, const Operand& o0, const Operand& o1, const Operand& o2, const Operand& o3, const Operand& o4); - //! @overload + //! \overload ASMJIT_API InstNode* emit(uint32_t code, int o0); - //! @overload + //! \overload ASMJIT_API InstNode* emit(uint32_t code, const Operand& o0, int o1); - //! @overload + //! \overload ASMJIT_API InstNode* emit(uint32_t code, const Operand& o0, const Operand& o1, int o2); // -------------------------------------------------------------------------- @@ -1261,8 +1273,8 @@ struct X86X64Compiler : public BaseCompiler { //! Add a new function. //! - //! @param conv Calling convention to use (see @c kFuncConv enum) - //! @param params Function arguments prototype. + //! \param conv Calling convention to use (see \ref kFuncConv enum) + //! \param params Function arguments prototype. //! //! This method is usually used as a first step when generating functions //! by @c Compiler. First parameter `cconv` specifies function calling @@ -1325,7 +1337,7 @@ struct X86X64Compiler : public BaseCompiler { //! Arguments are like variables. How to manipulate with variables is //! documented in @c asmjit::Compiler, variables section. //! - //! @note To get current function use @c currentFunction() method or save + //! \note To get current function use @c currentFunction() method or save //! pointer to @c asmjit::Function returned by @c asmjit::Compiler::addFunc<> //! method. Recommended is to save the pointer. //! @@ -1528,6 +1540,8 @@ struct X86X64Compiler : public BaseCompiler { ASMJIT_INLINE EmbedNode* dmm(const MmData& x) { return embed(&x, static_cast(sizeof(MmData))); } //! Add Xmm data to the instuction stream. ASMJIT_INLINE EmbedNode* dxmm(const XmmData& x) { return embed(&x, static_cast(sizeof(XmmData))); } + //! Add Ymm data to the instuction stream. + ASMJIT_INLINE EmbedNode* dymm(const YmmData& x) { return embed(&x, static_cast(sizeof(YmmData))); } //! Add data in a given structure instance to the instuction stream. template @@ -1557,45 +1571,45 @@ struct X86X64Compiler : public BaseCompiler { //! Add with carry. INST_2x(adc, kInstAdc, GpVar, GpVar) - //! @overload + //! \overload INST_2x(adc, kInstAdc, GpVar, Mem) - //! @overload + //! \overload INST_2i(adc, kInstAdc, GpVar, Imm) - //! @overload + //! \overload INST_2x(adc, kInstAdc, Mem, GpVar) - //! @overload + //! \overload INST_2i(adc, kInstAdc, Mem, Imm) //! Add. INST_2x(add, kInstAdd, GpVar, GpVar) - //! @overload + //! \overload INST_2x(add, kInstAdd, GpVar, Mem) - //! @overload + //! \overload INST_2i(add, kInstAdd, GpVar, Imm) - //! @overload + //! \overload INST_2x(add, kInstAdd, Mem, GpVar) - //! @overload + //! \overload INST_2i(add, kInstAdd, Mem, Imm) //! And. INST_2x(and_, kInstAnd, GpVar, GpVar) - //! @overload + //! \overload INST_2x(and_, kInstAnd, GpVar, Mem) - //! @overload + //! \overload INST_2i(and_, kInstAnd, GpVar, Imm) - //! @overload + //! \overload INST_2x(and_, kInstAnd, Mem, GpVar) - //! @overload + //! \overload INST_2i(and_, kInstAnd, Mem, Imm) //! Bit scan forward. INST_2x_(bsf, kInstBsf, GpVar, GpVar, !o0.isGpb()) - //! @overload + //! \overload INST_2x_(bsf, kInstBsf, GpVar, Mem, !o0.isGpb()) //! Bit scan reverse. INST_2x_(bsr, kInstBsr, GpVar, GpVar, !o0.isGpb()) - //! @overload + //! \overload INST_2x_(bsr, kInstBsr, GpVar, Mem, !o0.isGpb()) //! Byte swap (32-bit or 64-bit registers only) (i486). @@ -1603,58 +1617,58 @@ struct X86X64Compiler : public BaseCompiler { //! Bit test. INST_2x(bt, kInstBt, GpVar, GpVar) - //! @overload + //! \overload INST_2i(bt, kInstBt, GpVar, Imm) - //! @overload + //! \overload INST_2x(bt, kInstBt, Mem, GpVar) - //! @overload + //! \overload INST_2i(bt, kInstBt, Mem, Imm) //! Bit test and complement. INST_2x(btc, kInstBtc, GpVar, GpVar) - //! @overload + //! \overload INST_2i(btc, kInstBtc, GpVar, Imm) - //! @overload + //! \overload INST_2x(btc, kInstBtc, Mem, GpVar) - //! @overload + //! \overload INST_2i(btc, kInstBtc, Mem, Imm) //! Bit test and reset. INST_2x(btr, kInstBtr, GpVar, GpVar) - //! @overload + //! \overload INST_2i(btr, kInstBtr, GpVar, Imm) - //! @overload + //! \overload INST_2x(btr, kInstBtr, Mem, GpVar) - //! @overload + //! \overload INST_2i(btr, kInstBtr, Mem, Imm) //! Bit test and set. INST_2x(bts, kInstBts, GpVar, GpVar) - //! @overload + //! \overload INST_2i(bts, kInstBts, GpVar, Imm) - //! @overload + //! \overload INST_2x(bts, kInstBts, Mem, GpVar) - //! @overload + //! \overload INST_2i(bts, kInstBts, Mem, Imm) //! Call. ASMJIT_INLINE X86X64CallNode* call(const GpVar& dst, uint32_t conv, const FuncPrototype& p) { return addCall(dst, conv, p); } - //! @overload + //! \overload ASMJIT_INLINE X86X64CallNode* call(const Mem& dst, uint32_t conv, const FuncPrototype& p) { return addCall(dst, conv, p); } - //! @overload + //! \overload ASMJIT_INLINE X86X64CallNode* call(const Imm& dst, uint32_t conv, const FuncPrototype& p) { return addCall(dst, conv, p); } - //! @overload + //! \overload ASMJIT_INLINE X86X64CallNode* call(void* dst, uint32_t conv, const FuncPrototype& p) { Imm imm((intptr_t)dst); return addCall(imm, conv, p); } - //! @overload + //! \overload ASMJIT_INLINE X86X64CallNode* call(const Label& label, uint32_t conv, const FuncPrototype& p) { return addCall(label, conv, p); } @@ -1666,34 +1680,34 @@ struct X86X64Compiler : public BaseCompiler { //! Complement carry Flag. INST_0x(cmc, kInstCmc) - //! Convert byte to word (AX <- Sign Extend AL). + //! Convert BYTE to WORD (AX <- Sign Extend AL). INST_1x(cbw, kInstCbw, GpVar /* al */) - //! Convert word to dword (DX:AX <- Sign Extend AX). + //! Convert WORD to DWORD (DX:AX <- Sign Extend AX). INST_2x(cwd, kInstCwd, GpVar /* dx */, GpVar /* ax */) - //! Convert word to dword (EAX <- Sign Extend AX). + //! Convert WORD to DWORD (EAX <- Sign Extend AX). INST_1x(cwde, kInstCwde, GpVar /* eax */) - //! Convert dword to qword (EDX:EAX <- Sign Extend EAX). + //! Convert DWORD to QWORD (EDX:EAX <- Sign Extend EAX). INST_2x(cdq, kInstCdq, GpVar /* edx */, GpVar /* eax */) //! Conditional move. - INST_2cc(cmov, kInstCmov, condToCmovcc, GpVar, GpVar) + INST_2cc(cmov, kInstCmov, X86Util::condToCmovcc, GpVar, GpVar) //! Conditional move. - INST_2cc(cmov, kInstCmov, condToCmovcc, GpVar, Mem) + INST_2cc(cmov, kInstCmov, X86Util::condToCmovcc, GpVar, Mem) //! Compare two operands. INST_2x(cmp, kInstCmp, GpVar, GpVar) - //! @overload + //! \overload INST_2x(cmp, kInstCmp, GpVar, Mem) - //! @overload + //! \overload INST_2i(cmp, kInstCmp, GpVar, Imm) - //! @overload + //! \overload INST_2x(cmp, kInstCmp, Mem, GpVar) - //! @overload + //! \overload INST_2i(cmp, kInstCmp, Mem, Imm) //! Compare and exchange (i486). INST_3x(cmpxchg, kInstCmpxchg, GpVar /* eax */, GpVar, GpVar) - //! @overload + //! \overload INST_3x(cmpxchg, kInstCmpxchg, GpVar /* eax */, Mem, GpVar) //! Compares the 64-bit value in EDX:EAX with the memory operand (Pentium). @@ -1722,50 +1736,50 @@ struct X86X64Compiler : public BaseCompiler { //! Accumulate crc32 value (polynomial 0x11EDC6F41) (SSE4.2). INST_2x_(crc32, kInstCrc32, GpVar, GpVar, o0.isRegType(kRegTypeGpd) || o0.isRegType(kRegTypeGpq)) - //! @overload + //! \overload INST_2x_(crc32, kInstCrc32, GpVar, Mem, o0.isRegType(kRegTypeGpd) || o0.isRegType(kRegTypeGpq)) //! Decrement by 1. INST_1x(dec, kInstDec, GpVar) - //! @overload + //! \overload INST_1x(dec, kInstDec, Mem) //! Unsigned divide (o0:o1 <- o0:o1 / o2). //! //! Remainder is stored in `o0`, quotient is stored in `o1`. INST_3x_(div, kInstDiv, GpVar, GpVar, GpVar, o0.getId() != o1.getId()) - //! @overload + //! \overload INST_3x_(div, kInstDiv, GpVar, GpVar, Mem, o0.getId() != o1.getId()) //! Signed divide (o0:o1 <- o0:o1 / o2). //! //! Remainder is stored in `o0`, quotient is stored in `o1`. INST_3x_(idiv, kInstIdiv, GpVar, GpVar, GpVar, o0.getId() != o1.getId()) - //! @overload + //! \overload INST_3x_(idiv, kInstIdiv, GpVar, GpVar, Mem, o0.getId() != o1.getId()) //! Signed multiply (o0:o1 <- o1 * o2). //! //! Hi value is stored in `o0`, lo value is stored in `o1`. INST_3x_(imul, kInstImul, GpVar, GpVar, GpVar, o0.getId() != o1.getId()) - //! @overload + //! \overload INST_3x_(imul, kInstImul, GpVar, GpVar, Mem, o0.getId() != o1.getId()) //! Signed multiply. INST_2x(imul, kInstImul, GpVar, GpVar) - //! @overload + //! \overload INST_2x(imul, kInstImul, GpVar, Mem) - //! @overload + //! \overload INST_2i(imul, kInstImul, GpVar, Imm) //! Signed multiply. INST_3i(imul, kInstImul, GpVar, GpVar, Imm) - //! @overload + //! \overload INST_3i(imul, kInstImul, GpVar, Mem, Imm) //! Increment by 1. INST_1x(inc, kInstInc, GpVar) - //! @overload + //! \overload INST_1x(inc, kInstInc, Mem) //! Interrupt. @@ -1774,17 +1788,20 @@ struct X86X64Compiler : public BaseCompiler { ASMJIT_INLINE InstNode* int3() { return int_(3); } //! Jump to label `label` if condition `cc` is met. - INST_1cc(j, kInstJ, condToJcc, Label) + INST_1cc(j, kInstJ, X86Util::condToJcc, Label) + + //! Short jump if CX/ECX/RCX is zero. + INST_2x(jecxz, kInstJecxz, GpVar, Label) //! Jump. INST_1x(jmp, kInstJmp, GpVar) - //! @overload + //! \overload INST_1x(jmp, kInstJmp, Mem) - //! @overload + //! \overload INST_1x(jmp, kInstJmp, Label) - //! @overload + //! \overload INST_1x(jmp, kInstJmp, Imm) - //! @overload + //! \overload ASMJIT_INLINE InstNode* jmp(void* dst) { return jmp(Imm((intptr_t)dst)); } //! Load AH from flags. @@ -1795,22 +1812,22 @@ struct X86X64Compiler : public BaseCompiler { //! Move. INST_2x(mov, kInstMov, GpVar, GpVar) - //! @overload + //! \overload INST_2x(mov, kInstMov, GpVar, Mem) - //! @overload + //! \overload INST_2i(mov, kInstMov, GpVar, Imm) - //! @overload + //! \overload INST_2x(mov, kInstMov, Mem, GpVar) - //! @overload + //! \overload INST_2i(mov, kInstMov, Mem, Imm) //! Move from segment register. INST_2x(mov, kInstMov, GpVar, SegReg) - //! @overload + //! \overload INST_2x(mov, kInstMov, Mem, SegReg) //! Move to segment register. INST_2x(mov, kInstMov, SegReg, GpVar) - //! @overload + //! \overload INST_2x(mov, kInstMov, SegReg, Mem) //! Move (AL|AX|EAX|RAX <- absolute address in immediate). @@ -1826,27 +1843,27 @@ struct X86X64Compiler : public BaseCompiler { //! Move data after swapping bytes (SSE3 - Atom). INST_2x_(movbe, kInstMovbe, GpVar, Mem, !o0.isGpb()); - //! @overload + //! \overload INST_2x_(movbe, kInstMovbe, Mem, GpVar, !o1.isGpb()); //! Move with sign-extension. INST_2x(movsx, kInstMovsx, GpVar, GpVar) - //! @overload + //! \overload INST_2x(movsx, kInstMovsx, GpVar, Mem) //! Move with zero-extension. INST_2x(movzx, kInstMovzx, GpVar, GpVar) - //! @overload + //! \overload INST_2x(movzx, kInstMovzx, GpVar, Mem) //! Unsigned multiply (o0:o1 <- o1 * o2). INST_3x_(mul, kInstMul, GpVar, GpVar, GpVar, o0.getId() != o1.getId()) - //! @overload + //! \overload INST_3x_(mul, kInstMul, GpVar, GpVar, Mem, o0.getId() != o1.getId()) //! Two's complement negation. INST_1x(neg, kInstNeg, GpVar) - //! @overload + //! \overload INST_1x(neg, kInstNeg, Mem) //! No operation. @@ -1854,23 +1871,23 @@ struct X86X64Compiler : public BaseCompiler { //! One's complement negation. INST_1x(not_, kInstNot, GpVar) - //! @overload + //! \overload INST_1x(not_, kInstNot, Mem) //! Or. INST_2x(or_, kInstOr, GpVar, GpVar) - //! @overload + //! \overload INST_2x(or_, kInstOr, GpVar, Mem) - //! @overload + //! \overload INST_2i(or_, kInstOr, GpVar, Imm) - //! @overload + //! \overload INST_2x(or_, kInstOr, Mem, GpVar) - //! @overload + //! \overload INST_2i(or_, kInstOr, Mem, Imm) //! Pop a value from the stack. INST_1x_(pop, kInstPop, GpVar, o0.getSize() == 2 || o0.getSize() == _regSize) - //! @overload + //! \overload INST_1x_(pop, kInstPop, Mem, o0.getSize() == 2 || o0.getSize() == _regSize) //! Pop stack into EFLAGS Register (32-bit or 64-bit). @@ -1878,16 +1895,16 @@ struct X86X64Compiler : public BaseCompiler { //! Return the count of number of bits set to 1 (SSE4.2). INST_2x_(popcnt, kInstPopcnt, GpVar, GpVar, !o0.isGpb() && o0.getSize() == o1.getSize()) - //! @overload + //! \overload INST_2x_(popcnt, kInstPopcnt, GpVar, Mem, !o0.isGpb()) - //! Push word/dword/qword on the stack. + //! Push WORD or DWORD/QWORD on the stack. INST_1x_(push, kInstPush, GpVar, o0.getSize() == 2 || o0.getSize() == _regSize) - //! Push word/dword/qword on the stack. + //! Push WORD or DWORD/QWORD on the stack. INST_1x_(push, kInstPush, Mem,o0.getSize() == 2 || o0.getSize() == _regSize) //! Push segment register on the stack. INST_1x(push, kInstPush, SegReg) - //! Push word/dword/qword on the stack. + //! Push WORD or DWORD/QWORD on the stack. INST_1i(push, kInstPush, Imm) //! Push EFLAGS register (32-bit or 64-bit) on the stack. @@ -1895,20 +1912,20 @@ struct X86X64Compiler : public BaseCompiler { //! Rotate bits left. INST_2x(rcl, kInstRcl, GpVar, GpVar) - //! @overload + //! \overload INST_2x(rcl, kInstRcl, Mem, GpVar) //! Rotate bits left. INST_2i(rcl, kInstRcl, GpVar, Imm) - //! @overload + //! \overload INST_2i(rcl, kInstRcl, Mem, Imm) //! Rotate bits right. INST_2x(rcr, kInstRcr, GpVar, GpVar) - //! @overload + //! \overload INST_2x(rcr, kInstRcr, Mem, GpVar) //! Rotate bits right. INST_2i(rcr, kInstRcr, GpVar, Imm) - //! @overload + //! \overload INST_2i(rcr, kInstRcr, Mem, Imm) //! Read time-stamp counter (Pentium). @@ -1967,31 +1984,31 @@ struct X86X64Compiler : public BaseCompiler { //! Return. ASMJIT_INLINE RetNode* ret() { return addRet(noOperand, noOperand); } - //! @overload + //! \overload ASMJIT_INLINE RetNode* ret(const GpVar& o0) { return addRet(o0, noOperand); } - //! @overload + //! \overload ASMJIT_INLINE RetNode* ret(const GpVar& o0, const GpVar& o1) { return addRet(o0, o1); } - //! @overload + //! \overload ASMJIT_INLINE RetNode* ret(const XmmVar& o0) { return addRet(o0, noOperand); } - //! @overload + //! \overload ASMJIT_INLINE RetNode* ret(const XmmVar& o0, const XmmVar& o1) { return addRet(o0, o1); } //! Rotate bits left. INST_2x(rol, kInstRol, GpVar, GpVar) - //! @overload + //! \overload INST_2x(rol, kInstRol, Mem, GpVar) //! Rotate bits left. INST_2i(rol, kInstRol, GpVar, Imm) - //! @overload + //! \overload INST_2i(rol, kInstRol, Mem, Imm) //! Rotate bits right. INST_2x(ror, kInstRor, GpVar, GpVar) - //! @overload + //! \overload INST_2x(ror, kInstRor, Mem, GpVar) //! Rotate bits right. INST_2i(ror, kInstRor, GpVar, Imm) - //! @overload + //! \overload INST_2i(ror, kInstRor, Mem, Imm) //! Store `a` (allocated in AH/AX/EAX/RAX) into Flags. @@ -1999,72 +2016,72 @@ struct X86X64Compiler : public BaseCompiler { //! Integer subtraction with borrow. INST_2x(sbb, kInstSbb, GpVar, GpVar) - //! @overload + //! \overload INST_2x(sbb, kInstSbb, GpVar, Mem) - //! @overload + //! \overload INST_2i(sbb, kInstSbb, GpVar, Imm) - //! @overload + //! \overload INST_2x(sbb, kInstSbb, Mem, GpVar) - //! @overload + //! \overload INST_2i(sbb, kInstSbb, Mem, Imm) //! Shift bits left. INST_2x(sal, kInstSal, GpVar, GpVar) - //! @overload + //! \overload INST_2x(sal, kInstSal, Mem, GpVar) //! Shift bits left. INST_2i(sal, kInstSal, GpVar, Imm) - //! @overload + //! \overload INST_2i(sal, kInstSal, Mem, Imm) //! Shift bits right. INST_2x(sar, kInstSar, GpVar, GpVar) - //! @overload + //! \overload INST_2x(sar, kInstSar, Mem, GpVar) //! Shift bits right. INST_2i(sar, kInstSar, GpVar, Imm) - //! @overload + //! \overload INST_2i(sar, kInstSar, Mem, Imm) //! Set byte on condition. - INST_1cc(set, kInstSet, condToSetcc, GpVar) + INST_1cc(set, kInstSet, X86Util::condToSetcc, GpVar) //! Set byte on condition. - INST_1cc(set, kInstSet, condToSetcc, Mem) + INST_1cc(set, kInstSet, X86Util::condToSetcc, Mem) //! Shift bits left. INST_2x(shl, kInstShl, GpVar, GpVar) - //! @overload + //! \overload INST_2x(shl, kInstShl, Mem, GpVar) //! Shift bits left. INST_2i(shl, kInstShl, GpVar, Imm) - //! @overload + //! \overload INST_2i(shl, kInstShl, Mem, Imm) //! Shift bits right. INST_2x(shr, kInstShr, GpVar, GpVar) - //! @overload + //! \overload INST_2x(shr, kInstShr, Mem, GpVar) //! Shift bits right. INST_2i(shr, kInstShr, GpVar, Imm) - //! @overload + //! \overload INST_2i(shr, kInstShr, Mem, Imm) //! Double precision shift left. INST_3x(shld, kInstShld, GpVar, GpVar, GpVar) - //! @overload + //! \overload INST_3x(shld, kInstShld, Mem, GpVar, GpVar) //! Double precision shift left. INST_3i(shld, kInstShld, GpVar, GpVar, Imm) - //! @overload + //! \overload INST_3i(shld, kInstShld, Mem, GpVar, Imm) //! Double precision shift right. INST_3x(shrd, kInstShrd, GpVar, GpVar, GpVar) - //! @overload + //! \overload INST_3x(shrd, kInstShrd, Mem, GpVar, GpVar) //! Double precision shift right. INST_3i(shrd, kInstShrd, GpVar, GpVar, Imm) - //! @overload + //! \overload INST_3i(shrd, kInstShrd, Mem, GpVar, Imm) //! Set carry flag to 1. @@ -2074,22 +2091,22 @@ struct X86X64Compiler : public BaseCompiler { //! Subtract. INST_2x(sub, kInstSub, GpVar, GpVar) - //! @overload + //! \overload INST_2x(sub, kInstSub, GpVar, Mem) - //! @overload + //! \overload INST_2i(sub, kInstSub, GpVar, Imm) - //! @overload + //! \overload INST_2x(sub, kInstSub, Mem, GpVar) - //! @overload + //! \overload INST_2i(sub, kInstSub, Mem, Imm) //! Logical compare. INST_2x(test, kInstTest, GpVar, GpVar) - //! @overload + //! \overload INST_2i(test, kInstTest, GpVar, Imm) - //! @overload + //! \overload INST_2x(test, kInstTest, Mem, GpVar) - //! @overload + //! \overload INST_2i(test, kInstTest, Mem, Imm) //! Undefined instruction - Raise #UD exception. @@ -2097,25 +2114,25 @@ struct X86X64Compiler : public BaseCompiler { //! Exchange and add. INST_2x(xadd, kInstXadd, GpVar, GpVar) - //! @overload + //! \overload INST_2x(xadd, kInstXadd, Mem, GpVar) //! Exchange register/memory with register. INST_2x(xchg, kInstXchg, GpVar, GpVar) - //! @overload + //! \overload INST_2x(xchg, kInstXchg, Mem, GpVar) - //! @overload + //! \overload INST_2x(xchg, kInstXchg, GpVar, Mem) //! Xor. INST_2x(xor_, kInstXor, GpVar, GpVar) - //! @overload + //! \overload INST_2x(xor_, kInstXor, GpVar, Mem) - //! @overload + //! \overload INST_2i(xor_, kInstXor, GpVar, Imm) - //! @overload + //! \overload INST_2x(xor_, kInstXor, Mem, GpVar) - //! @overload + //! \overload INST_2i(xor_, kInstXor, Mem, Imm) // -------------------------------------------------------------------------- @@ -2124,254 +2141,254 @@ struct X86X64Compiler : public BaseCompiler { //! Move DWORD (MMX). INST_2x(movd, kInstMovd, Mem, MmVar) - //! @overload + //! \overload INST_2x(movd, kInstMovd, GpVar, MmVar) - //! @overload + //! \overload INST_2x(movd, kInstMovd, MmVar, Mem) - //! @overload + //! \overload INST_2x(movd, kInstMovd, MmVar, GpVar) //! Move QWORD (MMX). INST_2x(movq, kInstMovq, MmVar, MmVar) - //! @overload + //! \overload INST_2x(movq, kInstMovq, Mem, MmVar) - //! @overload + //! \overload INST_2x(movq, kInstMovq, MmVar, Mem) //! Pack DWORDs to WORDs with signed saturation (MMX). INST_2x(packssdw, kInstPackssdw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(packssdw, kInstPackssdw, MmVar, Mem) //! Pack WORDs to BYTEs with signed saturation (MMX). INST_2x(packsswb, kInstPacksswb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(packsswb, kInstPacksswb, MmVar, Mem) //! Pack WORDs to BYTEs with unsigned saturation (MMX). INST_2x(packuswb, kInstPackuswb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(packuswb, kInstPackuswb, MmVar, Mem) //! Packed BYTE add (MMX). INST_2x(paddb, kInstPaddb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(paddb, kInstPaddb, MmVar, Mem) //! Packed DWORD add (MMX). INST_2x(paddd, kInstPaddd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(paddd, kInstPaddd, MmVar, Mem) //! Packed BYTE add with saturation (MMX). INST_2x(paddsb, kInstPaddsb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(paddsb, kInstPaddsb, MmVar, Mem) //! Packed WORD add with saturation (MMX). INST_2x(paddsw, kInstPaddsw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(paddsw, kInstPaddsw, MmVar, Mem) //! Packed BYTE add with unsigned saturation (MMX). INST_2x(paddusb, kInstPaddusb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(paddusb, kInstPaddusb, MmVar, Mem) //! Packed WORD add with unsigned saturation (MMX). INST_2x(paddusw, kInstPaddusw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(paddusw, kInstPaddusw, MmVar, Mem) //! Packed WORD add (MMX). INST_2x(paddw, kInstPaddw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(paddw, kInstPaddw, MmVar, Mem) //! Packed and (MMX). INST_2x(pand, kInstPand, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pand, kInstPand, MmVar, Mem) //! Packed and-not (MMX). INST_2x(pandn, kInstPandn, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pandn, kInstPandn, MmVar, Mem) //! Packed BYTEs compare for equality (MMX). INST_2x(pcmpeqb, kInstPcmpeqb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pcmpeqb, kInstPcmpeqb, MmVar, Mem) //! Packed DWORDs compare for equality (MMX). INST_2x(pcmpeqd, kInstPcmpeqd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pcmpeqd, kInstPcmpeqd, MmVar, Mem) //! Packed WORDs compare for equality (MMX). INST_2x(pcmpeqw, kInstPcmpeqw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pcmpeqw, kInstPcmpeqw, MmVar, Mem) //! Packed BYTEs compare if greater than (MMX). INST_2x(pcmpgtb, kInstPcmpgtb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pcmpgtb, kInstPcmpgtb, MmVar, Mem) //! Packed DWORDs compare if greater than (MMX). INST_2x(pcmpgtd, kInstPcmpgtd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pcmpgtd, kInstPcmpgtd, MmVar, Mem) //! Packed WORDs compare if greater than (MMX). INST_2x(pcmpgtw, kInstPcmpgtw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pcmpgtw, kInstPcmpgtw, MmVar, Mem) //! Packed WORD multiply high (MMX). INST_2x(pmulhw, kInstPmulhw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pmulhw, kInstPmulhw, MmVar, Mem) //! Packed WORD multiply low (MMX). INST_2x(pmullw, kInstPmullw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pmullw, kInstPmullw, MmVar, Mem) //! Packed bitwise or (MMX). INST_2x(por, kInstPor, MmVar, MmVar) - //! @overload + //! \overload INST_2x(por, kInstPor, MmVar, Mem) //! Packed WORD multiply and add to packed DWORD (MMX). INST_2x(pmaddwd, kInstPmaddwd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pmaddwd, kInstPmaddwd, MmVar, Mem) //! Packed DWORD shift left logical (MMX). INST_2x(pslld, kInstPslld, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pslld, kInstPslld, MmVar, Mem) - //! @overload + //! \overload INST_2i(pslld, kInstPslld, MmVar, Imm) //! Packed QWORD shift left logical (MMX). INST_2x(psllq, kInstPsllq, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psllq, kInstPsllq, MmVar, Mem) - //! @overload + //! \overload INST_2i(psllq, kInstPsllq, MmVar, Imm) //! Packed WORD shift left logical (MMX). INST_2x(psllw, kInstPsllw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psllw, kInstPsllw, MmVar, Mem) - //! @overload + //! \overload INST_2i(psllw, kInstPsllw, MmVar, Imm) //! Packed DWORD shift right arithmetic (MMX). INST_2x(psrad, kInstPsrad, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psrad, kInstPsrad, MmVar, Mem) - //! @overload + //! \overload INST_2i(psrad, kInstPsrad, MmVar, Imm) //! Packed WORD shift right arithmetic (MMX). INST_2x(psraw, kInstPsraw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psraw, kInstPsraw, MmVar, Mem) - //! @overload + //! \overload INST_2i(psraw, kInstPsraw, MmVar, Imm) //! Packed DWORD shift right logical (MMX). INST_2x(psrld, kInstPsrld, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psrld, kInstPsrld, MmVar, Mem) - //! @overload + //! \overload INST_2i(psrld, kInstPsrld, MmVar, Imm) //! Packed QWORD shift right logical (MMX). INST_2x(psrlq, kInstPsrlq, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psrlq, kInstPsrlq, MmVar, Mem) - //! @overload + //! \overload INST_2i(psrlq, kInstPsrlq, MmVar, Imm) //! Packed WORD shift right logical (MMX). INST_2x(psrlw, kInstPsrlw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psrlw, kInstPsrlw, MmVar, Mem) - //! @overload + //! \overload INST_2i(psrlw, kInstPsrlw, MmVar, Imm) //! Packed BYTE subtract (MMX). INST_2x(psubb, kInstPsubb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psubb, kInstPsubb, MmVar, Mem) //! Packed DWORD subtract (MMX). INST_2x(psubd, kInstPsubd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psubd, kInstPsubd, MmVar, Mem) //! Packed BYTE subtract with saturation (MMX). INST_2x(psubsb, kInstPsubsb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psubsb, kInstPsubsb, MmVar, Mem) //! Packed WORD subtract with saturation (MMX). INST_2x(psubsw, kInstPsubsw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psubsw, kInstPsubsw, MmVar, Mem) //! Packed BYTE subtract with unsigned saturation (MMX). INST_2x(psubusb, kInstPsubusb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psubusb, kInstPsubusb, MmVar, Mem) //! Packed WORD subtract with unsigned saturation (MMX). INST_2x(psubusw, kInstPsubusw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psubusw, kInstPsubusw, MmVar, Mem) //! Packed WORD subtract (MMX). INST_2x(psubw, kInstPsubw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psubw, kInstPsubw, MmVar, Mem) //! Unpack high packed BYTEs to WORDs (MMX). INST_2x(punpckhbw, kInstPunpckhbw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(punpckhbw, kInstPunpckhbw, MmVar, Mem) //! Unpack high packed DWORDs to QWORDs (MMX). INST_2x(punpckhdq, kInstPunpckhdq, MmVar, MmVar) - //! @overload + //! \overload INST_2x(punpckhdq, kInstPunpckhdq, MmVar, Mem) //! Unpack high packed WORDs to DWORDs (MMX). INST_2x(punpckhwd, kInstPunpckhwd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(punpckhwd, kInstPunpckhwd, MmVar, Mem) //! Unpack low packed BYTEs to WORDs (MMX). INST_2x(punpcklbw, kInstPunpcklbw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(punpcklbw, kInstPunpcklbw, MmVar, Mem) //! Unpack low packed DWORDs to QWORDs (MMX). INST_2x(punpckldq, kInstPunpckldq, MmVar, MmVar) - //! @overload + //! \overload INST_2x(punpckldq, kInstPunpckldq, MmVar, Mem) //! Unpack low packed WORDs to DWORDs (MMX). INST_2x(punpcklwd, kInstPunpcklwd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(punpcklwd, kInstPunpcklwd, MmVar, Mem) //! Packed bitwise xor (MMX). INST_2x(pxor, kInstPxor, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pxor, kInstPxor, MmVar, Mem) //! Empty MMX state. @@ -2383,112 +2400,112 @@ struct X86X64Compiler : public BaseCompiler { //! Packed SP-FP to DWORD convert (3dNow!). INST_2x(pf2id, kInstPf2id, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pf2id, kInstPf2id, MmVar, Mem) //! Packed SP-FP to WORD convert (3dNow!). INST_2x(pf2iw, kInstPf2iw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pf2iw, kInstPf2iw, MmVar, Mem) //! Packed SP-FP accumulate (3dNow!). INST_2x(pfacc, kInstPfacc, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfacc, kInstPfacc, MmVar, Mem) //! Packed SP-FP addition (3dNow!). INST_2x(pfadd, kInstPfadd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfadd, kInstPfadd, MmVar, Mem) //! Packed SP-FP compare - dst == src (3dNow!). INST_2x(pfcmpeq, kInstPfcmpeq, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfcmpeq, kInstPfcmpeq, MmVar, Mem) //! Packed SP-FP compare - dst >= src (3dNow!). INST_2x(pfcmpge, kInstPfcmpge, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfcmpge, kInstPfcmpge, MmVar, Mem) //! Packed SP-FP compare - dst > src (3dNow!). INST_2x(pfcmpgt, kInstPfcmpgt, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfcmpgt, kInstPfcmpgt, MmVar, Mem) //! Packed SP-FP maximum (3dNow!). INST_2x(pfmax, kInstPfmax, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfmax, kInstPfmax, MmVar, Mem) //! Packed SP-FP minimum (3dNow!). INST_2x(pfmin, kInstPfmin, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfmin, kInstPfmin, MmVar, Mem) //! Packed SP-FP multiply (3dNow!). INST_2x(pfmul, kInstPfmul, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfmul, kInstPfmul, MmVar, Mem) //! Packed SP-FP negative accumulate (3dNow!). INST_2x(pfnacc, kInstPfnacc, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfnacc, kInstPfnacc, MmVar, Mem) //! Packed SP-FP mixed accumulate (3dNow!). INST_2x(pfpnacc, kInstPfpnacc, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfpnacc, kInstPfpnacc, MmVar, Mem) //! Packed SP-FP reciprocal approximation (3dNow!). INST_2x(pfrcp, kInstPfrcp, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfrcp, kInstPfrcp, MmVar, Mem) //! Packed SP-FP reciprocal, first iteration step (3dNow!). INST_2x(pfrcpit1, kInstPfrcpit1, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfrcpit1, kInstPfrcpit1, MmVar, Mem) //! Packed SP-FP reciprocal, second iteration step (3dNow!). INST_2x(pfrcpit2, kInstPfrcpit2, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfrcpit2, kInstPfrcpit2, MmVar, Mem) //! Packed SP-FP reciprocal square root, first iteration step (3dNow!). INST_2x(pfrsqit1, kInstPfrsqit1, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfrsqit1, kInstPfrsqit1, MmVar, Mem) //! Packed SP-FP reciprocal square root approximation (3dNow!). INST_2x(pfrsqrt, kInstPfrsqrt, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfrsqrt, kInstPfrsqrt, MmVar, Mem) //! Packed SP-FP subtract (3dNow!). INST_2x(pfsub, kInstPfsub, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfsub, kInstPfsub, MmVar, Mem) //! Packed SP-FP reverse subtract (3dNow!). INST_2x(pfsubr, kInstPfsubr, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pfsubr, kInstPfsubr, MmVar, Mem) //! Packed DWORDs to SP-FP (3dNow!). INST_2x(pi2fd, kInstPi2fd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pi2fd, kInstPi2fd, MmVar, Mem) //! Packed WORDs to SP-FP (3dNow!). INST_2x(pi2fw, kInstPi2fw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pi2fw, kInstPi2fw, MmVar, Mem) //! Packed swap DWORDs (3dNow!) INST_2x(pswapd, kInstPswapd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pswapd, kInstPswapd, MmVar, Mem) //! Prefetch (3dNow!). @@ -2506,126 +2523,126 @@ struct X86X64Compiler : public BaseCompiler { //! Packed SP-FP add (SSE). INST_2x(addps, kInstAddps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(addps, kInstAddps, XmmVar, Mem) //! Scalar SP-FP add (SSE). INST_2x(addss, kInstAddss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(addss, kInstAddss, XmmVar, Mem) //! Packed SP-FP bitwise and-not (SSE). INST_2x(andnps, kInstAndnps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(andnps, kInstAndnps, XmmVar, Mem) //! Packed SP-FP bitwise and (SSE). INST_2x(andps, kInstAndps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(andps, kInstAndps, XmmVar, Mem) //! Packed SP-FP compare (SSE). INST_3i(cmpps, kInstCmpps, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(cmpps, kInstCmpps, XmmVar, Mem, Imm) //! Compare scalar SP-FP Values (SSE). INST_3i(cmpss, kInstCmpss, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(cmpss, kInstCmpss, XmmVar, Mem, Imm) //! Scalar ordered SP-FP compare and set EFLAGS (SSE). INST_2x(comiss, kInstComiss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(comiss, kInstComiss, XmmVar, Mem) //! Packed signed INT32 to packed SP-FP conversion (SSE). INST_2x(cvtpi2ps, kInstCvtpi2ps, XmmVar, MmVar) - //! @overload + //! \overload INST_2x(cvtpi2ps, kInstCvtpi2ps, XmmVar, Mem) //! Packed SP-FP to packed INT32 conversion (SSE). INST_2x(cvtps2pi, kInstCvtps2pi, MmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtps2pi, kInstCvtps2pi, MmVar, Mem) //! Convert scalar INT32 to SP-FP (SSE). INST_2x(cvtsi2ss, kInstCvtsi2ss, XmmVar, GpVar) - //! @overload + //! \overload INST_2x(cvtsi2ss, kInstCvtsi2ss, XmmVar, Mem) //! Convert scalar SP-FP to INT32 (SSE). INST_2x(cvtss2si, kInstCvtss2si, GpVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtss2si, kInstCvtss2si, GpVar, Mem) //! Convert with truncation packed SP-FP to packed INT32 (SSE). INST_2x(cvttps2pi, kInstCvttps2pi, MmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvttps2pi, kInstCvttps2pi, MmVar, Mem) //! Convert with truncation scalar SP-FP to INT32 (SSE). INST_2x(cvttss2si, kInstCvttss2si, GpVar, XmmVar) - //! @overload + //! \overload INST_2x(cvttss2si, kInstCvttss2si, GpVar, Mem) //! Packed SP-FP divide (SSE). INST_2x(divps, kInstDivps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(divps, kInstDivps, XmmVar, Mem) //! Scalar SP-FP divide (SSE). INST_2x(divss, kInstDivss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(divss, kInstDivss, XmmVar, Mem) //! Load streaming SIMD extension control/status (SSE). INST_1x(ldmxcsr, kInstLdmxcsr, Mem) //! Byte mask write (SSE). - INST_3x(maskmovq, kInstMaskmovq, GpVar, MmVar, MmVar) + INST_3x(maskmovq, kInstMaskmovq, GpVar /* zdi */, MmVar, MmVar) //! Packed SP-FP maximum (SSE). INST_2x(maxps, kInstMaxps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(maxps, kInstMaxps, XmmVar, Mem) //! Scalar SP-FP maximum (SSE). INST_2x(maxss, kInstMaxss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(maxss, kInstMaxss, XmmVar, Mem) //! Packed SP-FP minimum (SSE). INST_2x(minps, kInstMinps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(minps, kInstMinps, XmmVar, Mem) //! Scalar SP-FP minimum (SSE). INST_2x(minss, kInstMinss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(minss, kInstMinss, XmmVar, Mem) //! Move aligned packed SP-FP (SSE). INST_2x(movaps, kInstMovaps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movaps, kInstMovaps, XmmVar, Mem) //! Move aligned packed SP-FP (SSE). INST_2x(movaps, kInstMovaps, Mem, XmmVar) //! Move DWORD. INST_2x(movd, kInstMovd, Mem, XmmVar) - //! @overload + //! \overload INST_2x(movd, kInstMovd, GpVar, XmmVar) - //! @overload + //! \overload INST_2x(movd, kInstMovd, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movd, kInstMovd, XmmVar, GpVar) //! Move QWORD (SSE). INST_2x(movq, kInstMovq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movq, kInstMovq, Mem, XmmVar) - //! @overload + //! \overload INST_2x(movq, kInstMovq, XmmVar, Mem) //! Move QWORD using NT hint (SSE). @@ -2652,41 +2669,41 @@ struct X86X64Compiler : public BaseCompiler { //! Move scalar SP-FP (SSE). INST_2x(movss, kInstMovss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movss, kInstMovss, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movss, kInstMovss, Mem, XmmVar) //! Move unaligned packed SP-FP (SSE). INST_2x(movups, kInstMovups, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movups, kInstMovups, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movups, kInstMovups, Mem, XmmVar) //! Packed SP-FP multiply (SSE). INST_2x(mulps, kInstMulps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(mulps, kInstMulps, XmmVar, Mem) //! Scalar SP-FP multiply (SSE). INST_2x(mulss, kInstMulss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(mulss, kInstMulss, XmmVar, Mem) //! Packed SP-FP bitwise or (SSE). INST_2x(orps, kInstOrps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(orps, kInstOrps, XmmVar, Mem) //! Packed BYTE average (SSE). INST_2x(pavgb, kInstPavgb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pavgb, kInstPavgb, MmVar, Mem) //! Packed WORD average (SSE). INST_2x(pavgw, kInstPavgw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pavgw, kInstPavgw, MmVar, Mem) //! Extract WORD based on selector (SSE). @@ -2694,27 +2711,27 @@ struct X86X64Compiler : public BaseCompiler { //! Insert WORD based on selector (SSE). INST_3i(pinsrw, kInstPinsrw, MmVar, GpVar, Imm) - //! @overload + //! \overload INST_3i(pinsrw, kInstPinsrw, MmVar, Mem, Imm) //! Packed WORD maximum (SSE). INST_2x(pmaxsw, kInstPmaxsw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pmaxsw, kInstPmaxsw, MmVar, Mem) //! Packed BYTE unsigned maximum (SSE). INST_2x(pmaxub, kInstPmaxub, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pmaxub, kInstPmaxub, MmVar, Mem) //! Packed WORD minimum (SSE). INST_2x(pminsw, kInstPminsw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pminsw, kInstPminsw, MmVar, Mem) //! Packed BYTE unsigned minimum (SSE). INST_2x(pminub, kInstPminub, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pminub, kInstPminub, MmVar, Mem) //! Move byte mask to integer (SSE). @@ -2722,27 +2739,27 @@ struct X86X64Compiler : public BaseCompiler { //! Packed WORD unsigned multiply high (SSE). INST_2x(pmulhuw, kInstPmulhuw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pmulhuw, kInstPmulhuw, MmVar, Mem) //! Packed WORD sum of absolute differences (SSE). INST_2x(psadbw, kInstPsadbw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psadbw, kInstPsadbw, MmVar, Mem) //! Packed WORD shuffle (SSE). INST_3i(pshufw, kInstPshufw, MmVar, MmVar, Imm) - //! @overload + //! \overload INST_3i(pshufw, kInstPshufw, MmVar, Mem, Imm) //! Packed SP-FP reciprocal (SSE). INST_2x(rcpps, kInstRcpps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(rcpps, kInstRcpps, XmmVar, Mem) //! Scalar SP-FP reciprocal (SSE). INST_2x(rcpss, kInstRcpss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(rcpss, kInstRcpss, XmmVar, Mem) //! Prefetch (SSE). @@ -2750,17 +2767,17 @@ struct X86X64Compiler : public BaseCompiler { //! Packed WORD sum of absolute differences (SSE). INST_2x(psadbw, kInstPsadbw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psadbw, kInstPsadbw, XmmVar, Mem) //! Packed SP-FP Square root reciprocal (SSE). INST_2x(rsqrtps, kInstRsqrtps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(rsqrtps, kInstRsqrtps, XmmVar, Mem) //! Scalar SP-FP Square root reciprocal (SSE). INST_2x(rsqrtss, kInstRsqrtss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(rsqrtss, kInstRsqrtss, XmmVar, Mem) //! Store fence (SSE). @@ -2768,17 +2785,17 @@ struct X86X64Compiler : public BaseCompiler { //! Shuffle SP-FP (SSE). INST_3i(shufps, kInstShufps, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(shufps, kInstShufps, XmmVar, Mem, Imm) //! Packed SP-FP square root (SSE). INST_2x(sqrtps, kInstSqrtps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(sqrtps, kInstSqrtps, XmmVar, Mem) //! Scalar SP-FP square root (SSE). INST_2x(sqrtss, kInstSqrtss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(sqrtss, kInstSqrtss, XmmVar, Mem) //! Store streaming SIMD extension control/status (SSE). @@ -2786,32 +2803,32 @@ struct X86X64Compiler : public BaseCompiler { //! Packed SP-FP subtract (SSE). INST_2x(subps, kInstSubps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(subps, kInstSubps, XmmVar, Mem) //! Scalar SP-FP subtract (SSE). INST_2x(subss, kInstSubss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(subss, kInstSubss, XmmVar, Mem) //! Unordered scalar SP-FP compare and set EFLAGS (SSE). INST_2x(ucomiss, kInstUcomiss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(ucomiss, kInstUcomiss, XmmVar, Mem) //! Unpack high packed SP-FP data (SSE). INST_2x(unpckhps, kInstUnpckhps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(unpckhps, kInstUnpckhps, XmmVar, Mem) //! Unpack low packed SP-FP data (SSE). INST_2x(unpcklps, kInstUnpcklps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(unpcklps, kInstUnpcklps, XmmVar, Mem) //! Packed SP-FP bitwise xor (SSE). INST_2x(xorps, kInstXorps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(xorps, kInstXorps, XmmVar, Mem) // -------------------------------------------------------------------------- @@ -2820,22 +2837,22 @@ struct X86X64Compiler : public BaseCompiler { //! Packed DP-FP add (SSE2). INST_2x(addpd, kInstAddpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(addpd, kInstAddpd, XmmVar, Mem) //! Scalar DP-FP add (SSE2). INST_2x(addsd, kInstAddsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(addsd, kInstAddsd, XmmVar, Mem) //! Packed DP-FP bitwise and-not (SSE2). INST_2x(andnpd, kInstAndnpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(andnpd, kInstAndnpd, XmmVar, Mem) //! Packed DP-FP bitwise and (SSE2). INST_2x(andpd, kInstAndpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(andpd, kInstAndpd, XmmVar, Mem) //! Flush cache line (SSE2). @@ -2843,123 +2860,123 @@ struct X86X64Compiler : public BaseCompiler { //! Packed DP-FP compare (SSE2). INST_3i(cmppd, kInstCmppd, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(cmppd, kInstCmppd, XmmVar, Mem, Imm) //! Scalar SP-FP compare (SSE2). INST_3i(cmpsd, kInstCmpsd, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(cmpsd, kInstCmpsd, XmmVar, Mem, Imm) //! Scalar ordered DP-FP compare and set EFLAGS (SSE2). INST_2x(comisd, kInstComisd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(comisd, kInstComisd, XmmVar, Mem) //! Convert packed DWORD integers to packed DP-FP (SSE2). INST_2x(cvtdq2pd, kInstCvtdq2pd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtdq2pd, kInstCvtdq2pd, XmmVar, Mem) //! Convert packed DWORD integers to packed SP-FP (SSE2). INST_2x(cvtdq2ps, kInstCvtdq2ps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtdq2ps, kInstCvtdq2ps, XmmVar, Mem) //! Convert packed DP-FP to packed DWORDs (SSE2). INST_2x(cvtpd2dq, kInstCvtpd2dq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtpd2dq, kInstCvtpd2dq, XmmVar, Mem) //! Convert packed DP-FP to packed DWORDs (SSE2). INST_2x(cvtpd2pi, kInstCvtpd2pi, MmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtpd2pi, kInstCvtpd2pi, MmVar, Mem) //! Convert packed DP-FP to packed SP-FP (SSE2). INST_2x(cvtpd2ps, kInstCvtpd2ps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtpd2ps, kInstCvtpd2ps, XmmVar, Mem) //! Convert packed DWORDs to packed DP-FP (SSE2). INST_2x(cvtpi2pd, kInstCvtpi2pd, XmmVar, MmVar) - //! @overload + //! \overload INST_2x(cvtpi2pd, kInstCvtpi2pd, XmmVar, Mem) //! Convert packed SP-FP to packed DWORDs (SSE2). INST_2x(cvtps2dq, kInstCvtps2dq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtps2dq, kInstCvtps2dq, XmmVar, Mem) //! Convert packed SP-FP to packed DP-FP (SSE2). INST_2x(cvtps2pd, kInstCvtps2pd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtps2pd, kInstCvtps2pd, XmmVar, Mem) //! Convert scalar DP-FP to DWORD (SSE2). INST_2x(cvtsd2si, kInstCvtsd2si, GpVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtsd2si, kInstCvtsd2si, GpVar, Mem) //! Convert scalar DP-FP to scalar SP-FP (SSE2). INST_2x(cvtsd2ss, kInstCvtsd2ss, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtsd2ss, kInstCvtsd2ss, XmmVar, Mem) //! Convert DWORD to scalar DP-FP (SSE2). INST_2x(cvtsi2sd, kInstCvtsi2sd, XmmVar, GpVar) - //! @overload + //! \overload INST_2x(cvtsi2sd, kInstCvtsi2sd, XmmVar, Mem) //! Convert scalar SP-FP to DP-FP (SSE2). INST_2x(cvtss2sd, kInstCvtss2sd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvtss2sd, kInstCvtss2sd, XmmVar, Mem) //! Convert with truncation packed DP-FP to packed DWORDs (SSE2). INST_2x(cvttpd2pi, kInstCvttpd2pi, MmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvttpd2pi, kInstCvttpd2pi, MmVar, Mem) //! Convert with truncation packed DP-FP to packed QWORDs (SSE2). INST_2x(cvttpd2dq, kInstCvttpd2dq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvttpd2dq, kInstCvttpd2dq, XmmVar, Mem) //! Convert with truncation packed SP-FP to packed QWORDs (SSE2). INST_2x(cvttps2dq, kInstCvttps2dq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(cvttps2dq, kInstCvttps2dq, XmmVar, Mem) //! Convert with truncation scalar DP-FP to DWORD (SSE2). INST_2x(cvttsd2si, kInstCvttsd2si, GpVar, XmmVar) - //! @overload + //! \overload INST_2x(cvttsd2si, kInstCvttsd2si, GpVar, Mem) //! Packed DP-FP divide (SSE2). INST_2x(divpd, kInstDivpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(divpd, kInstDivpd, XmmVar, Mem) //! Scalar DP-FP divide (SSE2). INST_2x(divsd, kInstDivsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(divsd, kInstDivsd, XmmVar, Mem) //! Load fence (SSE2). INST_0x(lfence, kInstLfence) //! Store selected bytes of OWORD (SSE2). - INST_3x(maskmovdqu, kInstMaskmovdqu, GpVar, XmmVar, XmmVar) + INST_3x(maskmovdqu, kInstMaskmovdqu, GpVar /* zdi */, XmmVar, XmmVar) //! Packed DP-FP maximum (SSE2). INST_2x(maxpd, kInstMaxpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(maxpd, kInstMaxpd, XmmVar, Mem) //! Scalar DP-FP maximum (SSE2). INST_2x(maxsd, kInstMaxsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(maxsd, kInstMaxsd, XmmVar, Mem) //! Memory fence (SSE2). @@ -2967,26 +2984,26 @@ struct X86X64Compiler : public BaseCompiler { //! Packed DP-FP minimum (SSE2). INST_2x(minpd, kInstMinpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(minpd, kInstMinpd, XmmVar, Mem) //! Scalar DP-FP minimum (SSE2). INST_2x(minsd, kInstMinsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(minsd, kInstMinsd, XmmVar, Mem) //! Move aligned OWORD (SSE2). INST_2x(movdqa, kInstMovdqa, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movdqa, kInstMovdqa, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movdqa, kInstMovdqa, Mem, XmmVar) //! Move unaligned OWORD (SSE2). INST_2x(movdqu, kInstMovdqu, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movdqu, kInstMovdqu, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movdqu, kInstMovdqu, Mem, XmmVar) //! Extract packed SP-FP sign mask (SSE2). @@ -2997,32 +3014,32 @@ struct X86X64Compiler : public BaseCompiler { //! Move scalar DP-FP (SSE2). INST_2x(movsd, kInstMovsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movsd, kInstMovsd, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movsd, kInstMovsd, Mem, XmmVar) //! Move aligned packed DP-FP (SSE2). INST_2x(movapd, kInstMovapd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movapd, kInstMovapd, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movapd, kInstMovapd, Mem, XmmVar) - //! Move QWORD from XMM to MM register (SSE2). + //! Move QWORD from Xmm to Mm register (SSE2). INST_2x(movdq2q, kInstMovdq2q, MmVar, XmmVar) - //! Move QWORD from MM to XMM register (SSE2). + //! Move QWORD from Mm to Xmm register (SSE2). INST_2x(movq2dq, kInstMovq2dq, XmmVar, MmVar) //! Move high packed DP-FP (SSE2). INST_2x(movhpd, kInstMovhpd, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movhpd, kInstMovhpd, Mem, XmmVar) //! Move low packed DP-FP (SSE2). INST_2x(movlpd, kInstMovlpd, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movlpd, kInstMovlpd, Mem, XmmVar) //! Store OWORD using NT hint (SSE2). @@ -3036,94 +3053,94 @@ struct X86X64Compiler : public BaseCompiler { //! Move unaligned packed DP-FP (SSE2). INST_2x(movupd, kInstMovupd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movupd, kInstMovupd, XmmVar, Mem) - //! @overload + //! \overload INST_2x(movupd, kInstMovupd, Mem, XmmVar) //! Packed DP-FP multiply (SSE2). INST_2x(mulpd, kInstMulpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(mulpd, kInstMulpd, XmmVar, Mem) //! Scalar DP-FP multiply (SSE2). INST_2x(mulsd, kInstMulsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(mulsd, kInstMulsd, XmmVar, Mem) //! Packed DP-FP bitwise or (SSE2). INST_2x(orpd, kInstOrpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(orpd, kInstOrpd, XmmVar, Mem) //! Pack WORDs to BYTEs with signed saturation (SSE2). INST_2x(packsswb, kInstPacksswb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(packsswb, kInstPacksswb, XmmVar, Mem) //! Pack DWORDs to WORDs with signed saturation (SSE2). INST_2x(packssdw, kInstPackssdw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(packssdw, kInstPackssdw, XmmVar, Mem) //! Pack WORDs to BYTEs with unsigned saturation (SSE2). INST_2x(packuswb, kInstPackuswb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(packuswb, kInstPackuswb, XmmVar, Mem) //! Packed BYTE add (SSE2). INST_2x(paddb, kInstPaddb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(paddb, kInstPaddb, XmmVar, Mem) //! Packed WORD add (SSE2). INST_2x(paddw, kInstPaddw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(paddw, kInstPaddw, XmmVar, Mem) //! Packed DWORD add (SSE2). INST_2x(paddd, kInstPaddd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(paddd, kInstPaddd, XmmVar, Mem) //! Packed QWORD add (SSE2). INST_2x(paddq, kInstPaddq, MmVar, MmVar) - //! @overload + //! \overload INST_2x(paddq, kInstPaddq, MmVar, Mem) //! Packed QWORD add (SSE2). INST_2x(paddq, kInstPaddq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(paddq, kInstPaddq, XmmVar, Mem) //! Packed BYTE add with saturation (SSE2). INST_2x(paddsb, kInstPaddsb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(paddsb, kInstPaddsb, XmmVar, Mem) //! Packed WORD add with saturation (SSE2). INST_2x(paddsw, kInstPaddsw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(paddsw, kInstPaddsw, XmmVar, Mem) //! Packed BYTE add with unsigned saturation (SSE2). INST_2x(paddusb, kInstPaddusb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(paddusb, kInstPaddusb, XmmVar, Mem) //! Packed WORD add with unsigned saturation (SSE2). INST_2x(paddusw, kInstPaddusw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(paddusw, kInstPaddusw, XmmVar, Mem) //! Packed bitwise and (SSE2). INST_2x(pand, kInstPand, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pand, kInstPand, XmmVar, Mem) //! Packed bitwise and-not (SSE2). INST_2x(pandn, kInstPandn, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pandn, kInstPandn, XmmVar, Mem) //! Spin loop hint (SSE2). @@ -3131,42 +3148,42 @@ struct X86X64Compiler : public BaseCompiler { //! Packed BYTE average (SSE2). INST_2x(pavgb, kInstPavgb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pavgb, kInstPavgb, XmmVar, Mem) //! Packed WORD average (SSE2). INST_2x(pavgw, kInstPavgw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pavgw, kInstPavgw, XmmVar, Mem) //! Packed BYTE compare for equality (SSE2). INST_2x(pcmpeqb, kInstPcmpeqb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pcmpeqb, kInstPcmpeqb, XmmVar, Mem) //! Packed WROD compare for equality (SSE2). INST_2x(pcmpeqw, kInstPcmpeqw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pcmpeqw, kInstPcmpeqw, XmmVar, Mem) //! Packed DWORD compare for equality (SSE2). INST_2x(pcmpeqd, kInstPcmpeqd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pcmpeqd, kInstPcmpeqd, XmmVar, Mem) //! Packed BYTE compare if greater than (SSE2). INST_2x(pcmpgtb, kInstPcmpgtb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pcmpgtb, kInstPcmpgtb, XmmVar, Mem) //! Packed WORD compare if greater than (SSE2). INST_2x(pcmpgtw, kInstPcmpgtw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pcmpgtw, kInstPcmpgtw, XmmVar, Mem) //! Packed DWORD compare if greater than (SSE2). INST_2x(pcmpgtd, kInstPcmpgtd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pcmpgtd, kInstPcmpgtd, XmmVar, Mem) //! Extract WORD based on selector (SSE2). @@ -3174,27 +3191,27 @@ struct X86X64Compiler : public BaseCompiler { //! Insert WORD based on selector (SSE2). INST_3i(pinsrw, kInstPinsrw, XmmVar, GpVar, Imm) - //! @overload + //! \overload INST_3i(pinsrw, kInstPinsrw, XmmVar, Mem, Imm) //! Packed WORD maximum (SSE2). INST_2x(pmaxsw, kInstPmaxsw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmaxsw, kInstPmaxsw, XmmVar, Mem) //! Packed BYTE unsigned maximum (SSE2). INST_2x(pmaxub, kInstPmaxub, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmaxub, kInstPmaxub, XmmVar, Mem) //! Packed WORD minimum (SSE2). INST_2x(pminsw, kInstPminsw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pminsw, kInstPminsw, XmmVar, Mem) //! Packed BYTE unsigned minimum (SSE2). INST_2x(pminub, kInstPminub, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pminub, kInstPminub, XmmVar, Mem) //! Move BYTE mask (SSE2). @@ -3202,53 +3219,53 @@ struct X86X64Compiler : public BaseCompiler { //! Packed WORD multiply high (SSE2). INST_2x(pmulhw, kInstPmulhw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmulhw, kInstPmulhw, XmmVar, Mem) //! Packed WORD unsigned multiply high (SSE2). INST_2x(pmulhuw, kInstPmulhuw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmulhuw, kInstPmulhuw, XmmVar, Mem) //! Packed WORD multiply low (SSE2). INST_2x(pmullw, kInstPmullw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmullw, kInstPmullw, XmmVar, Mem) //! Packed DWORD multiply to QWORD (SSE2). INST_2x(pmuludq, kInstPmuludq, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pmuludq, kInstPmuludq, MmVar, Mem) //! Packed DWORD multiply to QWORD (SSE2). INST_2x(pmuludq, kInstPmuludq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmuludq, kInstPmuludq, XmmVar, Mem) //! Packed bitwise or (SSE2). INST_2x(por, kInstPor, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(por, kInstPor, XmmVar, Mem) //! Packed DWORD shift left logical (SSE2). INST_2x(pslld, kInstPslld, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pslld, kInstPslld, XmmVar, Mem) - //! @overload + //! \overload INST_2i(pslld, kInstPslld, XmmVar, Imm) //! Packed QWORD shift left logical (SSE2). INST_2x(psllq, kInstPsllq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psllq, kInstPsllq, XmmVar, Mem) - //! @overload + //! \overload INST_2i(psllq, kInstPsllq, XmmVar, Imm) //! Packed WORD shift left logical (SSE2). INST_2x(psllw, kInstPsllw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psllw, kInstPsllw, XmmVar, Mem) - //! @overload + //! \overload INST_2i(psllw, kInstPsllw, XmmVar, Imm) //! Packed OWORD shift left logical (SSE2). @@ -3256,75 +3273,75 @@ struct X86X64Compiler : public BaseCompiler { //! Packed DWORD shift right arithmetic (SSE2). INST_2x(psrad, kInstPsrad, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psrad, kInstPsrad, XmmVar, Mem) - //! @overload + //! \overload INST_2i(psrad, kInstPsrad, XmmVar, Imm) //! Packed WORD shift right arithmetic (SSE2). INST_2x(psraw, kInstPsraw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psraw, kInstPsraw, XmmVar, Mem) - //! @overload + //! \overload INST_2i(psraw, kInstPsraw, XmmVar, Imm) //! Packed BYTE subtract (SSE2). INST_2x(psubb, kInstPsubb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psubb, kInstPsubb, XmmVar, Mem) //! Packed DWORD subtract (SSE2). INST_2x(psubd, kInstPsubd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psubd, kInstPsubd, XmmVar, Mem) //! Packed QWORD subtract (SSE2). INST_2x(psubq, kInstPsubq, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psubq, kInstPsubq, MmVar, Mem) //! Packed QWORD subtract (SSE2). INST_2x(psubq, kInstPsubq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psubq, kInstPsubq, XmmVar, Mem) //! Packed WORD subtract (SSE2). INST_2x(psubw, kInstPsubw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psubw, kInstPsubw, XmmVar, Mem) //! Packed WORD to DWORD multiply and add (SSE2). INST_2x(pmaddwd, kInstPmaddwd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmaddwd, kInstPmaddwd, XmmVar, Mem) //! Packed DWORD shuffle (SSE2). INST_3i(pshufd, kInstPshufd, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pshufd, kInstPshufd, XmmVar, Mem, Imm) //! Packed WORD shuffle high (SSE2). INST_3i(pshufhw, kInstPshufhw, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pshufhw, kInstPshufhw, XmmVar, Mem, Imm) //! Packed WORD shuffle low (SSE2). INST_3i(pshuflw, kInstPshuflw, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pshuflw, kInstPshuflw, XmmVar, Mem, Imm) //! Packed DWORD shift right logical (SSE2). INST_2x(psrld, kInstPsrld, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psrld, kInstPsrld, XmmVar, Mem) - //! @overload + //! \overload INST_2i(psrld, kInstPsrld, XmmVar, Imm) //! Packed QWORD shift right logical (SSE2). INST_2x(psrlq, kInstPsrlq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psrlq, kInstPsrlq, XmmVar, Mem) - //! @overload + //! \overload INST_2i(psrlq, kInstPsrlq, XmmVar, Imm) //! Scalar OWORD shift right logical (SSE2). @@ -3332,119 +3349,119 @@ struct X86X64Compiler : public BaseCompiler { //! Packed WORD shift right logical (SSE2). INST_2x(psrlw, kInstPsrlw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psrlw, kInstPsrlw, XmmVar, Mem) - //! @overload + //! \overload INST_2i(psrlw, kInstPsrlw, XmmVar, Imm) //! Packed BYTE subtract with saturation (SSE2). INST_2x(psubsb, kInstPsubsb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psubsb, kInstPsubsb, XmmVar, Mem) //! Packed WORD subtract with saturation (SSE2). INST_2x(psubsw, kInstPsubsw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psubsw, kInstPsubsw, XmmVar, Mem) //! Packed BYTE subtract with unsigned saturation (SSE2). INST_2x(psubusb, kInstPsubusb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psubusb, kInstPsubusb, XmmVar, Mem) //! Packed WORD subtract with unsigned saturation (SSE2). INST_2x(psubusw, kInstPsubusw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psubusw, kInstPsubusw, XmmVar, Mem) //! Unpack high packed BYTEs to WORDs (SSE2). INST_2x(punpckhbw, kInstPunpckhbw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(punpckhbw, kInstPunpckhbw, XmmVar, Mem) //! Unpack high packed DWORDs to QWORDs (SSE2). INST_2x(punpckhdq, kInstPunpckhdq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(punpckhdq, kInstPunpckhdq, XmmVar, Mem) //! Unpack high packed QWORDs to OWORD (SSE2). INST_2x(punpckhqdq, kInstPunpckhqdq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(punpckhqdq, kInstPunpckhqdq, XmmVar, Mem) //! Unpack high packed WORDs to DWORDs (SSE2). INST_2x(punpckhwd, kInstPunpckhwd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(punpckhwd, kInstPunpckhwd, XmmVar, Mem) //! Unpack low packed BYTEs to WORDs (SSE2). INST_2x(punpcklbw, kInstPunpcklbw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(punpcklbw, kInstPunpcklbw, XmmVar, Mem) //! Unpack low packed DWORDs to QWORDs (SSE2). INST_2x(punpckldq, kInstPunpckldq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(punpckldq, kInstPunpckldq, XmmVar, Mem) //! Unpack low packed QWORDs to OWORD (SSE2). INST_2x(punpcklqdq, kInstPunpcklqdq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(punpcklqdq, kInstPunpcklqdq, XmmVar, Mem) //! Unpack low packed WORDs to DWORDs (SSE2). INST_2x(punpcklwd, kInstPunpcklwd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(punpcklwd, kInstPunpcklwd, XmmVar, Mem) //! Packed bitwise xor (SSE2). INST_2x(pxor, kInstPxor, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pxor, kInstPxor, XmmVar, Mem) //! Shuffle DP-FP (SSE2). INST_3i(shufpd, kInstShufpd, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(shufpd, kInstShufpd, XmmVar, Mem, Imm) //! Packed DP-FP square root (SSE2). INST_2x(sqrtpd, kInstSqrtpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(sqrtpd, kInstSqrtpd, XmmVar, Mem) //! Scalar DP-FP square root (SSE2). INST_2x(sqrtsd, kInstSqrtsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(sqrtsd, kInstSqrtsd, XmmVar, Mem) //! Packed DP-FP subtract (SSE2). INST_2x(subpd, kInstSubpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(subpd, kInstSubpd, XmmVar, Mem) //! Scalar DP-FP subtract (SSE2). INST_2x(subsd, kInstSubsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(subsd, kInstSubsd, XmmVar, Mem) //! Scalar DP-FP unordered compare and set EFLAGS (SSE2). INST_2x(ucomisd, kInstUcomisd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(ucomisd, kInstUcomisd, XmmVar, Mem) //! Unpack and interleave high packed DP-FP (SSE2). INST_2x(unpckhpd, kInstUnpckhpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(unpckhpd, kInstUnpckhpd, XmmVar, Mem) //! Unpack and interleave low packed DP-FP (SSE2). INST_2x(unpcklpd, kInstUnpcklpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(unpcklpd, kInstUnpcklpd, XmmVar, Mem) //! Packed DP-FP bitwise xor (SSE2). INST_2x(xorpd, kInstXorpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(xorpd, kInstXorpd, XmmVar, Mem) // -------------------------------------------------------------------------- @@ -3453,12 +3470,12 @@ struct X86X64Compiler : public BaseCompiler { //! Packed DP-FP add/subtract (SSE3). INST_2x(addsubpd, kInstAddsubpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(addsubpd, kInstAddsubpd, XmmVar, Mem) //! Packed SP-FP add/subtract (SSE3). INST_2x(addsubps, kInstAddsubps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(addsubps, kInstAddsubps, XmmVar, Mem) // //! Store integer with truncation (SSE3). @@ -3466,22 +3483,22 @@ struct X86X64Compiler : public BaseCompiler { //! Packed DP-FP horizontal add (SSE3). INST_2x(haddpd, kInstHaddpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(haddpd, kInstHaddpd, XmmVar, Mem) //! Packed SP-FP horizontal add (SSE3). INST_2x(haddps, kInstHaddps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(haddps, kInstHaddps, XmmVar, Mem) //! Packed DP-FP horizontal subtract (SSE3). INST_2x(hsubpd, kInstHsubpd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(hsubpd, kInstHsubpd, XmmVar, Mem) //! Packed SP-FP horizontal subtract (SSE3). INST_2x(hsubps, kInstHsubps, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(hsubps, kInstHsubps, XmmVar, Mem) //! Load 128-bits unaligned (SSE3). @@ -3492,17 +3509,17 @@ struct X86X64Compiler : public BaseCompiler { //! Move one DP-FP and duplicate (SSE3). INST_2x(movddup, kInstMovddup, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movddup, kInstMovddup, XmmVar, Mem) //! Move packed SP-FP high and duplicate (SSE3). INST_2x(movshdup, kInstMovshdup, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movshdup, kInstMovshdup, XmmVar, Mem) //! Move packed SP-FP low and duplicate (SSE3). INST_2x(movsldup, kInstMovsldup, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(movsldup, kInstMovsldup, XmmVar, Mem) // //! Monitor wait (SSE3). @@ -3514,162 +3531,162 @@ struct X86X64Compiler : public BaseCompiler { //! Packed BYTE sign (SSSE3). INST_2x(psignb, kInstPsignb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psignb, kInstPsignb, MmVar, Mem) //! PackedBYTE sign (SSSE3). INST_2x(psignb, kInstPsignb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psignb, kInstPsignb, XmmVar, Mem) //! Packed DWORD sign (SSSE3). INST_2x(psignd, kInstPsignd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psignd, kInstPsignd, MmVar, Mem) //! Packed DWORD sign (SSSE3). INST_2x(psignd, kInstPsignd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psignd, kInstPsignd, XmmVar, Mem) //! Packed WORD sign (SSSE3). INST_2x(psignw, kInstPsignw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(psignw, kInstPsignw, MmVar, Mem) //! Packed WORD sign (SSSE3). INST_2x(psignw, kInstPsignw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(psignw, kInstPsignw, XmmVar, Mem) //! Packed DWORD horizontal add (SSSE3). INST_2x(phaddd, kInstPhaddd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(phaddd, kInstPhaddd, MmVar, Mem) //! Packed DWORD horizontal add (SSSE3). INST_2x(phaddd, kInstPhaddd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(phaddd, kInstPhaddd, XmmVar, Mem) //! Packed WORD horizontal add with saturation (SSSE3). INST_2x(phaddsw, kInstPhaddsw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(phaddsw, kInstPhaddsw, MmVar, Mem) //! Packed WORD horizontal add with with saturation (SSSE3). INST_2x(phaddsw, kInstPhaddsw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(phaddsw, kInstPhaddsw, XmmVar, Mem) //! Packed WORD horizontal add (SSSE3). INST_2x(phaddw, kInstPhaddw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(phaddw, kInstPhaddw, MmVar, Mem) //! Packed WORD horizontal add (SSSE3). INST_2x(phaddw, kInstPhaddw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(phaddw, kInstPhaddw, XmmVar, Mem) //! Packed DWORD horizontal subtract (SSSE3). INST_2x(phsubd, kInstPhsubd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(phsubd, kInstPhsubd, MmVar, Mem) //! Packed DWORD horizontal subtract (SSSE3). INST_2x(phsubd, kInstPhsubd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(phsubd, kInstPhsubd, XmmVar, Mem) //! Packed WORD horizontal subtract with saturation (SSSE3). INST_2x(phsubsw, kInstPhsubsw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(phsubsw, kInstPhsubsw, MmVar, Mem) //! Packed WORD horizontal subtract with saturation (SSSE3). INST_2x(phsubsw, kInstPhsubsw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(phsubsw, kInstPhsubsw, XmmVar, Mem) //! Packed WORD horizontal subtract (SSSE3). INST_2x(phsubw, kInstPhsubw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(phsubw, kInstPhsubw, MmVar, Mem) //! Packed WORD horizontal subtract (SSSE3). INST_2x(phsubw, kInstPhsubw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(phsubw, kInstPhsubw, XmmVar, Mem) //! Packed multiply and add signed and unsigned bytes (SSSE3). INST_2x(pmaddubsw, kInstPmaddubsw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pmaddubsw, kInstPmaddubsw, MmVar, Mem) //! Packed multiply and add signed and unsigned bytes (SSSE3). INST_2x(pmaddubsw, kInstPmaddubsw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmaddubsw, kInstPmaddubsw, XmmVar, Mem) //! Packed BYTE absolute value (SSSE3). INST_2x(pabsb, kInstPabsb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pabsb, kInstPabsb, MmVar, Mem) //! Packed BYTE absolute value (SSSE3). INST_2x(pabsb, kInstPabsb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pabsb, kInstPabsb, XmmVar, Mem) //! Packed DWORD absolute value (SSSE3). INST_2x(pabsd, kInstPabsd, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pabsd, kInstPabsd, MmVar, Mem) //! Packed DWORD absolute value (SSSE3). INST_2x(pabsd, kInstPabsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pabsd, kInstPabsd, XmmVar, Mem) //! Packed WORD absolute value (SSSE3). INST_2x(pabsw, kInstPabsw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pabsw, kInstPabsw, MmVar, Mem) //! Packed WORD absolute value (SSSE3). INST_2x(pabsw, kInstPabsw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pabsw, kInstPabsw, XmmVar, Mem) //! Packed WORD multiply high, round and scale (SSSE3). INST_2x(pmulhrsw, kInstPmulhrsw, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pmulhrsw, kInstPmulhrsw, MmVar, Mem) //! Packed WORD multiply high, round and scale (SSSE3). INST_2x(pmulhrsw, kInstPmulhrsw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmulhrsw, kInstPmulhrsw, XmmVar, Mem) //! Packed BYTE shuffle (SSSE3). INST_2x(pshufb, kInstPshufb, MmVar, MmVar) - //! @overload + //! \overload INST_2x(pshufb, kInstPshufb, MmVar, Mem) //! Packed BYTE shuffle (SSSE3). INST_2x(pshufb, kInstPshufb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pshufb, kInstPshufb, XmmVar, Mem) //! Packed align right (SSSE3). INST_3i(palignr, kInstPalignr, MmVar, MmVar, Imm) - //! @overload + //! \overload INST_3i(palignr, kInstPalignr, MmVar, Mem, Imm) //! Packed align right (SSSE3). INST_3i(palignr, kInstPalignr, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(palignr, kInstPalignr, XmmVar, Mem, Imm) // -------------------------------------------------------------------------- @@ -3678,42 +3695,42 @@ struct X86X64Compiler : public BaseCompiler { //! Packed DP-FP blend (SSE4.1). INST_3i(blendpd, kInstBlendpd, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(blendpd, kInstBlendpd, XmmVar, Mem, Imm) //! Packed SP-FP blend (SSE4.1). INST_3i(blendps, kInstBlendps, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(blendps, kInstBlendps, XmmVar, Mem, Imm) //! Packed DP-FP variable blend (SSE4.1). INST_3x(blendvpd, kInstBlendvpd, XmmVar, XmmVar, XmmVar) - //! @overload + //! \overload INST_3x(blendvpd, kInstBlendvpd, XmmVar, Mem, XmmVar) //! Packed SP-FP variable blend (SSE4.1). INST_3x(blendvps, kInstBlendvps, XmmVar, XmmVar, XmmVar) - //! @overload + //! \overload INST_3x(blendvps, kInstBlendvps, XmmVar, Mem, XmmVar) //! Packed DP-FP dot product (SSE4.1). INST_3i(dppd, kInstDppd, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(dppd, kInstDppd, XmmVar, Mem, Imm) //! Packed SP-FP dot product (SSE4.1). INST_3i(dpps, kInstDpps, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(dpps, kInstDpps, XmmVar, Mem, Imm) //! Extract SP-FP based on selector (SSE4.1). INST_3i(extractps, kInstExtractps, GpVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(extractps, kInstExtractps, Mem, XmmVar, Imm) //! Insert SP-FP based on selector (SSE4.1). INST_3i(insertps, kInstInsertps, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(insertps, kInstInsertps, XmmVar, Mem, Imm) //! Load OWORD aligned using NT hint (SSE4.1). @@ -3721,42 +3738,42 @@ struct X86X64Compiler : public BaseCompiler { //! Packed WORD sums of absolute difference (SSE4.1). INST_3i(mpsadbw, kInstMpsadbw, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(mpsadbw, kInstMpsadbw, XmmVar, Mem, Imm) //! Pack DWORDs to WORDs with unsigned saturation (SSE4.1). INST_2x(packusdw, kInstPackusdw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(packusdw, kInstPackusdw, XmmVar, Mem) //! Packed BYTE variable blend (SSE4.1). INST_3x(pblendvb, kInstPblendvb, XmmVar, XmmVar, XmmVar) - //! @overload + //! \overload INST_3x(pblendvb, kInstPblendvb, XmmVar, Mem, XmmVar) //! Packed WORD blend (SSE4.1). INST_3i(pblendw, kInstPblendw, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pblendw, kInstPblendw, XmmVar, Mem, Imm) //! Packed QWORD compare for equality (SSE4.1). INST_2x(pcmpeqq, kInstPcmpeqq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pcmpeqq, kInstPcmpeqq, XmmVar, Mem) //! Extract BYTE based on selector (SSE4.1). INST_3i(pextrb, kInstPextrb, GpVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pextrb, kInstPextrb, Mem, XmmVar, Imm) //! Extract DWORD based on selector (SSE4.1). INST_3i(pextrd, kInstPextrd, GpVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pextrd, kInstPextrd, Mem, XmmVar, Imm) //! Extract QWORD based on selector (SSE4.1). INST_3i(pextrq, kInstPextrq, GpVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pextrq, kInstPextrq, Mem, XmmVar, Imm) //! Extract WORD based on selector (SSE4.1). @@ -3764,157 +3781,157 @@ struct X86X64Compiler : public BaseCompiler { //! Packed WORD horizontal minimum (SSE4.1). INST_2x(phminposuw, kInstPhminposuw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(phminposuw, kInstPhminposuw, XmmVar, Mem) //! Insert BYTE based on selector (SSE4.1). INST_3i(pinsrb, kInstPinsrb, XmmVar, GpVar, Imm) - //! @overload + //! \overload INST_3i(pinsrb, kInstPinsrb, XmmVar, Mem, Imm) //! Insert DWORD based on selector (SSE4.1). INST_3i(pinsrd, kInstPinsrd, XmmVar, GpVar, Imm) - //! @overload + //! \overload INST_3i(pinsrd, kInstPinsrd, XmmVar, Mem, Imm) //! Insert QWORD based on selector (SSE4.1). INST_3i(pinsrq, kInstPinsrq, XmmVar, GpVar, Imm) - //! @overload + //! \overload INST_3i(pinsrq, kInstPinsrq, XmmVar, Mem, Imm) //! Packed BYTE maximum (SSE4.1). INST_2x(pmaxsb, kInstPmaxsb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmaxsb, kInstPmaxsb, XmmVar, Mem) //! Packed DWORD maximum (SSE4.1). INST_2x(pmaxsd, kInstPmaxsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmaxsd, kInstPmaxsd, XmmVar, Mem) //! Packed DWORD unsigned maximum (SSE4.1). INST_2x(pmaxud, kInstPmaxud, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmaxud,kInstPmaxud , XmmVar, Mem) //! Packed WORD unsigned maximum (SSE4.1). INST_2x(pmaxuw, kInstPmaxuw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmaxuw, kInstPmaxuw, XmmVar, Mem) //! Packed BYTE minimum (SSE4.1). INST_2x(pminsb, kInstPminsb, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pminsb, kInstPminsb, XmmVar, Mem) //! Packed DWORD minimum (SSE4.1). INST_2x(pminsd, kInstPminsd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pminsd, kInstPminsd, XmmVar, Mem) //! Packed WORD unsigned minimum (SSE4.1). INST_2x(pminuw, kInstPminuw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pminuw, kInstPminuw, XmmVar, Mem) //! Packed DWORD unsigned minimum (SSE4.1). INST_2x(pminud, kInstPminud, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pminud, kInstPminud, XmmVar, Mem) //! Packed BYTE to DWORD with sign extend (SSE4.1). INST_2x(pmovsxbd, kInstPmovsxbd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovsxbd, kInstPmovsxbd, XmmVar, Mem) //! Packed BYTE to QWORD with sign extend (SSE4.1). INST_2x(pmovsxbq, kInstPmovsxbq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovsxbq, kInstPmovsxbq, XmmVar, Mem) //! Packed BYTE to WORD with sign extend (SSE4.1). INST_2x(pmovsxbw, kInstPmovsxbw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovsxbw, kInstPmovsxbw, XmmVar, Mem) //! Packed DWORD to QWORD with sign extend (SSE4.1). INST_2x(pmovsxdq, kInstPmovsxdq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovsxdq, kInstPmovsxdq, XmmVar, Mem) //! Packed WORD to DWORD with sign extend (SSE4.1). INST_2x(pmovsxwd, kInstPmovsxwd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovsxwd, kInstPmovsxwd, XmmVar, Mem) //! Packed WORD to QWORD with sign extend (SSE4.1). INST_2x(pmovsxwq, kInstPmovsxwq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovsxwq, kInstPmovsxwq, XmmVar, Mem) //! BYTE to DWORD with zero extend (SSE4.1). INST_2x(pmovzxbd, kInstPmovzxbd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovzxbd, kInstPmovzxbd, XmmVar, Mem) //! Packed BYTE to QWORD with zero extend (SSE4.1). INST_2x(pmovzxbq, kInstPmovzxbq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovzxbq, kInstPmovzxbq, XmmVar, Mem) //! BYTE to WORD with zero extend (SSE4.1). INST_2x(pmovzxbw, kInstPmovzxbw, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovzxbw, kInstPmovzxbw, XmmVar, Mem) //! Packed DWORD to QWORD with zero extend (SSE4.1). INST_2x(pmovzxdq, kInstPmovzxdq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovzxdq, kInstPmovzxdq, XmmVar, Mem) //! Packed WORD to DWORD with zero extend (SSE4.1). INST_2x(pmovzxwd, kInstPmovzxwd, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovzxwd, kInstPmovzxwd, XmmVar, Mem) //! Packed WORD to QWORD with zero extend (SSE4.1). INST_2x(pmovzxwq, kInstPmovzxwq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmovzxwq, kInstPmovzxwq, XmmVar, Mem) //! Packed DWORD to QWORD multiply (SSE4.1). INST_2x(pmuldq, kInstPmuldq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmuldq, kInstPmuldq, XmmVar, Mem) //! Packed DWORD multiply low (SSE4.1). INST_2x(pmulld, kInstPmulld, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pmulld, kInstPmulld, XmmVar, Mem) //! Logical compare (SSE4.1). INST_2x(ptest, kInstPtest, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(ptest, kInstPtest, XmmVar, Mem) //! Packed DP-FP round (SSE4.1). INST_3i(roundpd, kInstRoundpd, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(roundpd, kInstRoundpd, XmmVar, Mem, Imm) //! Packed SP-FP round (SSE4.1). INST_3i(roundps, kInstRoundps, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(roundps, kInstRoundps, XmmVar, Mem, Imm) //! Scalar DP-FP round (SSE4.1). INST_3i(roundsd, kInstRoundsd, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(roundsd, kInstRoundsd, XmmVar, Mem, Imm) //! Scalar SP-FP round (SSE4.1). INST_3i(roundss, kInstRoundss, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(roundss, kInstRoundss, XmmVar, Mem, Imm) // -------------------------------------------------------------------------- @@ -3923,27 +3940,27 @@ struct X86X64Compiler : public BaseCompiler { //! Packed compare explicit length strings, return index (SSE4.2). INST_3i(pcmpestri, kInstPcmpestri, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pcmpestri, kInstPcmpestri, XmmVar, Mem, Imm) //! Packed compare explicit length strings, return mask (SSE4.2). INST_3i(pcmpestrm, kInstPcmpestrm, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pcmpestrm, kInstPcmpestrm, XmmVar, Mem, Imm) //! Packed compare implicit length strings, return index (SSE4.2). INST_3i(pcmpistri, kInstPcmpistri, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pcmpistri, kInstPcmpistri, XmmVar, Mem, Imm) //! Packed compare implicit length strings, return mask (SSE4.2). INST_3i(pcmpistrm, kInstPcmpistrm, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(pcmpistrm, kInstPcmpistrm, XmmVar, Mem, Imm) //! Packed QWORD compare if greater than (SSE4.2). INST_2x(pcmpgtq, kInstPcmpgtq, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(pcmpgtq, kInstPcmpgtq, XmmVar, Mem) // -------------------------------------------------------------------------- @@ -3952,32 +3969,32 @@ struct X86X64Compiler : public BaseCompiler { //! Perform a single round of the AES decryption flow. INST_2x(aesdec, kInstAesdec, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(aesdec, kInstAesdec, XmmVar, Mem) //! Perform the last round of the AES decryption flow. INST_2x(aesdeclast, kInstAesdeclast, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(aesdeclast, kInstAesdeclast, XmmVar, Mem) //! Perform a single round of the AES encryption flow. INST_2x(aesenc, kInstAesenc, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(aesenc, kInstAesenc, XmmVar, Mem) //! Perform the last round of the AES encryption flow. INST_2x(aesenclast, kInstAesenclast, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(aesenclast, kInstAesenclast, XmmVar, Mem) //! Perform the InvMixColumns transformation. INST_2x(aesimc, kInstAesimc, XmmVar, XmmVar) - //! @overload + //! \overload INST_2x(aesimc, kInstAesimc, XmmVar, Mem) //! Assist in expanding the AES cipher key. INST_3i(aeskeygenassist, kInstAeskeygenassist, XmmVar, XmmVar, Imm) - //! @overload + //! \overload INST_3i(aeskeygenassist, kInstAeskeygenassist, XmmVar, Mem, Imm) // -------------------------------------------------------------------------- @@ -3986,11 +4003,11 @@ struct X86X64Compiler : public BaseCompiler { //! Packed QWORD to OWORD carry-less multiply (PCLMULQDQ). INST_3i(pclmulqdq, kInstPclmulqdq, XmmVar, XmmVar, Imm); - //! @overload + //! \overload INST_3i(pclmulqdq, kInstPclmulqdq, XmmVar, Mem, Imm); }; -//! @} +//! \} } // x86x64 namespace } // asmjit namespace @@ -4004,8 +4021,8 @@ struct X86X64Compiler : public BaseCompiler { namespace asmjit { namespace x86 { -//! @addtogroup asmjit_x86x64 -//! @{ +//! \addtogroup asmjit_x86x64_general +//! \{ struct Compiler : public X86X64Compiler { ASMJIT_NO_COPY(Compiler) @@ -4035,7 +4052,7 @@ struct Compiler : public X86X64Compiler { INST_1x(das, kInstDas, GpVar) }; -//! @} +//! \} } // x86 namespace } // asmjit namespace @@ -4051,8 +4068,8 @@ struct Compiler : public X86X64Compiler { namespace asmjit { namespace x64 { -//! @addtogroup asmjit_x86x64 -//! @{ +//! \addtogroup asmjit_x86x64_general +//! \{ struct Compiler : public X86X64Compiler { ASMJIT_NO_COPY(Compiler) @@ -4076,9 +4093,9 @@ struct Compiler : public X86X64Compiler { // [X64-Only Instructions] // -------------------------------------------------------------------------- - //! Convert dword to qword (RAX <- Sign Extend EAX). + //! Convert DWORD to QWORD (RAX <- Sign Extend EAX). INST_1x(cdqe, kInstCdqe, GpVar /* eax */) - //! Convert qword to oword (RDX:RAX <- Sign Extend RAX). + //! Convert QWORD to OWORD (RDX:RAX <- Sign Extend RAX). INST_2x(cqo, kInstCdq, GpVar /* rdx */, GpVar /* rax */) //! Compares the 128-bit value in RDX:RAX with the memory operand (X64). @@ -4090,9 +4107,9 @@ struct Compiler : public X86X64Compiler { return emit(kInstCmpxchg16b, cmp_edx, cmp_eax, cmp_ecx, cmp_ebx, dst); } - //! Move dword to qword with sign-extension. + //! Move DWORD to QWORD with sign-extension. INST_2x(movsxd, kInstMovsxd, GpVar, GpVar) - //! @overload + //! \overload INST_2x(movsxd, kInstMovsxd, GpVar, Mem) //! Load ECX/RCX QWORDs from DS:[ESI/RSI] to RAX. @@ -4114,18 +4131,18 @@ struct Compiler : public X86X64Compiler { using X86X64Compiler::movq; - //! @overload + //! \overload INST_2x(movq, kInstMovq, GpVar, MmVar) - //! @overload + //! \overload INST_2x(movq, kInstMovq, MmVar, GpVar) - //! @overload + //! \overload INST_2x(movq, kInstMovq, GpVar, XmmVar) - //! @overload + //! \overload INST_2x(movq, kInstMovq, XmmVar, GpVar) }; -//! @} +//! \} } // x64 namespace } // asmjit namespace diff --git a/src/asmjit/x86/x86context.cpp b/src/asmjit/x86/x86context.cpp index 8ff29ac..71f9e1e 100644 --- a/src/asmjit/x86/x86context.cpp +++ b/src/asmjit/x86/x86context.cpp @@ -78,10 +78,10 @@ void X86X64Context::reset() { _clobberedRegs.reset(); _stackFrameCell = NULL; - _gaRegs[kRegClassGp] = IntUtil::bits(_baseRegsCount) & ~IntUtil::mask(kRegIndexSp); - _gaRegs[kRegClassFp] = IntUtil::bits(kRegCountFp); - _gaRegs[kRegClassMm] = IntUtil::bits(kRegCountMm); - _gaRegs[kRegClassXy] = IntUtil::bits(_baseRegsCount); + _gaRegs[kRegClassGp ] = IntUtil::bits(_baseRegsCount) & ~IntUtil::mask(kRegIndexSp); + _gaRegs[kRegClassFp ] = IntUtil::bits(kRegCountFp); + _gaRegs[kRegClassMm ] = IntUtil::bits(kRegCountMm); + _gaRegs[kRegClassXyz] = IntUtil::bits(_baseRegsCount); _argBaseReg = kInvalidReg; // Used by patcher. _varBaseReg = kInvalidReg; // Used by patcher. @@ -142,6 +142,10 @@ static const X86X64SpecialInst x86SpecialInstDiv[] = { { kInvalidReg, kInvalidReg, kVarAttrInReg } }; +static const X86X64SpecialInst x86SpecialInstJecxz[] = { + { kRegIndexCx, kInvalidReg, kVarAttrInReg } +}; + static const X86X64SpecialInst x86SpecialInstMul[] = { { kInvalidReg, kRegIndexDx, kVarAttrOutReg }, { kRegIndexAx, kRegIndexAx, kVarAttrInOutReg }, @@ -240,6 +244,9 @@ static ASMJIT_INLINE const X86X64SpecialInst* X86X64SpecialInst_get(uint32_t cod case kInstDas: return x86SpecialInstDaaDas; + case kInstJecxz: + return x86SpecialInstJecxz; + case kInstIdiv: case kInstDiv: return x86SpecialInstDiv; @@ -384,7 +391,7 @@ void X86X64Context::emitLoad(VarData* vd, uint32_t regIndex, const char* reason) X86X64Compiler* compiler = getCompiler(); Mem m = getVarMem(vd); - BaseNode* node = NULL; + Node* node = NULL; bool comment = _emitComments; switch (vd->getType()) { @@ -465,7 +472,7 @@ void X86X64Context::emitSave(VarData* vd, uint32_t regIndex, const char* reason) X86X64Compiler* compiler = getCompiler(); Mem m = getVarMem(vd); - BaseNode* node = NULL; + Node* node = NULL; bool comment = _emitComments; switch (vd->getType()) { @@ -546,7 +553,7 @@ void X86X64Context::emitMove(VarData* vd, uint32_t toRegIndex, uint32_t fromRegI X86X64Compiler* compiler = getCompiler(); - BaseNode* node = NULL; + Node* node = NULL; bool comment = _emitComments; switch (vd->getType()) { @@ -615,7 +622,7 @@ void X86X64Context::emitSwapGp(VarData* aVd, VarData* bVd, uint32_t aIndex, uint X86X64Compiler* compiler = getCompiler(); - BaseNode* node = NULL; + Node* node = NULL; bool comment = _emitComments; #if defined(ASMJIT_BUILD_X64) @@ -1161,8 +1168,8 @@ _Move32: case kVarTypeInt64: case kVarTypeUInt64: - // Move to GPD register will clear the HI-DWORD of GPQ register in 64-bit - // mode. + // Move to Gpd register will clear also high DWORD of Gpq register in + // 64-bit mode. if (imm.isUInt32()) goto _Move32Truncate; @@ -1226,9 +1233,9 @@ static ASMJIT_INLINE void X86X64Context_checkStateVars(X86X64Context* self) { } void X86X64Context::_checkState() { - X86X64Context_checkStateVars(this); - X86X64Context_checkStateVars(this); - X86X64Context_checkStateVars(this); + X86X64Context_checkStateVars(this); + X86X64Context_checkStateVars(this); + X86X64Context_checkStateVars(this); } #else void X86X64Context::_checkState() {} @@ -1270,9 +1277,9 @@ void X86X64Context::loadState(BaseVarState* src_) { uint32_t vdCount = static_cast(_contextVd.getLength()); // Load allocated variables. - X86X64Context_loadStateVars(this, src); - X86X64Context_loadStateVars(this, src); - X86X64Context_loadStateVars(this, src); + X86X64Context_loadStateVars(this, src); + X86X64Context_loadStateVars(this, src); + X86X64Context_loadStateVars(this, src); // Load masks. cur->_occupied = src->_occupied; @@ -1290,7 +1297,7 @@ void X86X64Context::loadState(BaseVarState* src_) { vdArray[i]->setModified(false); } - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // ============================================================================ @@ -1463,9 +1470,9 @@ void X86X64Context::switchState(BaseVarState* src_) { return; // Switch variables. - X86X64Context_switchStateVars(this, src); - X86X64Context_switchStateVars(this, src); - X86X64Context_switchStateVars(this, src); + X86X64Context_switchStateVars(this, src); + X86X64Context_switchStateVars(this, src); + X86X64Context_switchStateVars(this, src); // Calculate changed state. VarData** vdArray = _contextVd.getData(); @@ -1483,7 +1490,7 @@ void X86X64Context::switchState(BaseVarState* src_) { } } - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // ============================================================================ @@ -1495,23 +1502,23 @@ void X86X64Context::intersectStates(BaseVarState* a_, BaseVarState* b_) { VarState* bState = static_cast(b_); // TODO: [COMPILER] Intersect states. - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // ============================================================================ // [asmjit::x86x64::X86X64Context - GetJccFlow / GetOppositeJccFlow] // ============================================================================ -//! @internal -static ASMJIT_INLINE BaseNode* X86X64Context_getJccFlow(JumpNode* jNode) { +//! \internal +static ASMJIT_INLINE Node* X86X64Context_getJccFlow(JumpNode* jNode) { if (jNode->isTaken()) return jNode->getTarget(); else return jNode->getNext(); } -//! @internal -static ASMJIT_INLINE BaseNode* X86X64Context_getOppositeJccFlow(JumpNode* jNode) { +//! \internal +static ASMJIT_INLINE Node* X86X64Context_getOppositeJccFlow(JumpNode* jNode) { if (jNode->isTaken()) return jNode->getNext(); else @@ -1522,7 +1529,7 @@ static ASMJIT_INLINE BaseNode* X86X64Context_getOppositeJccFlow(JumpNode* jNode) // [asmjit::x86x64::X86X64Context - SingleVarInst] // ============================================================================ -//! @internal +//! \internal static void X86X64Context_prepareSingleVarInst(uint32_t code, VarAttr* va) { switch (code) { // - andn reg, reg ; Set all bits in reg to 0. @@ -1555,11 +1562,11 @@ static void X86X64Context_prepareSingleVarInst(uint32_t code, VarAttr* va) { // [asmjit::x86x64::X86X64Context - Helpers] // ============================================================================ -//! @internal +//! \internal //! //! Add unreachable-flow data to the unreachable flow list. -static ASMJIT_INLINE Error X86X64Context_addUnreachableNode(X86X64Context* self, BaseNode* node) { - PodList::Link* link = self->_baseZone.allocT::Link>(); +static ASMJIT_INLINE Error X86X64Context_addUnreachableNode(X86X64Context* self, Node* node) { + PodList::Link* link = self->_baseZone.allocT::Link>(); if (link == NULL) return self->setError(kErrorNoHeapMemory); @@ -1569,11 +1576,11 @@ static ASMJIT_INLINE Error X86X64Context_addUnreachableNode(X86X64Context* self, return kErrorOk; } -//! @internal +//! \internal //! //! Add jump-flow data to the jcc flow list. -static ASMJIT_INLINE Error X86X64Context_addJccNode(X86X64Context* self, BaseNode* node) { - PodList::Link* link = self->_baseZone.allocT::Link>(); +static ASMJIT_INLINE Error X86X64Context_addJccNode(X86X64Context* self, Node* node) { + PodList::Link* link = self->_baseZone.allocT::Link>(); if (link == NULL) ASMJIT_PROPAGATE_ERROR(self->setError(kErrorNoHeapMemory)); @@ -1584,7 +1591,7 @@ static ASMJIT_INLINE Error X86X64Context_addJccNode(X86X64Context* self, BaseNod return kErrorOk; } -//! @internal +//! \internal //! //! Get mask of all registers actually used to pass function arguments. static ASMJIT_INLINE RegMask X86X64Context_getUsedArgs(X86X64Context* self, X86X64CallNode* node, X86X64FuncDecl* decl) { @@ -1813,7 +1820,7 @@ static ASMJIT_INLINE Error X86X64Context_insertSArgNode( // [asmjit::x86x64::X86X64Context - Fetch] // ============================================================================ -//! @internal +//! \internal //! //! Prepare the given function `func`. //! @@ -1826,9 +1833,9 @@ Error X86X64Context::fetch() { uint32_t arch = compiler->getArch(); - BaseNode* node_ = func; - BaseNode* next = NULL; - BaseNode* stop = getStop(); + Node* node_ = func; + Node* next = NULL; + Node* stop = getStop(); uint32_t groupId = 1; uint32_t flowId = 0; @@ -1836,7 +1843,7 @@ Error X86X64Context::fetch() { VarAttr vaTmpList[80]; SArgData sArgList[80]; - PodList::Link* jLink = NULL; + PodList::Link* jLink = NULL; // Function flags. func->clearFuncFlags( @@ -1913,7 +1920,7 @@ Error X86X64Context::fetch() { else if (va->_outRegIndex != kInvalidReg) \ va->_allocableRegs = IntUtil::mask(va->_outRegIndex); \ else \ - va->_allocableRegs &= ~inRegs._regs[class_]; \ + va->_allocableRegs &= ~inRegs.get(class_); \ \ vd->_va = NULL; \ vi->getVa(index)[0] = va[0]; \ @@ -2001,10 +2008,10 @@ _NextGroup: uint32_t remain[kRegClassCount]; HintNode* cur = node; - remain[kRegClassGp] = _baseRegsCount - 1 - func->hasFuncFlag(kFuncFlagIsNaked); - remain[kRegClassFp] = kRegCountFp; - remain[kRegClassMm] = kRegCountMm; - remain[kRegClassXy] = _baseRegsCount; + remain[kRegClassGp ] = _baseRegsCount - 1 - func->hasFuncFlag(kFuncFlagIsNaked); + remain[kRegClassFp ] = kRegCountFp; + remain[kRegClassMm ] = kRegCountMm; + remain[kRegClassXyz] = _baseRegsCount; // Merge as many alloc-hints as possible. for (;;) { @@ -2020,14 +2027,14 @@ _NextGroup: regMask = IntUtil::mask(regIndex); if (va == NULL) { - if ((inRegs._regs[regClass] & regMask) != 0) + if (inRegs.has(regClass, regMask)) break; if (remain[regClass] == 0) break; VI_ADD_VAR(vd, va, kVarAttrInReg, gaRegs[regClass]); if (regMask != 0) { - inRegs._regs[regClass] ^= static_cast(regMask); + inRegs.xor_(regClass, regMask); va->setInRegs(regMask); va->setInRegIndex(regIndex); } @@ -2035,10 +2042,10 @@ _NextGroup: remain[regClass]--; } else if (regMask != 0) { - if ((inRegs._regs[regClass] & regMask) != 0 && va->getInRegs() != regMask) + if (inRegs.has(regClass, regMask) && va->getInRegs() != regMask) break; - inRegs._regs[regClass] ^= static_cast(va->getInRegs() | regMask); + inRegs.xor_(regClass, va->getInRegs() | regMask); va->setInRegs(regMask); va->setInRegIndex(regIndex); } @@ -2160,7 +2167,7 @@ _NextGroup: if (static_cast(op)->isGp()) c = kRegClassGp; else - c = kRegClassXy; + c = kRegClassXyz; if (inReg != kInvalidReg) { uint32_t mask = IntUtil::mask(inReg); @@ -2316,7 +2323,7 @@ _NextGroup: if (node->isJmpOrJcc()) { JumpNode* jNode = static_cast(node); - BaseNode* jNext = jNode->getNext(); + Node* jNext = jNode->getNext(); TargetNode* jTarget = jNode->getTarget(); // If this jump is unconditional we put next node to unreachable node @@ -2378,7 +2385,7 @@ _NextGroup: // Overlapped function arguments. if (vd->getVa() != NULL) - return compiler->setError(kErrorCompilerOverlappedArgs); + return compiler->setError(kErrorOverlappedArgs); VI_ADD_VAR(vd, va, 0, 0); uint32_t aType = arg.getVarType(); @@ -2575,10 +2582,10 @@ _NextGroup: } // Init clobbered. - clobberedRegs.set(kRegClassGp, IntUtil::bits(_baseRegsCount) & (~decl->getPreserved(kRegClassGp))); - clobberedRegs.set(kRegClassFp, IntUtil::bits(kRegCountFp ) ); - clobberedRegs.set(kRegClassMm, IntUtil::bits(kRegCountMm ) & (~decl->getPreserved(kRegClassMm))); - clobberedRegs.set(kRegClassXy, IntUtil::bits(_baseRegsCount) & (~decl->getPreserved(kRegClassXy))); + clobberedRegs.set(kRegClassGp , IntUtil::bits(_baseRegsCount) & (~decl->getPreserved(kRegClassGp ))); + clobberedRegs.set(kRegClassFp , IntUtil::bits(kRegCountFp )); + clobberedRegs.set(kRegClassMm , IntUtil::bits(kRegCountMm ) & (~decl->getPreserved(kRegClassMm ))); + clobberedRegs.set(kRegClassXyz, IntUtil::bits(_baseRegsCount) & (~decl->getPreserved(kRegClassXyz))); VI_END(node_); break; @@ -2606,7 +2613,7 @@ _NoMemory: // [asmjit::x86x64::X86X64Context - Analyze] // ============================================================================ -//! @internal +//! \internal struct LivenessTarget { //! Previous target. LivenessTarget* prev; @@ -2620,7 +2627,7 @@ struct LivenessTarget { Error X86X64Context::analyze() { FuncNode* func = getFunc(); - BaseNode* node = func->getEnd(); + Node* node = func->getEnd(); JumpNode* from = NULL; uint32_t bLen = static_cast( @@ -2905,8 +2912,8 @@ static bool X86X64Context_annotateInstruction(X86X64Context* self, Error X86X64Context::annotate() { FuncNode* func = getFunc(); - BaseNode* node_ = func; - BaseNode* end = func->getEnd(); + Node* node_ = func; + Node* end = func->getEnd(); Zone& sa = _compiler->_stringZone; StringBuilderT<128> sb; @@ -2958,7 +2965,7 @@ struct X86X64BaseAlloc { ASMJIT_INLINE VarState* getState() const { return _context->getState(); } //! Get the node. - ASMJIT_INLINE BaseNode* getNode() const { return _node; } + ASMJIT_INLINE Node* getNode() const { return _node; } //! Get VarAttr list (all). ASMJIT_INLINE VarAttr* getVaList() const { return _vaList[0]; } @@ -2990,7 +2997,7 @@ struct X86X64BaseAlloc { protected: // Just to prevent calling these methods by X86X64Context::translate(). - ASMJIT_INLINE void init(BaseNode* node, VarInst* vi); + ASMJIT_INLINE void init(Node* node, VarInst* vi); ASMJIT_INLINE void cleanup(); // -------------------------------------------------------------------------- @@ -3013,7 +3020,7 @@ protected: X86X64Compiler* _compiler; //! Node. - BaseNode* _node; + Node* _node; //! Variable instructions. VarInst* _vi; @@ -3033,7 +3040,7 @@ protected: // [asmjit::x86x64::X86X64BaseAlloc - Init / Cleanup] // ============================================================================ -ASMJIT_INLINE void X86X64BaseAlloc::init(BaseNode* node, VarInst* vi) { +ASMJIT_INLINE void X86X64BaseAlloc::init(Node* node, VarInst* vi) { _node = node; _vi = vi; @@ -3045,10 +3052,10 @@ ASMJIT_INLINE void X86X64BaseAlloc::init(BaseNode* node, VarInst* vi) { // Setup the lists of variables. { VarAttr* va = vi->getVaList(); - _vaList[kRegClassGp] = va; - _vaList[kRegClassFp] = va + vi->getVaStart(kRegClassFp); - _vaList[kRegClassMm] = va + vi->getVaStart(kRegClassMm); - _vaList[kRegClassXy] = va + vi->getVaStart(kRegClassXy); + _vaList[kRegClassGp ] = va; + _vaList[kRegClassFp ] = va + vi->getVaStart(kRegClassFp ); + _vaList[kRegClassMm ] = va + vi->getVaStart(kRegClassMm ); + _vaList[kRegClassXyz] = va + vi->getVaStart(kRegClassXyz); } // Setup counters. @@ -3118,7 +3125,7 @@ ASMJIT_INLINE void X86X64BaseAlloc::unuseAfter() { // [asmjit::x86x64::X86X64VarAlloc] // ============================================================================ -//! @internal +//! \internal //! //! Register allocator context (asm instructions). struct X86X64VarAlloc : public X86X64BaseAlloc { @@ -3133,7 +3140,7 @@ struct X86X64VarAlloc : public X86X64BaseAlloc { // [Run] // -------------------------------------------------------------------------- - ASMJIT_INLINE Error run(BaseNode* node); + ASMJIT_INLINE Error run(Node* node); // -------------------------------------------------------------------------- // [Init / Cleanup] @@ -3142,7 +3149,7 @@ struct X86X64VarAlloc : public X86X64BaseAlloc { protected: // Just to prevent calling these methods by X86X64Context::translate(). - ASMJIT_INLINE void init(BaseNode* node, VarInst* vi); + ASMJIT_INLINE void init(Node* node, VarInst* vi); ASMJIT_INLINE void cleanup(); // -------------------------------------------------------------------------- @@ -3198,7 +3205,7 @@ protected: // [asmjit::X86X64VarAlloc - Run] // ============================================================================ -ASMJIT_INLINE Error X86X64VarAlloc::run(BaseNode* node_) { +ASMJIT_INLINE Error X86X64VarAlloc::run(Node* node_) { // Initialize. VarInst* vi = node_->getVarInst(); if (vi == NULL) @@ -3208,25 +3215,25 @@ ASMJIT_INLINE Error X86X64VarAlloc::run(BaseNode* node_) { init(node_, vi); // Unuse overwritten variables. - unuseBefore(); - unuseBefore(); - unuseBefore(); + unuseBefore(); + unuseBefore(); + unuseBefore(); // Plan the allocation. Planner assigns input/output registers for each // variable and decides whether to allocate it in register or stack. - plan(); - plan(); - plan(); + plan(); + plan(); + plan(); // Spill all variables marked by plan(). - spill(); - spill(); - spill(); + spill(); + spill(); + spill(); // Alloc all variables marked by plan(). - alloc(); - alloc(); - alloc(); + alloc(); + alloc(); + alloc(); // Translate node operands. if (node_->getType() == kNodeTypeInst) { @@ -3271,9 +3278,9 @@ ASMJIT_INLINE Error X86X64VarAlloc::run(BaseNode* node_) { } // Mark variables as modified. - modified(); - modified(); - modified(); + modified(); + modified(); + modified(); // Cleanup; disconnect Vd->Va. cleanup(); @@ -3283,9 +3290,9 @@ ASMJIT_INLINE Error X86X64VarAlloc::run(BaseNode* node_) { _context->_clobberedRegs.add(vi->_clobberedRegs); // Unuse. - unuseAfter(); - unuseAfter(); - unuseAfter(); + unuseAfter(); + unuseAfter(); + unuseAfter(); return kErrorOk; } @@ -3294,7 +3301,7 @@ ASMJIT_INLINE Error X86X64VarAlloc::run(BaseNode* node_) { // [asmjit::x86x64::X86X64VarAlloc - Init / Cleanup] // ============================================================================ -ASMJIT_INLINE void X86X64VarAlloc::init(BaseNode* node, VarInst* vi) { +ASMJIT_INLINE void X86X64VarAlloc::init(Node* node, VarInst* vi) { X86X64BaseAlloc::init(node, vi); // These will block planner from assigning them during planning. Planner will @@ -3663,7 +3670,7 @@ ASMJIT_INLINE uint32_t X86X64VarAlloc::guessAlloc(VarData* vd, uint32_t allocabl uint32_t maxLookAhead = _compiler->getMaxLookAhead(); // Look ahead and calculate mask of special registers on both - input/output. - BaseNode* node = _node; + Node* node = _node; for (i = 0; i < maxLookAhead; i++) { // Stop on 'RetNode' and 'EndNode. if (node->hasFlag(kNodeFlagIsRet)) @@ -3743,7 +3750,7 @@ ASMJIT_INLINE void X86X64VarAlloc::modified() { // [asmjit::x86x64::X86X64CallAlloc] // ============================================================================ -//! @internal +//! \internal //! //! Register allocator context (function call). struct X86X64CallAlloc : public X86X64BaseAlloc { @@ -3858,33 +3865,33 @@ ASMJIT_INLINE Error X86X64CallAlloc::run(X86X64CallNode* node) { // Plan register allocation. Planner is only able to assign one register per // variable. If any variable is used multiple times it will be handled later. - plan(); - plan(); - plan(); + plan(); + plan(); + plan(); // Spill. - spill(); - spill(); - spill(); + spill(); + spill(); + spill(); // Alloc. - alloc(); - alloc(); - alloc(); + alloc(); + alloc(); + alloc(); // Unuse clobbered registers that are not used to pass function arguments and // save variables used to pass function arguments that will be reused later on. - save(); - save(); - save(); + save(); + save(); + save(); // Allocate immediates in registers and on the stack. allocImmsOnStack(); // Duplicate. - duplicate(); - duplicate(); - duplicate(); + duplicate(); + duplicate(); + duplicate(); // Translate call operand. ASMJIT_PROPAGATE_ERROR(X86X64Context_translateOperands(_context, &node->_target, 1)); @@ -3899,17 +3906,17 @@ ASMJIT_INLINE Error X86X64CallAlloc::run(X86X64CallNode* node) { } // Clobber. - clobber(); - clobber(); - clobber(); + clobber(); + clobber(); + clobber(); // Return. ret(); // Unuse. - unuseAfter(); - unuseAfter(); - unuseAfter(); + unuseAfter(); + unuseAfter(); + unuseAfter(); // Cleanup; disconnect Vd->Va. cleanup(); @@ -4253,7 +4260,7 @@ ASMJIT_INLINE uint32_t X86X64CallAlloc::guessAlloc(VarData* vd, uint32_t allocab uint32_t maxLookAhead = _compiler->getMaxLookAhead(); // Look ahead and calculate mask of special registers on both - input/output. - BaseNode* node = _node; + Node* node = _node; for (i = 0; i < maxLookAhead; i++) { // Stop on 'RetNode' and 'EndNode. if (node->hasFlag(kNodeFlagIsRet)) @@ -4392,10 +4399,10 @@ ASMJIT_INLINE void X86X64CallAlloc::ret() { _context->unuse(vd); _context->attach(vd, regIndex, true); break; - case kRegClassXy: + case kRegClassXyz: if (vd->getRegIndex() != kInvalidReg) - _context->unuse(vd); - _context->attach(vd, regIndex, true); + _context->unuse(vd); + _context->attach(vd, regIndex, true); break; } } @@ -4405,7 +4412,7 @@ ASMJIT_INLINE void X86X64CallAlloc::ret() { // [asmjit::x86x64::X86X64Context - TranslateOperands] // ============================================================================ -//! @internal +//! \internal static Error X86X64Context_translateOperands(X86X64Context* self, Operand* opList, uint32_t opCount) { X86X64Compiler* compiler = self->getCompiler(); const VarInfo* varInfo = _varInfo; @@ -4460,7 +4467,7 @@ static Error X86X64Context_translateOperands(X86X64Context* self, Operand* opLis // [asmjit::x86x64::X86X64Context - TranslatePrologEpilog] // ============================================================================ -//! @internal +//! \internal static Error X86X64Context_initFunc(X86X64Context* self, X86X64FuncNode* func) { X86X64Compiler* compiler = self->getCompiler(); X86X64FuncDecl* decl = func->getDecl(); @@ -4469,10 +4476,10 @@ static Error X86X64Context_initFunc(X86X64Context* self, X86X64FuncNode* func) { uint32_t regSize = compiler->getRegSize(); // Setup "Save-Restore" registers. - func->_saveRestoreRegs.set(kRegClassGp, clobberedRegs.get(kRegClassGp) & decl->getPreserved(kRegClassGp)); - func->_saveRestoreRegs.set(kRegClassFp, 0 ); - func->_saveRestoreRegs.set(kRegClassMm, clobberedRegs.get(kRegClassMm) & decl->getPreserved(kRegClassMm)); - func->_saveRestoreRegs.set(kRegClassXy, clobberedRegs.get(kRegClassXy) & decl->getPreserved(kRegClassXy)); + func->_saveRestoreRegs.set(kRegClassGp , clobberedRegs.get(kRegClassGp ) & decl->getPreserved(kRegClassGp )); + func->_saveRestoreRegs.set(kRegClassFp , 0); + func->_saveRestoreRegs.set(kRegClassMm , clobberedRegs.get(kRegClassMm ) & decl->getPreserved(kRegClassMm )); + func->_saveRestoreRegs.set(kRegClassXyz, clobberedRegs.get(kRegClassXyz) & decl->getPreserved(kRegClassXyz)); ASMJIT_ASSERT(!func->_saveRestoreRegs.has(kRegClassGp, IntUtil::mask(kRegIndexSp))); @@ -4484,7 +4491,7 @@ static Error X86X64Context_initFunc(X86X64Context* self, X86X64FuncNode* func) { // Require 16-byte alignment if 8-byte vars are used. if (self->_mem8ByteVarsUsed) requiredStackAlignment = 16; - else if (func->_saveRestoreRegs.get(kRegClassMm) || func->_saveRestoreRegs.get(kRegClassXy)) + else if (func->_saveRestoreRegs.get(kRegClassMm) || func->_saveRestoreRegs.get(kRegClassXyz)) requiredStackAlignment = 16; else if (IntUtil::inInterval(func->getRequiredStackAlignment(), 8, 16)) requiredStackAlignment = 16; @@ -4580,9 +4587,9 @@ static Error X86X64Context_initFunc(X86X64Context* self, X86X64FuncNode* func) { // Setup stack size used to save preserved registers. { - uint32_t memGpSize = IntUtil::bitCount(func->_saveRestoreRegs.get(kRegClassGp)) * regSize; - uint32_t memMmSize = IntUtil::bitCount(func->_saveRestoreRegs.get(kRegClassMm)) * 8; - uint32_t memXmmSize = IntUtil::bitCount(func->_saveRestoreRegs.get(kRegClassXy)) * 16; + uint32_t memGpSize = IntUtil::bitCount(func->_saveRestoreRegs.get(kRegClassGp )) * regSize; + uint32_t memMmSize = IntUtil::bitCount(func->_saveRestoreRegs.get(kRegClassMm )) * 8; + uint32_t memXmmSize = IntUtil::bitCount(func->_saveRestoreRegs.get(kRegClassXyz)) * 16; if (func->hasFuncFlag(kFuncFlagPushPop)) { func->_pushPopStackSize = memGpSize; @@ -4663,10 +4670,10 @@ static Error X86X64Context_initFunc(X86X64Context* self, X86X64FuncNode* func) { return kErrorOk; } -//! @internal -static Error X86X64Context_patchFuncMem(X86X64Context* self, X86X64FuncNode* func, BaseNode* stop) { +//! \internal +static Error X86X64Context_patchFuncMem(X86X64Context* self, X86X64FuncNode* func, Node* stop) { X86X64Compiler* compiler = self->getCompiler(); - BaseNode* node = func; + Node* node = func; do { if (node->getType() == kNodeTypeInst) { @@ -4702,7 +4709,7 @@ static Error X86X64Context_patchFuncMem(X86X64Context* self, X86X64FuncNode* fun return kErrorOk; } -//! @internal +//! \internal static Error X86X64Context_translatePrologEpilog(X86X64Context* self, X86X64FuncNode* func) { X86X64Compiler* compiler = self->getCompiler(); X86X64FuncDecl* decl = func->getDecl(); @@ -4733,9 +4740,9 @@ static Error X86X64Context_translatePrologEpilog(X86X64Context* self, X86X64Func } uint32_t i, mask; - uint32_t regsGp = func->getSaveRestoreRegs(kRegClassGp); - uint32_t regsMm = func->getSaveRestoreRegs(kRegClassMm); - uint32_t regsXmm = func->getSaveRestoreRegs(kRegClassXy); + uint32_t regsGp = func->getSaveRestoreRegs(kRegClassGp ); + uint32_t regsMm = func->getSaveRestoreRegs(kRegClassMm ); + uint32_t regsXmm = func->getSaveRestoreRegs(kRegClassXyz); bool earlyPushPop = false; bool useLeaEpilog = false; @@ -4966,10 +4973,10 @@ static Error X86X64Context_translatePrologEpilog(X86X64Context* self, X86X64Func // [asmjit::x86x64::X86X64Context - Translate - Jump] // ============================================================================ -//! @internal +//! \internal static void X86X64Context_translateJump(X86X64Context* self, JumpNode* jNode, TargetNode* jTarget) { X86X64Compiler* compiler = self->getCompiler(); - BaseNode* extNode = self->getExtraBlock(); + Node* extNode = self->getExtraBlock(); // TODO: [COMPILER] State Change. compiler->_setCursor(extNode); @@ -5003,7 +5010,7 @@ static void X86X64Context_translateJump(X86X64Context* self, JumpNode* jNode, Ta // ============================================================================ static Error X86X64Context_translateRet(X86X64Context* self, RetNode* rNode, TargetNode* exitTarget) { - BaseNode* node = rNode->getNext(); + Node* node = rNode->getNext(); while (node != NULL) { switch (node->getType()) { @@ -5061,11 +5068,11 @@ Error X86X64Context::translate() { X86X64CallAlloc cAlloc(this); // Flow. - BaseNode* node_ = func; - BaseNode* next = NULL; - BaseNode* stop = getStop(); + Node* node_ = func; + Node* next = NULL; + Node* stop = getStop(); - PodList::Link* jLink = _jccList.getFirst(); + PodList::Link* jLink = _jccList.getFirst(); for (;;) { while (node_->isTranslated()) { @@ -5084,7 +5091,7 @@ _NextGroup: node_ = jLink->getValue(); jLink = jLink->getNext(); - BaseNode* jFlow = X86X64Context_getOppositeJccFlow(static_cast(node_)); + Node* jFlow = X86X64Context_getOppositeJccFlow(static_cast(node_)); loadState(node_->getState()); if (jFlow->getState()) { @@ -5180,7 +5187,7 @@ _NextGroup: } } else { - BaseNode* jNext = node->getNext(); + Node* jNext = node->getNext(); if (jTarget->isTranslated()) { if (jNext->isTranslated()) { @@ -5245,9 +5252,9 @@ _NextGroup: uint32_t regIndex = va->getOutRegIndex(); if (regIndex != kInvalidReg && (va->getFlags() & kVarAttrOutConv) == 0) { switch (vd->getClass()) { - case kRegClassGp: attach(vd, regIndex, true); break; - case kRegClassMm: attach(vd, regIndex, true); break; - case kRegClassXy: attach(vd, regIndex, true); break; + case kRegClassGp : attach(vd, regIndex, true); break; + case kRegClassMm : attach(vd, regIndex, true); break; + case kRegClassXyz: attach(vd, regIndex, true); break; } } else if (va->hasFlag(kVarAttrOutConv)) { @@ -5294,8 +5301,8 @@ _Done: // ============================================================================ template -static ASMJIT_INLINE Error X86X64Context_serialize(X86X64Context* self, X86X64Assembler* assembler, BaseNode* start, BaseNode* stop) { - BaseNode* node_ = start; +static ASMJIT_INLINE Error X86X64Context_serialize(X86X64Context* self, X86X64Assembler* assembler, Node* start, Node* stop) { + Node* node_ = start; StringBuilder& sb = self->_stringBuilder; Logger* logger; @@ -5365,7 +5372,7 @@ static ASMJIT_INLINE Error X86X64Context_serialize(X86X64Context* self, X86X64As switch (node_->getType()) { case kNodeTypeAlign: { AlignNode* node = static_cast(node_); - assembler->align(node->getSize()); + assembler->align(node->getMode(), node->getOffset()); break; } @@ -5562,7 +5569,7 @@ static ASMJIT_INLINE Error X86X64Context_serialize(X86X64Context* self, X86X64As return kErrorOk; } -Error X86X64Context::serialize(BaseAssembler* assembler, BaseNode* start, BaseNode* stop) { +Error X86X64Context::serialize(BaseAssembler* assembler, Node* start, Node* stop) { if (!assembler->hasLogger()) return X86X64Context_serialize<0>(this, static_cast(assembler), start, stop); else diff --git a/src/asmjit/x86/x86context_p.h b/src/asmjit/x86/x86context_p.h index 468d603..8d9f1c9 100644 --- a/src/asmjit/x86/x86context_p.h +++ b/src/asmjit/x86/x86context_p.h @@ -14,7 +14,6 @@ #include "../base/intutil.h" #include "../x86/x86assembler.h" #include "../x86/x86compiler.h" -#include "../x86/x86defs.h" // [Api-Begin] #include "../apibegin.h" @@ -22,14 +21,20 @@ namespace asmjit { namespace x86x64 { -//! @addtogroup asmjit_x86x64_codegen -//! @{ - // ============================================================================ // [asmjit::Context] // ============================================================================ -//! @internal +#if defined(ASMJIT_DEBUG) +# define ASMJIT_X86_CHECK_STATE _checkState(); +#else +# define ASMJIT_X86_CHECK_STATE +#endif // ASMJIT_DEBUG + +//! \addtogroup asmjit_x86x64_tree +//! \{ + +//! \internal //! //! Compiler context is used by `X86X64Compiler`. //! @@ -110,14 +115,8 @@ struct X86X64Context : public BaseContext { void _checkState(); -#if defined(ASMJIT_DEBUG) -#define ASMJIT_CONTEXT_CHECK_STATE _checkState(); -#else -#define ASMJIT_CONTEXT_CHECK_STATE -#endif // ASMJIT_DEBUG - ASMJIT_INLINE uint32_t getRegsCount(uint32_t c) const { - if (c == kRegClassGp || c == kRegClassXy) + if (c == kRegClassGp || c == kRegClassXyz) return _baseRegsCount; else return 8; @@ -154,7 +153,7 @@ struct X86X64Context : public BaseContext { _x86State._occupied.add(C, regMask); _x86State._modified.add(C, static_cast(modified) << regIndex); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } //! Detach. @@ -178,7 +177,7 @@ struct X86X64Context : public BaseContext { _x86State._occupied.del(C, regMask); _x86State._modified.del(C, regMask); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // -------------------------------------------------------------------------- @@ -206,7 +205,7 @@ struct X86X64Context : public BaseContext { _x86State._occupied.xor_(C, bothRegMask); _x86State._modified.xor_(C, bothRegMask & -static_cast(vd->isModified())); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // -------------------------------------------------------------------------- @@ -227,7 +226,7 @@ struct X86X64Context : public BaseContext { emitLoad(vd, regIndex, "Load"); attach(vd, regIndex, false); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } //! Save. @@ -247,7 +246,7 @@ struct X86X64Context : public BaseContext { vd->setModified(false); _x86State._modified.del(C, regMask); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // -------------------------------------------------------------------------- @@ -270,7 +269,7 @@ struct X86X64Context : public BaseContext { rebase(vd, regIndex, oldIndex); } - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } //! Swap two registers @@ -301,7 +300,7 @@ struct X86X64Context : public BaseContext { uint32_t m = aVd->isModified() ^ bVd->isModified(); _x86State._modified.xor_(kRegClassGp, (m << aIndex) | (m << bIndex)); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // -------------------------------------------------------------------------- @@ -332,7 +331,7 @@ struct X86X64Context : public BaseContext { regMask ^= IntUtil::mask(oldRegIndex); } else { - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE return; } @@ -343,7 +342,7 @@ struct X86X64Context : public BaseContext { _x86State._occupied.xor_(C, regMask); _x86State._modified.xor_(C, regMask & -static_cast(vd->isModified())); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } //! Spill. @@ -354,7 +353,7 @@ struct X86X64Context : public BaseContext { ASMJIT_ASSERT(vd->getClass() == C); if (vd->getState() != kVarStateReg) { - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE return; } @@ -367,7 +366,7 @@ struct X86X64Context : public BaseContext { emitSave(vd, regIndex, "Spill"); detach(vd, regIndex, kVarStateMem); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // -------------------------------------------------------------------------- @@ -384,7 +383,7 @@ struct X86X64Context : public BaseContext { vd->setModified(true); _x86State._modified.add(C, regMask); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // -------------------------------------------------------------------------- @@ -406,7 +405,7 @@ struct X86X64Context : public BaseContext { else vd->setState(vState); - ASMJIT_CONTEXT_CHECK_STATE + ASMJIT_X86_CHECK_STATE } // -------------------------------------------------------------------------- @@ -459,7 +458,7 @@ struct X86X64Context : public BaseContext { // [Serialize] // -------------------------------------------------------------------------- - virtual Error serialize(BaseAssembler* assembler, BaseNode* start, BaseNode* stop); + virtual Error serialize(BaseAssembler* assembler, Node* start, Node* stop); // -------------------------------------------------------------------------- // [Members] @@ -507,7 +506,7 @@ struct X86X64Context : public BaseContext { StringBuilderT<256> _stringBuilder; }; -//! @} +//! \} } // x86x64 namespace } // asmjit namespace diff --git a/src/asmjit/x86/x86cpuinfo.cpp b/src/asmjit/x86/x86cpuinfo.cpp index 7ca4010..bc51f61 100644 --- a/src/asmjit/x86/x86cpuinfo.cpp +++ b/src/asmjit/x86/x86cpuinfo.cpp @@ -37,15 +37,11 @@ struct CpuVendor { }; static const CpuVendor cpuVendorTable[] = { - { kCpuVendorAmd , { 'A', 'M', 'D', 'i', 's', 'b', 'e', 't', 't', 'e', 'r', '!' } }, - { kCpuVendorAmd , { 'A', 'u', 't', 'h', 'e', 'n', 't', 'i', 'c', 'A', 'M', 'D' } }, - { kCpuVendorVia , { 'C', 'e', 'n', 't', 'a', 'u', 'r', 'H', 'a', 'u', 'l', 's' } }, - { kCpuVendorNSM , { 'C', 'y', 'r', 'i', 'x', 'I', 'n', 's', 't', 'e', 'a', 'd' } }, { kCpuVendorIntel , { 'G', 'e', 'n', 'u', 'i', 'n', 'e', 'I', 'n', 't', 'e', 'l' } }, - { kCpuVendorTransmeta, { 'G', 'e', 'n', 'u', 'i', 'n', 'e', 'T', 'M', 'x', '8', '6' } }, - { kCpuVendorNSM , { 'G', 'e', 'o', 'd', 'e', ' ', 'b', 'y', ' ', 'N', 'S', 'C' } }, - { kCpuVendorTransmeta, { 'T', 'r', 'a', 'n', 's', 'm', 'e', 't', 'a', 'C', 'P', 'U' } }, - { kCpuVendorVia , { 'V', 'I', 'A', 0 , 'V', 'I', 'A', 0 , 'V', 'I', 'A', 0 } } + { kCpuVendorAmd , { 'A', 'u', 't', 'h', 'e', 'n', 't', 'i', 'c', 'A', 'M', 'D' } }, + { kCpuVendorAmd , { 'A', 'M', 'D', 'i', 's', 'b', 'e', 't', 't', 'e', 'r', '!' } }, + { kCpuVendorVia , { 'V', 'I', 'A', 0 , 'V', 'I', 'A', 0 , 'V', 'I', 'A', 0 } }, + { kCpuVendorVia , { 'C', 'e', 'n', 't', 'a', 'u', 'r', 'H', 'a', 'u', 'l', 's' } } }; static ASMJIT_INLINE bool cpuVendorEq(const CpuVendor& info, const char* vendorString) { @@ -162,7 +158,7 @@ void CpuUtil::detect(CpuInfo* cpuInfo) { ::memcpy(cpuInfo->_vendorString + 4, ®s.edx, 4); ::memcpy(cpuInfo->_vendorString + 8, ®s.ecx, 4); - for (i = 0; i < 3; i++) { + for (i = 0; i < ASMJIT_ARRAY_SIZE(cpuVendorTable); i++) { if (cpuVendorEq(cpuVendorTable[i], cpuInfo->_vendorString)) { cpuInfo->_vendorId = cpuVendorTable[i].id; break; diff --git a/src/asmjit/x86/x86cpuinfo.h b/src/asmjit/x86/x86cpuinfo.h index a5cbe4b..a91c311 100644 --- a/src/asmjit/x86/x86cpuinfo.h +++ b/src/asmjit/x86/x86cpuinfo.h @@ -10,7 +10,6 @@ // [Dependencies - AsmJit] #include "../base/cpuinfo.h" -#include "../base/defs.h" // [Api-Begin] #include "../apibegin.h" @@ -18,15 +17,15 @@ namespace asmjit { namespace x86x64 { -//! @addtogroup asmjit_x86x64_cpu_info -//! @{ - // ============================================================================ // [Forward Declarations] // ============================================================================ struct CpuInfo; +//! \addtogroup asmjit_x86x64_general +//! \{ + // ============================================================================ // [asmjit::x86x64::kCpuFeature] // ============================================================================ @@ -221,7 +220,7 @@ struct CpuInfo : public BaseCpuInfo { uint32_t _maxLogicalProcessors; }; -//! @} +//! \} } // x86x64 namespace } // asmjit namespace diff --git a/src/asmjit/x86/x86defs.h b/src/asmjit/x86/x86defs.h index 2b7f43e..31edefd 100644 --- a/src/asmjit/x86/x86defs.h +++ b/src/asmjit/x86/x86defs.h @@ -2169,7 +2169,7 @@ struct InstInfo { //! //! Move instructions overwrite the first operand or at least part of it, //! This is a very useful hint that is used by variable liveness analysis - //! and `BaseCompiler` in general to know which variable is completely + //! and `BaseCompiler` in general to know which variable is completely //! overwritten. //! //! All AVX/XOP instructions that have 3 or more operands are considered to diff --git a/src/asmjit/x86/x86func.cpp b/src/asmjit/x86/x86func.cpp index cc17086..d99e0fe 100644 --- a/src/asmjit/x86/x86func.cpp +++ b/src/asmjit/x86/x86func.cpp @@ -15,8 +15,8 @@ #include "../base/globals.h" #include "../base/intutil.h" #include "../base/string.h" -#include "../x86/x86defs.h" #include "../x86/x86func.h" +#include "../x86/x86operand.h" // [Api-Begin] #include "../apibegin.h" @@ -46,6 +46,13 @@ static ASMJIT_INLINE uint32_t x86ArgTypeToXmmType(uint32_t aType) { return aType; } +//! Get an architecture from calling convention. +//! +//! Returns `kArchX86` or `kArchX64` depending on `conv`. +static ASMJIT_INLINE uint32_t x86GetArchFromCConv(uint32_t conv) { + return IntUtil::inInterval(conv, kFuncConvX64W, kFuncConvX64U) ? kArchX64 : kArchX86; +} + // ============================================================================ // [asmjit::X86X64FuncDecl - SetPrototype] // ============================================================================ @@ -147,44 +154,44 @@ static uint32_t X86X64FuncDecl_initConv(X86X64FuncDecl* self, uint32_t arch, uin case kFuncConvX64W: self->_spillZoneSize = 32; - self->_passed.set(kRegClassGp, IntUtil::mask(R(Cx), R(Dx), R(R8), R(R9))); + self->_passed.set(kRegClassGp, IntUtil::mask(R(Cx), R(Dx), 8, 9)); self->_passedOrderGp[0] = R(Cx); self->_passedOrderGp[1] = R(Dx); - self->_passedOrderGp[2] = R(R8); - self->_passedOrderGp[3] = R(R9); + self->_passedOrderGp[2] = 8; + self->_passedOrderGp[3] = 9; - self->_passed.set(kRegClassXy, IntUtil::mask(R(Xmm0), R(Xmm1), R(Xmm2), R(Xmm3))); - self->_passedOrderXmm[0] = R(Xmm0); - self->_passedOrderXmm[1] = R(Xmm1); - self->_passedOrderXmm[2] = R(Xmm2); - self->_passedOrderXmm[3] = R(Xmm3); + self->_passed.set(kRegClassXyz, IntUtil::mask(0, 1, 2, 3)); + self->_passedOrderXmm[0] = 0; + self->_passedOrderXmm[1] = 1; + self->_passedOrderXmm[2] = 2; + self->_passedOrderXmm[3] = 3; - self->_preserved.set(kRegClassGp, IntUtil::mask(R(Bx), R(Sp), R(Bp), R(Si), R(Di), R(R12), R(R13), R(R14), R(R15))); - self->_preserved.set(kRegClassXy, IntUtil::mask(R(Xmm6), R(Xmm7), R(Xmm8), R(Xmm9), R(Xmm10), R(Xmm11), R(Xmm12), R(Xmm13), R(Xmm14), R(Xmm15))); + self->_preserved.set(kRegClassGp , IntUtil::mask(R(Bx), R(Sp), R(Bp), R(Si), R(Di), 12, 13, 14, 15)); + self->_preserved.set(kRegClassXyz, IntUtil::mask(6, 7, 8, 9, 10, 11, 12, 13, 14, 15)); break; case kFuncConvX64U: self->_redZoneSize = 128; - self->_passed.set(kRegClassGp, IntUtil::mask(R(Di), R(Si), R(Dx), R(Cx), R(R8), R(R9))); + self->_passed.set(kRegClassGp, IntUtil::mask(R(Di), R(Si), R(Dx), R(Cx), 8, 9)); self->_passedOrderGp[0] = R(Di); self->_passedOrderGp[1] = R(Si); self->_passedOrderGp[2] = R(Dx); self->_passedOrderGp[3] = R(Cx); - self->_passedOrderGp[4] = R(R8); - self->_passedOrderGp[5] = R(R9); + self->_passedOrderGp[4] = 8; + self->_passedOrderGp[5] = 9; - self->_passed.set(kRegClassXy, IntUtil::mask(R(Xmm0), R(Xmm1), R(Xmm2), R(Xmm3), R(Xmm4), R(Xmm5), R(Xmm6), R(Xmm7))); - self->_passedOrderXmm[0] = R(Xmm0); - self->_passedOrderXmm[1] = R(Xmm1); - self->_passedOrderXmm[2] = R(Xmm2); - self->_passedOrderXmm[3] = R(Xmm3); - self->_passedOrderXmm[4] = R(Xmm4); - self->_passedOrderXmm[5] = R(Xmm5); - self->_passedOrderXmm[6] = R(Xmm6); - self->_passedOrderXmm[7] = R(Xmm7); + self->_passed.set(kRegClassXyz, IntUtil::mask(0, 1, 2, 3, 4, 5, 6, 7)); + self->_passedOrderXmm[0] = 0; + self->_passedOrderXmm[1] = 1; + self->_passedOrderXmm[2] = 2; + self->_passedOrderXmm[3] = 3; + self->_passedOrderXmm[4] = 4; + self->_passedOrderXmm[5] = 5; + self->_passedOrderXmm[6] = 6; + self->_passedOrderXmm[7] = 7; - self->_preserved.set(kRegClassGp, IntUtil::mask(R(Bx), R(Sp), R(Bp), R(R12), R(R13), R(R14), R(R15))); + self->_preserved.set(kRegClassGp, IntUtil::mask(R(Bx), R(Sp), R(Bp), 12, 13, 14, 15)); break; default: @@ -271,18 +278,18 @@ static Error X86X64FuncDecl_initFunc(X86X64FuncDecl* self, uint32_t arch, case kVarTypeMm: self->_retCount = 1; self->_retList[0]._varType = static_cast(ret); - self->_retList[0]._regIndex = kRegIndexMm0; + self->_retList[0]._regIndex = 0; break; case kVarTypeFp32: self->_retCount = 1; if (arch == kArchX86) { self->_retList[0]._varType = kVarTypeFp32; - self->_retList[0]._regIndex = kRegIndexFp0; + self->_retList[0]._regIndex = 0; } else { self->_retList[0]._varType = kVarTypeXmmSs; - self->_retList[0]._regIndex = kRegIndexXmm0; + self->_retList[0]._regIndex = 0; } break; @@ -290,11 +297,11 @@ static Error X86X64FuncDecl_initFunc(X86X64FuncDecl* self, uint32_t arch, self->_retCount = 1; if (arch == kArchX86) { self->_retList[0]._varType = kVarTypeFp64; - self->_retList[0]._regIndex = kRegIndexFp0; + self->_retList[0]._regIndex = 0; } else { self->_retList[0]._varType = kVarTypeXmmSd; - self->_retList[0]._regIndex = kRegIndexXmm0; + self->_retList[0]._regIndex = 0; break; } break; @@ -306,7 +313,7 @@ static Error X86X64FuncDecl_initFunc(X86X64FuncDecl* self, uint32_t arch, case kVarTypeXmmPd: self->_retCount = 1; self->_retList[0]._varType = static_cast(ret); - self->_retList[0]._regIndex = kRegIndexXmm0; + self->_retList[0]._regIndex = 0; break; } } @@ -381,7 +388,7 @@ static Error X86X64FuncDecl_initFunc(X86X64FuncDecl* self, uint32_t arch, if (x86ArgIsFp(varType) && i < ASMJIT_ARRAY_SIZE(self->_passedOrderXmm)) { arg._varType = static_cast(x86ArgTypeToXmmType(varType)); arg._regIndex = self->_passedOrderXmm[i]; - self->_used.add(kRegClassXy, IntUtil::mask(arg.getRegIndex())); + self->_used.add(kRegClassXyz, IntUtil::mask(arg.getRegIndex())); } } @@ -430,7 +437,7 @@ static Error X86X64FuncDecl_initFunc(X86X64FuncDecl* self, uint32_t arch, if (x86ArgIsFp(varType)) { arg._varType = static_cast(x86ArgTypeToXmmType(varType)); arg._regIndex = self->_passedOrderXmm[xmmPos++]; - self->_used.add(kRegClassXy, IntUtil::mask(arg.getRegIndex())); + self->_used.add(kRegClassXyz, IntUtil::mask(arg.getRegIndex())); } } diff --git a/src/asmjit/x86/x86func.h b/src/asmjit/x86/x86func.h index a8ee948..bcd230f 100644 --- a/src/asmjit/x86/x86func.h +++ b/src/asmjit/x86/x86func.h @@ -9,9 +9,8 @@ #define _ASMJIT_X86_X86FUNC_H // [Dependencies - AsmJit] -#include "../base/defs.h" #include "../base/func.h" -#include "../x86/x86defs.h" +#include "../x86/x86util.h" // [Api-Begin] #include "../apibegin.h" @@ -19,8 +18,8 @@ namespace asmjit { namespace x86x64 { -//! @addtogroup asmjit_x86x64_codegen -//! @{ +//! \addtogroup asmjit_x86x64_tree +//! \{ // ============================================================================ // [asmjit::x86x64::kFuncConv] @@ -83,8 +82,8 @@ ASMJIT_ENUM(kFuncConv) { //! - Caller. //! //! Return value: - //! - Integer types - RAX register. - //! - Floating points - XMM0 register. + //! - Integer types - Rax register. + //! - Floating points - Xmm0 register. //! //! Stack is always aligned by 16 bytes. //! @@ -109,8 +108,8 @@ ASMJIT_ENUM(kFuncConv) { //! - Caller. //! //! Return value: - //! - Integer types - RAX register. - //! - Floating points - XMM0 register. + //! - Integer types - Rax register. + //! - Floating points - Xmm0 register. //! //! Stack is always aligned by 16 bytes. kFuncConvX64U = 2, @@ -165,7 +164,7 @@ ASMJIT_ENUM(kFuncConv) { //! C++ class methods that have variable count of arguments uses different //! calling convention called cdecl. //! - //! @note This calling convention is always used by MSVC for class methods, + //! \note This calling convention is always used by MSVC for class methods, //! it's implicit and there is no way how to override it. kFuncConvMsThisCall = 5, @@ -184,7 +183,7 @@ ASMJIT_ENUM(kFuncConv) { //! - Integer types - EAX:EDX registers. //! - Floating points - fp0 register. //! - //! @note This calling convention differs to GCC one in stack cleaning + //! \note This calling convention differs to GCC one in stack cleaning //! mechanism. kFuncConvMsFastCall = 6, @@ -203,7 +202,7 @@ ASMJIT_ENUM(kFuncConv) { //! - Integer types - EAX:EDX registers. //! - Floating points - fp0 register. //! - //! @note Arguments on the stack are in left-to-right order that differs + //! \note Arguments on the stack are in left-to-right order that differs //! to other fastcall conventions used in different compilers. kFuncConvBorlandFastCall = 7, @@ -222,7 +221,7 @@ ASMJIT_ENUM(kFuncConv) { //! - Integer types - EAX:EDX registers. //! - Floating points - fp0 register. //! - //! @note This calling convention should be compatible with `kFuncConvMsFastCall`. + //! \note This calling convention should be compatible with `kFuncConvMsFastCall`. kFuncConvGccFastCall = 8, //! GCC specific regparm(1) convention. @@ -273,7 +272,7 @@ ASMJIT_ENUM(kFuncConv) { //! - Floating points - fp0 register. kFuncConvGccRegParm3 = 11, - //! @internal + //! \internal //! //! Count of function calling conventions. _kFuncConvCount = 12, @@ -282,55 +281,51 @@ ASMJIT_ENUM(kFuncConv) { // [Host] // -------------------------------------------------------------------------- - //! @def kFuncConvHost +#if defined(ASMJIT_DOCGEN) //! Default calling convention for current platform / operating system. + kFuncConvHost = DependsOnHost, - //! @def kFuncConvHostCDecl //! Default C calling convention based on current compiler's settings. + kFuncConvHostCDecl = DependsOnHost, - //! @def kFuncConvHostStdCall //! Compatibility for `__stdcall` calling convention. //! - //! @note This enumeration is always set to a value which is compatible with + //! \note This enumeration is always set to a value which is compatible with //! current compilers __stdcall calling convention. In 64-bit mode the value //! is compatible with `kFuncConvX64W` or `kFuncConvX64U`. + kFuncConvHostStdCall = DependsOnHost, - //! @def kFuncConvHostFastCall //! Compatibility for `__fastcall` calling convention. //! - //! @note This enumeration is always set to a value which is compatible with + //! \note This enumeration is always set to a value which is compatible with //! current compilers `__fastcall` calling convention. In 64-bit mode the value //! is compatible with `kFuncConvX64W` or `kFuncConvX64U`. - -#if defined(ASMJIT_HOST_X86) - + kFuncConvHostFastCall = DependsOnHost +#elif defined(ASMJIT_HOST_X86) + // X86. kFuncConvHost = kFuncConvCDecl, kFuncConvHostCDecl = kFuncConvCDecl, kFuncConvHostStdCall = kFuncConvStdCall, - -# if defined(_MSC_VER) +#if defined(_MSC_VER) kFuncConvHostFastCall = kFuncConvMsFastCall -# elif defined(__GNUC__) +#elif defined(__GNUC__) kFuncConvHostFastCall = kFuncConvGccFastCall -# elif defined(__BORLANDC__) +#elif defined(__BORLANDC__) kFuncConvHostFastCall = kFuncConvBorlandFastCall -# else -# error "asmjit/x86/x86func.h - asmjit::kFuncConvHostFastCall not supported." -# endif - #else - -# if defined(ASMJIT_OS_WINDOWS) +#error "kFuncConvHostFastCall not determined." +#endif +#else + // X64. +#if defined(ASMJIT_OS_WINDOWS) kFuncConvHost = kFuncConvX64W, -# else +#else kFuncConvHost = kFuncConvX64U, -# endif - +#endif kFuncConvHostCDecl = kFuncConvHost, kFuncConvHostStdCall = kFuncConvHost, kFuncConvHostFastCall = kFuncConvHost - -#endif // ASMJIT_HOST +#endif }; // ============================================================================ @@ -385,17 +380,6 @@ ASMJIT_ENUM(kFuncFlags) { kFuncFlagLFence = 0x04000000 }; -// ============================================================================ -// [asmjit::x86x64::x86GetArchFromCConv] -// ============================================================================ - -//! Get architecture by a calling convention. -//! -//! Returns `kArchX86` or `kArchX64` depending on `conv`. -static ASMJIT_INLINE uint32_t x86GetArchFromCConv(uint32_t conv) { - return IntUtil::inInterval(conv, kFuncConvX64W, kFuncConvX64U) ? kArchX64 : kArchX86; -} - // ============================================================================ // [asmjit::x86x64::X86X64FuncDecl] // ============================================================================ @@ -418,7 +402,7 @@ struct X86X64FuncDecl : public FuncDecl { //! Get used registers (mask). //! - //! @note The result depends on the function calling convention AND the + //! \note The result depends on the function calling convention AND the //! function prototype. Returned mask contains only registers actually used //! to pass function arguments. ASMJIT_INLINE uint32_t getUsed(uint32_t c) const { @@ -427,7 +411,7 @@ struct X86X64FuncDecl : public FuncDecl { //! Get passed registers (mask). //! - //! @note The result depends on the function calling convention used; the + //! \note The result depends on the function calling convention used; the //! prototype of the function doesn't affect the mask returned. ASMJIT_INLINE uint32_t getPassed(uint32_t c) const { return _passed.get(c); @@ -435,7 +419,7 @@ struct X86X64FuncDecl : public FuncDecl { //! Get preserved registers (mask). //! - //! @note The result depends on the function calling convention used; the + //! \note The result depends on the function calling convention used; the //! prototype of the function doesn't affect the mask returned. ASMJIT_INLINE uint32_t getPreserved(uint32_t c) const { return _preserved.get(c); @@ -443,7 +427,7 @@ struct X86X64FuncDecl : public FuncDecl { //! Get ther order of passed registers (Gp). //! - //! @note The result depends on the function calling convention used; the + //! \note The result depends on the function calling convention used; the //! prototype of the function doesn't affect the mask returned. ASMJIT_INLINE const uint8_t* getPassedOrderGp() const { return _passedOrderGp; @@ -451,7 +435,7 @@ struct X86X64FuncDecl : public FuncDecl { //! Get ther order of passed registers (Xmm). //! - //! @note The result depends on the function calling convention used; the + //! \note The result depends on the function calling convention used; the //! prototype of the function doesn't affect the mask returned. ASMJIT_INLINE const uint8_t* getPassedOrderXmm() const { return _passedOrderXmm; @@ -465,7 +449,7 @@ struct X86X64FuncDecl : public FuncDecl { //! //! This will set function calling convention and setup arguments variables. //! - //! @note This function will allocate variables, it can be called only once. + //! \note This function will allocate variables, it can be called only once. ASMJIT_API Error setPrototype(uint32_t conv, const FuncPrototype& p); // -------------------------------------------------------------------------- @@ -492,7 +476,7 @@ struct X86X64FuncDecl : public FuncDecl { uint8_t _passedOrderXmm[8]; }; -//! @} +//! \} } // x86x64 namespace } // asmjit namespace diff --git a/src/asmjit/x86/x86defs.cpp b/src/asmjit/x86/x86inst.cpp similarity index 85% rename from src/asmjit/x86/x86defs.cpp rename to src/asmjit/x86/x86inst.cpp index c868719..8ebed3d 100644 --- a/src/asmjit/x86/x86defs.cpp +++ b/src/asmjit/x86/x86inst.cpp @@ -12,7 +12,7 @@ #if defined(ASMJIT_BUILD_X86) || defined(ASMJIT_BUILD_X64) // [Dependencies - AsmJit] -#include "../x86/x86defs.h" +#include "../x86/x86inst.h" // [Api-Begin] #include "../apibegin.h" @@ -21,7 +21,7 @@ namespace asmjit { namespace x86x64 { // ============================================================================ -// [asmjit::x86x64::Instructions and Condition Codes] +// [asmjit::x86x64::Inst] // ============================================================================ // Autogenerated by src-gendefs.js: @@ -288,6 +288,7 @@ const char _instName[] = "jpo\0" "js\0" "jz\0" + "jecxz\0" "jmp\0" "lahf\0" "lddqu\0" @@ -1319,775 +1320,776 @@ enum kInstData_NameIndex { kInstJpo_NameIndex = 1621, kInstJs_NameIndex = 1625, kInstJz_NameIndex = 1628, - kInstJmp_NameIndex = 1631, - kInstLahf_NameIndex = 1635, - kInstLddqu_NameIndex = 1640, - kInstLdmxcsr_NameIndex = 1646, - kInstLea_NameIndex = 1654, - kInstLeave_NameIndex = 1658, - kInstLfence_NameIndex = 1664, - kInstLzcnt_NameIndex = 1671, - kInstMaskmovdqu_NameIndex = 1677, - kInstMaskmovq_NameIndex = 1688, - kInstMaxpd_NameIndex = 1697, - kInstMaxps_NameIndex = 1703, - kInstMaxsd_NameIndex = 1709, - kInstMaxss_NameIndex = 1715, - kInstMfence_NameIndex = 1721, - kInstMinpd_NameIndex = 1728, - kInstMinps_NameIndex = 1734, - kInstMinsd_NameIndex = 1740, - kInstMinss_NameIndex = 1746, - kInstMonitor_NameIndex = 1752, - kInstMov_NameIndex = 1760, - kInstMovapd_NameIndex = 1764, - kInstMovaps_NameIndex = 1771, - kInstMovbe_NameIndex = 1778, - kInstMovd_NameIndex = 1784, - kInstMovddup_NameIndex = 1789, - kInstMovdq2q_NameIndex = 1797, - kInstMovdqa_NameIndex = 1805, - kInstMovdqu_NameIndex = 1812, - kInstMovhlps_NameIndex = 1819, - kInstMovhpd_NameIndex = 1827, - kInstMovhps_NameIndex = 1834, - kInstMovlhps_NameIndex = 1841, - kInstMovlpd_NameIndex = 1849, - kInstMovlps_NameIndex = 1856, - kInstMovmskpd_NameIndex = 1863, - kInstMovmskps_NameIndex = 1872, - kInstMovntdq_NameIndex = 1881, - kInstMovntdqa_NameIndex = 1889, - kInstMovnti_NameIndex = 1898, - kInstMovntpd_NameIndex = 1905, - kInstMovntps_NameIndex = 1913, - kInstMovntq_NameIndex = 1921, - kInstMovptr_NameIndex = 1928, - kInstMovq_NameIndex = 1936, - kInstMovq2dq_NameIndex = 1941, - kInstMovsd_NameIndex = 1949, - kInstMovshdup_NameIndex = 1955, - kInstMovsldup_NameIndex = 1964, - kInstMovss_NameIndex = 1973, - kInstMovsx_NameIndex = 1979, - kInstMovsxd_NameIndex = 1985, - kInstMovupd_NameIndex = 1992, - kInstMovups_NameIndex = 1999, - kInstMovzx_NameIndex = 2006, - kInstMpsadbw_NameIndex = 2012, - kInstMul_NameIndex = 2020, - kInstMulpd_NameIndex = 2024, - kInstMulps_NameIndex = 2030, - kInstMulsd_NameIndex = 2036, - kInstMulss_NameIndex = 2042, - kInstMulx_NameIndex = 2048, - kInstMwait_NameIndex = 2053, - kInstNeg_NameIndex = 2059, - kInstNop_NameIndex = 2063, - kInstNot_NameIndex = 2067, - kInstOr_NameIndex = 2071, - kInstOrpd_NameIndex = 2074, - kInstOrps_NameIndex = 2079, - kInstPabsb_NameIndex = 2084, - kInstPabsd_NameIndex = 2090, - kInstPabsw_NameIndex = 2096, - kInstPackssdw_NameIndex = 2102, - kInstPacksswb_NameIndex = 2111, - kInstPackusdw_NameIndex = 2120, - kInstPackuswb_NameIndex = 2129, - kInstPaddb_NameIndex = 2138, - kInstPaddd_NameIndex = 2144, - kInstPaddq_NameIndex = 2150, - kInstPaddsb_NameIndex = 2156, - kInstPaddsw_NameIndex = 2163, - kInstPaddusb_NameIndex = 2170, - kInstPaddusw_NameIndex = 2178, - kInstPaddw_NameIndex = 2186, - kInstPalignr_NameIndex = 2192, - kInstPand_NameIndex = 2200, - kInstPandn_NameIndex = 2205, - kInstPause_NameIndex = 2211, - kInstPavgb_NameIndex = 2217, - kInstPavgw_NameIndex = 2223, - kInstPblendvb_NameIndex = 2229, - kInstPblendw_NameIndex = 2238, - kInstPclmulqdq_NameIndex = 2246, - kInstPcmpeqb_NameIndex = 2256, - kInstPcmpeqd_NameIndex = 2264, - kInstPcmpeqq_NameIndex = 2272, - kInstPcmpeqw_NameIndex = 2280, - kInstPcmpestri_NameIndex = 2288, - kInstPcmpestrm_NameIndex = 2298, - kInstPcmpgtb_NameIndex = 2308, - kInstPcmpgtd_NameIndex = 2316, - kInstPcmpgtq_NameIndex = 2324, - kInstPcmpgtw_NameIndex = 2332, - kInstPcmpistri_NameIndex = 2340, - kInstPcmpistrm_NameIndex = 2350, - kInstPdep_NameIndex = 2360, - kInstPext_NameIndex = 2365, - kInstPextrb_NameIndex = 2370, - kInstPextrd_NameIndex = 2377, - kInstPextrq_NameIndex = 2384, - kInstPextrw_NameIndex = 2391, - kInstPf2id_NameIndex = 2398, - kInstPf2iw_NameIndex = 2404, - kInstPfacc_NameIndex = 2410, - kInstPfadd_NameIndex = 2416, - kInstPfcmpeq_NameIndex = 2422, - kInstPfcmpge_NameIndex = 2430, - kInstPfcmpgt_NameIndex = 2438, - kInstPfmax_NameIndex = 2446, - kInstPfmin_NameIndex = 2452, - kInstPfmul_NameIndex = 2458, - kInstPfnacc_NameIndex = 2464, - kInstPfpnacc_NameIndex = 2471, - kInstPfrcp_NameIndex = 2479, - kInstPfrcpit1_NameIndex = 2485, - kInstPfrcpit2_NameIndex = 2494, - kInstPfrsqit1_NameIndex = 2503, - kInstPfrsqrt_NameIndex = 2512, - kInstPfsub_NameIndex = 2520, - kInstPfsubr_NameIndex = 2526, - kInstPhaddd_NameIndex = 2533, - kInstPhaddsw_NameIndex = 2540, - kInstPhaddw_NameIndex = 2548, - kInstPhminposuw_NameIndex = 2555, - kInstPhsubd_NameIndex = 2566, - kInstPhsubsw_NameIndex = 2573, - kInstPhsubw_NameIndex = 2581, - kInstPi2fd_NameIndex = 2588, - kInstPi2fw_NameIndex = 2594, - kInstPinsrb_NameIndex = 2600, - kInstPinsrd_NameIndex = 2607, - kInstPinsrq_NameIndex = 2614, - kInstPinsrw_NameIndex = 2621, - kInstPmaddubsw_NameIndex = 2628, - kInstPmaddwd_NameIndex = 2638, - kInstPmaxsb_NameIndex = 2646, - kInstPmaxsd_NameIndex = 2653, - kInstPmaxsw_NameIndex = 2660, - kInstPmaxub_NameIndex = 2667, - kInstPmaxud_NameIndex = 2674, - kInstPmaxuw_NameIndex = 2681, - kInstPminsb_NameIndex = 2688, - kInstPminsd_NameIndex = 2695, - kInstPminsw_NameIndex = 2702, - kInstPminub_NameIndex = 2709, - kInstPminud_NameIndex = 2716, - kInstPminuw_NameIndex = 2723, - kInstPmovmskb_NameIndex = 2730, - kInstPmovsxbd_NameIndex = 2739, - kInstPmovsxbq_NameIndex = 2748, - kInstPmovsxbw_NameIndex = 2757, - kInstPmovsxdq_NameIndex = 2766, - kInstPmovsxwd_NameIndex = 2775, - kInstPmovsxwq_NameIndex = 2784, - kInstPmovzxbd_NameIndex = 2793, - kInstPmovzxbq_NameIndex = 2802, - kInstPmovzxbw_NameIndex = 2811, - kInstPmovzxdq_NameIndex = 2820, - kInstPmovzxwd_NameIndex = 2829, - kInstPmovzxwq_NameIndex = 2838, - kInstPmuldq_NameIndex = 2847, - kInstPmulhrsw_NameIndex = 2854, - kInstPmulhuw_NameIndex = 2863, - kInstPmulhw_NameIndex = 2871, - kInstPmulld_NameIndex = 2878, - kInstPmullw_NameIndex = 2885, - kInstPmuludq_NameIndex = 2892, - kInstPop_NameIndex = 2900, - kInstPopa_NameIndex = 2904, - kInstPopcnt_NameIndex = 2909, - kInstPopf_NameIndex = 2916, - kInstPor_NameIndex = 2921, - kInstPrefetch_NameIndex = 2925, - kInstPrefetch3dNow_NameIndex = 2934, - kInstPrefetchw3dNow_NameIndex = 2949, - kInstPsadbw_NameIndex = 2965, - kInstPshufb_NameIndex = 2972, - kInstPshufd_NameIndex = 2979, - kInstPshufhw_NameIndex = 2986, - kInstPshuflw_NameIndex = 2994, - kInstPshufw_NameIndex = 3002, - kInstPsignb_NameIndex = 3009, - kInstPsignd_NameIndex = 3016, - kInstPsignw_NameIndex = 3023, - kInstPslld_NameIndex = 3030, - kInstPslldq_NameIndex = 3036, - kInstPsllq_NameIndex = 3043, - kInstPsllw_NameIndex = 3049, - kInstPsrad_NameIndex = 3055, - kInstPsraw_NameIndex = 3061, - kInstPsrld_NameIndex = 3067, - kInstPsrldq_NameIndex = 3073, - kInstPsrlq_NameIndex = 3080, - kInstPsrlw_NameIndex = 3086, - kInstPsubb_NameIndex = 3092, - kInstPsubd_NameIndex = 3098, - kInstPsubq_NameIndex = 3104, - kInstPsubsb_NameIndex = 3110, - kInstPsubsw_NameIndex = 3117, - kInstPsubusb_NameIndex = 3124, - kInstPsubusw_NameIndex = 3132, - kInstPsubw_NameIndex = 3140, - kInstPswapd_NameIndex = 3146, - kInstPtest_NameIndex = 3153, - kInstPunpckhbw_NameIndex = 3159, - kInstPunpckhdq_NameIndex = 3169, - kInstPunpckhqdq_NameIndex = 3179, - kInstPunpckhwd_NameIndex = 3190, - kInstPunpcklbw_NameIndex = 3200, - kInstPunpckldq_NameIndex = 3210, - kInstPunpcklqdq_NameIndex = 3220, - kInstPunpcklwd_NameIndex = 3231, - kInstPush_NameIndex = 3241, - kInstPusha_NameIndex = 3246, - kInstPushf_NameIndex = 3252, - kInstPxor_NameIndex = 3258, - kInstRcl_NameIndex = 3263, - kInstRcpps_NameIndex = 3267, - kInstRcpss_NameIndex = 3273, - kInstRcr_NameIndex = 3279, - kInstRdfsbase_NameIndex = 3283, - kInstRdgsbase_NameIndex = 3292, - kInstRdrand_NameIndex = 3301, - kInstRdtsc_NameIndex = 3308, - kInstRdtscp_NameIndex = 3314, - kInstRepLodsb_NameIndex = 3321, - kInstRepLodsd_NameIndex = 3331, - kInstRepLodsq_NameIndex = 3341, - kInstRepLodsw_NameIndex = 3351, - kInstRepMovsb_NameIndex = 3361, - kInstRepMovsd_NameIndex = 3371, - kInstRepMovsq_NameIndex = 3381, - kInstRepMovsw_NameIndex = 3391, - kInstRepStosb_NameIndex = 3401, - kInstRepStosd_NameIndex = 3411, - kInstRepStosq_NameIndex = 3421, - kInstRepStosw_NameIndex = 3431, - kInstRepeCmpsb_NameIndex = 3441, - kInstRepeCmpsd_NameIndex = 3452, - kInstRepeCmpsq_NameIndex = 3463, - kInstRepeCmpsw_NameIndex = 3474, - kInstRepeScasb_NameIndex = 3485, - kInstRepeScasd_NameIndex = 3496, - kInstRepeScasq_NameIndex = 3507, - kInstRepeScasw_NameIndex = 3518, - kInstRepneCmpsb_NameIndex = 3529, - kInstRepneCmpsd_NameIndex = 3541, - kInstRepneCmpsq_NameIndex = 3553, - kInstRepneCmpsw_NameIndex = 3565, - kInstRepneScasb_NameIndex = 3577, - kInstRepneScasd_NameIndex = 3589, - kInstRepneScasq_NameIndex = 3601, - kInstRepneScasw_NameIndex = 3613, - kInstRet_NameIndex = 3625, - kInstRol_NameIndex = 3629, - kInstRor_NameIndex = 3633, - kInstRorx_NameIndex = 3637, - kInstRoundpd_NameIndex = 3642, - kInstRoundps_NameIndex = 3650, - kInstRoundsd_NameIndex = 3658, - kInstRoundss_NameIndex = 3666, - kInstRsqrtps_NameIndex = 3674, - kInstRsqrtss_NameIndex = 3682, - kInstSahf_NameIndex = 3690, - kInstSal_NameIndex = 3695, - kInstSar_NameIndex = 3699, - kInstSarx_NameIndex = 3703, - kInstSbb_NameIndex = 3708, - kInstSeta_NameIndex = 3712, - kInstSetae_NameIndex = 3717, - kInstSetb_NameIndex = 3723, - kInstSetbe_NameIndex = 3728, - kInstSetc_NameIndex = 3734, - kInstSete_NameIndex = 3739, - kInstSetg_NameIndex = 3744, - kInstSetge_NameIndex = 3749, - kInstSetl_NameIndex = 3755, - kInstSetle_NameIndex = 3760, - kInstSetna_NameIndex = 3766, - kInstSetnae_NameIndex = 3772, - kInstSetnb_NameIndex = 3779, - kInstSetnbe_NameIndex = 3785, - kInstSetnc_NameIndex = 3792, - kInstSetne_NameIndex = 3798, - kInstSetng_NameIndex = 3804, - kInstSetnge_NameIndex = 3810, - kInstSetnl_NameIndex = 3817, - kInstSetnle_NameIndex = 3823, - kInstSetno_NameIndex = 3830, - kInstSetnp_NameIndex = 3836, - kInstSetns_NameIndex = 3842, - kInstSetnz_NameIndex = 3848, - kInstSeto_NameIndex = 3854, - kInstSetp_NameIndex = 3859, - kInstSetpe_NameIndex = 3864, - kInstSetpo_NameIndex = 3870, - kInstSets_NameIndex = 3876, - kInstSetz_NameIndex = 3881, - kInstSfence_NameIndex = 3886, - kInstShl_NameIndex = 3893, - kInstShld_NameIndex = 3897, - kInstShlx_NameIndex = 3902, - kInstShr_NameIndex = 3907, - kInstShrd_NameIndex = 3911, - kInstShrx_NameIndex = 3916, - kInstShufpd_NameIndex = 3921, - kInstShufps_NameIndex = 3928, - kInstSqrtpd_NameIndex = 3935, - kInstSqrtps_NameIndex = 3942, - kInstSqrtsd_NameIndex = 3949, - kInstSqrtss_NameIndex = 3956, - kInstStc_NameIndex = 3963, - kInstStd_NameIndex = 3967, - kInstStmxcsr_NameIndex = 3971, - kInstSub_NameIndex = 3979, - kInstSubpd_NameIndex = 3983, - kInstSubps_NameIndex = 3989, - kInstSubsd_NameIndex = 3995, - kInstSubss_NameIndex = 4001, - kInstTest_NameIndex = 4007, - kInstTzcnt_NameIndex = 4012, - kInstUcomisd_NameIndex = 4018, - kInstUcomiss_NameIndex = 4026, - kInstUd2_NameIndex = 4034, - kInstUnpckhpd_NameIndex = 4038, - kInstUnpckhps_NameIndex = 4047, - kInstUnpcklpd_NameIndex = 4056, - kInstUnpcklps_NameIndex = 4065, - kInstVaddpd_NameIndex = 4074, - kInstVaddps_NameIndex = 4081, - kInstVaddsd_NameIndex = 4088, - kInstVaddss_NameIndex = 4095, - kInstVaddsubpd_NameIndex = 4102, - kInstVaddsubps_NameIndex = 4112, - kInstVaesdec_NameIndex = 4122, - kInstVaesdeclast_NameIndex = 4130, - kInstVaesenc_NameIndex = 4142, - kInstVaesenclast_NameIndex = 4150, - kInstVaesimc_NameIndex = 4162, - kInstVaeskeygenassist_NameIndex = 4170, - kInstVandnpd_NameIndex = 4187, - kInstVandnps_NameIndex = 4195, - kInstVandpd_NameIndex = 4203, - kInstVandps_NameIndex = 4210, - kInstVblendpd_NameIndex = 4217, - kInstVblendps_NameIndex = 4226, - kInstVblendvpd_NameIndex = 4235, - kInstVblendvps_NameIndex = 4245, - kInstVbroadcastf128_NameIndex = 4255, - kInstVbroadcasti128_NameIndex = 4270, - kInstVbroadcastsd_NameIndex = 4285, - kInstVbroadcastss_NameIndex = 4298, - kInstVcmppd_NameIndex = 4311, - kInstVcmpps_NameIndex = 4318, - kInstVcmpsd_NameIndex = 4325, - kInstVcmpss_NameIndex = 4332, - kInstVcomisd_NameIndex = 4339, - kInstVcomiss_NameIndex = 4347, - kInstVcvtdq2pd_NameIndex = 4355, - kInstVcvtdq2ps_NameIndex = 4365, - kInstVcvtpd2dq_NameIndex = 4375, - kInstVcvtpd2ps_NameIndex = 4385, - kInstVcvtph2ps_NameIndex = 4395, - kInstVcvtps2dq_NameIndex = 4405, - kInstVcvtps2pd_NameIndex = 4415, - kInstVcvtps2ph_NameIndex = 4425, - kInstVcvtsd2si_NameIndex = 4435, - kInstVcvtsd2ss_NameIndex = 4445, - kInstVcvtsi2sd_NameIndex = 4455, - kInstVcvtsi2ss_NameIndex = 4465, - kInstVcvtss2sd_NameIndex = 4475, - kInstVcvtss2si_NameIndex = 4485, - kInstVcvttpd2dq_NameIndex = 4495, - kInstVcvttps2dq_NameIndex = 4506, - kInstVcvttsd2si_NameIndex = 4517, - kInstVcvttss2si_NameIndex = 4528, - kInstVdivpd_NameIndex = 4539, - kInstVdivps_NameIndex = 4546, - kInstVdivsd_NameIndex = 4553, - kInstVdivss_NameIndex = 4560, - kInstVdppd_NameIndex = 4567, - kInstVdpps_NameIndex = 4573, - kInstVextractf128_NameIndex = 4579, - kInstVextracti128_NameIndex = 4592, - kInstVextractps_NameIndex = 4605, - kInstVfmadd132pd_NameIndex = 4616, - kInstVfmadd132ps_NameIndex = 4628, - kInstVfmadd132sd_NameIndex = 4640, - kInstVfmadd132ss_NameIndex = 4652, - kInstVfmadd213pd_NameIndex = 4664, - kInstVfmadd213ps_NameIndex = 4676, - kInstVfmadd213sd_NameIndex = 4688, - kInstVfmadd213ss_NameIndex = 4700, - kInstVfmadd231pd_NameIndex = 4712, - kInstVfmadd231ps_NameIndex = 4724, - kInstVfmadd231sd_NameIndex = 4736, - kInstVfmadd231ss_NameIndex = 4748, - kInstVfmaddpd_NameIndex = 4760, - kInstVfmaddps_NameIndex = 4769, - kInstVfmaddsd_NameIndex = 4778, - kInstVfmaddss_NameIndex = 4787, - kInstVfmaddsubpd_NameIndex = 4796, - kInstVfmaddsubps_NameIndex = 4808, - kInstVfmaddsub132pd_NameIndex = 4820, - kInstVfmaddsub132ps_NameIndex = 4835, - kInstVfmaddsub213pd_NameIndex = 4850, - kInstVfmaddsub213ps_NameIndex = 4865, - kInstVfmaddsub231pd_NameIndex = 4880, - kInstVfmaddsub231ps_NameIndex = 4895, - kInstVfmsub132pd_NameIndex = 4910, - kInstVfmsub132ps_NameIndex = 4922, - kInstVfmsub132sd_NameIndex = 4934, - kInstVfmsub132ss_NameIndex = 4946, - kInstVfmsub213pd_NameIndex = 4958, - kInstVfmsub213ps_NameIndex = 4970, - kInstVfmsub213sd_NameIndex = 4982, - kInstVfmsub213ss_NameIndex = 4994, - kInstVfmsub231pd_NameIndex = 5006, - kInstVfmsub231ps_NameIndex = 5018, - kInstVfmsub231sd_NameIndex = 5030, - kInstVfmsub231ss_NameIndex = 5042, - kInstVfmsubadd132pd_NameIndex = 5054, - kInstVfmsubadd132ps_NameIndex = 5069, - kInstVfmsubadd213pd_NameIndex = 5084, - kInstVfmsubadd213ps_NameIndex = 5099, - kInstVfmsubadd231pd_NameIndex = 5114, - kInstVfmsubadd231ps_NameIndex = 5129, - kInstVfmsubaddpd_NameIndex = 5144, - kInstVfmsubaddps_NameIndex = 5156, - kInstVfmsubpd_NameIndex = 5168, - kInstVfmsubps_NameIndex = 5177, - kInstVfmsubsd_NameIndex = 5186, - kInstVfmsubss_NameIndex = 5195, - kInstVfnmadd132pd_NameIndex = 5204, - kInstVfnmadd132ps_NameIndex = 5217, - kInstVfnmadd132sd_NameIndex = 5230, - kInstVfnmadd132ss_NameIndex = 5243, - kInstVfnmadd213pd_NameIndex = 5256, - kInstVfnmadd213ps_NameIndex = 5269, - kInstVfnmadd213sd_NameIndex = 5282, - kInstVfnmadd213ss_NameIndex = 5295, - kInstVfnmadd231pd_NameIndex = 5308, - kInstVfnmadd231ps_NameIndex = 5321, - kInstVfnmadd231sd_NameIndex = 5334, - kInstVfnmadd231ss_NameIndex = 5347, - kInstVfnmaddpd_NameIndex = 5360, - kInstVfnmaddps_NameIndex = 5370, - kInstVfnmaddsd_NameIndex = 5380, - kInstVfnmaddss_NameIndex = 5390, - kInstVfnmsub132pd_NameIndex = 5400, - kInstVfnmsub132ps_NameIndex = 5413, - kInstVfnmsub132sd_NameIndex = 5426, - kInstVfnmsub132ss_NameIndex = 5439, - kInstVfnmsub213pd_NameIndex = 5452, - kInstVfnmsub213ps_NameIndex = 5465, - kInstVfnmsub213sd_NameIndex = 5478, - kInstVfnmsub213ss_NameIndex = 5491, - kInstVfnmsub231pd_NameIndex = 5504, - kInstVfnmsub231ps_NameIndex = 5517, - kInstVfnmsub231sd_NameIndex = 5530, - kInstVfnmsub231ss_NameIndex = 5543, - kInstVfnmsubpd_NameIndex = 5556, - kInstVfnmsubps_NameIndex = 5566, - kInstVfnmsubsd_NameIndex = 5576, - kInstVfnmsubss_NameIndex = 5586, - kInstVfrczpd_NameIndex = 5596, - kInstVfrczps_NameIndex = 5604, - kInstVfrczsd_NameIndex = 5612, - kInstVfrczss_NameIndex = 5620, - kInstVgatherdpd_NameIndex = 5628, - kInstVgatherdps_NameIndex = 5639, - kInstVgatherqpd_NameIndex = 5650, - kInstVgatherqps_NameIndex = 5661, - kInstVhaddpd_NameIndex = 5672, - kInstVhaddps_NameIndex = 5680, - kInstVhsubpd_NameIndex = 5688, - kInstVhsubps_NameIndex = 5696, - kInstVinsertf128_NameIndex = 5704, - kInstVinserti128_NameIndex = 5716, - kInstVinsertps_NameIndex = 5728, - kInstVlddqu_NameIndex = 5738, - kInstVldmxcsr_NameIndex = 5745, - kInstVmaskmovdqu_NameIndex = 5754, - kInstVmaskmovpd_NameIndex = 5766, - kInstVmaskmovps_NameIndex = 5777, - kInstVmaxpd_NameIndex = 5788, - kInstVmaxps_NameIndex = 5795, - kInstVmaxsd_NameIndex = 5802, - kInstVmaxss_NameIndex = 5809, - kInstVminpd_NameIndex = 5816, - kInstVminps_NameIndex = 5823, - kInstVminsd_NameIndex = 5830, - kInstVminss_NameIndex = 5837, - kInstVmovapd_NameIndex = 5844, - kInstVmovaps_NameIndex = 5852, - kInstVmovd_NameIndex = 5860, - kInstVmovddup_NameIndex = 5866, - kInstVmovdqa_NameIndex = 5875, - kInstVmovdqu_NameIndex = 5883, - kInstVmovhlps_NameIndex = 5891, - kInstVmovhpd_NameIndex = 5900, - kInstVmovhps_NameIndex = 5908, - kInstVmovlhps_NameIndex = 5916, - kInstVmovlpd_NameIndex = 5925, - kInstVmovlps_NameIndex = 5933, - kInstVmovmskpd_NameIndex = 5941, - kInstVmovmskps_NameIndex = 5951, - kInstVmovntdq_NameIndex = 5961, - kInstVmovntdqa_NameIndex = 5970, - kInstVmovntpd_NameIndex = 5980, - kInstVmovntps_NameIndex = 5989, - kInstVmovq_NameIndex = 5998, - kInstVmovsd_NameIndex = 6004, - kInstVmovshdup_NameIndex = 6011, - kInstVmovsldup_NameIndex = 6021, - kInstVmovss_NameIndex = 6031, - kInstVmovupd_NameIndex = 6038, - kInstVmovups_NameIndex = 6046, - kInstVmpsadbw_NameIndex = 6054, - kInstVmulpd_NameIndex = 6063, - kInstVmulps_NameIndex = 6070, - kInstVmulsd_NameIndex = 6077, - kInstVmulss_NameIndex = 6084, - kInstVorpd_NameIndex = 6091, - kInstVorps_NameIndex = 6097, - kInstVpabsb_NameIndex = 6103, - kInstVpabsd_NameIndex = 6110, - kInstVpabsw_NameIndex = 6117, - kInstVpackssdw_NameIndex = 6124, - kInstVpacksswb_NameIndex = 6134, - kInstVpackusdw_NameIndex = 6144, - kInstVpackuswb_NameIndex = 6154, - kInstVpaddb_NameIndex = 6164, - kInstVpaddd_NameIndex = 6171, - kInstVpaddq_NameIndex = 6178, - kInstVpaddsb_NameIndex = 6185, - kInstVpaddsw_NameIndex = 6193, - kInstVpaddusb_NameIndex = 6201, - kInstVpaddusw_NameIndex = 6210, - kInstVpaddw_NameIndex = 6219, - kInstVpalignr_NameIndex = 6226, - kInstVpand_NameIndex = 6235, - kInstVpandn_NameIndex = 6241, - kInstVpavgb_NameIndex = 6248, - kInstVpavgw_NameIndex = 6255, - kInstVpblendd_NameIndex = 6262, - kInstVpblendvb_NameIndex = 6271, - kInstVpblendw_NameIndex = 6281, - kInstVpbroadcastb_NameIndex = 6290, - kInstVpbroadcastd_NameIndex = 6303, - kInstVpbroadcastq_NameIndex = 6316, - kInstVpbroadcastw_NameIndex = 6329, - kInstVpclmulqdq_NameIndex = 6342, - kInstVpcmov_NameIndex = 6353, - kInstVpcmpeqb_NameIndex = 6360, - kInstVpcmpeqd_NameIndex = 6369, - kInstVpcmpeqq_NameIndex = 6378, - kInstVpcmpeqw_NameIndex = 6387, - kInstVpcmpestri_NameIndex = 6396, - kInstVpcmpestrm_NameIndex = 6407, - kInstVpcmpgtb_NameIndex = 6418, - kInstVpcmpgtd_NameIndex = 6427, - kInstVpcmpgtq_NameIndex = 6436, - kInstVpcmpgtw_NameIndex = 6445, - kInstVpcmpistri_NameIndex = 6454, - kInstVpcmpistrm_NameIndex = 6465, - kInstVpcomb_NameIndex = 6476, - kInstVpcomd_NameIndex = 6483, - kInstVpcomq_NameIndex = 6490, - kInstVpcomub_NameIndex = 6497, - kInstVpcomud_NameIndex = 6505, - kInstVpcomuq_NameIndex = 6513, - kInstVpcomuw_NameIndex = 6521, - kInstVpcomw_NameIndex = 6529, - kInstVperm2f128_NameIndex = 6536, - kInstVperm2i128_NameIndex = 6547, - kInstVpermd_NameIndex = 6558, - kInstVpermil2pd_NameIndex = 6565, - kInstVpermil2ps_NameIndex = 6576, - kInstVpermilpd_NameIndex = 6587, - kInstVpermilps_NameIndex = 6597, - kInstVpermpd_NameIndex = 6607, - kInstVpermps_NameIndex = 6615, - kInstVpermq_NameIndex = 6623, - kInstVpextrb_NameIndex = 6630, - kInstVpextrd_NameIndex = 6638, - kInstVpextrq_NameIndex = 6646, - kInstVpextrw_NameIndex = 6654, - kInstVpgatherdd_NameIndex = 6662, - kInstVpgatherdq_NameIndex = 6673, - kInstVpgatherqd_NameIndex = 6684, - kInstVpgatherqq_NameIndex = 6695, - kInstVphaddbd_NameIndex = 6706, - kInstVphaddbq_NameIndex = 6715, - kInstVphaddbw_NameIndex = 6724, - kInstVphaddd_NameIndex = 6733, - kInstVphadddq_NameIndex = 6741, - kInstVphaddsw_NameIndex = 6750, - kInstVphaddubd_NameIndex = 6759, - kInstVphaddubq_NameIndex = 6769, - kInstVphaddubw_NameIndex = 6779, - kInstVphaddudq_NameIndex = 6789, - kInstVphadduwd_NameIndex = 6799, - kInstVphadduwq_NameIndex = 6809, - kInstVphaddw_NameIndex = 6819, - kInstVphaddwd_NameIndex = 6827, - kInstVphaddwq_NameIndex = 6836, - kInstVphminposuw_NameIndex = 6845, - kInstVphsubbw_NameIndex = 6857, - kInstVphsubdq_NameIndex = 6866, - kInstVphsubd_NameIndex = 6875, - kInstVphsubsw_NameIndex = 6883, - kInstVphsubw_NameIndex = 6892, - kInstVphsubwd_NameIndex = 6900, - kInstVpinsrb_NameIndex = 6909, - kInstVpinsrd_NameIndex = 6917, - kInstVpinsrq_NameIndex = 6925, - kInstVpinsrw_NameIndex = 6933, - kInstVpmacsdd_NameIndex = 6941, - kInstVpmacsdqh_NameIndex = 6950, - kInstVpmacsdql_NameIndex = 6960, - kInstVpmacssdd_NameIndex = 6970, - kInstVpmacssdqh_NameIndex = 6980, - kInstVpmacssdql_NameIndex = 6991, - kInstVpmacsswd_NameIndex = 7002, - kInstVpmacssww_NameIndex = 7012, - kInstVpmacswd_NameIndex = 7022, - kInstVpmacsww_NameIndex = 7031, - kInstVpmadcsswd_NameIndex = 7040, - kInstVpmadcswd_NameIndex = 7051, - kInstVpmaddubsw_NameIndex = 7061, - kInstVpmaddwd_NameIndex = 7072, - kInstVpmaskmovd_NameIndex = 7081, - kInstVpmaskmovq_NameIndex = 7092, - kInstVpmaxsb_NameIndex = 7103, - kInstVpmaxsd_NameIndex = 7111, - kInstVpmaxsw_NameIndex = 7119, - kInstVpmaxub_NameIndex = 7127, - kInstVpmaxud_NameIndex = 7135, - kInstVpmaxuw_NameIndex = 7143, - kInstVpminsb_NameIndex = 7151, - kInstVpminsd_NameIndex = 7159, - kInstVpminsw_NameIndex = 7167, - kInstVpminub_NameIndex = 7175, - kInstVpminud_NameIndex = 7183, - kInstVpminuw_NameIndex = 7191, - kInstVpmovmskb_NameIndex = 7199, - kInstVpmovsxbd_NameIndex = 7209, - kInstVpmovsxbq_NameIndex = 7219, - kInstVpmovsxbw_NameIndex = 7229, - kInstVpmovsxdq_NameIndex = 7239, - kInstVpmovsxwd_NameIndex = 7249, - kInstVpmovsxwq_NameIndex = 7259, - kInstVpmovzxbd_NameIndex = 7269, - kInstVpmovzxbq_NameIndex = 7279, - kInstVpmovzxbw_NameIndex = 7289, - kInstVpmovzxdq_NameIndex = 7299, - kInstVpmovzxwd_NameIndex = 7309, - kInstVpmovzxwq_NameIndex = 7319, - kInstVpmuldq_NameIndex = 7329, - kInstVpmulhrsw_NameIndex = 7337, - kInstVpmulhuw_NameIndex = 7347, - kInstVpmulhw_NameIndex = 7356, - kInstVpmulld_NameIndex = 7364, - kInstVpmullw_NameIndex = 7372, - kInstVpmuludq_NameIndex = 7380, - kInstVpor_NameIndex = 7389, - kInstVpperm_NameIndex = 7394, - kInstVprotb_NameIndex = 7401, - kInstVprotd_NameIndex = 7408, - kInstVprotq_NameIndex = 7415, - kInstVprotw_NameIndex = 7422, - kInstVpsadbw_NameIndex = 7429, - kInstVpshab_NameIndex = 7437, - kInstVpshad_NameIndex = 7444, - kInstVpshaq_NameIndex = 7451, - kInstVpshaw_NameIndex = 7458, - kInstVpshlb_NameIndex = 7465, - kInstVpshld_NameIndex = 7472, - kInstVpshlq_NameIndex = 7479, - kInstVpshlw_NameIndex = 7486, - kInstVpshufb_NameIndex = 7493, - kInstVpshufd_NameIndex = 7501, - kInstVpshufhw_NameIndex = 7509, - kInstVpshuflw_NameIndex = 7518, - kInstVpsignb_NameIndex = 7527, - kInstVpsignd_NameIndex = 7535, - kInstVpsignw_NameIndex = 7543, - kInstVpslld_NameIndex = 7551, - kInstVpslldq_NameIndex = 7558, - kInstVpsllq_NameIndex = 7566, - kInstVpsllvd_NameIndex = 7573, - kInstVpsllvq_NameIndex = 7581, - kInstVpsllw_NameIndex = 7589, - kInstVpsrad_NameIndex = 7596, - kInstVpsravd_NameIndex = 7603, - kInstVpsraw_NameIndex = 7611, - kInstVpsrld_NameIndex = 7618, - kInstVpsrldq_NameIndex = 7625, - kInstVpsrlq_NameIndex = 7633, - kInstVpsrlvd_NameIndex = 7640, - kInstVpsrlvq_NameIndex = 7648, - kInstVpsrlw_NameIndex = 7656, - kInstVpsubb_NameIndex = 7663, - kInstVpsubd_NameIndex = 7670, - kInstVpsubq_NameIndex = 7677, - kInstVpsubsb_NameIndex = 7684, - kInstVpsubsw_NameIndex = 7692, - kInstVpsubusb_NameIndex = 7700, - kInstVpsubusw_NameIndex = 7709, - kInstVpsubw_NameIndex = 7718, - kInstVptest_NameIndex = 7725, - kInstVpunpckhbw_NameIndex = 7732, - kInstVpunpckhdq_NameIndex = 7743, - kInstVpunpckhqdq_NameIndex = 7754, - kInstVpunpckhwd_NameIndex = 7766, - kInstVpunpcklbw_NameIndex = 7777, - kInstVpunpckldq_NameIndex = 7788, - kInstVpunpcklqdq_NameIndex = 7799, - kInstVpunpcklwd_NameIndex = 7811, - kInstVpxor_NameIndex = 7822, - kInstVrcpps_NameIndex = 7828, - kInstVrcpss_NameIndex = 7835, - kInstVroundpd_NameIndex = 7842, - kInstVroundps_NameIndex = 7851, - kInstVroundsd_NameIndex = 7860, - kInstVroundss_NameIndex = 7869, - kInstVrsqrtps_NameIndex = 7878, - kInstVrsqrtss_NameIndex = 7887, - kInstVshufpd_NameIndex = 7896, - kInstVshufps_NameIndex = 7904, - kInstVsqrtpd_NameIndex = 7912, - kInstVsqrtps_NameIndex = 7920, - kInstVsqrtsd_NameIndex = 7928, - kInstVsqrtss_NameIndex = 7936, - kInstVstmxcsr_NameIndex = 7944, - kInstVsubpd_NameIndex = 7953, - kInstVsubps_NameIndex = 7960, - kInstVsubsd_NameIndex = 7967, - kInstVsubss_NameIndex = 7974, - kInstVtestpd_NameIndex = 7981, - kInstVtestps_NameIndex = 7989, - kInstVucomisd_NameIndex = 7997, - kInstVucomiss_NameIndex = 8006, - kInstVunpckhpd_NameIndex = 8015, - kInstVunpckhps_NameIndex = 8025, - kInstVunpcklpd_NameIndex = 8035, - kInstVunpcklps_NameIndex = 8045, - kInstVxorpd_NameIndex = 8055, - kInstVxorps_NameIndex = 8062, - kInstVzeroall_NameIndex = 8069, - kInstVzeroupper_NameIndex = 8078, - kInstWrfsbase_NameIndex = 8089, - kInstWrgsbase_NameIndex = 8098, - kInstXadd_NameIndex = 8107, - kInstXchg_NameIndex = 8112, - kInstXor_NameIndex = 8117, - kInstXorpd_NameIndex = 8121, - kInstXorps_NameIndex = 8127 + kInstJecxz_NameIndex = 1631, + kInstJmp_NameIndex = 1637, + kInstLahf_NameIndex = 1641, + kInstLddqu_NameIndex = 1646, + kInstLdmxcsr_NameIndex = 1652, + kInstLea_NameIndex = 1660, + kInstLeave_NameIndex = 1664, + kInstLfence_NameIndex = 1670, + kInstLzcnt_NameIndex = 1677, + kInstMaskmovdqu_NameIndex = 1683, + kInstMaskmovq_NameIndex = 1694, + kInstMaxpd_NameIndex = 1703, + kInstMaxps_NameIndex = 1709, + kInstMaxsd_NameIndex = 1715, + kInstMaxss_NameIndex = 1721, + kInstMfence_NameIndex = 1727, + kInstMinpd_NameIndex = 1734, + kInstMinps_NameIndex = 1740, + kInstMinsd_NameIndex = 1746, + kInstMinss_NameIndex = 1752, + kInstMonitor_NameIndex = 1758, + kInstMov_NameIndex = 1766, + kInstMovapd_NameIndex = 1770, + kInstMovaps_NameIndex = 1777, + kInstMovbe_NameIndex = 1784, + kInstMovd_NameIndex = 1790, + kInstMovddup_NameIndex = 1795, + kInstMovdq2q_NameIndex = 1803, + kInstMovdqa_NameIndex = 1811, + kInstMovdqu_NameIndex = 1818, + kInstMovhlps_NameIndex = 1825, + kInstMovhpd_NameIndex = 1833, + kInstMovhps_NameIndex = 1840, + kInstMovlhps_NameIndex = 1847, + kInstMovlpd_NameIndex = 1855, + kInstMovlps_NameIndex = 1862, + kInstMovmskpd_NameIndex = 1869, + kInstMovmskps_NameIndex = 1878, + kInstMovntdq_NameIndex = 1887, + kInstMovntdqa_NameIndex = 1895, + kInstMovnti_NameIndex = 1904, + kInstMovntpd_NameIndex = 1911, + kInstMovntps_NameIndex = 1919, + kInstMovntq_NameIndex = 1927, + kInstMovptr_NameIndex = 1934, + kInstMovq_NameIndex = 1942, + kInstMovq2dq_NameIndex = 1947, + kInstMovsd_NameIndex = 1955, + kInstMovshdup_NameIndex = 1961, + kInstMovsldup_NameIndex = 1970, + kInstMovss_NameIndex = 1979, + kInstMovsx_NameIndex = 1985, + kInstMovsxd_NameIndex = 1991, + kInstMovupd_NameIndex = 1998, + kInstMovups_NameIndex = 2005, + kInstMovzx_NameIndex = 2012, + kInstMpsadbw_NameIndex = 2018, + kInstMul_NameIndex = 2026, + kInstMulpd_NameIndex = 2030, + kInstMulps_NameIndex = 2036, + kInstMulsd_NameIndex = 2042, + kInstMulss_NameIndex = 2048, + kInstMulx_NameIndex = 2054, + kInstMwait_NameIndex = 2059, + kInstNeg_NameIndex = 2065, + kInstNop_NameIndex = 2069, + kInstNot_NameIndex = 2073, + kInstOr_NameIndex = 2077, + kInstOrpd_NameIndex = 2080, + kInstOrps_NameIndex = 2085, + kInstPabsb_NameIndex = 2090, + kInstPabsd_NameIndex = 2096, + kInstPabsw_NameIndex = 2102, + kInstPackssdw_NameIndex = 2108, + kInstPacksswb_NameIndex = 2117, + kInstPackusdw_NameIndex = 2126, + kInstPackuswb_NameIndex = 2135, + kInstPaddb_NameIndex = 2144, + kInstPaddd_NameIndex = 2150, + kInstPaddq_NameIndex = 2156, + kInstPaddsb_NameIndex = 2162, + kInstPaddsw_NameIndex = 2169, + kInstPaddusb_NameIndex = 2176, + kInstPaddusw_NameIndex = 2184, + kInstPaddw_NameIndex = 2192, + kInstPalignr_NameIndex = 2198, + kInstPand_NameIndex = 2206, + kInstPandn_NameIndex = 2211, + kInstPause_NameIndex = 2217, + kInstPavgb_NameIndex = 2223, + kInstPavgw_NameIndex = 2229, + kInstPblendvb_NameIndex = 2235, + kInstPblendw_NameIndex = 2244, + kInstPclmulqdq_NameIndex = 2252, + kInstPcmpeqb_NameIndex = 2262, + kInstPcmpeqd_NameIndex = 2270, + kInstPcmpeqq_NameIndex = 2278, + kInstPcmpeqw_NameIndex = 2286, + kInstPcmpestri_NameIndex = 2294, + kInstPcmpestrm_NameIndex = 2304, + kInstPcmpgtb_NameIndex = 2314, + kInstPcmpgtd_NameIndex = 2322, + kInstPcmpgtq_NameIndex = 2330, + kInstPcmpgtw_NameIndex = 2338, + kInstPcmpistri_NameIndex = 2346, + kInstPcmpistrm_NameIndex = 2356, + kInstPdep_NameIndex = 2366, + kInstPext_NameIndex = 2371, + kInstPextrb_NameIndex = 2376, + kInstPextrd_NameIndex = 2383, + kInstPextrq_NameIndex = 2390, + kInstPextrw_NameIndex = 2397, + kInstPf2id_NameIndex = 2404, + kInstPf2iw_NameIndex = 2410, + kInstPfacc_NameIndex = 2416, + kInstPfadd_NameIndex = 2422, + kInstPfcmpeq_NameIndex = 2428, + kInstPfcmpge_NameIndex = 2436, + kInstPfcmpgt_NameIndex = 2444, + kInstPfmax_NameIndex = 2452, + kInstPfmin_NameIndex = 2458, + kInstPfmul_NameIndex = 2464, + kInstPfnacc_NameIndex = 2470, + kInstPfpnacc_NameIndex = 2477, + kInstPfrcp_NameIndex = 2485, + kInstPfrcpit1_NameIndex = 2491, + kInstPfrcpit2_NameIndex = 2500, + kInstPfrsqit1_NameIndex = 2509, + kInstPfrsqrt_NameIndex = 2518, + kInstPfsub_NameIndex = 2526, + kInstPfsubr_NameIndex = 2532, + kInstPhaddd_NameIndex = 2539, + kInstPhaddsw_NameIndex = 2546, + kInstPhaddw_NameIndex = 2554, + kInstPhminposuw_NameIndex = 2561, + kInstPhsubd_NameIndex = 2572, + kInstPhsubsw_NameIndex = 2579, + kInstPhsubw_NameIndex = 2587, + kInstPi2fd_NameIndex = 2594, + kInstPi2fw_NameIndex = 2600, + kInstPinsrb_NameIndex = 2606, + kInstPinsrd_NameIndex = 2613, + kInstPinsrq_NameIndex = 2620, + kInstPinsrw_NameIndex = 2627, + kInstPmaddubsw_NameIndex = 2634, + kInstPmaddwd_NameIndex = 2644, + kInstPmaxsb_NameIndex = 2652, + kInstPmaxsd_NameIndex = 2659, + kInstPmaxsw_NameIndex = 2666, + kInstPmaxub_NameIndex = 2673, + kInstPmaxud_NameIndex = 2680, + kInstPmaxuw_NameIndex = 2687, + kInstPminsb_NameIndex = 2694, + kInstPminsd_NameIndex = 2701, + kInstPminsw_NameIndex = 2708, + kInstPminub_NameIndex = 2715, + kInstPminud_NameIndex = 2722, + kInstPminuw_NameIndex = 2729, + kInstPmovmskb_NameIndex = 2736, + kInstPmovsxbd_NameIndex = 2745, + kInstPmovsxbq_NameIndex = 2754, + kInstPmovsxbw_NameIndex = 2763, + kInstPmovsxdq_NameIndex = 2772, + kInstPmovsxwd_NameIndex = 2781, + kInstPmovsxwq_NameIndex = 2790, + kInstPmovzxbd_NameIndex = 2799, + kInstPmovzxbq_NameIndex = 2808, + kInstPmovzxbw_NameIndex = 2817, + kInstPmovzxdq_NameIndex = 2826, + kInstPmovzxwd_NameIndex = 2835, + kInstPmovzxwq_NameIndex = 2844, + kInstPmuldq_NameIndex = 2853, + kInstPmulhrsw_NameIndex = 2860, + kInstPmulhuw_NameIndex = 2869, + kInstPmulhw_NameIndex = 2877, + kInstPmulld_NameIndex = 2884, + kInstPmullw_NameIndex = 2891, + kInstPmuludq_NameIndex = 2898, + kInstPop_NameIndex = 2906, + kInstPopa_NameIndex = 2910, + kInstPopcnt_NameIndex = 2915, + kInstPopf_NameIndex = 2922, + kInstPor_NameIndex = 2927, + kInstPrefetch_NameIndex = 2931, + kInstPrefetch3dNow_NameIndex = 2940, + kInstPrefetchw3dNow_NameIndex = 2955, + kInstPsadbw_NameIndex = 2971, + kInstPshufb_NameIndex = 2978, + kInstPshufd_NameIndex = 2985, + kInstPshufhw_NameIndex = 2992, + kInstPshuflw_NameIndex = 3000, + kInstPshufw_NameIndex = 3008, + kInstPsignb_NameIndex = 3015, + kInstPsignd_NameIndex = 3022, + kInstPsignw_NameIndex = 3029, + kInstPslld_NameIndex = 3036, + kInstPslldq_NameIndex = 3042, + kInstPsllq_NameIndex = 3049, + kInstPsllw_NameIndex = 3055, + kInstPsrad_NameIndex = 3061, + kInstPsraw_NameIndex = 3067, + kInstPsrld_NameIndex = 3073, + kInstPsrldq_NameIndex = 3079, + kInstPsrlq_NameIndex = 3086, + kInstPsrlw_NameIndex = 3092, + kInstPsubb_NameIndex = 3098, + kInstPsubd_NameIndex = 3104, + kInstPsubq_NameIndex = 3110, + kInstPsubsb_NameIndex = 3116, + kInstPsubsw_NameIndex = 3123, + kInstPsubusb_NameIndex = 3130, + kInstPsubusw_NameIndex = 3138, + kInstPsubw_NameIndex = 3146, + kInstPswapd_NameIndex = 3152, + kInstPtest_NameIndex = 3159, + kInstPunpckhbw_NameIndex = 3165, + kInstPunpckhdq_NameIndex = 3175, + kInstPunpckhqdq_NameIndex = 3185, + kInstPunpckhwd_NameIndex = 3196, + kInstPunpcklbw_NameIndex = 3206, + kInstPunpckldq_NameIndex = 3216, + kInstPunpcklqdq_NameIndex = 3226, + kInstPunpcklwd_NameIndex = 3237, + kInstPush_NameIndex = 3247, + kInstPusha_NameIndex = 3252, + kInstPushf_NameIndex = 3258, + kInstPxor_NameIndex = 3264, + kInstRcl_NameIndex = 3269, + kInstRcpps_NameIndex = 3273, + kInstRcpss_NameIndex = 3279, + kInstRcr_NameIndex = 3285, + kInstRdfsbase_NameIndex = 3289, + kInstRdgsbase_NameIndex = 3298, + kInstRdrand_NameIndex = 3307, + kInstRdtsc_NameIndex = 3314, + kInstRdtscp_NameIndex = 3320, + kInstRepLodsb_NameIndex = 3327, + kInstRepLodsd_NameIndex = 3337, + kInstRepLodsq_NameIndex = 3347, + kInstRepLodsw_NameIndex = 3357, + kInstRepMovsb_NameIndex = 3367, + kInstRepMovsd_NameIndex = 3377, + kInstRepMovsq_NameIndex = 3387, + kInstRepMovsw_NameIndex = 3397, + kInstRepStosb_NameIndex = 3407, + kInstRepStosd_NameIndex = 3417, + kInstRepStosq_NameIndex = 3427, + kInstRepStosw_NameIndex = 3437, + kInstRepeCmpsb_NameIndex = 3447, + kInstRepeCmpsd_NameIndex = 3458, + kInstRepeCmpsq_NameIndex = 3469, + kInstRepeCmpsw_NameIndex = 3480, + kInstRepeScasb_NameIndex = 3491, + kInstRepeScasd_NameIndex = 3502, + kInstRepeScasq_NameIndex = 3513, + kInstRepeScasw_NameIndex = 3524, + kInstRepneCmpsb_NameIndex = 3535, + kInstRepneCmpsd_NameIndex = 3547, + kInstRepneCmpsq_NameIndex = 3559, + kInstRepneCmpsw_NameIndex = 3571, + kInstRepneScasb_NameIndex = 3583, + kInstRepneScasd_NameIndex = 3595, + kInstRepneScasq_NameIndex = 3607, + kInstRepneScasw_NameIndex = 3619, + kInstRet_NameIndex = 3631, + kInstRol_NameIndex = 3635, + kInstRor_NameIndex = 3639, + kInstRorx_NameIndex = 3643, + kInstRoundpd_NameIndex = 3648, + kInstRoundps_NameIndex = 3656, + kInstRoundsd_NameIndex = 3664, + kInstRoundss_NameIndex = 3672, + kInstRsqrtps_NameIndex = 3680, + kInstRsqrtss_NameIndex = 3688, + kInstSahf_NameIndex = 3696, + kInstSal_NameIndex = 3701, + kInstSar_NameIndex = 3705, + kInstSarx_NameIndex = 3709, + kInstSbb_NameIndex = 3714, + kInstSeta_NameIndex = 3718, + kInstSetae_NameIndex = 3723, + kInstSetb_NameIndex = 3729, + kInstSetbe_NameIndex = 3734, + kInstSetc_NameIndex = 3740, + kInstSete_NameIndex = 3745, + kInstSetg_NameIndex = 3750, + kInstSetge_NameIndex = 3755, + kInstSetl_NameIndex = 3761, + kInstSetle_NameIndex = 3766, + kInstSetna_NameIndex = 3772, + kInstSetnae_NameIndex = 3778, + kInstSetnb_NameIndex = 3785, + kInstSetnbe_NameIndex = 3791, + kInstSetnc_NameIndex = 3798, + kInstSetne_NameIndex = 3804, + kInstSetng_NameIndex = 3810, + kInstSetnge_NameIndex = 3816, + kInstSetnl_NameIndex = 3823, + kInstSetnle_NameIndex = 3829, + kInstSetno_NameIndex = 3836, + kInstSetnp_NameIndex = 3842, + kInstSetns_NameIndex = 3848, + kInstSetnz_NameIndex = 3854, + kInstSeto_NameIndex = 3860, + kInstSetp_NameIndex = 3865, + kInstSetpe_NameIndex = 3870, + kInstSetpo_NameIndex = 3876, + kInstSets_NameIndex = 3882, + kInstSetz_NameIndex = 3887, + kInstSfence_NameIndex = 3892, + kInstShl_NameIndex = 3899, + kInstShld_NameIndex = 3903, + kInstShlx_NameIndex = 3908, + kInstShr_NameIndex = 3913, + kInstShrd_NameIndex = 3917, + kInstShrx_NameIndex = 3922, + kInstShufpd_NameIndex = 3927, + kInstShufps_NameIndex = 3934, + kInstSqrtpd_NameIndex = 3941, + kInstSqrtps_NameIndex = 3948, + kInstSqrtsd_NameIndex = 3955, + kInstSqrtss_NameIndex = 3962, + kInstStc_NameIndex = 3969, + kInstStd_NameIndex = 3973, + kInstStmxcsr_NameIndex = 3977, + kInstSub_NameIndex = 3985, + kInstSubpd_NameIndex = 3989, + kInstSubps_NameIndex = 3995, + kInstSubsd_NameIndex = 4001, + kInstSubss_NameIndex = 4007, + kInstTest_NameIndex = 4013, + kInstTzcnt_NameIndex = 4018, + kInstUcomisd_NameIndex = 4024, + kInstUcomiss_NameIndex = 4032, + kInstUd2_NameIndex = 4040, + kInstUnpckhpd_NameIndex = 4044, + kInstUnpckhps_NameIndex = 4053, + kInstUnpcklpd_NameIndex = 4062, + kInstUnpcklps_NameIndex = 4071, + kInstVaddpd_NameIndex = 4080, + kInstVaddps_NameIndex = 4087, + kInstVaddsd_NameIndex = 4094, + kInstVaddss_NameIndex = 4101, + kInstVaddsubpd_NameIndex = 4108, + kInstVaddsubps_NameIndex = 4118, + kInstVaesdec_NameIndex = 4128, + kInstVaesdeclast_NameIndex = 4136, + kInstVaesenc_NameIndex = 4148, + kInstVaesenclast_NameIndex = 4156, + kInstVaesimc_NameIndex = 4168, + kInstVaeskeygenassist_NameIndex = 4176, + kInstVandnpd_NameIndex = 4193, + kInstVandnps_NameIndex = 4201, + kInstVandpd_NameIndex = 4209, + kInstVandps_NameIndex = 4216, + kInstVblendpd_NameIndex = 4223, + kInstVblendps_NameIndex = 4232, + kInstVblendvpd_NameIndex = 4241, + kInstVblendvps_NameIndex = 4251, + kInstVbroadcastf128_NameIndex = 4261, + kInstVbroadcasti128_NameIndex = 4276, + kInstVbroadcastsd_NameIndex = 4291, + kInstVbroadcastss_NameIndex = 4304, + kInstVcmppd_NameIndex = 4317, + kInstVcmpps_NameIndex = 4324, + kInstVcmpsd_NameIndex = 4331, + kInstVcmpss_NameIndex = 4338, + kInstVcomisd_NameIndex = 4345, + kInstVcomiss_NameIndex = 4353, + kInstVcvtdq2pd_NameIndex = 4361, + kInstVcvtdq2ps_NameIndex = 4371, + kInstVcvtpd2dq_NameIndex = 4381, + kInstVcvtpd2ps_NameIndex = 4391, + kInstVcvtph2ps_NameIndex = 4401, + kInstVcvtps2dq_NameIndex = 4411, + kInstVcvtps2pd_NameIndex = 4421, + kInstVcvtps2ph_NameIndex = 4431, + kInstVcvtsd2si_NameIndex = 4441, + kInstVcvtsd2ss_NameIndex = 4451, + kInstVcvtsi2sd_NameIndex = 4461, + kInstVcvtsi2ss_NameIndex = 4471, + kInstVcvtss2sd_NameIndex = 4481, + kInstVcvtss2si_NameIndex = 4491, + kInstVcvttpd2dq_NameIndex = 4501, + kInstVcvttps2dq_NameIndex = 4512, + kInstVcvttsd2si_NameIndex = 4523, + kInstVcvttss2si_NameIndex = 4534, + kInstVdivpd_NameIndex = 4545, + kInstVdivps_NameIndex = 4552, + kInstVdivsd_NameIndex = 4559, + kInstVdivss_NameIndex = 4566, + kInstVdppd_NameIndex = 4573, + kInstVdpps_NameIndex = 4579, + kInstVextractf128_NameIndex = 4585, + kInstVextracti128_NameIndex = 4598, + kInstVextractps_NameIndex = 4611, + kInstVfmadd132pd_NameIndex = 4622, + kInstVfmadd132ps_NameIndex = 4634, + kInstVfmadd132sd_NameIndex = 4646, + kInstVfmadd132ss_NameIndex = 4658, + kInstVfmadd213pd_NameIndex = 4670, + kInstVfmadd213ps_NameIndex = 4682, + kInstVfmadd213sd_NameIndex = 4694, + kInstVfmadd213ss_NameIndex = 4706, + kInstVfmadd231pd_NameIndex = 4718, + kInstVfmadd231ps_NameIndex = 4730, + kInstVfmadd231sd_NameIndex = 4742, + kInstVfmadd231ss_NameIndex = 4754, + kInstVfmaddpd_NameIndex = 4766, + kInstVfmaddps_NameIndex = 4775, + kInstVfmaddsd_NameIndex = 4784, + kInstVfmaddss_NameIndex = 4793, + kInstVfmaddsubpd_NameIndex = 4802, + kInstVfmaddsubps_NameIndex = 4814, + kInstVfmaddsub132pd_NameIndex = 4826, + kInstVfmaddsub132ps_NameIndex = 4841, + kInstVfmaddsub213pd_NameIndex = 4856, + kInstVfmaddsub213ps_NameIndex = 4871, + kInstVfmaddsub231pd_NameIndex = 4886, + kInstVfmaddsub231ps_NameIndex = 4901, + kInstVfmsub132pd_NameIndex = 4916, + kInstVfmsub132ps_NameIndex = 4928, + kInstVfmsub132sd_NameIndex = 4940, + kInstVfmsub132ss_NameIndex = 4952, + kInstVfmsub213pd_NameIndex = 4964, + kInstVfmsub213ps_NameIndex = 4976, + kInstVfmsub213sd_NameIndex = 4988, + kInstVfmsub213ss_NameIndex = 5000, + kInstVfmsub231pd_NameIndex = 5012, + kInstVfmsub231ps_NameIndex = 5024, + kInstVfmsub231sd_NameIndex = 5036, + kInstVfmsub231ss_NameIndex = 5048, + kInstVfmsubadd132pd_NameIndex = 5060, + kInstVfmsubadd132ps_NameIndex = 5075, + kInstVfmsubadd213pd_NameIndex = 5090, + kInstVfmsubadd213ps_NameIndex = 5105, + kInstVfmsubadd231pd_NameIndex = 5120, + kInstVfmsubadd231ps_NameIndex = 5135, + kInstVfmsubaddpd_NameIndex = 5150, + kInstVfmsubaddps_NameIndex = 5162, + kInstVfmsubpd_NameIndex = 5174, + kInstVfmsubps_NameIndex = 5183, + kInstVfmsubsd_NameIndex = 5192, + kInstVfmsubss_NameIndex = 5201, + kInstVfnmadd132pd_NameIndex = 5210, + kInstVfnmadd132ps_NameIndex = 5223, + kInstVfnmadd132sd_NameIndex = 5236, + kInstVfnmadd132ss_NameIndex = 5249, + kInstVfnmadd213pd_NameIndex = 5262, + kInstVfnmadd213ps_NameIndex = 5275, + kInstVfnmadd213sd_NameIndex = 5288, + kInstVfnmadd213ss_NameIndex = 5301, + kInstVfnmadd231pd_NameIndex = 5314, + kInstVfnmadd231ps_NameIndex = 5327, + kInstVfnmadd231sd_NameIndex = 5340, + kInstVfnmadd231ss_NameIndex = 5353, + kInstVfnmaddpd_NameIndex = 5366, + kInstVfnmaddps_NameIndex = 5376, + kInstVfnmaddsd_NameIndex = 5386, + kInstVfnmaddss_NameIndex = 5396, + kInstVfnmsub132pd_NameIndex = 5406, + kInstVfnmsub132ps_NameIndex = 5419, + kInstVfnmsub132sd_NameIndex = 5432, + kInstVfnmsub132ss_NameIndex = 5445, + kInstVfnmsub213pd_NameIndex = 5458, + kInstVfnmsub213ps_NameIndex = 5471, + kInstVfnmsub213sd_NameIndex = 5484, + kInstVfnmsub213ss_NameIndex = 5497, + kInstVfnmsub231pd_NameIndex = 5510, + kInstVfnmsub231ps_NameIndex = 5523, + kInstVfnmsub231sd_NameIndex = 5536, + kInstVfnmsub231ss_NameIndex = 5549, + kInstVfnmsubpd_NameIndex = 5562, + kInstVfnmsubps_NameIndex = 5572, + kInstVfnmsubsd_NameIndex = 5582, + kInstVfnmsubss_NameIndex = 5592, + kInstVfrczpd_NameIndex = 5602, + kInstVfrczps_NameIndex = 5610, + kInstVfrczsd_NameIndex = 5618, + kInstVfrczss_NameIndex = 5626, + kInstVgatherdpd_NameIndex = 5634, + kInstVgatherdps_NameIndex = 5645, + kInstVgatherqpd_NameIndex = 5656, + kInstVgatherqps_NameIndex = 5667, + kInstVhaddpd_NameIndex = 5678, + kInstVhaddps_NameIndex = 5686, + kInstVhsubpd_NameIndex = 5694, + kInstVhsubps_NameIndex = 5702, + kInstVinsertf128_NameIndex = 5710, + kInstVinserti128_NameIndex = 5722, + kInstVinsertps_NameIndex = 5734, + kInstVlddqu_NameIndex = 5744, + kInstVldmxcsr_NameIndex = 5751, + kInstVmaskmovdqu_NameIndex = 5760, + kInstVmaskmovpd_NameIndex = 5772, + kInstVmaskmovps_NameIndex = 5783, + kInstVmaxpd_NameIndex = 5794, + kInstVmaxps_NameIndex = 5801, + kInstVmaxsd_NameIndex = 5808, + kInstVmaxss_NameIndex = 5815, + kInstVminpd_NameIndex = 5822, + kInstVminps_NameIndex = 5829, + kInstVminsd_NameIndex = 5836, + kInstVminss_NameIndex = 5843, + kInstVmovapd_NameIndex = 5850, + kInstVmovaps_NameIndex = 5858, + kInstVmovd_NameIndex = 5866, + kInstVmovddup_NameIndex = 5872, + kInstVmovdqa_NameIndex = 5881, + kInstVmovdqu_NameIndex = 5889, + kInstVmovhlps_NameIndex = 5897, + kInstVmovhpd_NameIndex = 5906, + kInstVmovhps_NameIndex = 5914, + kInstVmovlhps_NameIndex = 5922, + kInstVmovlpd_NameIndex = 5931, + kInstVmovlps_NameIndex = 5939, + kInstVmovmskpd_NameIndex = 5947, + kInstVmovmskps_NameIndex = 5957, + kInstVmovntdq_NameIndex = 5967, + kInstVmovntdqa_NameIndex = 5976, + kInstVmovntpd_NameIndex = 5986, + kInstVmovntps_NameIndex = 5995, + kInstVmovq_NameIndex = 6004, + kInstVmovsd_NameIndex = 6010, + kInstVmovshdup_NameIndex = 6017, + kInstVmovsldup_NameIndex = 6027, + kInstVmovss_NameIndex = 6037, + kInstVmovupd_NameIndex = 6044, + kInstVmovups_NameIndex = 6052, + kInstVmpsadbw_NameIndex = 6060, + kInstVmulpd_NameIndex = 6069, + kInstVmulps_NameIndex = 6076, + kInstVmulsd_NameIndex = 6083, + kInstVmulss_NameIndex = 6090, + kInstVorpd_NameIndex = 6097, + kInstVorps_NameIndex = 6103, + kInstVpabsb_NameIndex = 6109, + kInstVpabsd_NameIndex = 6116, + kInstVpabsw_NameIndex = 6123, + kInstVpackssdw_NameIndex = 6130, + kInstVpacksswb_NameIndex = 6140, + kInstVpackusdw_NameIndex = 6150, + kInstVpackuswb_NameIndex = 6160, + kInstVpaddb_NameIndex = 6170, + kInstVpaddd_NameIndex = 6177, + kInstVpaddq_NameIndex = 6184, + kInstVpaddsb_NameIndex = 6191, + kInstVpaddsw_NameIndex = 6199, + kInstVpaddusb_NameIndex = 6207, + kInstVpaddusw_NameIndex = 6216, + kInstVpaddw_NameIndex = 6225, + kInstVpalignr_NameIndex = 6232, + kInstVpand_NameIndex = 6241, + kInstVpandn_NameIndex = 6247, + kInstVpavgb_NameIndex = 6254, + kInstVpavgw_NameIndex = 6261, + kInstVpblendd_NameIndex = 6268, + kInstVpblendvb_NameIndex = 6277, + kInstVpblendw_NameIndex = 6287, + kInstVpbroadcastb_NameIndex = 6296, + kInstVpbroadcastd_NameIndex = 6309, + kInstVpbroadcastq_NameIndex = 6322, + kInstVpbroadcastw_NameIndex = 6335, + kInstVpclmulqdq_NameIndex = 6348, + kInstVpcmov_NameIndex = 6359, + kInstVpcmpeqb_NameIndex = 6366, + kInstVpcmpeqd_NameIndex = 6375, + kInstVpcmpeqq_NameIndex = 6384, + kInstVpcmpeqw_NameIndex = 6393, + kInstVpcmpestri_NameIndex = 6402, + kInstVpcmpestrm_NameIndex = 6413, + kInstVpcmpgtb_NameIndex = 6424, + kInstVpcmpgtd_NameIndex = 6433, + kInstVpcmpgtq_NameIndex = 6442, + kInstVpcmpgtw_NameIndex = 6451, + kInstVpcmpistri_NameIndex = 6460, + kInstVpcmpistrm_NameIndex = 6471, + kInstVpcomb_NameIndex = 6482, + kInstVpcomd_NameIndex = 6489, + kInstVpcomq_NameIndex = 6496, + kInstVpcomub_NameIndex = 6503, + kInstVpcomud_NameIndex = 6511, + kInstVpcomuq_NameIndex = 6519, + kInstVpcomuw_NameIndex = 6527, + kInstVpcomw_NameIndex = 6535, + kInstVperm2f128_NameIndex = 6542, + kInstVperm2i128_NameIndex = 6553, + kInstVpermd_NameIndex = 6564, + kInstVpermil2pd_NameIndex = 6571, + kInstVpermil2ps_NameIndex = 6582, + kInstVpermilpd_NameIndex = 6593, + kInstVpermilps_NameIndex = 6603, + kInstVpermpd_NameIndex = 6613, + kInstVpermps_NameIndex = 6621, + kInstVpermq_NameIndex = 6629, + kInstVpextrb_NameIndex = 6636, + kInstVpextrd_NameIndex = 6644, + kInstVpextrq_NameIndex = 6652, + kInstVpextrw_NameIndex = 6660, + kInstVpgatherdd_NameIndex = 6668, + kInstVpgatherdq_NameIndex = 6679, + kInstVpgatherqd_NameIndex = 6690, + kInstVpgatherqq_NameIndex = 6701, + kInstVphaddbd_NameIndex = 6712, + kInstVphaddbq_NameIndex = 6721, + kInstVphaddbw_NameIndex = 6730, + kInstVphaddd_NameIndex = 6739, + kInstVphadddq_NameIndex = 6747, + kInstVphaddsw_NameIndex = 6756, + kInstVphaddubd_NameIndex = 6765, + kInstVphaddubq_NameIndex = 6775, + kInstVphaddubw_NameIndex = 6785, + kInstVphaddudq_NameIndex = 6795, + kInstVphadduwd_NameIndex = 6805, + kInstVphadduwq_NameIndex = 6815, + kInstVphaddw_NameIndex = 6825, + kInstVphaddwd_NameIndex = 6833, + kInstVphaddwq_NameIndex = 6842, + kInstVphminposuw_NameIndex = 6851, + kInstVphsubbw_NameIndex = 6863, + kInstVphsubdq_NameIndex = 6872, + kInstVphsubd_NameIndex = 6881, + kInstVphsubsw_NameIndex = 6889, + kInstVphsubw_NameIndex = 6898, + kInstVphsubwd_NameIndex = 6906, + kInstVpinsrb_NameIndex = 6915, + kInstVpinsrd_NameIndex = 6923, + kInstVpinsrq_NameIndex = 6931, + kInstVpinsrw_NameIndex = 6939, + kInstVpmacsdd_NameIndex = 6947, + kInstVpmacsdqh_NameIndex = 6956, + kInstVpmacsdql_NameIndex = 6966, + kInstVpmacssdd_NameIndex = 6976, + kInstVpmacssdqh_NameIndex = 6986, + kInstVpmacssdql_NameIndex = 6997, + kInstVpmacsswd_NameIndex = 7008, + kInstVpmacssww_NameIndex = 7018, + kInstVpmacswd_NameIndex = 7028, + kInstVpmacsww_NameIndex = 7037, + kInstVpmadcsswd_NameIndex = 7046, + kInstVpmadcswd_NameIndex = 7057, + kInstVpmaddubsw_NameIndex = 7067, + kInstVpmaddwd_NameIndex = 7078, + kInstVpmaskmovd_NameIndex = 7087, + kInstVpmaskmovq_NameIndex = 7098, + kInstVpmaxsb_NameIndex = 7109, + kInstVpmaxsd_NameIndex = 7117, + kInstVpmaxsw_NameIndex = 7125, + kInstVpmaxub_NameIndex = 7133, + kInstVpmaxud_NameIndex = 7141, + kInstVpmaxuw_NameIndex = 7149, + kInstVpminsb_NameIndex = 7157, + kInstVpminsd_NameIndex = 7165, + kInstVpminsw_NameIndex = 7173, + kInstVpminub_NameIndex = 7181, + kInstVpminud_NameIndex = 7189, + kInstVpminuw_NameIndex = 7197, + kInstVpmovmskb_NameIndex = 7205, + kInstVpmovsxbd_NameIndex = 7215, + kInstVpmovsxbq_NameIndex = 7225, + kInstVpmovsxbw_NameIndex = 7235, + kInstVpmovsxdq_NameIndex = 7245, + kInstVpmovsxwd_NameIndex = 7255, + kInstVpmovsxwq_NameIndex = 7265, + kInstVpmovzxbd_NameIndex = 7275, + kInstVpmovzxbq_NameIndex = 7285, + kInstVpmovzxbw_NameIndex = 7295, + kInstVpmovzxdq_NameIndex = 7305, + kInstVpmovzxwd_NameIndex = 7315, + kInstVpmovzxwq_NameIndex = 7325, + kInstVpmuldq_NameIndex = 7335, + kInstVpmulhrsw_NameIndex = 7343, + kInstVpmulhuw_NameIndex = 7353, + kInstVpmulhw_NameIndex = 7362, + kInstVpmulld_NameIndex = 7370, + kInstVpmullw_NameIndex = 7378, + kInstVpmuludq_NameIndex = 7386, + kInstVpor_NameIndex = 7395, + kInstVpperm_NameIndex = 7400, + kInstVprotb_NameIndex = 7407, + kInstVprotd_NameIndex = 7414, + kInstVprotq_NameIndex = 7421, + kInstVprotw_NameIndex = 7428, + kInstVpsadbw_NameIndex = 7435, + kInstVpshab_NameIndex = 7443, + kInstVpshad_NameIndex = 7450, + kInstVpshaq_NameIndex = 7457, + kInstVpshaw_NameIndex = 7464, + kInstVpshlb_NameIndex = 7471, + kInstVpshld_NameIndex = 7478, + kInstVpshlq_NameIndex = 7485, + kInstVpshlw_NameIndex = 7492, + kInstVpshufb_NameIndex = 7499, + kInstVpshufd_NameIndex = 7507, + kInstVpshufhw_NameIndex = 7515, + kInstVpshuflw_NameIndex = 7524, + kInstVpsignb_NameIndex = 7533, + kInstVpsignd_NameIndex = 7541, + kInstVpsignw_NameIndex = 7549, + kInstVpslld_NameIndex = 7557, + kInstVpslldq_NameIndex = 7564, + kInstVpsllq_NameIndex = 7572, + kInstVpsllvd_NameIndex = 7579, + kInstVpsllvq_NameIndex = 7587, + kInstVpsllw_NameIndex = 7595, + kInstVpsrad_NameIndex = 7602, + kInstVpsravd_NameIndex = 7609, + kInstVpsraw_NameIndex = 7617, + kInstVpsrld_NameIndex = 7624, + kInstVpsrldq_NameIndex = 7631, + kInstVpsrlq_NameIndex = 7639, + kInstVpsrlvd_NameIndex = 7646, + kInstVpsrlvq_NameIndex = 7654, + kInstVpsrlw_NameIndex = 7662, + kInstVpsubb_NameIndex = 7669, + kInstVpsubd_NameIndex = 7676, + kInstVpsubq_NameIndex = 7683, + kInstVpsubsb_NameIndex = 7690, + kInstVpsubsw_NameIndex = 7698, + kInstVpsubusb_NameIndex = 7706, + kInstVpsubusw_NameIndex = 7715, + kInstVpsubw_NameIndex = 7724, + kInstVptest_NameIndex = 7731, + kInstVpunpckhbw_NameIndex = 7738, + kInstVpunpckhdq_NameIndex = 7749, + kInstVpunpckhqdq_NameIndex = 7760, + kInstVpunpckhwd_NameIndex = 7772, + kInstVpunpcklbw_NameIndex = 7783, + kInstVpunpckldq_NameIndex = 7794, + kInstVpunpcklqdq_NameIndex = 7805, + kInstVpunpcklwd_NameIndex = 7817, + kInstVpxor_NameIndex = 7828, + kInstVrcpps_NameIndex = 7834, + kInstVrcpss_NameIndex = 7841, + kInstVroundpd_NameIndex = 7848, + kInstVroundps_NameIndex = 7857, + kInstVroundsd_NameIndex = 7866, + kInstVroundss_NameIndex = 7875, + kInstVrsqrtps_NameIndex = 7884, + kInstVrsqrtss_NameIndex = 7893, + kInstVshufpd_NameIndex = 7902, + kInstVshufps_NameIndex = 7910, + kInstVsqrtpd_NameIndex = 7918, + kInstVsqrtps_NameIndex = 7926, + kInstVsqrtsd_NameIndex = 7934, + kInstVsqrtss_NameIndex = 7942, + kInstVstmxcsr_NameIndex = 7950, + kInstVsubpd_NameIndex = 7959, + kInstVsubps_NameIndex = 7966, + kInstVsubsd_NameIndex = 7973, + kInstVsubss_NameIndex = 7980, + kInstVtestpd_NameIndex = 7987, + kInstVtestps_NameIndex = 7995, + kInstVucomisd_NameIndex = 8003, + kInstVucomiss_NameIndex = 8012, + kInstVunpckhpd_NameIndex = 8021, + kInstVunpckhps_NameIndex = 8031, + kInstVunpcklpd_NameIndex = 8041, + kInstVunpcklps_NameIndex = 8051, + kInstVxorpd_NameIndex = 8061, + kInstVxorps_NameIndex = 8068, + kInstVzeroall_NameIndex = 8075, + kInstVzeroupper_NameIndex = 8084, + kInstWrfsbase_NameIndex = 8095, + kInstWrgsbase_NameIndex = 8104, + kInstXadd_NameIndex = 8113, + kInstXchg_NameIndex = 8118, + kInstXor_NameIndex = 8123, + kInstXorpd_NameIndex = 8127, + kInstXorps_NameIndex = 8133 }; // ${kInstData:End} @@ -2166,12 +2168,12 @@ const InstInfo _instInfo[] = { INST(kInstBsf , "bsf" , G(X86RegRm) , F(None) , 0 , O(Gqdw) , O(GqdwMem) , U , U , O_000F00(BC,U) , U ), INST(kInstBsr , "bsr" , G(X86RegRm) , F(None) , 0 , O(Gqdw) , O(GqdwMem) , U , U , O_000F00(BD,U) , U ), INST(kInstBswap , "bswap" , G(X86BSwap) , F(None) , 0 , O(Gqd) , U , U , U , O_000F00(C8,U) , U ), - INST(kInstBt , "bt" , G(X86BTest) , F(Test) , 0 , O(Gqdw)|O(Mem) , O(Gqdw)|O(Imm) , U , U , O_000F00(A3,U) , O_000F00(BA,4) ), - INST(kInstBtc , "btc" , G(X86BTest) , F(Lock) , 0 , O(Gqdw)|O(Mem) , O(Gqdw)|O(Imm) , U , U , O_000F00(BB,U) , O_000F00(BA,7) ), - INST(kInstBtr , "btr" , G(X86BTest) , F(Lock) , 0 , O(Gqdw)|O(Mem) , O(Gqdw)|O(Imm) , U , U , O_000F00(B3,U) , O_000F00(BA,6) ), - INST(kInstBts , "bts" , G(X86BTest) , F(Lock) , 0 , O(Gqdw)|O(Mem) , O(Gqdw)|O(Imm) , U , U , O_000F00(AB,U) , O_000F00(BA,5) ), + INST(kInstBt , "bt" , G(X86BTest) , F(Test) , 0 , O(GqdwMem) , O(Gqdw)|O(Imm) , U , U , O_000F00(A3,U) , O_000F00(BA,4) ), + INST(kInstBtc , "btc" , G(X86BTest) , F(Lock) , 0 , O(GqdwMem) , O(Gqdw)|O(Imm) , U , U , O_000F00(BB,U) , O_000F00(BA,7) ), + INST(kInstBtr , "btr" , G(X86BTest) , F(Lock) , 0 , O(GqdwMem) , O(Gqdw)|O(Imm) , U , U , O_000F00(B3,U) , O_000F00(BA,6) ), + INST(kInstBts , "bts" , G(X86BTest) , F(Lock) , 0 , O(GqdwMem) , O(Gqdw)|O(Imm) , U , U , O_000F00(AB,U) , O_000F00(BA,5) ), INST(kInstBzhi , "bzhi" , G(AvxRmv) , F(None) , 0 , O(Gqd) , O(GqdMem) , O(Gqd) , U , O_000F38(F5,U) , U ), - INST(kInstCall , "call" , G(X86Call) , F(Flow) , 0 , O(Gqd) |O(Mem) , U , U , U , O_000000(FF,2) , O_000000(E8,U) ), + INST(kInstCall , "call" , G(X86Call) , F(Flow) , 0 , O(GqdMem)|O(Label) , U , U , U , O_000000(FF,2) , O_000000(E8,U) ), INST(kInstCbw , "cbw" , G(X86Op) , F(None)|F(Special) , 0 , U , U , U , U , O_660000(98,U) , U ), INST(kInstCdq , "cdq" , G(X86Op) , F(None)|F(Special) , 0 , U , U , U , U , O_000000(99,U) , U ), INST(kInstCdqe , "cdqe" , G(X86Op) , F(None)|F(Special)|F(W), 0 , U , U , U , U , O_000000(98,U) , U ), @@ -2364,37 +2366,38 @@ const InstInfo _instInfo[] = { INST(kInstInc , "inc" , G(X86IncDec) , F(Lock) , 0 , O(GqdwbMem) , U , U , U , O_000000(FE,0) , O_000000(40,U) ), INST(kInstInsertps , "insertps" , G(ExtRmi) , F(None) , 0 , O(Xmm) , O(XmmMem) , O(Imm) , U , O_660F3A(21,U) , U ), INST(kInstInt , "int" , G(X86Int) , F(None) , 0 , U , U , U , U , O_000000(CC,U) , U ), - INST(kInstJa , "ja" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(77,U) , U ), - INST(kInstJae , "jae" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(73,U) , U ), - INST(kInstJb , "jb" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(72,U) , U ), - INST(kInstJbe , "jbe" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(76,U) , U ), - INST(kInstJc , "jc" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(72,U) , U ), - INST(kInstJe , "je" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(74,U) , U ), - INST(kInstJg , "jg" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7F,U) , U ), - INST(kInstJge , "jge" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7D,U) , U ), - INST(kInstJl , "jl" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7C,U) , U ), - INST(kInstJle , "jle" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7E,U) , U ), - INST(kInstJna , "jna" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(76,U) , U ), - INST(kInstJnae , "jnae" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(72,U) , U ), - INST(kInstJnb , "jnb" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(73,U) , U ), - INST(kInstJnbe , "jnbe" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(77,U) , U ), - INST(kInstJnc , "jnc" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(73,U) , U ), - INST(kInstJne , "jne" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(75,U) , U ), - INST(kInstJng , "jng" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7E,U) , U ), - INST(kInstJnge , "jnge" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7C,U) , U ), - INST(kInstJnl , "jnl" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7D,U) , U ), - INST(kInstJnle , "jnle" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7F,U) , U ), - INST(kInstJno , "jno" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(71,U) , U ), - INST(kInstJnp , "jnp" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7B,U) , U ), - INST(kInstJns , "jns" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(79,U) , U ), - INST(kInstJnz , "jnz" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(75,U) , U ), - INST(kInstJo , "jo" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(70,U) , U ), - INST(kInstJp , "jp" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7A,U) , U ), - INST(kInstJpe , "jpe" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7A,U) , U ), - INST(kInstJpo , "jpo" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(7B,U) , U ), - INST(kInstJs , "js" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(78,U) , U ), - INST(kInstJz , "jz" , G(X86Jcc) , F(Flow) , 0 , U , U , U , U , O_000000(74,U) , U ), - INST(kInstJmp , "jmp" , G(X86Jmp) , F(Flow) , 0 , U , U , U , U , O_000000(FF,4) , U ), + INST(kInstJa , "ja" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(77,U) , U ), + INST(kInstJae , "jae" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(73,U) , U ), + INST(kInstJb , "jb" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(72,U) , U ), + INST(kInstJbe , "jbe" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(76,U) , U ), + INST(kInstJc , "jc" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(72,U) , U ), + INST(kInstJe , "je" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(74,U) , U ), + INST(kInstJg , "jg" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7F,U) , U ), + INST(kInstJge , "jge" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7D,U) , U ), + INST(kInstJl , "jl" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7C,U) , U ), + INST(kInstJle , "jle" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7E,U) , U ), + INST(kInstJna , "jna" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(76,U) , U ), + INST(kInstJnae , "jnae" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(72,U) , U ), + INST(kInstJnb , "jnb" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(73,U) , U ), + INST(kInstJnbe , "jnbe" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(77,U) , U ), + INST(kInstJnc , "jnc" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(73,U) , U ), + INST(kInstJne , "jne" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(75,U) , U ), + INST(kInstJng , "jng" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7E,U) , U ), + INST(kInstJnge , "jnge" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7C,U) , U ), + INST(kInstJnl , "jnl" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7D,U) , U ), + INST(kInstJnle , "jnle" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7F,U) , U ), + INST(kInstJno , "jno" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(71,U) , U ), + INST(kInstJnp , "jnp" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7B,U) , U ), + INST(kInstJns , "jns" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(79,U) , U ), + INST(kInstJnz , "jnz" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(75,U) , U ), + INST(kInstJo , "jo" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(70,U) , U ), + INST(kInstJp , "jp" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7A,U) , U ), + INST(kInstJpe , "jpe" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7A,U) , U ), + INST(kInstJpo , "jpo" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(7B,U) , U ), + INST(kInstJs , "js" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(78,U) , U ), + INST(kInstJz , "jz" , G(X86Jcc) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(74,U) , U ), + INST(kInstJecxz , "jecxz" , G(X86Jecxz) , F(Flow)|F(Special) , 0 , O(Gqdw) , O(Label) , U , U , O_000000(E3,U) , U ), + INST(kInstJmp , "jmp" , G(X86Jmp) , F(Flow) , 0 , O(Label) , U , U , U , O_000000(FF,4) , U ), INST(kInstLahf , "lahf" , G(X86Op) , F(None)|F(Special) , 0 , U , U , U , U , O_000000(9F,U) , U ), INST(kInstLddqu , "lddqu" , G(ExtRm) , F(Move) , 16, O(Xmm) , O(Mem) , U , U , O_F20F00(F0,U) , U ), INST(kInstLdmxcsr , "ldmxcsr" , G(X86M) , F(None) , 0 , O(Mem) , U , U , U , O_000F00(AE,2) , U ), @@ -3205,380 +3208,9 @@ const InstInfo _instInfo[] = { #undef INST -const uint32_t _reverseCond[20] = { - /* kCondO -> */ kCondO, - /* kCondNO -> */ kCondNO, - /* kCondB -> */ kCondA, - /* kCondAE -> */ kCondBE, - /* kCondE -> */ kCondE, - /* kCondNE -> */ kCondNE, - /* kCondBE -> */ kCondAE, - /* kCondA -> */ kCondB, - /* kCondS -> */ kCondS, - /* kCondNS -> */ kCondNS, - /* kCondPE -> */ kCondPE, - /* kCondPO -> */ kCondPO, - - /* kCondL -> */ kCondG, - /* kCondGE -> */ kCondLE, - - /* kCondLE -> */ kCondGE, - /* kCondG -> */ kCondL, - - /* kCondFpuUnordered -> */ kCondFpuUnordered, - /* kCondFpuNotUnordered -> */ kCondFpuNotUnordered, - - 0x12, - 0x13 -}; - -#define COND_TO_INST(_Inst_) { \ - _Inst_##o, \ - _Inst_##no, \ - _Inst_##b, \ - _Inst_##ae, \ - _Inst_##e, \ - _Inst_##ne, \ - _Inst_##be, \ - _Inst_##a, \ - _Inst_##s, \ - _Inst_##ns, \ - _Inst_##pe, \ - _Inst_##po, \ - _Inst_##l, \ - _Inst_##ge, \ - _Inst_##le, \ - _Inst_##g, \ - \ - kInstNone, \ - kInstNone, \ - kInstNone, \ - kInstNone \ -} - -const uint32_t _condToCmovcc[20] = COND_TO_INST(kInstCmov); -const uint32_t _condToJcc [20] = COND_TO_INST(kInstJ ); -const uint32_t _condToSetcc [20] = COND_TO_INST(kInstSet ); - -#undef COND_TO_INST - -// ============================================================================ -// [asmjit::x86x64::Variables] -// ============================================================================ - -#define C(_Class_) kRegClass##_Class_ -#define D(_Desc_) kVarDesc##_Desc_ - -const VarInfo _varInfo[] = { - /* 00: kVarTypeInt8 */ { kRegTypeGpbLo, 1 , C(Gp), 0 , "gpb" }, - /* 01: kVarTypeUInt8 */ { kRegTypeGpbLo, 1 , C(Gp), 0 , "gpb" }, - /* 02: kVarTypeInt16 */ { kRegTypeGpw , 2 , C(Gp), 0 , "gpw" }, - /* 03: kVarTypeUInt16 */ { kRegTypeGpw , 2 , C(Gp), 0 , "gpw" }, - /* 04: kVarTypeInt32 */ { kRegTypeGpd , 4 , C(Gp), 0 , "gpd" }, - /* 05: kVarTypeUInt32 */ { kRegTypeGpd , 4 , C(Gp), 0 , "gpd" }, - /* 06: kVarTypeInt64 */ { kRegTypeGpq , 8 , C(Gp), 0 , "gpq" }, - /* 07: kVarTypeUInt64 */ { kRegTypeGpq , 8 , C(Gp), 0 , "gpq" }, - /* 08: kVarTypeIntPtr */ { 0 , 0 , C(Gp), 0 , "" }, // Remapped. - /* 09: kVarTypeUIntPtr */ { 0 , 0 , C(Gp), 0 , "" }, // Remapped. - /* 10: kVarTypeFp32 */ { kRegTypeFp , 4 , C(Fp), D(Sp) , "fp" }, - /* 11: kVarTypeFp64 */ { kRegTypeFp , 8 , C(Fp), D(Dp) , "fp" }, - /* 12: kVarTypeMm */ { kRegTypeMm , 8 , C(Mm), 0 , "mm" }, - /* 13: kVarTypeXmm */ { kRegTypeXmm , 16, C(Xy), 0 , "xmm" }, - /* 14: kVarTypeXmmSs */ { kRegTypeXmm , 4 , C(Xy), D(Sp) , "xmm" }, - /* 15: kVarTypeXmmPs */ { kRegTypeXmm , 16, C(Xy), D(Sp) | D(Packed), "xmm" }, - /* 16: kVarTypeXmmSd */ { kRegTypeXmm , 8 , C(Xy), D(Dp) , "xmm" }, - /* 17: kVarTypeXmmPd */ { kRegTypeXmm , 16, C(Xy), D(Dp) | D(Packed), "xmm" }, - /* 18: kVarTypeYmm */ { kRegTypeYmm , 32, C(Xy), 0 , "ymm" }, - /* 19: kVarTypeYmmPs */ { kRegTypeYmm , 32, C(Xy), D(Sp) | D(Packed), "ymm" }, - /* 20: kVarTypeYmmPd */ { kRegTypeYmm , 32, C(Xy), D(Dp) | D(Packed), "ymm" } -}; - -#undef D -#undef C - -// ============================================================================ -// [asmjit::x86x64::Registers] -// ============================================================================ - -const GpReg noGpReg(kInvalidReg, kInvalidReg, 0); - -const GpReg al(kRegTypeGpbLo, kRegIndexAx, 1); -const GpReg cl(kRegTypeGpbLo, kRegIndexCx, 1); -const GpReg dl(kRegTypeGpbLo, kRegIndexDx, 1); -const GpReg bl(kRegTypeGpbLo, kRegIndexBx, 1); -const GpReg ah(kRegTypeGpbHi, kRegIndexAx, 1); -const GpReg ch(kRegTypeGpbHi, kRegIndexCx, 1); -const GpReg dh(kRegTypeGpbHi, kRegIndexDx, 1); -const GpReg bh(kRegTypeGpbHi, kRegIndexBx, 1); - -const GpReg ax(kRegTypeGpw, kRegIndexAx, 2); -const GpReg cx(kRegTypeGpw, kRegIndexCx, 2); -const GpReg dx(kRegTypeGpw, kRegIndexDx, 2); -const GpReg bx(kRegTypeGpw, kRegIndexBx, 2); -const GpReg sp(kRegTypeGpw, kRegIndexSp, 2); -const GpReg bp(kRegTypeGpw, kRegIndexBp, 2); -const GpReg si(kRegTypeGpw, kRegIndexSi, 2); -const GpReg di(kRegTypeGpw, kRegIndexDi, 2); - -const GpReg eax(kRegTypeGpd, kRegIndexAx, 4); -const GpReg ecx(kRegTypeGpd, kRegIndexCx, 4); -const GpReg edx(kRegTypeGpd, kRegIndexDx, 4); -const GpReg ebx(kRegTypeGpd, kRegIndexBx, 4); -const GpReg esp(kRegTypeGpd, kRegIndexSp, 4); -const GpReg ebp(kRegTypeGpd, kRegIndexBp, 4); -const GpReg esi(kRegTypeGpd, kRegIndexSi, 4); -const GpReg edi(kRegTypeGpd, kRegIndexDi, 4); - -const FpReg fp0(kRegTypeFp, kRegIndexFp0, 10); -const FpReg fp1(kRegTypeFp, kRegIndexFp1, 10); -const FpReg fp2(kRegTypeFp, kRegIndexFp2, 10); -const FpReg fp3(kRegTypeFp, kRegIndexFp3, 10); -const FpReg fp4(kRegTypeFp, kRegIndexFp4, 10); -const FpReg fp5(kRegTypeFp, kRegIndexFp5, 10); -const FpReg fp6(kRegTypeFp, kRegIndexFp6, 10); -const FpReg fp7(kRegTypeFp, kRegIndexFp7, 10); - -const MmReg mm0(kRegTypeMm, kRegIndexMm0, 8); -const MmReg mm1(kRegTypeMm, kRegIndexMm1, 8); -const MmReg mm2(kRegTypeMm, kRegIndexMm2, 8); -const MmReg mm3(kRegTypeMm, kRegIndexMm3, 8); -const MmReg mm4(kRegTypeMm, kRegIndexMm4, 8); -const MmReg mm5(kRegTypeMm, kRegIndexMm5, 8); -const MmReg mm6(kRegTypeMm, kRegIndexMm6, 8); -const MmReg mm7(kRegTypeMm, kRegIndexMm7, 8); - -const XmmReg xmm0(kRegTypeXmm, kRegIndexXmm0, 16); -const XmmReg xmm1(kRegTypeXmm, kRegIndexXmm1, 16); -const XmmReg xmm2(kRegTypeXmm, kRegIndexXmm2, 16); -const XmmReg xmm3(kRegTypeXmm, kRegIndexXmm3, 16); -const XmmReg xmm4(kRegTypeXmm, kRegIndexXmm4, 16); -const XmmReg xmm5(kRegTypeXmm, kRegIndexXmm5, 16); -const XmmReg xmm6(kRegTypeXmm, kRegIndexXmm6, 16); -const XmmReg xmm7(kRegTypeXmm, kRegIndexXmm7, 16); - -const YmmReg ymm0(kRegTypeYmm, kRegIndexYmm0, 32); -const YmmReg ymm1(kRegTypeYmm, kRegIndexYmm1, 32); -const YmmReg ymm2(kRegTypeYmm, kRegIndexYmm2, 32); -const YmmReg ymm3(kRegTypeYmm, kRegIndexYmm3, 32); -const YmmReg ymm4(kRegTypeYmm, kRegIndexYmm4, 32); -const YmmReg ymm5(kRegTypeYmm, kRegIndexYmm5, 32); -const YmmReg ymm6(kRegTypeYmm, kRegIndexYmm6, 32); -const YmmReg ymm7(kRegTypeYmm, kRegIndexYmm7, 32); - -const SegReg cs(kRegTypeSeg, kSegCs, 2); -const SegReg ss(kRegTypeSeg, kSegSs, 2); -const SegReg ds(kRegTypeSeg, kSegDs, 2); -const SegReg es(kRegTypeSeg, kSegEs, 2); -const SegReg fs(kRegTypeSeg, kSegFs, 2); -const SegReg gs(kRegTypeSeg, kSegGs, 2); - -// ============================================================================ -// [asmjit::Mem - abs[]] -// ============================================================================ - -Mem ptr_abs(Ptr pAbs, int32_t disp, uint32_t size) { - Mem m(NoInit); - - m._init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeAbsolute, 0, kInvalidValue); - m._vmem.index = kInvalidValue; - m._vmem.displacement = static_cast((intptr_t)(pAbs + disp)); - - return m; -} - -Mem ptr_abs(Ptr pAbs, const X86Reg& index, uint32_t shift, int32_t disp, uint32_t size) { - Mem m(NoInit); - uint32_t flags = shift << kMemShiftIndex; - - if (index.isGp()) flags |= Mem::_getGpdFlags(reinterpret_cast(index)); - if (index.isXmm()) flags |= kMemVSibXmm << kMemVSibIndex; - if (index.isYmm()) flags |= kMemVSibYmm << kMemVSibIndex; - - m._init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeAbsolute, flags, kInvalidValue); - m._vmem.index = index.getRegIndex(); - m._vmem.displacement = static_cast((intptr_t)(pAbs + disp)); - - return m; -} - -Mem ptr_abs(Ptr pAbs, const X86Var& index, uint32_t shift, int32_t disp, uint32_t size) { - Mem m(NoInit); - uint32_t flags = shift << kMemShiftIndex; - - if (index.isGp()) flags |= Mem::_getGpdFlags(reinterpret_cast(index)); - if (index.isXmm()) flags |= kMemVSibXmm << kMemVSibIndex; - if (index.isYmm()) flags |= kMemVSibYmm << kMemVSibIndex; - - m._init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeAbsolute, flags, kInvalidValue); - m._vmem.index = index.getId(); - m._vmem.displacement = static_cast((intptr_t)(pAbs + disp)); - - return m; -} - } // x86x64 namespace } // asmjit namespace -// ============================================================================ -// [asmjit::x86] -// ============================================================================ - -#if defined(ASMJIT_BUILD_X86) - -namespace asmjit { -namespace x86 { - -const uint8_t _varMapping[kVarTypeCount] = { - /* 00: kVarTypeInt8 */ kVarTypeInt8, - /* 01: kVarTypeUInt8 */ kVarTypeUInt8, - /* 02: kVarTypeInt16 */ kVarTypeInt16, - /* 03: kVarTypeUInt16 */ kVarTypeUInt16, - /* 04: kVarTypeInt32 */ kVarTypeInt32, - /* 05: kVarTypeUInt32 */ kVarTypeUInt32, - /* 06: kVarTypeInt64 */ kVarTypeInvalid, // Invalid in 32-bit mode. - /* 07: kVarTypeUInt64 */ kVarTypeInvalid, // Invalid in 32-bit mode. - /* 08: kVarTypeIntPtr */ kVarTypeInt32, // Remapped. - /* 09: kVarTypeUIntPtr */ kVarTypeUInt32, // Remapped. - /* 10: kVarTypeFp32 */ kVarTypeFp32, - /* 11: kVarTypeFp64 */ kVarTypeFp64, - /* 12: kVarTypeMm */ kVarTypeMm, - /* 13: kVarTypeXmm */ kVarTypeXmm, - /* 14: kVarTypeXmmSs */ kVarTypeXmmSs, - /* 15: kVarTypeXmmPs */ kVarTypeXmmPs, - /* 16: kVarTypeXmmSd */ kVarTypeXmmSd, - /* 17: kVarTypeXmmPd */ kVarTypeXmmPd, - /* 18: kVarTypeYmm */ kVarTypeYmm, - /* 19: kVarTypeYmmPs */ kVarTypeYmmPs, - /* 20: kVarTypeYmmPd */ kVarTypeYmmPd -}; - -const GpReg zax(kRegTypeGpd, kRegIndexAx, 4); -const GpReg zcx(kRegTypeGpd, kRegIndexCx, 4); -const GpReg zdx(kRegTypeGpd, kRegIndexDx, 4); -const GpReg zbx(kRegTypeGpd, kRegIndexBx, 4); -const GpReg zsp(kRegTypeGpd, kRegIndexSp, 4); -const GpReg zbp(kRegTypeGpd, kRegIndexBp, 4); -const GpReg zsi(kRegTypeGpd, kRegIndexSi, 4); -const GpReg zdi(kRegTypeGpd, kRegIndexDi, 4); - -} // x86 namespace -} // asmjit namespace - -#endif // ASMJIT_BUILD_X86 - -// ============================================================================ -// [asmjit::x64] -// ============================================================================ - -#if defined(ASMJIT_BUILD_X64) -namespace asmjit { -namespace x64 { - -const uint8_t _varMapping[kVarTypeCount] = { - /* 00: kVarTypeInt8 */ kVarTypeInt8, - /* 01: kVarTypeUInt8 */ kVarTypeUInt8, - /* 02: kVarTypeInt16 */ kVarTypeInt16, - /* 03: kVarTypeUInt16 */ kVarTypeUInt16, - /* 04: kVarTypeInt32 */ kVarTypeInt32, - /* 05: kVarTypeUInt32 */ kVarTypeUInt32, - /* 06: kVarTypeInt64 */ kVarTypeInt64, - /* 07: kVarTypeUInt64 */ kVarTypeUInt64, - /* 08: kVarTypeIntPtr */ kVarTypeInt64, // Remapped. - /* 09: kVarTypeUIntPtr */ kVarTypeUInt64, // Remapped. - /* 10: kVarTypeFp32 */ kVarTypeFp32, - /* 11: kVarTypeFp64 */ kVarTypeFp64, - /* 12: kVarTypeMm */ kVarTypeMm, - /* 13: kVarTypeXmm */ kVarTypeXmm, - /* 14: kVarTypeXmmSs */ kVarTypeXmmSs, - /* 15: kVarTypeXmmPs */ kVarTypeXmmPs, - /* 16: kVarTypeXmmSd */ kVarTypeXmmSd, - /* 17: kVarTypeXmmPd */ kVarTypeXmmPd, - /* 18: kVarTypeYmm */ kVarTypeYmm, - /* 19: kVarTypeYmmPs */ kVarTypeYmmPs, - /* 20: kVarTypeYmmPd */ kVarTypeYmmPd -}; - -const GpReg spl(kRegTypeGpbLo, kRegIndexSp, 1); -const GpReg bpl(kRegTypeGpbLo, kRegIndexBp, 1); -const GpReg sil(kRegTypeGpbLo, kRegIndexSi, 1); -const GpReg dil(kRegTypeGpbLo, kRegIndexDi, 1); -const GpReg r8b(kRegTypeGpbLo, kRegIndexR8, 1); -const GpReg r9b(kRegTypeGpbLo, kRegIndexR9, 1); -const GpReg r10b(kRegTypeGpbLo, kRegIndexR10, 1); -const GpReg r11b(kRegTypeGpbLo, kRegIndexR11, 1); -const GpReg r12b(kRegTypeGpbLo, kRegIndexR12, 1); -const GpReg r13b(kRegTypeGpbLo, kRegIndexR13, 1); -const GpReg r14b(kRegTypeGpbLo, kRegIndexR14, 1); -const GpReg r15b(kRegTypeGpbLo, kRegIndexR15, 1); - -const GpReg r8w(kRegTypeGpw, kRegIndexR8, 2); -const GpReg r9w(kRegTypeGpw, kRegIndexR9, 2); -const GpReg r10w(kRegTypeGpw, kRegIndexR10, 2); -const GpReg r11w(kRegTypeGpw, kRegIndexR11, 2); -const GpReg r12w(kRegTypeGpw, kRegIndexR12, 2); -const GpReg r13w(kRegTypeGpw, kRegIndexR13, 2); -const GpReg r14w(kRegTypeGpw, kRegIndexR14, 2); -const GpReg r15w(kRegTypeGpw, kRegIndexR15, 2); - -const GpReg r8d(kRegTypeGpd, kRegIndexR8, 4); -const GpReg r9d(kRegTypeGpd, kRegIndexR9, 4); -const GpReg r10d(kRegTypeGpd, kRegIndexR10, 4); -const GpReg r11d(kRegTypeGpd, kRegIndexR11, 4); -const GpReg r12d(kRegTypeGpd, kRegIndexR12, 4); -const GpReg r13d(kRegTypeGpd, kRegIndexR13, 4); -const GpReg r14d(kRegTypeGpd, kRegIndexR14, 4); -const GpReg r15d(kRegTypeGpd, kRegIndexR15, 4); - -const GpReg rax(kRegTypeGpq, kRegIndexAx, 8); -const GpReg rcx(kRegTypeGpq, kRegIndexCx, 8); -const GpReg rdx(kRegTypeGpq, kRegIndexDx, 8); -const GpReg rbx(kRegTypeGpq, kRegIndexBx, 8); -const GpReg rsp(kRegTypeGpq, kRegIndexSp, 8); -const GpReg rbp(kRegTypeGpq, kRegIndexBp, 8); -const GpReg rsi(kRegTypeGpq, kRegIndexSi, 8); -const GpReg rdi(kRegTypeGpq, kRegIndexDi, 8); - -const GpReg r8(kRegTypeGpq, kRegIndexR8, 8); -const GpReg r9(kRegTypeGpq, kRegIndexR9, 8); -const GpReg r10(kRegTypeGpq, kRegIndexR10, 8); -const GpReg r11(kRegTypeGpq, kRegIndexR11, 8); -const GpReg r12(kRegTypeGpq, kRegIndexR12, 8); -const GpReg r13(kRegTypeGpq, kRegIndexR13, 8); -const GpReg r14(kRegTypeGpq, kRegIndexR14, 8); -const GpReg r15(kRegTypeGpq, kRegIndexR15, 8); - -const GpReg zax(kRegTypeGpq, kRegIndexAx, 8); -const GpReg zcx(kRegTypeGpq, kRegIndexCx, 8); -const GpReg zdx(kRegTypeGpq, kRegIndexDx, 8); -const GpReg zbx(kRegTypeGpq, kRegIndexBx, 8); -const GpReg zsp(kRegTypeGpq, kRegIndexSp, 8); -const GpReg zbp(kRegTypeGpq, kRegIndexBp, 8); -const GpReg zsi(kRegTypeGpq, kRegIndexSi, 8); -const GpReg zdi(kRegTypeGpq, kRegIndexDi, 8); - -const XmmReg xmm8(kRegTypeXmm, kRegIndexXmm8, 16); -const XmmReg xmm9(kRegTypeXmm, kRegIndexXmm9, 16); -const XmmReg xmm10(kRegTypeXmm, kRegIndexXmm10, 16); -const XmmReg xmm11(kRegTypeXmm, kRegIndexXmm11, 16); -const XmmReg xmm12(kRegTypeXmm, kRegIndexXmm12, 16); -const XmmReg xmm13(kRegTypeXmm, kRegIndexXmm13, 16); -const XmmReg xmm14(kRegTypeXmm, kRegIndexXmm14, 16); -const XmmReg xmm15(kRegTypeXmm, kRegIndexXmm15, 16); - -const YmmReg ymm8(kRegTypeYmm, kRegIndexYmm8, 32); -const YmmReg ymm9(kRegTypeYmm, kRegIndexYmm9, 32); -const YmmReg ymm10(kRegTypeYmm, kRegIndexYmm10, 32); -const YmmReg ymm11(kRegTypeYmm, kRegIndexYmm11, 32); -const YmmReg ymm12(kRegTypeYmm, kRegIndexYmm12, 32); -const YmmReg ymm13(kRegTypeYmm, kRegIndexYmm13, 32); -const YmmReg ymm14(kRegTypeYmm, kRegIndexYmm14, 32); -const YmmReg ymm15(kRegTypeYmm, kRegIndexYmm15, 32); - -} // x64 namespace -} // asmjit namespace - -#endif // ASMJIT_BUILD_X64 - #include "../apiend.h" // [Guard] diff --git a/src/asmjit/x86/x86inst.h b/src/asmjit/x86/x86inst.h new file mode 100644 index 0000000..f237ad8 --- /dev/null +++ b/src/asmjit/x86/x86inst.h @@ -0,0 +1,1837 @@ +// [AsmJit] +// Complete x86/x64 JIT and Remote Assembler for C++. +// +// [License] +// Zlib - See LICENSE.md file in the package. + +// [Guard] +#ifndef _ASMJIT_X86_X86INST_H +#define _ASMJIT_X86_X86INST_H + +// [Dependencies - AsmJit] +#include "../base/assembler.h" +#include "../base/compiler.h" +#include "../base/globals.h" +#include "../base/intutil.h" +#include "../base/operand.h" +#include "../base/vectypes.h" + +// [Api-Begin] +#include "../apibegin.h" + +namespace asmjit { +namespace x86x64 { + +// ============================================================================ +// [Forward Declarations] +// ============================================================================ + +struct InstInfo; + +//! \addtogroup asmjit_x86x64_inst +//! \{ + +// ============================================================================ +// [asmjit::x86x64::Inst/Cond - Globals] +// ============================================================================ + +//! \internal +//! +//! X86/X64 instructions' names. +ASMJIT_VAR const char _instName[]; + +//! \internal +//! +//! X86/X64 instructions' information. +ASMJIT_VAR const InstInfo _instInfo[]; + +// ============================================================================ +// [asmjit::x86x64::kInstCode] +// ============================================================================ + +//! X86/X64 instruction codes. +//! +//! Note that these instruction codes are AsmJit specific. Each instruction has +//! a unique ID that is used as an index to AsmJit instruction table. +ASMJIT_ENUM(kInstCode) { + kInstAdc = 1, // X86/X64 + kInstAdd, // X86/X64 + kInstAddpd, // SSE2 + kInstAddps, // SSE + kInstAddsd, // SSE2 + kInstAddss, // SSE + kInstAddsubpd, // SSE3 + kInstAddsubps, // SSE3 + kInstAesdec, // AESNI + kInstAesdeclast, // AESNI + kInstAesenc, // AESNI + kInstAesenclast, // AESNI + kInstAesimc, // AESNI + kInstAeskeygenassist, // AESNI + kInstAnd, // X86/X64 + kInstAndn, // BMI + kInstAndnpd, // SSE2 + kInstAndnps, // SSE + kInstAndpd, // SSE2 + kInstAndps, // SSE + kInstBextr, // BMI + kInstBlendpd, // SSE4.1 + kInstBlendps, // SSE4.1 + kInstBlendvpd, // SSE4.1 + kInstBlendvps, // SSE4.1 + kInstBlsi, // BMI + kInstBlsmsk, // BMI + kInstBlsr, // BMI + kInstBsf, // X86/X64 + kInstBsr, // X86/X64 + kInstBswap, // X86/X64 (i486) + kInstBt, // X86/X64 + kInstBtc, // X86/X64 + kInstBtr, // X86/X64 + kInstBts, // X86/X64 + kInstBzhi, // BMI2 + kInstCall, // X86/X64 + kInstCbw, // X86/X64 + kInstCdq, // X86/X64 + kInstCdqe, // X64 only + kInstClc, // X86/X64 + kInstCld, // X86/X64 + kInstClflush, // SSE2 + kInstCmc, // X86/X64 + kInstCmova, // X86/X64 (cmovcc) (i586) + kInstCmovae, // X86/X64 (cmovcc) (i586) + kInstCmovb, // X86/X64 (cmovcc) (i586) + kInstCmovbe, // X86/X64 (cmovcc) (i586) + kInstCmovc, // X86/X64 (cmovcc) (i586) + kInstCmove, // X86/X64 (cmovcc) (i586) + kInstCmovg, // X86/X64 (cmovcc) (i586) + kInstCmovge, // X86/X64 (cmovcc) (i586) + kInstCmovl, // X86/X64 (cmovcc) (i586) + kInstCmovle, // X86/X64 (cmovcc) (i586) + kInstCmovna, // X86/X64 (cmovcc) (i586) + kInstCmovnae, // X86/X64 (cmovcc) (i586) + kInstCmovnb, // X86/X64 (cmovcc) (i586) + kInstCmovnbe, // X86/X64 (cmovcc) (i586) + kInstCmovnc, // X86/X64 (cmovcc) (i586) + kInstCmovne, // X86/X64 (cmovcc) (i586) + kInstCmovng, // X86/X64 (cmovcc) (i586) + kInstCmovnge, // X86/X64 (cmovcc) (i586) + kInstCmovnl, // X86/X64 (cmovcc) (i586) + kInstCmovnle, // X86/X64 (cmovcc) (i586) + kInstCmovno, // X86/X64 (cmovcc) (i586) + kInstCmovnp, // X86/X64 (cmovcc) (i586) + kInstCmovns, // X86/X64 (cmovcc) (i586) + kInstCmovnz, // X86/X64 (cmovcc) (i586) + kInstCmovo, // X86/X64 (cmovcc) (i586) + kInstCmovp, // X86/X64 (cmovcc) (i586) + kInstCmovpe, // X86/X64 (cmovcc) (i586) + kInstCmovpo, // X86/X64 (cmovcc) (i586) + kInstCmovs, // X86/X64 (cmovcc) (i586) + kInstCmovz, // X86/X64 (cmovcc) (i586) + kInstCmp, // X86/X64 + kInstCmppd, // SSE2 + kInstCmpps, // SSE + kInstCmpsd, // SSE2 + kInstCmpss, // SSE + kInstCmpxchg, // X86/X64 (i486) + kInstCmpxchg16b, // X64 only + kInstCmpxchg8b, // X86/X64 (i586) + kInstComisd, // SSE2 + kInstComiss, // SSE + kInstCpuid, // X86/X64 (i486) + kInstCqo, // X64 only + kInstCrc32, // SSE4.2 + kInstCvtdq2pd, // SSE2 + kInstCvtdq2ps, // SSE2 + kInstCvtpd2dq, // SSE2 + kInstCvtpd2pi, // SSE2 + kInstCvtpd2ps, // SSE2 + kInstCvtpi2pd, // SSE2 + kInstCvtpi2ps, // SSE + kInstCvtps2dq, // SSE2 + kInstCvtps2pd, // SSE2 + kInstCvtps2pi, // SSE + kInstCvtsd2si, // SSE2 + kInstCvtsd2ss, // SSE2 + kInstCvtsi2sd, // SSE2 + kInstCvtsi2ss, // SSE + kInstCvtss2sd, // SSE2 + kInstCvtss2si, // SSE + kInstCvttpd2dq, // SSE2 + kInstCvttpd2pi, // SSE2 + kInstCvttps2dq, // SSE2 + kInstCvttps2pi, // SSE + kInstCvttsd2si, // SSE2 + kInstCvttss2si, // SSE + kInstCwd, // X86/X64 + kInstCwde, // X86/X64 + kInstDaa, // X86 only + kInstDas, // X86 only + kInstDec, // X86/X64 + kInstDiv, // X86/X64 + kInstDivpd, // SSE2 + kInstDivps, // SSE + kInstDivsd, // SSE2 + kInstDivss, // SSE + kInstDppd, // SSE4.1 + kInstDpps, // SSE4.1 + kInstEmms, // MMX + kInstEnter, // X86/X64 + kInstExtractps, // SSE4.1 + kInstF2xm1, // FPU + kInstFabs, // FPU + kInstFadd, // FPU + kInstFaddp, // FPU + kInstFbld, // FPU + kInstFbstp, // FPU + kInstFchs, // FPU + kInstFclex, // FPU + kInstFcmovb, // FPU + kInstFcmovbe, // FPU + kInstFcmove, // FPU + kInstFcmovnb, // FPU + kInstFcmovnbe, // FPU + kInstFcmovne, // FPU + kInstFcmovnu, // FPU + kInstFcmovu, // FPU + kInstFcom, // FPU + kInstFcomi, // FPU + kInstFcomip, // FPU + kInstFcomp, // FPU + kInstFcompp, // FPU + kInstFcos, // FPU + kInstFdecstp, // FPU + kInstFdiv, // FPU + kInstFdivp, // FPU + kInstFdivr, // FPU + kInstFdivrp, // FPU + kInstFemms, // 3dNow! + kInstFfree, // FPU + kInstFiadd, // FPU + kInstFicom, // FPU + kInstFicomp, // FPU + kInstFidiv, // FPU + kInstFidivr, // FPU + kInstFild, // FPU + kInstFimul, // FPU + kInstFincstp, // FPU + kInstFinit, // FPU + kInstFist, // FPU + kInstFistp, // FPU + kInstFisttp, // SSE3 + kInstFisub, // FPU + kInstFisubr, // FPU + kInstFld, // FPU + kInstFld1, // FPU + kInstFldcw, // FPU + kInstFldenv, // FPU + kInstFldl2e, // FPU + kInstFldl2t, // FPU + kInstFldlg2, // FPU + kInstFldln2, // FPU + kInstFldpi, // FPU + kInstFldz, // FPU + kInstFmul, // FPU + kInstFmulp, // FPU + kInstFnclex, // FPU + kInstFninit, // FPU + kInstFnop, // FPU + kInstFnsave, // FPU + kInstFnstcw, // FPU + kInstFnstenv, // FPU + kInstFnstsw, // FPU + kInstFpatan, // FPU + kInstFprem, // FPU + kInstFprem1, // FPU + kInstFptan, // FPU + kInstFrndint, // FPU + kInstFrstor, // FPU + kInstFsave, // FPU + kInstFscale, // FPU + kInstFsin, // FPU + kInstFsincos, // FPU + kInstFsqrt, // FPU + kInstFst, // FPU + kInstFstcw, // FPU + kInstFstenv, // FPU + kInstFstp, // FPU + kInstFstsw, // FPU + kInstFsub, // FPU + kInstFsubp, // FPU + kInstFsubr, // FPU + kInstFsubrp, // FPU + kInstFtst, // FPU + kInstFucom, // FPU + kInstFucomi, // FPU + kInstFucomip, // FPU + kInstFucomp, // FPU + kInstFucompp, // FPU + kInstFwait, // FPU + kInstFxam, // FPU + kInstFxch, // FPU + kInstFxrstor, // FPU + kInstFxsave, // FPU + kInstFxtract, // FPU + kInstFyl2x, // FPU + kInstFyl2xp1, // FPU + kInstHaddpd, // SSE3 + kInstHaddps, // SSE3 + kInstHsubpd, // SSE3 + kInstHsubps, // SSE3 + kInstIdiv, // X86/X64 + kInstImul, // X86/X64 + kInstInc, // X86/X64 + kInstInsertps, // SSE4.1 + kInstInt, // X86/X64 + kInstJa, // X86/X64 (jcc) + kInstJae, // X86/X64 (jcc) + kInstJb, // X86/X64 (jcc) + kInstJbe, // X86/X64 (jcc) + kInstJc, // X86/X64 (jcc) + kInstJe, // X86/X64 (jcc) + kInstJg, // X86/X64 (jcc) + kInstJge, // X86/X64 (jcc) + kInstJl, // X86/X64 (jcc) + kInstJle, // X86/X64 (jcc) + kInstJna, // X86/X64 (jcc) + kInstJnae, // X86/X64 (jcc) + kInstJnb, // X86/X64 (jcc) + kInstJnbe, // X86/X64 (jcc) + kInstJnc, // X86/X64 (jcc) + kInstJne, // X86/X64 (jcc) + kInstJng, // X86/X64 (jcc) + kInstJnge, // X86/X64 (jcc) + kInstJnl, // X86/X64 (jcc) + kInstJnle, // X86/X64 (jcc) + kInstJno, // X86/X64 (jcc) + kInstJnp, // X86/X64 (jcc) + kInstJns, // X86/X64 (jcc) + kInstJnz, // X86/X64 (jcc) + kInstJo, // X86/X64 (jcc) + kInstJp, // X86/X64 (jcc) + kInstJpe, // X86/X64 (jcc) + kInstJpo, // X86/X64 (jcc) + kInstJs, // X86/X64 (jcc) + kInstJz, // X86/X64 (jcc) + kInstJecxz, // X86/X64 (jcxz/jecxz/jrcxz) + kInstJmp, // X86/X64 (jmp) + kInstLahf, // X86/X64 (CPUID NEEDED) + kInstLddqu, // SSE3 + kInstLdmxcsr, // SSE + kInstLea, // X86/X64 + kInstLeave, // X86/X64 + kInstLfence, // SSE2 + kInstLzcnt, // LZCNT + kInstMaskmovdqu, // SSE2 + kInstMaskmovq, // MMX-Ext + kInstMaxpd, // SSE2 + kInstMaxps, // SSE + kInstMaxsd, // SSE2 + kInstMaxss, // SSE + kInstMfence, // SSE2 + kInstMinpd, // SSE2 + kInstMinps, // SSE + kInstMinsd, // SSE2 + kInstMinss, // SSE + kInstMonitor, // SSE3 + kInstMov, // X86/X64 + kInstMovapd, // SSE2 + kInstMovaps, // SSE + kInstMovbe, // SSE3 - Intel-Atom + kInstMovd, // MMX/SSE2 + kInstMovddup, // SSE3 + kInstMovdq2q, // SSE2 + kInstMovdqa, // SSE2 + kInstMovdqu, // SSE2 + kInstMovhlps, // SSE + kInstMovhpd, // SSE2 + kInstMovhps, // SSE + kInstMovlhps, // SSE + kInstMovlpd, // SSE2 + kInstMovlps, // SSE + kInstMovmskpd, // SSE2 + kInstMovmskps, // SSE2 + kInstMovntdq, // SSE2 + kInstMovntdqa, // SSE4.1 + kInstMovnti, // SSE2 + kInstMovntpd, // SSE2 + kInstMovntps, // SSE + kInstMovntq, // MMX-Ext + kInstMovptr, // X86/X64 + kInstMovq, // MMX/SSE/SSE2 + kInstMovq2dq, // SSE2 + kInstMovsd, // SSE2 + kInstMovshdup, // SSE3 + kInstMovsldup, // SSE3 + kInstMovss, // SSE + kInstMovsx, // X86/X64 + kInstMovsxd, // X86/X64 + kInstMovupd, // SSE2 + kInstMovups, // SSE + kInstMovzx, // X86/X64 + kInstMpsadbw, // SSE4.1 + kInstMul, // X86/X64 + kInstMulpd, // SSE2 + kInstMulps, // SSE + kInstMulsd, // SSE2 + kInstMulss, // SSE + kInstMulx, // BMI2 + kInstMwait, // SSE3 + kInstNeg, // X86/X64 + kInstNop, // X86/X64 + kInstNot, // X86/X64 + kInstOr, // X86/X64 + kInstOrpd, // SSE2 + kInstOrps, // SSE + kInstPabsb, // SSSE3 + kInstPabsd, // SSSE3 + kInstPabsw, // SSSE3 + kInstPackssdw, // MMX/SSE2 + kInstPacksswb, // MMX/SSE2 + kInstPackusdw, // SSE4.1 + kInstPackuswb, // MMX/SSE2 + kInstPaddb, // MMX/SSE2 + kInstPaddd, // MMX/SSE2 + kInstPaddq, // SSE2 + kInstPaddsb, // MMX/SSE2 + kInstPaddsw, // MMX/SSE2 + kInstPaddusb, // MMX/SSE2 + kInstPaddusw, // MMX/SSE2 + kInstPaddw, // MMX/SSE2 + kInstPalignr, // SSSE3 + kInstPand, // MMX/SSE2 + kInstPandn, // MMX/SSE2 + kInstPause, // SSE2. + kInstPavgb, // MMX-Ext + kInstPavgw, // MMX-Ext + kInstPblendvb, // SSE4.1 + kInstPblendw, // SSE4.1 + kInstPclmulqdq, // PCLMULQDQ + kInstPcmpeqb, // MMX/SSE2 + kInstPcmpeqd, // MMX/SSE2 + kInstPcmpeqq, // SSE4.1 + kInstPcmpeqw, // MMX/SSE2 + kInstPcmpestri, // SSE4.2 + kInstPcmpestrm, // SSE4.2 + kInstPcmpgtb, // MMX/SSE2 + kInstPcmpgtd, // MMX/SSE2 + kInstPcmpgtq, // SSE4.2 + kInstPcmpgtw, // MMX/SSE2 + kInstPcmpistri, // SSE4.2 + kInstPcmpistrm, // SSE4.2 + kInstPdep, // BMI2 + kInstPext, // BMI2 + kInstPextrb, // SSE4.1 + kInstPextrd, // SSE4.1 + kInstPextrq, // SSE4.1 + kInstPextrw, // MMX-Ext/SSE2 + kInstPf2id, // 3dNow! + kInstPf2iw, // Enhanced 3dNow! + kInstPfacc, // 3dNow! + kInstPfadd, // 3dNow! + kInstPfcmpeq, // 3dNow! + kInstPfcmpge, // 3dNow! + kInstPfcmpgt, // 3dNow! + kInstPfmax, // 3dNow! + kInstPfmin, // 3dNow! + kInstPfmul, // 3dNow! + kInstPfnacc, // Enhanced 3dNow! + kInstPfpnacc, // Enhanced 3dNow! + kInstPfrcp, // 3dNow! + kInstPfrcpit1, // 3dNow! + kInstPfrcpit2, // 3dNow! + kInstPfrsqit1, // 3dNow! + kInstPfrsqrt, // 3dNow! + kInstPfsub, // 3dNow! + kInstPfsubr, // 3dNow! + kInstPhaddd, // SSSE3 + kInstPhaddsw, // SSSE3 + kInstPhaddw, // SSSE3 + kInstPhminposuw, // SSE4.1 + kInstPhsubd, // SSSE3 + kInstPhsubsw, // SSSE3 + kInstPhsubw, // SSSE3 + kInstPi2fd, // 3dNow! + kInstPi2fw, // Enhanced 3dNow! + kInstPinsrb, // SSE4.1 + kInstPinsrd, // SSE4.1 + kInstPinsrq, // SSE4.1 + kInstPinsrw, // MMX-Ext + kInstPmaddubsw, // SSSE3 + kInstPmaddwd, // MMX/SSE2 + kInstPmaxsb, // SSE4.1 + kInstPmaxsd, // SSE4.1 + kInstPmaxsw, // MMX-Ext + kInstPmaxub, // MMX-Ext + kInstPmaxud, // SSE4.1 + kInstPmaxuw, // SSE4.1 + kInstPminsb, // SSE4.1 + kInstPminsd, // SSE4.1 + kInstPminsw, // MMX-Ext + kInstPminub, // MMX-Ext + kInstPminud, // SSE4.1 + kInstPminuw, // SSE4.1 + kInstPmovmskb, // MMX-Ext + kInstPmovsxbd, // SSE4.1 + kInstPmovsxbq, // SSE4.1 + kInstPmovsxbw, // SSE4.1 + kInstPmovsxdq, // SSE4.1 + kInstPmovsxwd, // SSE4.1 + kInstPmovsxwq, // SSE4.1 + kInstPmovzxbd, // SSE4.1 + kInstPmovzxbq, // SSE4.1 + kInstPmovzxbw, // SSE4.1 + kInstPmovzxdq, // SSE4.1 + kInstPmovzxwd, // SSE4.1 + kInstPmovzxwq, // SSE4.1 + kInstPmuldq, // SSE4.1 + kInstPmulhrsw, // SSSE3 + kInstPmulhuw, // MMX-Ext + kInstPmulhw, // MMX/SSE2 + kInstPmulld, // SSE4.1 + kInstPmullw, // MMX/SSE2 + kInstPmuludq, // SSE2 + kInstPop, // X86/X64 + kInstPopa, // X86 only + kInstPopcnt, // SSE4.2 + kInstPopf, // X86/X64 + kInstPor, // MMX/SSE2 + kInstPrefetch, // MMX-Ext/SSE + kInstPrefetch3dNow, // 3dNow! + kInstPrefetchw3dNow, // 3dNow! + kInstPsadbw, // MMX-Ext + kInstPshufb, // SSSE3 + kInstPshufd, // SSE2 + kInstPshufhw, // SSE2 + kInstPshuflw, // SSE2 + kInstPshufw, // MMX-Ext + kInstPsignb, // SSSE3 + kInstPsignd, // SSSE3 + kInstPsignw, // SSSE3 + kInstPslld, // MMX/SSE2 + kInstPslldq, // SSE2 + kInstPsllq, // MMX/SSE2 + kInstPsllw, // MMX/SSE2 + kInstPsrad, // MMX/SSE2 + kInstPsraw, // MMX/SSE2 + kInstPsrld, // MMX/SSE2 + kInstPsrldq, // SSE2 + kInstPsrlq, // MMX/SSE2 + kInstPsrlw, // MMX/SSE2 + kInstPsubb, // MMX/SSE2 + kInstPsubd, // MMX/SSE2 + kInstPsubq, // SSE2 + kInstPsubsb, // MMX/SSE2 + kInstPsubsw, // MMX/SSE2 + kInstPsubusb, // MMX/SSE2 + kInstPsubusw, // MMX/SSE2 + kInstPsubw, // MMX/SSE2 + kInstPswapd, // Enhanced 3dNow! + kInstPtest, // SSE4.1 + kInstPunpckhbw, // MMX/SSE2 + kInstPunpckhdq, // MMX/SSE2 + kInstPunpckhqdq, // SSE2 + kInstPunpckhwd, // MMX/SSE2 + kInstPunpcklbw, // MMX/SSE2 + kInstPunpckldq, // MMX/SSE2 + kInstPunpcklqdq, // SSE2 + kInstPunpcklwd, // MMX/SSE2 + kInstPush, // X86/X64 + kInstPusha, // X86 only + kInstPushf, // X86/X64 + kInstPxor, // MMX/SSE2 + kInstRcl, // X86/X64 + kInstRcpps, // SSE + kInstRcpss, // SSE + kInstRcr, // X86/X64 + kInstRdfsbase, // FSGSBASE (x64) + kInstRdgsbase, // FSGSBASE (x64) + kInstRdrand, // RDRAND + kInstRdtsc, // X86/X64 + kInstRdtscp, // X86/X64 + kInstRepLodsb, // X86/X64 (REP) + kInstRepLodsd, // X86/X64 (REP) + kInstRepLodsq, // X64 only (REP) + kInstRepLodsw, // X86/X64 (REP) + kInstRepMovsb, // X86/X64 (REP) + kInstRepMovsd, // X86/X64 (REP) + kInstRepMovsq, // X64 only (REP) + kInstRepMovsw, // X86/X64 (REP) + kInstRepStosb, // X86/X64 (REP) + kInstRepStosd, // X86/X64 (REP) + kInstRepStosq, // X64 only (REP) + kInstRepStosw, // X86/X64 (REP) + kInstRepeCmpsb, // X86/X64 (REP) + kInstRepeCmpsd, // X86/X64 (REP) + kInstRepeCmpsq, // X64 only (REP) + kInstRepeCmpsw, // X86/X64 (REP) + kInstRepeScasb, // X86/X64 (REP) + kInstRepeScasd, // X86/X64 (REP) + kInstRepeScasq, // X64 only (REP) + kInstRepeScasw, // X86/X64 (REP) + kInstRepneCmpsb, // X86/X64 (REP) + kInstRepneCmpsd, // X86/X64 (REP) + kInstRepneCmpsq, // X64 only (REP) + kInstRepneCmpsw, // X86/X64 (REP) + kInstRepneScasb, // X86/X64 (REP) + kInstRepneScasd, // X86/X64 (REP) + kInstRepneScasq, // X64 only (REP) + kInstRepneScasw, // X86/X64 (REP) + kInstRet, // X86/X64 + kInstRol, // X86/X64 + kInstRor, // X86/X64 + kInstRorx, // BMI2 + kInstRoundpd, // SSE4.1 + kInstRoundps, // SSE4.1 + kInstRoundsd, // SSE4.1 + kInstRoundss, // SSE4.1 + kInstRsqrtps, // SSE + kInstRsqrtss, // SSE + kInstSahf, // X86/X64 (CPUID NEEDED) + kInstSal, // X86/X64 + kInstSar, // X86/X64 + kInstSarx, // BMI2 + kInstSbb, // X86/X64 + kInstSeta, // X86/X64 (setcc) + kInstSetae, // X86/X64 (setcc) + kInstSetb, // X86/X64 (setcc) + kInstSetbe, // X86/X64 (setcc) + kInstSetc, // X86/X64 (setcc) + kInstSete, // X86/X64 (setcc) + kInstSetg, // X86/X64 (setcc) + kInstSetge, // X86/X64 (setcc) + kInstSetl, // X86/X64 (setcc) + kInstSetle, // X86/X64 (setcc) + kInstSetna, // X86/X64 (setcc) + kInstSetnae, // X86/X64 (setcc) + kInstSetnb, // X86/X64 (setcc) + kInstSetnbe, // X86/X64 (setcc) + kInstSetnc, // X86/X64 (setcc) + kInstSetne, // X86/X64 (setcc) + kInstSetng, // X86/X64 (setcc) + kInstSetnge, // X86/X64 (setcc) + kInstSetnl, // X86/X64 (setcc) + kInstSetnle, // X86/X64 (setcc) + kInstSetno, // X86/X64 (setcc) + kInstSetnp, // X86/X64 (setcc) + kInstSetns, // X86/X64 (setcc) + kInstSetnz, // X86/X64 (setcc) + kInstSeto, // X86/X64 (setcc) + kInstSetp, // X86/X64 (setcc) + kInstSetpe, // X86/X64 (setcc) + kInstSetpo, // X86/X64 (setcc) + kInstSets, // X86/X64 (setcc) + kInstSetz, // X86/X64 (setcc) + kInstSfence, // MMX-Ext/SSE + kInstShl, // X86/X64 + kInstShld, // X86/X64 + kInstShlx, // BMI2 + kInstShr, // X86/X64 + kInstShrd, // X86/X64 + kInstShrx, // BMI2 + kInstShufpd, // SSE2 + kInstShufps, // SSE + kInstSqrtpd, // SSE2 + kInstSqrtps, // SSE + kInstSqrtsd, // SSE2 + kInstSqrtss, // SSE + kInstStc, // X86/X64 + kInstStd, // X86/X64 + kInstStmxcsr, // SSE + kInstSub, // X86/X64 + kInstSubpd, // SSE2 + kInstSubps, // SSE + kInstSubsd, // SSE2 + kInstSubss, // SSE + kInstTest, // X86/X64 + kInstTzcnt, // TZCNT + kInstUcomisd, // SSE2 + kInstUcomiss, // SSE + kInstUd2, // X86/X64 + kInstUnpckhpd, // SSE2 + kInstUnpckhps, // SSE + kInstUnpcklpd, // SSE2 + kInstUnpcklps, // SSE + kInstVaddpd, // AVX + kInstVaddps, // AVX + kInstVaddsd, // AVX + kInstVaddss, // AVX + kInstVaddsubpd, // AVX + kInstVaddsubps, // AVX + kInstVaesdec, // AVX+AESNI + kInstVaesdeclast, // AVX+AESNI + kInstVaesenc, // AVX+AESNI + kInstVaesenclast, // AVX+AESNI + kInstVaesimc, // AVX+AESNI + kInstVaeskeygenassist,// AVX+AESNI + kInstVandnpd, // AVX + kInstVandnps, // AVX + kInstVandpd, // AVX + kInstVandps, // AVX + kInstVblendpd, // AVX + kInstVblendps, // AVX + kInstVblendvpd, // AVX + kInstVblendvps, // AVX + kInstVbroadcastf128, // AVX + kInstVbroadcasti128, // AVX2 + kInstVbroadcastsd, // AVX/AVX2 + kInstVbroadcastss, // AVX/AVX2 + kInstVcmppd, // AVX + kInstVcmpps, // AVX + kInstVcmpsd, // AVX + kInstVcmpss, // AVX + kInstVcomisd, // AVX + kInstVcomiss, // AVX + kInstVcvtdq2pd, // AVX + kInstVcvtdq2ps, // AVX + kInstVcvtpd2dq, // AVX + kInstVcvtpd2ps, // AVX + kInstVcvtph2ps, // F16C + kInstVcvtps2dq, // AVX + kInstVcvtps2pd, // AVX + kInstVcvtps2ph, // F16C + kInstVcvtsd2si, // AVX + kInstVcvtsd2ss, // AVX + kInstVcvtsi2sd, // AVX + kInstVcvtsi2ss, // AVX + kInstVcvtss2sd, // AVX + kInstVcvtss2si, // AVX + kInstVcvttpd2dq, // AVX + kInstVcvttps2dq, // AVX + kInstVcvttsd2si, // AVX + kInstVcvttss2si, // AVX + kInstVdivpd, // AVX + kInstVdivps, // AVX + kInstVdivsd, // AVX + kInstVdivss, // AVX + kInstVdppd, // AVX + kInstVdpps, // AVX + kInstVextractf128, // AVX + kInstVextracti128, // AVX2 + kInstVextractps, // AVX + kInstVfmadd132pd, // FMA3 + kInstVfmadd132ps, // FMA3 + kInstVfmadd132sd, // FMA3 + kInstVfmadd132ss, // FMA3 + kInstVfmadd213pd, // FMA3 + kInstVfmadd213ps, // FMA3 + kInstVfmadd213sd, // FMA3 + kInstVfmadd213ss, // FMA3 + kInstVfmadd231pd, // FMA3 + kInstVfmadd231ps, // FMA3 + kInstVfmadd231sd, // FMA3 + kInstVfmadd231ss, // FMA3 + kInstVfmaddpd, // FMA4 + kInstVfmaddps, // FMA4 + kInstVfmaddsd, // FMA4 + kInstVfmaddss, // FMA4 + kInstVfmaddsubpd, // FMA4 + kInstVfmaddsubps, // FMA4 + kInstVfmaddsub132pd, // FMA3 + kInstVfmaddsub132ps, // FMA3 + kInstVfmaddsub213pd, // FMA3 + kInstVfmaddsub213ps, // FMA3 + kInstVfmaddsub231pd, // FMA3 + kInstVfmaddsub231ps, // FMA3 + kInstVfmsub132pd, // FMA3 + kInstVfmsub132ps, // FMA3 + kInstVfmsub132sd, // FMA3 + kInstVfmsub132ss, // FMA3 + kInstVfmsub213pd, // FMA3 + kInstVfmsub213ps, // FMA3 + kInstVfmsub213sd, // FMA3 + kInstVfmsub213ss, // FMA3 + kInstVfmsub231pd, // FMA3 + kInstVfmsub231ps, // FMA3 + kInstVfmsub231sd, // FMA3 + kInstVfmsub231ss, // FMA3 + kInstVfmsubadd132pd, // FMA3 + kInstVfmsubadd132ps, // FMA3 + kInstVfmsubadd213pd, // FMA3 + kInstVfmsubadd213ps, // FMA3 + kInstVfmsubadd231pd, // FMA3 + kInstVfmsubadd231ps, // FMA3 + kInstVfmsubaddpd, // FMA4 + kInstVfmsubaddps, // FMA4 + kInstVfmsubpd, // FMA4 + kInstVfmsubps, // FMA4 + kInstVfmsubsd, // FMA4 + kInstVfmsubss, // FMA4 + kInstVfnmadd132pd, // FMA3 + kInstVfnmadd132ps, // FMA3 + kInstVfnmadd132sd, // FMA3 + kInstVfnmadd132ss, // FMA3 + kInstVfnmadd213pd, // FMA3 + kInstVfnmadd213ps, // FMA3 + kInstVfnmadd213sd, // FMA3 + kInstVfnmadd213ss, // FMA3 + kInstVfnmadd231pd, // FMA3 + kInstVfnmadd231ps, // FMA3 + kInstVfnmadd231sd, // FMA3 + kInstVfnmadd231ss, // FMA3 + kInstVfnmaddpd, // FMA4 + kInstVfnmaddps, // FMA4 + kInstVfnmaddsd, // FMA4 + kInstVfnmaddss, // FMA4 + kInstVfnmsub132pd, // FMA3 + kInstVfnmsub132ps, // FMA3 + kInstVfnmsub132sd, // FMA3 + kInstVfnmsub132ss, // FMA3 + kInstVfnmsub213pd, // FMA3 + kInstVfnmsub213ps, // FMA3 + kInstVfnmsub213sd, // FMA3 + kInstVfnmsub213ss, // FMA3 + kInstVfnmsub231pd, // FMA3 + kInstVfnmsub231ps, // FMA3 + kInstVfnmsub231sd, // FMA3 + kInstVfnmsub231ss, // FMA3 + kInstVfnmsubpd, // FMA4 + kInstVfnmsubps, // FMA4 + kInstVfnmsubsd, // FMA4 + kInstVfnmsubss, // FMA4 + kInstVfrczpd, // XOP + kInstVfrczps, // XOP + kInstVfrczsd, // XOP + kInstVfrczss, // XOP + kInstVgatherdpd, // AVX2 + kInstVgatherdps, // AVX2 + kInstVgatherqpd, // AVX2 + kInstVgatherqps, // AVX2 + kInstVhaddpd, // AVX + kInstVhaddps, // AVX + kInstVhsubpd, // AVX + kInstVhsubps, // AVX + kInstVinsertf128, // AVX + kInstVinserti128, // AVX2 + kInstVinsertps, // AVX + kInstVlddqu, // AVX + kInstVldmxcsr, // AVX + kInstVmaskmovdqu, // AVX + kInstVmaskmovpd, // AVX + kInstVmaskmovps, // AVX + kInstVmaxpd, // AVX + kInstVmaxps, // AVX + kInstVmaxsd, // AVX + kInstVmaxss, // AVX + kInstVminpd, // AVX + kInstVminps, // AVX + kInstVminsd, // AVX + kInstVminss, // AVX + kInstVmovapd, // AVX + kInstVmovaps, // AVX + kInstVmovd, // AVX + kInstVmovddup, // AVX + kInstVmovdqa, // AVX + kInstVmovdqu, // AVX + kInstVmovhlps, // AVX + kInstVmovhpd, // AVX + kInstVmovhps, // AVX + kInstVmovlhps, // AVX + kInstVmovlpd, // AVX + kInstVmovlps, // AVX + kInstVmovmskpd, // AVX + kInstVmovmskps, // AVX + kInstVmovntdq, // AVX + kInstVmovntdqa, // AVX/AVX2 + kInstVmovntpd, // AVX + kInstVmovntps, // AVX + kInstVmovq, // AVX + kInstVmovsd, // AVX + kInstVmovshdup, // AVX + kInstVmovsldup, // AVX + kInstVmovss, // AVX + kInstVmovupd, // AVX + kInstVmovups, // AVX + kInstVmpsadbw, // AVX/AVX2 + kInstVmulpd, // AVX + kInstVmulps, // AVX + kInstVmulsd, // AVX + kInstVmulss, // AVX + kInstVorpd, // AVX + kInstVorps, // AVX + kInstVpabsb, // AVX2 + kInstVpabsd, // AVX2 + kInstVpabsw, // AVX2 + kInstVpackssdw, // AVX2 + kInstVpacksswb, // AVX2 + kInstVpackusdw, // AVX2 + kInstVpackuswb, // AVX2 + kInstVpaddb, // AVX2 + kInstVpaddd, // AVX2 + kInstVpaddq, // AVX2 + kInstVpaddsb, // AVX2 + kInstVpaddsw, // AVX2 + kInstVpaddusb, // AVX2 + kInstVpaddusw, // AVX2 + kInstVpaddw, // AVX2 + kInstVpalignr, // AVX2 + kInstVpand, // AVX2 + kInstVpandn, // AVX2 + kInstVpavgb, // AVX2 + kInstVpavgw, // AVX2 + kInstVpblendd, // AVX2 + kInstVpblendvb, // AVX2 + kInstVpblendw, // AVX2 + kInstVpbroadcastb, // AVX2 + kInstVpbroadcastd, // AVX2 + kInstVpbroadcastq, // AVX2 + kInstVpbroadcastw, // AVX2 + kInstVpclmulqdq, // AVX+PCLMULQDQ + kInstVpcmov, // XOP + kInstVpcmpeqb, // AVX2 + kInstVpcmpeqd, // AVX2 + kInstVpcmpeqq, // AVX2 + kInstVpcmpeqw, // AVX2 + kInstVpcmpestri, // AVX + kInstVpcmpestrm, // AVX + kInstVpcmpgtb, // AVX2 + kInstVpcmpgtd, // AVX2 + kInstVpcmpgtq, // AVX2 + kInstVpcmpgtw, // AVX2 + kInstVpcmpistri, // AVX + kInstVpcmpistrm, // AVX + kInstVpcomb, // XOP + kInstVpcomd, // XOP + kInstVpcomq, // XOP + kInstVpcomub, // XOP + kInstVpcomud, // XOP + kInstVpcomuq, // XOP + kInstVpcomuw, // XOP + kInstVpcomw, // XOP + kInstVperm2f128, // AVX + kInstVperm2i128, // AVX2 + kInstVpermd, // AVX2 + kInstVpermil2pd, // XOP + kInstVpermil2ps, // XOP + kInstVpermilpd, // AVX + kInstVpermilps, // AVX + kInstVpermpd, // AVX2 + kInstVpermps, // AVX2 + kInstVpermq, // AVX2 + kInstVpextrb, // AVX + kInstVpextrd, // AVX + kInstVpextrq, // AVX (x64 only) + kInstVpextrw, // AVX + kInstVpgatherdd, // AVX2 + kInstVpgatherdq, // AVX2 + kInstVpgatherqd, // AVX2 + kInstVpgatherqq, // AVX2 + kInstVphaddbd, // XOP + kInstVphaddbq, // XOP + kInstVphaddbw, // XOP + kInstVphaddd, // AVX2 + kInstVphadddq, // XOP + kInstVphaddsw, // AVX2 + kInstVphaddubd, // XOP + kInstVphaddubq, // XOP + kInstVphaddubw, // XOP + kInstVphaddudq, // XOP + kInstVphadduwd, // XOP + kInstVphadduwq, // XOP + kInstVphaddw, // AVX2 + kInstVphaddwd, // XOP + kInstVphaddwq, // XOP + kInstVphminposuw, // AVX + kInstVphsubbw, // XOP + kInstVphsubdq, // XOP + kInstVphsubd, // AVX2 + kInstVphsubsw, // AVX2 + kInstVphsubw, // AVX2 + kInstVphsubwd, // XOP + kInstVpinsrb, // AVX + kInstVpinsrd, // AVX + kInstVpinsrq, // AVX (x64 only) + kInstVpinsrw, // AVX + kInstVpmacsdd, // XOP + kInstVpmacsdqh, // XOP + kInstVpmacsdql, // XOP + kInstVpmacssdd, // XOP + kInstVpmacssdqh, // XOP + kInstVpmacssdql, // XOP + kInstVpmacsswd, // XOP + kInstVpmacssww, // XOP + kInstVpmacswd, // XOP + kInstVpmacsww, // XOP + kInstVpmadcsswd, // XOP + kInstVpmadcswd, // XOP + kInstVpmaddubsw, // AVX/AVX2 + kInstVpmaddwd, // AVX/AVX2 + kInstVpmaskmovd, // AVX2 + kInstVpmaskmovq, // AVX2 + kInstVpmaxsb, // AVX/AVX2 + kInstVpmaxsd, // AVX/AVX2 + kInstVpmaxsw, // AVX/AVX2 + kInstVpmaxub, // AVX/AVX2 + kInstVpmaxud, // AVX/AVX2 + kInstVpmaxuw, // AVX/AVX2 + kInstVpminsb, // AVX/AVX2 + kInstVpminsd, // AVX/AVX2 + kInstVpminsw, // AVX/AVX2 + kInstVpminub, // AVX/AVX2 + kInstVpminud, // AVX/AVX2 + kInstVpminuw, // AVX/AVX2 + kInstVpmovmskb, // AVX/AVX2 + kInstVpmovsxbd, // AVX/AVX2 + kInstVpmovsxbq, // AVX/AVX2 + kInstVpmovsxbw, // AVX/AVX2 + kInstVpmovsxdq, // AVX/AVX2 + kInstVpmovsxwd, // AVX/AVX2 + kInstVpmovsxwq, // AVX/AVX2 + kInstVpmovzxbd, // AVX/AVX2 + kInstVpmovzxbq, // AVX/AVX2 + kInstVpmovzxbw, // AVX/AVX2 + kInstVpmovzxdq, // AVX/AVX2 + kInstVpmovzxwd, // AVX/AVX2 + kInstVpmovzxwq, // AVX/AVX2 + kInstVpmuldq, // AVX/AVX2 + kInstVpmulhrsw, // AVX/AVX2 + kInstVpmulhuw, // AVX/AVX2 + kInstVpmulhw, // AVX/AVX2 + kInstVpmulld, // AVX/AVX2 + kInstVpmullw, // AVX/AVX2 + kInstVpmuludq, // AVX/AVX2 + kInstVpor, // AVX/AVX2 + kInstVpperm, // XOP + kInstVprotb, // XOP + kInstVprotd, // XOP + kInstVprotq, // XOP + kInstVprotw, // XOP + kInstVpsadbw, // AVX/AVX2 + kInstVpshab, // XOP + kInstVpshad, // XOP + kInstVpshaq, // XOP + kInstVpshaw, // XOP + kInstVpshlb, // XOP + kInstVpshld, // XOP + kInstVpshlq, // XOP + kInstVpshlw, // XOP + kInstVpshufb, // AVX/AVX2 + kInstVpshufd, // AVX/AVX2 + kInstVpshufhw, // AVX/AVX2 + kInstVpshuflw, // AVX/AVX2 + kInstVpsignb, // AVX/AVX2 + kInstVpsignd, // AVX/AVX2 + kInstVpsignw, // AVX/AVX2 + kInstVpslld, // AVX/AVX2 + kInstVpslldq, // AVX/AVX2 + kInstVpsllq, // AVX/AVX2 + kInstVpsllvd, // AVX2 + kInstVpsllvq, // AVX2 + kInstVpsllw, // AVX/AVX2 + kInstVpsrad, // AVX/AVX2 + kInstVpsravd, // AVX2 + kInstVpsraw, // AVX/AVX2 + kInstVpsrld, // AVX/AVX2 + kInstVpsrldq, // AVX/AVX2 + kInstVpsrlq, // AVX/AVX2 + kInstVpsrlvd, // AVX2 + kInstVpsrlvq, // AVX2 + kInstVpsrlw, // AVX/AVX2 + kInstVpsubb, // AVX/AVX2 + kInstVpsubd, // AVX/AVX2 + kInstVpsubq, // AVX/AVX2 + kInstVpsubsb, // AVX/AVX2 + kInstVpsubsw, // AVX/AVX2 + kInstVpsubusb, // AVX/AVX2 + kInstVpsubusw, // AVX/AVX2 + kInstVpsubw, // AVX/AVX2 + kInstVptest, // AVX + kInstVpunpckhbw, // AVX/AVX2 + kInstVpunpckhdq, // AVX/AVX2 + kInstVpunpckhqdq, // AVX/AVX2 + kInstVpunpckhwd, // AVX/AVX2 + kInstVpunpcklbw, // AVX/AVX2 + kInstVpunpckldq, // AVX/AVX2 + kInstVpunpcklqdq, // AVX/AVX2 + kInstVpunpcklwd, // AVX/AVX2 + kInstVpxor, // AVX/AVX2 + kInstVrcpps, // AVX + kInstVrcpss, // AVX + kInstVroundpd, // AVX + kInstVroundps, // AVX + kInstVroundsd, // AVX + kInstVroundss, // AVX + kInstVrsqrtps, // AVX + kInstVrsqrtss, // AVX + kInstVshufpd, // AVX + kInstVshufps, // AVX + kInstVsqrtpd, // AVX + kInstVsqrtps, // AVX + kInstVsqrtsd, // AVX + kInstVsqrtss, // AVX + kInstVstmxcsr, // AVX + kInstVsubpd, // AVX + kInstVsubps, // AVX + kInstVsubsd, // AVX + kInstVsubss, // AVX + kInstVtestpd, // AVX + kInstVtestps, // AVX + kInstVucomisd, // AVX + kInstVucomiss, // AVX + kInstVunpckhpd, // AVX + kInstVunpckhps, // AVX + kInstVunpcklpd, // AVX + kInstVunpcklps, // AVX + kInstVxorpd, // AVX + kInstVxorps, // AVX + kInstVzeroall, // AVX + kInstVzeroupper, // AVX + kInstWrfsbase, // FSGSBASE (x64) + kInstWrgsbase, // FSGSBASE (x64) + kInstXadd, // X86/X64 (i486) + kInstXchg, // X86/X64 (i386) + kInstXor, // X86/X64 + kInstXorpd, // SSE2 + kInstXorps, // SSE + + _kInstCount, + + _kInstCmovcc = kInstCmova, + _kInstJcc = kInstJa, + _kInstSetcc = kInstSeta, + + _kInstJbegin = kInstJa, + _kInstJend = kInstJmp +}; + +// ============================================================================ +// [asmjit::x86x64::kInstOptions] +// ============================================================================ + +//! X86/X64 instruction emit options, mainly for internal purposes. +ASMJIT_ENUM(kInstOptions) { + //! Emit instruction with LOCK prefix. + //! + //! If this option is used and instruction doesn't support LOCK prefix an + //! invalid instruction error is generated. + kInstOptionLock = 0x10, + + //! Force REX prefix to be emitted. + //! + //! This option should be used carefully, because there are unencodable + //! combinations. If you want to access ah, bh, ch or dh registers the REX + //! prefix can't be emitted, otherwise illegal instruction error will be + //! returned. + kInstOptionRex = 0x40, + + //! Force three-byte VEX prefix to be emitted (instead of more compact + //! two-byte VEX prefix). + //! + //! Ignored if the instruction doesn't use VEX prefix. + kInstOptionVex3 = 0x80 +}; + +// ============================================================================ +// [asmjit::x86x64::kInstGroup] +// ============================================================================ + +//! \internal +//! +//! X86/X64 instruction groups. +//! +//! This group is specific to AsmJit and only used by `x86x64::X86X64Assembler`. +ASMJIT_ENUM(kInstGroup) { + //! Never used. + kInstGroupNone, + + kInstGroupX86Op, + kInstGroupX86Rm, + kInstGroupX86Rm_B, + kInstGroupX86RmReg, + kInstGroupX86RegRm, + kInstGroupX86M, + //! Adc/Add/And/Cmp/Or/Sbb/Sub/Xor. + kInstGroupX86Arith, + //! Bswap. + kInstGroupX86BSwap, + //! Bt/Btc/Btr/Bts. + kInstGroupX86BTest, + //! Call. + kInstGroupX86Call, + //! Enter. + kInstGroupX86Enter, + //! Imul. + kInstGroupX86Imul, + //! Inc/Dec. + kInstGroupX86IncDec, + //! Int. + kInstGroupX86Int, + //! Jcc. + kInstGroupX86Jcc, + //! Jcxz/Jecxz/Jrcxz. + kInstGroupX86Jecxz, + //! Jmp. + kInstGroupX86Jmp, + //! Lea. + kInstGroupX86Lea, + //! Mov. + kInstGroupX86Mov, + //! Movsx/Movzx. + kInstGroupX86MovSxZx, + //! Movsxd. + kInstGroupX86MovSxd, + //! Mov having absolute memory operand (x86/x64). + kInstGroupX86MovPtr, + //! Push. + kInstGroupX86Push, + //! Pop. + kInstGroupX86Pop, + //! Rep/Repe/Repne LodsX/MovsX/StosX/CmpsX/ScasX. + kInstGroupX86Rep, + //! Ret. + kInstGroupX86Ret, + //! Rcl/Rcr/Rol/Ror/Sal/Sar/Shl/Shr. + kInstGroupX86Rot, + //! Setcc. + kInstGroupX86Set, + //! Shld/Rhrd. + kInstGroupX86Shlrd, + //! Test. + kInstGroupX86Test, + //! Xadd. + kInstGroupX86Xadd, + //! Xchg. + kInstGroupX86Xchg, + + //! Fincstp/Finit/FldX/Fnclex/Fninit/Fnop/Fpatan/Fprem/Fprem1/Fptan/Frndint/Fscale/Fsin/Fsincos/Fsqrt/Ftst/Fucompp/Fxam/Fxtract/Fyl2x/Fyl2xp1. + kInstGroupFpuOp, + //! Fadd/Fdiv/Fdivr/Fmul/Fsub/Fsubr. + kInstGroupFpuArith, + //! Fcom/Fcomp. + kInstGroupFpuCom, + //! Fld/Fst/Fstp. + kInstGroupFpuFldFst, + //! Fiadd/Ficom/Ficomp/Fidiv/Fidivr/Fild/Fimul/Fist/Fistp/Fisttp/Fisub/Fisubr. + kInstGroupFpuM, + //! Fcmov/Fcomi/Fcomip/Ffree/Fucom/Fucomi/Fucomip/Fucomp/Fxch. + kInstGroupFpuR, + //! Faddp/Fdivp/Fdivrp/Fmulp/Fsubp/Fsubrp. + kInstGroupFpuRDef, + //! Fnstsw/Fstsw. + kInstGroupFpuStsw, + + //! Mm/Xmm instruction. + kInstGroupExtRm, + //! Mm/Xmm instruction (propagates 66H if the instruction uses Xmm register). + kInstGroupExtRm_P, + //! Mm/Xmm instruction (propagates REX.W if GPQ is used). + kInstGroupExtRm_Q, + //! Mm/Xmm instruction (propagates 66H and REX.W). + kInstGroupExtRm_PQ, + //! Mm/Xmm instruction having Rm/Ri encodings. + kInstGroupExtRmRi, + //! Mm/Xmm instruction having Rm/Ri encodings (propagates 66H if the instruction uses Xmm register). + kInstGroupExtRmRi_P, + //! Mm/Xmm instruction having Rmi encoding. + kInstGroupExtRmi, + //! Mm/Xmm instruction having Rmi encoding (propagates 66H if the instruction uses Xmm register). + kInstGroupExtRmi_P, + //! Crc32. + kInstGroupExtCrc, + //! Pextrb/Pextrw/Pextrd/Pextrq/Extractps. + kInstGroupExtExtract, + //! Lfence/Mfence/Sfence. + kInstGroupExtFence, + //! Mov Mm/Xmm. + //! + //! 0x66 prefix must be set manually in opcodes. + //! + //! - Primary opcode is used for instructions in (X)Mm <- (X)Mm/Mem format, + //! - Secondary opcode is used for instructions in (X)Mm/Mem <- (X)Mm format. + kInstGroupExtMov, + //! Mov Mm/Xmm. + kInstGroupExtMovNoRexW, + //! Movbe. + kInstGroupExtMovBe, + //! Movd. + kInstGroupExtMovD, + //! Movq. + kInstGroupExtMovQ, + //! Prefetch. + kInstGroupExtPrefetch, + + //! 3dNow instruction. + kInstGroup3dNow, + + //! AVX instruction without operands. + kInstGroupAvxOp, + //! AVX instruction encoded as 'M'. + kInstGroupAvxM, + //! AVX instruction encoded as 'MR'. + kInstGroupAvxMr, + //! AVX instruction encoded as 'MR' (Propagates AVX.L if Ymm used). + kInstGroupAvxMr_P, + //! AVX instruction encoded as 'MRI'. + kInstGroupAvxMri, + //! AVX instruction encoded as 'MRI' (Propagates AVX.L if Ymm used). + kInstGroupAvxMri_P, + //! AVX instruction encoded as 'RM'. + kInstGroupAvxRm, + //! AVX instruction encoded as 'RM' (Propagates AVX.L if Ymm used). + kInstGroupAvxRm_P, + //! AVX instruction encoded as 'RMI'. + kInstGroupAvxRmi, + //! AVX instruction encoded as 'RMI' (Propagates AVX.L if Ymm used). + kInstGroupAvxRmi_P, + //! AVX instruction encoded as 'RVM'. + kInstGroupAvxRvm, + //! AVX instruction encoded as 'RVM' (Propagates AVX.L if Ymm used). + kInstGroupAvxRvm_P, + //! AVX instruction encoded as 'RVMR'. + kInstGroupAvxRvmr, + //! AVX instruction encoded as 'RVMR' (Propagates AVX.L if Ymm used). + kInstGroupAvxRvmr_P, + //! AVX instruction encoded as 'RVMI'. + kInstGroupAvxRvmi, + //! AVX instruction encoded as 'RVMI' (Propagates AVX.L if Ymm used). + kInstGroupAvxRvmi_P, + //! AVX instruction encoded as 'RMV'. + kInstGroupAvxRmv, + //! AVX instruction encoded as 'RMVI'. + kInstGroupAvxRmvi, + //! AVX instruction encoded as 'RM' or 'MR'. + kInstGroupAvxRmMr, + //! AVX instruction encoded as 'RM' or 'MR' (Propagates AVX.L if Ymm used). + kInstGroupAvxRmMr_P, + //! AVX instruction encoded as 'RVM' or 'RMI'. + kInstGroupAvxRvmRmi, + //! AVX instruction encoded as 'RVM' or 'RMI' (Propagates AVX.L if Ymm used). + kInstGroupAvxRvmRmi_P, + //! AVX instruction encoded as 'RVM' or 'MR'. + kInstGroupAvxRvmMr, + //! AVX instruction encoded as 'RVM' or 'MVR'. + kInstGroupAvxRvmMvr, + //! AVX instruction encoded as 'RVM' or 'MVR' (Propagates AVX.L if Ymm used). + kInstGroupAvxRvmMvr_P, + //! AVX instruction encoded as 'RVM' or 'VMI'. + kInstGroupAvxRvmVmi, + //! AVX instruction encoded as 'RVM' or 'VMI' (Propagates AVX.L if Ymm used). + kInstGroupAvxRvmVmi_P, + //! AVX instruction encoded as 'VM'. + kInstGroupAvxVm, + //! AVX instruction encoded as 'VMI'. + kInstGroupAvxVmi, + //! AVX instruction encoded as 'VMI' (Propagates AVX.L if Ymm used). + kInstGroupAvxVmi_P, + //! AVX instruction encoded as 'RVRM' or 'RVMR'. + kInstGroupAvxRvrmRvmr, + //! AVX instruction encoded as 'RVRM' or 'RVMR' (Propagates AVX.L if Ymm used). + kInstGroupAvxRvrmRvmr_P, + //! Vmovss/Vmovsd. + kInstGroupAvxMovSsSd, + //! AVX2 gather family instructions (VSIB). + kInstGroupAvxGather, + //! AVX2 gather family instructions (VSIB), differs only in mem operand. + kInstGroupAvxGatherEx, + + //! FMA4 instruction in form [R, R, R/M, R/M]. + kInstGroupFma4, + //! FMA4 instruction in form [R, R, R/M, R/M] (Propagates AVX.L if Ymm used). + kInstGroupFma4_P, + + //! XOP instruction encoded as 'RM'. + kInstGroupXopRm, + //! XOP instruction encoded as 'RM' (Propagates AVX.L if Ymm used). + kInstGroupXopRm_P, + //! XOP instruction encoded as 'RVM' or 'RMV'. + kInstGroupXopRvmRmv, + //! XOP instruction encoded as 'RVM' or 'RMI'. + kInstGroupXopRvmRmi, + //! XOP instruction encoded as 'RVMR'. + kInstGroupXopRvmr, + //! XOP instruction encoded as 'RVMR' (Propagates AVX.L if Ymm used). + kInstGroupXopRvmr_P, + //! XOP instruction encoded as 'RVMI'. + kInstGroupXopRvmi, + //! XOP instruction encoded as 'RVMI' (Propagates AVX.L if Ymm used). + kInstGroupXopRvmi_P, + //! XOP instruction encoded as 'RVRM' or 'RVMR'. + kInstGroupXopRvrmRvmr, + //! XOP instruction encoded as 'RVRM' or 'RVMR' (Propagates AVX.L if Ymm used). + kInstGroupXopRvrmRvmr_P +}; + +// ============================================================================ +// [asmjit::x86x64::kInstOpCode] +// ============================================================================ + +//! \internal +//! +//! Instruction OpCode encoding used by asmjit 'InstInfo' table. +//! +//! The schema was inspired by AVX/AVX2 features. +ASMJIT_ENUM(kInstOpCode) { + // 'MMMMM' field in AVX/XOP instruction. + // 'OpCode' leading bytes in legacy encoding. + kInstOpCode_MM_Shift = 16, + kInstOpCode_MM_Mask = 0x0FU << kInstOpCode_MM_Shift, + kInstOpCode_MM_00 = 0x00U << kInstOpCode_MM_Shift, + kInstOpCode_MM_0F = 0x01U << kInstOpCode_MM_Shift, + kInstOpCode_MM_0F38 = 0x02U << kInstOpCode_MM_Shift, + kInstOpCode_MM_0F3A = 0x03U << kInstOpCode_MM_Shift, + kInstOpCode_MM_0F01 = 0x0FU << kInstOpCode_MM_Shift, // Ext/Not part of AVX. + + kInstOpCode_MM_00011 = 0x03U << kInstOpCode_MM_Shift, + kInstOpCode_MM_01000 = 0x08U << kInstOpCode_MM_Shift, + kInstOpCode_MM_01001 = 0x09U << kInstOpCode_MM_Shift, + + // 'PP' field in AVX/XOP instruction. + // 'Mandatory Prefix' in legacy encoding. + kInstOpCode_PP_Shift = 21, + kInstOpCode_PP_Mask = 0x07U << kInstOpCode_PP_Shift, + kInstOpCode_PP_00 = 0x00U << kInstOpCode_PP_Shift, + kInstOpCode_PP_66 = 0x01U << kInstOpCode_PP_Shift, + kInstOpCode_PP_F3 = 0x02U << kInstOpCode_PP_Shift, + kInstOpCode_PP_F2 = 0x03U << kInstOpCode_PP_Shift, + kInstOpCode_PP_9B = 0x07U << kInstOpCode_PP_Shift, //Ext/Not part of AVX. + + // 'L' field in AVX/XOP instruction. + kInstOpCode_L_Shift = 24, + kInstOpCode_L_Mask = 0x01U << kInstOpCode_L_Shift, + kInstOpCode_L_False = 0x00U << kInstOpCode_L_Shift, + kInstOpCode_L_True = 0x01U << kInstOpCode_L_Shift, + + // 'O' field. + kInstOpCode_O_Shift = 29, + kInstOpCode_O_Mask = 0x07U << kInstOpCode_O_Shift +}; + +// ============================================================================ +// [asmjit::x86x64::kInstFlags] +// ============================================================================ + +//! \internal +//! +//! X86/X64 instruction type flags. +ASMJIT_ENUM(kInstFlags) { + //! No flags. + kInstFlagNone = 0x0000, + + //! Instruction is a control-flow instruction. + //! + //! Control flow instructions are jmp, jcc, call and ret. + kInstFlagFlow = 0x0001, + + //! Instruction is a compare/test like instruction. + kInstFlagTest = 0x0002, + + //! Instruction is a move like instruction. + //! + //! Move instructions typically overwrite the first operand by the second + //! operand. The first operand can be the exact copy of the second operand + //! or it can be any kind of conversion or shuffling. + //! + //! Mov instructions are 'mov', 'movd', 'movq', movdq', 'lea', multimedia + //! instructions like 'cvtdq2pd', shuffle instructions like 'pshufb' and + //! SSE/SSE2 mathematic instructions like 'rcp?', 'round?' and 'rsqrt?'. + //! + //! There are some MOV instructions that do only a partial move (for example + //! 'cvtsi2ss'), register allocator has to know the variable size and use + //! the flag accordingly to it. + kInstFlagMove = 0x0004, + + //! Instruction is an exchange like instruction. + //! + //! Exchange instruction typically overwrite first and second operand. So + //! far only the instructions 'xchg' and 'xadd' are considered. + kInstFlagXchg = 0x0008, + + //! Instruction accesses Fp register(s). + kInstFlagFp = 0x0010, + + //! Instruction can be prefixed by using the LOCK prefix. + kInstFlagLock = 0x0020, + + //! Instruction is special, this is for `BaseCompiler`. + kInstFlagSpecial = 0x0040, + + //! Instruction always performs memory access. + //! + //! This flag is always combined with `kInstFlagSpecial` and signalizes + //! that there is an implicit address which is accessed (usually EDI/RDI or + //! ESI/EDI). + kInstFlagSpecialMem = 0x0080, + + //! Instruction memory operand can refer to 16-bit address (used by FPU). + kInstFlagMem2 = 0x0100, + //! Instruction memory operand can refer to 32-bit address (used by FPU). + kInstFlagMem4 = 0x0200, + //! Instruction memory operand can refer to 64-bit address (used by FPU). + kInstFlagMem8 = 0x0400, + //! Instruction memory operand can refer to 80-bit address (used by FPU). + kInstFlagMem10 = 0x0800, + + //! \internal + //! + //! Combination of `kInstFlagMem2` and `kInstFlagMem4`. + kInstFlagMem2_4 = kInstFlagMem2 | kInstFlagMem4, + + //! \internal + //! + //! Combination of `kInstFlagMem2`, `kInstFlagMem4` and `kInstFlagMem8`. + kInstFlagMem2_4_8 = kInstFlagMem2_4 | kInstFlagMem8, + + //! \internal + //! + //! Combination of `kInstFlagMem4` and `kInstFlagMem8`. + kInstFlagMem4_8 = kInstFlagMem4 | kInstFlagMem8, + + //! \internal + //! + //! Combination of `kInstFlagMem4`, `kInstFlagMem8` and `kInstFlagMem10`. + kInstFlagMem4_8_10 = kInstFlagMem4_8 | kInstFlagMem10, + + //! Zeroes the rest of the register if the source operand is memory. + kInstFlagZeroIfMem = 0x1000, + + //! REX.W/VEX.W by default. + kInstFlagW = 0x8000 +}; + +// ============================================================================ +// [asmjit::x86x64::kInstOp] +// ============================================================================ + +//! \internal +//! +//! X86/X64 instruction operand flags. +ASMJIT_ENUM(kInstOp) { + //! Instruction operand can be 8-bit Gpb register. + kInstOpGb = 0x0001, + //! Instruction operand can be 16-bit Gpw register. + kInstOpGw = 0x0002, + //! Instruction operand can be 32-bit Gpd register. + kInstOpGd = 0x0004, + //! Instruction operand can be 64-bit Gpq register. + kInstOpGq = 0x0008, + //! Instruction operand can be Fp register. + kInstOpFp = 0x0010, + //! Instruction operand can be 64-bit Mmx register. + kInstOpMm = 0x0020, + //! Instruction operand can be 128-bit Xmm register. + kInstOpXmm = 0x0100, + //! Instruction operand can be 256-bit Ymm register. + kInstOpYmm = 0x0200, + //! Instruction operand can be 512-bit Zmm register. + kInstOpZmm = 0x0400, + + //! Instruction operand can be memory. + kInstOpMem = 0x2000, + //! Instruction operand can be immediate. + kInstOpImm = 0x4000, + //! Instruction operand can be label. + kInstOpLabel = 0x8000, + + //! \internal + //! + //! Combined flags. + //! + //! \{ + + kInstOpGwb = kInstOpGw | kInstOpGb, + kInstOpGqd = kInstOpGq | kInstOpGd, + kInstOpGqdw = kInstOpGq | kInstOpGd | kInstOpGw, + kInstOpGqdwb = kInstOpGq | kInstOpGd | kInstOpGw | kInstOpGb, + + kInstOpGbMem = kInstOpGb | kInstOpMem, + kInstOpGwMem = kInstOpGw | kInstOpMem, + kInstOpGdMem = kInstOpGd | kInstOpMem, + kInstOpGqMem = kInstOpGq | kInstOpMem, + kInstOpGwbMem = kInstOpGwb | kInstOpMem, + kInstOpGqdMem = kInstOpGqd | kInstOpMem, + kInstOpGqdwMem = kInstOpGqdw | kInstOpMem, + kInstOpGqdwbMem = kInstOpGqdwb | kInstOpMem, + + kInstOpFpMem = kInstOpFp | kInstOpMem, + kInstOpMmMem = kInstOpMm | kInstOpMem, + kInstOpXmmMem = kInstOpXmm | kInstOpMem, + kInstOpYmmMem = kInstOpYmm | kInstOpMem, + + kInstOpMmXmm = kInstOpMm | kInstOpXmm, + kInstOpMmXmmMem = kInstOpMmXmm | kInstOpMem, + + kInstOpXmmYmm = kInstOpXmm | kInstOpYmm, + kInstOpXmmYmmMem = kInstOpXmmYmm | kInstOpMem + + //! \} +}; + +// ============================================================================ +// [asmjit::x86x64::kCond] +// ============================================================================ + +//! X86/X64 Condition codes. +ASMJIT_ENUM(kCond) { + kCondA = 0x07, // CF==0 & ZF==0 (unsigned) + kCondAE = 0x03, // CF==0 (unsigned) + kCondB = 0x02, // CF==1 (unsigned) + kCondBE = 0x06, // CF==1 | ZF==1 (unsigned) + kCondC = 0x02, // CF==1 + kCondE = 0x04, // ZF==1 (signed/unsigned) + kCondG = 0x0F, // ZF==0 & SF==OF (signed) + kCondGE = 0x0D, // SF==OF (signed) + kCondL = 0x0C, // SF!=OF (signed) + kCondLE = 0x0E, // ZF==1 | SF!=OF (signed) + kCondNA = 0x06, // CF==1 | ZF==1 (unsigned) + kCondNAE = 0x02, // CF==1 (unsigned) + kCondNB = 0x03, // CF==0 (unsigned) + kCondNBE = 0x07, // CF==0 & ZF==0 (unsigned) + kCondNC = 0x03, // CF==0 + kCondNE = 0x05, // ZF==0 (signed/unsigned) + kCondNG = 0x0E, // ZF==1 | SF!=OF (signed) + kCondNGE = 0x0C, // SF!=OF (signed) + kCondNL = 0x0D, // SF==OF (signed) + kCondNLE = 0x0F, // ZF==0 & SF==OF (signed) + kCondNO = 0x01, // OF==0 + kCondNP = 0x0B, // PF==0 + kCondNS = 0x09, // SF==0 + kCondNZ = 0x05, // ZF==0 + kCondO = 0x00, // OF==1 + kCondP = 0x0A, // PF==1 + kCondPE = 0x0A, // PF==1 + kCondPO = 0x0B, // PF==0 + kCondS = 0x08, // SF==1 + kCondZ = 0x04, // ZF==1 + + // Simplified condition codes. + kCondOverflow = 0x00, + kCondNotOverflow = 0x01, + kCondBelow = 0x02, //!< Unsigned comparison. + kCondAboveEqual = 0x03, //!< Unsigned comparison. + kCondEqual = 0x04, + kCondNotEqual = 0x05, + kCondBelowEqual = 0x06, //!< Unsigned comparison. + kCondAbove = 0x07, //!< Unsigned comparison. + kCondSign = 0x08, + kCondNotSign = 0x09, + kCondParityEven = 0x0A, + kCondParityOdd = 0x0B, + kCondLess = 0x0C, //!< Signed comparison. + kCondGreaterEqual = 0x0D, //!< Signed comparison. + kCondLessEqual = 0x0E, //!< Signed comparison. + kCondGreater = 0x0F, //!< Signed comparison. + + // Aliases. + kCondZero = 0x04, + kCondNotZero = 0x05, + kCondNegative = 0x08, + kCondPositive = 0x09, + + // Fpu-only. + kCondFpuUnordered = 0x10, + kCondFpuNotUnordered = 0x11, + + //! No condition code. + kCondNone = 0x12 +}; + +// ============================================================================ +// [asmjit::x86x64::kPrefetchHint] +// ============================================================================ + +//! X86/X64 Prefetch hints. +ASMJIT_ENUM(kPrefetchHint) { + //! Prefetch using NT hint. + kPrefetchNta = 0, + //! Prefetch to L0 cache. + kPrefetchT0 = 1, + //! Prefetch to L1 cache. + kPrefetchT1 = 2, + //! Prefetch to L2 cache. + kPrefetchT2 = 3 +}; + +// ============================================================================ +// [asmjit::x86x64::kFPSW] +// ============================================================================ + +//! X86/X64 FPU status Word. +ASMJIT_ENUM(kFPSW) { + kFPSW_Invalid = 0x0001, + kFPSW_Denormalized = 0x0002, + kFPSW_DivByZero = 0x0004, + kFPSW_Overflow = 0x0008, + kFPSW_Underflow = 0x0010, + kFPSW_Precision = 0x0020, + kFPSW_StackFault = 0x0040, + kFPSW_Interrupt = 0x0080, + kFPSW_C0 = 0x0100, + kFPSW_C1 = 0x0200, + kFPSW_C2 = 0x0400, + kFPSW_Top = 0x3800, + kFPSW_C3 = 0x4000, + kFPSW_Busy = 0x8000 +}; + +// ============================================================================ +// [asmjit::x86x64::kFPCW] +// ============================================================================ + +//! X86/X64 FPU control Word. +ASMJIT_ENUM(kFPCW) { + kFPCW_EM_Mask = 0x003F, // Bits 0-5. + kFPCW_EM_Invalid = 0x0001, + kFPCW_EM_Denormal = 0x0002, + kFPCW_EM_DivByZero = 0x0004, + kFPCW_EM_Overflow = 0x0008, + kFPCW_EM_Underflow = 0x0010, + kFPCW_EM_Inexact = 0x0020, + + kFPCW_PC_Mask = 0x0300, // Bits 8-9. + kFPCW_PC_Float = 0x0000, + kFPCW_PC_Reserved = 0x0100, + kFPCW_PC_Double = 0x0200, + kFPCW_PC_Extended = 0x0300, + + kFPCW_RC_Mask = 0x0C00, // Bits 10-11. + kFPCW_RC_Nearest = 0x0000, + kFPCW_RC_Down = 0x0400, + kFPCW_RC_Up = 0x0800, + kFPCW_RC_Truncate = 0x0C00, + + kFPCW_IC_Mask = 0x1000, // Bit 12. + kFPCW_IC_Projective = 0x0000, + kFPCW_IC_Affine = 0x1000 +}; + +// ============================================================================ +// [asmjit::x86x64::InstInfo] +// ============================================================================ + +//! \internal +//! +//! X86/X64 instruction information. +struct InstInfo { + // -------------------------------------------------------------------------- + // [Accessors] + // -------------------------------------------------------------------------- + + //! Get instruction name string (null terminated). + ASMJIT_INLINE const char* getName() const { + return _instName + static_cast(_nameIndex); + } + + //! Get instruction name index to `_instName` array. + ASMJIT_INLINE uint32_t _getNameIndex() const { + return _nameIndex; + } + + //! Get instruction group, see `kInstGroup`. + ASMJIT_INLINE uint32_t getGroup() const { + return _group; + } + + //! Get size of move instruction in bytes. + //! + //! If zero, the size of MOV instruction is determined by the size of the + //! destination register (applies mostly for x86 arithmetic). This value is + //! useful for register allocator when determining if a variable is going to + //! be overwritten or not. Basically if the move size is equal or greater + //! than a variable itself it is considered overwritten. + ASMJIT_INLINE uint32_t getMoveSize() const { + return _moveSize; + } + + //! Get instruction flags, see `kInstFlags`. + ASMJIT_INLINE uint32_t getFlags() const { + return _flags; + } + + //! Get whether the instruction is a control-flow intruction. + //! + //! Control flow instruction is instruction that modifies instruction pointer, + //! typically jmp, jcc, call, or ret. + ASMJIT_INLINE bool isFlow() const { + return (_flags & kInstFlagFlow) != 0; + } + + //! Get whether the instruction is a compare/test like intruction. + ASMJIT_INLINE bool isTest() const { + return (_flags & kInstFlagTest) != 0; + } + + //! Get whether the instruction is a typical move instruction. + //! + //! Move instructions overwrite the first operand or at least part of it, + //! This is a very useful hint that is used by variable liveness analysis + //! and `BaseCompiler` in general to know which variable is completely + //! overwritten. + //! + //! All AVX/XOP instructions that have 3 or more operands are considered to + //! have move semantics move by default. + ASMJIT_INLINE bool isMove() const { + return (_flags & kInstFlagMove) != 0; + } + + //! Get whether the instruction is a typical Exchange instruction. + //! + //! Exchange instructios are 'xchg' and 'xadd'. + ASMJIT_INLINE bool isXchg() const { + return (_flags & kInstFlagXchg) != 0; + } + + //! Get whether the instruction accesses Fp register(s). + ASMJIT_INLINE bool isFp() const { + return (_flags & kInstFlagFp) != 0; + } + + //! Get whether the instruction can be prefixed by LOCK prefix. + ASMJIT_INLINE bool isLockable() const { + return (_flags & kInstFlagLock) != 0; + } + + //! Get whether the instruction is special type (this is used by + //! `BaseCompiler` to manage additional variables or functionality). + ASMJIT_INLINE bool isSpecial() const { + return (_flags & kInstFlagSpecial) != 0; + } + + //! Get whether the instruction is special type and it performs + //! memory access. + ASMJIT_INLINE bool isSpecialMem() const { + return (_flags & kInstFlagSpecialMem) != 0; + } + + //! Get whether the move instruction zeroes the rest of the register + //! if the source is memory operand. + //! + //! Basically flag needed only to support `movsd` and `movss` instructions. + ASMJIT_INLINE bool isZeroIfMem() const { + return (_flags & kInstFlagZeroIfMem) != 0; + } + + // -------------------------------------------------------------------------- + // [Members] + // -------------------------------------------------------------------------- + + //! Instruction name index in _instName[] array. + uint16_t _nameIndex; + //! Instruction flags. + uint16_t _flags; + //! Instruction group, used by `BaseAssembler`. + uint8_t _group; + //! Count of bytes overwritten by a move instruction. + //! + //! Only used with `kInstFlagMove` flag. If this value is zero move depends + //! on the destination register size. + uint8_t _moveSize; + //! Reserved for future use. + uint8_t _reserved[2]; + //! Operands' flags. + uint16_t _opFlags[4]; + //! Primary and secondary opcodes. + uint32_t _opCode[2]; +}; + +//! \} + +} // x64 namespace +} // asmjit namespace + +#undef _OP_ID + +// [Api-End] +#include "../apiend.h" + +// [Guard] +#endif // _ASMJIT_X86_X86INST_H diff --git a/src/asmjit/x86/x86operand.cpp b/src/asmjit/x86/x86operand.cpp new file mode 100644 index 0000000..21f11f2 --- /dev/null +++ b/src/asmjit/x86/x86operand.cpp @@ -0,0 +1,338 @@ +// [AsmJit] +// Complete x86/x64 JIT and Remote Assembler for C++. +// +// [License] +// Zlib - See LICENSE.md file in the package. + +// [Export] +#define ASMJIT_EXPORTS + +// [Guard] +#include "../build.h" +#if defined(ASMJIT_BUILD_X86) || defined(ASMJIT_BUILD_X64) + +// [Dependencies - AsmJit] +#include "../x86/x86operand.h" + +// [Api-Begin] +#include "../apibegin.h" + +namespace asmjit { +namespace x86x64 { + +// ============================================================================ +// [asmjit::x86x64::Variables] +// ============================================================================ + +#define C(_Class_) kRegClass##_Class_ +#define D(_Desc_) kVarDesc##_Desc_ + +const VarInfo _varInfo[] = { + /* 00: kVarTypeInt8 */ { kRegTypeGpbLo, 1 , C(Gp) , 0 , "gpb" }, + /* 01: kVarTypeUInt8 */ { kRegTypeGpbLo, 1 , C(Gp) , 0 , "gpb" }, + /* 02: kVarTypeInt16 */ { kRegTypeGpw , 2 , C(Gp) , 0 , "gpw" }, + /* 03: kVarTypeUInt16 */ { kRegTypeGpw , 2 , C(Gp) , 0 , "gpw" }, + /* 04: kVarTypeInt32 */ { kRegTypeGpd , 4 , C(Gp) , 0 , "gpd" }, + /* 05: kVarTypeUInt32 */ { kRegTypeGpd , 4 , C(Gp) , 0 , "gpd" }, + /* 06: kVarTypeInt64 */ { kRegTypeGpq , 8 , C(Gp) , 0 , "gpq" }, + /* 07: kVarTypeUInt64 */ { kRegTypeGpq , 8 , C(Gp) , 0 , "gpq" }, + /* 08: kVarTypeIntPtr */ { 0 , 0 , C(Gp) , 0 , "" }, // Remapped. + /* 09: kVarTypeUIntPtr */ { 0 , 0 , C(Gp) , 0 , "" }, // Remapped. + /* 10: kVarTypeFp32 */ { kRegTypeFp , 4 , C(Fp) , D(Sp) , "fp" }, + /* 11: kVarTypeFp64 */ { kRegTypeFp , 8 , C(Fp) , D(Dp) , "fp" }, + /* 12: kVarTypeMm */ { kRegTypeMm , 8 , C(Mm) , 0 , "mm" }, + /* 13: kVarTypeXmm */ { kRegTypeXmm , 16, C(Xyz), 0 , "xmm" }, + /* 14: kVarTypeXmmSs */ { kRegTypeXmm , 4 , C(Xyz), D(Sp) , "xmm" }, + /* 15: kVarTypeXmmPs */ { kRegTypeXmm , 16, C(Xyz), D(Sp) | D(Packed), "xmm" }, + /* 16: kVarTypeXmmSd */ { kRegTypeXmm , 8 , C(Xyz), D(Dp) , "xmm" }, + /* 17: kVarTypeXmmPd */ { kRegTypeXmm , 16, C(Xyz), D(Dp) | D(Packed), "xmm" }, + /* 18: kVarTypeYmm */ { kRegTypeYmm , 32, C(Xyz), 0 , "ymm" }, + /* 19: kVarTypeYmmPs */ { kRegTypeYmm , 32, C(Xyz), D(Sp) | D(Packed), "ymm" }, + /* 20: kVarTypeYmmPd */ { kRegTypeYmm , 32, C(Xyz), D(Dp) | D(Packed), "ymm" } +}; + +#undef D +#undef C + +// ============================================================================ +// [asmjit::x86x64::Registers] +// ============================================================================ + +const GpReg noGpReg(kInvalidReg, kInvalidReg, 0); + +const GpReg al(kRegTypeGpbLo, kRegIndexAx, 1); +const GpReg cl(kRegTypeGpbLo, kRegIndexCx, 1); +const GpReg dl(kRegTypeGpbLo, kRegIndexDx, 1); +const GpReg bl(kRegTypeGpbLo, kRegIndexBx, 1); +const GpReg spl(kRegTypeGpbLo, kRegIndexSp, 1); +const GpReg bpl(kRegTypeGpbLo, kRegIndexBp, 1); +const GpReg sil(kRegTypeGpbLo, kRegIndexSi, 1); +const GpReg dil(kRegTypeGpbLo, kRegIndexDi, 1); +const GpReg r8b(kRegTypeGpbLo, 8, 1); +const GpReg r9b(kRegTypeGpbLo, 9, 1); +const GpReg r10b(kRegTypeGpbLo, 10, 1); +const GpReg r11b(kRegTypeGpbLo, 11, 1); +const GpReg r12b(kRegTypeGpbLo, 12, 1); +const GpReg r13b(kRegTypeGpbLo, 13, 1); +const GpReg r14b(kRegTypeGpbLo, 14, 1); +const GpReg r15b(kRegTypeGpbLo, 15, 1); + +const GpReg ah(kRegTypeGpbHi, kRegIndexAx, 1); +const GpReg ch(kRegTypeGpbHi, kRegIndexCx, 1); +const GpReg dh(kRegTypeGpbHi, kRegIndexDx, 1); +const GpReg bh(kRegTypeGpbHi, kRegIndexBx, 1); + +const GpReg ax(kRegTypeGpw, kRegIndexAx, 2); +const GpReg cx(kRegTypeGpw, kRegIndexCx, 2); +const GpReg dx(kRegTypeGpw, kRegIndexDx, 2); +const GpReg bx(kRegTypeGpw, kRegIndexBx, 2); +const GpReg sp(kRegTypeGpw, kRegIndexSp, 2); +const GpReg bp(kRegTypeGpw, kRegIndexBp, 2); +const GpReg si(kRegTypeGpw, kRegIndexSi, 2); +const GpReg di(kRegTypeGpw, kRegIndexDi, 2); +const GpReg r8w(kRegTypeGpw, 8, 2); +const GpReg r9w(kRegTypeGpw, 9, 2); +const GpReg r10w(kRegTypeGpw, 10, 2); +const GpReg r11w(kRegTypeGpw, 11, 2); +const GpReg r12w(kRegTypeGpw, 12, 2); +const GpReg r13w(kRegTypeGpw, 13, 2); +const GpReg r14w(kRegTypeGpw, 14, 2); +const GpReg r15w(kRegTypeGpw, 15, 2); + +const GpReg eax(kRegTypeGpd, kRegIndexAx, 4); +const GpReg ecx(kRegTypeGpd, kRegIndexCx, 4); +const GpReg edx(kRegTypeGpd, kRegIndexDx, 4); +const GpReg ebx(kRegTypeGpd, kRegIndexBx, 4); +const GpReg esp(kRegTypeGpd, kRegIndexSp, 4); +const GpReg ebp(kRegTypeGpd, kRegIndexBp, 4); +const GpReg esi(kRegTypeGpd, kRegIndexSi, 4); +const GpReg edi(kRegTypeGpd, kRegIndexDi, 4); +const GpReg r8d(kRegTypeGpd, 8, 4); +const GpReg r9d(kRegTypeGpd, 9, 4); +const GpReg r10d(kRegTypeGpd, 10, 4); +const GpReg r11d(kRegTypeGpd, 11, 4); +const GpReg r12d(kRegTypeGpd, 12, 4); +const GpReg r13d(kRegTypeGpd, 13, 4); +const GpReg r14d(kRegTypeGpd, 14, 4); +const GpReg r15d(kRegTypeGpd, 15, 4); + +const GpReg rax(kRegTypeGpq, kRegIndexAx, 8); +const GpReg rcx(kRegTypeGpq, kRegIndexCx, 8); +const GpReg rdx(kRegTypeGpq, kRegIndexDx, 8); +const GpReg rbx(kRegTypeGpq, kRegIndexBx, 8); +const GpReg rsp(kRegTypeGpq, kRegIndexSp, 8); +const GpReg rbp(kRegTypeGpq, kRegIndexBp, 8); +const GpReg rsi(kRegTypeGpq, kRegIndexSi, 8); +const GpReg rdi(kRegTypeGpq, kRegIndexDi, 8); +const GpReg r8(kRegTypeGpq, 8, 8); +const GpReg r9(kRegTypeGpq, 9, 8); +const GpReg r10(kRegTypeGpq, 10, 8); +const GpReg r11(kRegTypeGpq, 11, 8); +const GpReg r12(kRegTypeGpq, 12, 8); +const GpReg r13(kRegTypeGpq, 13, 8); +const GpReg r14(kRegTypeGpq, 14, 8); +const GpReg r15(kRegTypeGpq, 15, 8); + +const FpReg fp0(kRegTypeFp, 0, 10); +const FpReg fp1(kRegTypeFp, 1, 10); +const FpReg fp2(kRegTypeFp, 2, 10); +const FpReg fp3(kRegTypeFp, 3, 10); +const FpReg fp4(kRegTypeFp, 4, 10); +const FpReg fp5(kRegTypeFp, 5, 10); +const FpReg fp6(kRegTypeFp, 6, 10); +const FpReg fp7(kRegTypeFp, 7, 10); + +const MmReg mm0(kRegTypeMm, 0, 8); +const MmReg mm1(kRegTypeMm, 1, 8); +const MmReg mm2(kRegTypeMm, 2, 8); +const MmReg mm3(kRegTypeMm, 3, 8); +const MmReg mm4(kRegTypeMm, 4, 8); +const MmReg mm5(kRegTypeMm, 5, 8); +const MmReg mm6(kRegTypeMm, 6, 8); +const MmReg mm7(kRegTypeMm, 7, 8); + +const XmmReg xmm0(kRegTypeXmm, 0, 16); +const XmmReg xmm1(kRegTypeXmm, 1, 16); +const XmmReg xmm2(kRegTypeXmm, 2, 16); +const XmmReg xmm3(kRegTypeXmm, 3, 16); +const XmmReg xmm4(kRegTypeXmm, 4, 16); +const XmmReg xmm5(kRegTypeXmm, 5, 16); +const XmmReg xmm6(kRegTypeXmm, 6, 16); +const XmmReg xmm7(kRegTypeXmm, 7, 16); +const XmmReg xmm8(kRegTypeXmm, 8, 16); +const XmmReg xmm9(kRegTypeXmm, 9, 16); +const XmmReg xmm10(kRegTypeXmm, 10, 16); +const XmmReg xmm11(kRegTypeXmm, 11, 16); +const XmmReg xmm12(kRegTypeXmm, 12, 16); +const XmmReg xmm13(kRegTypeXmm, 13, 16); +const XmmReg xmm14(kRegTypeXmm, 14, 16); +const XmmReg xmm15(kRegTypeXmm, 15, 16); + +const YmmReg ymm0(kRegTypeYmm, 0, 32); +const YmmReg ymm1(kRegTypeYmm, 1, 32); +const YmmReg ymm2(kRegTypeYmm, 2, 32); +const YmmReg ymm3(kRegTypeYmm, 3, 32); +const YmmReg ymm4(kRegTypeYmm, 4, 32); +const YmmReg ymm5(kRegTypeYmm, 5, 32); +const YmmReg ymm6(kRegTypeYmm, 6, 32); +const YmmReg ymm7(kRegTypeYmm, 7, 32); +const YmmReg ymm8(kRegTypeYmm, 8, 32); +const YmmReg ymm9(kRegTypeYmm, 9, 32); +const YmmReg ymm10(kRegTypeYmm, 10, 32); +const YmmReg ymm11(kRegTypeYmm, 11, 32); +const YmmReg ymm12(kRegTypeYmm, 12, 32); +const YmmReg ymm13(kRegTypeYmm, 13, 32); +const YmmReg ymm14(kRegTypeYmm, 14, 32); +const YmmReg ymm15(kRegTypeYmm, 15, 32); + +const SegReg cs(kRegTypeSeg, kSegCs, 2); +const SegReg ss(kRegTypeSeg, kSegSs, 2); +const SegReg ds(kRegTypeSeg, kSegDs, 2); +const SegReg es(kRegTypeSeg, kSegEs, 2); +const SegReg fs(kRegTypeSeg, kSegFs, 2); +const SegReg gs(kRegTypeSeg, kSegGs, 2); + +// ============================================================================ +// [asmjit::Mem - abs[]] +// ============================================================================ + +Mem ptr_abs(Ptr pAbs, int32_t disp, uint32_t size) { + Mem m(NoInit); + + m._init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeAbsolute, 0, kInvalidValue); + m._vmem.index = kInvalidValue; + m._vmem.displacement = static_cast((intptr_t)(pAbs + disp)); + + return m; +} + +Mem ptr_abs(Ptr pAbs, const X86Reg& index, uint32_t shift, int32_t disp, uint32_t size) { + Mem m(NoInit); + uint32_t flags = shift << kMemShiftIndex; + + if (index.isGp()) flags |= Mem::_getGpdFlags(reinterpret_cast(index)); + if (index.isXmm()) flags |= kMemVSibXmm << kMemVSibIndex; + if (index.isYmm()) flags |= kMemVSibYmm << kMemVSibIndex; + + m._init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeAbsolute, flags, kInvalidValue); + m._vmem.index = index.getRegIndex(); + m._vmem.displacement = static_cast((intptr_t)(pAbs + disp)); + + return m; +} + +Mem ptr_abs(Ptr pAbs, const X86Var& index, uint32_t shift, int32_t disp, uint32_t size) { + Mem m(NoInit); + uint32_t flags = shift << kMemShiftIndex; + + if (index.isGp()) flags |= Mem::_getGpdFlags(reinterpret_cast(index)); + if (index.isXmm()) flags |= kMemVSibXmm << kMemVSibIndex; + if (index.isYmm()) flags |= kMemVSibYmm << kMemVSibIndex; + + m._init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeAbsolute, flags, kInvalidValue); + m._vmem.index = index.getId(); + m._vmem.displacement = static_cast((intptr_t)(pAbs + disp)); + + return m; +} + +} // x86x64 namespace +} // asmjit namespace + +// ============================================================================ +// [asmjit::x86] +// ============================================================================ + +#if defined(ASMJIT_BUILD_X86) + +namespace asmjit { +namespace x86 { + +const uint8_t _varMapping[kVarTypeCount] = { + /* 00: kVarTypeInt8 */ kVarTypeInt8, + /* 01: kVarTypeUInt8 */ kVarTypeUInt8, + /* 02: kVarTypeInt16 */ kVarTypeInt16, + /* 03: kVarTypeUInt16 */ kVarTypeUInt16, + /* 04: kVarTypeInt32 */ kVarTypeInt32, + /* 05: kVarTypeUInt32 */ kVarTypeUInt32, + /* 06: kVarTypeInt64 */ kVarTypeInvalid, // Invalid in 32-bit mode. + /* 07: kVarTypeUInt64 */ kVarTypeInvalid, // Invalid in 32-bit mode. + /* 08: kVarTypeIntPtr */ kVarTypeInt32, // Remapped. + /* 09: kVarTypeUIntPtr */ kVarTypeUInt32, // Remapped. + /* 10: kVarTypeFp32 */ kVarTypeFp32, + /* 11: kVarTypeFp64 */ kVarTypeFp64, + /* 12: kVarTypeMm */ kVarTypeMm, + /* 13: kVarTypeXmm */ kVarTypeXmm, + /* 14: kVarTypeXmmSs */ kVarTypeXmmSs, + /* 15: kVarTypeXmmPs */ kVarTypeXmmPs, + /* 16: kVarTypeXmmSd */ kVarTypeXmmSd, + /* 17: kVarTypeXmmPd */ kVarTypeXmmPd, + /* 18: kVarTypeYmm */ kVarTypeYmm, + /* 19: kVarTypeYmmPs */ kVarTypeYmmPs, + /* 20: kVarTypeYmmPd */ kVarTypeYmmPd +}; + +const GpReg zax(kRegTypeGpd, kRegIndexAx, 4); +const GpReg zcx(kRegTypeGpd, kRegIndexCx, 4); +const GpReg zdx(kRegTypeGpd, kRegIndexDx, 4); +const GpReg zbx(kRegTypeGpd, kRegIndexBx, 4); +const GpReg zsp(kRegTypeGpd, kRegIndexSp, 4); +const GpReg zbp(kRegTypeGpd, kRegIndexBp, 4); +const GpReg zsi(kRegTypeGpd, kRegIndexSi, 4); +const GpReg zdi(kRegTypeGpd, kRegIndexDi, 4); + +} // x86 namespace +} // asmjit namespace + +#endif // ASMJIT_BUILD_X86 + +// ============================================================================ +// [asmjit::x64] +// ============================================================================ + +#if defined(ASMJIT_BUILD_X64) +namespace asmjit { +namespace x64 { + +const uint8_t _varMapping[kVarTypeCount] = { + /* 00: kVarTypeInt8 */ kVarTypeInt8, + /* 01: kVarTypeUInt8 */ kVarTypeUInt8, + /* 02: kVarTypeInt16 */ kVarTypeInt16, + /* 03: kVarTypeUInt16 */ kVarTypeUInt16, + /* 04: kVarTypeInt32 */ kVarTypeInt32, + /* 05: kVarTypeUInt32 */ kVarTypeUInt32, + /* 06: kVarTypeInt64 */ kVarTypeInt64, + /* 07: kVarTypeUInt64 */ kVarTypeUInt64, + /* 08: kVarTypeIntPtr */ kVarTypeInt64, // Remapped. + /* 09: kVarTypeUIntPtr */ kVarTypeUInt64, // Remapped. + /* 10: kVarTypeFp32 */ kVarTypeFp32, + /* 11: kVarTypeFp64 */ kVarTypeFp64, + /* 12: kVarTypeMm */ kVarTypeMm, + /* 13: kVarTypeXmm */ kVarTypeXmm, + /* 14: kVarTypeXmmSs */ kVarTypeXmmSs, + /* 15: kVarTypeXmmPs */ kVarTypeXmmPs, + /* 16: kVarTypeXmmSd */ kVarTypeXmmSd, + /* 17: kVarTypeXmmPd */ kVarTypeXmmPd, + /* 18: kVarTypeYmm */ kVarTypeYmm, + /* 19: kVarTypeYmmPs */ kVarTypeYmmPs, + /* 20: kVarTypeYmmPd */ kVarTypeYmmPd +}; + +const GpReg zax(kRegTypeGpq, kRegIndexAx, 8); +const GpReg zcx(kRegTypeGpq, kRegIndexCx, 8); +const GpReg zdx(kRegTypeGpq, kRegIndexDx, 8); +const GpReg zbx(kRegTypeGpq, kRegIndexBx, 8); +const GpReg zsp(kRegTypeGpq, kRegIndexSp, 8); +const GpReg zbp(kRegTypeGpq, kRegIndexBp, 8); +const GpReg zsi(kRegTypeGpq, kRegIndexSi, 8); +const GpReg zdi(kRegTypeGpq, kRegIndexDi, 8); + +} // x64 namespace +} // asmjit namespace + +#endif // ASMJIT_BUILD_X64 + +#include "../apiend.h" + +// [Guard] +#endif // ASMJIT_BUILD_X86 || ASMJIT_BUILD_X64 diff --git a/src/asmjit/x86/x86operand.h b/src/asmjit/x86/x86operand.h new file mode 100644 index 0000000..8a54efe --- /dev/null +++ b/src/asmjit/x86/x86operand.h @@ -0,0 +1,1988 @@ +// [AsmJit] +// Complete x86/x64 JIT and Remote Assembler for C++. +// +// [License] +// Zlib - See LICENSE.md file in the package. + +// [Guard] +#ifndef _ASMJIT_X86_X86OPERAND_H +#define _ASMJIT_X86_X86OPERAND_H + +// [Dependencies - AsmJit] +#include "../base/assembler.h" +#include "../base/compiler.h" +#include "../base/globals.h" +#include "../base/intutil.h" +#include "../base/operand.h" +#include "../base/vectypes.h" + +// [Api-Begin] +#include "../apibegin.h" + +namespace asmjit { +namespace x86x64 { + +// ============================================================================ +// [Forward Declarations] +// ============================================================================ + +struct VarInfo; + +struct X86Reg; +struct X86Var; + +struct GpReg; +struct GpVar; + +struct MmReg; +struct MmVar; + +struct XmmReg; +struct XmmVar; + +struct YmmReg; +struct YmmVar; + +#define _OP_ID(_Op_) reinterpret_cast(_Op_).getId() + +// ============================================================================ +// [asmjit::x86x64::Typedefs] +// ============================================================================ + +//! \addtogroup asmjit_x86x64_general +//! \{ + +typedef Vec64Data MmData; +typedef Vec128Data XmmData; +typedef Vec256Data YmmData; + +// ============================================================================ +// [asmjit::x86x64::Variables] +// ============================================================================ + +//! \internal +ASMJIT_VAR const VarInfo _varInfo[]; + +// ============================================================================ +// [asmjit::x86x64::kRegClass] +// ============================================================================ + +//! X86/X64 variable class. +ASMJIT_ENUM(kRegClass) { + // kRegClassGp defined earlier. + + //! X86/X64 Fp register class. + kRegClassFp = 1, + //! X86/X64 Mm register class. + kRegClassMm = 2, + //! X86/X64 Xmm/Ymm/Zmm register class. + kRegClassXyz = 3, + + //! Count of X86/X64 register classes. + kRegClassCount = 4 +}; + +// ============================================================================ +// [asmjit::x86x64::kRegCount] +// ============================================================================ + +//! X86/X64 registers count. +ASMJIT_ENUM(kRegCount) { + //! Count of Fp registers (8). + kRegCountFp = 8, + //! Count of Mm registers (8). + kRegCountMm = 8, + //! Count of segment registers (6). + kRegCountSeg = 6 +}; + +// ============================================================================ +// [asmjit::x86x64::kRegType] +// ============================================================================ + +//! X86/X64 register type. +ASMJIT_ENUM(kRegType) { + //! Gpb-lo register (AL, BL, CL, DL, ...). + kRegTypeGpbLo = 0x01, + //! Gpb-hi register (AH, BH, CH, DH only). + kRegTypeGpbHi = 0x02, + + //! \internal + //! + //! Gpb-hi register patched to native index (4-7). + kRegTypePatchedGpbHi = kRegTypeGpbLo | kRegTypeGpbHi, + + //! Gpw register. + kRegTypeGpw = 0x10, + //! Gpd register. + kRegTypeGpd = 0x20, + //! Gpq register. + kRegTypeGpq = 0x30, + + //! Fp register. + kRegTypeFp = 0x50, + //! Mm register. + kRegTypeMm = 0x60, + + //! Xmm register. + kRegTypeXmm = 0x70, + //! Ymm register. + kRegTypeYmm = 0x80, + //! Zmm register. + kRegTypeZmm = 0x90, + + //! Segment register. + kRegTypeSeg = 0xF0 +}; + +// ============================================================================ +// [asmjit::x86x64::kRegIndex] +// ============================================================================ + +//! X86/X64 register indexes. +//! +//! \note Register indexes have been reduced to only support general purpose +//! registers. There is no need to have enumerations with number suffix that +//! expands to the exactly same value as the suffix value itself. +ASMJIT_ENUM(kRegIndex) { + //! Index of Al/Ah/Ax/Eax/Rax registers. + kRegIndexAx = 0, + //! Index of Cl/Ch/Cx/Ecx/Rcx registers. + kRegIndexCx = 1, + //! Index of Dl/Dh/Dx/Edx/Rdx registers. + kRegIndexDx = 2, + //! Index of Bl/Bh/Bx/Ebx/Rbx registers. + kRegIndexBx = 3, + //! Index of Spl/Sp/Esp/Rsp registers. + kRegIndexSp = 4, + //! Index of Bpl/Bp/Ebp/Rbp registers. + kRegIndexBp = 5, + //! Index of Sil/Si/Esi/Rsi registers. + kRegIndexSi = 6, + //! Index of Dil/Di/Edi/Rdi registers. + kRegIndexDi = 7, + //! Index of R8b/R8w/R8d/R8 registers (64-bit only). + kRegIndexR8 = 8, + //! Index of R9B/R9w/R9d/R9 registers (64-bit only). + kRegIndexR9 = 9, + //! Index of R10B/R10w/R10D/R10 registers (64-bit only). + kRegIndexR10 = 10, + //! Index of R11B/R11w/R11d/R11 registers (64-bit only). + kRegIndexR11 = 11, + //! Index of R12B/R12w/R12d/R12 registers (64-bit only). + kRegIndexR12 = 12, + //! Index of R13B/R13w/R13d/R13 registers (64-bit only). + kRegIndexR13 = 13, + //! Index of R14B/R14w/R14d/R14 registers (64-bit only). + kRegIndexR14 = 14, + //! Index of R15B/R15w/R15d/R15 registers (64-bit only). + kRegIndexR15 = 15 +}; + +// ============================================================================ +// [asmjit::x86x64::kSeg] +// ============================================================================ + +//! X86/X64 segment codes. +ASMJIT_ENUM(kSeg) { + //! No segment. + kSegDefault = 0, + //! Es segment. + kSegEs = 1, + //! Cs segment. + kSegCs = 2, + //! Ss segment. + kSegSs = 3, + //! Ds segment. + kSegDs = 4, + //! Fs segment. + kSegFs = 5, + //! Gs segment. + kSegGs = 6 +}; + +// ============================================================================ +// [asmjit::x86x64::kMemVSib] +// ============================================================================ + +//! X86/X64 index register legacy and AVX2 (VSIB) support. +ASMJIT_ENUM(kMemVSib) { + //! Memory operand uses Gp or no index register. + kMemVSibGpz = 0, + //! Memory operand uses Xmm or no index register. + kMemVSibXmm = 1, + //! Memory operand uses Ymm or no index register. + kMemVSibYmm = 2 +}; + +// ============================================================================ +// [asmjit::x86x64::kMemFlags] +// ============================================================================ + +//! \internal +//! +//! X86/X64 specific memory flags. +ASMJIT_ENUM(kMemFlags) { + kMemSegBits = 0x7, + kMemSegIndex = 0, + kMemSegMask = kMemSegBits << kMemSegIndex, + + kMemGpdBits = 0x1, + kMemGpdIndex = 3, + kMemGpdMask = kMemGpdBits << kMemGpdIndex, + + kMemVSibBits = 0x3, + kMemVSibIndex = 4, + kMemVSibMask = kMemVSibBits << kMemVSibIndex, + + kMemShiftBits = 0x3, + kMemShiftIndex = 6, + kMemShiftMask = kMemShiftBits << kMemShiftIndex +}; + +// ============================================================================ +// [asmjit::x86x64::kVarType] +// ============================================================================ + +//! X86/X64 variable type. +ASMJIT_ENUM(kVarType) { + //! Variable is Mm (MMX). + kVarTypeMm = 12, + + //! Variable is Xmm (SSE+). + kVarTypeXmm, + //! Variable is scalar Xmm SP-FP number. + kVarTypeXmmSs, + //! Variable is packed Xmm SP-FP number (4 floats). + kVarTypeXmmPs, + //! Variable is scalar Xmm DP-FP number. + kVarTypeXmmSd, + //! Variable is packed Xmm DP-FP number (2 doubles). + kVarTypeXmmPd, + + //! Variable is Ymm (AVX+). + kVarTypeYmm, + //! Variable is packed Ymm SP-FP number (8 floats). + kVarTypeYmmPs, + //! Variable is packed Ymm DP-FP number (4 doubles). + kVarTypeYmmPd, + + //! Count of variable types. + kVarTypeCount, + + //! \internal + //! \{ + _kVarTypeMmStart = kVarTypeMm, + _kVarTypeMmEnd = kVarTypeMm, + + _kVarTypeXmmStart = kVarTypeXmm, + _kVarTypeXmmEnd = kVarTypeXmmPd, + + _kVarTypeYmmStart = kVarTypeYmm, + _kVarTypeYmmEnd = kVarTypeYmmPd + //! \} +}; + +// ============================================================================ +// [asmjit::x86x64::kVarDesc] +// ============================================================================ + +//! \internal +//! +//! X86/X64 variable description. +ASMJIT_ENUM(kVarDesc) { + //! Variable contains single-precision floating-point(s). + kVarDescSp = 0x10, + //! Variable contains double-precision floating-point(s). + kVarDescDp = 0x20, + //! Variable is packed (for example float4x, double2x, ...). + kVarDescPacked = 0x40 +}; + +//! \} + +// ============================================================================ +// [asmjit::x86x64::VarInfo] +// ============================================================================ + +//! \addtogroup asmjit_x86x64_util +//! \{ + +//! \internal +//! +//! X86 variable information. +struct VarInfo { + // -------------------------------------------------------------------------- + // [Accessors] + // -------------------------------------------------------------------------- + + //! Get register type, see `kRegType`. + ASMJIT_INLINE uint32_t getReg() const { return _reg; } + //! Get register size in bytes. + ASMJIT_INLINE uint32_t getSize() const { return _size; } + //! Get variable class, see `kRegClass`. + ASMJIT_INLINE uint32_t getClass() const { return _class; } + //! Get variable description, see `kVarDesc`. + ASMJIT_INLINE uint32_t getDesc() const { return _desc; } + //! Get variable type name. + ASMJIT_INLINE const char* getName() const { return _name; } + + // -------------------------------------------------------------------------- + // [Members] + // -------------------------------------------------------------------------- + + //! Register type, see `kRegType`. + uint8_t _reg; + //! Register size in bytes. + uint8_t _size; + //! Register class, see `kRegClass`. + uint8_t _class; + //! Variable flags, see `kVarDesc`. + uint8_t _desc; + //! Variable type name. + char _name[4]; +}; + +// ============================================================================ +// [asmjit::x86x64::X86Reg] +// ============================================================================ + +//! X86/X64 register. +struct X86Reg : public BaseReg { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a dummy X86 register. + ASMJIT_INLINE X86Reg() : BaseReg() {} + //! Create a custom X86 register. + ASMJIT_INLINE X86Reg(uint32_t type, uint32_t index, uint32_t size) : BaseReg(type, index, size) {} + //! Create a reference to `other` X86 register. + ASMJIT_INLINE X86Reg(const X86Reg& other) : BaseReg(other) {} + //! Create non-initialized X86 register. + explicit ASMJIT_INLINE X86Reg(const _NoInit&) : BaseReg(NoInit) {} + + // -------------------------------------------------------------------------- + // [X86Reg Specific] + // -------------------------------------------------------------------------- + + ASMJIT_REG_OP(X86Reg) + + //! Get whether the register is Gp register. + ASMJIT_INLINE bool isGp() const { return _vreg.type <= kRegTypeGpq; } + //! Get whether the register is Gp byte (8-bit) register. + ASMJIT_INLINE bool isGpb() const { return _vreg.type <= kRegTypeGpbHi; } + //! Get whether the register is Gp lo-byte (8-bit) register. + ASMJIT_INLINE bool isGpbLo() const { return _vreg.type == kRegTypeGpbLo; } + //! Get whether the register is Gp hi-byte (8-bit) register. + ASMJIT_INLINE bool isGpbHi() const { return _vreg.type == kRegTypeGpbHi; } + //! Get whether the register is Gp word (16-bit) register. + ASMJIT_INLINE bool isGpw() const { return _vreg.type == kRegTypeGpw; } + //! Get whether the register is Gp dword (32-bit) register. + ASMJIT_INLINE bool isGpd() const { return _vreg.type == kRegTypeGpd; } + //! Get whether the register is Gp qword (64-bit) register. + ASMJIT_INLINE bool isGpq() const { return _vreg.type == kRegTypeGpq; } + + //! Get whether the register is Fp register. + ASMJIT_INLINE bool isFp() const { return _vreg.type == kRegTypeFp; } + //! Get whether the register is Mm (64-bit) register. + ASMJIT_INLINE bool isMm() const { return _vreg.type == kRegTypeMm; } + //! Get whether the register is Xmm (128-bit) register. + ASMJIT_INLINE bool isXmm() const { return _vreg.type == kRegTypeXmm; } + //! Get whether the register is Ymm (256-bit) register. + ASMJIT_INLINE bool isYmm() const { return _vreg.type == kRegTypeYmm; } + + //! Get whether the register is a segment. + ASMJIT_INLINE bool isSeg() const { return _vreg.type == kRegTypeSeg; } +}; + +// ============================================================================ +// [asmjit::x86x64::GpReg] +// ============================================================================ + +//! X86/X64 Gpb/Gpw/Gpd/Gpq register. +struct GpReg : public X86Reg { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a dummy Gp register. + ASMJIT_INLINE GpReg() : X86Reg() {} + //! Create a reference to `other` Gp register. + ASMJIT_INLINE GpReg(const GpReg& other) : X86Reg(other) {} + //! Create a custom Gp register. + ASMJIT_INLINE GpReg(uint32_t type, uint32_t index, uint32_t size) : X86Reg(type, index, size) {} + //! Create non-initialized Gp register. + explicit ASMJIT_INLINE GpReg(const _NoInit&) : X86Reg(NoInit) {} + + // -------------------------------------------------------------------------- + // [GpReg Specific] + // -------------------------------------------------------------------------- + + ASMJIT_REG_OP(GpReg) +}; + +// ============================================================================ +// [asmjit::x86x64::FpReg] +// ============================================================================ + +//! X86/X64 80-bit Fp register. +struct FpReg : public X86Reg { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a dummy Fp register. + ASMJIT_INLINE FpReg() : X86Reg() {} + //! Create a reference to `other` FPU register. + ASMJIT_INLINE FpReg(const FpReg& other) : X86Reg(other) {} + //! Create a custom Fp register. + ASMJIT_INLINE FpReg(uint32_t type, uint32_t index, uint32_t size) : X86Reg(type, index, size) {} + //! Create non-initialized Fp register. + explicit ASMJIT_INLINE FpReg(const _NoInit&) : X86Reg(NoInit) {} + + // -------------------------------------------------------------------------- + // [FpReg Specific] + // -------------------------------------------------------------------------- + + ASMJIT_REG_OP(FpReg) +}; + +// ============================================================================ +// [asmjit::x86x64::MmReg] +// ============================================================================ + +//! X86/X64 64-bit Mm register. +struct MmReg : public X86Reg { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a dummy Mm register. + ASMJIT_INLINE MmReg() : X86Reg() {} + //! Create a reference to `other` Mm register. + ASMJIT_INLINE MmReg(const MmReg& other) : X86Reg(other) {} + //! Create a custom Mm register. + ASMJIT_INLINE MmReg(uint32_t type, uint32_t index, uint32_t size) : X86Reg(type, index, size) {} + //! Create non-initialized Mm register. + explicit ASMJIT_INLINE MmReg(const _NoInit&) : X86Reg(NoInit) {} + + // -------------------------------------------------------------------------- + // [MmReg Specific] + // -------------------------------------------------------------------------- + + ASMJIT_REG_OP(MmReg) +}; + +// ============================================================================ +// [asmjit::x86x64::XmmReg] +// ============================================================================ + +//! X86/X64 128-bit Xmm register. +struct XmmReg : public X86Reg { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a dummy Xmm register. + ASMJIT_INLINE XmmReg() : X86Reg() {} + //! Create a reference to `other` Xmm register. + ASMJIT_INLINE XmmReg(const XmmReg& other) : X86Reg(other) {} + //! Create a custom Xmm register. + ASMJIT_INLINE XmmReg(uint32_t type, uint32_t index, uint32_t size) : X86Reg(type, index, size) {} + //! Create non-initialized Xmm register. + explicit ASMJIT_INLINE XmmReg(const _NoInit&) : X86Reg(NoInit) {} + + // -------------------------------------------------------------------------- + // [XmmReg Specific] + // -------------------------------------------------------------------------- + + ASMJIT_REG_OP(XmmReg) +}; + +// ============================================================================ +// [asmjit::x86x64::YmmReg] +// ============================================================================ + +//! X86/X64 256-bit Ymm register. +struct YmmReg : public X86Reg { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a dummy Ymm register. + ASMJIT_INLINE YmmReg() : X86Reg() {} + //! Create a reference to `other` Xmm register. + ASMJIT_INLINE YmmReg(const YmmReg& other) : X86Reg(other) {} + //! Create a custom Ymm register. + ASMJIT_INLINE YmmReg(uint32_t type, uint32_t index, uint32_t size) : X86Reg(type, index, size) {} + //! Create non-initialized Ymm register. + explicit ASMJIT_INLINE YmmReg(const _NoInit&) : X86Reg(NoInit) {} + + // -------------------------------------------------------------------------- + // [YmmReg Specific] + // -------------------------------------------------------------------------- + + ASMJIT_REG_OP(YmmReg) +}; + +// ============================================================================ +// [asmjit::x86x64::SegReg] +// ============================================================================ + +//! X86/X64 segment register. +struct SegReg : public X86Reg { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a dummy segment register. + ASMJIT_INLINE SegReg() : X86Reg() {} + //! Create a reference to `other` segment register. + ASMJIT_INLINE SegReg(const SegReg& other) : X86Reg(other) {} + //! Create a custom segment register. + ASMJIT_INLINE SegReg(uint32_t type, uint32_t index, uint32_t size) : X86Reg(type, index, size) {} + //! Create non-initialized segment register. + explicit ASMJIT_INLINE SegReg(const _NoInit&) : X86Reg(NoInit) {} + + // -------------------------------------------------------------------------- + // [SegReg Specific] + // -------------------------------------------------------------------------- + + ASMJIT_REG_OP(SegReg) +}; + +// ============================================================================ +// [asmjit::x86x64::Mem] +// ============================================================================ + +//! X86 memory operand. +struct Mem : public BaseMem { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE Mem() : BaseMem(NoInit) { + reset(); + } + + ASMJIT_INLINE Mem(const Label& label, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeLabel, 0, label._base.id); + _init_packed_d2_d3(kInvalidValue, disp); + } + + ASMJIT_INLINE Mem(const Label& label, const GpReg& index, uint32_t shift, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + ASMJIT_ASSERT(shift <= 3); + + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeLabel, + (kMemVSibGpz << kMemVSibIndex) + + (shift << kMemShiftIndex), + label.getId()); + _vmem.index = index.getRegIndex(); + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const Label& label, const GpVar& index, uint32_t shift, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + ASMJIT_ASSERT(shift <= 3); + + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeLabel, + (kMemVSibGpz << kMemVSibIndex) + + (shift << kMemShiftIndex), + label.getId()); + _vmem.index = _OP_ID(index); + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const GpReg& base, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeBaseIndex, + _getGpdFlags(base) + + (kMemVSibGpz << kMemVSibIndex), + base.getRegIndex()); + _init_packed_d2_d3(kInvalidValue, disp); + } + + ASMJIT_INLINE Mem(const GpReg& base, const GpReg& index, uint32_t shift, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + ASMJIT_ASSERT(shift <= 3); + + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeBaseIndex, + _getGpdFlags(base) + (shift << kMemShiftIndex), + base.getRegIndex()); + _vmem.index = index.getRegIndex(); + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const GpReg& base, const XmmReg& index, uint32_t shift, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + ASMJIT_ASSERT(shift <= 3); + + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeBaseIndex, + _getGpdFlags(base) + + (kMemVSibXmm << kMemVSibIndex) + + (shift << kMemShiftIndex), + base.getRegIndex()); + _vmem.index = index.getRegIndex(); + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const GpReg& base, const YmmReg& index, uint32_t shift, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + ASMJIT_ASSERT(shift <= 3); + + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeBaseIndex, + _getGpdFlags(base) + + (kMemVSibYmm << kMemVSibIndex) + + (shift << kMemShiftIndex), + base.getRegIndex()); + _vmem.index = index.getRegIndex(); + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const GpVar& base, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeBaseIndex, + _getGpdFlags(reinterpret_cast(base)) + + (kMemVSibGpz << kMemVSibIndex), + _OP_ID(base)); + _init_packed_d2_d3(kInvalidValue, disp); + } + + + ASMJIT_INLINE Mem(const GpVar& base, const GpVar& index, uint32_t shift, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + ASMJIT_ASSERT(shift <= 3); + + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeBaseIndex, + _getGpdFlags(reinterpret_cast(base)) + + (shift << kMemShiftIndex), + _OP_ID(base)); + _vmem.index = _OP_ID(index); + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const GpVar& base, const XmmVar& index, uint32_t shift, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + ASMJIT_ASSERT(shift <= 3); + + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeBaseIndex, + _getGpdFlags(reinterpret_cast(base)) + + (kMemVSibXmm << kMemVSibIndex) + + (shift << kMemShiftIndex), + _OP_ID(base)); + _vmem.index = _OP_ID(index); + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const GpVar& base, const YmmVar& index, uint32_t shift, int32_t disp, uint32_t size = 0) : BaseMem(NoInit) { + ASMJIT_ASSERT(shift <= 3); + + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, kMemTypeBaseIndex, + _getGpdFlags(reinterpret_cast(base)) + + (kMemVSibYmm << kMemVSibIndex) + + (shift << kMemShiftIndex), + _OP_ID(base)); + _vmem.index = _OP_ID(index); + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const _Init&, uint32_t memType, const X86Var& base, int32_t disp, uint32_t size) : BaseMem(NoInit) { + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, memType, 0, _OP_ID(base)); + _vmem.index = kInvalidValue; + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const _Init&, uint32_t memType, const X86Var& base, const GpVar& index, uint32_t shift, int32_t disp, uint32_t size) : BaseMem(NoInit) { + ASMJIT_ASSERT(shift <= 3); + + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, memType, shift << kMemShiftIndex, _OP_ID(base)); + _vmem.index = _OP_ID(index); + _vmem.displacement = disp; + } + + ASMJIT_INLINE Mem(const Mem& other) : BaseMem(other) {} + explicit ASMJIT_INLINE Mem(const _NoInit&) : BaseMem(NoInit) {} + + // -------------------------------------------------------------------------- + // [Mem Specific] + // -------------------------------------------------------------------------- + + //! Clone Mem operand. + ASMJIT_INLINE Mem clone() const { + return Mem(*this); + } + + //! Reset Mem operand. + ASMJIT_INLINE void reset() { + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, 0, kMemTypeBaseIndex, 0, kInvalidValue); + _init_packed_d2_d3(kInvalidValue, 0); + } + + //! \internal + ASMJIT_INLINE void _init(uint32_t memType, uint32_t base, int32_t disp, uint32_t size) { + _init_packed_op_sz_b0_b1_id(kOperandTypeMem, size, memType, 0, base); + _vmem.index = kInvalidValue; + _vmem.displacement = disp; + } + + // -------------------------------------------------------------------------- + // [Segment] + // -------------------------------------------------------------------------- + + //! Get whether the memory operand has segment override prefix. + ASMJIT_INLINE bool hasSegment() const { + return (_vmem.flags & kMemSegMask) != (kSegDefault << kMemSegIndex); + } + + //! Get memory operand segment, see `kSeg`. + ASMJIT_INLINE uint32_t getSegment() const { + return (static_cast(_vmem.flags) >> kMemSegIndex) & kMemSegBits; + } + + //! Set memory operand segment, see `kSeg`. + ASMJIT_INLINE Mem& setSegment(uint32_t segIndex) { + _vmem.flags = static_cast( + (static_cast(_vmem.flags) & kMemSegMask) + (segIndex << kMemSegIndex)); + return *this; + } + + //! Set memory operand segment, see `kSeg`. + ASMJIT_INLINE Mem& setSegment(const SegReg& seg) { + return setSegment(seg.getRegIndex()); + } + + // -------------------------------------------------------------------------- + // [Gpd] + // -------------------------------------------------------------------------- + + //! Get whether the memory operand has 32-bit GP base. + ASMJIT_INLINE bool hasGpdBase() const { + return (_packed[0].u32[0] & IntUtil::pack32_4x8(0x00, 0x00, 0x00, kMemGpdMask)) != 0; + } + + //! Set whether the memory operand has 32-bit GP base. + ASMJIT_INLINE Mem& setGpdBase() { + _packed[0].u32[0] |= IntUtil::pack32_4x8(0x00, 0x00, 0x00, kMemGpdMask); + return *this; + } + + //! Set whether the memory operand has 32-bit GP base to `b`. + ASMJIT_INLINE Mem& setGpdBase(uint32_t b) { + _packed[0].u32[0] &=~IntUtil::pack32_4x8(0x00, 0x00, 0x00, kMemGpdMask); + _packed[0].u32[0] |= IntUtil::pack32_4x8(0x00, 0x00, 0x00, b << kMemGpdIndex); + return *this; + } + + // -------------------------------------------------------------------------- + // [VSib] + // -------------------------------------------------------------------------- + + //! Get SIB type. + ASMJIT_INLINE uint32_t getVSib() const { + return (static_cast(_vmem.flags) >> kMemVSibIndex) & kMemVSibBits; + } + + //! Set SIB type. + ASMJIT_INLINE Mem& _setVSib(uint32_t vsib) { + _packed[0].u32[0] &=~IntUtil::pack32_4x8(0x00, 0x00, 0x00, kMemVSibMask); + _packed[0].u32[0] |= IntUtil::pack32_4x8(0x00, 0x00, 0x00, vsib << kMemVSibIndex); + return *this; + } + + // -------------------------------------------------------------------------- + // [Size] + // -------------------------------------------------------------------------- + + //! Set memory operand size. + ASMJIT_INLINE Mem& setSize(uint32_t size) { + _vmem.size = static_cast(size); + return *this; + } + + // -------------------------------------------------------------------------- + // [Base] + // -------------------------------------------------------------------------- + + //! Get whether the memory operand has base register. + ASMJIT_INLINE bool hasBase() const { + return _vmem.base != kInvalidValue; + } + + //! Get memory operand base register code, variable id, or `kInvalidValue`. + ASMJIT_INLINE uint32_t getBase() const { + return _vmem.base; + } + + //! Set memory operand base register code, variable id, or `kInvalidValue`. + ASMJIT_INLINE Mem& setBase(uint32_t base) { + _vmem.base = base; + return *this; + } + + // -------------------------------------------------------------------------- + // [Index] + // -------------------------------------------------------------------------- + + //! Get whether the memory operand has index. + ASMJIT_INLINE bool hasIndex() const { + return _vmem.index != kInvalidValue; + } + + //! Get memory operand index register code, variable id, or `kInvalidValue`. + ASMJIT_INLINE uint32_t getIndex() const { + return _vmem.index; + } + + //! Set memory operand index register code, variable id, or `kInvalidValue`. + ASMJIT_INLINE Mem& setIndex(uint32_t index) { + _vmem.index = index; + return *this; + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const GpReg& index) { + _vmem.index = index.getRegIndex(); + return _setVSib(kMemVSibGpz); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const GpReg& index, uint32_t shift) { + _vmem.index = index.getRegIndex(); + return _setVSib(kMemVSibGpz).setShift(shift); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const GpVar& index) { + _vmem.index = reinterpret_cast(index).getId(); + return _setVSib(kMemVSibGpz); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const GpVar& index, uint32_t shift) { + _vmem.index = reinterpret_cast(index).getId(); + return _setVSib(kMemVSibGpz).setShift(shift); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const XmmReg& index) { + _vmem.index = index.getRegIndex(); + return _setVSib(kMemVSibXmm); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const XmmReg& index, uint32_t shift) { + _vmem.index = index.getRegIndex(); + return _setVSib(kMemVSibXmm).setShift(shift); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const XmmVar& index) { + _vmem.index = reinterpret_cast(index).getId(); + return _setVSib(kMemVSibXmm); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const XmmVar& index, uint32_t shift) { + _vmem.index = reinterpret_cast(index).getId(); + return _setVSib(kMemVSibXmm).setShift(shift); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const YmmReg& index) { + _vmem.index = index.getRegIndex(); + return _setVSib(kMemVSibYmm); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const YmmReg& index, uint32_t shift) { + _vmem.index = index.getRegIndex(); + return _setVSib(kMemVSibYmm).setShift(shift); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const YmmVar& index) { + _vmem.index = reinterpret_cast(index).getId(); + return _setVSib(kMemVSibYmm); + } + + //! Set memory index. + ASMJIT_INLINE Mem& setIndex(const YmmVar& index, uint32_t shift) { + _vmem.index = reinterpret_cast(index).getId(); + return _setVSib(kMemVSibYmm).setShift(shift); + } + + //! Reset memory index. + ASMJIT_INLINE Mem& resetIndex() { + _vmem.index = kInvalidValue; + return _setVSib(kMemVSibGpz); + } + + // -------------------------------------------------------------------------- + // [Misc] + // -------------------------------------------------------------------------- + + //! Get whether the memory operand has base and index register. + ASMJIT_INLINE bool hasBaseOrIndex() const { + return _vmem.base != kInvalidValue || _vmem.index != kInvalidValue; + } + + //! Get whether the memory operand has base and index register. + ASMJIT_INLINE bool hasBaseAndIndex() const { + return _vmem.base != kInvalidValue && _vmem.index != kInvalidValue; + } + + // -------------------------------------------------------------------------- + // [Shift] + // -------------------------------------------------------------------------- + + //! Get whether the memory operand has shift used. + ASMJIT_INLINE bool hasShift() const { + return (_vmem.flags & kMemShiftMask) != 0; + } + + //! Get memory operand index scale (0, 1, 2 or 3). + ASMJIT_INLINE uint32_t getShift() const { + return _vmem.flags >> kMemShiftIndex; + } + + //! Set memory operand index scale (0, 1, 2 or 3). + ASMJIT_INLINE Mem& setShift(uint32_t shift) { + _packed[0].u32[0] &=~IntUtil::pack32_4x8(0x00, 0x00, 0x00, kMemShiftMask); + _packed[0].u32[0] |= IntUtil::pack32_4x8(0x00, 0x00, 0x00, shift << kMemShiftIndex); + return *this; + } + + // -------------------------------------------------------------------------- + // [Displacement] + // -------------------------------------------------------------------------- + + //! Get memory operand relative displacement. + ASMJIT_INLINE int32_t getDisplacement() const { + return _vmem.displacement; + } + + //! Set memory operand relative displacement. + ASMJIT_INLINE Mem& setDisplacement(int32_t disp) { + _vmem.displacement = disp; + return *this; + } + + //! Reset memory operand relative displacement. + ASMJIT_INLINE Mem& resetDisplacement(int32_t disp) { + _vmem.displacement = 0; + return *this; + } + + //! Adjust memory operand relative displacement by `disp`. + ASMJIT_INLINE Mem& adjust(int32_t disp) { + _vmem.displacement += disp; + return *this; + } + + //! Get new memory operand adjusted by `disp`. + ASMJIT_INLINE Mem adjusted(int32_t disp) const { + Mem result(*this); + result.adjust(disp); + return result; + } + + // -------------------------------------------------------------------------- + // [Operator Overload] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE Mem& operator=(const Mem& other) { + _copy(other); + return *this; + } + + ASMJIT_INLINE bool operator==(const Mem& other) const { + return (_packed[0] == other._packed[0]) & (_packed[1] == other._packed[1]) ; + } + + ASMJIT_INLINE bool operator!=(const Mem& other) const { + return !(*this == other); + } + + // -------------------------------------------------------------------------- + // [Static] + // -------------------------------------------------------------------------- + + static ASMJIT_INLINE uint32_t _getGpdFlags(const Operand& base) { + return (base._vreg.size & 0x4) << (kMemGpdIndex - 2); + } +}; + +// ============================================================================ +// [asmjit::x86x64::X86Var] +// ============================================================================ + +//! Base class for all variables. +struct X86Var : public BaseVar { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE X86Var() : BaseVar(NoInit) { + reset(); + } + + ASMJIT_INLINE X86Var(const X86Var& other) : BaseVar(other) {} + + explicit ASMJIT_INLINE X86Var(const _NoInit&) : BaseVar(NoInit) {} + + // -------------------------------------------------------------------------- + // [X86Var Specific] + // -------------------------------------------------------------------------- + + //! Clone X86Var operand. + ASMJIT_INLINE X86Var clone() const { + return X86Var(*this); + } + + //! Reset X86Var operand. + ASMJIT_INLINE void reset() { + _init_packed_op_sz_b0_b1_id(kOperandTypeVar, 0, kInvalidReg, kInvalidReg, kInvalidValue); + _init_packed_d2_d3(kInvalidValue, kInvalidValue); + } + + // -------------------------------------------------------------------------- + // [Type] + // -------------------------------------------------------------------------- + + //! Get register type. + ASMJIT_INLINE uint32_t getRegType() const { return _vreg.type; } + //! Get variable type. + ASMJIT_INLINE uint32_t getVarType() const { return _vreg.vType; } + + //! Get whether the variable is Gpb register. + ASMJIT_INLINE bool isGp() const { return _vreg.type <= kRegTypeGpq; } + //! Get whether the variable is Gpb register. + ASMJIT_INLINE bool isGpb() const { return _vreg.type <= kRegTypeGpbHi; } + //! Get whether the variable is Gpb-lo register. + ASMJIT_INLINE bool isGpbLo() const { return _vreg.type == kRegTypeGpbLo; } + //! Get whether the variable is Gpb-hi register. + ASMJIT_INLINE bool isGpbHi() const { return _vreg.type == kRegTypeGpbHi; } + //! Get whether the variable is Gpw register. + ASMJIT_INLINE bool isGpw() const { return _vreg.type == kRegTypeGpw; } + //! Get whether the variable is Gpd register. + ASMJIT_INLINE bool isGpd() const { return _vreg.type == kRegTypeGpd; } + //! Get whether the variable is Gpq register. + ASMJIT_INLINE bool isGpq() const { return _vreg.type == kRegTypeGpq; } + + //! Get whether the variable is Fp register. + ASMJIT_INLINE bool isFp() const { return _vreg.type == kRegTypeFp; } + //! Get whether the variable is Mm type. + ASMJIT_INLINE bool isMm() const { return _vreg.type == kRegTypeMm; } + //! Get whether the variable is Xmm type. + ASMJIT_INLINE bool isXmm() const { return _vreg.type == kRegTypeXmm; } + //! Get whether the variable is Ymm type. + ASMJIT_INLINE bool isYmm() const { return _vreg.type == kRegTypeYmm; } + + // -------------------------------------------------------------------------- + // [Memory Cast] + // -------------------------------------------------------------------------- + + //! Cast this variable to memory operand. + //! + //! \note Size of operand depends on native variable type, you can use other + //! variants if you want specific one. + ASMJIT_INLINE Mem m(int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, disp, getSize()); + } + + //! \overload + ASMJIT_INLINE Mem m(const GpVar& index, uint32_t shift = 0, int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, index, shift, disp, getSize()); + } + + //! Cast this variable to 8-bit memory operand. + ASMJIT_INLINE Mem m8(int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, disp, 1); + } + + //! \overload + ASMJIT_INLINE Mem m8(const GpVar& index, uint32_t shift = 0, int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, index, shift, disp, 1); + } + + //! Cast this variable to 16-bit memory operand. + ASMJIT_INLINE Mem m16(int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, disp, 2); + } + + //! \overload + ASMJIT_INLINE Mem m16(const GpVar& index, uint32_t shift = 0, int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, index, shift, disp, 2); + } + + //! Cast this variable to 32-bit memory operand. + ASMJIT_INLINE Mem m32(int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, disp, 4); + } + + //! \overload + ASMJIT_INLINE Mem m32(const GpVar& index, uint32_t shift = 0, int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, index, shift, disp, 4); + } + + //! Cast this variable to 64-bit memory operand. + ASMJIT_INLINE Mem m64(int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, disp, 8); + } + + //! \overload + ASMJIT_INLINE Mem m64(const GpVar& index, uint32_t shift = 0, int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, index, shift, disp, 8); + } + + //! Cast this variable to 80-bit memory operand (long double). + ASMJIT_INLINE Mem m80(int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, disp, 10); + } + + //! \overload + ASMJIT_INLINE Mem m80(const GpVar& index, uint32_t shift = 0, int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, index, shift, disp, 10); + } + + //! Cast this variable to 128-bit memory operand. + ASMJIT_INLINE Mem m128(int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, disp, 16); + } + + //! \overload + ASMJIT_INLINE Mem m128(const GpVar& index, uint32_t shift = 0, int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, index, shift, disp, 16); + } + + //! Cast this variable to 256-bit memory operand. + ASMJIT_INLINE Mem m256(int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, disp, 32); + } + + //! \overload + ASMJIT_INLINE Mem m256(const GpVar& index, uint32_t shift = 0, int32_t disp = 0) const { + return Mem(Init, kMemTypeStackIndex, *this, index, shift, disp, 32); + } + + // -------------------------------------------------------------------------- + // [Operator Overload] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE X86Var& operator=(const X86Var& other) { _copy(other); return *this; } + + ASMJIT_INLINE bool operator==(const X86Var& other) const { return _packed[0] == other._packed[0]; } + ASMJIT_INLINE bool operator!=(const X86Var& other) const { return !operator==(other); } + + // -------------------------------------------------------------------------- + // [Private] + // -------------------------------------------------------------------------- + +protected: + ASMJIT_INLINE X86Var(const X86Var& other, uint32_t reg, uint32_t size) : BaseVar(NoInit) { + _init_packed_op_sz_w0_id(kOperandTypeVar, size, (reg << 8) + other._vreg.index, other._base.id); + _vreg.vType = other._vreg.vType; + } +}; + +// ============================================================================ +// [asmjit::x86x64::GpVar] +// ============================================================================ + +//! Gp variable. +struct GpVar : public X86Var { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a new uninitialized `GpVar` instance. + ASMJIT_INLINE GpVar() : X86Var() {} + + //! Create a new initialized `GpVar` instance. + ASMJIT_INLINE GpVar(BaseCompiler& c, uint32_t type = kVarTypeIntPtr, const char* name = NULL) : X86Var(NoInit) { + c._newVar(this, type, name); + } + + //! Create a clone of `other`. + ASMJIT_INLINE GpVar(const GpVar& other) : X86Var(other) {} + + //! Create a new uninitialized `GpVar` instance (internal). + explicit ASMJIT_INLINE GpVar(const _NoInit&) : X86Var(NoInit) {} + + // -------------------------------------------------------------------------- + // [GpVar Specific] + // -------------------------------------------------------------------------- + + //! Clone GpVar operand. + ASMJIT_INLINE GpVar clone() const { + return GpVar(*this); + } + + //! Reset GpVar operand. + ASMJIT_INLINE void reset() { + X86Var::reset(); + } + + // -------------------------------------------------------------------------- + // [GpVar Cast] + // -------------------------------------------------------------------------- + + //! Cast this variable to 8-bit (LO) part of variable + ASMJIT_INLINE GpVar r8() const { return GpVar(*this, kRegTypeGpbLo, 1); } + //! Cast this variable to 8-bit (LO) part of variable + ASMJIT_INLINE GpVar r8Lo() const { return GpVar(*this, kRegTypeGpbLo, 1); } + //! Cast this variable to 8-bit (HI) part of variable + ASMJIT_INLINE GpVar r8Hi() const { return GpVar(*this, kRegTypeGpbHi, 1); } + + //! Cast this variable to 16-bit part of variable + ASMJIT_INLINE GpVar r16() const { return GpVar(*this, kRegTypeGpw, 2); } + //! Cast this variable to 32-bit part of variable + ASMJIT_INLINE GpVar r32() const { return GpVar(*this, kRegTypeGpd, 4); } + //! Cast this variable to 64-bit part of variable + ASMJIT_INLINE GpVar r64() const { return GpVar(*this, kRegTypeGpq, 8); } + + // -------------------------------------------------------------------------- + // [Operator Overload] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE GpVar& operator=(const GpVar& other) { _copy(other); return *this; } + + ASMJIT_INLINE bool operator==(const GpVar& other) const { return X86Var::operator==(other); } + ASMJIT_INLINE bool operator!=(const GpVar& other) const { return X86Var::operator!=(other); } + + // -------------------------------------------------------------------------- + // [Private] + // -------------------------------------------------------------------------- + +protected: + ASMJIT_INLINE GpVar(const GpVar& other, uint32_t reg, uint32_t size) : X86Var(other, reg, size) {} +}; + +// ============================================================================ +// [asmjit::x86x64::FpVar] +// ============================================================================ + +//! Fpu variable. +struct FpVar : public X86Var { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a new uninitialized `FpVar` instance. + ASMJIT_INLINE FpVar() : X86Var() {} + //! Create a new variable that links to `other`. + ASMJIT_INLINE FpVar(const FpVar& other) : X86Var(other) {} + + //! Create a new uninitialized `FpVar` instance (internal). + explicit ASMJIT_INLINE FpVar(const _NoInit&) : X86Var(NoInit) {} + + // -------------------------------------------------------------------------- + // [FpVar Specific] + // -------------------------------------------------------------------------- + + //! Clone FpVar operand. + ASMJIT_INLINE FpVar clone() const { + return FpVar(*this); + } + + //! Reset FpVar operand. + ASMJIT_INLINE void reset() { + X86Var::reset(); + } + + // -------------------------------------------------------------------------- + // [Operator Overload] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE FpVar& operator=(const FpVar& other) { _copy(other); return *this; } + + ASMJIT_INLINE bool operator==(const FpVar& other) const { return X86Var::operator==(other); } + ASMJIT_INLINE bool operator!=(const FpVar& other) const { return X86Var::operator!=(other); } +}; + +// ============================================================================ +// [asmjit::x86x64::MmVar] +// ============================================================================ + +//! Mm variable. +struct MmVar : public X86Var { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a new uninitialized `MmVar` instance. + ASMJIT_INLINE MmVar() : X86Var() {} + //! Create a new initialized `MmVar` instance. + ASMJIT_INLINE MmVar(BaseCompiler& c, uint32_t type = kVarTypeMm, const char* name = NULL) : X86Var(NoInit) { + c._newVar(this, type, name); + } + + //! Create a clone of `other`. + ASMJIT_INLINE MmVar(const MmVar& other) : X86Var(other) {} + + //! Create a new uninitialized `MmVar` instance (internal). + explicit ASMJIT_INLINE MmVar(const _NoInit&) : X86Var(NoInit) {} + + // -------------------------------------------------------------------------- + // [MmVar Specific] + // -------------------------------------------------------------------------- + + //! Clone MmVar operand. + ASMJIT_INLINE MmVar clone() const { + return MmVar(*this); + } + + //! Reset MmVar operand. + ASMJIT_INLINE void reset() { + X86Var::reset(); + } + + // -------------------------------------------------------------------------- + // [Operator Overload] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE MmVar& operator=(const MmVar& other) { _copy(other); return *this; } + + ASMJIT_INLINE bool operator==(const MmVar& other) const { return X86Var::operator==(other); } + ASMJIT_INLINE bool operator!=(const MmVar& other) const { return X86Var::operator!=(other); } +}; + +// ============================================================================ +// [asmjit::x86x64::XmmVar] +// ============================================================================ + +//! Xmm variable. +struct XmmVar : public X86Var { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a new uninitialized `XmmVar` instance. + ASMJIT_INLINE XmmVar() : X86Var() {} + //! Create a new initialized `XmmVar` instance. + ASMJIT_INLINE XmmVar(BaseCompiler& c, uint32_t type = kVarTypeXmm, const char* name = NULL) : X86Var(NoInit) { + c._newVar(this, type, name); + } + + //! Create a clone of `other`. + ASMJIT_INLINE XmmVar(const XmmVar& other) : X86Var(other) {} + + //! Create a new uninitialized `XmmVar` instance (internal). + explicit ASMJIT_INLINE XmmVar(const _NoInit&) : X86Var(NoInit) {} + + // -------------------------------------------------------------------------- + // [XmmVar Specific] + // -------------------------------------------------------------------------- + + //! Clone XmmVar operand. + ASMJIT_INLINE XmmVar clone() const { + return XmmVar(*this); + } + + //! Reset XmmVar operand. + ASMJIT_INLINE void reset() { + X86Var::reset(); + } + + // -------------------------------------------------------------------------- + // [Operator Overload] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE XmmVar& operator=(const XmmVar& other) { _copy(other); return *this; } + + ASMJIT_INLINE bool operator==(const XmmVar& other) const { return X86Var::operator==(other); } + ASMJIT_INLINE bool operator!=(const XmmVar& other) const { return X86Var::operator!=(other); } +}; + +// ============================================================================ +// [asmjit::x86x64::YmmVar] +// ============================================================================ + +//! Ymm variable. +struct YmmVar : public X86Var { + // -------------------------------------------------------------------------- + // [Construction / Destruction] + // -------------------------------------------------------------------------- + + //! Create a new uninitialized `YmmVar` instance. + ASMJIT_INLINE YmmVar() : X86Var() {} + //! Create a new initialized `YmmVar` instance. + ASMJIT_INLINE YmmVar(BaseCompiler& c, uint32_t type = kVarTypeYmm, const char* name = NULL) : X86Var(NoInit) { + c._newVar(this, type, name); + } + + //! Create a clone of `other`. + ASMJIT_INLINE YmmVar(const YmmVar& other) : X86Var(other) {} + + //! Create a new uninitialized `YmmVar` instance (internal). + explicit ASMJIT_INLINE YmmVar(const _NoInit&) : X86Var(NoInit) {} + + // -------------------------------------------------------------------------- + // [YmmVar Specific] + // -------------------------------------------------------------------------- + + //! Clone YmmVar operand. + ASMJIT_INLINE YmmVar clone() const { + return YmmVar(*this); + } + + //! Reset YmmVar operand. + ASMJIT_INLINE void reset() { + X86Var::reset(); + } + + // -------------------------------------------------------------------------- + // [Operator Overload] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE YmmVar& operator=(const YmmVar& other) { _copy(other); return *this; } + + ASMJIT_INLINE bool operator==(const YmmVar& other) const { return X86Var::operator==(other); } + ASMJIT_INLINE bool operator!=(const YmmVar& other) const { return X86Var::operator!=(other); } +}; + +// ============================================================================ +// [asmjit::x86x64::Registers] +// ============================================================================ + +//! No Gp register, can be used only within `Mem` operand. +ASMJIT_VAR const GpReg noGpReg; + +ASMJIT_VAR const GpReg al; //!< 8-bit Gpb-lo register. +ASMJIT_VAR const GpReg cl; //!< 8-bit Gpb-lo register. +ASMJIT_VAR const GpReg dl; //!< 8-bit Gpb-lo register. +ASMJIT_VAR const GpReg bl; //!< 8-bit Gpb-lo register. +ASMJIT_VAR const GpReg spl; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg bpl; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg sil; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg dil; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r8b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r9b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r10b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r11b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r12b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r13b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r14b; //!< 8-bit Gpb-lo register (X64). +ASMJIT_VAR const GpReg r15b; //!< 8-bit Gpb-lo register (X64). + +ASMJIT_VAR const GpReg ah; //!< 8-bit Gpb-hi register. +ASMJIT_VAR const GpReg ch; //!< 8-bit Gpb-hi register. +ASMJIT_VAR const GpReg dh; //!< 8-bit Gpb-hi register. +ASMJIT_VAR const GpReg bh; //!< 8-bit Gpb-hi register. + +ASMJIT_VAR const GpReg ax; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg cx; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg dx; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg bx; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg sp; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg bp; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg si; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg di; //!< 16-bit Gpw register. +ASMJIT_VAR const GpReg r8w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r9w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r10w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r11w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r12w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r13w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r14w; //!< 16-bit Gpw register (X64). +ASMJIT_VAR const GpReg r15w; //!< 16-bit Gpw register (X64). + +ASMJIT_VAR const GpReg eax; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg ecx; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg edx; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg ebx; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg esp; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg ebp; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg esi; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg edi; //!< 32-bit Gpd register. +ASMJIT_VAR const GpReg r8d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r9d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r10d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r11d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r12d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r13d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r14d; //!< 32-bit Gpd register (X64). +ASMJIT_VAR const GpReg r15d; //!< 32-bit Gpd register (X64). + +ASMJIT_VAR const GpReg rax; //!< 64-bit Gpq register (X64). +ASMJIT_VAR const GpReg rcx; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rdx; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rbx; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rsp; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rbp; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rsi; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg rdi; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r8; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r9; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r10; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r11; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r12; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r13; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r14; //!< 64-bit Gpq register (X64) +ASMJIT_VAR const GpReg r15; //!< 64-bit Gpq register (X64) + +ASMJIT_VAR const FpReg fp0; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp1; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp2; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp3; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp4; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp5; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp6; //!< 80-bit Fp register. +ASMJIT_VAR const FpReg fp7; //!< 80-bit Fp register. + +ASMJIT_VAR const MmReg mm0; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm1; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm2; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm3; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm4; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm5; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm6; //!< 64-bit Mm register. +ASMJIT_VAR const MmReg mm7; //!< 64-bit Mm register. + +ASMJIT_VAR const XmmReg xmm0; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm1; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm2; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm3; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm4; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm5; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm6; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm7; //!< 128-bit Xmm register. +ASMJIT_VAR const XmmReg xmm8; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm9; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm10; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm11; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm12; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm13; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm14; //!< 128-bit Xmm register (X64). +ASMJIT_VAR const XmmReg xmm15; //!< 128-bit Xmm register (X64). + +ASMJIT_VAR const YmmReg ymm0; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm1; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm2; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm3; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm4; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm5; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm6; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm7; //!< 256-bit Ymm register. +ASMJIT_VAR const YmmReg ymm8; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm9; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm10; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm11; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm12; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm13; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm14; //!< 256-bit Ymm register (X64). +ASMJIT_VAR const YmmReg ymm15; //!< 256-bit Ymm register (X64). + +ASMJIT_VAR const SegReg cs; //!< Cs segment register. +ASMJIT_VAR const SegReg ss; //!< Ss segment register. +ASMJIT_VAR const SegReg ds; //!< Ds segment register. +ASMJIT_VAR const SegReg es; //!< Es segment register. +ASMJIT_VAR const SegReg fs; //!< Fs segment register. +ASMJIT_VAR const SegReg gs; //!< Gs segment register. + +//! Make 8-bit Gpb-lo register operand. +static ASMJIT_INLINE GpReg gpb_lo(uint32_t index) { return GpReg(kRegTypeGpbLo, index, 1); } +//! Make 8-bit Gpb-hi register operand. +static ASMJIT_INLINE GpReg gpb_hi(uint32_t index) { return GpReg(kRegTypeGpbHi, index, 1); } +//! Make 16-bit Gpw register operand. +static ASMJIT_INLINE GpReg gpw(uint32_t index) { return GpReg(kRegTypeGpw, index, 2); } +//! Make 32-bit Gpd register operand. +static ASMJIT_INLINE GpReg gpd(uint32_t index) { return GpReg(kRegTypeGpd, index, 4); } +//! Make 64-bit Gpq register operand (X64). +static ASMJIT_INLINE GpReg gpq(uint32_t index) { return GpReg(kRegTypeGpq, index, 8); } +//! Make 80-bit Fp register operand. +static ASMJIT_INLINE FpReg fp(uint32_t index) { return FpReg(kRegTypeFp, index, 10); } +//! Make 64-bit Mm register operand. +static ASMJIT_INLINE MmReg mm(uint32_t index) { return MmReg(kRegTypeMm, index, 8); } +//! Make 128-bit Xmm register operand. +static ASMJIT_INLINE XmmReg xmm(uint32_t index) { return XmmReg(kRegTypeXmm, index, 16); } +//! Make 256-bit Ymm register operand. +static ASMJIT_INLINE YmmReg ymm(uint32_t index) { return YmmReg(kRegTypeYmm, index, 32); } + +// ============================================================================ +// [asmjit::x86x64::Memory] +// ============================================================================ + +//! Make `[base.reg + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const GpReg& base, int32_t disp = 0, uint32_t size = 0) { + return Mem(base, disp, size); +} +//! Make `[base.var + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const GpVar& base, int32_t disp = 0, uint32_t size = 0) { + return Mem(base, disp, size); +} + +//! Make `[base.reg + (index.reg << shift) + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const GpReg& base, const GpReg& index, uint32_t shift = 0, int32_t disp = 0, uint32_t size = 0) { + return Mem(base, index, shift, disp, size); +} +//! Make `[base.var + (index.var << shift) + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const GpVar& base, const GpVar& index, uint32_t shift = 0, int32_t disp = 0, uint32_t size = 0) { + return Mem(base, index, shift, disp, size); +} + +//! Make `[base.reg + (xmm.reg << shift) + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const GpReg& base, const XmmReg& index, uint32_t shift = 0, int32_t disp = 0, uint32_t size = 0) { + return Mem(base, index, shift, disp, size); +} +//! Make `[base.var + (xmm.var << shift) + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const GpVar& base, const XmmVar& index, uint32_t shift = 0, int32_t disp = 0, uint32_t size = 0) { + return Mem(base, index, shift, disp, size); +} +//! Make `[base.reg + (ymm.reg << shift) + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const GpReg& base, const YmmReg& index, uint32_t shift = 0, int32_t disp = 0, uint32_t size = 0) { + return Mem(base, index, shift, disp, size); +} +//! Make `[base.var + (ymm.var << shift) + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const GpVar& base, const YmmVar& index, uint32_t shift = 0, int32_t disp = 0, uint32_t size = 0) { + return Mem(base, index, shift, disp, size); +} + +//! Make `[label + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const Label& label, int32_t disp = 0, uint32_t size = 0) { + return Mem(label, disp, size); +} +//! Make `[label + (index.reg << shift) + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const Label& label, const GpReg& index, uint32_t shift, int32_t disp = 0, uint32_t size = 0) { \ + return Mem(label, index, shift, disp, size); \ +} +//! Make `[label + (index.var << shift) + disp]` memory operand with no/custom size information. +static ASMJIT_INLINE Mem ptr(const Label& label, const GpVar& index, uint32_t shift, int32_t disp = 0, uint32_t size = 0) { \ + return Mem(label, index, shift, disp, size); \ +} + +//! Make `[pAbs + disp]` absolute memory operand with no/custom size information. +ASMJIT_API Mem ptr_abs(Ptr pAbs, int32_t disp = 0, uint32_t size = 0); +//! Make `[pAbs + (index.reg << shift) + disp]` absolute memory operand with no/custom size information. +ASMJIT_API Mem ptr_abs(Ptr pAbs, const X86Reg& index, uint32_t shift = 0, int32_t disp = 0, uint32_t size = 0); +//! Make `[pAbs + (index.var << shift) + disp]` absolute memory operand with no/custom size information. +ASMJIT_API Mem ptr_abs(Ptr pAbs, const X86Var& index, uint32_t shift = 0, int32_t disp = 0, uint32_t size = 0); + +//! \internal +#define ASMJIT_X86_DEFINE_PTR(_Prefix_, _Size_) \ + /*! Make `[base.reg + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const GpReg& base, int32_t disp = 0) { \ + return Mem(base, disp, _Size_); \ + } \ + /*! Make `[base.var + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const GpVar& base, int32_t disp = 0) { \ + return Mem(base, disp, _Size_); \ + } \ + /*! Make `[base.reg + (index.reg << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const GpReg& base, const GpReg& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr(base, index, shift, disp, _Size_); \ + } \ + /*! Make `[base.var + (index.var << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const GpVar& base, const GpVar& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr(base, index, shift, disp, _Size_); \ + } \ + /*! Make `[base.reg + (xmm.reg << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const GpReg& base, const XmmReg& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr(base, index, shift, disp, _Size_); \ + } \ + /*! Make `[base.var + (xmm.var << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const GpVar& base, const XmmVar& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr(base, index, shift, disp, _Size_); \ + } \ + /*! Make `[base.reg + (ymm.reg << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const GpReg& base, const YmmReg& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr(base, index, shift, disp, _Size_); \ + } \ + /*! Make `[base.var + (ymm.var << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const GpVar& base, const YmmVar& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr(base, index, shift, disp, _Size_); \ + } \ + /*! Make `[label + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const Label& label, int32_t disp = 0) { \ + return ptr(label, disp, _Size_); \ + } \ + /*! Make `[label + (index.reg << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const Label& label, const GpReg& index, uint32_t shift, int32_t disp = 0) { \ + return ptr(label, index, shift, disp, _Size_); \ + } \ + /*! Make `[label + (index.var << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr(const Label& label, const GpVar& index, uint32_t shift, int32_t disp = 0) { \ + return ptr(label, index, shift, disp, _Size_); \ + } \ + /*! Make `[pAbs + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr##_abs(Ptr pAbs, int32_t disp = 0) { \ + return ptr_abs(pAbs, disp, _Size_); \ + } \ + /*! Make `[pAbs + (index.reg << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr##_abs(Ptr pAbs, const GpReg& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr_abs(pAbs, index, shift, disp, _Size_); \ + } \ + /*! Make `[pAbs + (index.var << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr##_abs(Ptr pAbs, const GpVar& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr_abs(pAbs, index, shift, disp, _Size_); \ + } \ + /*! Make `[pAbs + (xmm.reg << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr##_abs(Ptr pAbs, const XmmReg& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr_abs(pAbs, index, shift, disp, _Size_); \ + } \ + /*! Make `[pAbs + (xmm.var << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr##_abs(Ptr pAbs, const XmmVar& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr_abs(pAbs, index, shift, disp, _Size_); \ + } \ + /*! Make `[pAbs + (ymm.reg << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr##_abs(Ptr pAbs, const YmmReg& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr_abs(pAbs, index, shift, disp, _Size_); \ + } \ + /*! Make `[pAbs + (ymm.var << shift) + disp]` memory operand. */ \ + static ASMJIT_INLINE Mem _Prefix_##_ptr##_abs(Ptr pAbs, const YmmVar& index, uint32_t shift = 0, int32_t disp = 0) { \ + return ptr_abs(pAbs, index, shift, disp, _Size_); \ + } + +ASMJIT_X86_DEFINE_PTR(byte, 1) +ASMJIT_X86_DEFINE_PTR(word, 2) +ASMJIT_X86_DEFINE_PTR(dword, 4) +ASMJIT_X86_DEFINE_PTR(qword, 8) +ASMJIT_X86_DEFINE_PTR(tword, 10) +ASMJIT_X86_DEFINE_PTR(oword, 16) +ASMJIT_X86_DEFINE_PTR(yword, 32) + +#undef ASMJIT_X86_DEFINE_PTR + +// ============================================================================ +// [asmjit::x86x64::x86VarTypeToClass] +// ============================================================================ + +static ASMJIT_INLINE uint32_t x86VarTypeToClass(uint32_t vType) { + // Getting varClass is the only safe operation when dealing with denormalized + // varType. Any other property would require to map vType to the architecture + // specific one. + ASMJIT_ASSERT(vType < kVarTypeCount); + return _varInfo[vType].getClass(); +} + +//! \} + +} // x86x64 namespace +} // asmjit namespace + +// ============================================================================ +// [asmjit::x86] +// ============================================================================ + +#if defined(ASMJIT_BUILD_X86) + +namespace asmjit { +namespace x86 { + +// This is the only place where the x86x64 namespace is included into x86. +using namespace ::asmjit::x86x64; + +//! \addtogroup asmjit_x86x64_general +//! \{ + +// ============================================================================ +// [asmjit::x86::kRegType] +// ============================================================================ + +//! \internal +ASMJIT_ENUM(kRegType) { + //! Gpd register. + kRegTypeGpz = kRegTypeGpd +}; + +// ============================================================================ +// [asmjit::x86::kRegCount] +// ============================================================================ + +//! X86 registers count per class. +ASMJIT_ENUM(kRegCount) { + //! Base count of registers (8). + kRegCountBase = 8, + //! Count of Gp registers (8). + kRegCountGp = kRegCountBase, + //! Count of Xmm registers (8). + kRegCountXmm = kRegCountBase, + //! Count of Ymm registers (8). + kRegCountYmm = kRegCountBase +}; + +// ============================================================================ +// [asmjit::x86::Variables] +// ============================================================================ + +//! \internal +//! +//! Mapping of x86 variables into their real IDs. +//! +//! This mapping translates the following: +//! - `kVarTypeInt64` to `kVarTypeInvalid`. +//! - `kVarTypeUInt64` to `kVarTypeInvalid`. +//! - `kVarTypeIntPtr` to `kVarTypeInt32`. +//! - `kVarTypeUIntPtr` to `kVarTypeUInt32`. +ASMJIT_VAR const uint8_t _varMapping[kVarTypeCount]; + +// ============================================================================ +// [asmjit::x86::Registers] +// ============================================================================ + +//! Gpd register. +ASMJIT_VAR const GpReg zax; +//! Gpd register. +ASMJIT_VAR const GpReg zcx; +//! Gpd register. +ASMJIT_VAR const GpReg zdx; +//! Gpd register. +ASMJIT_VAR const GpReg zbx; +//! Gpd register. +ASMJIT_VAR const GpReg zsp; +//! Gpd register. +ASMJIT_VAR const GpReg zbp; +//! Gpd register. +ASMJIT_VAR const GpReg zsi; +//! Gpd register. +ASMJIT_VAR const GpReg zdi; + +//! Get Gp qword register. +static ASMJIT_INLINE GpReg gpz(uint32_t index) { return GpReg(kRegTypeGpd, index, 4); } + +// ============================================================================ +// [asmjit::x86::Mem] +// ============================================================================ + +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const GpReg& base, int32_t disp = 0) { return ptr(base, disp, 4); } +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const GpVar& base, int32_t disp = 0) { return ptr(base, disp, 4); } +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const GpReg& base, const GpReg& index, uint32_t shift = 0, int32_t disp = 0) { return ptr(base, index, shift, disp, 4); } +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const GpVar& base, const GpVar& index, uint32_t shift = 0, int32_t disp = 0) { return ptr(base, index, shift, disp, 4); } + +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const Label& label, int32_t disp = 0) { return ptr(label, disp, 4); } +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const Label& label, const GpReg& index, uint32_t shift, int32_t disp = 0) { return ptr(label, index, shift, disp, 4); } +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const Label& label, const GpVar& index, uint32_t shift, int32_t disp = 0) { return ptr(label, index, shift, disp, 4); } + +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr_abs(Ptr pAbs, int32_t disp = 0) { return ptr_abs(pAbs, disp, 4); } +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr_abs(Ptr pAbs, const GpReg& index, uint32_t shift, int32_t disp = 0) { return ptr_abs(pAbs, index, shift, disp, 4); } +//! Create an intptr_t 32-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr_abs(Ptr pAbs, const GpVar& index, uint32_t shift, int32_t disp = 0) { return ptr_abs(pAbs, index, shift, disp, 4); } + +//! \} + +} // x86 namespace +} // asmjit namespace + +#endif // ASMJIT_BUILD_X86 + +// ============================================================================ +// [asmjit::x64] +// ============================================================================ + +#if defined(ASMJIT_BUILD_X64) + +namespace asmjit { +namespace x64 { + +// This is the only place where the x86x64 namespace is included into x64. +using namespace ::asmjit::x86x64; + +//! \addtogroup asmjit_x86x64_general +//! \{ + +// ============================================================================ +// [asmjit::x64::kRegType] +// ============================================================================ + +//! \internal +ASMJIT_ENUM(kRegType) { + //! Gpq register. + kRegTypeGpz = kRegTypeGpq +}; + +// ============================================================================ +// [asmjit::x64::kRegCount] +// ============================================================================ + +//! X86 registers count per class. +ASMJIT_ENUM(kRegCount) { + //! Base count of registers (16). + kRegCountBase = 16, + //! Count of Gp registers (16). + kRegCountGp = kRegCountBase, + //! Count of Xmm registers (16). + kRegCountXmm = kRegCountBase, + //! Count of Ymm registers (16). + kRegCountYmm = kRegCountBase +}; + +// ============================================================================ +// [asmjit::x64::Variables] +// ============================================================================ + +//! \internal +//! +//! Mapping of x64 variables into their real IDs. +//! +//! This mapping translates the following: +//! - `kVarTypeIntPtr` to `kVarTypeInt64`. +//! - `kVarTypeUIntPtr` to `kVarTypeUInt64`. +ASMJIT_VAR const uint8_t _varMapping[kVarTypeCount]; + +// ============================================================================ +// [asmjit::x64::Registers] +// ============================================================================ + +//! Gpq register. +ASMJIT_VAR const GpReg zax; +//! Gpq register. +ASMJIT_VAR const GpReg zcx; +//! Gpq register. +ASMJIT_VAR const GpReg zdx; +//! Gpq register. +ASMJIT_VAR const GpReg zbx; +//! Gpq register. +ASMJIT_VAR const GpReg zsp; +//! Gpq register. +ASMJIT_VAR const GpReg zbp; +//! Gpq register. +ASMJIT_VAR const GpReg zsi; +//! Gpq register. +ASMJIT_VAR const GpReg zdi; + +//! Get Gpq register. +static ASMJIT_INLINE GpReg gpz(uint32_t index) { return GpReg(kRegTypeGpq, index, 8); } + +// ============================================================================ +// [asmjit::x64::Mem] +// ============================================================================ + +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const Label& label, int32_t disp = 0) { return ptr(label, disp, 8); } +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const Label& label, const GpReg& index, uint32_t shift, int32_t disp = 0) { return ptr(label, index, shift, disp, 8); } +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const Label& label, const GpVar& index, uint32_t shift, int32_t disp = 0) { return ptr(label, index, shift, disp, 8); } + +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr_abs(Ptr pAbs, int32_t disp = 0) { return ptr_abs(pAbs, disp, 8); } +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr_abs(Ptr pAbs, const GpReg& index, uint32_t shift, int32_t disp = 0) { return ptr_abs(pAbs, index, shift, disp, 8); } +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr_abs(Ptr pAbs, const GpVar& index, uint32_t shift, int32_t disp = 0) { return ptr_abs(pAbs, index, shift, disp, 8); } + +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const GpReg& base, int32_t disp = 0) { return ptr(base, disp, 8); } +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const GpVar& base, int32_t disp = 0) { return ptr(base, disp, 8); } +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const GpReg& base, const GpReg& index, uint32_t shift = 0, int32_t disp = 0) { return ptr(base, index, shift, disp, 8); } +//! Create an intptr_t 64-bit pointer operand. +static ASMJIT_INLINE Mem intptr_ptr(const GpVar& base, const GpVar& index, uint32_t shift = 0, int32_t disp = 0) { return ptr(base, index, shift, disp, 8); } + +//! \} + +} // x64 namespace +} // asmjit namespace + +#endif // ASMJIT_BUILD_X64 + +#undef _OP_ID + +// [Api-End] +#include "../apiend.h" + +// [Guard] +#endif // _ASMJIT_X86_X86OPERAND_H diff --git a/src/asmjit/x86/x86util.cpp b/src/asmjit/x86/x86util.cpp new file mode 100644 index 0000000..c8dcf13 --- /dev/null +++ b/src/asmjit/x86/x86util.cpp @@ -0,0 +1,90 @@ +// [AsmJit] +// Complete x86/x64 JIT and Remote Assembler for C++. +// +// [License] +// Zlib - See LICENSE.md file in the package. + +// [Export] +#define ASMJIT_EXPORTS + +// [Guard] +#include "../build.h" +#if defined(ASMJIT_BUILD_X86) || defined(ASMJIT_BUILD_X64) + +// [Dependencies - AsmJit] +#include "../x86/x86util.h" + +// [Api-Begin] +#include "../apibegin.h" + +namespace asmjit { +namespace x86x64 { + +// ============================================================================ +// [asmjit::x86x64::Cond] +// ============================================================================ + +#define CC_TO_INST(_Inst_) { \ + _Inst_##o, \ + _Inst_##no, \ + _Inst_##b, \ + _Inst_##ae, \ + _Inst_##e, \ + _Inst_##ne, \ + _Inst_##be, \ + _Inst_##a, \ + _Inst_##s, \ + _Inst_##ns, \ + _Inst_##pe, \ + _Inst_##po, \ + _Inst_##l, \ + _Inst_##ge, \ + _Inst_##le, \ + _Inst_##g, \ + \ + kInstNone, \ + kInstNone, \ + kInstNone, \ + kInstNone \ +} + +const uint32_t _reverseCond[20] = { + /* kCondO -> */ kCondO, + /* kCondNO -> */ kCondNO, + /* kCondB -> */ kCondA, + /* kCondAE -> */ kCondBE, + /* kCondE -> */ kCondE, + /* kCondNE -> */ kCondNE, + /* kCondBE -> */ kCondAE, + /* kCondA -> */ kCondB, + /* kCondS -> */ kCondS, + /* kCondNS -> */ kCondNS, + /* kCondPE -> */ kCondPE, + /* kCondPO -> */ kCondPO, + + /* kCondL -> */ kCondG, + /* kCondGE -> */ kCondLE, + + /* kCondLE -> */ kCondGE, + /* kCondG -> */ kCondL, + + /* kCondFpuUnordered -> */ kCondFpuUnordered, + /* kCondFpuNotUnordered -> */ kCondFpuNotUnordered, + + 0x12, + 0x13 +}; + +const uint32_t _condToCmovcc[20] = CC_TO_INST(kInstCmov); +const uint32_t _condToJcc [20] = CC_TO_INST(kInstJ ); +const uint32_t _condToSetcc [20] = CC_TO_INST(kInstSet ); + +#undef CC_TO_INST + +} // x86x64 namespace +} // asmjit namespace + +#include "../apiend.h" + +// [Guard] +#endif // ASMJIT_BUILD_X86 || ASMJIT_BUILD_X64 diff --git a/src/asmjit/x86/x86util.h b/src/asmjit/x86/x86util.h new file mode 100644 index 0000000..75cf187 --- /dev/null +++ b/src/asmjit/x86/x86util.h @@ -0,0 +1,369 @@ +// [AsmJit] +// Complete x86/x64 JIT and Remote Assembler for C++. +// +// [License] +// Zlib - See LICENSE.md file in the package. + +// [Guard] +#ifndef _ASMJIT_X86_X86UTIL_H +#define _ASMJIT_X86_X86UTIL_H + +// [Dependencies - AsmJit] +#include "../base/func.h" +#include "../x86/x86inst.h" +#include "../x86/x86operand.h" + +// [Api-Begin] +#include "../apibegin.h" + +namespace asmjit { +namespace x86x64 { + +//! \addtogroup asmjit_x86x64_util +//! \{ + +// ============================================================================ +// [asmjit::x86x64::Internal] +// ============================================================================ + +//! \internal +//! +//! X86/X64 condition codes to reversed condition codes map. +ASMJIT_VAR const uint32_t _reverseCond[20]; + +//! \internal +//! +//! X86X64 condition codes to "cmovcc" group map. +ASMJIT_VAR const uint32_t _condToCmovcc[20]; + +//! \internal +//! +//! X86X64 condition codes to "jcc" group map. +ASMJIT_VAR const uint32_t _condToJcc[20]; + +//! \internal +//! +//! X86X64 condition codes to "setcc" group map. +ASMJIT_VAR const uint32_t _condToSetcc[20]; + +// ============================================================================ +// [asmjit::x86x64::RegCount] +// ============================================================================ + +//! \internal +//! +//! X86/X64 registers count (Gp, Fp, Mm, Xmm). +struct RegCount { + // -------------------------------------------------------------------------- + // [Zero] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void reset() { + _packed = 0; + } + + // -------------------------------------------------------------------------- + // [Get] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE uint32_t get(uint32_t c) const { + ASMJIT_ASSERT(c < kRegClassCount); + return _regs[c]; + } + + // -------------------------------------------------------------------------- + // [Set] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void set(uint32_t c, uint32_t n) { + ASMJIT_ASSERT(c < kRegClassCount); + ASMJIT_ASSERT(n < 0x100); + + _regs[c] = static_cast(n); + } + + // -------------------------------------------------------------------------- + // [Add] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void add(uint32_t c, uint32_t n = 1) { + ASMJIT_ASSERT(c < kRegClassCount); + ASMJIT_ASSERT(n < 0x100); + + _regs[c] += static_cast(n); + } + + // -------------------------------------------------------------------------- + // [Misc] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void makeIndex(const RegCount& count) { + uint8_t a = count._regs[0]; + uint8_t b = count._regs[1]; + uint8_t c = count._regs[2]; + + _regs[0] = 0; + _regs[1] = a; + _regs[2] = a + b; + _regs[3] = a + b + c; + } + + // -------------------------------------------------------------------------- + // [Members] + // -------------------------------------------------------------------------- + + union { + struct { + uint8_t _gp; + uint8_t _fp; + uint8_t _mm; + uint8_t _xy; + }; + + uint8_t _regs[4]; + uint32_t _packed; + }; +}; + +// ============================================================================ +// [asmjit::x86x64::RegMask] +// ============================================================================ + +//! \internal +//! +//! X86/X64 registers mask (Gp, Fp, Mm, Xmm/Ymm/Zmm). +struct RegMask { + // -------------------------------------------------------------------------- + // [Reset] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void reset() { + _packed.reset(); + } + + // -------------------------------------------------------------------------- + // [IsEmpty / Has] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE bool isEmpty() const { + return _packed.isZero(); + } + + ASMJIT_INLINE bool has(uint32_t c, uint32_t mask = 0xFFFFFFFF) const { + switch (c) { + case kRegClassGp : return (static_cast(_gp ) & mask) != 0; + case kRegClassFp : return (static_cast(_fp ) & mask) != 0; + case kRegClassMm : return (static_cast(_mm ) & mask) != 0; + case kRegClassXyz: return (static_cast(_xyz) & mask) != 0; + } + + ASMJIT_ASSERT(!"Reached"); + return false; + } + + // -------------------------------------------------------------------------- + // [Zero] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void zero(uint32_t c) { + switch (c) { + case kRegClassGp : _gp = 0; break; + case kRegClassFp : _fp = 0; break; + case kRegClassMm : _mm = 0; break; + case kRegClassXyz: _xyz = 0; break; + } + } + + // -------------------------------------------------------------------------- + // [Get] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE uint32_t get(uint32_t c) const { + switch (c) { + case kRegClassGp : return _gp; + case kRegClassFp : return _fp; + case kRegClassMm : return _mm; + case kRegClassXyz: return _xyz; + } + + ASMJIT_ASSERT(!"Reached"); + return 0; + } + + // -------------------------------------------------------------------------- + // [Set] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void set(uint32_t c, uint32_t mask) { + switch (c) { + case kRegClassGp : _gp = static_cast(mask); break; + case kRegClassFp : _fp = static_cast(mask); break; + case kRegClassMm : _mm = static_cast(mask); break; + case kRegClassXyz: _xyz = static_cast(mask); break; + } + } + + ASMJIT_INLINE void set(const RegMask& other) { + _packed.setUInt64(other._packed); + } + + // -------------------------------------------------------------------------- + // [Add] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void add(uint32_t c, uint32_t mask) { + switch (c) { + case kRegClassGp : _gp |= static_cast(mask); break; + case kRegClassFp : _fp |= static_cast(mask); break; + case kRegClassMm : _mm |= static_cast(mask); break; + case kRegClassXyz: _xyz |= static_cast(mask); break; + } + } + + ASMJIT_INLINE void add(const RegMask& other) { + _packed.or_(other._packed); + } + + // -------------------------------------------------------------------------- + // [Del] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void del(uint32_t c, uint32_t mask) { + switch (c) { + case kRegClassGp : _gp &= ~static_cast(mask); break; + case kRegClassFp : _fp &= ~static_cast(mask); break; + case kRegClassMm : _mm &= ~static_cast(mask); break; + case kRegClassXyz: _xyz &= ~static_cast(mask); break; + } + } + + ASMJIT_INLINE void del(const RegMask& other) { + _packed.del(other._packed); + } + + // -------------------------------------------------------------------------- + // [And] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void and_(uint32_t c, uint32_t mask) { + switch (c) { + case kRegClassGp : _gp &= static_cast(mask); break; + case kRegClassFp : _fp &= static_cast(mask); break; + case kRegClassMm : _mm &= static_cast(mask); break; + case kRegClassXyz: _xyz &= static_cast(mask); break; + } + } + + ASMJIT_INLINE void and_(const RegMask& other) { + _packed.and_(other._packed); + } + + // -------------------------------------------------------------------------- + // [Xor] + // -------------------------------------------------------------------------- + + ASMJIT_INLINE void xor_(uint32_t c, uint32_t mask) { + switch (c) { + case kRegClassGp : _gp ^= static_cast(mask); break; + case kRegClassFp : _fp ^= static_cast(mask); break; + case kRegClassMm : _mm ^= static_cast(mask); break; + case kRegClassXyz: _xyz ^= static_cast(mask); break; + } + } + + ASMJIT_INLINE void xor_(const RegMask& other) { + _packed.xor_(other._packed); + } + + // -------------------------------------------------------------------------- + // [Members] + // -------------------------------------------------------------------------- + + union { + //! Gp mask (16-bit). + uint16_t _gp; + //! Fp mask (8-bit). + uint8_t _fp; + //! Mm mask (8-bit). + uint8_t _mm; + //! Xmm/Ymm/Zmm mask (32-bit). + uint32_t _xyz; + + //! All masks as 64-bit integer. + UInt64 _packed; + }; +}; + +// ============================================================================ +// [asmjit::x86x64::X86Util] +// ============================================================================ + +//! X86/X64 utilities. +struct X86Util { + //! Corresponds to transposing the operands of a comparison. + static ASMJIT_INLINE uint32_t reverseCond(uint32_t cond) { + ASMJIT_ASSERT(cond < ASMJIT_ARRAY_SIZE(_reverseCond)); + return _reverseCond[cond]; + } + + //! Get the equivalent of negated condition code. + static ASMJIT_INLINE uint32_t negateCond(uint32_t cond) { + ASMJIT_ASSERT(cond < ASMJIT_ARRAY_SIZE(_reverseCond)); + return static_cast(cond ^ static_cast(cond < kCondNone)); + } + + //! Translate condition code `cc` to `cmovcc` instruction code. + //! \sa \ref kInstCode, \ref _kInstCmovcc. + static ASMJIT_INLINE uint32_t condToCmovcc(uint32_t cond) { + ASMJIT_ASSERT(static_cast(cond) < ASMJIT_ARRAY_SIZE(_condToCmovcc)); + return _condToCmovcc[cond]; + } + + //! Translate condition code `cc` to `jcc` instruction code. + //! \sa \ref kInstCode, \ref _kInstJcc. + static ASMJIT_INLINE uint32_t condToJcc(uint32_t cond) { + ASMJIT_ASSERT(static_cast(cond) < ASMJIT_ARRAY_SIZE(_condToJcc)); + return _condToJcc[cond]; + } + + //! Translate condition code `cc` to `setcc` instruction code. + //! \sa \ref kInstCode, \ref _kInstSetcc. + static ASMJIT_INLINE uint32_t condToSetcc(uint32_t cond) { + ASMJIT_ASSERT(static_cast(cond) < ASMJIT_ARRAY_SIZE(_condToSetcc)); + return _condToSetcc[cond]; + } + + //! Get whether the `op` operand is Gpb-Lo or Gpb-Hi register. + static ASMJIT_INLINE bool isGpbRegOp(const Operand& op) { + const uint32_t mask = IntUtil::pack32_2x8_1x16(0xFF, 0xFF, ~(kRegTypePatchedGpbHi << 8) & 0xFF00); + return (op._packed[0].u32[0] & mask) == IntUtil::pack32_2x8_1x16(kOperandTypeReg, 1, 0x0000); + } + + //! Pack a shuffle constant to be used with multimedia instrutions. + //! + //! \param z First component position, number at interval [0, 3] inclusive. + //! \param x Second component position, number at interval [0, 3] inclusive. + //! \param y Third component position, number at interval [0, 3] inclusive. + //! \param w Fourth component position, number at interval [0, 3] inclusive. + //! + //! Shuffle constants can be used to make immediate value for these intrinsics: + //! - `X86X64Assembler::pshufw()` and `X86X64Compiler::pshufw()` + //! - `X86X64Assembler::pshufd()` and `X86X64Compiler::pshufd()` + //! - `X86X64Assembler::pshufhw()` and `X86X64Compiler::pshufhw()` + //! - `X86X64Assembler::pshuflw()` and `X86X64Compiler::pshuflw()` + //! - `X86X64Assembler::shufps()` and `X86X64Compiler::shufps()` + static ASMJIT_INLINE uint32_t mmShuffle(uint32_t z, uint32_t y, uint32_t x, uint32_t w) { + return (z << 6) | (y << 4) | (x << 2) | w; + } +}; + +//! \} + +} // x86x64 namespace +} // asmjit namespace + +// [Api-End] +#include "../apiend.h" + +// [Guard] +#endif // _ASMJIT_X86_X86UTIL_H diff --git a/tools/Doxyfile b/tools/Doxyfile deleted file mode 100644 index cb94031..0000000 --- a/tools/Doxyfile +++ /dev/null @@ -1,408 +0,0 @@ -# Doxyfile 1.8.7 - -#--------------------------------------------------------------------------- -# Project related configuration options -#--------------------------------------------------------------------------- - -DOXYFILE_ENCODING = UTF-8 - -PROJECT_NAME = "AsmJit" -PROJECT_NUMBER = "1.1" -PROJECT_BRIEF = "Complete Remote and JIT Assembler for x86/x64" - -OUTPUT_DIRECTORY = . -CREATE_SUBDIRS = NO -ALLOW_UNICODE_NAMES = NO -OUTPUT_LANGUAGE = English - -# If the BRIEF_MEMBER_DESC tag is set to YES doxygen will include brief member -# descriptions after the members that are listed in the file and class -# documentation (similar to Javadoc). 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Since the tabs in the index contain the same information as the navigation -# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES. -# The default value is: NO. -# This tag requires that the tag GENERATE_HTML is set to YES. - -DISABLE_INDEX = NO - -# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index -# structure should be generated to display hierarchical information. If the tag -# value is set to YES, a side panel will be generated containing a tree-like -# index structure (just like the one that is generated for HTML Help). For this -# to work a browser that supports JavaScript, DHTML, CSS and frames is required -# (i.e. any modern browser). Windows users are probably better off using the -# HTML help feature. Via custom stylesheets (see HTML_EXTRA_STYLESHEET) one can -# further fine-tune the look of the index. As an example, the default style -# sheet generated by doxygen has an example that shows how to put an image at -# the root of the tree instead of the PROJECT_NAME. Since the tree basically has -# the same information as the tab index, you could consider setting -# DISABLE_INDEX to YES when enabling this option. -# The default value is: NO. -# This tag requires that the tag GENERATE_HTML is set to YES. - -GENERATE_TREEVIEW = NO - -# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that -# doxygen will group on one line in the generated HTML documentation. -# -# Note that a value of 0 will completely suppress the enum values from appearing -# in the overview section. -# Minimum value: 0, maximum value: 20, default value: 4. -# This tag requires that the tag GENERATE_HTML is set to YES. - -ENUM_VALUES_PER_LINE = 0 - -# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used -# to set the initial width (in pixels) of the frame in which the tree is shown. -# Minimum value: 0, maximum value: 1500, default value: 250. -# This tag requires that the tag GENERATE_HTML is set to YES. - -TREEVIEW_WIDTH = 250 - -# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open links to -# external symbols imported via tag files in a separate window. -# The default value is: NO. -# This tag requires that the tag GENERATE_HTML is set to YES. - -EXT_LINKS_IN_WINDOW = NO - -#--------------------------------------------------------------------------- -# Configuration options related to the preprocessor -#--------------------------------------------------------------------------- - -ENABLE_PREPROCESSING = YES -MACRO_EXPANSION = YES -EXPAND_ONLY_PREDEF = NO -PREDEFINED = ASMJIT_DOCGEN=1 -EXPAND_AS_DEFINED = -SKIP_FUNCTION_MACROS = YES - -#--------------------------------------------------------------------------- -# Configuration options related to the dot tool -#--------------------------------------------------------------------------- - -CLASS_DIAGRAMS = NO -CLASS_GRAPH = NO diff --git a/tools/doc-header.html b/tools/doc-header.html index a34c17b..d89ff45 100644 --- a/tools/doc-header.html +++ b/tools/doc-header.html @@ -1,5 +1,5 @@ - + diff --git a/tools/doc-layout.xml b/tools/doc-layout.xml index f92c72b..6b9ee62 100644 --- a/tools/doc-layout.xml +++ b/tools/doc-layout.xml @@ -14,7 +14,6 @@ - @@ -49,6 +48,7 @@ + @@ -67,8 +67,8 @@ + - @@ -90,6 +90,7 @@ + @@ -107,6 +108,5 @@ - diff --git a/tools/doc-style.css b/tools/doc-style.css index f2ba7a3..fc72a05 100644 --- a/tools/doc-style.css +++ b/tools/doc-style.css @@ -531,18 +531,9 @@ table.memberdecls { background-image:url('nav_g.png'); background-repeat:repeat-x; background-color: #FFFFFF; - /* opera specific markup */ border-bottom-left-radius: 4px; border-bottom-right-radius: 4px; - box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); - /* firefox specific markup */ - -moz-border-radius-bottomleft: 4px; - -moz-border-radius-bottomright: 4px; - -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; - /* webkit specific markup */ - -webkit-border-bottom-left-radius: 4px; - -webkit-border-bottom-right-radius: 4px; - -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); */ } dl.reflist dt { @@ -827,11 +818,11 @@ table.fieldtable { .fieldtable td.fieldname { padding-top: 3px; + font-weight: bold; } .fieldtable td.fielddoc { border-bottom: 1px solid #A8B8D9; - /*width: 100%;*/ } .fieldtable td.fielddoc p:first-child { @@ -966,8 +957,8 @@ dl { /* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ dl.section { - margin-left: 0px; - padding-left: 0px; + margin-left: 0; + padding-left: 0; } dl.note { @@ -977,6 +968,10 @@ dl.note { border-color: #D0C000; } +dl.note dd { + margin-left: 0; +} + dl.warning, dl.attention { margin-left:-7px; padding-left: 3px; diff --git a/tools/src-gendefs.js b/tools/src-gendefs.js index a4997ae..c2d4476 100644 --- a/tools/src-gendefs.js +++ b/tools/src-gendefs.js @@ -225,7 +225,7 @@ var main = function(files) { main([ { - name: "../src/asmjit/x86/x86defs.cpp", + name: "../src/asmjit/x86/x86inst.cpp", arch: "x86", suffixes: [ "a", "ae",