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Added bswap r16 instruction, which has undefined behavior, but is encodable

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kobalicek
2020-02-08 10:14:56 +01:00
parent c92e495b63
commit 0ee535519c
3 changed files with 1098 additions and 1094 deletions
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13
src/asmjit/core/emitter.h
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@@ -67,11 +67,16 @@ public:
//! Emitter type. //! Emitter type.
enum EmitterType : uint32_t { enum EmitterType : uint32_t {
kTypeNone = 0, //! Unknown or uninitialized.
kTypeNone = 0,
//! Emitter inherits from `BaseAssembler`.
kTypeAssembler = 1, kTypeAssembler = 1,
kTypeBuilder = 2, //! Emitter inherits from `BaseBuilder`.
kTypeCompiler = 3, kTypeBuilder = 2,
kTypeCount = 4 //! Emitter inherits from `BaseCompiler`.
kTypeCompiler = 3,
//! Count of emitter types.
kTypeCount = 4
}; };
//! Emitter flags. //! Emitter flags.

4
src/asmjit/x86/x86assembler.cpp
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@@ -1015,11 +1015,11 @@ CaseX86M_GPB_MulDiv:
case InstDB::kEncodingX86Bswap: case InstDB::kEncodingX86Bswap:
if (isign3 == ENC_OPS1(Reg)) { if (isign3 == ENC_OPS1(Reg)) {
if (ASMJIT_UNLIKELY(o0.size() < 4)) if (ASMJIT_UNLIKELY(o0.size() == 1))
goto InvalidInstruction; goto InvalidInstruction;
opReg = o0.id(); opReg = o0.id();
opcode.addWBySize(o0.size()); opcode.addPrefixBySize(o0.size());
goto EmitX86OpReg; goto EmitX86OpReg;
} }
break; break;

2175
src/asmjit/x86/x86instdb.cpp
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