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[bug] Fixed special case of mov[abs] instruction

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This commit is contained in:
kobalicek
2017-03-07 13:59:06 +01:00
parent 528951ab9a
commit 0e80d2c3c3
2 changed files with 25 additions and 18 deletions
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2
src/asmjit/base/operand.h
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@@ -970,7 +970,7 @@ public:
//! Get a higher part of a 64-bit offset or absolute address. //! Get a higher part of a 64-bit offset or absolute address.
//! //!
//! NOTE: This function is UNSAFE and returns garbage if `has64BitOffset()` //! NOTE: This function is UNSAFE and returns garbage if `has64BitOffset()`
//! returns false. Never use blindly without checking it. //! returns false. Never use it blindly without checking it.
ASMJIT_INLINE int32_t getOffsetHi32() const noexcept { return static_cast<int32_t>(_mem.base); } ASMJIT_INLINE int32_t getOffsetHi32() const noexcept { return static_cast<int32_t>(_mem.base); }
//! Set a 64-bit offset or an absolute address to `offset`. //! Set a 64-bit offset or an absolute address to `offset`.

33
src/asmjit/x86/x86assembler.cpp
View File

@@ -1508,19 +1508,19 @@ CaseX86M_GPB_MulDiv:
ADD_PREFIX_BY_SIZE(o0.getSize()); ADD_PREFIX_BY_SIZE(o0.getSize());
} }
// Handle a special form 'mov al|ax|eax|rax, [ptr64]' that doesn't use MOD. // Handle a special form `mov al|ax|eax|rax, [ptr64]` that doesn't use MOD.
if (o0.getId() == X86Gp::kIdAx && !rmRel->as<X86Mem>().hasBaseOrIndex()) { if (o0.getId() == X86Gp::kIdAx && !rmRel->as<X86Mem>().hasBaseOrIndex()) {
opCode += 0xA0;
imVal = rmRel->as<X86Mem>().getOffset(); imVal = rmRel->as<X86Mem>().getOffset();
imLen = getGpSize(); if (!is64Bit() || (is64Bit() && ((options & X86Inst::kOptionLongForm) || !Utils::isInt32(imVal)))) {
goto EmitX86Op; opCode += 0xA0;
goto EmitX86OpMovAbs;
} }
else { }
opCode += 0x8A; opCode += 0x8A;
goto EmitX86M; goto EmitX86M;
} }
} }
}
if (isign3 == ENC_OPS2(Mem, Reg)) { if (isign3 == ENC_OPS2(Mem, Reg)) {
opReg = o1.getId(); opReg = o1.getId();
@@ -1543,19 +1543,19 @@ CaseX86M_GPB_MulDiv:
ADD_PREFIX_BY_SIZE(o1.getSize()); ADD_PREFIX_BY_SIZE(o1.getSize());
} }
// Handle a special form 'mov [ptr64], al|ax|eax|rax' that doesn't use MOD. // Handle a special form `mov [ptr64], al|ax|eax|rax` that doesn't use MOD.
if (!rmRel->as<X86Mem>().hasBaseOrIndex() && o1.getId() == X86Gp::kIdAx) { if (o1.getId() == X86Gp::kIdAx && !rmRel->as<X86Mem>().hasBaseOrIndex()) {
opCode += 0xA2;
imVal = rmRel->as<X86Mem>().getOffset(); imVal = rmRel->as<X86Mem>().getOffset();
imLen = getGpSize(); if (!is64Bit() || (is64Bit() && ((options & X86Inst::kOptionLongForm) || !Utils::isInt32(imVal)))) {
goto EmitX86Op; opCode += 0xA2;
goto EmitX86OpMovAbs;
} }
else { }
opCode += 0x88; opCode += 0x88;
goto EmitX86M; goto EmitX86M;
} }
} }
}
if (isign3 == ENC_OPS2(Reg, Imm)) { if (isign3 == ENC_OPS2(Reg, Imm)) {
opReg = o0.getId(); opReg = o0.getId();
@@ -3531,6 +3531,13 @@ CaseVexRvm_R:
// [Emit - X86] // [Emit - X86]
// -------------------------------------------------------------------------- // --------------------------------------------------------------------------
EmitX86OpMovAbs:
imLen = getGpSize();
// Segment-override prefix.
if (rmRel->as<X86Mem>().hasSegment())
EMIT_BYTE(x86SegmentPrefix[rmRel->as<X86Mem>().getSegmentId()]);
EmitX86Op: EmitX86Op:
// Emit mandatory instruction prefix. // Emit mandatory instruction prefix.
EMIT_PP(opCode); EMIT_PP(opCode);